Telephone Channel Compensation in Speaker Verification Using a Polynomial Approximation in the Log-Filter-Bank Energy Domain

Abstract
This correspondence presents a novel feature-space channel compensation technique that models the convolutional distortion in the logenergy mel-filter domain by means of a polynomial approximation. The proposed parametric distortion model generates appropriate constraints in the spectral domain that help to improve the channel cancelling estimation with limited data. In a text-dependent speaker verification task, the polynomial- based channel estimation scheme can lead to reductions in equal error rate (EER) as great as 22% and8% when compared with the baseline system and with the standard cepstral bias removal approach, respectively, with no significant increase in computational load.

Aim
To Design Telephone Channel Compensation system.

Objective
The objectives of this works are, 1. Design of Telephone Channel Compensation using VHDL. 2. Functional verification of the above design 3. Result analysis in terms of a. Area b. Power c. Speed

Tools to be used:
For functional simulation Mentor Graphics ModelSim 6.5 or later

For synthesis and implementation

Xilinx Incs Xilinx ISE 13.1or later version

For FPGA based implementation, the FPGA Details are,

Manufacturer Family FPGA Series Xilinx Spartan 3/Spartan 3E XC3S400PQ208/XC3S250EPQ208

For CPLD based implementation, the CPLD Details are,

Manufacturer Family CPLD Series Xilinx XC9500 XC9572-XL

HDL to be used:
VHDL/Verilog HDL

Project Report Details:

Soft copy of documents referred by our guide to do the project will be given to prepare the report.