Colour TV

Chassis

TCM2.0E
LA

MG8

ME8

H_17740_000.eps 240408

Contents

Page

Contents

Page
67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 67-68 69 71 72

1. Technical Specifications, Connections, and Chassis Overview 2 2. Safety Instructions, Warnings, and Notes 5 3. Directions for Use 6 4. Mechanical Instructions 7 5. Service Modes, Error Codes, and Fault Finding 12 6. Block Diagrams, Test Point Overview, and Waveforms Wiring Diagram Of Connector 19", 20", and 22" 19 Wiring Diagram Of Connector 26" 19 Block Diagram MT5335 20 7. Circuit Diagrams and PWB Layouts Diagram Main Power Supply (20") (A)21 Main Power Supply (26") (A1)23 Standby Power Supply (26") (A2)24 SSB v1: Tuner (B01)27 SSB v1: MCU Standby (B02)28 SSB v1: DC / DC (B03)29 SSB v1: Digital Channel Decoder (B04)30 SSB v1: DVBT/ CI Decoder (B05)31 SSB v1: Audio Amplifier (B06)32 SSB v1: MT5335 Video Processor (B07)33 SSB v1: MT5335 Interface USB/HDMI (B08)34 SSB v1: Interface LVDS TTL (B09)35 SSB v1: Flash Memory (B10)36 SSB v1: SDRAM (B11)37 SSB v1: MT5335 Interface VGA (B12)38 SSB v1: D/A Converter (B13)39 SSB v1: HDMI Switch (B14)40 SSB v1: I/O Scart (B15)41 SSB v1: I/O Side AV, S-Video, Audio (B16)42 SSB v1: MT5335 Interface YPbPr & VGA (B17)43 SSB v1: I/O VGA (B18)44 SSB v1: LVDS Receiver (B19)45

PWB 22 25 26 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47 46-47

8. 9.

10. 11.

SSB v2: Tuner (B01)48 SSB v2: MCU Standby (B02)49 SSB v2: DC / DC (B03)50 SSB v2: Digital Channel Decoder (B04)51 SSB v2: DVBT/ CI Decoder (B05)52 SSB v2: Audio Amplifier (B06)53 SSB v2: MT5335 Video Processor (B07)54 SSB v2: MT5335 Interface USB/HDMI (B08)55 SSB v2: Interface LVDS TTL (B09)56 SSB v2: Flash Memory (B10)57 SSB v2: SDRAM (B11)58 SSB v2: MT5335 Interface VGA (B12)59 SSB v2: D/A Converter (B13)60 SSB v2: HDMI Switch (B14)61 SSB v2: I/O Scart (B15)62 SSB v2: I/O Side AV, S-Video, Audio (B16)63 SSB v2: MT5335 Interface YPbPr & VGA (B17)64 SSB v2: I/O VGA (B18)65 SSB v2: LVDS Receiver (B19)66 Keyboard Control Panel(E) 69 Inverter Panel (I)70 IR LED Panel (J)72 Alignments 73 Circuit Descriptions, Abbreviation List, and IC Data Sheets 74 Abbreviation List 75 IC Data Sheets 78 Spare Parts List & CTN Overview 86 Revision List 86

Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by JY 0963 BU TV Consumer Care

Printed in the Netherlands

Subject to modification

EN 3122 785 17953

EN 2

1.

TCM2.0E LA

Technical Specifications, Connections, and Chassis Overview

1. Technical Specifications, Connections, and Chassis Overview

Index of this chapter: 1.1 Technical Specifications 1.2 Connection Overview 1.3 Chassis Overview Notes: Figures can deviate due to the different set executions. Specifications are indicative (subject to change). 1.1.3 Miscellaneous Power supply - Mains voltage (VAC) - Mains frequency (Hz) Power consumption (W)

1.1
1.1.1

Technical Specifications
Vision Display type Screen size : : : : : : : : : : : : : : : : : : : : : : : LCD 19" (48 cm), 16:9 20" (51 cm), 4:3 22" (56 cm), 16:9 26" (66 cm), 16:9 640480 (20") 1366768 (26") 1440900 (19") 16801050 (22") 300 (19", 20", 22") 500 (26") 800:1 (20", 26") 1000:1 (19", 22") 12 (20") 8 (26") 5 (19", 22") 178178 (20") 170160 (19", 22") 160160 (26") PLL PAL, SECAM PAL, SECAM, NTSC UHF, VHF, S, Hyper

Stand-by (W) Dimensions (W H D in mm)

Weight (kg)

: : : : : : : : : : : : : : :

100 to 240 50, 60 ~50 (19") ~58 (20") ~53 (22") ~120 (26") < 0.3 475 334 71 (19") 470 406 71 (20") 538 375 71 (22") 671 458 90 (26") ? (19") 5.8 (20") ? (22") 7.7 (26")

Resolution (H V pixels)

Light output (cd/m2) Contrast ratio Typ. response time (ms)

Viewing angle (H V degrees)

Tuning system Colour systems Video playback Tuner bands Supported Computer Formats 60 Hz 60 Hz 60 Hz 60 Hz 60 Hz 60 Hz 50 Hz, 75 Hz Supported Video Formats 60 Hz 60 Hz 50 Hz 50 Hz 50 Hz, 60 Hz 50 Hz, 60 Hz 50 Hz, 60 Hz 1.1.2 Sound Sound systems Maximum power (W)

: : : : : : :

640480(max.for 20") 800600 (all exc.20") 1024768(all exc.20") 1280768 (26" only) 12801024 (26" only) 1366768 (26" only) 1440900 (26", only)

: 480i : 480p : 576i : 576p : 720p : 1080i : 1080p (19", 22" only)

: : : :

Mono Stereo 2 3 (19", 20") 2 5 (22", 26")

Technical Specifications, Connections, and Chassis Overview 1.2 Connection Overview

TCM2.0E LA

1.

EN 3

COMMON INTERFACE

HDMI 1

HDMI 2

VGA PC
Y R

EXT 3
Pb L Pr VGA AUDIO

EXT 1

TV (75)

SPDIF

I_17950_001.eps 080508

Figure 1-1 Rear and side I/O connections Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, and Ye= Yellow. 1.2.1 Side connections EXT 2: Cinch: Video CVBS - In, Audio - In Ye - Video CVBS 1 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm EXT 2: S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 ohm 4 - Video C 0.3 VPPP / 75 ohm EXT 2: Mini Jack: Audio Head phone - Out Bk - Head phone 32 - 600 ohm / 10 mW EXT 2: Common Interface 68p - See diagram B05 1.2.2 Rear Connections USB2.0 Figure 1-4 VGA Connector
1 2 3 4

EXT 2

CVBS S-VIDEO

AUDIO

jq jq jq

H H j j

ot

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

- D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- n.c. - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground

Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel

j H j j H j j H j j H j j jk H j j H

DDC clock DDC data Gnd Hot Plug Detect Gnd

jk

VGA PC: Video RGB - In and Service UART

1 6 11 5 10 15 E_06532_002.eps 171108

E_06532_022.eps 300904

Figure 1-2 USB (type A) 1 2 3 4 - +5V - Data (-) - Data (+) - Ground k jk jk H

Gnd

HDMI 1 & 2: Digital Video, Digital Audio - In

19 18 1 2
E_06532_017.eps 250505

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

- Video Red - Video Green - Video Blue - n.c. - Ground - Ground Red - Ground Green - Ground Blue - +5V_dc - Ground Sync - n.c. - DDC_SDA - H-sync - V-sync - DDC_SCL

0.7 VPP / 75 ohm 0.7 VPP / 75 ohm 0.7 VPP / 75 ohm Gnd Gnd Gnd Gnd +5 V Gnd DDC data 0-5V 0-5V DDC clock

j j j H H H H j H j j j j

Figure 1-3 HDMI (type A) connector

EN 4

1.

TCM2.0E LA

Technical Specifications, Connections, and Chassis Overview

jq jq jq jq jq 5 6 7 8 - Ground Blue - Audio L - Video Blue/C-out - Function Select Gnd 0.5 VRMS / 10 kohm 0.7 VPP / 75 ohm 0 - 2 V: INT 4.5 - 7 V: EXT 16:9 9.5 - 12 V: EXT 4:3 Gnd 0 - 5 V / 4.7 kohm 0.7 VPP / 75 ohm Gnd Gnd 0.7 VPP / 75 ohm 0 - 0.4 V: INT 1 - 3 V: EXT / 75 ohm Gnd Gnd 1 VPP / 75 ohm 1 VPP / 75 ohm Gnd H j jk j H jk j H H j j H H k j H

EXT 3: Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 ohm Bu - Video Pb 0.7 VPP / 75 ohm Rd - Video Pr 0.7 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm EXT 3: Mini Jack: VGA Audio - In Bk - Audio L/R 0.5 VRMS / 10 kohm

jq

EXT 1: Video RGB/YC - In, CVBS - In/Out, Audio - In/Out

20

9 10 11 12 13 14 15 16 17 18 19 20 21

- Ground Green - Easylink P50 - Video Green - n.c. - Ground Red - Ground P50 - Video Red/C - Status/FBL - Ground Video - Ground FBL - Video CVBS - Video CVBS/Y - Shield

21

E_06532_001.eps 050404

Figure 1-5 SCART connector 1 2 3 4 - Audio R - Audio R - Audio L - Ground Audio 0.5 VRMS / 1 kohm 0.5 VRMS / 10 kohm 0.5 VRMS / 1 kohm Gnd k j k H Aerial - In - - IEC-type (EU) Cinch: S/PDIF - Out Bk - Coaxial Coax, 75 ohm D

0.4 - 0.6VPP / 75 ohm

kq

1.3

Chassis Overview

INVERTER PANEL (OPTONAL)

SMALL SIGNAL BOARD

KEYBOARD CONTROL PANEL

E A2 J

A(1)

MAIN POWER SUPPLY

STANDBY POWER SUPPLY UNIT (OPTIONAL)

IR LED PANEL

I_17950_002.eps 080508

Figure 1-6 PWB/CBA locations (26" model)

Safety Instructions, Warnings, and Notes

TCM2.0E LA

2.

EN 5

2. Safety Instructions, Warnings, and Notes

Index of this chapter: 2.1 Safety Instructions 2.2 Warnings 2.3 Notes Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

2.1

Safety Instructions
Safety regulations require the following during a repair: Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: Route the wire trees correctly and fix them with the mounted cable clamps. Check the insulation of the Mains/AC Power lead for external damage. Check the strain relief of the Mains/AC Power cord for proper function. Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the on position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M. 4. Switch off the set, and remove the wire between the two pins of the Mains/AC Power plug. Check the cabinet for defects, to prevent touching of any inner parts by the customer.

2.3.2

Schematic Notes All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k). Resistor values with no multiplier may be indicated with either an E or an R (e.g. 220E or 220R indicates 220 ). All capacitor values are given in micro-farads ( = 10-6), nano-farads (n = 10-9), or pico-farads (p = 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An asterisk (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed in the Spare Parts List. Therefore, always check this list when there is any doubt.

2.3.3

BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: www.atyourservice.ce.philips.com (needs subscription, not available for all regions). After login, select Magazine, then go to Repair downloads. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile, which is coupled to the 12NC. For an overview of these profiles, visit the website www.atyourservice.ce.philips.com (needs subscription, but is not available for all regions) You will find this and more technical information within the Magazine, chapter Repair downloads. For additional questions please contact your local repair help desk.

2.2

Warnings
All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched on. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable. 2.3.4

Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: Use only lead-free soldering tin Philips SAC305 with order code 0622 149 00106. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: To reach a solder-tip temperature of at least 400C. To stabilize the adjusted temperature at the solder-tip. To exchange solder-tips for different applications. Adjust your solder tool so that a temperature of around 360C - 380C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch off unused equipment or reduce heat. Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

2.3
2.3.1

Notes
General Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode (see chapter 5) with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

EN 6
2.3.5

3.

TCM2.0E LA

Directions for Use

Alternative BOM identification

MODEL : 32PF9968/10

It should be noted that on the European Service website, Alternative BOM is referred to as Design variant.
PROD.NO: AG 1A0617 000001

MADE IN BELGIUM 220-240V ~ 50/60Hz 128W VHF+S+H+UHF

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number 1 (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a 2 (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number. Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

S
Figure 2-1 Serial number (example) 2.3.6

BJ3.0E LA
E_06532_024.eps 260308

Board Level Repair (BLR) or Component Level Repair (CLR) If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

2.3.7

Practical Service Precautions It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3. Directions for Use

You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com

Mechanical Instructions

TCM2.0E LA

4.

EN 7

4. Mechanical Instructions
Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly Notes: Figures below can deviate slightly from the actual situation, due to the different set executions. Follow the disassemble instructions in described order. They apply mostly to the 26" model unless otherwise specified, but the described method is comparable for the other screen sizes.

4.1

Cable Dressing

I_17950_003.eps 080508

Figure 4-1 Cable dressing (20" model)

EN 8

4.

TCM2.0E LA

Mechanical Instructions

I_17950_004.eps 080508

Figure 4-2 Cable dressing (26" model)

4.2

Service Positions
For easy servicing of this set, there are a few possibilities created: The buffers from the packaging. Foam bars (created for Service).

4.2.1

Foam Bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure Foam bars for details. Sets with a display of 42 and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

Required for sets 42"

E_06532_018.eps 171106

Figure 4-3 Foam bars

Mechanical Instructions 4.3

4.3.1

TCM2.0E LA

4.

EN 9

Assy/Panel Removal
Stand 1. Refer to next figure. 2. Place the TV set upside down on a table top, using the foam bars (see section Service Position). 3. Remove the screws that secure the stand and remove the stand.

1 1

1 1
I_17951_010.eps 060808

Figure 4-5 Front cover latch location [1/2]

I_17950_005.eps 080508

Side

Figure 4-4 Stand 4.3.2 Rear Cover

Warning: Disconnect the mains power cord before you remove the rear cover. 1. Refer to next figures. 2. Place the TV set upside down on a table top, using the foam bars (see section Service Positions). 3. Remove the screws that secure the rear cover. The screws are located at the sides. Be careful: Some models (mainly the smaller screen sizes) use latches for securing the rear and front cover together (see figure Front cover latch location). These must be unlocked first before you can open the TV-set! To open them, use e.g. a (plastic) putty knife. Insert the tool into the gap between the front and rear cover (be extremely careful not to scratch or dent the cabinet when inserting the tool). Gently release the internal latches. Note: You will hear little popping sounds as the latches release and the rear cover moves away from the front cover. 4. Now the rear cover could be lifted but the SSB and power supply panel(s) are mounted in the rear cover and still connected to the LCD panel and other boards. Those cables should be released first! 5. To release the LVDS cable lift the back cover a few centimetres and move it downwards the set. Now unplug the LVDS connector [2]. Caution: be careful, as this is a very fragile connector! 6. Remove the screw [3]. 7. Now the rear cover can be lifted to gain access to the speaker cables and the IR/LED panel cable. Release the connectors [4].

Side

Top

I_17951_011.eps 060808

Figure 4-6 Front cover latch location [2/2]

3 2

I_17930_041.eps 240408

Figure 4-7 LVDS release

EN 10

4.

TCM2.0E LA

Mechanical Instructions

2 1 1

I_17930_043.eps 240408

4
4.3.5
I_17930_042.eps 240408

Figure 4-10 IR/LED Board and Speakers Power Supply Board Due to different set executions this chassis is supplied with one or two power supply boards and figures may differ. Caution: it is absolutely mandatory to remount all different screws and cables at their original position during re-assembly. Failure to do so may result in damaging the power supply. 1. Refer to next figure. 2. Unplug all the connectors [1]. 3. Remove the fixation screws [2] 4. Remove the main power supply board. 5. Unplug all the connectors [3]. 6. Remove the fixation screws [4] 7. Remove the stand-by power supply board.

Figure 4-8 Speaker and IR/LED panel cable release 4.3.3 Keyboard Control Board 1. Refer to next figure. 2. Unscrew two screws[1] 3. Unplug connector [2] and remove the board. When defective, replace the whole unit

1
2 1 2

1
4
I_17930_063.eps 240408

3 1 2 2 4
I_17950_006.eps 080508

Figure 4-9 Keyboard control board 4.3.4 IR/LED Board and Speakers 1. Refer to next figure. 2. Remove the screws [1] and remove the IR/LED board. 3. Remove the screws [2] and remove the speakers. When defective, replace the whole unit.

Figure 4-11 Power Supply Unit(s)

Mechanical Instructions
4.3.6 Inverter Board (19", 20", and 22" versions) Due to different set executions this chassis some versions are supplied with an inverter board. Figures may differ. 1. Refer to next figure. 2. Unplug all connectors [1]. 3. Release the clips [2] 4. Take out the inverter board.

TCM2.0E LA

4.

EN 11

2 4 4 3

2 1
I_17950_008.eps 080508

Figure 4-14 SSB

4.4
1

Set Re-assembly
To re-assemble the whole set, execute all processes in reverse order. Notes: While re-assembling, make sure that all cables are placed and connected in their original position. See figure Cable dressing. Pay special attention not to damage the EMC foams at the SB shields. Make sure, that EMC foams are put correctly on their places.

I_17930_065.eps 240408

Figure 4-12 Inverter Board 4.3.7 Small Signal Board (SSB) Caution: it is absolutely mandatory to remount all different screws at their original position during re-assembly. Failure to do so may result in damaging the SSB. Removing the SSB 1. See next figures. 2. Remove the screws [1] from the SSB connector plate. 3. Remove the screws [2] from the SSB. 4. On the outside of the set, lift the rear cover near the tuner connector approximately 3 mm in the indicated direction and keep it lifted, while 5. On the inside of the set, slide the metal plate in the indicated direction. 6. Gently lift the board from the rear cover. 7. Now unplug the LVDS connector [3]. Caution: be careful, as this is a very fragile connector! Unplug the rest of the cables [4].

1 1

I_17950_007.eps 080508

Figure 4-13 SSB connector plate

EN 12

5.

TCM2.0E LA

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Error Codes 5.5 Service Tools

5.1

Test Points
This chassis is NOT equipped with test points in the service printing. No test points are mentioned in the service manual.

5.2

Service Modes
The Service Mode feature is split into different parts: Service Alignment Mode (SAM). Service Default Mode (SDM). Customer Service Mode (CSM). SDM and SAM offer features, which can be used by the Service engineer to repair/align a TV set. Some features are: Activates the blinking LED procedure for error identification when no picture is available (SDM). Make alignments (e.g. white tone), (de)select options, enter options codes, reset the error buffer (SAM). Display information (SAM indication in upper right corner of screen, error buffer, software version, options and option codes, sub menus). The CSM is a Service Mode that can be enabled by the consumer. The CSM displays diagnosis information, which the customer can forward to the dealer or call centre. In CSM mode, CSM, is displayed in the top right corner of the screen. The information provided in CSM and the purpose of CSM is to: Increase the home repair hit rate. Decrease the number of nuisance calls. Solved customers' problem without home visit.

I_17950_015.eps 050808

Figure 5-2 SAM menu, Clear

I_17950_017.eps 050808

Figure 5-3 SAM menu, RGB Align

5.2.1

Service Alignment Mode (SAM) How to Enter To enter SAM, use the following method: Press on the remote control the code 062596 directly followed by the INFO key. After entering SAM, the following screen is visible, the values can be adjusted according to the requested (see Chapter 8).
I_17950_018.eps 050808

Figure 5-4 SAM menu, NVM Editor

I_17950_014.eps 050808

Figure 5-1 SAM menu, System Information

I_17950_019.eps 050808

Figure 5-5 SAM menu, NVM Update

Service Modes, Error Codes, and Fault Finding

TCM2.0E LA

5.

EN 13

How to Activate CSM Key in the code 123654 via the standard RC transmitter. Contents of CSM

I_17950_020.eps 050808

Figure 5-6 SAM menu, Clear OAD How to EXIT Put set in <stand-by> by using the remote control. 5.2.2 Service Default Mode (SDM) Purpose To create a pre-defined setting, to get the same measurements as given in this manual. To override SW protections. To start the blinking LED procedure. How to enter To enter SAM, use the following method: Press on the remote control the code 062596 directly followed by the MENU key. After entering SDM, the following screen is visible. Figure 5-8 CSM Menu -1-

I_17950_044.eps 080508

I_17950_045.eps 080508

Figure 5-9 CSM Menu -2Menu Explanation 1. Model Number. Type number and region. 2. Production Serial Number. Product serial no. 3. SW Version. Software cluster and version is displayed (TC = TCL, M2 = MTK2, E = Europe, 0.49 = software version). 4. Codes. Error buffer contents. 5. SSB. SSB serial number. 6. DISPLAY. Display type. 7. NVM Version. NVM version. 8. Key (HDCP) HDMI. Shows valid or invalid HDCP key when HDMI connected. Else blank. 9. Digital Signal Quality. Quality of antenna signal in %. 10. Audio System. Audio system (Mono/Stereo/NICAM) 11. n.a. 12. Video Format. Video format. 13. Stand-by P SW ID. SW version Stand-by microprocessor. How to exit Press MENU on the RC-transmitter.

I_17950_043.eps 080508

Figure 5-7 SDM menu From top to bottom, it gives the following information: Operation hours Software version Error buffer display. 5.2.3 Customer Service Mode (CSM) Purpose When a customer is having problems with his TV-set, he can call his dealer or the Customer Help desk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible.

EN 14
5.2.4

5.

TCM2.0E LA

Service Modes, Error Codes, and Fault Finding 5.3 Error Codes
The error code buffer contains all errors detected since the last time the buffer was erased. The buffer is written from left to right. When an error occurs that is not yet in the error code buffer, it is displayed at the left side and all other errors shift one position to the right. Basically there are six kind of errors: Code Description Detection method 0 3 4 7 8 10 13 no error P Control General I2C bus Error Tuner I2C-bus I2C-bus I2C-bus Error log + blinking in SDM Protection + spontaneous Error log + blinking in SDM Error log + blinking in SDM Error log + blinking in SDM Error log + blinking in SDM Type

Blinking LED Procedure The software is capable of identifying different kinds of errors. Because it is possible that more than one error can occur over time, an error buffer is available which is capable of storing the last five errors that occurred. This is useful if the OSD is not working properly. Errors can also be displayed by the blinking LED procedure. The method is to repeatedly let the front LED pulse with as many pulses as the error code number, followed by a period of 1.5 seconds in which the LED is off. Then this sequence is repeated. Any RC command terminates the sequence. Error code LED blinking is in white colour. Example: the contents of the error buffer is 013 007 000 000 000. After entering SDM, the following occurs: 1 long blink of 5 seconds to start the sequence 1 medium blink of 3 seconds and then 3 short blinks followed by a pause of 1.5 seconds 7 short blinks followed by a pause of 1.5 seconds 1 long blink of 1.5 seconds to finish the sequence. The sequence starts again with 12 short blinks.

Demodulator I2C-bus MT8295 I2C-bus

HDMI switch I2C-bus

5.4

Fault Finding

No Picture, no sound, no Black light, Fuse Broken

For P804 ,Pin 8~11 is 12V& Pin2~3 of is 5v , OK?

NO

YES

For Q800,pin5~6 of is 5V & pin7~8 is12V , OK?

YES

Is U800~U808&U2 01 OK?

YES

Check LQFP jointing of U203

NO

NO

YES

Check PSU

Check Pin 10 Of U810. is it 3.3v?

Replace the bad one of u800~u808&U201

Check X200,C221,C222,C 23,L214 & IIC Bus

YES

Check jointing of U204,R271~R288,R 248~R260.

I_17950_009.eps 080508

Figure 5-10 No picture, no sound, no backlight, fuse broken (19", 20", and 22" sets)

Service Modes, Error Codes, and Fault Finding

TCM2.0E LA

5.

EN 15

No Picture, no sound, no Black light, Fuse Broken

Pin 8~11 of P804 is 12V, OK?

YES

pin4~5 is 5V & pin7~8 is12V of U505 OK?

YES

Is U800~U808&U2 01 OK?

YES

Check LQFP jointing of U203

NO

NO

NO

YES

Pin2~3 of P804 is 5v&Pin 1 is 5v,OK?

YES NO

Check Pin 4 Of UM01 is 3.3v

Replace the bad one of u800~u808&U2 01

Check X200,C221,C222,C 23,L214 & IIC Bus

YES

Check Main PSU

Check sub PSU for standby

Check jointing of U204,R271~R288 ,R248~R260.

I_17950_010.eps 080508

Figure 5-11 No Picture, no sound, no backlight, fuse broken (26" sets)

No Picture, Black light & Sound OK

Check the output voltage of Q203. is it OK? Yes Check waveform of L200~L209 is OK? No Is Pin220,229,238 of U203 shorted to earth?

No

Check the voltage of C of Q204.

Yes

Replace Q203

Yes check the cable to panel

No

check Pin 221~228&Pin 230~242 of U203

I_17950_011.eps 080508

Figure 5-12 No Picture, Backlight & Sound OK

EN 16

5.

TCM2.0E LA

Service Modes, Error Codes, and Fault Finding

Picture OK, No sound

Check the voltage of Pin 3,13 of u600,is it 12v? Yes Check stby Pin 7 & Mute Pin6 of U600,is it OK? Yes Check the wave of pin186,185 of U203,is it OK? No TV source Yes Check IF circuit or Replace U100 Replace u203
I_17950_012.eps 080508

No Check Q800

NO

Check C of Q602 is 5V,B of Q602 is Low OK? Yes Check Pin 7 of U600 is 6V No Check the input circuit

No

Change the damage component

Yes

Check R & L speaker Check the wave of Pin of source input,such as pin170~177. Yes

NO Replace U600

No

Figure 5-13 Picture OK, No sound

No colour

Colour system is Right & another channel colour is right ?

No

Yes

Dose the TV signal too weak?

NO

Check Pin 17 of U100 OK?

YES

NO

Check U100

YES

Reset To Local system

Check Tuner Input cable & antenna

Check E2PROM U205

YES

Fine Frequency
I_17950_013.eps 080508

Figure 5-14 No colour

Service Modes, Error Codes, and Fault Finding 5.5

5.5.1

TCM2.0E LA

5.

EN 17

Service Tools
ComPair Introduction ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following: 1. ComPair helps you to quickly get an understanding on how to repair the chassis in a short and effective way. 2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. You do not have to know anything about I2C or UART commands yourself, because ComPair takes care of this. 3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available. 4. ComPair features TV software upgrade possibilities. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The (new) ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). How to Connect This is described in the ComPair chassis fault finding database.
TO TV
TO UART SERVICE CONNECTOR TO I2C SERVICE CONNECTOR TO UART SERVICE CONNECTOR

ComPair II RC in RC out

Multi function

Optional Power Link/ Mode Switch Activity

I2C

RS232 /UART

PC

ComPair II Developed by Philips Brugge

HDMI I2C only

Optional power 5V DC

E_06532_036.eps 150208

Figure 5-15 ComPair II interface connection Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown! How to Order ComPair II order codes: ComPair II interface: 312278591020. For latest software see Philips Service website. ComPair UART interface cable: 312278591070. Note: If you encounter any problems, contact your local support desk.

EN 18 5.6
5.6.1

5.

TCM2.0E LA

Service Modes, Error Codes, and Fault Finding

5.6.2 Main Software Upgrade In normal conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the upgrade.pkg. This software can be downloaded (as ZIP file) from the Philips Service website (an account is required). If named otherwise, rename the unzipped file always to upgrade.pkg. How to upgrade: 1. Copy the upgrade.pkg file to the root of your USB stick. 2. Insert the USB stick in the USB connector on the TV while the TV is in on mode. The set will restart, and the upgrading will start automatically (see flowchart below). As soon as the programming is finished, you will get the message that you can remove your USB stick and restart the TV-set.

Software Upgrading
Introduction Software upgrading can be done by ComPair but this feature is a back up solution in case the normal procedure via USB does not work. Please use the USB upgrade method first. When the software is programmed via USB, you need the UPGRADE.PKG file on the USB stick. This file is available for customers on the Consumer Care website. When the software is programmed via ComPair, you need a *.BIN file. This file is only available for service workshops on the Servicer Network Support website. The software upgrade feature does only work with the ComPairII interface.

User software upgrade flow chart

Power off the set A newer version of software is detected. Do you want to upgrade? YES layout 1 NO Plug-in the USB stick

An equal/older version of software is detected. Do you want to proceed? Note: Should be done only if necessary. YES layout 2 NO

Power-on the set

Kindly remove the USB stick and restart the set.

Detect USB break-in and check autorun file

layout 3

Valid auto-run file? Y

Software update failed! Would you like to try again? YES layout 4 Y Display USB sw newer than the TV sw. Prompt user to confirm See layout 1 Y Display USB sw equal/older than TV sw. Prompt user to confirm See layout 2 NO Is USB sw version > set sw? N Is USB sw version =< set sw? N End

Proceed?

Set re-start & Proceed with sw upgrade

Display upgrade progress

Prompt user to remove USB and restart the set See layout 3 End

Successful?

Prompt user to try again?

See layout 4

N Retry?

Y
I_17920_046.eps 080508

Figure 5-16 SW upgrade flowchart

Block Diagrams, Test Point Overview, and Waveforms

TCM2.0E LA

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19

6. Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram Of Connector 19", 20", and 22"

Wiring Diagram Of Connector 26"

P5 40-1PL37C-PWF1XG MAIN POWER
9 11 13 15 17 19 21 23 25 27
GND GND GND GND GND +24V +24V
1

PANEL INVERTER CONNECTOR

+24V +24V +24V +24V +24V GND GND GND GND GND VDIM VBLON PDIM GND

P800
1 2 3 4 5 6 7
BL ON/OFF NU/SELECT DIMMING
1

CN1
INVERTER_PWR 12V INVERTER_PWR 12V INVERT-SW DIMMING GND GND

GND GND INVERTER_PWR 12V INVERTER_PWR 12V

1 2 3 4 5 6

+24V +24V +24V

P800 40-LDMK35-MAE2XG MAIN BOARD

1 2 3 4 5 6 7
BL ON/OFF NU/SELECT DIMMING GND GND INVERTER_PWR 12V INVERTER_PWR 12V

1 2 3 4 5 6 7 8 9 10 11 12 13 14

INVERTER BOARD

40-LDMK35-MAE2XG MAIN BOARD

1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 10 11

P1

40-L20PFL-IRC1XG IR BOARD

P805
5VSB DIIR GND STANDBY POWER_ON KEY GND 5VSB 5V_KEY

ON-LCD SB-LCD GND IR 5V-SB

P1
ON-LCD SB-LCD GND IR 5V-SB

40-L20PFL-IRC1XG IR BOARD

1 2 3 4 5

P805
1 2 3 4 5 6 7 8 9
5VSB DIIR GND STANDBY POWER_ON KEY GND 5VSB 5V_KEY

1 2 3 4 5

P601
KEY GND 5VSB-OUT 5VSB-IN

P601
KEY GND 5VSB-OUT 5VSB-IN

40-L19PFL-KEC1XG KEY BOARD

40-L19PFL-KEC1XG KEY BOARD

1 2 3 4

1 2 3 4

P4

40-1PL37C-PWF1XG MAIN POWER

P804
NU 5V-PW 5V-PW GND GND GND GND 12V-IN 12V-IN 12V-IN 12V-IN 5V-PW 5V-PW GND GND GND GND 12V-IN 12V-IN 12V-IN 12V-IN

PS1
1 2 3 4 5 6 7 8 9 10

P804
1 2 3 4 5 6 7 8 9 10 11
NU 5V-PW 5V-PW GND GND GND GND 12V-IN 12V-IN 12V-IN 12V-IN

+12V +12V GND GND +12V +12V GND +12V GND GND

1 2 3 4 5 6 7 8 9 10

40-PWL20C-PWI1XG POWER BOARD

I_17951_001.eps 050808

P5
+5V GND ON/OFF

40-PWL01B-STE1XG STB POWER

I_17951_002.eps 050808

1 2 3

Block Diagrams, Test Point Overview, and Waveforms

Block Diagram MT5335

TCM2.0E LA

6.

20

MT5335
V0.1 DC-DC 12V to 5V RT8110 VCC ON OFF +12V +5V/ Standby+5v SIF 8051 WT6702F 15 KEY 9 POWERON 11 STANDBY 14 IR EEPROM M24C16MN TUNER TDQG4-601A SAW-D9453D VIF SAW-K7270M TD A98 86T POWER SUPPLY CONNECTOR

IF+/IF-

MT5133

PARALLEL TS PARALLEL TS CI CARD PARALLEL TS

I2C

MT8295

MT5335
KEY BOARD 152 KEY 93 IR

205 SCL 206 SDA

132

TV_CVBS SERIAL TS PANEL

FLASH 32Mbit

LV DS

LVDS To TTL 386

TTL

DDR 32Mb x16

62 OSCL1 63OSDA1 73 HDMI_5V 79 RX0_CB 80 RX0_C 81 RX0_0B 82 RXO_0 83 RX0_1B 84RXO_1 85 RX0_2B 86 RX0_2 205 DDC_SCL 204 DDC_SDA

104 R 98 B 102 G 96 VSYNC 97 HSYNC

120 Y_IN 121 Pb_IN 123 Pr_IN 173 YPbPr_L 174 YPbPr_R 176 VGA_R 177 VGA_L

170 SCT_R_IN 171 SCT_L_IN 116 SCT_R 108 SCT_G 114 SCT_B 149 SCT_FS 107 SCT_FB 187 SCT_R_OUT 189 SCT_L_OUT

LVDS Broken line is option for TTL interface panel! PRE AUDIO AMP

201 SPDIF _OUT

129 CVBS 172 R_IN 173 L_IN 126 SY 125 SC

185 HP_R_OUT 186 HP_L_OUT

R/L

CEC COMMAND HDMI SWITCH SI8195

EDID EDID EDID

AUDIO AMP O/P

HDMI1

HDM2

VGA

YPbPr

SCART

SPDIF

AV

HEAD PHONE

I_17950_042.eps 080508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

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21

7. Circuit Diagrams and PWB Layouts

Main Power Supply (20")

MAIN POWER SUPPLY 19 & 20

I_17930_024.eps 220408

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

22

Layout Main Power Supply (20") (Top Side)

I_17930_025.eps 220408

Layout Main Power Supply (20") (Bottom Side)

I_17930_026.eps 220408

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

23

Main Power Supply (26")

A1

MAIN POWER SUPPLY 26

A1

I_17930_027.eps 220408

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

24

Standby Power Supply (26")

A2

STANDBY POWER SUPPLY 26

A2

I_17930_028.eps 220408

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

25

Layout Main Power Supply (26") (Top Side)

I_17930_029.eps 220408

Layout Main Power Supply (26") (Bottom Side)

I_17930_030.eps 220408

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

26

Layout Standby Power Supply (26") (Top Side)

Personal Notes:

I_17930_075.eps 250408

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

27

SSB v1: Tuner

8 7 6 5 4 3 2 1

B01
Z100

TUNER
TUNER_5V MT5133-GPIO-AD TUNER_5V 5 4 GND E 4LVC1G66GV C138 0.1U C137 0.1U VCC
R145 12K

B01
L108 30R AV_5V

ATV-IF-AGC D110 LL4148

ANALOG_IF

NC/RFAGC

NC/GND1

NC/GND2

XTALOUT

ANTPWR

IFOUT2

IFOUT1

IFAGC

GND1

U101

SDA

NC1

SCL

NC

AS

TU

B1

6V3

C2 47U

R124 100R R125 100R

FAT_IN5V-OUT FAT_IN+
R139 6K8

C139 0.1U

11

12

13

14

15

16

17

18

19

20

21

22K

D103 BA982

R121 22K 12K R146

E
R135 R127 R126 C124 22P C125 22P 4K7 100R 100R TUNER_SCL0_5V D101 BA982 1 TUNER_5V TUNER_5V 23 18 13 24 22 21 20 19 17 16 15 14 AFC VPLL SIF2 SIF1 OP2 VP CVBS REF AGND VAGC NC
R99 NC

0.01U C119

TUNER_SDA0_5V
R123 0R

X100

C111

1500P

C115 0.1U

R114 22K

X102 IN/GND OUT1 OUT2 GND IN

C100 1U

R101 330R

C114 0.47U

C112

20P

R147 100K

0.01U C3

Q102 BC847C

4M

R100 680K

C109 0.01U

C110 0.22U

R148 0R RF-AGC L103 120R C102 100U 6V3

R132

RF-AGC R149 NC\0R

R140 6K8 R141

5V-OUT

NC

IF_AGC

C B E

R137 220K

ATV-IF-AGC

5V-OUT L102 120R C113 0.01U BC847C Q100 TUNER_5V

C123 0.01U L104 NC/120

D102 C101 100U 6V3 BA982

C

L100 1UH

10

11

12

NC

R106 NC\6K8

R102 NC\180R

U206 8 1 GND OUT3 R97 7 2 NC/4K7 OUT2 IN1 6 3 OUT1 IN2 5 4 R96 OC EN NC/100R 5V-TUNER-ON/OF NC/TPS2049
R112 33R

R118 NC

TDA9886T

R113 6K8

TAGC

CVBS-OUT

SIOMAD

C122 0.1U C126 NC/0.1U 6V3

CVBS_OUT

B E

R129 75R C121 47P

CVBS0

FMPLL

DGND

DEEM

VIF1

VIF2

AUD

SDA

TOP

OP1

AFD

R120

SCL

C103 NC/100U

U100

75R R130

5V-OUT

R131 0R GND_TUNER 0.01U

SIFP

C
R95 NC/100R AV_5V 5V-TUNER-INPUT

C104 0.01U

R109 2K2

R108

L106 0

IN/GND

OUT1

OUT2

GND

IN

C118 1000P D100 BA592

2

X101

5K6

E Q101 NC\BC847C

C120 1P5

R107 0R

R110 2K2

C127 0.1U

L107 120R

R128 SIF 0R

C131

C B

SIFN C132 0.01U TUNER_SCL0_5V TUNER_SDA0_5V OSCL0

R116 100R R115 100R

R828 10K

0.47U

Q105 2N7002 TUNER_SDA0

C105 1000P

R111 2K2

C128

R138 220R

B
DV33

R117 NC R119

C116 0.01U

R103 NC\1K5

R104 NC\47R

1000P

TUNER_SDA0_5V

R105 NC

TUNER_SCL0 TUNER_SDA0
R94 NC\100R

R93 NC\100R

B
OSDA0

AV_5V

Q103 C124ET

C B E

Q104 2N7002 TUNER_SCL0

L101 0.56UH

5K6

DV33

C106 1000P

TUNER_SCL0_5V

R133 33R

C107 390P

0.01U C108

C117

R829 10K

A
I_17950_021.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

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28

SSB v1: MCU Standby

8 7 6 5 4 3 2 1

B02

MCU STANDBY
5V_KEY
NC R817

5V_KEY 5V_KEY
NC R833 10K R142

B02
+3V3SB_UP R816 33R X800 32K7
OSCI OSCO

D801 LL4148

C821 20P

OIRI POWER_ON L821 +3V3SB 35KEY_5V

R819 3K3

R806 27K

1 600R 2 600R 600R 3 4 5 6 L823 600R 7 8 9 +3V3SB_UP P805 L820 600R CEC

C822 20P

STANDBY

5VSB

DV33 R805 100R

CEC_IRQ

L822

C819 100P

KEY_5335

R842 NC 2N7002/NC Q817

KEY

L811 600R

5V_KEY

R22 0R

R10 0R

E
Q809 OSCL0 2N7002 Q810

C871 1U +3V3SB_UP

OSDA0

C823 0.1U +3V3SB_UP

2N7002

+3V3SB_UP
10K

10K

D
R807

+3V3SB_UP

C876 NC\1000P C875 1000P

D
10K R827

R810

R809 10K

R826

U810
10K
OSCO OSCI

OSCL0_SB OSDA0_SB

1 2

1 2 3 4

R815 4K7

OSCO OSCI VSS NRST PWMI RXD/IRQ3 TXD/IRQ2 HIN WT6702F

VDD AD0 AD3/IR SCL1 SDA1 SCL2 SDA2 VIN

16 15 14 13 12 11 10 9 R824 R820 R823 R825 R814 33R 33R 33R 33R 33R
STANDBY

R822 R830

33R 33R

KEY OIRI_MCU

ISP PORT

3 4
C820 0.1U

HDMI_INT

33R 33R 0R 33R

P802

R813 R834 R835 R812 CEC_IRQ

5 6 7 8

SHORT_PROTECT SW_UPDATE_CTL1 HSYNC

3V3SB_EN VSYNC +3V3SB

C802 1U

OPTION for CEC Stand by Function Q4 BT3904 OIRI_MCU

C B E

R143 10K

OIRI

+3V3SB_UP

B
+3V3SB L809 120R

B
R144 4K7

RT9166 U811 2
OUT GND IN

3
C826 0.1U C872 100U 6V3

GND 5VSB

C809 100U

C825 0.1U

6V3

C824 1U

A A

I_17950_022.eps 070508

Circuit Diagrams and PWB Layouts

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29

SSB v1: DC / DC
8 7 6 5 4 3 2 1

B03
P804

DC-DC
12V/4A 11

+5V AV33 NC R8012

B03
F

10 9 8 7 6 5 4 3 2 5V/2A 1 R46 10K R865 0R Q816 BT3904

C B E

R850 4K7

CONNECTOR
12V_IN
BL_ON/OFF

R851 10K

Back Light circuit

5V_PW
C

NC R8013

R856 4K7

47K

R846 10K

B E

C827 1U

4 5

C B E

BT3904

Q803 BT3904

A04803

1U

R8001 10K

POWER CINCH

R8010 4K7

ON/OFF 12V_IN

C863 NC

3V3SB_EN

L819 200R L818 200R C810 100U 16V

7 P800 C862 0.1U

R8003 0R

R855 4K7

C828 0.1U

5V_PW

L813 30R

R860 5V_KEY 0R

5VSB

BL_DIM

1K R844 R843 4K7

R8

R857 1K
C

2 3

NC R9

1U ON/OFF

R854 0R

1U C854

Q801

R852 4K7

C853 0.1U

L15 200R LD1117S33 U800 5V_OUTSIDE about 1mm GND BOOT PHASE 8 7 6 5
G2 4 S2 3 G1 2 S1 1

LD1117S12 U803
4 4 VIN 3

AV12 R898 47K AV_5V 3K9 R91 R92 2K2 C849 0.1U C807 100U R894 100K D818 LL4148

R8006 10K

C831 0.1U

C859 0.1U C860 0.1U

R849 10K

Q802 BT3904 +5V

R848 100R BL ON/OFF L815 600R +3V3SB R856 IS FOR 26" 19"20"22" NC 1 SELECT L814 600R

5VSB 0.1U C829 Q800

1 S2 2 G2 3 S1 4 G1 8 D2A 7 D2B 6 D1A 5 D1B

AV33 +5V 5VSB NC R845

12V_IN C852

12V

R847 NC LL4148 DIMMING D804

5V_OUTSIDE

C858

R8011 10K 12V L14 200R C800 1000U

5VSB 12V C846 0.1U

4 4
GND/ADJ1

R2 510R Q805 BT3904

OUT 2

SHORT_PROTECT

16V C804 4U7

D816 LL4148 Q807 BT3904

R4 10K

C B

GND/ADJ1

OUT 2

VIN 3

R802 120R

R831 2R7

R832 2R7

C832 0.1U R866 22K

R895 10K

C B

6V3

C848 0.1U

R876 NC

D808 LL4148 1 2 3 4

U807 D13N03LT
D2B 5 D2A 6 D1B 7 D1A 8

+5V L804 200R L805 200R C830 T Z805 3 C841 0.1U C806 100U 6V3 U809 NC/KD1084-33
VIN ADJ/GND OUT

+5V R887 2K2 DV33A C839 0.1U C870 100U R801 330R L802 200R DV33 3K9 R886

D809 LL4148

12V

R5 10K

R896 8K2

DRIVE UGATE FB GND

VCC LGATE RT8110

1K2

NC

C834

R871

0.01U

GND R869 10R

R872

U808

R888 DV33 2K7

D810 LL4148

NC R868

5VSB

C805 1U

U801 LD1117S33
VIN 3

R889 4K7

NC C833

AV33

AV33

R890 2K7

D811 LL4148

D805 LL4148

R858 2K7 CI_VCC

+5V GND

GND 0.1U C837 R891 4K7 C812 47U C818 47U 6V3 6V3

0R R1

GND

C840 0.1U

R897 680R

L800 15UH

C803

6V3

C801 1000U

16V

R893 4K7

U804 LD1117S25
VIN 3

AV25 CI_DV18 0.1U C843 D817 LL4148 D807 LL4148 R863 3K AV25

L816 120R

C842 0.1U

R879

C867 0.1U

U806 MP1411 4 IN NC1 SW EN NC2 GND FB COMP SS 5 BS 2

C864 0.01U DV10 L801 15UH L13 200R 16V C874 4U7 12V

U802 LD1117S
VIN 3

U805 LD1117S50
VIN 3

AV_5V

1K

AV9V R804 6R8 R884 1K C814 47U

R864 6K8

R862 6K8

9 3 C869 0.1U 10

C845 0.1U

7 8 C866 120P NC R874 4K7 C835 0.01U

R882 15K

C865 0.1U

C868 0.01U

D803 SK24

R883 51K

R885 6K2

C844 0.1U

C851

0.1U

R867 10R Q806 BT3904 12V C816 100U 16V

C B E

4U7

0.1U

R870 220R

4 4
GND/ADJ1

OUT 2

R859 4K7

D814 3V9

C
+3V3SB R892 2K7 D812 LL4148 D806 LL4148 R861 3K DDRV

R6 10K

4 4

R7 10K 1

R3 1K C817 330U

GND/ADJ1

OUT 2

C811 47U

6V3

4 4

4 4
GND/ADJ1

GND/ADJ1

OUT 2

OUT 2

R803 5R1

C850 0.1U

C815 100U

6V3

16V

C813 100U

16V

I_17950_023.eps 070508
8 7 6 5 4 3 2 1

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

30

SSB v1: Digital Channel Decoder

8 7 6 5 4 3 2 1

B04

DIGITAL CHANNEL DECODER

FAT_INC513 1000P C568 NC/20P

DV33

DV33

B04
R136 10K

L506 NC

C527 NC

FAT_IN+

C514 1000P

C569 NC/20P R508 0R

R134 10K

TUNER_SCL0 TUNER_SDA0

AV12 AV12 L500 600R

Digital 1.8V Bypass Caps

DVDD12

C510 0.22U

C511 0.22U

R507

0R

DV33

C517 0.1U

C519 0.1U

C516 0.1U

R151 NC/10K

TUNER_SCL TUNER_SDA

R150 NC/1K
MT5131_IF_AGC

MT5133-GPIO-AD
IF_AGC

C512 0.22U

ADVDD33_1 REFTOP VCMEXT REFBOT

AVDD33

DVDD12

1K

R506

E
C506 27P

DVDD33

CLOSE TO MT5133
C509 0.047U

C500 1U

C518 0.1U

C515 0.1U

DV33

Digital 3.3V Bypass Caps

L501 600R

DVDD33

R500 1M

X500 27M

U502

AVDD33_3 REF_TOP VCMEXT REFBOT IN+ INAVDD33_1 AVSS33_1 VDD1.2_3 DGND1.2_1 TUNER_SCL TUNER_SDA

48 47 46 45 44 43 42 41 40 39 38 37

R503

XTALO 1 2 3 4 5 6 7 8 9 10 11 12 AVSS33_3 AVSS33_2 XTALI XTALO AVDD33_2 ALC_IN VDD1.2 DGND1.2 TSDATA7 TSDATA6 TSDATA5 VDD3.3

C508 0.1U

C507 27P

C523 0.1U

C521 0.1U

C520 0.1U

XTALI AVDD33

TS0INDATA7 TS0INDATA6 TS0INDATA5

1 2 3 4

R536 33R

DVDD12

8 7
DVDD33

TSDATA4 TSDATA3 TSDATA2 TSDATA1 TSDATA0 TSERR TSVAL TSSYNC TSCLK VDD3.3_1 DGND3.3 VDD1.2_1

6 5

RF_AGC IF_AGC VDD3.3_3 GPIO0 /RESET XTAL_SEL1 XTAL_SEL0 DGND3.3_1 VDD3.3_2 VDD1.2_2 HOST_SDA HOST_SCL

36 35 34 33 32 31 30 29 28 27 26 25

R505 100R R504 10K

DVDD33 DVDD12 SIF_SDA SIF_SCL

MT5133_RESET

C501 1U

C522 0.1U

NC

D
R5010R R502 0R L502 600R OSDA0 OSCL0 AV33

Analog 3.3V Bypass Caps

AVDD33

C525 0.1U

TS0INDATA4 TS0INDATA3

1 2 3 4

8 7
DVDD33 DVDD12

TS0INDATA2 TS0INDATA1

6 5 33R 33R 33R 33R R542 R543 R544 L510 120R

C502 1U

C526 0.1U

R535 33R

MT5133

13 14 15 16 17 18 19 20 21 22 23 24

C
AV33 ADVDD33_1

TS0INDATA0

TS0INVALID
TS0INSYNC TS0INCLK

L503 600R

C524 0.1U

R545 C505 120P/NC

C504 120P/NC

C503 1U

A A

I_17950_024.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

31

SSB v1: DVBT/ CI Decoder

8 7 6 5 4 3 2 1

B05
F
R517 NC\10K

DVBT-CI-DECODER
CLOSE TO CI CONNECTOR
CI_VCC CI_VCC CI_VCC CI_VCC CI_VCC DV33 CI_DV33 CI_DV18 +5V

B05
CLOSE TO CI CONNECTOR
L509 30R
S D

F
CI_VCC CI_VPP

R525 NC

R522 10K

R519 NC\10K

R521 10K

L508 600R C556 47U

LD1117S18

L507 30R

3 VIN

2 OUT

1GND/ADJ

C557 47U

C546 0.1U

R528 10K/NC

CI_INPACK#

CI_IOIS16#

CI_IREQ#

CI_VS2#

CI_WAIT#

Q501 C550 100U NC\A03401A R527 47K/NC Q502 C547 0.1U/NC R526 100K/NC NC\0.1U C558 6V3

6V3

6V3

+5V R516 10K R518 10K

+5V

+5V

U500

CI_CD1#

CI_VS1#

CI_CD2#

3.3V: 0.2W (60mA) 1.8V: 0.2W (100mA)

4 4

R520 10K

R523 10K

R524 10K

CI_VCC_EN

B E

NC\C124ET

C559 0.1U

CI_DV33 CI_DV33 CI_AV33

C560 0.1U

CI_DV18

CI_DV18

CI_AV18

L504 600R C533 0.1U C532 0.1U C531 0.1U C1 1U

CLOSE TO MT8295
C535 0.1U C534 0.1U C538 0.1U C537 0.1U C539 0.1U C540 0.1U C554 1U C536 0.1U C541 0.1U C552 1U

L505 600R

C544 0.1U

C545 0.1U

C542 0.1U

C551 1U

C543 0.1U

CI_CE1##

R549 100R

CI_CE1#

CI_DV33

CLOSE TO MT8295
C530 10P R510 4K7

CI_GPIO1

R511 4K7 CI_OE## R550 100R

C562 10P

CI_OE#

TS_CKO

CI_GPIO0

C563 10P

DV33

R540

CLOSE TO MT8295
TS_VALIDO

TS_SYNCO

TS_DATAO

R548

C528 27P

C529 27P NC

CI_WE## 10K R512

R551 100R

CI_WE#

33R

0R R547 R541 33R X501 27M

R513

MTK_IC_RESET

P500 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

R539

R538

120R

CLOSE TO MT8295
CI_D3 CI_D4 CI_D5 CI_D6 CI_D7 CI_CE1# CI_A10 CI_OE# CI_A11 CI_A9 CI_A8 CI_A13 CI_A14 CI_WE# CI_IREQ# CI_CD1# CI_OUTDATA3 CI_OUTDATA4 CI_OUTDATA5 CI_OUTDATA6 CI_OUTDATA7 CI_CE2# CI_VS1# CI_IORD# CI_IOWR# CI_INSYNC CI_INDATA0 CI_INDATA1 CI_INDATA2 CI_INDATA3

33R

33R

4K7

L511 5V-TUNER-ON/OF 5V-TUNER-INPUT

CI_IORD##

R552 100R

C564 10P

R509

1M

CI_IORD#

4K7 4K7

R546 R514

CI_TS_SYNCO CI_TS_DATAO CI_TS_CKO CI_TS_VALIDO CI_DV33

CI_PDD3 CI_PDD4 CI_PDD5 CI_POWE# GND CI_AV18 GND CI_XTALI CI_XTALO CI_AV33 CI_RESET# CI_OEB CI_ALE GND CI_CLE

Z501 Z502

RESET_N CI_GPIO14

CI_INT CI_POCE1# CI_RB CI_DV33

C565 10P

OPWM1 OPWM2 CI_DV33

128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97

GPIO14 GPIO13 GND33_5 TS_SYNCO TS_DATAO TS_CKO TS_VALIDO VCC33_5 GPIO12 GPIO11 GPIO10 CI_OEB CI_DATA0 CI_DATA1 CI_INT AVSS18_PLL AVDD18_PLL AVSS33_XTAL XTALI XTALO AVDD33_XTAL RESETB CI_RB CI_CLE GND33_4 CI_ALE CI_DATA3 CI_DATA4 CI_DATA5 CI_DATA6 CI_DATA7 VCC33_4

GND

C
CI_VCC CI_VPP CI_IOWR## R553 100R CI_IOWR#

CI_VCC CI_VPP

HDMIED_WP HPDIN
CI_DV33 TS0INCLK TS0INSYNC TS0INVALID TS0INDATA0 GND TS0INDATA1 TS0INDATA2 TS0INDATA3 TS0INDATA4 CI_DV18 TS0INDATA5 TS0INDATA6 TS0INDATA7

C561 10P

CI_VS2#
CI_RESET CI_WAIT# CI_REG# CI_OUTVALID CI_OUTSYNC CI_OUTDATA0 CI_OUTDATA1 CI_OUTDATA2 CI_CD2#

NC\0R R532

CI_INPACK#

CI_VS2#

R533 100R

C566 10P

CI_GPIO0 CI_GPIO1

HDMI_SEL YPBPR_SW_IN PWRDN_EN

GND CI_CD1# CI_D3 CI_OUTDATA3 CI_D4 CI_OUTDATA4 CI_D5 CI_OUTDATA5 CI_D6 CI_OUTDATA6 CI_D7

CI_DV33 CI_OUTDATA7 CI_CE1## CI_CE2# CI_A10 CI_VS1# CI_OE## CI_IORD## CI_A11 CI_IOWR## GND CI_A9 CI_INSYNC CI_A8 CI_INDATA0 CI_A13 CI_INDATA1 CI_A14 CI_INDATA2 CI_DV33 CI_WE## CI_INDATA3 CI_IREQ# CI_INDATA4 CI_INVALID CI_INDATA5

MT8295

GND CI_INDATA6 CI_A12 CI_INDATA7 CI_A7

33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

VCC33_1 D15 CE1# CE2# A10 VS1# OE# IORD# A11 IOWR# GND33_1 A9 A17 A8 A18 A13 A19 A14 A20 VCC33_2 WE# A21 READY A22 A16 A23 A15 GND33_3 A24 A12 A25 A7

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

GPIO0 GPIO1 GPIO2 GPIO3 VCC33 T0CLK_I_ T0SYNC_I_ T0VALID_I_ T0DATA0_I_ GND33 T0DATA1_I_ T0DATA2_I_ T0DATA3_I_ T0DATA4_I_ VCC18 T0DATA5_I_ T0DATA6_I_ T0DATA7_I_ GPIO4 GPIO5 GPIO6 GND18 CD1# D3 D11 D4 D12 D5 D13 D6 D14 D7

U501

CI_WEB CI_DATA2 CI_CEB GPIO9 GPIO8 GPIO7 GND18_1 WP CD2# D2 D10 D1 D9 D0 VCC18_1 D8 A0 BVD1 A1 BVD2 GND33_2 A2 REG# A3 INPACK# A4 WAIT# A5 VCC33_3 RESET A6 VS2#

96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65

CI_PDD2 CI_PDD6 CI_PDD7 CI_VCC_EN CI_VPP33_EN CI_VPP5_EN GND CI_IOIS16# CI_CD2# CI_D2 CI_OUTDATA2 CI_D1 CI_OUTDATA1 CI_D0 CI_DV18 CI_OUTDATA0 CI_A0 CI_OUTSYNC CI_A1 CI_OUTVALID GND CI_A2 CI_REG# CI_A3 CI_INPACK# CI_A4 CI_WAIT# CI_A5 CI_DV33 CI_RESET CI_A6 CI_OUTCLK

CI_INVALID CI_INCLK CI_A12 CI_A7 CI_A6 CI_A5 CI_A4 CI_A3 CI_A2 CI_A1 CI_A0 CI_D0 CI_D1 CI_D2 CI_IOIS16#

CI_INDATA4 CI_INDATA5 CI_INDATA6 CI_INDATA7

CI_OUTCLK

CLOSE TO MT8295

C567 10P

NC/0R R531

A
CI_INCLK

100R R515

I_17950_025.eps 070508
8 7 6 5 4 3 2 1

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

32

SSB v1: Audio Amplifier

B06

AUDIO AMPLIFIER
P600 1 2 3 4 Y600

B06
1 2

L+ R+ U600 PGND TDA7266

8 PW_GND

9 S_GND

MUTE

AL1O
SPEAK-OUTL

R622 NC R621 0R

LR620 2K2

L_OUT C612 1U

13 VCC2

12 IN2

15 OUT2+

1 OUT1+

OUT1-

14 OUT2-

6 MUTE

3 VCC1

7 STBY

10 NC2

11 NC3

5 NC1

4 IN1

SS

R_OUT GND

R-

C610 4700P

R624 100K

C611 0.1U C608 1U PGND

AR1O
SPEAK-OUTR

R617 NC

GND 2K2 R618 0R R619

R600 0R

R623 100K

C609 4700P

Near the P502 12V R603 2R7 R648 2R7 GND R602 0R PGND

GND

C607 1000U

L601 200R

C615 0.1U

L600 200R

R601 0R Near the P502

16V

GND PGND

PGND

BT3906

12V R643 220R

Q607
C B

R640 4K7 12V

L602 600R

R627 10K

R639 4K7

L603 600R SS

HP_L EAR

R656 100R

0R/NC

R636 1 R637 GND HP_R 2 3 9 8 7

C614 4700P/NC
6 5 4

R628 10K R632 10K

P601

0R/NC

B E

R629 100R

LL4148 D600

HW_MUTE

R644 10K

BT3904 Q602 C R647 10K

GND

MUTE

R626 100R

Q608 GND BT3906

R659 100R

R641 4K7

GND

GND 16V 100U C616

R+ R_OUT

L+ GND L_OUT C617 16V 100U

R642 1K

R625 AMP_MUTE 4K7

D601 LL4148

R630 10K

GND GND
I_17950_026.eps 070508

C613 4700P/NC

C602 100U

C601 3300P

C600 3300P

16V

R631 NC

16V C606 22U

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

33

SSB v1: MT5335 Video Processor

8 7 6 5 4 3 2 1

B07

MT5335 VIDEO PROCESSOR

DV33

B07
DV33 R209 1K C201 220U R211 NC

F
OSDA0 OSCL0 204 205 63 62 191 202 203 146 143 144 147 145 152 151 150 149 148 88 87 71 72

U203 OSDA0 OSCL0 OSDA1 OSCL1 OPWM0 OPWM1 OPWM2 VCXO XTALO XTALI AVDD33_SRV AVDD33_XTAL ADIN4 ADIN3 ADIN2 ADIN1 ADIN0 AVDD33_REG C_XREG ORESET_ OPWRSB

16V

R206 1K

OSDA1 OSCL1 BL_DIM OPWM1 MTK_IC_RESET OPWM2

OXTALO OXTALI AVCC_SRV AVDD33_XTAL KEY

R200 180K

KEY_5335

E
R44 10K

PANEL_SLT SCART_FS_IN
PWRDET AVDD33_REG C_XREG ORESET#

R210 47K

GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13

D200 LL4148

207 208 209 59 60 210 211 212 214 215 216

CI_PDD3 CI_PDD4 CI_PDD5 CI_PDD6 CI_PDD7 CI_POWE# CI_OEB CI_ALE CI_CLE MT5133_RESET POWER_ON

ORESET#

OXTALI

X200 60M

TXC

OXTALO

L214 0.82UH

R208 220R
PWRDET

C B E

Q202 BT3904 C221 10P C222 10P C223 1000P

SW_UPDATE_CTL

OPCTRL0 OPCTRL1 OPCTRL2 OPCTRL3 OPCTRL4 OPCTRL5

92 91 76 75 90 89

E
LVDSVDD_EN CI_INT AMP_MUTE BL_ON/OFF EDID_PRT DV33
Adjust the power on timing

C_XREG

R207 10R

C203 4U7

DV33 R202 10K R203 10K MT5335PKU DV33

R201 4K7 R205 10K

R204 10K

D
HDMI_INT
E

D
CEC

DV33 DV33 Z959 T DV33 R216 R215 L210 600R

AVCC_SRV

R214 10K

Q201 BT3904

C
R38 10K

C204 1U

Z958 T 4K7 4K7 R217 33R

OSCL0

C224 0.1U

B C

Q200 BT3904 8 7 6 5 T Z957 VCC WC SCL SDA

C

U205 E0/NC 1 DV33 Z960 T L211 600R 2 E1/NC 3 E2/NC 4 VSS M24C16MN
IIC ADDRESS "A0"

AVDD33_XTAL

R36 10K

Q206 OSDA0 C124ET C247 0.1U T Z956

C B E

EDID_PRT

Q1 BT3904

R37 NC

R40 NC\0R

C206 1U

R39 4K7

C225 0.1U

DV33 L212 600R

AVDD33_REG

C226 0.1U

C205 1U

I_17950_027.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

34

SSB v1: MT5335 Interface USB/HDMI

B08

MT5335 INTERFACE - USB, HDMI

AV12
U203 USB_VRT USB_DUSB_D+ AVDD33_USB AVDD12_USB 68 65 66 67 69 157 158 USB_VRT USB_DM USB_DP AVDD33_USB AVDD12_USB TP0 TN0 AVDD12_KADCPLL AVDD12_TVDPLL AVDD12_KHDMIPLL AVDD12_KAPLL AVDD12_SYSPLL AVDD12_KDMPLL AVDD12_DTDPLL 160 155 153 161 159 156 154 AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL

B08
AV12 L215 600R
AVDD12_PLL

C207 1U

C228 1U

C249 0.01U

C250 0.1U

AV33
USB_VRT

R218 5K1

MT5335PKU AV33 L216 600R GND

AVDD33_USB

C208 1U

GND AV12 AV12 L217 600R

C251 0.1U

AVDD12_USB

C210 1U

C252 0.1U

GND

AV25 AV25
U203 163 165

L218 600R

AVDD25_SADC

GND
AVDD25_SADC AVSS25_SADC

TS_VALIDO TS_CKO

195 194

TUNER_DATA TUNER_CLK

RF_AGC IF_AGC

193 192

TS_DATAO TS_SYNCO

GND AV33 HDMI_5V HDMI_5V AV33

1U

C211 1U

SIFP SIFN

AVDD25_SADC C229 C253 0.01U C254 0.1U

164 166 167

SIFP SIFN AF

L219 600R

MT5335PKU
U203 RX0_CB RX0_C RX0_0B RX0_0 RX0_1B RX0_1 RX0_2B RX0_2 79 80 81 82 83 84 85 86 77 73

AVDD33_H

GND 1U AV12 AV12 C212 1U C230 C255 0.1U

RX0_CB RX0_C RX0_0B RX0_0 RX0_1B RX0_1 RX0_2B RX0_2

EXT_RES OPWR0_5V

AVDD33_HDMI AVDD12_CVCC

78 74

AVDD33_H AVDD12_CVCC

L220 600R

AVDD12_CVCC

GND C248 0.1U

MT5335PKU

C213 1U

GND

I_17950_028.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

35

SSB v1: Interface LVDS TTL

B09

INTERFACE LVDS TTL

A0N A0P A1N A1P A2N A2P CK1N CK1P A3N A3P A4N A4P A5N A5P A6N A6P CK2N CK2P A7N A7P 244 243 242 241 240 239 237 236 235 234 233 232 231 230 228 227 226 225 224 223 222 221

U203

DV33
A0N A0P A2N A2P CK1N CK1P A3N A3P A4N A4P A5N A5P A6N A6P A7N A7P CK2N CK2P A8N A8P A9N A9P AVDD33_LVDSA AVDD33_LVDSB AVDD33_LVDSC AVDD33_VPLL 220 229 238 217 AVDD33_LVDS AVDD33_LVDS AVDD33_LVDS AVDD33_VPLL

B09

DV33

R224 1K R230 6K8 2 4 6 PANEL_SLT R232 NC P204 R226 390R R229 750R R231 100K R228 120R R227 390R C261 0.1U 1 3 5 R225 390R

TP2 TN2

218 219

CI_POCE1#

Footprint is ACM-2012
A0N A0P L200 EXC24C
1 2 4 3

MT5335PKU AN00 AP00 C320 C321 10P

5V_OUTSIDE +5V GND NC R25 NC R26 R26 FOR 19" 22" PANEL R25 FOR OTHER +5V SUPPLY PANEL L232 NC/30R P209 GND 5 3 1 6 4 2 R221 100K L233 NC/30R GND
LVDSVDD_EN
B

10P GND P202 10P GND 10P 10P GND 10P 10P GND 10P AV33 10P AV33 R223 0R GND GND AP00 AP11 AP22 CLK11+ AP33 0R R213 0R R212 PANEL_CTL1 PANEL_CTL2 AP44 AP55 AP66 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 40 38 36 34 32 30 28 26 24 22 AN00 AN11 AN22 CLK11AN33 12V

A1N A1P

L201 EXC24C
1 2 4 3

AN11 AP11

C322 C323

10P

T Z210

T Z212 Q203
1 S1 2 S2 3 S3 4 G 8 D1 7 D2 6 D3 5 D4

12V 35KEY_5V

LVDS OUT

A2N A2P

L202 EXC24C
1 2 4 3

VDD_PANEL

AN22 AP22

C324 C325

C202 220U

CK1N CK1P

L203 EXC24C
1 2 4 3

0.1U

CLK11-C326 CLK11+C327

C209 1U

16V

C258

R219 10K

AO4459 C259 0.1U

A3N A3P

L204 EXC24C
1 2 4

AN33 C328

C329 3 AP33 L205 EXC24C AN44 AP44

R222 0R

GND
C

Q204 C143ZT

A4N A4P

1 2

4 3

C330 GND 10P C331 10P GND 10P 10P GND 10P 10P GND 10P 10P GND 10P 10P GND

20 18 16 14 12 10

AN44 AN55 AN66 CLK22AN77 AV33 AV33 L221 600R

AVDD33_LVDS

A5N A5P

L206 EXC24C
1 2 4 3

AN55 AP55

C332 C333

CLK22+ AP77

GND

A6N A6P

L207 EXC24C
1 2 4 3

AN66 AP66

C334 C335

7 5 3

8 6

CK2N CK2P

L208 EXC24C
1 2 4 3

CLK22-C336 CLK22+C337

2 AV33

1U

C214 1U

C231

C256 0.1U

A7N A7P

L209 EXC24C
1 2 4 3

AN77 AP77

C338 C339

GND

VDD_PANEL C260

AV33

L222 600R

AVDD33_VPLL

GND

1U GND

C232 1U

0.1U

C220

C257 0.1U

GND

I_17950_029.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

36

SSB v1: Flash Memory

5 4 3 2 1

B10

FLASH MEMORY
DV33
U203 POCE0# POOE# PDD0 PDD1 252 251 250 249 95 94 93 U0RX U0TX OIRI_MT5335

B10
DV33 L223 600R 1 C240 1U 2 3 4 GND R289 10K 5 6 7 8

POCE0_ POOE_ PDD0 PDD1

U0RX U0TX OIRI

U202 8 7 6 5 HOLD# VCC NC PO2 PO1 PO0 CS# SO SCLK SI PO6 PO5 PO4 PO3 GND WP#/ACC MX25L3205 JTCK GND 10 JTDO R239 33R 12 14 16 JTAG_DBGRQ C007 0.1U 18 JTAG_DBGACK 20 R236 10K R237 10K R238 10K P203 17 19
C

16 15 14 13 12

POOE# PDD1 R270 10K DV33 R235 1K

CI_RB CI_PDD2

245 248

PARB_ PDD2

JTMS JTRST_ JTCK JTDO JTDI

253 1 256 255 254

JTMS JTRST# JTCK JTDO JTDI

R246 4K7

11 10 9

TVTREF#1 2 JTRST# 4 JTDI 6 JTMS 8 5 7 9 11 13 15 3 1

POCE0# MT5335PKU +5V PDD0

R245 0R

FRESET#

Q3 BT3904 OIRI_MT5335
C

C B E

R90 10K

+5V OIRI C006 100U

6V3

R89 4K7

GND AV33 USB_DUSB_D+ 1 1 R233 10K 0R 0R R2011 R2012 1 2 3 R234 10K R87 EZJZ1V270RA R88 EZJZ1V270RA 4

GND

GND DV33 P200

U0TX

1 2

C262 0.1U

C234 1U

RS-232
GND
B

GND P201 GND

GND DV10

C235 1U

C263 0.1U

C264 0.1U

U0RX

C265 0.1U

C266 0.1U

C267 0.1U

C270 0.1U

C269 0.1U

C268 0.1U

C272 0.1U

DV10 DDRV_IC
U203 14 48 57 58 61 70 162 213 206 246 10 12 16 18 27 30 52 54 55 56 64 197 247 257

R244 4K7

AOBCK AOLRCK

VCCK VCCK1 VCCK2 VCCK3 VCCK4 DVDD10 DVDD10_1 VCCK6 VCCK5 VCCK7

VCC2IO VCC2IO1 VCC2IO2 VCC2IO3 VCC2IO4 VCC2IO5 VCC2IO6 VCC2IO7 VCC2IO8 VCC2IO9 VCC3IO_3_2 VCC3IO_3_1 VCC3IO_3 E-PAD

GND

DDRV_IC GND

C279 0.1U

C278 0.1U

C277 0.1U

C276 0.1U

C275 0.1U

C274 0.1U

DV33 NORMAL MODE ICE MODE 0 0 0 0 0 1

C273 0.1U

C238 1U

C239 1U

Trap MODE

OPWM2

AOBLK

AOLRCK

C271 0.1U

C237 1U

C236 1U

2 DV33

2
OPWM2

R240 4K7 R241 4K7 R242 NC\4K7

GND TRAP MODE GND CORE RESET 1 US 0 1 OPCTRL5 OPCTRL4

MT5335PKU

I_17950_030.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

37

SSB v1: SDRAM

B11
RDQS0 RDQM0 RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQS1 RDQM1 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 MEM_VREF RCS# 11 13 9 8 7 6 5 4 3 2 17 15 19 20 21 22 23 24 25 26 53 46

SDRAM
U204
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 14 17 19 25 43 50 53 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC NC1 NC2 NC3 NC4 NC5 NC6 VDD VDD1 VDD2 VDDQ VDDQ1 VDDQ2 VDDQ3 VDDQ4 VSS VSS2 VSS1 VSSQ1 VSSQ2 VSSQ VSSQ3 VSSQ4 VREF 49

B11
MEM_VREF
MEM_ADDR0 MEM_ADDR1 MEM_ADDR2 MEM_ADDR3 MEM_ADDR4 MEM_ADDR5 MEM_ADDR6 MEM_ADDR7 MEM_ADDR8 MEM_ADDR9 MEM_ADDR10 MEM_ADDR11 MEM_ADDR12 47 36 40 43 37 44 38 42 35 45 39 41 32 31 33 34 51 49 50 RA0 RA7 RWE# RBA0 RA6 RBA1 RA5 RRAS# RA8 RA10 RA4 RCAS# RA12 RCKE RA11 RA9 RA3 RA1 RA2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 29 30 31 32 35 36 37 38 39 40 28 41 42

U203

+1V3D

RDQS0 RDQM0 RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQS1 RDQM1 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 RVREF0 RCS_

RA0 RA7 RWE_ RBA0 RA6 RBA1 RA5 RRAS_ RA8 RA10 RA4 RCAS_ RA12 RCKE RA11 RA9 RA3 RA1 RA2

RDQ0 RDQ1 RDQ2 RDQ3

1 2 3 4

R271 47R

8 7 6 5

MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3

1 2 3 4

R287 75R

8 7 6 5

MEM_ADDR13

DDRV_IC

CLK CLK CKE

45 46 44

MEM_CLK0 MEM_CLK0# MEM_CLKEN MEM_CS# MEM_RAS# MEM_CAS# MEM_WE# MEM_DQS0 MEM_DQS1 MEM_DQM0 MEM_DQM1 MEM_BA0 MEM_BA1

RDQ4 RDQ5

1 2 3 4

R272 47R

8 7 6 5

MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7

1 2 3 4

R286 75R

8 7 6 5

RCLK0_ RCLK0

28 29

RCLK0# RCLK0

CS RAS CAS WE

24 23 22 21

RDQ6 RDQ7

LDQS UDQS

16 51

RDQS0 RDQM0

MT5335PKU

LDM UDM

20 47

RDQM1 RDQS1

R248 47R R249 47R R250 47R R251 47R

MEM_DQS0 MEM_DQM0 MEM_DQM1 MEM_DQS1

R254 75R R255 75R R256 75R R257 75R

MEM_ADDR12 MEM_ADDR11 MEM_ADDR9 MEM_ADDR8

1 2 3 4

R275 47R

BA0 BA1

26 27

8 7 6 5

RA12 RA11 RA9 RA8 GND

32M*16DDR

RDQ11 RDQ10 RDQ9 RDQ8

1 2 3 4

R273 47R

8 7 6 5

MEM_DQ11 MEM_DQ10 MEM_DQ9 MEM_DQ8

1 2 3 4

R285 75R

8 7 6 5

MEM_ADDR7 MEM_ADDR6 MEM_ADDR5 MEM_ADDR4

1 2 3 4

R276 47R

8 7 6 5

RA7 RA6 RA5 RA4 RCLK0 R259 22R MEM_CLK0 RCKE R258 22R MEM_CLKEN

+5V L224 600R R265 0R U200 8 7 0R R264 0R R266 6 5

R261 100R

DDRV R268 100K MEM_VREF RDQ15 L225 600R L226 600R R267
C314 16V 220U R269 1K C306 0.1U C305 0.1U C304 0.1U

NC3 NC2

VIN GND

1 2 3 4

1 2 3 4

R274 47R

8 7 6 5

MEM_DQ15 MEM_DQ14 MEM_DQ13 MEM_DQ12

1 2 3 4

R288 75R

8 7 6 5

RDQ14 RDQ13 RDQ12

VCNTL REFEN NC1 47U 6V3 C217 VOUT RT9199

MEM_WE# MEM_CAS# MEM_RAS#

1 2 3 4

R277 47R

8 7 6 5

RWE# RCAS# RRAS# RCLK0# R260 22R

100K

MEM_CLK0#

GND GND GND

MEM_CS# MEM_BA0 MEM_BA1 MEM_ADDR10

1 2 3 4

R278 47R

+1V3D 8 7 6 5 RCS# RBA0 RBA1 RA10 +1V3D

MEM_ADDR0 MEM_ADDR1 MEM_ADDR2 MEM_ADDR3

1 2 3 4

R279 47R

8 7 6 5

RA0 RA1 RA2 RA3 MEM_CS# MEM_RAS# MEM_CAS# MEM_WE# 1 2 3 4

R280 75R

8 7 6 5

DDRV

DDRV_IC

MEM_ADDR10 MEM_BA1

1 2 3 4

R281 75R

8 7 6 5

L213 600R
C315 100U 6V3 C349 220U

MEM_BA0

C284 0.1U

C285 0.1U

C287 0.1U

C280 0.1U

C281 0.1U

C282 0.1U

C283 0.1U

C286 0.1U

16V

C349 IS CLOSE TO PIN33 OF DDR

MEM_ADDR7 +5V U201 LD1117S

VIN 3

1 2 3 4

R282 75R

8 7 6 5

DDRV
4 4
GND/ADJ1

GND MEM_VREF +1V3D

MEM_ADDR6 MEM_ADDR5 MEM_ADDR4

R262 110R

C302 0.1U

C215 4U7

OUT 2

MEM_CLKEN

R252 75R R283 75R

C200 100U

C303 0.1U

C300 0.1U

C301 0.1U

C216 1U

C299 0.1U

C298 0.1U

C296 0.1U

C297 0.1U

R263 120R

C291 0.1U

C288 0.1U

C295 0.1U

C294 0.1U

C292 0.1U

C316 1U

C293 0.1U

C290 0.1U

C289 0.1U

6V3

MEM_ADDR12 MEM_ADDR11 MEM_ADDR9 MEM_ADDR8

1 2 3 4

8 7 6 5

GND

GND +1V3D GND GND

MEM_ADDR13

R253 75R R284 75R

1.25 x (1+120/110) = 2.6V

MEM_ADDR3 MEM_ADDR2 MEM_ADDR1 MEM_ADDR0

1 2 3 4

8 7 6 5

GND

I_17950_031.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

38

SSB v1: MT5335 Interface VGA

A

B12

MT5335 INTERFACE - VGA

U203 VGA_L VGA_R YPBPR_L YPBPR_R AIN2_L AIN2_R SCT_L SCT_R AVDD33_AADC GND VIMD_AADC REFP_AADC GND 177 176 175 174 173 172 171 170 169 181 179 180 178 201 198 199 200 196 186 185 189 187 190 182 188 184 183 168

B12
ASPDIF AOMCLK AOLRCK AOBCK AOSDATA0 AL1 AR1 AL2 AR2 AVDD33_KADAC0 AVDD33_KADAC1 AVSS33_KADAC0 AVSS33_KADAC1 ADAC_VCM AVDD33_DIG

AIN0_L AIN0_R AIN1_L AIN1_R AIN2_L AIN2_R AIN3_L AIN3_R AVDD33_AADC AVSS33_AADC VMID_AADC REFP_AADC REFN_AADC

ASPDIF
AOMCLK AOLRCK A0SDATA0

L234 600R

AOBCK

AL1O
AR1O AL2O AR2O AVDD33_ADAC0 AVDD33_ADAC1 GND GND ADAC_VCM AVDD33_DIG

MT5335PKU

AV33 AV33
AV33 ADAC_VCM

L227 600R

AVDD33_AADC AV33

L231 600R

AVDD33_ADAC1

C311 0.1U

C307 0.1U

C241 1U

GND

C245 1U

C246 1U

C313 0.1U

C219 4U7

GND

GND AV33
AV33

GND GND AV33 L228 600R

REFP_AADC AV33

GND

GND L230 600R

VIMD_AADC

AVDD33_DIG

C308 0.1U

C242 1U

C244 1U

C310 0.1U

C218 4U7

C312 0.1U

GND

GND

AV33
AV33

GND L229 600R

GND

GND

GND

AVDD33_ADAC0

C243 1U

GND

C309 0.1U
GND

I_17950_032.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

39

SSB v1: D/A Converter

A

B13 DIGITAL-ANALOG-CONVERTER
R906 33K
C928 100P

B13

AL1O

C900 1U

R901 470R

R904 10K

R907 5K1

C902 47U 6V3

R908 10R

SPEAK-OUTL

OPAVREF

R900 100K

C925 2200P

C929 NC

GND
RC4558

VCC-

1IN+

1IN-

1OUT

U1

AV9V

GND

GND

GND GND

VCC+

2OUT

L16 600R

AR1O

C901 1U

R903 470R

R905 10K

C930 NC

OPAVREF

R910 5K1
C927 100P

C903 47U GND 6V3

C912 1U

2IN+ 5

2IN6

R913 10R

SPEAK-OUTR

R902 100K

GND

C926 2200P

R909 33K

GND

DAC
DV33DV33 DV33 R9020 10K U907 AV9V R914 10K OPAVREF R9019 47K AOLRCK A0SDATA0 AOBCK 33R R9027 1 LRCLK DIN MCLK 14 13
10K R9023 10K R9024 R9021 10K 10K/NC

R9030 33R AOMCLK

33R R9028 2 33R R9029 3 4

OPAVREF

FORMAT

BCLK DEEMPH ENABLE DVDD VMID ROUT AGND DGND LOUT AVDD

12 11 10 9 8 DACVL

R915 10K

C911 1U

C910 1U

5
C9015 1U

C9014 0.1U

C9012 0.1U

6 C9013 0.1U 7

R9022

DACVL

GND

GND

GND

1U C9017
ADCVA R9025 NC/33K

R9017 0

L900 600R

SCT1_AUL_OUT

WM8501 C9018 0.1U

C9016 1U
R9026 NC/33K

R9018 0

L901 600R

C913 1000P

GND SCT1_AUR_OUT

+5V L930 30R

ADCVA ADCVA

DV33 L931 30R

C9009 1U

DACVL

C9008 1U

C9010 0.1U

C9011 1U

C914 1000P

GND

I_17950_033.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

40

SSB v1: HDMI Switch

B14

HDMI SWITCH
GND DV18-HDMI 2 L9 600R DV33

B14
D3V3L4 R21 4K7

D108

AV18-HDMI GND C43 0.1U C38 C42 0.1U

P901 RX2+ GND1 RX2RX1+ GND2 RX1RX0+ GND3 RX0RXC+ GND4 RXCNC1 NC2 DDCCLK DDCDA GND5 VCC HPD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 +5V_HDMI1 CEC-IN R42 R41 NC\0R NC\0R HDMI1_SCL HDMI1_SDA
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 AGND7 RXC2+ RXC2AVCC18D HPD2 AVCC33C CEC-A CEC-D RPWR1 DSCL1 DSDA1 AVDD18B R1X2+ R1X2AGND6 R1X1+ R1X1AVCC33B R1X0+ R1X0-

C39 1U

0.1U

DV33-HDMI

GND R13 4K7 R59 4K7

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

R14 4K7

R15 4K7

R16 NC\4K7 R17 R18 R19 100R 100R 100R R20 HPDIN 100R OSDA1 OSCL1 HDMI_5V

D105 D5V0S1

D106 D5V0S1

C133 10P

C134 10P

C135 10P C23 1U

DV33

EZJZ1V270RA

AGND5 R1XC+ R1XCAVCC18C HPD1 I2CSEL/INT DGND1 DVCC18A RPWR0 DSCL0 DSDA0 AVDD18A R0X2+ R0X2AGND4 R0X1+ R0X1AVCC33A R0X0+ R0X0-

GND R32 NC\4K7 R33 100R RESET_N GND

GND

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

CEC

DV33

R30 NC\4K7

R34 GND R35

NC\100R NC\100R

CI_DV18 OSDA0 OSCL0 L11 600R

AV18-HDMI

CI_DV18

DV18-HDMI

L10 600R

C11 0.1U

C19 1U

C20 0.1U

C21 0.1U

C12 0.1U

C13 0.1U

C14 0.1U

C15 0.1U

C16 0.1U

P903 RX2+ GND1 RX2RX1+ GND2 RX1RX0+ GND3 RX0RXC+ GND4 RXCNC1 NC2 DDCCLK DDCDA GND5 VCC HPD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 +5V_HDMI0 R58 4K7 HDMI0_SCL HDMI0_SDA

DV33

GND R52 4K7 R54 4K7 R55 4K7 Q2 BT3904

C B E

GND R53 100R HDMI_SEL

+5V_HDMI1 +5V_HDMI0

C17 0.1U

GND U905 A0 2 1 C40 0.1U 8 VCC 7 A1 WP 3 6 A2 SCL 4 5 GND SDA AT24C02 GND GND

T Z908 U906 R50 47K R56 4K7 R49 47K A0 A1 2 1 C41 0.1U 8 VCC 7 WP 3 6 A2 SCL 4 5 GND SDA AT24C02 GND

T Z903 R57 4K7 R47 47K R48 47K

HDMI1_SCL HDMI1_SDA T Z901 T Z902

HDMI0_SCL HDMI0_SDA T Z906 T Z904 T Z905

T Z907

C22 0.1U

4K7 R51

I_17950_034.eps 070508

C136 10P

R72

D104 D5V0S1

D107 D5V0S1

AGND9 TPWR/I2CADDR TSCL TSDA HPDIN RSVDL DGND2 DVCC18B RPWR2 DSCL2 DSDA2 AVDD18C R2X2+ R2X2AGND8 R2X1+ R2X1AVCC33D R2X0+ R2X0-

R12 NC\4K7

R11 4K7

U904 SII9185

TX2+ TX2AGND1 TX1+ TX1AVCC18A TX0+ TX0AGND2 TXC+ TXCEXTSWING RESET# LSDA LSCL HPD0 AVCC18B R0XCR0XC+ AGND3

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

RX0_2 RX0_2B RX0_1 RX0_1B RX0_0 RX0_0B RX0_C RX0_CB R31 750R

GND

GND

CEC-IN 1 2

R45 0R

CEC

DV33-HDMI

5 D3V3L4

D109

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

41

SSB v1: I/O Scart

B15 I/O - SCART

P1 1 12 2 13 3 14 4 15 5 16 6 17 7 18 8 19 9 20 10 SCT1_AV_OUT 21 11 1 R63 2 EZJZ1V270RA GND SCT1_AV_IN
SCT1_R_IN SCT1_G_IN SCT1_AUR_OUT

T Z921 T Z925 T Z926 T Z924

Nearly Connector
SCT1_AV_IN L903 30R R970 100R

Nearly 5335
C968 0.047U
SY0

B15

SCT1_AUR_IN
SCT1_AUL_OUT

R968 75R

C967 47P C969 1U

GND_SV

SCT1_AUL_IN
SCT1_B_IN

GND SCT1_G_IN 1 L904 30R

SCT1_FS_IN

R969 68R

C971 0.01U

Y0P

R60 EZJZ1V270RA GND

R971 75R

C970 16P R972 100R R973 68R C972 0.01U C974 0.01U

Y0N

GND SCT1_B_IN

L905 30R

PB0P

STC1_FB_IN

R975 75R R61 EZJZ1V270RA R976 75R L906 30R GND

C973 16P R974 100R C975 0.01U

PBR0N

T Z920 T Z928 T Z923 T Z919 T Z918 T Z922 T Z927 R64 EZJZ1V270RA

GND SCT1_R_IN 1 2

C976 16P R977 68R R978 100R C977 0.01U C978 0.047U PR0P

1 2

SC0

R62 EZJZ1V270RA

GND

GND

NEARLY MT5335
L907 30R 1 C979 R65 EZJZ1V270RA 2 SCT1_FS_IN 1 C980 470P R962 10K SCT1_AUR_OUT 1 SCT1_AUL_OUT 1 GND R67 2 R66 EZJZ1V270RA EZJZ1V270RA GND 2 2 EZJZ1V270RA GND
I_17950_035.eps 070508

STC1_FB_IN

R963 SOY0 0R

SCT1_AUR_IN

L1 30R L2 30R

R964 10K R965 10K R966 10K R967 10K

C965 1U C966 1U

SCT_R SCT_L

SCT1_AUL_IN

470P

R960 75R

C963 470P

C964 470P

L908 30R

GND R961 33K

SCART_FS_IN

R68

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

42

SSB v1: I/O Side AV, S-Video, Audio

B16

I/O - SIDE AV, SVIDEO, AUDIO

AV_5V
Close to MT5382p

B16
CVBS0

L925 10R

R945 100R

C953 0.047U

T Z917
132 130 129 128 127 126 125

U203 139 140 133 131 124 141 142 137 138 135 134 DVDD25_VADC GND GND_CVBS GND_SV AVDD25_VADC GND AVDD25_REF GND AVDD25_VFE GND

CVBS1

CVBS2
SY0 SC0 SY1 SC1 D2SA

C003 1U

CVBS_OUT

R918 0R R919 NC

R9003 10K

C004 0.01U

CVBS0 CVBS1 CVBS2 SY0 SC0 SY1 SC1

DVDD25_VADC DVSS25_VADC GND_TUNER GD_CVBS GND_SV AVDD25_VADC AVSS25_VADC AVDD25_REF AVSS25_REF AVDD25_VFE AVSS25_VFE

C920 1U

GND_TUNER

136

D2SA

D2SA

C001 47U 6V3

R920 GND 1K

C B E

BC847C Q815 R9004 75R R924 0R

C

CI_GPIO14 MT5335PKU Q906 BC847C

B E

SCT1_AV_OUT

R921 4K7

C002 47P

R9001 470R

R9002 10K

R944 4K7

GND
9

GND AV25

Nearly Connector
P902
7

Nearly 5335
R946 100R C959 0.047U SY1

AV25

T Z975

L915 30R

L911 600R C916

DVDD25_VADC C954 0.1U

R70 T EZJZ1V270RA Z974

R947 75R

C958 47P AV25

AV25 L912 600R

1U

6 8

GND AVDD25_VADC C917 C955 0.1U

2
GND GND L916 30R R948 100R C961 0.047U SC1 AV25 AV25

1U L913 600R

GND AVDD25_REF C918 1U C956 0.1U

1
R69 EZJZ1V270RA R949 75R C960 47P AV25 AV25 GND Z980 T P902
WHITE

L914 600R C919

GND AVDD25_VFE C957 0.1U

Z981 T L926 30R L927 30R R9010 10K R9009 10K R9012 10K R9011 10K C9001 1U C9002 1U AIN2_L AIN2_R GND C9004 C9003 470P 1U

4 3

RED

2
YELLOW

1 GND

EZJZ1V270RA

470P

R71

GND L928 30R T Z976 R9014 75R

R9013 100R

C9006 0.047U

CVBS2

C9007 47P C915 1U GND_CVBS

T Z978

GND

I_17950_036.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

43

SSB v1: MT5335 Interface YPbPr & VGA

B17
WHITE

MT5335 INTERFACE - YPBPR, VGA

Nearly Connector
1 2 3 YPBPR_L_IN Y_IN Y_IN L4 30R

Nearly 5335
R984 0R C728 4700P

B17
SOY1 C730 0.01U Y1P
U203

GREEN

R981 68R

RED

4 5 6

YPBPR_R_IN PB_IN

BLUE

R982 75R

C731 16P R983 100R C729 0.01U

Y1N

RED

PR_IN 7 VGA_R_IN VGA_L_IN 9 P907 8 R985 75R 1 1 1 1 PB_IN L5 30R R986 68R C726 0.01U T Z939 10 PB1P GND

SOY0 Y0P Y0N PB0P PBR0N PR0P SOY1

Y1P Y1N PB1P PBR1N PR1P T Z940

107 108 109 114 115 116 118 119 120 121 122 123 112 111

SOY0 Y0P Y0N PB0P PBR0N PR0P SOY1 Y1P Y1N PB1P PBR1N PR1P TN1 TP1

DVDD12_VGA AVSS12_RGBADC AVDD12_RGBADC AVSS12_RGBFE AVDD12_RGBFE RP RN BP BN GP GN VSYNC HSYNC SOG

117 113 110 105 101 104 106 98 99 102 103 96 97 100

DVDD12_VGA GND AVDD12_RGBADC GND AVDD12_RGBFE RP RN BP BN GP GN VSYNC HSYNC SOG

C727 16P R987 100R C725 0.01U PBR1N

MT5335PKU

R74 EZJZ1V270RA 2 2 2 R76 EZJZ1V270RA R988 75R C724 16P 2 R77 EZJZ1V270RA GND PR_IN L6 30R R989 68R C723 0.01U PR1P

AV12 AV12 L909 600R C987 1U AV12 AV12 L910 600R C989 GND AV12 AV12 L3 600R C991 1U GND AVDD12_RGBFE C992 0.1U 1U GND AVDD12_RGBADC C990 0.1U

DVDD12_VGA C988 0.1U

GNDR75 EZJZ1V270RA

GND

T Z929 C732 0.1U R979 100R

P904 BLACK

2 1

SPDIF_OUT

ASPDIF

YPBPR_L_IN YPBPR_R_IN

L8 30R L7 30R

R990 10K R991 10K R992 10K R993 10K

C721 1U C720 1U

YPBPR_L YPBPR_R

1 C993 33P 2 R73 EZJZ1V270RA GND R980 100R

C719 470P

C722 470P

GND
I_17950_037.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

44

SSB v1: I/O VGA

B18
P908

I/O - VGA
T Z945 T Z941 T Z942 T Z943 T Z944 T Z946 T Z948 T Z947 T Z955
VGASCL_IN

Nearly 5335
R998 0R C712 4700P

B18
SOG GP VGA_PLUGPWR

Nearly Connector
L918 30R

16 5 15 10 4 14 9 3 13 8 2 12 7 1 11 6 17
RED

GREEN

R719 33R

C714 0.01U

R996 75R R716 0R W/P VGA_PLUGPWR 3 1 2 D913 BAV70 C005 ESD_0402 R999 75R GND +5V BLUE L919 30R GND

C715 16P R997 100R R720 33R C713 0.01U C710 0.01U VGA_PLUGPWR

Z973 T

W/P_CTR
VSYNC_IN

GN BP

C996 0.1U U903 1 8 A0 VCC 2 7 A1 WP 3 6 A2 SCL 4 5 GND SDA AT24C02 W/P VGASCL VGASDA R715 10K
Z970 T Z971 T Z972 T

BLUE
HSYNC_IN

GREEN
VGASDA_IN

C711 16P R701 100R C709 0.01U C707 0.01U BN

RED
R86 EZJZ1V270RA EZJZ1V270RA 1 1 2 1

L920 30R

GND

R721 33R

RP

GND

R702 75R

C708 16P R703 100R C706 0.01U RN

R84

GND GND
R85 EZJZ1V270RA

GND 5VSB

T Z949 T Z950 L924 30R L923 30R

5VSB

VGA_R_IN

R704 10K R705 10K

C702 1U C701 1U

VGA_R VGA_L

R708 10K
VGASDA_IN VGASCL_IN

VGA_L_IN

VGASCL_IN

R709 100R

5VSB 5VSB R714 10K

VGASCL

C999 470P

C703 470P

R706 10K

R707 10K R80 EZJZ1V270RA

HSYNC_IN
1

L921 30R

HSYNC GND GND

R718 22K

Q904 C143ZT
C

R82

C705 10P 5VSB R710 10K SW_UPDATE_CTL GND VGASDA_IN

1

EZJZ1V270RA
2

R726 0R/NC

SW_UPDATE_CTL1
B

Q905 C143ZT

R711 100R

VGASDA

R725 10K

VSYNC_IN
1

L922 30R

VSYNC R81 C704 10P EZJZ1V270RA

C997 R83
R717 22K

16P

EZJZ1V270RA
2

GND

5VSB

GND

C998 16P
Q903 C143ZT 2

R712 100R

R713 100R

U0TX
E

U0RX

C B

I_17950_038.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

45

SSB v1: LVDS Receiver

B19
DV33A DV33A

LVDS RECEIVER

B19
VDD_PANEL GND 8 R7 7 R6 6 R5 5 R294 NC\TTL\33R R4 R1 R3 8 R3 7 R2 6 R1 G1 4 R295 NC\TTL\33R 5 R0 8 G7 7 G6 6 G5 5 G4 R296 NC\TTL\33R B1 B3 8 G3 7 G2 6 G1 5 G0 R298 NC\TTL\33R D_HSYNC B5 B7 G3 G5 G7 R5 R7 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 8 B7 7 B6 6 B5 5 B4 R299 NC\TTL\33R DE 2 P205 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 D_VSYNC PANEL_CTL2 CLK B0 B2 B4 B6 G0 G2 G4 G6 R0 R2 R4 R6 C2010 NC\TTL\0.1U GND 8 B3 7 B2 6 5 R290 NC\TTL\33R B1 B0 8 7 6 5 DE D_VSYNC D_HSYNC C2011 NC\TTL\16P GND

L929 NC\TTL\600R DV33A_LVDS_RECEIVER T_R7 T_R6 C2202 C2001 C2004 C2006 C2007 C2015 T_R5 T_R4 1 2 3 4

R293 NC\TTL\33R

NC\TTL\0.1U NC\TTL\0.1U GND NC\TTL\0.1U

NC\TTL\0.1U NC\TTL\0.1U

NC\TTL\0.1U DV33A_LVDS_RECEIVER

T_R3 T_R2 T_R1 T_R0

VCC4 RXOUT21 RXOUT20 RXOUT19 GND5 RXOUT18 RXOUT17 RXOUT16 VCC3 RXOUT15 RXOUT14 RXOUT13 GND4 RXOUT12 RXOUT11 RXOUT10 VCC2 RXOUT9 RXOUT8 RXOUT7 GND3 RXOUT6 RXOUT5 RXOUT4 RXOUT3 VCC1 RXOUT2 RXOUT1 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29

1 2 3

U207
T_B5 T_HSYNC T_VSYNC T_DE T_R6 AN00 AP00 AN11 AP11 AN22 AP22 CLK11CLK11+ AN33 AP33
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 RXOUT22 RXOUT23 RXOUT24 GND1 RXOUT25 RXOUT26 RXOUT27 LVDSGND1 RXIN0RXIN0+ RXIN1RXIN1+ LVDSVCC1 LVDSGND2 RXIN2RXIN2+ RXCLKINRXCLKIN+ RXIN3RXIN3+ LVDSGND3 PLLGND1 PLLVCC1 PLLGND2 PWRDWN RXCLKOUT RXOUT0 GND2

T_B4 T_B3 T_B2 T_B1 T_B7 T_B6 T_B0 T_G5 T_G4 T_G3 T_G7 T_G6 T_G2 T_G1 T_G0 T_R5 T_R7 T_R4 T_R3 T_R2 T_R1

T_G7 T_G6 T_G5 T_G4

1 2 3 4

T_G3 T_G2 T_G1 T_G0

1 2 3 4

T_B7 T_B6 T_B5 T_B4

1 2 3 4

PWRDN T_CLK T_R0

V386 T_B3 GND T_B2 T_B1 T_B0 1 2 3 4

1 DV33A T_DE 2

T_VSYNC 3 T_HSYNC 4 DV33A R291 NC\TTL\10K AP00 AP11 AP22 CLK11+ AP33
C

AN00 AN11 AN22 CLK11AN33

R23 100R R24 100R R2003 100R R2004 100R R2005 100R

T_CLK

L239 120R

R292 NC\TTL\33R CLK

PWRDN PWRDN_EN
B

Q5 C143ZT

GND

I_17950_039.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

46

Layout Small Signal Board v1 (Top Side)

I_17950_040.eps 070508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

47

Layout Small Signal Board v1 (Bottom Side)

I_17950_041.eps 080508

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

48

SSB v2: Tuner

8 7 6 5 4 3 2 1

B01
Z100

TUNER
TUNER_5V
R145

B01
TUNER_5V L108 30R AV_5V 5 4 C137 0.1U MT5133-GPIO-AD TUNER_5V C140 0.1U 6V3 C2 47U C139 0.1U
12K

ATV-IF-AGC D110 LL4148

BC847C Q106

F
ANALOG_IF NC/RFAGC XTALOUT NC/GND1 NC/GND2 ANTPWR IFOUT2 IFOUT1

GND E 4LVC1G66GV

C138 0.1U

VCC

C B E

R153 0R

IFAGC

GND1

SDA

NC1

SCL

NC

U101

AS

TU

Y 1

B1

R124 100R R125 100R

11

12

13

14

15

16

17

18

19

20

21

R132

NC

R148 0R RF-AGC

5V-OUT FAT_IN+
R139 6K8

R152 47K

FAT_INRF-AGC R149 NC\0R

R140 6K8 R141

5V-OUT

0.01U C119

C129 0.1U

22K

D103 BA982 R135 R127 R126 C124 22P C125 22P 4K7 100R 100R TUNER_SCL0_5V D101 BA982 1 TUNER_5V TUNER_5V 23 18 21 C123 0.01U L104 NC/120 C102 100U D102 6V3 C122 0.1U IF_AGC
C B E

R121 22K 12K R146

R137 220K

TUNER_SDA0_5V
R123 0R

X100

C111

1500P

C115 0.1U

R114 22K

X102 IN/GND OUT1 OUT2 GND IN

C100 1U

R101 330R

C114 0.47U

C112

20P

R147 NC

0.01U C3

Q102 BC847C

4M

R100 680K

C109 0.01U

ATV-IF-AGC

C110 0.22U

L103 120R

5V-OUT L102 120R C113 0.01U BC847C Q100 TUNER_5V C101 100U 6V3

13

24

22

20

19

17

16

15

14

AFC

VPLL

OP2

AGND

CVBS

VAGC

SIF2

SIF1

REF

L100 1UH

10

11

12

R106 NC\6K8

R102 NC\180R

U206 8 1 OUT3 GND R97 7 2 NC/4K7 OUT2 IN1 6 3 OUT1 IN2 5 4 R96 EN OC NC/100R 5V-TUNER-ON/OF NC/TPS2049
R112 33R

R118 NC

TDA9886T

R113 6K8

TAGC

NC

VP

R99

BA982

NC

CVBS_OUT

B E

R129 75R
CVBS-OUT

CVBS0 C121 47P

SIOMAD

C103 NC/100U

R95 NC/100R AV_5V

C104 0.01U

R108

L106 0

IN/GND

OUT1

OUT2

GND

IN

C118 1000P D100 BA592

2

X101

5K6

E Q101 NC\BC847C

C120 1P5

R107 0R

C126 NC/0.1U

FMPLL

DGND

DEEM

U100

VIF1

VIF2

AUD

TOP

SDA

OP1

AFD

R120

SCL

6V3

75R R130

5V-OUT
NC

R131 0R

C
L107 120R R128 SIF 0R GND_TUNER 0.01U C131
SIFP

5V-TUNER-INPUT

R109 2K2

R110 2K2

C127 0.1U

C B

SIFN C132 0.01U TUNER_SCL0_5V TUNER_SDA0_5V OSCL0 OSDA0

R116 100R R115 100R

R828 10K

0.47U

B
TUNER_SDA0 DV33

Q105 2N7002

C105 1000P

R111 2K2

C128

R138 220R

R117 NC R119

C116 0.01U

R104 NC\47R

R103 NC\1K5

1000P

TUNER_SDA0_5V

R105 NC

TUNER_SCL0 TUNER_SDA0
R94 NC\100R

R93 NC\100R

AV_5V

Q103 C124ET

C B E

Q104 2N7002 TUNER_SCL0

L101 0.56UH

5K6

C107 390P

0.01U C108

C117

A
DV33

C106 1000P

R829 10K TUNER_SCL0_5V

R133 33R

17953_521_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

49

SSB v2: MCU Standby

8 7 6 5 4 3 2 1

B02

MCU STANDBY
5V_KEY 5V_KEY NC 10K NC 5V_KEY +3V3SB_UP R816 33R X800 32K7
OSCI

B02
R833

OSCO

R142

R817

D801 LL4148

C821 20P

OIRI POWER_ON L821 +3V3SB 35KEY_5V R819 3K3 L822

R806 27K

1 600R 2 600R 600R 3 4 5 6 L823 600R 7 8 9 +3V3SB_UP P805 L820 600R CEC

C822 20P

STANDBY

5VSB

DV33 R805 100R

CEC_IRQ

E
KEY_5335 R842 NC 2N7002/NC Q817

C819 100P

E
R22 0R R10 0R Q809 OSCL0 2N7002 Q810

KEY

L811 600R

5V_KEY

C871 1U

OSDA0

C823 0.1U +3V3SB_UP

2N7002

+3V3SB_UP +3V3SB_UP 10K C876 NC\1000P C875 1000P

OSCO OSCI

10K 10K R827

R807

+3V3SB_UP

R810

R809 10K

R826

U810 10K 1 2 3 R815 4K7 OSCO OSCI VSS NRST PWMI RXD/IRQ3 TXD/IRQ2 HIN WT6702F C802 1U VDD AD0 AD3/IR SCL1 SDA1 SCL2 SDA2 VIN 16 15 14 13 12 11 10 9 R824 R820 R823 R825 R814 33R 33R 33R 33R 33R
STANDBY

OSCL0_SB OSDA0_SB

1 2

R822 R830

33R 33R

KEY OIRI_MCU

ISP PORT
C
P802

3 4 C820 0.1U

C
HDMI_INT SHORT_PROTECT SW_UPDATE_CTL1 HSYNC 33R 33R 0R 33R R813 R834 R835 R812 CEC_IRQ

4 5 6 7 8

3V3SB_EN VSYNC +3V3SB

OPTION for CEC Stand by Function Q4 BT3904 OIRI_MCU

C B E

+3V3SB_UP

R143 10K

OIRI

+3V3SB L809 120R C809 100U C825 0.1U RT9166 U811 2

OUT GND IN

3 C826 0.1U C872 100U 6V3

5VSB

C824 1U

R144 4K7 GND 6V3

17953_522_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

50

SSB v2: DC / DC
8 7 6 5 4 3 2 1

B03
F

DC-DC
+5V AV33 NC 12V/4A R850 4K7 11 10 9 8 7 6 5 4 3 2 5V/2A 1 R46 10K R865 0R Q816 BT3904
C B E

B03
R8012 R851 10K

P804

CONNECTOR
12V_IN
BL_ON/OFF

Back Light circuit

5V_PW
C

NC R8013

R856 4K7

47K

R846 10K

B E

C827 1U

4 5

C B E

BT3904

Q803 BT3904

A04803

1U

R8001 10K

POWER CINCH

R8010 4K7

ON/OFF 12V_IN

3V3SB_EN

L819 200R L818 200R C810 100U 16V

7 P800 C862 0.1U

R8003 0R

R855 4K7

C828 0.1U

5V_PW

L813 30R

R860 5V_KEY 0R

5VSB

BL_DIM

1K R844 R843 4K7

R8

R857 1K
C

2 3

NC R9

1U ON/OFF

R854 0R

1U C854

Q801

R852 4K7

C853 0.1U

C863 NC

L15 200R LD1117S33 U800 5V_OUTSIDE about 1mm GND BOOT PHASE DRIVE UGATE FB VCC GND LGATE NC 8 7 6 5
G2 4 S2 3 G1 2 S1 1

LD1117S12 U803
4 4 VIN 3

AV12 R898 47K AV_5V 3K9 R91 R92 2K2 C849 0.1U C807 100U R894 100K D818 LL4148

R8006 10K

C831 0.1U

C859 0.1U C860 0.1U

R849 10K

Q802 BT3904 +5V

R848 100R BL ON/OFF L815 600R +3V3SB R856 IS FOR 26" 19"20"22" NC 1 SELECT L814 600R

5VSB 0.1U C829 Q800

1 S2 2 G2 3 S1 4 G1 8 D2A 7 D2B 6 D1A 5 D1B

AV33 +5V 5VSB NC R845

12V_IN C852

12V

R847 NC LL4148 DIMMING D804

5V_OUTSIDE

C858

R8011 10K 12V L14 200R C800 1000U

5VSB 12V C846 0.1U

4 4
GND/ADJ1

R2 510R Q805 BT3904

OUT 2

SHORT_PROTECT

16V C804 4U7

D816 LL4148 Q807 BT3904

R4 10K

C B

GND/ADJ1

OUT 2

VIN 3

R802 120R

R832 2R7

R831 2R7

C832 0.1U

R895 10K

C B

6V3

R876 NC

D808 LL4148 1 2 3 4

U807 NC
D2B 5 D2A 6 D1B 7 D1A 8

+5V L804 200R L805 200R C830 T Z805 3 C841 0.1U C806 100U 6V3 U809 NC/KD1084-33
VIN ADJ/GND OUT

+5V R887 2K2 DV33A C839 0.1U C870 100U R801 330R L802 200R DV33 3K9 R886

D809 LL4148

12V

1K2

NC

C834

R871

0.01U

GND R869 10R

R872

U808

R888 DV33 2K7

D810 LL4148

NC R868

5VSB

C805 1U

U801 LD1117S33
VIN 3

R889 4K7

NC C833

AV33

AV33

R890 2K7

D811 LL4148

D805 LL4148

R858 2K7 CI_VCC

+5V

0R R1

GND

C840 0.1U

0.1U C837

GND 6V3 D814 3V9

R891 4K7

GND C812 47U C818 47U 6V3

R897 680R

L800 NC

R5 10K

R866 22K

C848 0.1U

R896 8K2

C803

6V3

C801 1000U

16V

R893 4K7

U804 LD1117S25
VIN 3

AV25 CI_DV18 0.1U C843 D817 LL4148 D807 LL4148 R863 3K AV25

L816 120R

C842 0.1U

R879

R864 6K8

R862 6K8

1K

NC1 SW EN NC2 GND FB COMP SS 5

R884 1K

9 3 C869 0.1U 10

C845 0.1U

7 8 C866 120P NC R874 4K7 C835 0.01U

R882 15K

C865 0.1U

C868 0.01U

D803 SK24

R883 51K

R885 6K2

C844 0.1U

C851

0.1U

L801 15UH

L13 200R 16V C874 4U7

12V

R867 10R Q806 BT3904 12V C816 100U 16V C867 0.1U
C B E

4U7

0.1U

R870 220R

4 4
GND/ADJ1

OUT 2

R859 4K7

R6 10K

+3V3SB

R892 2K7

D812 LL4148

D806 LL4148

R861 3K

DDRV

4 4

R7 10K 4 1

U806 MP1411 IN BS 2

R3 1K C864 0.01U C817 330U

GND/ADJ1

OUT 2

C811 47U

6V3

4 4

4 4

U802 LD1117S
VIN 3

U805 LD1117S50
VIN 3

AV_5V

GND/ADJ1

GND/ADJ1

OUT 2

DV10 R803 5R1

AV9V R804 6R8 C814 47U

OUT 2

C850 0.1U

C815 100U

6V3

16V

C813 100U

16V

17953_523_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

51

SSB v2: Digital Channel Decoder

8 7 6 5 4 3 2 1

B04

DIGITAL CHANNEL DECODER

DV33 C513 1000P C568 NC/20P R134 10K R136 10K DV33

B04

FAT_IN-

F
L506 NC C527 NC C514 1000P C569 NC/20P R508 0R

FAT_IN+

TUNER_SCL0 TUNER_SDA0

AV12 AV12 L500 600R

Digital 1.8V Bypass Caps

DVDD12

C510 0.22U

C511 0.22U

R507

0R

DV33

C516 0.1U

C517 0.1U

C519 0.1U

R151 NC/10K

TUNER_SCL TUNER_SDA

R150 NC/1K
MT5131_IF_AGC

MT5133-GPIO-AD

C512 0.22U

ADVDD33_1 REFTOP VCMEXT REFBOT

AVDD33

DVDD12

C500 1U

C518 0.1U

C515 0.1U

1K

R506

E
IF_AGC

DVDD33

CLOSE TO MT5133
C509 0.047U

DV33

C506 27P

Digital 3.3V Bypass Caps

L501 600R

DVDD33

R500 1M

X500 27M

U502

AVDD33_3 REF_TOP VCMEXT REFBOT IN+ INAVDD33_1 AVSS33_1 VDD1.2_3 DGND1.2_1 TUNER_SCL TUNER_SDA

48 47 46 45 44 43 42 41 40 39 38 37

R503

XTALO 1 2 3 4 5 6 7 8 9 10 11 12 AVSS33_3 AVSS33_2 XTALI XTALO AVDD33_2 ALC_IN VDD1.2 DGND1.2 TSDATA7 TSDATA6 TSDATA5 VDD3.3

C508 0.1U

C507 27P

C523 0.1U

XTALI

D
R536 33R

AVDD33 DVDD12

TS0INDATA7 TS0INDATA6 TS0INDATA5

1 2 3 4

8 7
DVDD33

TSDATA4 TSDATA3 TSDATA2 TSDATA1 TSDATA0 TSERR TSVAL TSSYNC TSCLK VDD3.3_1 DGND3.3 VDD1.2_1

6 5

RF_AGC IF_AGC VDD3.3_3 GPIO0 /RESET XTAL_SEL1 XTAL_SEL0 DGND3.3_1 VDD3.3_2 VDD1.2_2 HOST_SDA HOST_SCL

36 35 34 33 32 31 30 29 28 27 26 25

R505 100R R504 10K

DVDD33 DVDD12 SIF_SDA SIF_SCL

C501 1U

C522 0.1U

C521 0.1U

C520 0.1U

NC

MT5133_RESET

R5010R R502 0R

OSDA0 OSCL0

AV33

Analog 3.3V Bypass Caps

L502 600R

AVDD33

C525 0.1U

TS0INDATA4 TS0INDATA3 TS0INDATA2 TS0INDATA1

1 2 3 4

8 7
DVDD33 DVDD12

C502 1U

C526 0.1U

R535 33R

MT5133

13 14 15 16 17 18 19 20 21 22 23 24

6 5 33R 33R 33R 33R R542 R543 R544 L510 120R

AV33 ADVDD33_1

TS0INDATA0

TS0INVALID
TS0INSYNC TS0INCLK

L503 600R

C524 0.1U

R545 C505 120P/NC

C504 120P/NC

C503 1U

A A

17953_524_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

52

SSB v2: DVBT/ CI Decoder

8 7 6 5 4 3 2 1

B05
F

DVBT-CI-DECODER
CLOSE TO CI CONNECTOR
CI_VCC CI_VCC CI_VCC CI_VCC CI_VCC DV33 CI_DV33 CI_DV18 +5V

B05
CLOSE TO CI CONNECTOR
F
CI_VPP CI_VCC

R525 NC

R522 10K

R517 NC\10K

R519 NC\10K

R521 10K

L508 600R C556 47U

LD1117S18

L509 30R C557 47U 4 5

L507 30R

3 VIN

2 OUT

1GND/ADJ

CI_IOIS16#

C558 1U

CI_INPACK#

C546 0.1U

CI_IREQ#

CI_VS2#

CI_WAIT#

6V3

0.1U

+5V R516 10K R518 10K

+5V

+5V

U500

R528 10K

CI_CD1#

CI_VS1#

CI_CD2#

3.3V: 0.2W (60mA) 1.8V: 0.2W (100mA)

R520 10K

R523 10K

R524 10K

CI_VCC_EN

R527 0R

C559 0.1U

E
CI_DV33 CI_AV33

C560 0.1U

C547 0.1U

C548

6V3

C550 100U

VIN

VOUT

6V3

4 4

RT9711

EN/EN# 3

GND 2

FLG 1

U503

CI_DV33

CI_DV18

CI_DV18

CI_AV18

L504 600R C533 0.1U C531 0.1U C532 0.1U C1 1U

CLOSE TO MT8295
C535 0.1U C534 0.1U C537 0.1U C539 0.1U C538 0.1U C540 0.1U C554 1U C536 0.1U C541 0.1U C552 1U

L505 600R

C544 0.1U

C545 0.1U

C542 0.1U

C551 1U

C543 0.1U

CI_CE1##

R549 100R

CI_CE1#

CI_DV33

CLOSE TO MT8295
C530 10P R510 4K7

CI_GPIO1

R511 4K7 CI_OE## R550 100R

C562 10P

CI_OE#

TS_CKO

CI_GPIO0

C563 10P

DV33

R540

CLOSE TO MT8295
TS_VALIDO

TS_SYNCO

TS_DATAO

R548

C528 27P

C529 27P NC

CI_WE## 10K R512

R551 100R

CI_WE#

33R

0R R547 R541 33R X501 27M

R513

MTK_IC_RESET

P500 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

R538

R539

120R

CLOSE TO MT8295
CI_D3 CI_D4 CI_D5 CI_D6 CI_D7 CI_CE1# CI_A10 CI_OE# CI_A11 CI_A9 CI_A8 CI_A13 CI_A14 CI_WE# CI_IREQ# CI_CD1# CI_OUTDATA3 CI_OUTDATA4 CI_OUTDATA5 CI_OUTDATA6 CI_OUTDATA7 CI_CE2# CI_VS1# CI_IORD# CI_IOWR# CI_INSYNC CI_INDATA0 CI_INDATA1 CI_INDATA2 CI_INDATA3

33R

33R

4K7

L511 5V-TUNER-ON/OF 5V-TUNER-INPUT

CI_IORD##

R552 100R

C564 10P

R509

1M

CI_IORD#

4K7 4K7

R546 R514

CI_TS_SYNCO CI_TS_DATAO CI_TS_CKO CI_TS_VALIDO CI_DV33

CI_PDD3 CI_PDD4 CI_PDD5 CI_POWE# GND CI_AV18 GND CI_XTALI CI_XTALO CI_AV33 CI_RESET# CI_OEB CI_ALE GND CI_CLE

Z501 Z502

RESET_N CI_GPIO14

CI_INT CI_POCE1# CI_RB CI_DV33

C565 10P

OPWM1 OPWM2 CI_DV33

128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97

GPIO14 GPIO13 GND33_5 TS_SYNCO TS_DATAO TS_CKO TS_VALIDO VCC33_5 GPIO12 GPIO11 GPIO10 CI_OEB CI_DATA0 CI_DATA1 CI_INT AVSS18_PLL AVDD18_PLL AVSS33_XTAL XTALI XTALO AVDD33_XTAL RESETB CI_RB CI_CLE GND33_4 CI_ALE CI_DATA3 CI_DATA4 CI_DATA5 CI_DATA6 CI_DATA7 VCC33_4

GND

C
CI_VCC CI_VPP R553 100R

CI_VCC CI_VPP

CI_IOWR##

CI_IOWR#

HDMIED_WP HPDIN
CI_DV33 TS0INCLK TS0INSYNC TS0INVALID TS0INDATA0 GND TS0INDATA1 TS0INDATA2 TS0INDATA3 TS0INDATA4 CI_DV18 TS0INDATA5 TS0INDATA6 TS0INDATA7

C561 10P

CI_VS2#
CI_RESET CI_WAIT# CI_REG# CI_OUTVALID CI_OUTSYNC CI_OUTDATA0 CI_OUTDATA1 CI_OUTDATA2 CI_CD2#

NC\0R R532

CI_INPACK#

CI_VS2#

R533 100R

C566 10P

CI_GPIO0 CI_GPIO1

HDMI_SEL YPBPR_SW_IN PWRDN_EN

GND CI_CD1# CI_D3 CI_OUTDATA3 CI_D4 CI_OUTDATA4 CI_D5 CI_OUTDATA5 CI_D6 CI_OUTDATA6 CI_D7

CI_DV33 CI_OUTDATA7 CI_CE1## CI_CE2# CI_A10 CI_VS1# CI_OE## CI_IORD## CI_A11 CI_IOWR## GND CI_A9 CI_INSYNC CI_A8 CI_INDATA0 CI_A13 CI_INDATA1 CI_A14 CI_INDATA2 CI_DV33 CI_WE## CI_INDATA3 CI_IREQ# CI_INDATA4 CI_INVALID CI_INDATA5

MT8295

GND CI_INDATA6 CI_A12 CI_INDATA7 CI_A7

33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

VCC33_1 D15 CE1# CE2# A10 VS1# OE# IORD# A11 IOWR# GND33_1 A9 A17 A8 A18 A13 A19 A14 A20 VCC33_2 WE# A21 READY A22 A16 A23 A15 GND33_3 A24 A12 A25 A7

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

GPIO0 GPIO1 GPIO2 GPIO3 VCC33 T0CLK_I_ T0SYNC_I_ T0VALID_I_ T0DATA0_I_ GND33 T0DATA1_I_ T0DATA2_I_ T0DATA3_I_ T0DATA4_I_ VCC18 T0DATA5_I_ T0DATA6_I_ T0DATA7_I_ GPIO4 GPIO5 GPIO6 GND18 CD1# D3 D11 D4 D12 D5 D13 D6 D14 D7

U501

CI_WEB CI_DATA2 CI_CEB GPIO9 GPIO8 GPIO7 GND18_1 WP CD2# D2 D10 D1 D9 D0 VCC18_1 D8 A0 BVD1 A1 BVD2 GND33_2 A2 REG# A3 INPACK# A4 WAIT# A5 VCC33_3 RESET A6 VS2#

96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65

CI_PDD2 CI_PDD6 CI_PDD7 CI_VCC_EN CI_VPP33_EN CI_VPP5_EN GND CI_IOIS16# CI_CD2# CI_D2 CI_OUTDATA2 CI_D1 CI_OUTDATA1 CI_D0 CI_DV18 CI_OUTDATA0 CI_A0 CI_OUTSYNC CI_A1 CI_OUTVALID GND CI_A2 CI_REG# CI_A3 CI_INPACK# CI_A4 CI_WAIT# CI_A5 CI_DV33 CI_RESET CI_A6 CI_OUTCLK

CI_INVALID CI_INCLK CI_A12 CI_A7 CI_A6 CI_A5 CI_A4 CI_A3 CI_A2 CI_A1 CI_A0 CI_D0 CI_D1 CI_D2 CI_IOIS16#

CI_INDATA4 CI_INDATA5 CI_INDATA6 CI_INDATA7

CI_OUTCLK

CLOSE TO MT8295

C567 10P

NC/0R R531

100R R515

CI_INCLK

17953_525_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

53

SSB v2: Audio Amplifier

8 7 6 5 4 3 2 1

B06

AUDIO AMPLIFIER

B06
P600

Y600

L+ R+ U600 PGND 8 PW_GND 9 S_GND 15 OUT2+ 1 OUT1+ OUT113 VCC2

14 OUT2-

TDA7266

6 MUTE

3 VCC1

7 STBY

11 NC3

5 NC1

10 NC2

4 IN1

MUTE

AL1O

SPEAK-OUTL

R622 NC R621 0R

LR620 2K2

L_OUT C612 1U SS R_OUT GND R-

12 IN2

C610 4700P

R624 100K

C611 0.1U C608 1U PGND

AR1O
SPEAK-OUTR

R617 NC

GND 2K2 R618 0R R619 R623 100K C609 4700P

R600 0R

Near the P502 12V R603 2R7 R648 2R7 C607 1000U GND R602 0R C615 0.1U R601 0R Near the P502 16V PGND

D
GND

L600 200R L601 200R

GND PGND

PGND

BT3906

12V R643 220R

Q607

R640 4K7 12V R627 10K

L602 600R

E B

R639 4K7 C602 100U 16V

L603 600R SS R656 100R C600 3300P C601 3300P R628 10K R631 NC 0R/NC 0R/NC R636

HP_L EAR C614 4700P/NC 6 5 4 P601 C613 4700P/NC 1

R637 GND HP_R

R659 100R

R641 4K7
B E C

R632 10K BT3904 Q602 C

B E

2 3 9 8 7

Q608 GND BT3906

GND

MUTE

R626 100R

R629 100R

LL4148 D600

GND

GND 16V 100U C616

HW_MUTE

R644 10K

R+ R_OUT

L+ GND L_OUT C617 16V 100U

R642 1K

R630 10K

R647 10K

16V C606 22U

GND R625 AMP_MUTE 4K7 D601

GND

A
LL4148

17953_526_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

54

SSB v2: MT5335 Video Processor

8 7 6 5 4 3 2 1

B07

MT5335 VIDEO PROCESSOR

B07

F
U203

AV12
USB_VRT USB_DUSB_D+ AVDD33_USB AVDD12_USB 68 65 66 67 69 157 158 USB_VRT USB_DM USB_DP AVDD33_USB AVDD12_USB TP0 TN0 AVDD12_KADCPLL AVDD12_TVDPLL AVDD12_KHDMIPLL AVDD12_KAPLL AVDD12_SYSPLL AVDD12_KDMPLL AVDD12_DTDPLL 160 155 153 161 159 156 154 AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL

AV12 L215 600R

AVDD12_PLL

C207 1U

C228 R218 5K1 MT5335PKU 1U

C249 0.01U

C250 0.1U

USB_VRT

AV33 GND AV33 L216 600R GND

AVDD33_USB

C208 1U

C251 0.1U

AV12 AV12
U203 163 165

L217 600R

AVDD12_USB

SIFP SIFN TS_VALIDO TS_CKO

164 166 167 195 194

SIFP SIFN AF TUNER_DATA TUNER_CLK

AVDD25_SADC AVSS25_SADC

AVDD25_SADC

C210 1U

C252 0.1U

GND

RF_AGC IF_AGC

193 192

TS_DATAO TS_SYNCO

GND AV25

AV25 L218 600R

AVDD25_SADC

GND MT5335PKU C211 1U C229 HDMI_5V HDMI_5V AV33 AV33

EXT_RES OPWR0_5V 77 73

C253 0.01U

C254 0.1U

1U

C
RX0_CB RX0_C RX0_0B RX0_0 RX0_1B RX0_1 RX0_2B RX0_2 79 80 81 82 83 84 85 86

U203

L219 600R

AVDD33_H

C
GND

RX0_CB RX0_C RX0_0B RX0_0 RX0_1B RX0_1 RX0_2B RX0_2

1U
AVDD33_HDMI AVDD12_CVCC 78 74 AVDD33_H AVDD12_CVCC

C212 1U

C230

C255 0.1U

AV12 AV12 L220 600R

AVDD12_CVCC

MT5335PKU

GND C248 0.1U

C213 1U

GND

A A

17953_527_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

55

SSB v2: MT5335 Interface USB/HDMI

8 7 6 5 4 3 2 1

B08

MT5335 INTERFACE - USB, HDMI

B08

F
U203

AV12
USB_VRT USB_DUSB_D+ AVDD33_USB AVDD12_USB 68 65 66 67 69 157 158 USB_VRT USB_DM USB_DP AVDD33_USB AVDD12_USB TP0 TN0 AVDD12_KADCPLL AVDD12_TVDPLL AVDD12_KHDMIPLL AVDD12_KAPLL AVDD12_SYSPLL AVDD12_KDMPLL AVDD12_DTDPLL 160 155 153 161 159 156 154 AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL AVDD12_PLL

AV12 L215 600R

AVDD12_PLL

C207 1U

C228 R218 5K1 MT5335PKU 1U

C249 0.01U

C250 0.1U

USB_VRT

AV33 GND AV33 L216 600R GND

AVDD33_USB

C208 1U

C251 0.1U

AV12 AV12
U203

L217 600R

AVDD12_USB

SIFP SIFN TS_VALIDO TS_CKO

164 166 167 195 194

SIFP SIFN AF TUNER_DATA TUNER_CLK

AVDD25_SADC AVSS25_SADC

163 165

AVDD25_SADC

C210 1U

C252 0.1U

GND

RF_AGC IF_AGC

193 192

TS_DATAO TS_SYNCO

GND AV25

AV25 L218 600R

AVDD25_SADC

GND MT5335PKU
C211 1U

C229 HDMI_5V HDMI_5V AV33 AV33

EXT_RES OPWR0_5V 77 73 U203 RX0_CB RX0_C RX0_0B RX0_0 RX0_1B RX0_1 RX0_2B RX0_2 79 80 81 82 83 84 85 86

C253 0.01U

C254 0.1U

1U

L219 600R

AVDD33_H

C
GND

RX0_CB RX0_C RX0_0B RX0_0 RX0_1B RX0_1 RX0_2B RX0_2

1U
AVDD33_HDMI AVDD12_CVCC 78 74 AVDD33_H AVDD12_CVCC

C212 1U

C230

C255 0.1U

AV12 AV12 L220 600R

AVDD12_CVCC

MT5335PKU
C213 1U

GND C248 0.1U

GND

A A

17953_528_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

56

SSB v2: Interface LVDS TTL

8 7 6 5 4 3 2 1

B09

INTERFACE LVDS TTL

B09
U203

DV33
220 229 238 217 AVDD33_LVDS AVDD33_LVDS AVDD33_LVDS AVDD33_VPLL

F
A0N A0P A1N A1P A2N A2P CK1N CK1P A3N A3P A4N A4P A5N A5P A6N A6P CK2N CK2P A7N A7P

Footprint is ACM-2012
A0N A0P L200 EXC24C
1 2 4 3

244 243 242 241 240 239 237 236 235 234 233 232 231 230 228 227 226 225 224 223 222 221

A0N A0P A2N A2P CK1N CK1P A3N A3P A4N A4P A5N A5P A6N A6P A7N A7P CK2N CK2P A8N A8P A9N A9P

AVDD33_LVDSA AVDD33_LVDSB AVDD33_LVDSC AVDD33_VPLL

DV33

TP2 TN2

218 219

CI_POCE1#

R224 1K PANEL_SLT R232 NC

C261 0.1U

R227 390R 5V_OUTSIDE +5V GND NC R25

AN00 AP00

C320 C321

10P NC R26 10P MT5335PKU GND P202 10P GND 10P 10P GND 10P 10P GND 10P 10P AV33 R223 0R GND GND AP00 AP11 AP22 CLK11+ AP33 NC R213 NC R212 PANEL_CTL1 PANEL_CTL2 AP44 AP55 AP66 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 40 38 36 34 32 30 28 26 24 22
E

A1N A1P

L201 EXC24C
1 2 4 3

AN11 AP11

C322 C323

12V

R26 FOR 19" 22" PANEL R25 FOR OTHER +5V SUPPLY PANEL L232 NC/30R P209

10P

T Z210

12V 35KEY_5V AN00 AN11 AN22 CLK11AN33 GND 5 3 1

T Z212 Q203
1 S1 2 S2 3 S3 4 G 8 D1 7 D2 6 D3 5 D4

LVDS OUT

A2N A2P

L202 EXC24C
1 2 4 3

VDD_PANEL

AN22 AP22

C324 C325

6 4 2

C202 220U

CK1N CK1P

L203 EXC24C
1 2 4 3

0.1U

CLK11-C326 CLK11+C327

C209 1U

16V

C258

R219 10K

AO4459 C259 0.1U

A3N A3P

L204 EXC24C
1 2 4

R221 100K L233 30R GND

LVDSVDD_EN
B

AN33 C328

C329 3 AP33 L205 NC AN44 AP44

R222 AV33 0R

GND
C

Q204 C143ZT

A4N A4P

1 2

4 3

C330 GND NC C331 NC GND NC NC GND NC NC GND NC NC GND NC NC GND

20 18 16 14 12 10

AN44 AN55 AN66 CLK22AN77 AV33 AV33 L221 600R

AVDD33_LVDS

A5N A5P

L206 NC
1 2 4 3

AN55 AP55

C332 C333

CLK22+ AP77

GND

A6N A6P

L207 NC
1 2 4 3

AN66 AP66

C334 C335

7 5 3

8 6

B
CK2N CK2P
1 2

L208 NC
4 3

C214 1U

4 2 AV33

C231 1U

C256 0.1U

CLK22-C336 CLK22+C337

A7N A7P

L209 NC
1 2 4 3

AN77 AP77

C338 C339

GND

VDD_PANEL C260

AV33

L222 600R

AVDD33_VPLL

GND

C232 1U

0.1U

C220 1U

C257 0.1U

GND

A
GND

17953_529_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

57

SSB v2: Flash Memory

8 7 6
DV33

B10

FLASH MEMORY

B10
L223 600R 1 DV33 U202 HOLD# VCC NC PO2 PO1 PO0 CS# SO SCLK SI PO6 PO5 PO4 PO3 GND WP#/ACC MX25L3205 16 15 14 13 R270 10K 12 11 10 9 R246 4K7 R235 1K POOE# PDD1 8 7 6 5 DV33 C240 1U 2 3 4 GND R289 10K 5 6 7 8

U203

POCE0# POOE# PDD0 PDD1

252 251 250 249

POCE0_ POOE_ PDD0 PDD1

U0RX U0TX OIRI

95 94 93

U0RX U0TX OIRI_MT5335

CI_RB CI_PDD2

245 248

PARB_ PDD2

JTMS JTRST_ JTCK JTDO JTDI

253 1 256 255 254

JTMS JTRST# JTCK JTDO JTDI

POCE0# PDD0

R245 0R

FRESET# JTRST#

TVTREF#1 2 4 JTDI 6 5 7 9 11 13 15 17 19 P203 1 3

MT5335PKU

+5V +5V GND

JTMS 8 JTCK 10

E
AV33 BT3904 OIRI_MT5335 R233 10K R234 10K
E

Q3

C B

R90 10K

OIRI 6V3

JTDO C007 0.1U

R239 33R

12 14 16 JTAG_DBGRQ 18 JTAG_DBGACK 20 R237 10K R238 10K

C006 100U

R89 4K7

U0TX

GND 0R USB_DUSB_D+ 1 1 0R DV33 2 3 R87 EZJZ1V270RA R88 EZJZ1V270RA 4 C262 0.1U C234 1U C235 1U P200 C263 0.1U C264 0.1U R236 10K R2011 R2012 1

1 GND 2

U0RX

3 4

RS-232
GND DV33

P201

GND

OPWM2

R244 4K7

AOBCK AOLRCK

R240 4K7 R241 4K7 R242 NC\4K7

GND DV10 GND

GND

GND C270 0.1U C269 0.1U C268 0.1U C265 0.1U C266 0.1U C267 0.1U C236 1U C272 0.1U C237 1U C271 0.1U

Trap MODE DV10 DDRV_IC

U203 14 48 57 58 61 70 162 213 206 246 10 12 16 18 27 30 52 54 55 56 64 197 247

OPWM2 0 0

AOBLK 0 0

AOLRCK 0 1 GND DDRV_IC

NORMAL MODE ICE MODE

VCCK VCCK1 VCCK2 VCCK3 VCCK4 DVDD10 DVDD10_1 VCCK6 VCCK5 VCCK7

VCC2IO VCC2IO1 VCC2IO2 VCC2IO3 VCC2IO4 VCC2IO5 VCC2IO6 VCC2IO7 VCC2IO8 VCC2IO9 VCC3IO_3_2 VCC3IO_3_1 VCC3IO_3 E-PAD

TRAP MODE CORE RESET 1 US DV33

OPCTRL5 0

OPCTRL4 C277 0.1U C275 0.1U C279 0.1U C278 0.1U 1 C276 0.1U C238 1U C239 1U C274 0.1U C273 0.1U

GND
257

MT5335PKU

GND

A A

17953_530_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

58

SSB v2: SDRAM

8 7 6 5 4 3 2 1

B11
F

SDRAM

B11
+1V3D
U203

U204
RA0 RA7 RWE_ RBA0 RA6 RBA1 RA5 RRAS_ RA8 RA10 RA4 RCAS_ RA12 RCKE RA11 RA9 RA3 RA1 RA2 47 36 40 43 37 44 38 42 35 45 39 41 32 31 33 34 51 49 50 RA0 RA7 RWE# RBA0 RA6 RBA1 RA5 RRAS# RA8 RA10 RA4 RCAS# RA12 RCKE RA11 RA9 RA3 RA1 RA2 MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 14 17 19 25 43 50 53 1 18 33 3 9 15 55 61 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC NC1 NC2 NC3 NC4 NC5 NC6 VDD VDD1 VDD2 VDDQ VDDQ1 VDDQ2 VDDQ3 VDDQ4 VSS VSS2 VSS1 VSSQ1 VSSQ2 VSSQ VSSQ3 VSSQ4 VREF 49

MEM_VREF RDQ0 1 2 3 4
MEM_ADDR0 MEM_ADDR1 MEM_ADDR2 MEM_ADDR3 MEM_ADDR4 MEM_ADDR5 MEM_ADDR6 MEM_ADDR7 MEM_ADDR8 MEM_ADDR9 MEM_ADDR10 MEM_ADDR11 MEM_ADDR12

R271 47R

RDQS0 RDQM0 RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQS1 RDQM1 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 MEM_VREF RCS#

11 13 9 8 7 6 5 4 3 2 17 15 19 20 21 22 23 24 25 26 53 46

RDQS0 RDQM0 RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQS1 RDQM1 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 RVREF0 RCS_

8 7 6 5

MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3

1 2 3 4

R287 75R

8 7 6 5

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

29 30 31 32 35 36 37 38 39 40 28 41 42

RDQ1 RDQ2 RDQ3

RDQ4 RDQ5 RDQ6 RDQ7

1 2 3 4

R272 47R

8 7 6 5

MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7

1 2 3 4

R286 75R

8 7 6 5

MEM_ADDR13

RCLK0_ RCLK0

28 29

RCLK0# RCLK0

DDRV_IC

CLK CLK CKE

45 46 44

MEM_CLK0 MEM_CLK0# MEM_CLKEN RDQS0 MEM_CS# MEM_RAS# MEM_CAS# MEM_WE# MEM_DQS0 MEM_DQS1 MEM_DQM0 MEM_DQM1 RDQ11 MEM_BA0 MEM_BA1 RDQ10 RDQ9 RDQ8 1 2 3 4 RDQM0 RDQM1 RDQS1

CS RAS CAS WE

24 23 22 21

R248 47R R249 47R R250 47R R251 47R

MEM_DQS0 MEM_DQM0 MEM_DQM1 MEM_DQS1

R254 75R R255 75R R256 75R R257 75R

MT5335PKU

LDQS UDQS

16 51

MEM_ADDR12 MEM_ADDR11 MEM_ADDR9 MEM_ADDR8

1 2 3 4

R275 47R

8 7 6 5

RA12 RA11 RA9 RA8

34 48 66 6 12 52 58 64

LDM UDM

20 47

R273 47R

8 7 6 5

MEM_DQ11 MEM_DQ10 MEM_DQ9 MEM_DQ8

1 2 3 4

R285 75R

8 7 6 5

BA0 BA1

26 27

32M*16DDR R276 47R GND 8 7 6 5 RA7 RA6 RA5 RA4 +5V MEM_WE# MEM_CAS# MEM_RAS# 1 2 3 4 R277 47R 8 7 6 5 R261 100R 0R R266 RWE# RCAS# RRAS# RCLK0 R259 22R MEM_CLK0 0R R264 RCKE R258 22R MEM_CLKEN L224 600R R265 0R U200 8 7 6 5 NC3 NC2 VIN GND 1 2 3 4 L226 600R R267 C314 R269 1K 16V 220U 100K L225 600R C305 0.1U C306 0.1U C304 0.1U MEM_CS# MEM_RAS# MEM_CAS# MEM_WE# 1 2 3 4 R281 75R DDRV +1V3D R268 100K MEM_VREF R280 75R RDQ15 RDQ14 RDQ13 RDQ12 1 2 3 4 R274 47R R288 75R

MEM_ADDR7

1 2 3 4

8 7 6 5

MEM_DQ15 MEM_DQ14 MEM_DQ13 MEM_DQ12

1 2 3 4

8 7 6 5

MEM_ADDR6 MEM_ADDR5 MEM_ADDR4

8 7 6 5

VCNTL REFEN NC1 47U 6V3 C217 VOUT RT9199

MEM_CS# MEM_BA0 MEM_BA1

1 2 3 4

R278 47R

8 7 6 5

RCS# RCLK0# RBA0 RBA1 RA10

R260 22R

MEM_CLK0#

GND GND GND

MEM_ADDR10 MEM_BA1 MEM_BA0

1 2 3 4

8 7 6 5

MEM_ADDR10

+1V3D MEM_ADDR0 MEM_ADDR1 MEM_ADDR2 MEM_ADDR3 1 2 3 4 R279 47R 8 7 6 5 RA0 RA1 RA2 RA3 L213 600R 6V3 C349 220U
C349 IS CLOSE TO PIN33 OF DDR

DDRV

DDRV_IC MEM_ADDR7 MEM_ADDR6 MEM_ADDR5 C315 100U MEM_ADDR4 C284 0.1U C285 0.1U C287 0.1U C281 0.1U C283 0.1U C280 0.1U C282 0.1U C286 0.1U 16V 1 2 3 4

R282 75R

8 7 6 5

MEM_CLKEN

R252 75R R283 75R

GND MEM_VREF

MEM_ADDR12 MEM_ADDR11 +1V3D MEM_ADDR9 MEM_ADDR8 MEM_ADDR13 C216 1U C296 0.1U C297 0.1U C299 0.1U C298 0.1U

1 2 3 4

8 7 6 5

R253 75R R284 75R

C300 0.1U

+5V DDRV
4 4

C301 0.1U

MEM_ADDR3 MEM_ADDR2

1 2 3 4

8 7 6 5

R27

R28

R29

U201 LD1117S
VIN 3

GND
GND/ADJ1

+1V3D R262 110R

GND

MEM_ADDR1 MEM_ADDR0

OUT 2

2R2

2R2

2R2

C302 0.1U

C303 0.1U

C215 4U7

C200 100U GND

C288 0.1U

C289 0.1U

C291 0.1U

C295 0.1U

C294 0.1U

C292 0.1U

R263 120R

C316 1U

C293 0.1U

C290 0.1U

6V3

A
GND

GND

1.25 x (1+120/110) = 2.6V

17953_531_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

59

SSB v2: MT5335 Interface VGA

8 7 6 5 4
A

B12

MT5335 INTERFACE - VGA

B12

F
U203 VGA_L VGA_R YPBPR_L YPBPR_R AIN2_L AIN2_R SCT_L SCT_R AVDD33_AADC GND VIMD_AADC REFP_AADC GND 177 176 175 174 173 172 171 170 169 181 179 180 178 201 198 199 200 196 186 185 189 187 190 182 188 184 183 168

AIN0_L AIN0_R AIN1_L AIN1_R AIN2_L AIN2_R AIN3_L AIN3_R AVDD33_AADC AVSS33_AADC VMID_AADC REFP_AADC REFN_AADC

ASPDIF AOMCLK AOLRCK AOBCK AOSDATA0 AL1 AR1 AL2 AR2 AVDD33_KADAC0 AVDD33_KADAC1 AVSS33_KADAC0 AVSS33_KADAC1 ADAC_VCM AVDD33_DIG

ASPDIF
AOMCLK AOLRCK A0SDATA0

L234 600R

AOBCK

AL1O
AR1O AL2O AR2O AVDD33_ADAC0 AVDD33_ADAC1 GND GND ADAC_VCM AVDD33_DIG

MT5335PKU

AV33

D
AV33

D
L227 600R
AVDD33_AADC

AV33 C219 4U7 C307 0.1U C241 1U L231 600R

AV33 AVDD33_ADAC1

ADAC_VCM

C311 0.1U

GND AV33
AV33

GND L228 600R

C245 1U

GND

C246 1U

GND
REFP_AADC

GND AV33 C308 0.1U

C
C242 1U

C313 0.1U GND

GND

C
L230 600R
AVDD33_DIG VIMD_AADC

GND

AV33

C244 1U

C310 0.1U

C218 4U7

AV33
AV33

GND L229 600R

C312 0.1U

GND

AVDD33_ADAC0

GND C243 1U C309 0.1U

GND

GND

GND

B
GND

A A

17953_532_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

60

SSB v2: D/A Converter

8 7 6 5 4 3 2 1

B13 DIGITAL-ANALOG-CONVERTER
R906 33K C928 100P

B13

F
AL1O

C900 1U

F
C902 47U 6V3 R908 10R SPEAK-OUTL

R901 470R

R904 10K

R907 5K1

OPAVREF

R900 100K

C925 2200P

C929 NC

4 GND RC4558 VCC-

3 1IN+

2 1IN-

1 1OUT U1 AV9V

GND

GND

GND GND

VCC+

2OUT

AV9V_REF C912 1U

L16 600R

2IN+

2IN-

E
C930 NC
OPAVREF

E
C962 220U 16V

AR1O

C901 1U

R903 470R

R905 10K

R910 5K1 C927 100P

C903 47U 6V3

GND

R913 10R

SPEAK-OUTR

R902 100K

GND

C926 2200P

R909 33K

D
GND DV33

DAC
DV33DV33 R9020 10K U907 AOLRCK R9019 47K A0SDATA0 AOBCK 33R R9027 1 LRCLK DIN MCLK 14 13 10K R9023 10K R9024 12 11 10 9 8 1U C9017 ADCVA R9025 NC/33K DACVL DACVL R9030 33R AOMCLK R9021 10K 10K/NC R9022

33R R9028 2 33R R9029 3 4

FORMAT

OPAVREF AV9V_REF R914 10K

BCLK DEEMPH ENABLE DVDD VMID ROUT AGND DGND LOUT AVDD

OPAVREF

5 C9015 1U C9012 6 C9013 0.1U 7

C
R915 10K C911 1U C910 1U 0.1U

C9014 0.1U

C
R9017 470 L900 600R

SCT1_AUL_OUT

WM8501 GND C9018 0.1U

GND

GND

B
+5V L930 30R ADCVA ADCVA C9009 1U DV33 L931 30R DACVL

C9016 1U R9026 NC/33K

R9018 470

L901 600R

C913 1000P GND SCT1_AUR_OUT

C9008 1U

C9010 0.1U

C9011 1U GND

C914 1000P

A A

17953_533_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

61

SSB v2: HDMI Switch

8 7 6 5 4 3 2 1

B14
F

HDMI SWITCH
CEC-IN 1 R45 0R CEC

B14
F
R72 GND DV18-HDMI 2 L9 600R DV33 2 GND C20 0.1U C21 0.1U C22 0.1U C23 1U C19 1U EZJZ1V270RA L10 600R CI_DV18 DV18-HDMI

D3V3L4

D108

R21 4K7

AV18-HDMI GND C43 0.1U C38 C42 0.1U

P901 RX2+ GND1 RX2RX1+ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 +5V_HDMI1 CEC-IN R42 R41 NC\0R NC\0R HDMI1_SCL HDMI1_SDA
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 AGND7 RXC2+ RXC2AVCC18D HPD2 AVCC33C CEC-A CEC-D RPWR1 DSCL1 DSDA1 AVDD18B R1X2+ R1X2AGND6 R1X1+ R1X1AVCC33B R1X0+ R1X0-

C39 1U

0.1U

DV33-HDMI

CI_DV18

AV18-HDMI

GND R13 4K7 R59 4K7

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

R14 4K7

R15 4K7

R16 NC\4K7 R17 R18 R19 100R 100R 100R R20 HPDIN 100R OSDA1 OSCL1 HDMI_5V

L11 600R

C13 0.1U

C14 0.1U

C15 0.1U

C16 0.1U

RX1RX0+ GND3 RX0RXC+ GND4 RXCNC1 NC2 DDCCLK DDCDA GND5

DV33-HDMI

U904 SII9185

VCC HPD

AGND5 R1XC+ R1XCAVCC18C HPD1 I2CSEL/INT DGND1 DVCC18A RPWR0 DSCL0 DSDA0 AVDD18A R0X2+ R0X2AGND4 R0X1+ R0X1AVCC33A R0X0+ R0X0-

TX2+ TX2AGND1 TX1+ TX1AVCC18A TX0+ TX0AGND2 TXC+ TXCEXTSWING RESET# LSDA LSCL HPD0 AVCC18B R0XCR0XC+ AGND3

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

RX0_2 RX0_2B RX0_1 RX0_1B RX0_0 RX0_0B RX0_C RX0_CB R31 750R

GND

D105 D5V0S1

D106 D5V0S1

D104 D5V0S1

D107 D5V0S1

GND

C134 10P

C133 10P

C135 10P

C17 0.1U

GND2

C12 0.1U

C11 0.1U

GND

C136 10P

AGND9 TPWR/I2CADDR TSCL TSDA HPDIN RSVDL DGND2 DVCC18B RPWR2 DSCL2 DSDA2 AVDD18C R2X2+ R2X2AGND8 R2X1+ R2X1AVCC33D R2X0+ R2X0-

R12 NC\4K7

R11 4K7

D
DV33

R929 7K5

+5V_HDMI1 R32 NC\4K7 R33 100R RESET_N T Z903 R47 47K R48 47K HDMI1_SCL HDMI1_SDA T Z901 +5V_HDMI0 T Z902 R34 NC\100R NC\100R U906 OSDA0 C41 0.1U OSCL0 1 8 A0 VCC 2 7 A1 WP 6 3 A2 SCL 4 5 GND SDA AT24C02 GND R57 4K7 T

GND

CEC

DV33

R30 NC\4K7

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

GND

R35

Z983

P903 RX2+ GND1 RX2RX1+ GND2 RX1RX0+ GND3 RX0RXC+ GND4 RXC1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 R928 7K5 +5V_HDMI0 R58 4K7 HDMI0_SCL HDMI0_SDA

4K7 R51 GND R52 4K7

DV33

T Z904

R54 4K7 R55 4K7 Q2 BT3904

C B

T Z908 1 2 C40 0.1U 8 VCC 7 WP 3 6 A2 SCL 4 5 GND SDA AT24C02 A0 A1 GND R50 47K HDMI0_SCL HDMI0_SDA T Z906 T Z905 U905 R56 4K7 T

Z982

GND R53 100R HDMI_SEL

T Z907

NC1 NC2 DDCCLK DDCDA GND5 VCC HPD

R49 47K

GND

5 D3V3L4

D109

GND

17953_534_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

62

SSB v2: I/O Scart

8 7 6 5 4 3 2 1

B15 I/O - SCART

P1
AOR

B15
T Z921 T Z925 T Z926 T Z924

Nearly Connector
SCT1_AV_IN L903 30R R970 100R

Nearly 5335
C968 0.047U
SY0

1 12 2 13 3 14 4 15 5 16 6 17 7 18 8 19 9 20

SCT1_AUR_OUT

AIR AOL AGND BGND AIL B SWITCH GGND CLKOUT

SCT1_AUR_IN
SCT1_AUL_OUT

R968 75R

F
C967 47P C969 1U
GND_SV

SCT1_AUL_IN
SCT1_B_IN

GND SCT1_G_IN 1 L904 30R

SCT1_FS_IN

R969 68R

C971 0.01U

Y0P

G DATA RGND DATAGND R BLNK VGND BLNKGND VOUT

SCT1_G_IN

R60 EZJZ1V270RA GND

R971 75R

C970 16P R972 100R R973 68R C972 0.01U C974 0.01U

E
Y0N

GND SCT1_B_IN
SCT1_R_IN

L905 30R

PB0P

STC1_FB_IN

R975 75R R61 EZJZ1V270RA R976 75R L906 30R GND

C973 16P R974 100R C975 0.01U

PBR0N

10 SCT1_AV_OUT 21 11 1 1 SCT1_AV_IN

D
VIN SHIELD

T Z920 T Z928 T Z923 T Z919 T Z918 T Z922 T Z927 R64 EZJZ1V270RA

GND SCT1_R_IN 1 2

C976 16P R977 68R R978 100R C977 0.01U C978 0.047U PR0P

R63

SC0

R62 SCT1_AUR_OUT EZJZ1V270RA 1 SCT1_AUL_OUT 1

2 EZJZ1V270RA

2 GND 2

R67 EZJZ1V270RA 2

R68 EZJZ1V270RA

GND

GND

STC1_FB_IN 1

L907 30R

R963 SOY0 0R

SCT1_AUR_IN

L1 30R L2 30R

R964 10K R965 10K R966 10K R967 10K

2 GND

NEARLY MT5335
C965 1U C966 1U SCT_R SCT_L

SCT1_AUL_IN

C979

R65 EZJZ1V270RA 2 SCT1_FS_IN 1 L908 30R

470P

R960 75R

C963 470P

C964 470P

GND R961 33K

SCART_FS_IN

C980 470P

R962 10K

GND

A A
2 R66 EZJZ1V270RA GND

17953_535_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

63

SSB v2: I/O Side AV, S-Video, Audio

8 7 6 5 4 3 2 1

B16

I/O - SIDE AV, SVIDEO, AUDIO

AV_5V
CVBS0

Close to MT5382p

R945 100R

C953 0.047U

T Z917
132 130 129 128 127 126 125

U203 139 140 133 131 124 141 142 137 138 135 134 DVDD25_VADC GND GND_CVBS GND_SV AVDD25_VADC GND AVDD25_REF GND AVDD25_VFE GND

B16
DVDD25_VADC DVSS25_VADC GND_TUNER GD_CVBS GND_SV AVDD25_VADC AVSS25_VADC AVDD25_REF AVSS25_REF AVDD25_VFE AVSS25_VFE

CVBS1

CVBS2 C003 1U R9003 10K C004 0.01U 10R L925

SY0 SC0 SY1 SC1 D2SA

F
CVBS_OUT

R918 0R R919 NC

CVBS0 CVBS1 CVBS2 SY0 SC0 SY1 SC1

C920 1U GND_TUNER

136

D2SA

C001 47U 6V3

R920 1K

GND
B

BC847C Q815 R9004 75R R924 0R R923 0R

C

D2SA

CI_GPIO14

SCT1_AV_OUT

R9001 470R

R9002 10K

Q906 BC847C

B E

R921 4K7 R944 4K7

MT5335PKU

C002 47P

GND

GND AV25

Nearly Connector
P902
7

Nearly 5335
R946 100R C959 0.047U SY1

AV25

T Z975 1

L915 30R

L911 600R C916

DVDD25_VADC C954 0.1U

D
6 8

R70 T Z974 2 GND GND 1 R69 EZJZ1V270RA L916 30R EZJZ1V270RA

R947 75R

C958 47P AV25

AV25 L912 600R

1U

D
GND AVDD25_VADC

C917 R948 100R C961 0.047U SC1 AV25 AV25 L913 600R R949 75R C960 47P AV25 AV25 GND Z980 T P902
WHITE

C955 0.1U

1U

GND AVDD25_REF C918 1U C956 0.1U

Z981 T L926 30R L927 30R R9010 10K R9009 10K R9012 10K R9011 10K C9001 1U C9002 1U

L914 600R C919

GND AVDD25_VFE C957 0.1U

4 3

AIN2_L AIN2_R

1U

RED

2
YELLOW

GND

1 EZJZ1V270RA

C9004 470P

C9003 470P

B
GND 1 R71

GND L928 30R T Z976 R9014 75R

R9013 100R

C9006 0.047U

CVBS2

C9007 47P C915 1U GND_CVBS

A
T Z978

GND

17953_536_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

64

SSB v2: MT5335 Interface YPbPr & VGA

8 7 6 5 4 3 2 1

B17
WHITE

MT5335 INTERFACE - YPbPr, VGA

Nearly 5335 Nearly Connector
1 2 3 R984 0R C728 4700P

B17
SOY1

F
GREEN

YPBPR_L_IN Y_IN Y_IN L4 30R R981 68R C730 0.01U

F
Y1P
U203

RED

4 5 6

YPBPR_R_IN PB_IN

BLUE

R982 75R

C731 16P R983 100R C729 0.01U

Y1N

RED

PR_IN 7 VGA_R_IN GND

SOY0 Y0P Y0N PB0P PBR0N PR0P SOY1

10 9 P907 8 R985 75R 1 1 1 1 PB_IN L5 30R PB1P T Z939 VGA_L_IN R986 68R C726 0.01U

Y1P Y1N PB1P PBR1N PR1P T Z940

107 108 109 114 115 116 118 119 120 121 122 123 112 111

SOY0 Y0P Y0N PB0P PBR0N PR0P SOY1 Y1P Y1N PB1P PBR1N PR1P TN1 TP1

DVDD12_VGA AVSS12_RGBADC AVDD12_RGBADC AVSS12_RGBFE AVDD12_RGBFE RP RN BP BN GP GN VSYNC HSYNC SOG

117 113 110 105 101 104 106 98 99 102 103 96 97 100

DVDD12_VGA GND AVDD12_RGBADC GND AVDD12_RGBFE RP RN BP BN GP GN VSYNC HSYNC SOG

C727 16P R987 100R C725 0.01U PBR1N AV12 AV12 L909 600R

MT5335PKU

R74 EZJZ1V270RA R77 EZJZ1V270RA GND L6 30R R989 68R C723 0.01U

DVDD12_VGA C987 1U C988 0.1U

PR_IN

PR1P

GNDR75 EZJZ1V270RA

2 T Z929

2 R76

EZJZ1V270RA

R988 75R

AV12 C724 16P AV12 L910 600R C989 1U GND AVDD12_RGBADC C990 0.1U

GND

AV12 AV12 L3 600R C991 GND AVDD12_RGBFE C992 0.1U

C
P904 BLACK 1 2
SPDIF_OUT

C732 0.1U

R979 100R

ASPDIF

1 C993 33P 2 R73 EZJZ1V270RA GND R980 100R

1U

GND

B
L8 30R L7 30R R990 10K R991 10K R992 10K R993 10K C721 1U C720 1U

YPBPR_L_IN YPBPR_R_IN

YPBPR_L YPBPR_R

C719 470P

C722 470P

A A

GND

17953_537_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

65

SSB v2: I/O VGA

8 7 6 5 4 3 2 1

B18

I/O - VGA
Nearly 5335
T Z945 T Z941 T Z942 T Z943 T Z944 T Z946 T Z948 T Z947 T Z955 GREEN
VGASCL_IN

B18
VGA_PLUGPWR Z973 T

P908 16 5 15 10 4 14 9 W/P_CTR
VSYNC_IN

Nearly Connector
L918 30R

R998 0R

C712 4700P

VGA_PLUGPWR SOG C996

R719 33R

C714 0.01U

0.1U GP 1 U903 8 VCC 7 2 A1 WP 6 3 A2 SCL 5 4 GND SDA AT24C02 A0 W/P VGASCL VGASDA

R715 10K Z970 T Z971 T Z972 T

R716 0R

W/P VGA_PLUGPWR

R996 75R

C715 16P R997 100R C713 0.01U C710 0.01U

3 1 BLUE
HSYNC_IN

2 D913 BAV70

+5V L919 30R

GN BP

3 13 8 2 12 7 1 11

C005 ESD_0402

BLUE

GND

R720 33R

E
5VSB 5VSB R714 10K VGASDA_IN R713 100R GND VGASCL_IN

GREEN
VGASDA_IN

GND

R999 75R

C711 16P R701 100R C709 0.01U C707 0.01U BN R712 100R

RED

R86 EZJZ1V270RA

EZJZ1V270RA

GND

Q904 C143ZT

RED

L920 30R

R721 33R

RP U0TX
E

Q903 C143ZT

R702 75R

R84

16P R703 100R C706 0.01U RN

GND R85 EZJZ1V270RA GND

SW_UPDATE_CTL1
B

Q905 C143ZT

GND

R725 10K

T Z949 T Z950 L924 30R L923 30R R704 10K R705 10K C702 1U C701 1U

C708

17

U0RX

C B

C
5VSB VGA_R VGA_L 5VSB 5VSB C999 470P C703 470P R709 100R R711 100R R706 10K R707 10K R708 10K R710 10K GND 5VSB

VGA_R_IN

VGA_L_IN

VGASCL_IN

VGASCL

VGASDA_IN 1

VGASDA

GND R80 HSYNC_IN 1 R718 22K R82 C705 10P 2 EZJZ1V270RA 2 L921 30R HSYNC VSYNC_IN 1 R717 22K R83 C704 10P GND GND EZJZ1V270RA L922 30R VSYNC EZJZ1V270RA 2 C998 16P R81 EZJZ1V270RA 2

C997 16P

GND GND

17953_538_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

66

SSB v2: LVDS Receiver

8 7 6 5 4 3 2 1

B19

LVDS RECEIVER
DV33A T_R7 R293 100R 10P 10P 10P 10P C010 C011 C012 C013 VDD_PANEL

B19
1 2 3 4 R294 100R 8 R7 7 R6 6 R5 5 R4

DV33A L929 600R DV33A_LVDS_RECEIVER

T_R6 T_R5 T_R4

T_R3 C2202 C2001 C2004 C2006 C2007 C2015 T_R2 T_R1 T_R0 0.1U 0.1U GND 0.1U 0.1U 0.01 T_G7 T_G6 T_G5 T_G4 DV33A_LVDS_RECEIVER

1 2 3 4

8 R3 7 R2 6 R1 5 R0

10P 10P 10P 10P 10P 10P 10P 10P

C014 C015 C016 C017 C018 C019 C020 C021 G1 G3 R1 R3 40 38 36 34 32 30 28 26 24 22 20 18 B1 B3 16 14 12 10 8 D_HSYNC 6 4

P205 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 D_VSYNC PANEL_CTL2 CLK B0 B2 B4 B6 G0 G2 G4 G6 R0 R2 R4 R6

C2010 0.1U

1 2 3 4

R295 100R

GND

8 G7 7 G6 6 G5 5 G4

R5 R7

U207
T_G3 T_B5 T_HSYNC T_VSYNC T_DE T_R6 AN00 AP00 AN11 AP11 AN22 AP22 CLK11CLK11+ AN33 AP33
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 RXOUT22 RXOUT23 RXOUT24 GND1 RXOUT25 RXOUT26 RXOUT27 LVDSGND1 RXIN0RXIN0+ RXIN1RXIN1+ LVDSVCC1 LVDSGND2 RXIN2RXIN2+ RXCLKINRXCLKIN+ RXIN3RXIN3+ LVDSGND3 PLLGND1 PLLVCC1 PLLGND2 PWRDWN RXCLKOUT RXOUT0 GND2 VCC4 RXOUT21 RXOUT20 RXOUT19 GND5 RXOUT18 RXOUT17 RXOUT16 VCC3 RXOUT15 RXOUT14 RXOUT13 GND4 RXOUT12 RXOUT11 RXOUT10 VCC2 RXOUT9 RXOUT8 RXOUT7 GND3 RXOUT6 RXOUT5 RXOUT4 RXOUT3 VCC1 RXOUT2 RXOUT1 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29

1 2 3 4

R296 100R

8 G3 7 G2 6 G1 5 G0

10P 10P 10P 10P

C022 C023 C4 C024

G5 G7

T_B4 T_B3 T_B2 T_B1 T_B7 T_B6 T_B0 T_G5 T_G4 T_G3 T_G7 T_G6 T_G2 T_G1 T_G0 T_R5 T_R7 T_R4 T_R3 T_R2 T_R1

T_G2 T_G1 T_G0

T_B7 T_B6 T_B5 T_B4

1 2 3 4

R298 100R

8 B7 7 B6 6 B5 5 B4

10P 10P 10P 10P

C025 C026 C027 C028

B5 B7

T_B3 T_B2 T_B1 T_B0

1 2 3 4

R299 100R

8 B3 7 B2 6 5 B1 B0

10P 10P 10P 10P

C029 C030 C031 C032 GND

DE

PWRDN T_CLK T_R0

V386 T_DE GND

1 2

R290 100R

GND 8 7 6 5 DE D_VSYNC D_HSYNC

T_VSYNC 3 T_HSYNC 4 DV33A L239 120R R292 33R

B
DV33A R291 10K AP00 AP11 AP22 CLK11+ AP33
C

T_CLK

CLK C2011 16P

AN00 AN11 AN22 CLK11AN33

R23 100R R24 100R R2003 100R R2004 100R R2005 100R

GND PWRDN PWRDN_EN

B

Q5 C143ZT

A
GND

17953_539_090330.eps 090331

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

67

Layout Small Signal Board v2 (Top Side)

17953_600_090330.eps 090330

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

68

Layout Small Signal Board v2 (Bottom Side)

17953_601_090330.eps 090330

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

69

Keyboard Control Panel

E
P601 4 3

KEYBOARD CONTROL
R601 390R R602 1K 5VIN 5VSB R701 0 R603 1K5 R604 2K7 R605 4K3 C601 0.1U R606 7K5 volvol+ menu
1 2 1 2 1 2

E
K606 K605 K604
3 4 3 4 3 4

Personal Notes:

2GND 1 KEY

chch+

1 2 1 2

K603 K602

3 4 3 4

POWER

1 2

K601

3 4

I_17930_031.eps 250408

Layout Keyboard Control Panel (Top Side)

I_17930_032.eps 220408

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

70

Inverter Panel
1 2 3 4 5 6 7 8

INVERTER
CN1 1 2 3 4 5 6 F1 5A C1 220uF/25V C3 220uF/25V R17 100(1206) 4

I
T1 CN2
7

C28 10pF
1 6 C35 C36 NC 222 C37 471

1 2

Q4 DTA143

D17 BAV99

O/S 1

R50 820
D R24 R4 5.6K NC C4 104 K IC-Vcc ZD1 8.2V D9 A R34 22K BAW56K C16 4 R5 47K C5 105 R31 NC D7 2222 R35 150 R43 10 C22 105 223 R42 10 3 2 1 U2 G2 S2 G1 S1 D2 D2 D1 D1 5 1 6 7 8 6 C53 222 C38 NC C20 225(1206) C21 225(1206) 4 C FB D

Q1 DTC143

C14 105

T2

C29 10pF
C39 471 CN3 1 2 3 4 5 CON5 D B O/S2

D23 BAV99

D21 BAV99

D10 1N4148 R6 270K R2 0 U1 1 C6 105 2 3 O/S 4 5 C7 681 C8 NC R8 33k R9 16k 6 7 8 C 223 R22 C9 331 C10 NC 22 R37 150 15 14 13 12 11 10 9 R21 22 R36 22K 16 R20 100K R18 R19 100K 100K C15 103 R30 560 A K ZD2 4.3V Q7 2907

R54 820
FB

D27 BAV99

D11

T3

R7 20K

C30 10pF
BAW56K 6 C40 D2 D2 D1 D1 5 6 7 8 FB 222 C41 NC C42 471 U3 4 R44 10 3 2 R45 10 C23 105 1 G2 S2 G1 S1

C17

D18 BAV99 R51 820

O/S 3

D12 1N4148 Q2 R12 100 2N7002

4 R56 2K R26 NC C11 103 R33 NC D8 2222 1

T4

D24 BAV99
7

6 C49 222 C50 NC C51 471 CN4

D4
R23 0 R13 NC C12 104 R25 1K K FB R57 4.7K R32 560 A

R11 3K

BAV99

ZD3 4.3V

B O/S 4

C31 10pF

Q8 2907

D19 BAV99

R52 820

1 2 3 4 5 CON5

U1B LM393 B B R61 510K C52 105 R28 3K

D26 1N4148

R38 22K

D13

C25 225(1206)

C24 225(1206)
4

FB

T5

BAW56K C18 4 223 R46 10 3 2 U1A C54 105 R62 3K D25 1N4148 VCC / 8.2V R64 10K R39 150 R47 10 C26 105 D14 1N4148 1 U4 G2 S2 G1 S1 D2 D2 D1 D1 5 1 6 7 8 6

C32 10pF
C48 C47 NC 471 D O/S 5 C46 222

D20 BAV99

R53 820

A R63 510K C55 105 LM393

Q10 DTA143

FB

D15 R58 10K IC-Vcc R27 100 Q5 DTA143 R41 150 D16 R1 300K Q3 2222 O/S 5 O/S 6 BAW56K R3 100K C13 105 C34 105 R16 1M\NC R29 NC 1N4148 Q6 2N7002 D6 O/S R601K R59 30K Q11 2222 C56 104 C19 4 223 R48 10 3 2 R49 10 C27 105 1 R40 22K

T6

CN5
7

C33 10pF
1 BAW56K U5 G2 S2 G1 S1 D2 D2 D1 D1 5 6 7 8 6 C43 222 C44 NC C45 471 C

1 2

D1/NC O/S 1 O/S 2 BAW56K D2/NC O/S 3 O/S 4 A BAW56K D3/NC R15 100K

R10 1M

D5 1N4148

O/S 6

R14 1M

D22 BAV99
FB

R55 820

1N4148

I_17930_035.eps 220408
1 2 3 4 5 6 7 8

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

71

Layout Inverter Panel (Top Side)

I_17930_036.eps 220408

Layout Inverter Panel (Bottom Side)

I_17930_037.eps 220408

Circuit Diagrams and PWB Layouts

TCM2.0E LA

7.

72

IR LED Panel

IR & LED
IR

J
G1

Personal Notes:

VCC GND

R6 100R

R5 100R

P1 5 4 3 2 1 +5V 6V3 IR C3 47U GND LED1 LED2

R9 4K7

C1 10U

R7 4K7

R1 4K7

C B

R3 1K

10U

C2

Q1 Q2

E B C

R4 3K3 BT3906

BT3904 E

D3

R2 4K7

R51 4K7 R52 4K7

1
R

3 D1
W

C B

2 Q5

BT3904 E

I_17930_033.eps 220408

Layout IR LED Panel (Top Side)

I_17930_034.eps 220408

E_06532_012.eps 131004

Alignments

TCM2.0E LA

8.

EN 73

8. Alignments
Index of this chapter: 8.1 Electrical Alignments 8.2 Hardware Alignments 8.3 Software Alignments Note: The Service Modes are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter. Table 8-2 Alignment for 26" with a colour analyser Cool (11000K) Normal (9000K) Warm (6500K) x (70 IRE) 0.278 +/- 0.003 0.289 +/- 0.003 y (70 IRE) 0.278 +/- 0.003 0.291 +/- 0.003 8.3.2 Display Code When after an SSB or display exchange, the display option code is not set properly; it will result in a TV with no display or strange resolution. Therefore, it is required to set this display option code after such a repair. To do so, press (slowly) the following key sequence on a standard RC transmitter: 062598 directly followed by MENU and xxx, where xxx is a 3 digit decimal value of the panel type: see column Display code in table below. When ready, the set will go to stand-by. After this, perform a cold start. LCD Panel: AUO 19 CMO 19 - M190Z1-L01 LG 20 - LC201V02-SDD1 AUO 22 CMO 22 - M220Z1-L03 AUO 26 - T260XW03 V3 AUO 26 VM CMO 26 Display Code: 096 094 093 097 022 030 098 095 0.314 +/- 0.003 0.319 +/- 0.003

8.1

Electrical Alignments
Perform all electrical adjustments under the following conditions: Power supply voltage (depends on region): AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%). AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%). EU: 230 VAC / 50 Hz ( 10%). LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%). US: 120 VAC / 60 Hz ( 10%). Connect the set to the mains via an isolation transformer with low internal resistance. Allow the set to warm up for approximately 60 minutes. Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heatsinks as ground. Test probe: Ri > 10 M, Ci < 20 pF. Use an isolated trimmer/screwdriver to perform alignments.

8.2

Hardware Alignments
Not applicable.

8.3
8.3.1

Software Alignments
White Balance Adjustment (VGA Mode) Only VGA input requires colour temperature adjustment as all other inputs or relative ones. Both WARM and COOL colour coordinates are also relatives to NORMAL colour temperature mode ones. Equipment requirements: Colour analyser (e.g Minolta CA210). Pre conditions: Picture Preset: Standard. Black Expand: Off. Tone: Normal. Dynamic Contrast: Off. Colour Temp Alignment Apply a 1366768@50Hz signal with white pattern, set brightness at 100%, and contrast at 50%. Adjust the R, G, and B sub-gain for the screen centre. The 1931 CIE chromaticity (x, y) co-ordinates shall be: Table 8-1 Alignment for 19", 20", and 22" with colour analyser Cool (9000K) Normal (8000K) Warm (6500K) 0.314 +/- 0.003 0.319 +/- 0.003

x (70 IRE) 0.289 +/- 0.003 0.296 +/- 0.003 y (70 IRE) 0.291 +/- 0.003 0.299 +/- 0.003

EN 74

9.

TCM2.0E LA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

Index of this chapter: 9.1 Introduction 9.2 Block Diagram 9.3 Abbreviation List 9.4 IC Data Sheets Notes: Only new circuits (circuits that are not published recently) are described. Figures can deviate slightly from the actual situation, due to different set executions.

9.1

Introduction
This chassis is a digital derivative from the TCM1.0E LA chassis and supports DVB-T reception. It uses the Mediatek MT5335 main chip. It processes the following input/output signals: Analog and digital RF signals (PAL B/G, D/K, I, SECAM B/ G, D/K, L/L, DVB-T) SCART input signals (CVBS & RGB) CMP input signals (YPbPr) VGA input signals HDMI input signals, v1.2 compliant, with HDCP, audio included as EIA-861B standard S-Video input Headphone output SPDIF output. The platform is also designed for the lowest power consumption in off/stand-by mode (<0.3W) to fulfil new Philips CE environment policy requirement. The MT5335 is surrounded by a tuner, a video demodulator, a HDMI interface, SDR and flash memory, an audio amplifier, and optionally a stand-by microprocessor (26"). For the smaller set versions also the inverter board is serviceable. For the block diagram, refer also to chapter 6 Block diagrams, Test Point Overviews, and Waveforms.

9.2

Block Diagram

I_17951_012.eps 060808

Figure 9-1 Block diagram

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.3 Abbreviation List
0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format 1080 visible lines, interlaced 1080 visible lines, progressive scan Spatial (2D) Noise Reduction Temporal (3D) Noise Reduction Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Automatic Noise Reduction: one of the algorithms of Auto TV Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair COlor LUMinance Baseband Universal Sub-system Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Color Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification DDC D/K DFI DFU DMR DMSD DNM DNR DRAM DRM DSP DST

TCM2.0E LA

9.

EN 75

1080i 1080p 2DNR 3DNR AARA

ACI

DTCP

ADC AFC

AGC

AM ANR AP AR ASF

DVB-C DVB-T DVD DVI(-d) E-DDC

EDID EEPROM EMI EPLD EU EXT FBL FDS FDW FLASH FM FPGA FTV Gb/s G-TXT H HD HDD HDCP

ATSC

ATV Auto TV

AV AVC AVIP B/G BLR BTSC

B-TXT C CEC

CL CLR COLUMBUS ComPair CP CSM CTI

HDMI HP I I2 C I2D I2S IF Interlaced

CVBS DAC DBE

See E-DDC Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion Directions For Use: owner's manual Digital Media Reader: card reader Digital Multi Standard Decoding Digital Natural Motion Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Fast BLanking: DC signal accompanying RGB signals Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A key encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a snow vision mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP software key decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Scan mode where two fields are used to form one frame. Each field contains

EN 76

9.

TCM2.0E LA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

3.575612 MHz and PAL N= 3.582056 MHz) Printed Circuit Board (same as PWB) Pulse Code Modulation Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Power On Reset, signal to reset the uP Scan mode where all scan lines are displayed in one frame at the same time, creating a double vertical resolution. Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as PCB) Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorcepteurs et Tlviseurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see ITU-656 Synchronous DRAM SEequence Couleur Avec Mmoire. Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Sony Philips Digital InterFace Static RAM Service Reference Protocol Small Signal Board STand-BY 800x600 (4:3) Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280x1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600x1200 (4:3)

IR IRQ ITU-656

ITV JOP LS

LATAM LCD LED L/L'

LORE LPL LS LVDS Mbps M/N MIPS

MOP MOSFET MPEG MPIF MUTE NC NICAM

NTC NTSC

NVM O/C OSD OTC P50 PAL

half the number of the total amount of lines. The fields are written in pairs, causing line flicker. Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Jaguar Output Processor Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LOcal REgression approximation noise reduction LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M=

PCB PCM PDP PFC PIP PLL

POR Progressive Scan

PTC PWB PWM QRC QTNR QVCP RAM RGB

RC RC5 / RC6 RESET ROM R-TXT SAM S/C SCART

SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM

SIF SMPS SoC SOG SOPS S/PDIF SRAM SRP SSB STBY SVGA SVHS SW SWAN SXGA TFT THD TMDS TXT TXT-DW UI uP UXGA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

V VCR VESA VGA VL VSB WYSIWYR V-sync to the module Video Cassette Recorder Video Electronics Standards Association 640x480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280x768 (15:9) Quartz crystal 1024x768 (4:3) Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video

TCM2.0E LA

9.

EN 77

WXGA XTAL XGA Y Y/C YPbPr

YUV

EN 78 9.4

9.

TCM2.0E LA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

IC Data Sheets
This section shows the internal block diagrams and pin layouts of ICs that are drawn as "black boxes" in the electrical diagrams (with the exception of "memory" and "logic" ICs).

9.4.1

Diagram B, MT5133

Block Diagram

Pin Configuration

I_17950_048.eps 080808

Figure 9-2 Block diagram & pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.4.2 Diagram B, MT5335

TCM2.0E LA

9.

EN 79

Block Diagram
TS In CVBS/ Analog YC Input Input
Component HDMI Rx

Tuner In Audio Demod

Audio Input

Panel

16-bit DDR

VADCx4 TV Decoder

HDMI In I/F

Audio ADC

LVDS

DDR DRAM Controller

Audio In
TS Demux

Mix and Post Processing

VDO-In De-interlace JPEG,MPEG 2-D Graphic OSD scaler Vplane scaler

ARM BIM

DRAM Bus IO Bus CKGEN Audio DSP Audio I/F Audio DAC SPDIF, I2S
Figure 9-3 Block diagram 9.4.3 Diagram B, MT8295

JTAG BScan

IrDA PCR

Serial IF RTC

USB2.0

Watchdog

Serial Flash PWM

Servo ADC NAND Flash

I_17950_049.eps 090508

UART

MS,SD,SM,xD

Block Diagram

I_17950_050.eps 090508

Figure 9-4 Block diagram

EN 80
9.4.4

9.

TCM2.0E LA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Diagram B, SIL9185

Block Diagram

H_17370_074.eps 100807

Figure 9-5 Block diagram 9.4.5 Diagram B, TDA9886

CVAGC(pos) VAGC (1) 16 (17) CBL

VIF-PLL filter VPLL 19 (21)

external reference signal or 4 MHz crystal

TOP 9 (8)

TAGC 14 (15) CAGC(neg)

REF 15 (16)

AFC 21 (23)

TUNER AGC

VIF-AGC

RC VCO

DIGITAL VCO CONTROL

AFC DETECTOR

VIF2 VIF1

2 (31) 1 (30) VIF-PLL

SOUND CARRIER TRAPS 4.5 to 6.5 MHz

(18) 17

CVBS video output: 2 V (p-p) [1.1 V (p-p) without trap]

TDA9885 TDA9886
(7) 8 SIF2 SIF1 24 (27) 23 (26) SINGLE REFERENCE QSS MIXER INTERCARRIER MIXER AND AM DEMODULATOR MAD (4) 6 SUPPLY SIF-AGC CAGC (6, 12, 13, 14, 17, 19, 25, 28, 29, 32) 13 n.c. OUTPUT PORTS I 2C-BUS TRANSCEIVER NARROW-BAND FM-PLL DEMODULATOR AUDIO PROCESSING AND SWITCHES (3) 5

AUD DEEM

audio output

de-emphasis network AFD CAF

20 (22) VP

18 (20) AGND

3 (1) OP1

22 (24) 11 (10) OP2 SCL

10 (9) SDA

7 (5) DGND

12 (11) SIOMAD

4 (2) FMPLL FM-PLL filter

(1) Not connected for TDA9885. Pin numbers for TDA9885HN and TDA9886HN in parenthesis.

sound intercarrier output and MAD select

I_17930_072.eps 250408

Figure 9-6 Block diagram

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.4.6 Diagram B, V386

TCM2.0E LA

9.

EN 81

Block Diagram
RxIN0+ RxIN0RxIN1+ RxIN1RxIN2+ RxIN2RxIN3+ RxIN3RxCLKIN+ RxCLKINPWRDWN
PLL LVDS to TTL De-serializer
8 8 8

RED GREEN BLUE HSYNC VSYNC DATA ENABLE CONTROL RxCLKOUT

RxOUT0..27

V386

Pin Configuration
RxOUT22 RxOUT23 RxOUT24 GND RxOUT25 RxOUT26 RxOUT27 LVDS_GND RxIN0RxIN0+ RxIN1RxIN1+ LVDS_VCC LVDS_GND RxIN2RxIN2+ RxCLKINRxCLKIN+ RxIN3RxIN3+ LVDS_GND PLL_GND PLL_VCC PLL_GND PWRDWN RxCLKOUT RxOUT0 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VCC RxOUT21 RxOUT20 RxOUT19 GND RxOUT18 RxOUT17 RxOUT16 VCC RxOUT15 RxOUT14 RxOUT13 GND RxOUT12 RxOUT11 RxOUT10 VCC RxOUT9 RxOUT8 RxOUT7 GND RxOUT6 RxOUT5 RxOUT4 RxOUT3 VCC RxOUT2 RxOUT1

56-pin TSSOP V386

I_17950_051.eps 090508

Figure 9-7 Block diagram & pin configuration

EN 82
9.4.7

9.

TCM2.0E LA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Diagram B, WM8501

I_17930_073.eps 250408

Figure 9-8 Block diagram

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.4.8 Diagram B, WT6702

TCM2.0E LA

9.

EN 83

Block Diagram
Turbo 8031 MCU

8K bytes code flash Internal 256 bytes SRAM 32K Oscillator RTC RC Oscillator Key Pad ADC Reset Processor Clock Processor Clock off & Wake Up Watchdog timer
internal bus

8051 UART,Timer0, Timer1 1st SIIC

2nd SIIC

3rd SIIC HV DPMS Detector Interrupt Processor IR Detector

PWM 4 IRQ Processor GPIO Processor

Pin Configuration
32KOSCO 32KOSCI VSS NRST PWM1/GPIOC1 RXD/IRQ3/GPIOB7 TXD/IRQ2/GPIOB6 HIN/GPIOB5 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD GPIOA0/AD0 GPIOA3/AD3/IR GPIOA6/SCL1 GPIOA7/SDA1 GPIOB0/SCL2 GPIOB1/SDA2 GPIOB4/VIN

Package Type
SOP 16 pin SOP 20 pin SSOP 20 pin SOP 24 pin

Package Outline
150mil 300mil 150mil 300mil

WT6702F_S161

32KOSCO 32KOSCI VSS NRST PWM1/GPIOC1 RXD/IRQ3/GPIOB7 TXD/IRQ2/GPIOB6 HIN/GPIOB5 VIN/GPIOB4 IRQ1/P1.3/GPIOB3

1 2 3 4 5 6 7 8 9 10

WT6702F_S200

20 19 18 17 16 15 14 13 12 11

VDD_RTC VDD GPIOA0/AD0 GPIOA3/AD3/IR GPIOA4/SCL3/P1.0 GPIOA5/SDA3/P1.1 GPIOA6/SCL1 GPIOA7/SDA1 GPIOB0/SCL2 GPIOB1/SDA2

32KOSCO 32KOSCI VSS NRST PWM1/GPIOC1 PWM0/GPIOC0 RXD/IRQ3/GPIOB7 TXD/IRQ2/GPIOB6 HIN/GPIOB5 VIN/GPIOB4 IRQ1/P1.3/GPIOB3 IRQ0/P1.2/GPIOB2

1 2 3 4 5 6 7 8 9 10 11 12

WT6702F_S240

24 23 22 21 20 19 18 17 16 15 14 13

VDD_RTC VDD GPIOA0/AD0 GPIOA1/AD1 GPIOA2/AD2 GPIOA3/AD3/IR GPIOA4/SCL3/P1.0 GPIOA5/SDA3/P1.1 GPIOA6/SCL1 GPIOA7/SDA1 GPIOB0/SCL2 GPIOB1/SDA2

I_17950_052.eps 090508

Figure 9-9 Block diagram & pin configuration

EN 84
9.4.9

9.

TCM2.0E LA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Diagram B, MX25L3205

Block Diagram
additional 4Kb

Address Generator

X-Decoder

Memory Array

SI

Data Register Y-Decoder SRAM Buffer Sense Amplifier HV Generator SO Output Buffer

CS#, ACC, WP#,HOLD#

Mode Logic

State Machine

SCLK

Clock Generator

Pin Configuration

HOLD# VCC NC PO2 PO1 PO0 CS# SO/PO7

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

SCLK SI PO6 PO5 PO4 PO3 GND WP#/ACC

16-PIN SOP (300 mil)

I_17950_053.eps 090508

Figure 9-10 Block diagram & pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.4.10 Diagram B, TDA7266

TCM2.0E LA

9.

EN 85

Block Diagram
VCC 470F 0.22F IN1 3 4 + ST-BY 7 13 1 OUT1+ 100nF

S-GND

Vref

+ + -

OUT1-

0.22F IN2

12

15

OUT2+

MUTE

PW-GND

8 +

14

OUT2-

Pin Configuration
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 OUT2+ OUT2VCC IN2 N.C. N.C. S-GND PW-GND ST-BY MUTE N.C. IN1 VCC OUT1OUT1+
I_17950_054.eps 090508

Figure 9-11 Block diagram & pin configuration

EN 86

10.

TCM2.0E LA

Spare Parts List & CTN Overview

10. Spare Parts List & CTN Overview

For the latest spare part overview, please consult the Philips Service website. Table 10-1 Sets described in this manual: CTN 19PFL5403/60 19PFL5403D/10 19PFL5403S/60 20HFL3330D/10 20PFL3403D/10 22PFL5403/60 22PFL5403D/10 22PFL5403S/60 26PFL3403D/10 26PFL5403/60 26PFL5403D/10 26PFL5403S/60 Styling ME8 ME8 ME8 MG8 MG8 ME8 ME8 ME8 MG8 ME8 ME8 ME8 Published in: 3122 785 17952 3122 785 17951 3122 785 17951 3122 785 17951 3122 785 17950 3122 785 17952 3122 785 17951 3122 785 17952 3122 785 17951 3122 785 17952 3122 785 17950 3122 785 17952

11. Revision List

Manual xxxx xxx xxxx.0 First release. Manual xxxx xxx xxxx.1 All Chapters: Sets added (see table chapter 10). Frontpage: Styling ME8 added. Chapter 5: In SAM mode, item Options removed. Chapter 5: Error 11 removed from error code overview. Chapter 6: Wiring diagrams added. Chapter 8: Display option codes added. Chapter 9: Block diagram added. Chapter 10: CTN overview added. Manual xxxx xxx xxxx.2 All Chapters: Added Russian sets (xxPFLxxxx/60). Chapter 5: Some textual changes in ComPair section. Chapter 9: Abbreviation list updated. Manual xxxx xxx xxxx.3 Chapter 7: Added the schematics and layouts of SSB version 2 (U503 in diagram SSBv2, B05 DVBT/CI decoder).