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FE: Electric Circuits

C.A. Gross

EE1-

FUNDAMENTALS OF ENGINEERING (FE) EXAMINATION REVIEW

ELECTRICAL ENGINEERING
Charles A. Gross, Professor Emeritus Electrical and Comp Engineering Auburn University Broun 212 334.844.1812 gross@eng.auburn.edu
www.railway-technology.com

FE: Electric Circuits

C.A. Gross

EE1-

FE EXAM FORMAT
8 hours long 4-hour morning session; 120 multiple-choice questions. 4-hour afternoon session; 60 multiple-choice questions. Closed book Reference material is supplied Morning session material common to all engineering disciplines Afternoon session, examinees opt to take a general exam, or a discipline-specific exam For more information: http://www.ncees.org/exams/fundamentals/
FE: Electric Circuits C.A. Gross EE13

EE Content (9 areas)
1. 2. 3. 4. 5. 6. 7. 8. 9. Circuits Power Electromagnetics Control Systems Communications Signal Processing Electronics Digital Systems Computer Systems 16% 13% 7% 10% 9% 8% 15% 12% 10%

FE: Electric Circuits

C.A. Gross

EE1-

EE Review Problems
1. 2. 3. 4. 5. 6. 7. 8. dc Circuits ac Circuits 1st Order Transients 3-phase Circuits; pf correction Control Signal Processing Electronics Digital Systems

FE: Electric Circuits

C.A. Gross

EE1-

1. dc Circuits:

Find all voltages, currents, and powers.


FE: Electric Circuits C.A. Gross EE16

Solution
The 8 and 7 resistors are in series: R1 = 8 + 7 = 15
R1 and 10 are in parallel: 1 R2 = 1 1 + 10 R1 10 ( R1) = = 6 10 + R1
FE: Electric Circuits C.A. Gross EE17

Solution
4 and R2 are in series: Rab = 4 + R 2 = 10
L : Vab 100 Ia = = = 10 A Rab 10
V4 = 4 I a = 40V ( L)

V10 = 100 40 = 60V


FE: Electric Circuits

( KVL )
C.A. Gross EE18

Solution
V10 60 Ic = = = 6A 10 10
KCL : I b = I a I c = 10 6 = 4 A
V8 = 8 I b = 32V V7 = 7 I b = 28V
FE: Electric Circuits

( L )

( L) ( L)
C.A. Gross EE19

Absorbed Powers...
R4 I = 4 (10 ) = 400W
2 a 2

R10 I = 10 ( 6 ) = 360W
2 c 2

In General: PABS = PDEV (Tellegen's Theorem)

R7 I = 7 ( 4 ) = 112W
2 b 2

R8 I = 8 ( 4 ) = 128W
2 b 2

Total Absorbed Power = 1000W

Power Delivered by Source = Vs I a = 100 (10 ) = 1000W


FE: Electric Circuits C.A. Gross EE1- 10

2. ac Circuits
i(t)

+ v(t) -

Find "everything" in the given circuit.

v (t ) = 141.4cos(377 t ) V
FE: Electric Circuits C.A. Gross EE1- 11

Solution
v (t ) = 141.4cos(377 t ) V

(radian) frequency = = 377 rad / s

(cyclic) frequency = f = = 60 Hz 2
1 1 Period = = = 16.67 ms f 60
FE: Electric Circuits C.A. Gross EE1- 12

Solution
To solve the problem, we convert the circuit into an "ac circuit":

R, L, C elements Z (impedance) v , i sources V , I (phasors)


R : Z R = R + j0 = 8 + j0 L : Z L = 0 + j L = 0 + j (0.377)(26.53) = 0 + j10
1 1 C : ZC = 0 + = 0 j = 0 j4 0.377(0.663) j C
FE: Electric Circuits C.A. Gross EE1- 13

Solution
v (t ) = VMAX cos( t + )
To convert to a phasor... For example..

V=

VMAX 2

v (t ) = 141.4cos(377 t )

V=
FE: Electric Circuits

VMAX 2

= 100 0o
C.A. Gross EE1- 14

The "ac circuit"


I
+ VR

L(ac ) : V I = Z 100 = 8 + j10 j 4 = 10 36.9o

+ 100 0

+ VC + VL

i (t ) = 14.14 cos(377 t 36.9o )


C.A. Gross EE1- 15

FE: Electric Circuits

Solving for voltages


VR = Z R I = (8)(10 36.9o ) = 80 36.9o V v R (t ) = 113.1 cos(377 t 36.9o )

VC = Z C I = ( j 4)(10 36.9 ) = 40 126.9 V


o o

vC (t ) = 56.57 cos(377 t 126.9o ) VL = Z L I = ( j10)(10 36.9o ) = 10053.1o V v L (t ) = 141.4 cos(377 t + 53.1 )


o

FE: Electric Circuits

C.A. Gross

EE1- 16

Absorbed powers

S = V I * = P + jQ

S R = VR I * = 80 36.9o (10 36.9o )* = 800 + j 0 SC = VC I * = 40 126.9o (10 36.9o )* = 0 j 400 S L = VL I * = 10053.1o (10 36.9o )* = 0 + j1000
STOT = S R + SC + S L = 800 + j 600 PTOT = 800 watts; QTOT = 600 var s; STOT =| STOT |= 1000 VA
FE: Electric Circuits C.A. Gross EE1- 17

Delivered power
S S = VS I * = 100 0o (10 36.9o )* = 800 + j 600

S S = STOT = 800 + j 600 PS = PTOT = 800 watts QS = QTOT = 600 var s

In General: PABS = PDEV

QABS = QDEV

(Tellegen's Theorem)
FE: Electric Circuits C.A. Gross EE1- 18

3. 1st Order Transients

a. The switch is closed at t = 0. Find and plot vC (t).


FE: Electric Circuits C.A. Gross EE1- 19

Solution....
t 0:
In general:

vC ( t ) = K 1 + K 2 vC ( t ) = K 1 + K 2 e t /

t > 0:

= Rab C
Our job is to determine K1 , K2 , and ( Rab )

FE: Electric Circuits

C.A. Gross

EE1- 20

Solution....
For a capacitor:

dvC iC = C dt

C's are OPENS to dc vC(t) cannot change in zero time

vC ( t ) = K 1 + K 2 e t / vC (0 ) = vC (0) = vC (0 ) = K1 + K 2 vC ( ) = K 1
FE: Electric Circuits C.A. Gross EE1- 21

Solution: T < 0; switch and "C" OPEN

12
+ 120V -

12

+ vC b

K1 + K 2 = 48

120 vC = (12 ) = 48 V 12 + 6 + 12
FE: Electric Circuits C.A. Gross EE1- 22

Solution: T > 0; switch CLOSED


6 12 Rab = = 4 6 + 12
0.2 F

12
+ 120V -

iC

12

+ vC b

= Rab C
= 4(0.2) = 0.8 s

120 vC ( ) = (12 ) = 80 V 0 + 6 + 12
FE: Electric Circuits C.A. Gross

K1 = 80
EE1- 23

Solution....

t 0: t > 0:

vC (t ) = K1 + K 2 = 48 vC ( t ) = K 1 + K 2 e vC (t ) = 80 32 e
t / 1.25 t

FE: Electric Circuits

C.A. Gross

EE1- 24

3. 1st Order Transients

0.4 H

b. The switch is closed at t = 0. Find and plot iL (t).


FE: Electric Circuits C.A. Gross EE1- 25

Solution....
t 0:
In general:

i L ( t ) = K1 + K 2 i L ( t ) = K1 + K 2 e t /

t > 0: L = Rab

Our job is to determine K1 , K2 , and ( Rab )


FE: Electric Circuits C.A. Gross EE1- 26

Solution....
For an inductor:

di L vL = L dt

L's are SHORTS to dc iL(t) cannot change in zero time

i L ( t ) = K1 + K 2 e

t /

i L (0 ) = i L (0) = i L (0+ ) = K1 + K 2 i L ( ) = K1
FE: Electric Circuits C.A. Gross EE1- 27

Solution: T < 0; switch OPEN; L SHORT

12
+ 120V -

iL

12

+ vC b

120 iL = = 6.667 A 12 + 6
FE: Electric Circuits

K1 + K 2 = 6.667
EE1- 28

C.A. Gross

Solution: T > 0; switch CLOSED


6 12 Rab = = 4 6 + 12
0.4 H

12
+ 120V -

iL

12

+ vL b

L 0.4 = = Rab 4 = 0.1 s

120 iL ( ) = = 20 A 0+6+0
FE: Electric Circuits

K1 = 20
EE1- 29

C.A. Gross

Solution....

t 0: t > 0:

i L (t ) = K1 + K 2 = 6.667 i L ( t ) = K1 + K 2 e
t / 10 t

i L (t ) = 20 13.33 e

FE: Electric Circuits

C.A. Gross

EE1- 30

4. Three-Phase Circuits: pf correction

Load

Utility

Pf correcting Metering Point Capacitance

A 3ph-load of 3500 kVA @ pf = 0.7754 lag is supplied from a 12.47 kV system. The Utility will provide a discount, if pf 0.93. Design an appropriate pf-correcting bank.
FE: Electric Circuits C.A. Gross EE1- 31

a. Find all voltages


PHASE a + S PHASE b O U R PHASE c C E NEUTRAL n

Ia Ib
+

Ic

Van
-

V bn
-

+ Vcn -

L O A D

"PHASE" CONDUCTORS ARE ALSO CALLED "LINES"


FE: Electric Circuits C.A. Gross

EE1- 32

"Balanced" voltage means equal in magnitude, 120o separated in phase


v an ( t ) = V max cos( t ) = 2 V cos( t ) 2 V cos( t 120 0 ) 2 V cos( t + 120 0 )

vbn ( t ) = V max cos( t 120 0 ) = v cn ( t ) = V max cos( t + 120 0 ) =

e.g. V=1000 V; Vmax = 1414 V

FE: Electric Circuits

C.A. Gross

EE1- 33

Phasor Diagram
30 -V bn Vab= 3V V ca = 3 V 150 Vcn= V120

-Van

V an = V 0

Vbn= V 120
FE: Electric Circuits

-Vcn

= 3 V 90 C.A. Gross Vbc

EE1- 34

For our problem: VL = Vab = 12.47 kV


V= VL 3 = 7.2 kV

Van = 7.200 kV Vbn = 7.2 1200 kV Vcn = 7.2 + 1200 kV

Vab = 12.47300 kV Vbc = 12.47 900 kV Vca = 12.47 + 1500 kV

assumes phase sequence abc and Van as reference


FE: Electric Circuits C.A. Gross

bc

EE1- 35

b. Draw the Load power triangle

Consider the given load. 3ph-load of 3500 kVA @ pf = 0.7754 lag

= cos1 (0.7754) = 39.20 P = S cos( ) = 3500(0.7754) = 2714 kW A V Q = S sin( ) = 2210 k var k


00 5 3

2210 kvar

2714 kW
FE: Electric Circuits C.A. Gross EE1- 36

c. Compute the load currents

Sa Sa / 3 3500 / 3 Ia = = = = 162 A Van Van 7.2

Ia = 162 39.20 A
Ib = 162(39.2 120) = 162 159.2 A
0

Ic = 162(39.2 + 120) = 16280.2 A


0

assumes phase sequence abc and Van as reference


FE: Electric Circuits C.A. Gross EE1- 37

d. Draw the corrected power triangle and determine the requisite QC The desired pf:
QC 2210 kvar

= cos1 (0.93) = 21.60


Tan(21.60 ) = QX 2714 QX = 1073 kvar

QX
2714 kW

Load power triangle

QC = 2110 - QX = 1137 k var


FE: Electric Circuits C.A. Gross EE1- 38

e. If the capacitors are connected in wye, find each capacitance and draw the circuit.
a

Qan =

QC 1137 = = 379 kvar 3 3

Qan 379 Ian = = = 52.64 A Van 7.2

Van Zan = ZY = = 136.8 Ian


ZY = j136.8
CY 1 1 = = = 1 9 .3 9 F ZY 0 .3 7 7 0 .1 3 6 8
C.A. Gross EE1- 39

FE: Electric Circuits

f. If the capacitors are connected in delta, find each capacitance and draw the circuit.
a

Qab =

QC 1137 = = 379 kvar 3 3

Qab 379 Iab = = = 30.39 A Vab 12.47

c n

Vab Zab = Z = = 410.3 Iab


Z = j 410.3
C 1 1 = = = 6 .4 6 5 F Z 0 .3 7 7 0 .4 1 0 3
C.A. Gross EE1- 40

FE: Electric Circuits

5. Control
Given the following feedback control system:

R(s)

G(s)

C(s)

H(s)
1 G ( s) = ( s 1)( s + 4)
FE: Electric Circuits C.A. Gross

H ( s) = K
EE1- 41

a. Write the closed loop transfer function in rational form

1 C G ( s 1)( s + 4) = = K R 1 + GH 1 + ( s 1)( s + 4)
C 1 1 = = 2 R ( s 1)( s + 4) + K s + 3s + ( K 4)

FE: Electric Circuits

C.A. Gross

EE1- 42

b. Write the characteristic equation

s + 3s + ( K 4) = 0
2

c. What is the system order?

d. For K = 0, where are the poles located?

s 2 + 3s 4 = ( s 1) ( s + 4 ) = 0

s = +1; s = - 4
e. For K = 0, is the system stable?
FE: Electric Circuits C.A. Gross

NO
EE1- 43

f. Sketch the root locus

g. Find the range on K for system stability.

-4 +1

If K = 4: s 2 + 3s + 0 = ( s ) ( s + 3 ) = 0
Poles at s = 0; s = - 3

Therefore for K>4, poles are in LH s-plane and system is stable.

K4

FE: Electric Circuits

C.A. Gross

EE1- 44

h. Find K for critical damping

CE :

s 2 + 3s + ( K 4) = 0

3 9 4( K 4) Solving the CE: s = 2


Critical damping occurs when the poles are real and equal

9 4( K 4) = 0

K 4 = 9 / 4; K = 4 + 2.25 = 6.25
FE: Electric Circuits C.A. Gross EE1- 45

6. Signal Processing
a. periodic time-domain functions have continuous discrete frequency spectra.
(circle the correct adjective)

b. aperiodic time-domain functions have frequency spectra. continuous discrete


(circle the correct adjective)

FE: Electric Circuits

C.A. Gross

EE1- 46

c. Matching
d.

Laplace Transform Fourier Series Inverse FT


t

d a e

Fourier Transform

Convolution integral b
a. x(t ) =

n = N

D exp( jn t)
n 0

b. y(t ) =

x( ) h(t ) d
st

c. X ( j ) =
1 e. x(t ) = 2
C.A. Gross

x(t ) e jt dt
X ( j ) e + jt d
EE1- 47

d. X ( s ) = x(t ) e
0

dt

FE: Electric Circuits

c. Matching
d.

Z-Transform Inverse ZT Inverse DFT


b. y[ k ] =

d a e
x[ n ] h[ n k ]

DFT

Discrete Convolution b
a. X ( j) =
N 1 n=0

n =

n =

x[ n] e jn

c. X k = x[ n] e j 2 kn / N
1 e. x[n] = N
C.A. Gross

d. X ( z ) = x[n] z n
n=0

X
k =0

N 1

+ j 2 kn / N e k

FE: Electric Circuits

EE1- 48

7. Electronics
+ e (t )
e (t ) = 169.7 sin( t )

v
+v

e T

a. Darken the conducting diodes at time T


FE: Electric Circuits C.A. Gross EE1- 49

b. Given the "OP Amp" circuit


Rf Ri vi
+

+ vo
-

Ideal OpAmp....
infinite input resistance zero input voltage infinite gain zero output resistance

FE: Electric Circuits

C.A. Gross

EE1- 50

Find the output voltage.


vi = 5 V Ri = 10 k R f = 50 k

KCL :

vi v0 + =0 Ri R f vi
EE1- 51

50 v0 = 5 = 25 V 10
FE: Electric Circuits C.A. Gross

Rf v0 = Ri

c. Find the output voltage.


40k

0 + 5 + 5 +
20k 10k 10k

KCL : v0 v1 v2 v3 + + + =0 R1 R2 R3 R f
+ vo LOAD
-

FE: Electric Circuits

C.A. Gross

EE1- 52

Solution:

"SUMMER"
0 5 5 v0 + + + =0 40 20 10 10
10k

40k

0 + 5 + 5 +
20k 10k

10 10 10 v0 = 5 5 0 10 20 40
+ vo LOAD
-

v0 = 7.5 V

FE: Electric Circuits

C.A. Gross

EE1- 53

8. Digital Systems
AB 00 01 10 11 AND
( A B)

Logic Gates

NAND OR XOR

NOR NOR

0 0 0 1

FE: Electric Circuits

C.A. Gross

EE1- 54

8. Digital Systems

Logic Gates

FE: Electric Circuits

C.A. Gross

EE1- 55

a. Complete the Truth Table

Half Adder (HA)


0 A 0 0 1 1 B 0 1 0 1 C 0 0 0 1 S 0 1 1 0 A + B = CS 0 + 0 = 00 0 + 1 = 01 1 + 0 = 01 1 + 1 = 10
C.A. Gross EE1- 56

FE: Electric Circuits

b. Complete the indicated row in the TT


C1 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 B1 C2 S1 0 0 0 1 0 1 0 0 1 1 1 0 0 0 1 1 1 0 0 1 0 1 1 1

A 11 B 01 C1 1

C0

HA S 1

OR

1 C2 0 S1

1 C

HA

Full Adder (FA)


C.A. Gross EE1- 57

FE: Electric Circuits

c. Indicate the inputs and outputs to perform the given sum in a 4-bit adder

1 1 1
A3 B3 C2

0 1 1
A2 B2 C1

1 1 0
A1 B1 C0

0 0
A0 B0

1010 +1110 11000

FA

FA

FA

HA

C3

S3

S2

S1

S0

0
C.A. Gross

0
EE1- 58

FE: Electric Circuits

d. Design a D/A Converter to accomodate 3-bit digital inputs (5 volt logic)

Resolution: 3-bits (23 = 8 levels; 10 V scale) Example... Convert "110" to analog

Digital Analog (V) 000 0.00 001 1.25 010 2.50 011 3.75 100 5.00 101 6.25 110 7.50 111 8.75 Binary Word: ABC (A msb; C lsb)

FE: Electric Circuits

C.A. Gross

EE1- 59

d. Finished Design
40k

0 C+ 5 B+ 5 A+
20k 10k 10k

10 10 10 v0 = 5 5 0 10 20 40 = 7.50
+ vo LOAD
-

FE: Electric Circuits

C.A. Gross

EE1- 60

Good Luck on the Exam!


If I can help with any ECE material, come see me (7:30 - 11:00; 1:15 - 2:30)
Charles A. Gross, Professor Emeritus Electrical and Comp Engineering Auburn University Broun 212 334.844.1812 gross@eng.auburn.edu

Good Evening...
FE: Electric Circuits C.A. Gross EE1- 61

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