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A

Sapporo 300P Rev 0.3 Schematics Document

Intel Prescott uFCPGA-478 / P4 Northwood


with Springdale / ICH5 / nVIDIA NV36M / HDTV chipset
2003 / 11 / 25
3

Compal Electronics, Inc.


Title

Cover Sheet
Size
B
Date:
A

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
E

of

57

Compal Confidential
File Name : DBQ02

Desktop Prescott uFCPGA-478 CPU


Desktop Northwood uFCPGA-478 CPU

Fan Control

page 45

page 4,5,6

HDTV Decode
page 23
H_A#(3..31)

CRT Connector
page 22

LVDS Interface
page 22

Thermal Sensor
ADM1032AR

400/533/667/800MHz

page 5

AGP BUS(8X)

BANK 0, 1, 2, 3page 12,13,14

FCBGA-932

page 16,17,
18,19

page 7,8,9,10,11

2.5V DDR- 200/266

USB Conn *4
page 37

VRAM DDR
128MB/64MB (FBGA)

Hub-Link

MDC & BT Conn


page 38

IEEE 1394
TSB43AB21

Mini PCI
socket

page 30

page 29

RTC CKT.

AC97 Codec

3.3V 33 MHz
IDSEL: AD18
PIRQC#, PIRQD#
GNT1#, REQ1#

DDR-SO-DIMM X2

Intel Springdale MCH

page 20,21

IDSEL: AD16
PIRQA#, GNT0#, REQ0#

page 15

H_D#(0..63)

USB2.0

TV OUT Connector
(4Pin Reverse) page 22

ICS 952623

Memory BUS(DDR)

VGA
NV36M
PIRQA#

PSB

Clock Generator

Intel ICH5

AC-LINK
ATA-100
Primary IDE

mBGA-460

CardBus Controller
Toshiba TC6385XB

page 26

page 32

page 31

IDSEL: AD17
IDSEL: AD20
PIRQB#, GNT3#, REQ3# PIRQB#, SIRQ, GNT2#, REQ2#

LAN
RTL 8101L

HW EQ CKT

YMF753

PCI BUS

Audio AMP
page 32

Secondary IDE
ATA-100

page 23,24,25

master

page 27,28

RJ45/11 CONN

Slot 0,1

SD Conn.

page 26

page 28

page 27

HDD
Connector
page

35

master/slave

LPC BUS
Softwave DJ
page 34

Power OK CKT.

SMsC LPC47N227

EC NS87591L

page 41

Super I/O

page 39

page 36

Module Conn.

Module Conn.

(Main Module)

Power On/Off CKT.

Int.KBD

Touch Pad

PARALLEL

page 39

page 44

EC I/O Buffer

BIOS (1MB)

page 40

page 35

Floppy

page 38

DC/DC Interface CKT.

(2nd Module)

page 35

FIR

page 40

page 37

Power Circuit DC/DC


Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Block Diagram
Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
E

of

57

Voltage Rails

SIGNAL

STATE

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+CPU_VID

1.2V switched power rail for CPU AGTL Bus

ON

OFF

OFF

+VTT_GMCH

+1.225V (Prescott) / +1.45V (Northwood)

ON

OFF

OFF

+VGA_CORE

1.3V switched power rail for VGA chip

ON

OFF

OFF

+1.25VS

1.25V switched power rail

ON

OFF

OFF

+1.5VS

AGP 4X/8X

ON

OFF

OFF

+2.5V

2.5V power rail

ON

ON

OFF

+2.5VS

2.5V switched power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3V

3.3V power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5V

5V power rail

ON

ON

OFF

+5VS

5V switched power rail

ON

OFF

OFF

+12VALW

12V always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

Full ON

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

+VALW

+V

+VS

Clock

ON

ON

HIGH

HIGH

HIGH

HIGH

ON

ON

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

Board ID Table for AD channel


Vcc
Ra
Board ID

0
1
2
3
4
5
6
7

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

External PCI Devices


Device

IDSEL#

REQ#/GNT#

Interrupts

VGA

PIRQA

C ardBus

AD20

PIRQA/PIRQB

LAN

A D17

PIRQB

Mini-PCI

AD18

1/4

PIRQC/PIRQD

1394

AD16

PIRQA

SD

AD22

Board ID
0
1
2
3
4
5
6
7

EC SM Bus1 address

EC SM Bus2 address

Device

Address

Device

Address

Smart Battery

0001 011X b

ADM1032

1001 110X b

EEPROM(24C16/02)

1010 000X b

OZ168

0011 0100 b

(24C04)

PCB Revision
0.1
0.2
0.3
3

1011 000Xb

ICH5 SM Bus address


4

Device

Address

Clock Generator
( ICS 952623)

1101 001Xb

DDR DIMM0

1001 000Xb

DDR DIMM2

1001 001Xb

Compal Electronics, Inc.


Title

Notes
Size
B
Date:
A

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
E

of

57

+CPU_CORE

A10
A12
A14
A16
A18
A20
A8
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10

H_REQ#[0..4]

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADS#

R43
1
1
R103

+CPU_CORE
+CPU_CORE
7
7
7
7
15
15

H_ IERR#

H_BR0#
H_BPRI#
H_BNR#
H_LOCK#
CLK_BCLK
CLK_BCLK#

CLK_BCLK
CLK_BCLK#

J1
K5
J4
J3
H3
G1

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AC1
V5
AA3
AC3

AP#0
AP#1
BINIT#
IERR#

H6
D2
G2
G4

BR0#
BPRI#
BNR#
LOCK#

AF22
AF23

BCLK0
BCLK1

F3
E3
E2

H_HIT#
H_HITM#
H_DEFER#

Prescott

HIT#
HITM#
DEFER#

AMP_3-1565030-1_Prescott

H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55

7
7
7

@62_0402_5%
2
2
200_0402_5%

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74

K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
W1
T5
U4
V3
W2
Y1
AB1

BOOTSELECT

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

H _D#0
H _D#1
H _D#2
H _D#3
H _D#4
H _D#5
H _D#6
H _D#7
H _D#8
H _D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63] 7

F13
F15
F17
F19
F9
F11
E8
E20
E18
E16
E14
E12

H_A#[3..31]

AD1

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73

JCPU1A

+CPU_CORE

54 BOOTSELECT

Reference Intel document


Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0

1
2
R33
0_0402_5%

BOOTSEL

R_D

1
2
R34
0_0402_5%

Pop: Northwood
Depop: Prescott

Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5


Pin number Northwood
Pin name
B6

FERR#

Commend

Pull-up 62ohm
to +VCC_CORE

Prescott
Pin name

Commend
Northwood

FERR#/PBE# Pull-up 62ohm


to +VCC_CORE

Prescott

Pop

Pop

AA20

ITPCLKOUT0 Pull-up56ohm
to +VCC_CORE

TESTHI6

Pull-up 62ohm
to +VCC_CORE

Pop

Pop

AB22

ITPCLKOUT1 Pull-up 56ohm


to +VCC_CORE

TESTHI7

Pull-up 62ohm
to +VCC_CORE

Pop

Pop

NC

VIDPWRGD

Pull-up 8.2Kohm
to +VCCVID

Depop

Pop

Pull-up1Kohm to
+3VRUN & connect
to PWRIC

Depop

Pop

Connect to +VCCVID

Depop

Pop

AD2
AD3

NC

float
float

VID5

AF3

NC

float

VCCVIDLB

R_A

R_B

R_C

AD20

VCCA

Connect to CPU
Filter

VCCIOPLL

Connect to CPU
Filter

AF23

VCCIOPLL

Connect to CPU
Filter

VCCA

Connect to CPU
Filter

AD1

VSS

Connect to GND

BOOTSELECT CPU determine

Pop

Depop

AE26

VSS

Connect to GND

OPTIMIZED/ float
COMPAT#

Pop

Depop

R_D

Title

R_E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Compal Electronics, Inc.


Prescott Processor in uFCPGA478 (1/2)

Size
C
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

of

57

+CPU_CORE

Place near ICH


2 H_F ERR#
62_0402_5%

R17

2 H _PWRGOOD
300_0402_5%

1
R63

2 H_RESET#
62_0402_5%

H_RS#[0..2]

H_RS#0
H_RS#1
H_RS#2

H_TRDY#

26 H_A20M#
26 H_FERR#
26 H_IGNNE#
26 H_SMI#
26 H_PWRGOOD
26 H_STPCLK#
26
26
26
7

F1
G5
F4
AB2
J6

H_F ERR#
H _PWRGOOD

H_INTR
H_NMI
H_INIT#
H_RESET#

H_RESET#

7 H_DBSY#
7 H_DRDY#
15 CPU_CLKSEL0
15 CPU_CLKSEL1

C6
B6
B2
B5
AB23
Y4

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

D1
E5
W5
AB25

LINT0
LINT1
INIT#
RESET#

H5
H2
AD6
AD5

DBSY#
DRDY#
BSEL0
BSEL1

H_THERMDA
H_THERMDC

B3
C4
A2

24 H_THERMTRIP#

+CPU_CORE

R305
R307
R308
R306
R309
R310

1
1
1
1
1
1

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%

2
2
2
2
2
2

Note: Please change to 10uH, DC current


of 100mA parts and close to cap

LQG21F4R7N00_0805
2

D4
C1
D5
F7
E6

TCK
TDI
TDO
TMS
TRST#

54
54
C22
1

VCCSENSE
VSSSENSE
+CPUVID

2 Trace >= 25mils H_VSSA

R28

R_C

2 VCCVIDLB
0_0402_5%

A5
A4
AF3
AD22

OPTIMIZED/COMPAT#

AE26

Prescott

VSSA

+CPU_CORE
1
1

2 62_0402_5%
2 62_0402_5%

H_TESTHI2_7

R20

2 62_0402_5%

H_TESTHI8
H_TESTHI9
H_TESTHI10
H_TESTHI11
H_TESTHI12

R52
R57
R61
R149
R22

1
1
1
1
1

2
2
2
2
2

E22
K22
R22
W22

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

7
7
7
7

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

F21
J23
P23
W23

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

7
7
7
7

ADSTB#0
ADSTB#1

L5
R5

H_ADSTB#0 7
H_ADSTB#1 7

E21
G25
P26
V21

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

R150
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%

DBR#

AE25

PROCHOT#
MCERR#
SLP#

C3
V6
AB26

NC1
NC2
NC3
NC4
NC5

A22
A7
AF25
AF24
AE21

@300_0402_5%

2 @0_0402_5%
2 @0_0402_5%

H_CPUPERF# 24
H_DPSLP# 26

Pop: P4 Protability
Depop: Prescott/Northwood

7
7
7
7

H_PROCHOT#

H_PROCHOT# 7,53
H_CPUSLP# 26
+CPU_CORE

VCCVID

1
2
R66
62_0402_5%

AF4

R94
61.9_0603_1%

VIDPWRGD

COMP0
COMP1

AD2

1
R106
61.9_0603_1%
2

2.H_VCCIOPLL,HVCCA,HVSSA trace wide


12 mil s(min)

L24
P1

VID0
VID1
VID2
VID3
VID4
VID5

COMP0
COMP1

1.Place cap within 600 mils of


the VCCA and VSSA pins.

0_0402_5%
2

R21
R65

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

ITP_CLK0
ITP_CLK1

AE5
AE4
AE3
AE2
AE1
AD3

CLK_ITP
CLK_ITP#

F8
G21
G24
G3
G6
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
U22
U25
U5
V1
V23
V26
V4
W21
W24
W3
W6
Y2
Y22
Y25
Y5

15
15

R18
1
H_TESTHI0
H_TESTHI1

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6
AD25

VCCSENSE
VSSSENSE
VCCVIDLB

PLL Layout note :

Pop: Prescott
Depop: Northwood

CLK_ITP AC26
CLK_ITP# AD26

Pop: Northwood
Depop: Prescott

R_E

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12

DBI#0
DBI#1
DBI#2
DBI#3

LQG21F4R7N00_0805
33U_D2_8M_R35

AF26

AA21
AA6
F20
F6

VCCIOPLL
VCCA

L8

AD20
AE23

H _VCCA

GTLREF0
GTLREF1
GTLREF2
GTLREF3

+CPU_GTLREF

R1481
R23 1

THERMTRIP#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

ITP_TMS
ITP_TRST#
L9
1

J26
K25
K26
L25

DP#0
DP#1
DP#2
DP#3

THERMDA
THERMDC

AC6
AB5
AC4
Y6
AA5
AB4

ITP_TCK
ITP_TDI

+CPU_CORE

RS#0
RS#1
RS#2
RSP#
TRDY#

1
R64

VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181

2 H_PROCHOT#
130_0402_5%

VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128

Place near CPU


1
R147

0_0402_5%

SKTOCC#

JCPU1B

AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D10
D12
D14
D16
D18
D20
D21
D24
D3
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5

1
R255

+3VS

Trace >= 25mils

AMP_3-1565030-1_Prescott

+CPUVID
C4
0.1U_0402_10V6K

H _VID5

RE
Pop: Prescott
Depop: Northwood

R_A

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5

H _VID0
H _VID1
H _VID2
H _VID3
H _VID4
H _VID5

H _VID4

1
R24
1
R27

H _VID3
H _VID2
H _VID1
H _VID0

5
6
7
8

2
1K_0402_5%
2
1K_0402_5%

RP5

+CPUVID
54
54
54
54
54
54

R_B

R19
680_0603_1%
1
2
H_ VID_PWRGD

4
3
2
1
1K_8P4R_1206_5%

+3V

R654
10K_0402_5%
2

+3VS
VID_PWRGD 54

+CPU_CORE

SN74LVC125APWLE_TSSOP14
+3V POWER

2200P_0402_50V7K

R_A

+CPU_GTLREF

200_0603_1%
2

0.1U_0402_16V4Z
R77
@10K_0402_5%

1
U1
H_THERMDA

D+

VDD1

D-

ALERT#

40 EC_SMB_CK2

SCLK

40 EC_SMB_DA2

SDATA

H_THERMDC
R51

C73

+CPU_GMCH_GTLREF trace
wide 12mils(min),Space
15mils

51,54

ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDI

ENLL

THERM#

GND

1K_8P4R_1206_5%
1

R37
0_0603_5%

R38

R_B

169_0603_1%

C8
0.1U_0402_10V6K

ADM1032ARM_RM8
1

C7
220P_0402_50V8K

8
7
6
5

C83

2. Place R_A and R_B near CPU.


3. Place decoupling cap 220PF near CPU.

RP88
1
2
3
4

1. +CPU_GTLREF Trace wide


12mils(min),Space 15mils

2
0_0402_5%

+CPU_GMCH_GTLREF

H_ VID_PWRGD 6

U51B

Layout note :

OE#

GTL Reference Voltage

1
R655

Compal Electronics, Inc.

Close to the CPU


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Prescott Processor in uFCPGA478 (2/2)


Size
C
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

of

57

Place 11 North of Socket(Stuff 8)


+CPU_CORE

1
C448
22U_1206_16V4Z

1
C451
22U_1206_16V4Z

1
C466
22U_1206_16V4Z

1
C86
22U_1206_16V4Z

1
C103
22U_1206_16V4Z

1
C69
22U_1206_16V4Z

1
C45
22U_1206_16V4Z

1
C116
22U_1206_16V4Z

1
C134
22U_1206_16V4Z

1
C141
22U_1206_16V4Z

C124
22U_1206_16V4Z

Place 12 Inside Socket(Stuff all)


+CPU_CORE

1
C483
22U_1206_16V4Z

1
C482
@22U_1206_16V4Z

1
C481
@22U_1206_16V4Z

1
C480
22U_1206_16V4Z

1
C491
22U_1206_16V4Z

1
C494
@22U_1206_16V4Z

1
C493
@22U_1206_16V4Z

1
C492
22U_1206_16V4Z

1
C488
22U_1206_16V4Z

C487
22U_1206_16V4Z

C481, C482, C493, C494 del for Prescott


+CPU_CORE

1
C513
22U_1206_16V4Z

(H_1.78)

C514
22U_1206_16V4Z

22uF depop reference


Springdale Customer Schematic R1.2 page82

Place 9 South of Socket(Unstuff all)

+CPU_CORE

1
C158
22U_1206_16V4Z

1
C164
22U_1206_16V4Z

1
C33
22U_1206_16V4Z

1
C93
22U_1206_16V4Z

1
C18
22U_1206_16V4Z

1
C94
22U_1206_16V4Z

1
C34
22U_1206_16V4Z

1
C95
22U_1206_16V4Z

C35
22U_1206_16V4Z

470uF _ERS10m ohm* 15,

ESR=0.5m ohm

+CPU_CORE

C204
470U_D4_2.5VM

1
+

C203
470U_D4_2.5VM

1
C205
470U_D4_2.5VM

1
C206
@470U_D4_2.5VM

1
C210
470U_D4_2.5VM

C208
470U_D4_2.5VM

+CPU_CORE

C207
470U_D4_2.5VM

1
+

C209
470U_D4_2.5VM

1
C202
470U_D4_2.5VM

1
C518
470U_D4_2.5VM

+
2

1
C187
@470U_D4_2.5VM

C188
@470U_D4_2.5VM

+CPU_CORE

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page239

C218
@470U_D4_2.5VM

1
C517
470U_D4_2.5VM

C524
@470U_D4_2.5VM

Decoupling Reference Requirement:


560uF Polymer, ESR:5m ohm(each) * 10
22uF X5R * 32

Title

Compal Electronics, Inc.


CPU Decoupling

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
C
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

of

57

D26
D30
L23
E29
B32
K23
C30
C31
J25
B31
E30
B33
J24
F25
D34
C32
F28
C34
J27
G27
F29
E28
H27
K24
E32
F31
G30
J26
G26

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

B29
J23
L22
C29
J21
B30
D28

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#

15 CLK_HCLK
15 CLK_HCLK#

B7
C7

1
2

R365
301_0603_1%
HD_SWING

R369
102_0603_1%

C159
0.01U_0402_16V7K

HDRCOMP

R362
24.9_0603_1%

H_REQ#[0..4]

5
5

+VTT_GMCH

+GMCH_GTLREF
+CPU_GMCH_GTLREF

R359

200_0603_1%

R647 0_0603_5%

GTL Reference Voltage


2

Layout note :
B

C160
220P_0402_50V8K

1. +GMCH_GTLREF Trace wide


12mils(min),Space 15mils.
2. Place decoupling cap 220PF near GMCH.

H_RS#[0..2]

H_D#[0..63] 4

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

Trace width 10mils,Space


7mils

5
5
5
5
5
5
5
5
5
5
5
5

H_DSTBP#0
H_DSTBN#0
H_DINV#0
H_DSTBP#1
H_DSTBN#1
H_DINV#1
H_DSTBP#2
H_DSTBN#2
H_DINV#2
H_DSTBP#3
H_DSTBN#3
H_DINV#3

B19
C19
C17
L19
K19
L17
G9
F9
L14
D12
E12
C15

4
5
5
4
4
4
4
4
4
4
5

H_ADS#
H_TRDY#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#

F27
D24
G24
L21
E23
K21
E25
B24
B28
B26
E27
G22
C27
B27
E8
AE14

H_RS#0
H_RS#1
H_RS#2

5
H_RESET#
24,43 SYS_PWROK
HDRCOMP
HD_SWING
+GMCH_GTLREF

E24
C25
F23

U36F

U36A

H_A#[3..31]

+VTT_GMCH

HCLKP
HCLKN
HDSTBP0#
HDSTBN0#
DINV0#
HDSTBP1#
HDSTBN1#
DINV1#
HDSTBP2#
HDSTBN2#
DINV2#
HDSTBP3#
HDSTBN3#
DINV3#
ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BREQ0#
BNR#
BPRI#
DBSY#
RS0#
RS1#
RS2#
CPURST#
PWROK#

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8

PROCHOT#

L20

BSEL0
BSEL1

L13
L12

HDRCOMP
HDSWING
HDVREF
SPRINGDALE_UFCBGA932

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_PROCHOT#

H_PROCHOT# 5,53
MCH_CLKSEL0 15
MCH_CLKSEL1 15

AR32
AR29
AR27
AR25
AR23
AR20
AR16
AR13
AR11
AR9
AN32
AN30
AN28
AN26
AN24
AN22
AN20
AN18
AN16
AN14
AN12
AN10
AM35
AM29
AM27
AM25
AM23
AM21
AM19
AM17
AM15
AM13
AM11
AM9
AL32
AL1
AK28
AK26
AK24
AK22
AK20
AK18
AK16
AK14
AK12
AK10
AK8
AK3
AJ35
AJ32
AJ9
AJ4
AJ1
AH33
AH30
AH24
AH22
AH20
AH18
AH16
AH14
AH12
AH10
AH6
AH3
AG35
AG32
AG28
AG26
AG24
AG22
AG20
AG18
AG16
AG14
AG8
AG4
AF33
AF30
AF25
AF24
AF22
AF20
AF18
AF16
AF14
AF11
AF9
AF6
AF3
AE35
AE32
AE26
AE25
AE13
AE12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U36G

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AE11
AE10
AE4
AE1
AD33
AD30
AD28
AD10
AD9
AD8
AD6
AD3
AC35
AC32
AC4
AC1
AB33
AB30
AB28
AB27
AB26
AB10
AB9
AB8
AB6
AB3
AA32
AA4
AA1
Y35
Y33
Y30
Y28
Y27
Y26
Y10
Y9
Y8
Y6
Y3
W32
W18
W17
W4
V33
V30
V28
V27
V26
V19
V17
V10
V9
V8
V6
V3
U32
U19
U18
U4
T35
T33
T30
T28
T27
T26
T10
T9
T8
T6
T3
T1
R32
R4
R1
P33
P30
P28
P27
P26
P9
P8
P6
P3
N35
N32
N4
N1
M33
M30
M28
M27
M26
M6
M3
L35

L31
L26
L25
L24
K33
K29
K27
K25
K22
K20
K18
K16
K14
K12
K11
J35
J32
J28
J22
J20
J18
J16
J14
J12
J10
H33
H30
H26
H24
H22
H20
H18
H16
H14
H12
H9
H8
H5
H2
G35
G31
G28
F26
F24
F22
F20
F18

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

FSB

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

F16
F14
F12
F10
F8
F5
F3
F1
E3
E1
D35
D33
D31
D29
D27
D25
D23
D21
D19
D17
D15
D13
D11
D9
D1
C28
C26
C24
C22
C20
C18
C16
C14
C12
C10
C8
C4
A32
A29
A27
A25
A23
A20
A16
A13
A11
A9
A7

SPRINGDALE_UFCBGA932

SPRINGDALE_UFCBGA932

Compal Electronics, Inc.


Title

Springdale-Host/GND (1/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Size
B
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

of

57

DDRA_SMA[0..12]

DDRA_SCS#0
DDRA_SCS#1

DDRA_CKE0
DDRA_CKE1

12
12
12
12

DDRA_CLK1
DDRA_CLK1#
DDRA_CLK2
DDRA_CLK2#

+SM_VREF_A trace width of 12mils and space


12mils(min)

C528
2.2U_0805_16V4Z

SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3

AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AM16
AL16
P31
P32

SCMDCLK_A0
SCMDCLK_A0#
SCMDCLK_A1
SCMDCLK_A1#
SCMDCLK_A2
SCMDCLK_A2#
SCMDCLK_A3
SCMDCLK_A3#
SCMDCLK_A4
SCMDCLK_A4#
SCMDCLK_A5
SCMDCLK_A5#
SMVREF_A

AK9

SMXRCOMP

C522

SMXRCOMPVOH

AN9

SMXRCOMPVOH

0.1U_0402_16V4Z

SMXRCOMPVOL

AL9

SMXRCOMPVOL

+2.5V

Trace width of 12mils and space


10mils(min)

R151
40.2_0603_1%

Change to 42.2_1%
SMXRCOMP

C201
2.2U_0805_16V4Z

AL20
AN19
AM20
AP20

SMXRCOMP

SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#

E34

Close to GMCH(E34)

AA34
Y31
Y32
W34

R152
40.2_0603_1%

Place resistors within


1.0 inch of GMCH (AK9)

Change to 42.2_1%
A

SDQS_A2
SDM_A2

AP23
AM24

SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_A23

AP22
AM22
AL24
AN27
AP21
AL22
AP25
AP27

SDQS_A3
SDM_A3

AM30
AP30

SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31

AP28
AP29
AP33
AM33
AM28
AN29
AM31
AN34

SDQS_A4
SDM_A4

AF34
AF31

SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39

AH32
AG34
AF32
AD32
AH31
AG33
AE34
AD34

SDQS_A5
SDM_A5

V34
W33

SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47

AC34
AB31
V32
V31
AD31
AB32
U34
U33

SDQS_A6
SDM_A6

M32
M34

SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55

T34
T32
K34
K32
T31
P34
L34
L33

2
2

DDRA_SDQS2 12,14
DDRA_SDM2 12,14
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23

C523

2.2U_0805_16V4Z

H31
H32

SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63

J33
H34
E33
F33
K31
J34
G34
F34

R390
10K_0603_1%

C777
0.1U_0402_16V4Z

C533
1U_0603_10V6K

SMXRCOMPVOH

R391
30.9K_0603_1%

C196
0.01U_0402_16V7K

Close to Pin AN9


Close to GMCH <1"

DDRA_SDQS3 12,14
DDRA_SDM3 12,14

* Change to 31.12K

DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31

Follow Intel design guide


R1.11(12474) page124,125

DDRA_SDQS4 12,14
DDRA_SDM4 12,14
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQS5 12,14
DDRA_SDM5 12,14
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47

+2.5V

SDQS_A7
SDM_A7

Trace width of 12mils and space


10mils(min)

+2.5V

AP14
AM14
AL18
AP19
AL14
AN15
AP18
AM18

DDRA_SDQS1 12,14
DDRA_SDM1 12,14
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15

SBA_A0
SBA_A1

SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15

AE33
AH34

AP15
AP16

DDRA_SDQ[0..63] 12,14

12,14 DDRA_SBS0
12,14 DDRA_SBS1

SDQS_A1
SDM_A1

DDRA_SDQ[0..63]

DDRA_SDQS0 12,14
DDRA_SDM0 12,14

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7

DDRA_SDQS6 12,14
DDRA_SDM6 12,14

DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55

C217

Trace width of 12mils and space


10mils(min)

SWE_A#
SCAS_A#
SRAS_A#

AN11
AP12
AP10
AP11
AM12
AN13
AM10
AL10
AL12
AP13

2.2U_0805_16V4Z

R153
30.9K_0603_1%

*
2

AB34
Y34
AC33

SDQS_A0
SDM_A0
SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7

DDRA_SDQS7 12,14
DDRA_SDM7 12,14

SMXRCOMPVOL

12,14 DDRA_SWE#
12,14 DDRA_SCAS#
12,14 DDRA_SRAS#

SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5

12,14 DDRA_CKE0
12,14 DDRA_CKE1

AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24
AJ33
AN23
AN21
AL34
AM34
AP32
AP31
AM26

12,14 DDRA_SCS#0
12,14 DDRA_SCS#1

C220
1U_0603_10V6K

R154
10K_0603_1%

2
2

U36B
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12

DDR Channel A

12,14 DDRA_SMA[0..12]

+SM_VREF_A

C190
0.01U_0402_16V7K

Close to Pin AL9

DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

Close to GMCH <1"

SPRINGDALE_UFCBGA932

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Compal Electronics, Inc.


Springdale-DDR Interface-A(2/5)

Size
B
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

of

57

DDRB_SMA[0..12]

W27
W31
W26

SWE_B#
SCAS_B#
SRAS_B#

Y25
AA25

13,14 DDRB_SCS#0
13,14 DDRB_SCS#1

13,14 DDRB_CKE0
13,14 DDRB_CKE1

DDRB_SCS#0
DDRB_SCS#1

U26
T29
V25
W25

SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#

DDRB_CKE0
DDRB_CKE1

AK19
AF19
AG19
AE18

SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3

13
13
13
13

SM_VREF_B and SM_VREF_A


are connected inside GMCH.

DDRB_CLK1
DDRB_CLK1#
DDRB_CLK2
DDRB_CLK2#

+SM_VREF_B

+2.5V

+SM_VREF_B trace width of


12mils and space
12mils(min)

AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30

2.2U_0805_16V4Z

SMVREF_B

AA33

SMYRCOMP

SMYRCOMPVOH

R34

SMYRCOMPVOH

SMYRCOMPVOL

R33

SMYRCOMPVOL

SDQS_B1
SDM_B1

AG13
AG15

SDQ_B8
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15

AE17
AL13
AK17
AL17
AK13
AJ14
AJ16
AJ18

SDQS_B2
SDM_B2

AG21
AE21

SDQ_B16
SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_B21
SDQ_B22
SDQ_B23

AE19
AE20
AG23
AK23
AL19
AK21
AJ24
AE22

SDQS_B3
SDM_B3

AH27
AJ28

DDRB_SDQS0 13,14
DDRB_SDM0 13,14

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ[0..63]

DDRB_SDQ[0..63] 13,14

DDRB_SDQS1 13,14
DDRB_SDM1 13,14
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15

+2.5V
DDRB_SDQS2 13,14
DDRB_SDM2 13,14

DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23

C541
2.2U_0805_16V4Z

C778

DDRB_SDQS3 13,14
DDRB_SDM3 13,14

AK25
AH26
AG27
AF27
AJ26
AJ27
AD25
AF28

SDQS_B4
SDM_B4

AD29
AC31

SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39

AE30
AC27
AC30
Y29
AE31
AB29
AA26
AA27

SDQS_B5
SDM_B5

U30
U31

SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47

AA30
W30
U27
T25
AA31
V29
U25
R27

SDQS_B6
SDM_B6

L27
M29

SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55

P29
R30
K28
L30
R31
R26
P25
L32

SDQS_B7
SDM_B7

J30
J31

SDQ_B56
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63

K30
H29
F32
G33
N25
M25
J29
G32

R394
10K_0603_1%

0.1U_0402_16V4Z

SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_B31

Trace width of 12mils and space


10mils(min)

DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31

SMYRCOMPVOH

C546
1U_0603_10V6K

R398
30.9K_0603_1%

C213

0.01U_0402_50V7K

Close to Pin R14


Close to GMCH <1"

DDRB_SDQS4 13,14
DDRB_SDM4 13,14
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39

150_0603_1%

SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#

AP9

C539
SMYRCOMP

R392

SBA_B0
SBA_B1

AF15
AG11
AJ10
AE15
AL11
AE16
AL8
AF12
AK11
AG12

SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5

SDQS_B0
SDM_B0
SDQ_B0
SDQ_B1
SDQ_B2
SDQ_B3
SDQ_B4
SDQ_B5
SDQ_B6
SDQ_B7

AE27
AD26
AL29
AL27
AE23
13,14 DDRB_SWE#
13,14 DDRB_SCAS#
13,14 DDRB_SRAS#
13,14 DDRB_SBS0
13,14 DDRB_SBS1

SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12

AG31
AJ31
AD27
AE24
AK27
AG25
AL25
AF21
AL23
AJ22
AF29
AL21
AJ20

U36C
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12

DDR Channel B

13,14 DDRB_SMA[0..12]

C547

C200

R396
B

2.2U_0805_16V4Z

0.1U_0402_16V4Z

150_0603_1%

+2.5V

C219

Trace width of 12mils and space


10mils(min)

R163
30.9K_0603_1%

2.2U_0805_16V4Z

Close to GMCH(AP9)

DDRB_SDQS5 13,14
DDRB_SDM5 13,14
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47

2
R399
40.2_0603_1%

Change to 42.2_1%

Change to 42.2_1%

2.2U_0805_16V4Z

Trace width of 12mils


and space 10mils(min)

SMYRCOMP

C553

R400
40.2_0603_1%

Place resistors within


1.0 inch of GMCH (AA33)

SMYRCOMPVOL

DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55

R164
10K_0603_1%

C223
1U_0603_10V6K

2
2

+2.5V

DDRB_SDQS6 13,14
DDRB_SDM6 13,14

0.01U_0402_50V7K

Close to Pin R33


Close to GMCH <1"

DDRB_SDQS7 13,14
DDRB_SDM7 13,14
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

SPRINGDALE_UFCBGA932

Title

C211

Springdale-DDR Interface-B(3/5)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Size
B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

of

57

+1.5VS

+1.5VS

Change to 43.2_1%

Change to 52.3_1%

+1.5VS
U36D

51.1_0603_1%

@10K_0402_5%

GRCOMP

16 AGP_FRAME#
15 CLK_MCH_66M
16 AGP_DEVSEL#
16 AGP_IRDY#
16 AGP_TRDY#
16 AGP_STOP#
16 AGP_PAR
16 AGP_REQ#
16 AGP_GNT#

R121

HI_RCOMP_MCH

AGP_PAR

1: External AGP
0: Internal Graphics
+1.5VS

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

R353

16
AGP_RBF#
16
AGP_WBF#
16
AGP_DBIHI
16
AGP_DBILO
16 AGP_ST[0..2]

2
1

HI_SW ING_MCH

R368

147_0603_1%

C499

2 0.1U_0402_16V4Z

Close to GMCH(AE3)
C498
0.01U_0402_16V7K

26 HUB_HL[0..10]

0.1U_0402_16V4Z

Close to GMCH(AE2)
C503
0.01U_0402_16V7K

C500

Close to GMCH ball <250mils

26 HUB_HLSTRF
26 HUB_HLSTRS

CLK_MCH_66M
+1.5VS

1
1

CI_SWING_GMCH

R127

0.1U_0402_16V4Z

147_0603_1%

C147

Close to GMCH(AF2)
C155
0.01U_0402_16V7K

change to 52.3_1%

Close to GMCH ball <250mils


CI_VREF_GMCH

C166

R130

0.1U_0402_16V4Z

113_0603_1%

R375

Close to GMCH(AF4)
C165
0.01U_0402_16V7K

R92
+3VS
24 ICH_SYNC#
13,26,27,28,30,31,37,40 PCIRST#

+1.5VS

0.35V

1
1

C486
@10P_0402_50V8K

2
1
R692

54.9_0603_1%
CI_SWING_GMCH
CI_VREF_GMCH

1
2
2
R134

0_0402_5%
10K_0402_5%
1
0_0402_5%

Close to GMCH ball <250mils

AC2
AC3
AD2

GRCOMP/DVOBCGCOMP
GVSWING
GVREF

R10
R9
M4
M5

GRBF
GWBF
DBI_HI
DBI_LO

N3
N5
N2

AD4
AE3
AE2

HI_RCOMP
HI_SWING
HI_VREF
CI0
CI1
CI2
CI3
CI4
CI5
CI6
CI7
CI8
CI9
CI10
CISTRF
CISTRS

AG2
AF2
AF4

CI_RCOMP
CI_SWING
CI_VREF

G4
AP8
AJ8
AK4

DREFCLK
EXTTS#
ICH_SYNC#
RSTIN#

DDCA_DATA
DDCA_CLK

H3
F2

R88 2
R84 2

1 0_0402_5%
1 0_0402_5%

RED
RED#
GREEN
GREEN#
BLUE
BLUE#

F4
E4
H6
G5
H7
G6

R91 2

1 0_0402_5%

R1012

1 0_0402_5%

R1042

1 0_0402_5%

HSYNC
VSYNC

G3
E2

REFSET

D2

R3222

1 0_0402_5%

RESERVED_1
RESERVED_2
RESERVED_3
RESERVED_4
RESERVED_5

2
1

C113
0.01U_0402_16V7K

Follow Springdale Chipset Platform Design guide Rev1.11(12474)

+AGP_VREF = 0.3535
+AGP_VREF

1
2
R56
44.2_0603_1%

R55

100_0603_1%

C127
0.01U_0402_16V7K

AGP_AD_STBF1 16
AGP_AD_STBS1 16
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

GSBA0#
GSBA1#
GSBA2#
GSBA3#
GSBA4#
GSBA5#
GSBA6#
GSBA7#

V4
V5

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

0.1U_0402_16V4Z

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20

A3
A33
A35
AF13
AF23
AJ12
AN1
AP2
AR3
AR33
AR35
B2
B25
B34
C1
C23
C35
E26
M31
R25

AGP_SB_STBF 16
AGP_SB_STBS 16
AGP_SBA[0..7] 16

Analog RGB/CRT guidelines for Springdale-P

SPRINGDALE_UFCBGA932

Note:
Springdale Customer Schematic R1.2 page18
AGP_SWING only had 0.1u cap ; But Springdale
Chipset Platform Design guide Rev1.11(12474)
page138 had a 0.01uf cap. need confirm with
Intel.

Close GMCH ball (AD2)


less than 250mils

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AGP_AD[0..31] 16

R6
P7
R3
R5
U9
U10
U5
T7

AGP_SWING

U11
T11

Close GMCH ball (AC3) less than 250mils

C9

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15

GSBSTBF
GSBSTBS#

60.4_0603_1%

AE6
AC11
AD5
AE5
AA10
AC9
AB11
AB7
AA9
AA6
AA5
W10
AA11
W6
W9
V7

AGP_AD_STBF0 16
AGP_AD_STBS0 16

GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

R31

R32
39.2_0603_1%

AC6
AC5

AA2
Y4
Y2
W2
Y5
V2
W3
U3
T2
T4
T5
R2
P2
P5
P4
M2

GST0
GST1
GST2
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HISTRF
HISTRS

AG10
AG9
AN35
AP34
AR1

+1.5VS

GADSTBF1
GADSTBS1#

AF5
AG3
AK2
AG5
AK5
AL3
AL2
AL4
AJ2
AH2
AJ3
AH5
AH4

AK7
AH7
AD11
AF7
AD7
AC10
AF8
AG7
AE9
AH9
AG6
AJ6
AJ5

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15

AGP

CSA

0.8V

226_0603_1%

R337
@10_0402_5%

Note:
CI_SWING_MCH, CI_VREF_MCH
trace width of 10mils and
space 20mils

R122

HI_RCOMP_MCH
HI_SW ING_MCH
HI_VREF_MCH

GADSTBF0
GADSTBS0#

HUB

113_0603_1%

GFRAME
GCLKIN
GDEVSEL
GIRDY
GTRDY
GSTOP
GPAR/ADD_DETECT
GREQ
GGNT

HUB_HL0
HUB_HL1
HUB_HL2
HUB_HL3
HUB_HL4
HUB_HL5
HUB_HL6
HUB_HL7
HUB_HL8
HUB_HL9
HUB_HL10

Close to GMCH ball <250mils

R372

U6
CLK_MCH_66M H4
AB4
V11
AB5
W11
AGP_PAR
AB2
N6
M7

AGP_ST0
AGP_ST1
AGP_ST2

HI_VREF_MCH

GCBE0
GCBE1
GCBE2
GCBE3

GRCOMP
AGP_SWING
+AGP_VREF

+AGP_VREF

226_0603_1%

AGP_C/BE#0
Y7
AGP_C/BE#1 W5
AGP_C/BE#2 AA3
AGP_C/BE#3 U2

VGA

?
R116

R123
43_0402_5%

16 AGP_C/BE#[0..3]

Springdale-AGP/HUB/VGA/CSA (4/5)
Size
B
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

10

of

57

+2.5V

Note:
Placed less than 100 mils from ball
Route to GMCH ball without via

C174
22U_1206_10V4Z

C186
4.7U_0805_10V4Z

C169
0.1U_0402_10V6K

C238
0.1U_0402_10V6K

C191
0.1U_0402_10V6K

C198
0.1U_0402_10V6K

C172
0.1U_0402_10V6K

C195
0.1U_0402_10V6K

C199
0.1U_0402_10V6K

+1.5VS
U36E

C490
0.47U_0603_16V7K

C496
0.47U_0603_16V7K

+VTT_GMCH

+2.5V
C535
0.1U_0402_10V6K

2
C552

C548
0.1U_0402_10V6K
VCC_DDR_DCAP5
2
1
VCC_DDR_DCAP4
1
0.22U_0603_10V7K

2
C532

C520
0.47U_0603_16V7K
VCC_DDR_DCAP1
2
1
1
0.22U_0603_10V7K

+3VS

C163
0.1U_0402_10V6K
VCC_AGP_DCAP2
2
1

Trace 14mils

+1.5VS
VTT_DCAP3
1
0.1U_0402_10V6K
VCCA_FSB
VCCA_DPLL
1 0_0402_5%
VCCA_DAC
1
0_0402_5%
VCC_DDR_DCAP2
1
2
C242
0.1U_0402_10V6K

2
C168
R321 2
2
R316
B

VCCA1P5_DDR_SM

(1A)

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

AA35
AL6
AL7
AM1
AM2
AM3
AM5
AM6
AM7
AM8
AN2
AN4
AN5
AN6
AN7
AN8
AP3
AP4
AP5
AP6
AP7
AR15
AR21
AR31
AR4
AR5
AR7
E35
R35

VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR

G1
G2

VCC_DAC
VCC_DAC

+1.5VS

+2.5V

J6
J7
J8
J9
K6
K7
K8
K9
L6
L7
L9
L10
L11
M8
M9
M10
M11
N9
N10
N11
P10
P11
R11
T16
T17
T18
T19
T20
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
Y20

C189
0.1U_0402_10V6K

VCCA_AGP
VCCA_AGP

A31
B4
B3
C2

VCCA_FSB
VCCA_FSB
VCCA_DPLL
VCCA_DAC
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

J1
J2
J3
J4
J5
K2
K3
K4
K5
L1
L2
L3
L4
L5
Y1

VSSA_DAC

D3

C185
0.1U_0402_10V6K

C222
0.1U_0402_10V6K

C175
0.1U_0402_10V6K

C99
0.1U_0402_10V6K

+1.5VS

C171
0.1U_0402_10V6K

C112
0.1U_0402_10V6K

C135
0.1U_0402_10V6K

+1.5VS

0.1U_0402_10V6K

C106
0.1U_0402_10V6K

C157

C156

4.7U_0805_10V4Z

10U_1206_16V4Z

+ C72

C125

C181
0.1U_0402_10V6K

C167
0.1U_0402_10V6K

C143
0.1U_0402_10V6K

C184
0.1U_0402_10V6K

+VTT_GMCH

C70

C47

C60

C42

C26

+ C28

470U_D4_2.5VM

470U_D4_2.5VM

0.1U_0402_16V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1U_0603_6.3V6M

0.47U_0603_16V4Z

Place at the output of the 1.5V VR


+1.5VS

+VTT_GMCH

+2.5V

1
C92
0.1U_0402_10V6K

AG1
Y11

AL35
AB25
AC25
AC26

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

1
C126
0.1U_0402_10V6K

C183
0.1U_0402_10V6K

2
Place near ball
Place near GMCH
Y11,routing trace
from cap to ball

Place near GMCH

Note: Please change to 0.82uH, DC current


of 30mA parts and close to cap
+1.5VS
L21

Trace 14mils
VCC_AGP_DCAP1

2
R315
0_0603_5%

VCCA_FSB1

Trace 14mils
VCCA_FSB

A15
A21
A4
A5
A6
B5
B6
C5
C6
D5
D6
D7
E6
E7
F7

POWER

VTT_DCAP1
VTT_DCAP2

LQG21F4R7N00_0805

C117
0.1U_0402_10V6K

SPRINGDALE_UFCBGA932

C32
150U_D2_6.3VM

C475
0.1U_0402_16V4Z

Close to GMCH

Note:
Placed less than 100 mils from ball
Route to GMCH ball without via

Note: Please change to 1uH(0.54uH-D-IN), DC current


of 1000mA parts and close to cap

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page246,248

+1.5VS

Trace 50mils
Trace 35mils (under GMCH ball field)
Trace 35mils

2
R144

1 VCCA_DDR
0_0603_5%

(1A)

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page84

1
L16

VCCA1P5_DDR_SM
2
0_0603_5%
(1A)
1

C197
22U_1206_16V4Z

C212
0.1U_0402_16V4Z

Close to GMCH
A

Compal Electronics, Inc.


Title

Springdale-Decoupling (5/5)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

11

of

57

+2.5V

+2.5V

DDRA_VREF trace width of


12mils and space 12mils(min)

JP26

DDRA_SDQ8
DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ15
8
8

DDRA_CLK1
DDRA_CLK1#

DDRA_SDQ20
DDRA_SDQ16
DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3
DDRA_SDQ30
DDRA_SDQ27

8,14 DDRA_CKE1

DDRA_CKE1
DDRA_SMA12
DDRA_SMA9
DDRA_SMA7
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

8,14 DDRA_SBS0
8,14 DDRA_SWE#
8,14 DDRA_SCS#0

DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
DDRA_SCS#0
DDRA_SDQ36
DDRA_SDQ37

DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ44
DDRA_SDQ41
DDRA_SDQS5
DDRA_SDQ43
DDRA_SDQ46

DDRA_SDQ48
DDRA_SDQ53
DDRA_SDQS6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7
DDRA_SDQ62
DDRA_SDQ59

13,15,26 ICH_SMB_DATA
13,15,26 ICH_SMB_CLK
+3VS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

KEYLINK_5762-3-111

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDRA_VREF
DDRA_SDQ5
DDRA_SDQ4
DDRA_SDM0
DDRA_SDQ7

+2.5V

C305
0.1U_0402_16V4Z

R204

DDRA_SDQ3
DDRA_SDQ9

DDRA_SDM[0..7]

8,14 DDRA_SDM[0..7]

DDRA_SDQ13
DDRA_SDM1

R203
75_0603_1%

DDRA_SDQ14
DDRA_SDQ11

DDRA_SDQ21
DDRA_SDQ17

System Memory Decoupling caps


+2.5V

DDRA_SDM2
DDRA_SDQ22

DDRA_SDQ23
DDRA_SDQ24

DDRA_SDQ25
DDRA_SDM3

C331
22U_1206_10V4Z

C314
0.1U_0402_10V6K

C339
0.1U_0402_10V6K

C312
0.1U_0402_10V6K

C337
0.1U_0402_10V6K

C311
0.1U_0402_10V6K

C336
0.1U_0402_10V6K

DDRA_SDQ26
DDRA_SDQ31
+2.5V
C

DDRA_CKE0

C310
0.1U_0402_10V6K

C335
0.1U_0402_10V6K

C334
0.1U_0402_10V6K

C308
0.1U_0402_10V6K

C333
0.1U_0402_10V6K

C307
0.1U_0402_10V6K

C332
0.1U_0402_10V6K

C306
0.1U_0402_10V6K

DDRA_CKE0 8,14

DDRA_SMA11
DDRA_SMA8
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1
DDRA_SRAS#
DDRA_SCAS#
DDRA_SCS#1

DDRA_SBS1 8,14
DDRA_SRAS# 8,14
DDRA_SCAS# 8,14
DDRA_SCS#1 8,14

DDRA_SDQ32
DDRA_SDQ33

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*14
B

DDRA_SDM4
DDRA_SDQ38

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)pag 271 each DIMM(two) requirement 0.1uF*42

DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ45
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ47
DDRA_CLK2# 8
DDRA_CLK2 8
DDRA_SDQ49
DDRA_SDQ52
DDRA_SDM6
DDRA_SDQ51
DDRA_SDQ50
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ63
DDRA_SDQ58

SO-DIMM 0
REVERSE

Compal Electronics, Inc.


Title

H = 5.2mm

DDR-SODIMM SLOT1
Size

Document Number

Rev
0.3

Sapporo 300P
Date:

DDRA_SMA[0..12]

8,14 DDRA_SMA[0..12]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5

DDRA_SDQS[0..7]

8,14 DDRA_SDQS[0..7]

75_0603_1%

Close to SO-DIMM

DDRA_SDQ[0..63]

8,14 DDRA_SDQ[0..63]

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DDRA_SDQ2
DDRA_SDQ12

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DDRA_SDQS0
DDRA_SDQ6

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

DDRA_SDQ0
DDRA_SDQ1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

, 01, 2003

Sheet
1

12

of

57

DDRB_SDQ4
DDRB_SDQ0
DDRB_SDQS0
DDRB_SDQ7
DDRB_SDQ5
DDRB_SDQ9

DDRB_SDQ12
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ14
9
9

DDRB_CLK1
DDRB_CLK1#

DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQS2
DDRB_SDQ22
DDRB_SDQ17
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQS3
DDRB_SDQ26
DDRB_SDQ30
R_LAD0
R_LAD1

R_LFRAME#
R_LAD2
R_LAD3
R_PCLK_80H

9,14 DDRB_CKE1

DDRB_CKE1
DDRB_SMA12
DDRB_SMA9
DDRB_SMA7
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

9,14 DDRB_SBS0
9,14 DDRB_SWE#
9,14 DDRB_SCS#0

DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCS#0
DDRB_SDQ33
DDRB_SDQ34

DDRB_SDQS4
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ40
DDRB_SDQ44
DDRB_SDQS5
DDRB_SDQ43
DDRB_SDQ42

DDRB_SDQ52
DDRB_SDQ49
DDRB_SDQS6
DDRB_SDQ55
DDRB_SDQ50
DDRB_SDQ60
DDRB_SDQ56
DDRB_SDQS7
A

DDRB_SDQ58
DDRB_SDQ57
12,15,26 ICH_SMB_DATA
12,15,26 ICH_SMB_CLK
+3VS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

KLINK_5746-3-111

H= 9.2mm
5

DDRB_VREF
DDRB_SDQ2
DDRB_SDQ6
DDRB_SDM0
DDRB_SDQ1

DDRB_SMA[0..12]

9,14 DDRB_SMA[0..12]

75_0603_1%

C300
0.1U_0402_16V4Z

DDRB_SDQS[0..7]

9,14 DDRB_SDQS[0..7]
R197

DDRB_SDQ[0..63]

9,14 DDRB_SDQ[0..63]

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+2.5V
DDRB_VREF trace width of
12mils and space 12mils(min)

DDRB_SDM[0..7]

9,14 DDRB_SDM[0..7]

+2.5V
JP24

+2.5V

DDRB_SDQ3
DDRB_SDQ13

R196
75_0603_1%

DDRB_SDQ11
DDRB_SDM1

DDRB_SDQ15
DDRB_SDQ8

System Memory Decoupling caps


+2.5V
DDRB_SDQ19
DDRB_SDQ16

DDRB_SDM2
DDRB_SDQ18

C299
0.1U_0402_10V6K

C270
0.1U_0402_10V6K

C298
0.1U_0402_10V6K

C269
0.1U_0402_10V6K

C297
0.1U_0402_10V6K

C267
0.1U_0402_10V6K

C296
0.1U_0402_10V6K

C266
0.1U_0402_10V6K

DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDM3

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 0.1uF*24

DDRB_SDQ27
DDRB_SDQ31
+2.5V
R_PCIRST#

C294
0.1U_0402_10V6K

C292
0.1U_0402_10V6K

C264
0.1U_0402_10V6K

C263
0.1U_0402_10V6K

C291
0.1U_0402_10V6K

C262
0.1U_0402_10V6K

C290
0.1U_0402_10V6K

C261
0.1U_0402_10V6K

+2.5V
DDRB_CKE0

DDRB_CKE0 9,14

DDRB_SMA11
DDRB_SMA8

DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1
DDRB_SRAS#
DDRB_SCAS#
DDRB_SCS#1

C338
0.1U_0402_10V6K

DDRB_SBS1 9,14
DDRB_SRAS# 9,14
DDRB_SCAS# 9,14
DDRB_SCS#1 9,14

DDRB_SDQ32
DDRB_SDQ36

C313
0.1U_0402_10V6K

24,37,40
24,37,40
15
10,26,27,28,30,31,37,40

LPC_AD2
LPC_AD3
CLK_80H
PCIRST#

C295
0.1U_0402_10V6K

LAD2
LAD3
PCLK_80H
PCIRST#

C265
0.1U_0402_10V6K

1
2
3
4

24,37,40 LPC_AD0
24,37,40 LPC_AD1
24,37,40 LPC_FRAME#

DDRB_SDQ35
DDRB_SDQ46

LAD0
LAD1
LFRAME#

DDRB_SDQ45
DDRB_SDM5

0.1U_0402_10V6K

C309
0.1U_0402_10V6K

C293
0.1U_0402_10V6K

C268
0.1U_0402_10V6K

R_LAD2
R_LAD3
R_PCLK_80H
R_PCIRST#

8
7
6
5

RP147
DDRB_SDM4
DDRB_SDQ39

C271

@0_1206_8P4R_5%

1
2
3
4

RP148

R_LAD0
R_LAD1
R_LFRAME#

8
7
6
5

@0_1206_8P4R_5%

DDRB_SDQ41
DDRB_SDQ47

JP36
PCIRST#
DDRB_CLK2# 9
DDRB_CLK2 9

LFRAME#
LAD3
LAD2
LAD1
LAD0

DDRB_SDQ48
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ51

PCLK_80H
+3VS

DDRB_SDQ54
DDRB_SDQ62

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10
@E&T_96212-1011S

DDRB_SDQ61
DDRB_SDM7

DEBUG PORT
A

DDRB_SDQ59
DDRB_SDQ63

+3VS

SO-DIMM 2

Compal Electronics, Inc.

REVERSE

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

DDR-SODIMM SLOT2
Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

13

of

57

Channel A(DIMM0) Termination resistors & Decoupling caps

Channel B(DIMM1) Termination resistors & Decoupling caps


+1.25VS

+1.25VS

RP121

DDRA_SDQ5 1
DDRA_SDQ4 2

4
3

4
3

DDRA_SDQ1 1
DDRA_SDQ0 2

56_0404_4P2R_5%
RP114
4
3

4
3

RP80

RP92

DDRA_SDQ28
DDRA_SDQ19

1
2

4 DDRA_SCS#0
3 DDRA_SCS#1

56_0404_4P2R_5%
RP68
1 DDRA_SDQ26
2 DDRA_SDQ31

4
3

56_0404_4P2R_5%
RP66
1 DDRA_SMA8
2 DDRA_SMA6

1
2

DDRA_SCS#0 8,12
DDRA_SCS#1 8,12

DDRA_SDQ[0..63]

8,12 DDRA_SDQ[0..63]

56_0404_4P2R_5%
RP115
DDRA_SDQ6 1
4
DDRA_SDQS0 2
3

56_0404_4P2R_5%
RP132
4
1 DDRA_SDQ53
3
2 DDRA_SDQ48

56_0404_4P2R_5%
RP67
4
1 DDRA_SMA12
3
2 DDRA_SMA11

56_0404_4P2R_5%
RP76
DDRA_SDM0 1
4
DDRA_SDQ7 2
3

56_0404_4P2R_5%
RP79
4
1 DDRA_SDQ57
3
2 DDRA_SDM7

56_0404_4P2R_5%
RP125
4
1 DDRA_SMA3
3
2 DDRA_SMA5

DDRA_SDQS[0..7]

8,12 DDRA_SDQS[0..7]

DDRA_SMA[0..12]

8,12 DDRA_SMA[0..12]

DDRA_SDM[0..7]

8,12 DDRA_SDM[0..7]

RP45

DDRB_SDQ2 1
DDRB_SDQ6 2

4
3

4
3

DDRB_SDQ0 1
DDRB_SDQ4 2

56_0404_4P2R_5%
RP52
4
3

4
3

RP37
DDRB_SDQS3
DDRB_SDQ25

4
3

56_0404_4P2R_5%
RP44
1 DDRB_SDQ30
2 DDRB_SDQ26

4
3

1
2

1
2

DDRB_SCS#0
DDRB_SWE#

56_0404_4P2R_5%
RP51
DDRB_SDQ7 1
4
DDRB_SDQS0 2
3

56_0404_4P2R_5%
RP24
4
1 DDRB_SDQ62
3
2 DDRB_SDQ59

56_0404_4P2R_5%
RP41
4
1 DDRB_SMA12
3
2 DDRB_SMA9

56_0404_4P2R_5%
RP93
DDRB_SDM0 1
4
DDRB_SDQ1 2
3

56_0404_4P2R_5%
RP30
4
1 DDRB_SDQ55
3
2 DDRB_SDQS6

56_0404_4P2R_5%
RP89
1
4 DDRB_SMA8
2
3 DDRB_SMA11

56_0404_4P2R_5%
RP74
4
3

4
3

56_0404_4P2R_5%
RP78
1 DDRA_SDQ63
2 DDRA_SDQ58

4
3

56_0404_4P2R_5%
RP126
1 DDRA_SMA10
2 DDRA_SMA1

DDRB_SDQ3 1
DDRB_SDQ13 2

56_0404_4P2R_5%
RP94
4
3

4
3

56_0404_4P2R_5%
RP25
1 DDRB_SDQ63
2 DDRB_SDQ61

DDRA_SDQ3 1
DDRA_SDQ9 2

56_0404_4P2R_5%
RP75
4
3

4
3

56_0404_4P2R_5%
RP135
1 DDRA_SDQS7
2 DDRA_SDQ61

4
3

56_0404_4P2R_5%
RP65
1 DDRA_SMA4
2 DDRA_SMA2

DDRB_SDQ15 1
DDRB_SDQ8 2

56_0404_4P2R_5%
RP96
4
3

4
3

56_0404_4P2R_5%
RP29
1 DDRB_SDQ60
2 DDRB_SDQ50

4
3

56_0404_4P2R_5%
RP91
1 DDRB_SMA6
2 DDRB_SMA4

DDRA_SDQ14 1
DDRA_SDQ11 2

56_0404_4P2R_5%
RP73
4
3

4
3

56_0404_4P2R_5%
RP133
1 DDRA_SDQ54
2 DDRA_SDQS6

4
3

56_0404_4P2R_5%
RP124
1 DDRA_SMA7
2 DDRA_SMA9

DDRB_SDQ9 1
DDRB_SDQ5 2

56_0404_4P2R_5%
RP50
4
3

4
3

56_0404_4P2R_5%
RP43
1 DDRB_SDQ14
2 DDRB_SDQ10

4
3

56_0404_4P2R_5%
RP40
1 DDRB_SMA5
2 DDRB_SMA7

DDRA_SDQ12 1
DDRA_SDQ2 2

56_0404_4P2R_5%
RP116
4
3

4
3

56_0404_4P2R_5%
RP62
1 DDRA_SDQ32
2 DDRA_SDQ33

4
3

56_0404_4P2R_5%
RP64
1 DDRA_SMA0
2 DDRA_SBS1

DDRA_SBS1 8,12

DDRB_SDQ11 1
DDRB_SDM1 2

56_0404_4P2R_5%
RP95
4
3

4
3

56_0404_4P2R_5%
RP35
1 DDRB_SDQ37
2 DDRB_SDQS4

4
3

56_0404_4P2R_5%
RP102
1 DDRB_SMA2
2 DDRB_SMA0

DDRA_SDQS1 1
DDRA_SDQ8 2

56_0404_4P2R_5%
RP117
4
3

4
3

56_0404_4P2R_5%
RP61
1 DDRA_SDM4
2 DDRA_SDQ38

4
3

56_0404_4P2R_5%
RP63
1 DDRA_SRAS#
2 DDRA_SCAS#

DDRA_SRAS# 8,12
DDRA_SCAS# 8,12

DDRB_SDQS1 1
DDRB_SDQ12 2

56_0404_4P2R_5%
RP49
4
3

4
3

56_0404_4P2R_5%
RP104
1 DDRB_SDM4
2 DDRB_SDQ39

4
3

56_0404_4P2R_5%
RP42
1 DDRB_CKE1
2 DDRB_CKE0

56_0404_4P2R_5%
RP118
DDRA_SDQ15 1
4
DDRA_SDQ10 2
3

56_0404_4P2R_5%
RP127
4
1 DDRA_SDQ37
3
2 DDRA_SDQ36

56_0404_4P2R_5%
RP81
1
4 DDRA_CKE0
2
3 DDRA_CKE1

56_0404_4P2R_5%
RP119
DDRA_SDQ16 1
4
DDRA_SDQ20 2
3

56_0404_4P2R_5%
RP128
4
1 DDRA_SDQ34
3
2 DDRA_SDQS4

56_0404_4P2R_5%
RP137
1
4 DDRA_SBS0
2
3 DDRA_SWE#

DDRA_SDQ21 1
DDRA_SDQ17 2

56_0404_4P2R_5%
RP72
4
3

4
3

DDRA_SDQ18 1
DDRA_SDQS2 2

56_0404_4P2R_5%
RP120
4
3

56_0404_4P2R_5%
RP60
4
1 DDRA_SDQ39
3
2 DDRA_SDQ40

56_0404_4P2R_5%
RP71
DDRA_SDM2 1
4
DDRA_SDQ22 2
3

56_0404_4P2R_5%
RP58
4
1 DDRA_SDQ42
3
2 DDRA_SDQ47

56_0404_4P2R_5%
RP70
4
3

56_0404_4P2R_5%
RP69
DDRA_SDQ25 1
4
DDRA_SDM3 2
3

4
3

56_0404_4P2R_5%
RP59
1 DDRA_SDQ45
2 DDRA_SDM5

56_0404_4P2R_5%
RP129
1 DDRA_SDQ44
2 DDRA_SDQ35

56_0404_4P2R_5%
RP57
4
1 DDRA_SDQ49
3
2 DDRA_SDQ52

DDRA_SDQS5 1
DDRA_SDQ41 2

56_0404_4P2R_5%
RP130
4
3

4
3

56_0404_4P2R_5%
RP122
1 DDRA_SDQS3
2 DDRA_SDQ29

DDRA_SDM6 1
DDRA_SDQ51 2

56_0404_4P2R_5%
RP56
4
3

4
3

56_0404_4P2R_5%
RP123
1 DDRA_SDQ27
2 DDRA_SDQ30

DDRA_SDQ46 1
DDRA_SDQ43 2

56_0404_4P2R_5%
RP131
4
3

4
3

56_0404_4P2R_5%
RP136
1 DDRA_SDQ59
2 DDRA_SDQ62

56_0404_4P2R_5%
RP55
DDRA_SDQ50 1
4
DDRA_SDQ56 2
3
56_0404_4P2R_5%

56_0404_4P2R_5%
RP134
4
1 DDRA_SDQ60
3
2 DDRA_SDQ55
56_0404_4P2R_5%

0.1U_0402_10V6K
1
C630

C621

2
0.1U_0402_10V6K
+1.25VS

0.1U_0402_10V6K
1
C627

2
0.1U_0402_10V6K
+1.25VS

DDRB_SRAS# 9,13
DDRB_SBS1 9,13

2
0.1U_0402_10V6K
+1.25VS

2
0.1U_0402_10V6K

DDRB_SDQ22 1
DDRB_SDQS2 2

56_0404_4P2R_5%
RP47
4
3

56_0404_4P2R_5%
RP108
4
1 DDRB_SDQ48
3
2 DDRB_SDQ53

56_0404_4P2R_5%
RP46
DDRB_SDQ24 1
4
DDRB_SDQ17 2
3

56_0404_4P2R_5%
RP34
4
1 DDRB_SDQ40
3
2 DDRB_SDQ38

DDRB_SDQ23 1
DDRB_SDQ28 2

0.1U_0402_10V6K
1
C328

56_0404_4P2R_5%
RP109
4
3

4
3

56_0404_4P2R_5%
RP33
4
1 DDRB_SDQS5
3
2 DDRB_SDQ44

4
3

4
3

56_0404_4P2R_5%
RP101
1 DDRB_SDQ27
2 DDRB_SDQ31

56_0404_4P2R_5%
RP26
1
4
2
3

4
3

56_0404_4P2R_5%
RP28
1 DDRB_SDQS7
2 DDRB_SDQ56

56_0404_4P2R_5%
RP32

DDRB_SDM7
DDRB_SDQ54

56_0404_4P2R_5%
RP31
DDRB_SDQ49 1
4
DDRB_SDQ52 2
3

0.1U_0402_10V6K
1
C319
C317

56_0404_4P2R_5%
RP107
1 DDRB_SDQ41
2 DDRB_SDQ47

56_0404_4P2R_5%
RP103
1 DDRB_SDQ32
2 DDRB_SDQ36

DDRB_SDQ42 1
DDRB_SDQ43 2

56_0404_4P2R_5%
RP106
1 DDRB_SDQ45
2 DDRB_SDM5

4
3

DDRB_SDM6 1
DDRB_SDQ51 2

4.7U_0805_10V4Z
1
C619
C618

2
0.1U_0402_10V6K

56_0404_4P2R_5%
RP99
4
3

56_0404_4P2R_5%
RP98
DDRB_SDM2 1
4
DDRB_SDQ18 2
3

C321

2
4.7U_0805_10V4Z

0.1U_0402_10V6K
1
C320
C318

0.1U_0402_10V6K
1
1
C624
C625

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C325
C324

0.1U_0402_10V6K
1
C633

C632

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C316

2
0.1U_0402_10V6K

C628

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C323
C322

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C629

C631

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C326
C329

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*28
5

DDRA_SBS0 8,12
DDRA_SWE# 8,12

0.1U_0402_10V6K
1
1
C327
C564

DDRB_CKE1 9,13
DDRB_CKE0 9,13

DDRB_SCAS# 9,13
DDRB_SCS#1 9,13

2
0.1U_0402_10V6K

C626

56_0404_4P2R_5%
RP90
1
4 DDRB_SRAS#
2
3 DDRB_SBS1

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
1
C634
C622

2
0.1U_0402_10V6K
+1.25VS

56_0404_4P2R_5%
RP39
4
1 DDRB_SMA1
3
2 DDRB_SMA3

56_0404_4P2R_5%
RP105
4
1 DDRB_SDQ35
3
2 DDRB_SDQ46

4
3

56_0404_4P2R_5%

56_0404_4P2R_5%
RP27
4
1 DDRB_SDQ57
3
2 DDRB_SDQ58

DDRB_SDM[0..7]

9,13 DDRB_SDM[0..7]

56_0404_4P2R_5%
RP48
1
4
2
3
56_0404_4P2R_5%
RP100
4
3

DDRB_SMA[0..12]

9,13 DDRB_SMA[0..12]

DDRA_CKE0 8,12
DDRA_CKE1 8,12

DDRB_SDQ29 1
DDRB_SDM3 2

DDRB_SDQS[0..7]

9,13 DDRB_SDQS[0..7]

56_0404_4P2R_5%
RP110
4
1 DDRB_SCAS#
3
2 DDRB_SCS#1

+1.25VS

DDRB_SDQ[0..63]

9,13 DDRB_SDQ[0..63]

56_0404_4P2R_5%
RP36
4
1 DDRB_SDQ34
3
2 DDRB_SDQ33

DDRB_SDQ21
DDRB_SDQ20

DDRB_SBS0 9,13

56_0404_4P2R_5%
RP97
DDRB_SDQ19 1
4
DDRB_SDQ16 2
3

56_0404_4P2R_5%

DDRB_SCS#0 9,13
DDRB_SWE# 9,13

56_0404_4P2R_5%
RP38
1 DDRB_SMA10
2 DDRB_SBS0

DDRA_SDQ13 1
DDRA_SDM1 2

DDRA_SDQ23 1
DDRA_SDQ24 2

+1.25VS

+1.25VS

RP77

56_0404_4P2R_5%
+1.25VS

2
0.1U_0402_10V6K
+1.25VS

0.1U_0402_10V6K
1
C280

C281

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C278

C279

2
0.1U_0402_10V6K

2
B

0.1U_0402_10V6K
1
1
C276
C275

2
2
0.1U_0402_10V6K

C563

2
0.1U_0402_10V6K
+1.25VS

0.1U_0402_10V6K
1
C282

C283

2
2
0.1U_0402_10V6K

C277

2
0.1U_0402_10V6K
+1.25VS

C284

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C565

C623

2
2
0.1U_0402_10V6K

4.7U_0805_10V4Z
1
C572

C570

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
1
C274
C273

0.1U_0402_10V6K
1
C567

0.1U_0402_10V6K
1
C571

2
4.7U_0805_10V4Z

2
0.1U_0402_10V6K

C566

2
0.1U_0402_10V6K

C573

0.1U_0402_10V6K
1
1
C272
C562

0.1U_0402_10V6K
1
C569

C568

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C258

C259

2
0.1U_0402_10V6K

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*26

56_0404_4P2R_5%
Title

DDR Termination Resistors


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Size
B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

14

of

57

SEL0

SEL1

CPU

REF0

REF1 SRC

100

3V66[0..3]
66

14.3

14.3

100/200

MID

REF

REF

REF

REF

REF

200

66

14.3

14.3

100/200

USB/Dot
+3VS

Place near each pin


W>40 mil

+3VS_CLK

48
L29
1
2
BLM21A601SPT_0805
L28
1
2
BLM21A601SPT_0805

REF
48

133

66

14.3

14.3

100/200

48

166

66

14.3

14.3

100/200

48

MID

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Trace wide=40 mils


1

1
C591
10U_1206_6.3V7K

C583
0.1U_0402_10V6K

C582
0.1U_0402_10V6K

C597
0.1U_0402_10V6K

C596
0.1U_0402_10V6K

C595
0.1U_0402_10V6K

C594
0.1U_0402_10V6K

C580

0.1U_0402_10V6K

Hi-Z
1

U42
CLKREF1
CLKREF0

C602
@10P_0402_50V8K
2
1

CLK_XTAL_IN

1
2

REF_0
REF_1

XTAL_IN

0.1U_0402_10V6K

C592
4.7U_0805_10V4Z

42
48

1
33_0402_5%

VDD_CPU
VDD_CPU

2
R451

34
36

37 CLK_14M_SIO

VDD_48
VDD_SRC

1
33_0402_5%

VDD_REF
VDD_PCI
VDD_PCI
VDD_3V66

2
R450

3
10
16
24

2
24 CLK_ICH_14M

C581

VSS_CPU

45

CPUCLKT2

47

CLK_CPU2

1
R428

X3

2
33_0402_5%
1
49.9_0603_1%

CLK_HCLK

CLK_HCLK 7

2
R413
C

C603
@10P_0402_50V8K
2
1

R462 2
R425 2
R424 2

24 PM_SLP_S1#
24 STP_PCI#
24,54 STP_CPU#

1 @0_0402_5%
1 @0_0402_5%
1 @0_0402_5%

14.31818MHz_20P_1BX14318CC1A~L
CLK_XTAL_OUT

Place crystal within


500 mils of CK409

SLP_S1#
STPPCI#
STPCPU#

R463 1
R412 1
R411 1

+3VS

CLKSEL0 51
CLKSEL1 56

2 1K_0402_5%
2 1K_0402_5%
2 1K_0402_5%

SLP_S1#
STPPCI#
STPCPU#
CLK_VTT_PG#

53 CK409_PWRGD#

21
49
50
35

XTAL_OUT

CPU_CLKC2

46

CLK_CPU2#

CPUCLKT1

44

CLK_CPU1

CK409

SEL0
SEL1

PWRDWN#
PCI_STP#
CPU_STP#

CPUCLKC1

43

CLK_CPU1#

CPUCLKT0

41

CLK_CPU0

VTT_PWRGD#

R444

1K_0603_1%

1K_0603_1%

R421

CLKSEL0

CLKSEL1
R420

R443
2K_0603_1%

R187 2

1 @0_0402_5%

R186 2

1 0_0402_5%

R188 2

1 0_0402_5%

R189 2

1 @0_0402_5%

37

CPU_CLKSEL1 5

CLK48M_OUT0
1
33_0402_5%

2
R438

24 CLK_ICH_48M

38

SRCLKN_100MHZ

CPUCLKC0

40

48/66MHZ_OUT/3V66_4

29

66MHZ_OUT3/3V66_3

27

66MHZ_OUT2/3V66_2

26

66MHZ_OUT1/3V66_1
66MHZ_OUT0/3V66_0
SRCLKP_100MHZ

31

USB_48MHZ

32

DOT_48MHZ

MCH_CLKSEL0 7
MCH_CLKSEL1 7
R185

R190
2.49K_0603_1%

2.49K_0603_1%

1
R437

Check SPEC (250mA,300 ohm)

+3VS

L27
BLM11A601S_0603
1
2

2
475_0603_1%

CLK_VDD_PLL

C578
10U_1206_6.3V7K

52

55
1

VDD_PLL

C579
0.1U_0402_16V4Z

54

VSS_PLL

39
53

6
11
17
25
33

CLK_CPU0#

2
R414

1
49.9_0603_1%
2
33_0402_5%
2
33_0402_5%
1
49.9_0603_1%

2
R416

1
49.9_0603_1%
1
2
R433
33_0402_5%

2
R418

1
R431
1
R432

CLK_HCLK#

CLK_ITP#

2
R417

CLK_BCLK 4

Place near CK409


CLK_BCLK#

CLK_BCLK# 4

1
R457

2
33_0402_5%

CLK_AGP_66M 16

23

CLK66M_OUT1
CLK66M_OUT0

PCICLK_F2

PCICLK_F2

PCICLK_F1

PCICLK0

1
R456
1
R455
1
R452
1
R713

2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%

CLK_MCH_66M 10

22

PCICLK_F0

1
R461
1
R460
1
R454
1
R459
1
R458
1
R453

2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%

CLK_PCI_MINI 30

PCICLK6

20

PCICLK6

PCICLK5

19

PCICLK5

PCICLK4

18

PCICLK4

PCICLK3

15

PCICLK3

PCICLK2

14

PCICLK2

PCICLK1

13

PCICLK1

PCICLK0

12

CLK_ITP# 5

CLK_BCLK

CLK_ICH_66M 26
CLK_PCI_ICH 26
CLK_80H 13

CLK_PCI_PCM 28
CLK_PCI_LPC 40
CLK_PCI_1394 31
CLK_PCI_LAN 27
CLK_PCI_SIO 37

ICS952623BG_TSSOP56

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

CLK_ITP

2
R415

Title

CLK_HCLK# 7

CLK_ITP

CLK66M_OUT3

IREF

VSS_SRC
VSS_IREF

SCLK
SDATA

CPU_CLKSEL0 5

2K_0603_1%

28
30

VSS_REF
VSS_PCI
VSS_PCI
VSS_3V66
VSS_48

CK_SCLK
CK_SDATA

12,13,26 ICH_SMB_CLK
12,13,26 ICH_SMB_DATA

+3VS

1
49.9_0603_1%
1
2
R429
33_0402_5%
1
2
R430
33_0402_5%
1
49.9_0603_1%

Size

Compal Electronics, Inc.


Clock Generator
Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

15

of

57

VDD1

D-

ALERT#

I2CC_SCL

SCLK

THERM#

SDATA

GND

@0.1U_0402_16V4Z

AGP_SBA[0..7]

10 AGP_SBA[0..7]

AGP_C/BE#[0..3]

10 AGP_C/BE#[0..3]

AGP_ST[0..2]

10 AGP_ST[0..2]

C16
1
+3VS

R68

@10P_0402_50V8K @10_0402_5%

R35
10K_0402_5%
STP_AGP#
1
2
AGP_BUSY#
1
2
R36
10K_0402_5%

+SVDD

C31

C30

15 CLK_AGP_66M
22,26,35,36 B_PCIRST#
10
AGP_REQ#
10
AGP_GNT#
10
AGP_PAR
10
AGP_STOP#
10 AGP_DEVSEL#
10 AGP_TRDY#
10
AGP_IRDY#
10 AGP_FRAME#
26,28,31 PCI_PIRQA#

+3VS
L10

1
2
FCM2012C-800_0805

4.7U_0805_10V4Z

0.1U_0402_10V6K

C148

AGP_AD[0..31]

10 AGP_AD[0..31]

NV_THERCTL#

10
10
10
10

C478
0.1U_0402_10V6K

4.7U_0805_10V4Z

1
R67
1
R69

10 AGP_SB_STBF
10 AGP_SB_STBS
10 AGP_AD_STBF0
10 AGP_AD_STBS0
10 AGP_AD_STBF1
10 AGP_AD_STBS1

AGP_AD_STBS0

2
220K_0402_5%
2
220K_0402_5%

AGP_WBF#
AGP_RBF#
AGP_DBIHI
AGP_DBILO

AGP_AD_STBS1

Selection Table For W180


B

Modulation
Setting

SS%

SST
Ratio

Close VGA ball (AK29)


less than 250mils
+AGP_VREF

1.25%

R42

3.75%

C13
0.1U_0402_10V6K
22
22
22

1
R70

+SVDD

PLACE COLSE TO VGA


Pin AJ5, AJ7,

X1/CLK

1
2
R317
1K_0402_5%

FS1

X2

FS2

SS%

R343

AJ24
AH19
AF25
AG22

C/BE#0
C/BE#1
C/BE#2
C/BE#3

CLK_AGP_66M
B_PCIRST#
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_IRDY#
AGP_FRAME#
PCI_PIRQA#

AG12
AF15
AF13
AE15
AK18
AH17
AJ16
AJ17
AG16
AK16
AG15
AE10

PCICLK
PCIRST#
PCIREQ#
PCIGNT#
PCIPAR
PCISTOP#
PCIDEVSEL#
PCITRDY#
PCIIRDY#
PCIFRAME#
PCIINTA#
NC

AGP_WBF#
AGP_RBF#

AG17
AG14
AJ18
AJ19

AGP_SB_STBF
AK13
AGP_SB_STBS
AJ13
AGP_AD_STBF0 AK24
AGP_AD_STBS0 AJ25
AGP_AD_STBF1 AG21
AGP_AD_STBS1 AF21

4SPREAD_RATE

1
2
R341
@1K_0402_5%
R345

AK29
AF16
AF12
AG11

AGPVREF
NC/AGPMBDET#
AGP_BUSY#
STP_AGP#

CRMA
LUMA
COMPS
DACB_HSYNC
DACB_VSYNC
23
I2CB_CLK
23
I2CB_DATA
1
@10K_0402_5%

JTAG_TRST

AE2
AD2
AD1
AF3
AE3
AD3
AE7
AF6
AD4
Y5
AC4

G5
F4
G4
H5
H4
J4
J5
J6
K4
K6

FPBCLKOUT#
FPBCLKOUT

M2
M3

DACB_RED/CHROMA
DACB_GREEN/LUMA
DACB_BLUE/COMPOSITE
DACB_HSYNC
DACB_VSYNC
DACB_RSET
I2CB_SCL
I2CB_SDA
SWAPRDY_B
STEREO
DACB_IDUMP

AJ6
AH6

XTALIN
XTALOUT

AJ7
AJ5
H2
H3
C2
C1
D1
E2
D2

XTALSSIN
XTALOUTBUFF
THERMDA
THERMDC
JTAG[0]
JTAG[1]
JTAG[2]
JTAG[3]
JTAG[4]
NV36M_BGA701

ROMA14
ROMA15
ROMCS#

R2
R1
AF2

VIPPCLK
VIPHCTL
VIPHCLK

L4
M4
M5

VIPHAD0
VIPHAD1

P3
P2

VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

J3
J2
K2
K1
L3
L2
N2
N1

DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8
DVOD9
DVOD10
DVOD11
DVOHSYNC
DVOVSYNC
DVODE
DVOCLKOUT
DVOCLKOUT#
I2CC_SCL
I2CC_SDA
BUFRST#
DVOCLKIN
STRAP0
STRAP1
STRAP2
STRAP3

only for NV36M

2 R752
2
R753
5

AGPSB_STB/ ADSTBF
AGPSB_STB#/ ADSTBS
AGPADSTB0/ ADSTBF0
AGPADSTB0#/ADSTBS0
AGPADSTB1/ ADSTBF1
AGPADSTB1#/ADSTBS1

+AGP_REF
1 10K_0402_5%
AGP_BUSY#
STP_AGP#

+3VS

AGPRBF#
AGPPIPE/ DBI_HI
NC/ DBI_LO

AGPSBA0
AGPSBA1
AGPSBA2
AGPSBA3
AGPSBA4
AGPSBA5
AGPSBA6
AGPSBA7
AGPST0
AGPST1
AGPST2

W180-01GT_SO8
10K_0402_5%

AGP4X/8X
AGPWBF#

AJ11
AH11
AJ12
AH12
AJ14
AH14
AJ15
AH15
AG13
AE16
AE13

XTALSSIN
XTALOUTBUFF
NV_THERMDA
NV_THERMDC
JTAG_TCLK
JTAG_TMS
JTAG_TDI

+SVDD

PCI/AGP

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2

SWAPRDY_B
NV31,NV34 use.
XTALIN
NV18, NV36 not use. XTALOUT

2 XTALSSIN
22_0402_5%

1
R323

GND

CLKOUT

XTALOUTBUFF
+3VS R318
1K_0402_5%
1
2

CRMA
LUMA
COMPS

DACB_RSET
2
63.4_0603_1%
+3VS

VDD

U31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

ZV PORT / EXT TMDS / GPIO / ROM

D+

LVDS

NV_THERMDC

@ADM1032ARM_RM8

C479

U33

I2CC_SDA

+3VS

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

nVIDIA
NV36M

DAC1

@2.2K_0402_5%

2.2K_0402_5%
@2200P_0402_50V7K
1
C145
NV_THERMDA

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

TMDS

R124

AJ28
AK28
AH27
AK27
AJ27
AH26
AJ26
AH25
AH23
AJ23
AH22
AJ22
AJ21
AK21
AH20
AJ20
AG26
AE24
AG25
AG24
AF24
AG23
AE22
AF22
AE21
AG20
AG19
AF19
AE19
AF18
AG18
AE18

DAC2

R128

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

SSC
CLK

Place close
to pin
H2 & H3

U35A

+3VS +3VS

IFPATXDO#
IFPATXDO
IFPATXD1#
IFPATXD1
IFPATXD2#
IFPATXD2
IFPATXD3#
IFPATXD3
IFPATXC#
IFPATXC
IFPBTXD4#
IFPBTXD4
IFPBTXD5#
IFPBTXD5
IFPBTXD6#
IFPBTXD6
IFPBTXD7#
IFPBTXD7
IFPBTXC#
IFPBTXC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC

SPREAD_RATE

1
0_0402_5%
ENBKL
ENVDD

PROPRIETARY NOTE

ENBKL

ROMA14
ROMA15

STRAP0
R749

VIPHCTL

2
@10K_0402_5%

R377 2

1 10K_0402_5%

SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS


R376 2

10K_0402_5%

+3VS

PCI_AD_SWAP: 0-RVSERSED 1-NORMAL

1 10K_0402_5%

STRAP1

RAM_CFG[3:0]
(1101 = 4Mx32 DDR,0000 =8Mx32 DDR Samsung, 0001 =8Mx32 DDR Hynix, DQS per byte)

AG2
AH1
AG3
AJ1
AH2
AK1
AJ3
AK3
AH4
AK4
AJ4
AH5

Low

T4
U4
AA1
Y2
W3
V3
V4
U5
V1
W2
V5
W4
AB2
AB3
W6
Y6
AC2
AC3
Y3
AA2

4
1
DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8
DVOD9
DVOD10
DVOD11

DVOD2
DVOD3

DVOD8
DVOD9

R
AK10
G
AJ10
B
AJ9
AH9 DACA_HSYNC
AJ8 DACA_VSYNC

AG8

I2CA_SCL
I2CA_SDA
SWAPRDY_A
DACA_IDUMP

AG5
AF7
AF9
AG10

R334 2

STRAP2

R379 2

1 @10K_0402_5%

1 @10K_0402_5%

DVOD2

R335 2

1 10K_0402_5%

R380 2

1 @10K_0402_5%

STRAP3

R381 2

1 @10K_0402_5%

1 10K_0402_5%

DVOD3

R330 2

1 @10K_0402_5%

NV18M
R329 2

NV31M:NV34M

23
23
23
23
23
23
23
23
23
23
23
23

5
2

R49

1 @10K_0402_5% DACA_VSYNC R29

1 10K_0402_5%

R50

1 @10K_0402_5% DACA_HSYNC R30

1 10K_0402_5%

CRYSTAL: (10)-27MHz

Low

R373 2

High

High

STRAP0
STRAP1
STRAP2
STRAP3
TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXOUT3TXOUT3+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZOUT3TZOUT3+
TZCLKTZCLK+

1 @10K_0402_5%

NV18M
NV31M:NV34M

DVO_HSYNC
AD5
DVO_HSYNC 23 Low
AD6
DVO_VSYNC 23
DVODE
AE4
+3VS
1
2
AJ2
DVOCLKOUT 23 High
AK2 R760 33_0402_5%
I2CC_SCL R693 2
1
AG6
I2CC_SDA R694 2
1 2.2K_0402_5%
AG7
2.2K_0402_5%
B1
BUFRST# 23
DVOCLKIN
AG1
DVOCLKIN 23

G1
G2
F2
F3

R378 2

VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

1 10K_0402_5%

VIPD2
VIPD6

R357 2

1 10K_0402_5%

DACB_VSYNC R340 2

1 10K_0402_5%

TVMODE: (01)-NTSC

0
1

R339 2

AGP8X/4X: (0)-8X / (1)-4X


R48

1 10K_0402_5%

DACB_HSYNC

1 10K_0402_5%

DVOD9

AGP_SIDEBAND: (0)-ENABLE
R360 2

1 10K_0402_5%

VIPD7

TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXOUT3TXOUT3+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZOUT3TZOUT3+
TZCLKTZCLK+

R319 2

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

1 10K_0402_5%

DVOD8

11 PCI_DEVID[3:0] (1000

1 @10K_0402_5%

R320 2

1 @10K_0402_5%

Low

High

NV36M 0100 NV34M 1010 NV31M)

R366 2

1 10K_0402_5%

VIPD4

R367 2

1 @10K_0402_5%

R363 2

1 10K_0402_5%

VIPD5

R364 2

1 @10K_0402_5%

R370 2

1 10K_0402_5%

VIPD3

R371 2

1 @10K_0402_5%

R346 2

1 @10K_0402_5% DVO_HSYNC R347 2

12 BUS_TYPE: (1)-AGP

VIPHCTL

R126 2

1 10K_0402_5%

ROM TYPE: (00)-PARALLEL


0

R354 2

1 10K_0402_5%

ROMA14

R355 2

1 @10K_0402_5%

High

R351 2

1 10K_0402_5%

ROMA15

R352 2

1 @10K_0402_5%

R
22
G
22
B
22
DACA_HSYNC 22
DACA_VSYNC 22

DACA_RSET 1
2
R39
130_0603_1%
DDC_CLK
DDC_CLK 22
DDC_DATA
DDC_DATA 22
2
1
+3VS
R41
@10K_0402_5%

Y2
XTALIN
DVOCLKIN 2
1
R750 @10K_0402_5%

2
2
R754

XTALOUT

27MHZ_16PF
1
2
R311
@2M_0402_5%

SWAPRDY_A
NV31,NV34 use.
NV18, NV36 not use.
10K_0402_5%

1 10K_0402_5%

Low

only for NV36M


T2
R3
T3
U2
V2
U3
P4
P5

R361 2

10 AGP_FASTWRITE: (0)-ENABLE

C468

22P_0402_50V8J
2

C469

22P_0402_50V8J
2
A

1 R751 JTAG_TCLK
JTAG_TRST
1
10K_0402_5%

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

1
2
R691
@10K_0402_5%
ONLY FOR NV18M
1
2
R682
10K_0402_5%

VGA_GPIO5
R374 2
1 @0_0402_5%
VAG_GPIO6
R129 2
POWER_SEL1
1 10K_0402_5% (SUS_STAT#) +3VS
POWER_SEL_FR701 2
R683
1 @0_0402_5%
POWER_SEL 52
NV_THERCTL#
Only for
R133 2
1 10K_0402_5% +3VS
NV34MU, NV31
Power Mizer

only for NV36M

1 10K_0402_5% JTAG_TMS
1 10K_0402_5% JTAG_TDI

DVODE

22,40
22

only for NV36M

DACA_RSET

IFPCTXD0#
IFPCTXD0
IFPCTXD1#
IFPCTXD1
IFPCTXD2#
IFPCTXD2
IFPCTXC#
IFPCTXC

VGA_GPIO0 2
R132
ENBKL
ENVDD

nVIDIA NV36M (AGP BUS)


Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

16

of

57

NDQMA[0..7]

20 NDQMA[0..7]

21

NMDA[0..63]

20 NMDA[0..63]

NDQSB[0..7]

21 NDQSB[0..7]

NMAA[0..11]

20 NMAA[0..11]

NDQMB[0..7]

21 NDQMB[0..7]

NDQSA[0..7]

20 NDQSA[0..7]

NMAB[0..11]

NMAB[0..11]
D

NMDB[0..63]

21 NMDB[0..63]

U35C
U35B

P28

NMRASA#

FBACAS#

P29

NMCASA#

FBAWE#

R28

NMWEA#

FBACS0#

U27

NMCSA0#

FBACS1#

P27

NMCSA1#

NMRASA# 20
NMCASA# 20
NMWEA# 20
NMCSA0# 20
NMCSA1# 20

FBACKE

N30

NMCKEA

FBACLK0
FBACLK0#

U21
V21

NMCLKA0
NMCLKA0#

FBACLK1
FBACLK1#

N21
P21

NMCLKA1
NMCLKA1#

FBABA0
FBABA1

R26
R29

NMA_BA0
NMA_BA1

FB_VREF

C28

NMCKEA

NMCLKA0 20
R89
@120_0402_5%

20

NMCLKA0# 20
NMCLKA1 20
R105
@120_0402_5%

NMA_BA0 20
NMA_BA1 20

A_REF

NMCLKA1# 20

+2.5VS

(10 mil)

R138
1K_0603_1%

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

D11
B10
D7
C5
C26
F24
B21
D20

NDQMB0
NDQMB1
NDQMB2
NDQMB3
NDQMB4
NDQMB5
NDQMB6
NDQMB7

FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7

D12
A10
E7
A4
A27
D24
A21
D19

NDQSB0
NDQSB1
NDQSB2
NDQSB3
NDQSB4
NDQSB5
NDQSB6
NDQSB7

FBCRAS#

C14

NMRASB#

FBCCAS#

B14

NMCASB#

FBCWE#

C15

NMWEB#

FBCCS0#

D17

NMCSB0#

FBCCS1#

D14

NMCSB1#

FBCCKE

A13

NMCKEB

FBCCLK0
FBCCLK0#

K18
K17

NMCLKB0
NMCLKB0#

FBCCLK1
FBCCLK1#

K13
K14

NMCLKB1
NMCLKB1#

FBCBA0
FBCBA1

E15
B15

NMRASB# 21
NMCASB# 21
NMWEB# 21
NMCSB0# 21
NMCSB1# 21
NMCKEB

NMCLKB0 21
R111
@120_0402_5%

21

NMCLKB0# 21
NMCLKB1 21

R110
@120_0402_5%
NMB_BA0
NMB_BA1

NMB_BA0 21
NMB_BA1 21

NMCLKB1# 21

NV36M_BGA701

NV36M_BGA701

A18
C17
B17
C16
B16
D16
A16
E16
F16
D15
F15
A15
G17

FBARAS#

FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBCA12

NDQSA0
NDQSA1
NDQSA2
NDQSA3
NDQSA4
NDQSA5
NDQSA6
NDQSA7

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

M27
K30
G27
D30
AG30
AD26
AA29
W27

F13
D13
E13
F12
E10
D10
D9
D8
B13
B12
C12
B11
B9
C9
B8
A7
F10
E9
F9
F7
C6
E6
D5
C4
C8
B7
B6
B5
A3
B3
A2
B2
B29
A29
B28
A28
B26
B25
B24
C23
E26
D26
E25
C25
E24
F22
E22
F21
A24
B23
C22
B22
B20
C19
B19
B18
D23
D22
D21
E21
F19
E18
D18
F18

FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7

NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7
NMDB8
NMDB9
NMDB10
NMDB11
NMDB12
NMDB13
NMDB14
NMDB15
NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB24
NMDB25
NMDB26
NMDB27
NMDB28
NMDB29
NMDB30
NMDB31
NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39
NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47
NMDB48
NMDB49
NMDB50
NMDB51
NMDB52
NMDB53
NMDB54
NMDB55
NMDB56
NMDB57
NMDB58
NMDB59
NMDB60
NMDB61
NMDB62
NMDB63

MEMORY INTERFACE B

L27
K29
G25
E28
AF28
AD27
AA30
Y27

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

NDQMA0
NDQMA1
NDQMA2
NDQMA3
NDQMA4
NDQMA5
NDQMA6
NDQMA7

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11

V30
U28
U29
T28
T29
T27
T30
T26
T25
R27
R25
R30
U24

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

N25
N27
N26
M25
K26
K27
J27
H27
N29
M29
M28
L29
J29
J28
H29
G30
K25
J26
J25
G26
F28
F26
E27
D27
H28
G29
F29
E29
C30
C29
B30
A30
AJ29
AJ30
AH29
AH30
AF29
AE29
AD29
AC28
AG28
AF27
AE26
AE28
AD25
AB25
AB26
AA25
AD30
AC29
AB28
AB29
Y29
W28
W29
V29
AC27
AB27
AA27
AA26
W25
V26
V27
V25

MEMORY INTERFACE
A

NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63

R135

0.1U_0402_10V6K

1K_0603_1%

C173

NV36M use 10K

1
R358

2
10K_0402_5%

NMCKEA

1
R389

2
10K_0402_5%

NMCKEB
A

Title

Compal Electronics, Inc.


nVIDIA NV36M (DDR)

Size

Document Number

Rev
0.3

Sapporo 300P
Date:
5

, 01, 2003

Sheet
1

17

of

57

U35D
C44

+1.5VS
49.9_0603_1%
2
2
49.9_0603_1%

N4
+5VS
AE9
AGPCALPD_VDDQ AA13
AGPCALPU_GND AA14
+AGP_PLLVDD
AE12

+2.5VS
B

FBCAL_PD_VDDQ
NV31,NV34 use.
NV18 not use.
FBCAL_PUK_GND
NV31,NV34 use.
NV18 not use.
FBCAL_TERM_GND
NV31 use (tie to GND).
NV18,NV34 not use.
FBCAL_CLK_GND
NV31 use.
NV18,NV34 not use.

F8
F11
F14
F17
F20
F23
G8
G11
G20
G23
H24
H25
L24
L25
P25
U25
Y24
Y25
AC24
AC25

AA6
AC5
AF10
AG29
+1.25VSFBVTT AE27
G9
Y28

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VD50CLAMP0
VD50CLAMP1
AGPCALPD_VDDQ
AGPCALPU_GND
AGP_PLLVDD

IFABVPROBE
IFPABREST

IFPABPLLVDD
IFPABPLLGND

U10
V10

+IFPABPLLVDD

IFPAIOVDD
IFPAIOGND

T5
T6

+IFPABIOVDD

IFPBIOVDD
IFPBIOGND

Y4
W5

AA3
R4

IFPCVPROBE

IFPCPLLVDD
IFPCPLLGND

P10
N10

+IFPCPLLVDD

IFPCIOVDD
IFPCIOGND

R5
R6

+IFPCIOVDD

VIPVDDQ
VIPVDDQ
VIPVDDQ

L6
L7
M7

VIPCAL_PD_VDDQ
VIPCAL_PU_GND

P6
P7

2 @0.1U_0402_10V6K
2
@1K_0402_5%
2
10K_0402_5%

1
1
R112
1
R107
1
R114

+5VS

C61
4.7U_0805_10V4Z

C36
0.1U_0402_16V4Z

C40
0.022U_0402_16V7K

C39
0.022U_0402_16V7K

0.022U_0402_16V7K

C41
0.1U_0402_10V6K

C110
0.1U_0402_10V6K

+3VS
L11
1
2
KC FBM-L11-201209-221LMAT_0805
1
C24

+DACA/BVDD

C53

C65

+VIP/DVOVDDQ

NV31 use only.


NV18,NV34 not use.
VIPCAL_1
VIPCAL_2

R120 2
R125 1

4.7U_0805_10V4Z

4700P_0402_25V7K

470P_0402_50V8J

49.9_0603_1%
49.9_0603_1%

1
2

+PLLVDD
1 C472

AD8
AD9
AE8

NV31 use only.


NV18,NV34, NV36 not use.

+VIP/DVOVDDQ

1
C474

4.7U_0805_10V4Z

1
C15

4700P_0402_25V7K

+3VS
L20
1
2
KC FBM-L11-201209-221LMAT_0805

470P_0402_50V8J

DVOCAL_PD_VDDQ
DVOCAL_PU_GND
DVO_VREF

AB6
AB7
AF4

DVOCAL_1
DVOCAL_2

R349 1
R348 1

2
2

49.9_0603_1%
49.9_0603_1%

R76
1K_0603_1%

+DVO_VREF

TESTMODE
TESTMECLK

DACB_VDD
DACB_VREF

AE5
G24

AB4
AB5

R342 1

2 10K_0402_5%

R117 1

2 10K_0402_5%

TESTMECLK
NV31,NV34 use.
NV18 not use.

+DACA/BVDD
DACAVREF

AG9
AH8

R71

0.1U_0402_10V6K

1K_0603_1%

C10

C87
470P_0402_50V8J

C88
4700P_0402_25V7K

C67
0.01U_0402_50V7K

0.01U_0603_50V7K
+2.5VS
49.9_0603_1%
49.9_0603_1%
49.9_0603_1%
549_0603_1%

F5
E4
D3
E3

+IFPABIOVDD

FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FBCAL_CLK_GND

+3VS
L13
2
1
KC FBM-L11-201209-221LMAT_0805

+IFPABPLLVDD

C23

NV36M not use


1

DACBVREF

DACA_VDD
DACA_VREF

2
2
2
2

1
1
1
1

R136
R139
R385
R137

C100
470P_0402_50V8J

C62
4700P_0402_25V7K

+3VS
L14
2
1
KC FBM-L11-201209-221LMAT_0805
1
C131

4.7U_0805_10V4Z

+3VS
L12
1
2
KC FBM-L11-201209-221LMAT_0805

+VIP/DVOVDDQ

C50
470P_0402_50V8J

C114
4700P_0402_25V7K

R385 use 49.9 for NV36M


FB_DLLVDD
PLLVDD

C27
AK7

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

B4
B27
C11
C20
D6
D25
D29
E12
E19
F27
L28
M26
N5
W7
W26
Y7

NC
NC
NC
NC
NC
FBVTT
NC

+FB_DLLVDD
+PLLVDD

+FB_DLLVDD

C176
4700P_0402_25V7K

+3VS

+3VS
L15
1
2
KC FBM-L11-201209-221LMAT_0805
1
C182

L19
+AGP_PLLVDD

C471

470P_0402_50V8J

4.7U_0805_10V4Z

2
KC FBM-L11-201209-221LMAT_0805
1
C43

C37
4700P_0402_25V7K

470P_0402_50V8J

+FB_DLLVDD
NV31,NV34 use.
NV18 not use.

+AGP_PLLVDD
NV31,NV34 use.
NV18 not use.
A

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

NV36M not use

DVOVDDQ
DVOVDDQ
DVOVDDQ

C49

2
10K_0402_5%

NV36M_BGA701

+1.5VS

C55

IFPCVPROBE
IFPCRSET

2
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

0.1U_0402_10V6K
2
2
1K_0402_5%

1
1
R109

G14
H6
H7
M6
P24
U6
U7
AC6
AC7
AD12
AD15
AD19
AD22
AD16

+3VS

R40
1
1
R82

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

AA4
V6

L11
L13
L14
L17
L18
L20
N6
N11
N20
P11
P20
U11
U20
V11
V20
Y11
Y13
Y14
Y17
Y18
Y20
AA17
AA18

IFPABVPROBE
IFPABRSET

+VGA_CORE

AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ

AD11
AD14
AD17
AD20
AD23
AE11
AE14
AE17
AE20
AE23

I/O POWER

+1.5VS

nVIDIA NV36M POWER)


Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

18

of

57

+VGA_CORE

+1.25VSFBVTT

R24
T24
W24
AB24
A1
AK30
G6
HDCP_SCL R7
HDCP_SDA T7

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
FBVTT
FBVTT
FBVTT
FBVTT
FBC0_RST
FBA0_RST
NC
HDCP_SCL
HDCP_SDA

T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND

M12
M13
M14
M15
M16
M17
M18
M19
N12
N13
N14
N15
N16
N17
N18
N19
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V12
V13
V14
V15
V16
V17
V18
V19
W12
W13
W14
W15
W16
W17
W18
W19

C129
4.7U_0805_10V4Z

C75
4.7U_0805_10V4Z

C71
4.7U_0805_10V4Z

C74
1U_0603_10V6K

C130
1U_0603_10V6K

C102
1U_0603_10V6K

C96
1U_0603_10V6K

0.1U_0402_10V6K

C111
0.1U_0402_10V6K

C84
0.1U_0402_10V6K

C123
0.1U_0402_10V6K

C119
470P_0402_50V8J

C109
470P_0402_50V8J

C89
470P_0402_50V8J

C90
470P_0402_50V8J

C118
4700P_0402_25V7K

C78
4700P_0402_25V7K

C77
4700P_0402_25V7K

+1.25VSFBVTT

C816
1U_0603_10V6K

C817
1U_0603_10V6K

C818
0.1U_0402_10V6K

C819
0.1U_0402_10V6K

C820
0.1U_0402_10V6K

C821
0.1U_0402_10V6K

C822

C823

C824

C825

4700P_0402_25V7K 4700P_0402_25V7K 4700P_0402_25V7K 4700P_0402_25V7K


2
2
2
2

Only for NV36M


+2.5VS

C58
1U_0603_10V6K

C97
1U_0603_10V6K

C79
1U_0603_10V6K

C91
0.1U_0402_10V6K

C105
0.1U_0402_10V6K

C137
0.1U_0402_10V6K

C66
0.1U_0402_10V6K

C120
0.1U_0402_10V6K

C121
0.1U_0402_10V6K

C138
0.1U_0402_10V6K

C153
0.1U_0402_10V6K

+2.5VS

C136
4700P_0402_25V7K

C152
4700P_0402_25V7K

C151
4700P_0402_25V7K

C150
0.022U_0402_16V7K

C146
0.022U_0402_16V7K

C149
0.022U_0402_16V7K

+3VS

C54
1U_0603_10V6K

C59
1U_0603_10V6K

C85
0.1U_0402_10V6K

C48
0.1U_0402_10V6K

C52
0.1U_0402_10V6K

C38
0.1U_0402_10V6K

C51
0.022U_0402_16V7K

C142
0.022U_0402_16V7K
B

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

AH13
AH16
AH18
AH21
AH24
AH28
AK6
AK9
AK12
AK15
AK19
AK22
AK25

+3VS

C140
0.022U_0402_16V7K

C104
4700P_0402_25V7K

C101
4700P_0402_25V7K

C128
4700P_0402_25V7K

Only for NV36M

+1.25VSFBVTT

FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT

U63

G12
G15
G16
G19
G22
J24
M24

32,35,40,41,42,50,51,52,53 SUSP#

20mil

+2.5VS

+VGA_CORE

1
C827
R118
@470_0402_5%

@22U_1206_10V4Z

1
1
C828
2

NV36M_BGA701

HDCP_SCL
1
10K_0402_5%

2
R721

HDCP_SDA
1
10K_0402_5%

@0.1U_0402_16V4Z
2

STANDBY VDD

VD

ExtRefIn

RefOut VttSense

VSS

Q8
@2N7002
2 SUSP
G

20mil
+2.5VS

VTT

+1.25VSFBVTT

1
C830
+

C826
@0.1U_0402_16V4Z
C831

@NE57814_HSO8
@220U_D2_4M_R45
2

@0.1U_0402_16V4Z
A

max ITT = 3.5A


SUSP

42,53

2
R720

C829

@22U_1206_10V4Z

+3VS
A

Compal Electronics, Inc.

Only for NV36M

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C115

+VGA_CORE

A9
A12
A19
A22
A25
C3
C7
C10
C13
C18
C21
C24
D4
D28
E5
E8
E11
E14
E17
E20
E23
F1
F6
F25
F30
G3
G28
H11
H20
H26
J1
J7
J30
K3
K5
K28
L5
L8
L23
L26
M1
M30
N3
N28
P26
T1
U26
V28
W1
W30
Y8
Y23
Y26
AA5
AA28
AB1
AB30
AC11
AC20
AC26
AD28
AE1
AE6
AE25
AE30
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
AG4
AG27
AH3
AH7
AH10
A6

GROUND

U35E

nVIDIA NV36M (DECOUPLING CAP)


Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

19

of

57

As close as ppossible to related pin

1
2

NDQSA[0..7]

17 NDQSA[0..7]

22U_1206_10V4Z
C122

0.1U_0402_10V6K

C178

C133

C132

0.1U_0402_10V6K

C144

C162

C161

+2.5VS

0.01U_0402_16V7K

22U_1206_10V4Z

C154

+2.5VS
NDQMA[0..7]

17 NDQMA[0..7]

C139

C14

C473

0.1U_0402_10V6K

C20

0.1U_0402_10V6K

C29

C19

0.01U_0402_16V7K

C57

C56

C46

C21

22U_1206_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K

NMDA[0..63]

17 NMDA[0..63]
D

NMAA[0..11]

17 NMAA[0..11]

22U_1206_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

2
D

0.01U_0402_16V7K

0.01U_0402_16V7K

2 0.1U_0402_16V7K

C834 1

2 0.01U_0402_16V7K

17
17

NMA_BA0
NMA_BA1

+2.5VS

R382

1K_0603_1%

(25mil)

R386

C510
0.1U_0402_10V6K

1K_0603_1%

17

NMCLKA0

17
17
17
17

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

17

NMCKEA

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

NDQMA0
NDQMA3
NDQMA1
NDQMA2

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSA0
NDQSA3
NDQSA1
NDQSA2

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_1 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

NMRASA#
NMCASA#
NMWEA#
NMCSA0#
NMCKEA

NMCLKA0

NMCLKA0#

17

NMCSA1#

NMCLKA0#
NMCSA1#

RAS#
CAS#
WE#
CS#

N12

CKE

M11
M12
R131
@100_0402_5%

17

M2
L2
L3
N2

1
R709

2CSA1#
@0_0402_5%

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Reserved for
Hynix 8Mx32

for NV36M

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

+1.25VSFBVTT

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

R730 1
R732 1

2 68_0402_5%
2 68_0402_5%

C837 1

2 0.1U_0402_16V7K

C839 1

2 0.01U_0402_16V7K

R723
R725
R727
R729

NMDA1
NMDA5
NMDA2
NMDA0
NMDA4
NMDA3
NMDA7
NMDA6
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA8
NMDA10
NMDA11
NMDA9
NMDA13
NMDA12
NMDA15
NMDA14
NMDA23
NMDA22
NMDA21
NMDA20
NMDA19
NMDA17
NMDA18
NMDA16

1
1
1
1

2
2
2
2

68_0402_5%
68_0402_5%
68_0402_5%
68_0402_5%

C833 1

2 0.1U_0402_16V7K

C835 1

2 0.01U_0402_16V7K

NDQSA5
NDQSA6
NDQSA4
NDQSA7

+2.5VS

C832 1

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

R96

NDQSA0
NDQSA3
NDQSA1
NDQSA2

(25mil)

R98
1K_0603_1%

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

NDQMA5
NDQMA6
NDQMA4
NDQMA7

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSA5
NDQSA6
NDQSA4
NDQSA7

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_2 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

C68
0.1U_0402_10V6K

NMRASA#
NMCASA#
NMWEA#
NMCSA0#
NMCKEA

17

NMCLKA1

NMCLKA1
R81
@100_0402_5%

17

+2.5VS

NMCLKA1#

NMCLKA1#
CSA1#

for NV36M
+1.25VSFBVTT

K4D263238A-GC_FBGA144

R731 1
R733 1

NMCLKA0
NMCLKA0#

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

1K_0603_1%

68_0402_5%
68_0402_5%
68_0402_5%
68_0402_5%

2
2
2
2

U29

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1
1
1
1

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

R722
R724
R726
R728

for NV36M
+1.25VSFBVTT

2 68_0402_5%
2 68_0402_5%

C836 1

2 0.1U_0402_16V7K

C838 1

2 0.01U_0402_16V7K

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

N12

CKE

M11
M12

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

NMCLKA1
NMCLKA1#

NMDA46
NMDA43
NMDA44
NMDA41
NMDA40
NMDA42
NMDA47
NMDA45
NMDA54
NMDA52
NMDA55
NMDA53
NMDA50
NMDA49
NMDA48
NMDA51
NMDA38
NMDA39
NMDA37
NMDA36
NMDA34
NMDA35
NMDA32
NMDA33
NMDA63
NMDA62
NMDA61
NMDA60
NMDA58
NMDA57
NMDA56
NMDA59

+2.5VS

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

U32

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

for NV36M
+1.25VSFBVTT

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

0.01U_0402_16V7K

K4D263238A-GC_FBGA144

Compal Electronics, Inc.


Title

VGA DDR FOR CHANNEL A


Size

Document Number

Rev
0.3

Sapporo 300P
Date:
5

, 01, 2003

Sheet
1

20

of

57

As close as ppossible to related pin

C246

0.1U_0402_10V6K

C559

C226

0.1U_0402_10V6K

C240

C237

C236

C232

+2.5VS

0.01U_0402_16V7K

22U_1206_10V4Z

C227

C225

NDQSB[0..7]

17 NDQSB[0..7]

C221

0.1U_0402_10V6K

C560

C229

0.1U_0402_10V6K

C235

C228

0.01U_0402_16V7K

C234

C241

C224

C239

NMAB[0..11]

NMAB[0..11]

17

22U_1206_10V4Z

NDQMB[0..7]

+2.5VS
17 NDQMB[0..7]

NMDB[0..63]

17 NMDB[0..63]

22U_1206_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K

22U_1206_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K

0.01U_0402_16V7K

17
17

NMB_BA0
NMB_BA1

+2.5VS

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSB0
NDQSB3
NDQSB1
NDQSB2

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_3 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

1K_0603_1%
(25mil)

R180

NDQMB0
NDQMB3
NDQMB1
NDQMB2

R178

C244
0.1U_0402_10V6K

1K_0603_1%

17

17
17
17
17

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

17

NMCKEB

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

NMCKEB

N12

CKE

NMCLKB0

NMCLKB0

M11
M12
R409
@100_0402_5%

17

NMCLKB0#

17

NMCSB1#

NMCLKB0#
NMCSB1#

1
R710

2CSB1#
@0_0402_5%

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Reserved for

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

Hynix 8Mx32

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

+1.25VSFBVTT
A

R735
R737
R739
R741

2 68_0402_5%
2 68_0402_5%

1
1
1
1

2
2
2
2

68_0402_5%
68_0402_5%
68_0402_5%
68_0402_5%

C841 1

2 0.1U_0402_16V7K

C843 1

2 0.01U_0402_16V7K

NDQSB5
NDQSB6
NDQSB4
NDQSB7

+2.5VS

R181

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

NDQMB5
NDQMB6
NDQMB4
NDQMB7

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSB5
NDQSB6
NDQSB4
NDQSB7

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_4 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

1K_0603_1%
(25mil)

R179
1K_0603_1%

17

C245
0.1U_0402_10V6K

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

NMCKEB

N12

CKE

M11
M12

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NMCLKB1

NMCLKB1

R183
@100_0402_5%

17

+2.5VS

NMCLKB1#

NMCLKB1#
CSB1#

K4D263238A-GC_FBGA144

for NV36M

R742 1
R744 1

for NV36M

+1.25VSFBVTT

NMDB7
NMDB5
NMDB1
NMDB2
NMDB3
NMDB0
NMDB6
NMDB4
NMDB31
NMDB30
NMDB29
NMDB28
NMDB27
NMDB26
NMDB25
NMDB24
NMDB15
NMDB14
NMDB13
NMDB12
NMDB11
NMDB9
NMDB10
NMDB8
NMDB21
NMDB23
NMDB20
NMDB22
NMDB19
NMDB17
NMDB18
NMDB16

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

+1.25VSFBVTT

NMCLKB0
NMCLKB0#

R743 1
R745 1

NMDB47
NMDB46
NMDB45
NMDB44
NMDB42
NMDB43
NMDB41
NMDB40
NMDB53
NMDB55
NMDB52
NMDB54
NMDB51
NMDB50
NMDB48
NMDB49
NMDB39
NMDB38
NMDB36
NMDB37
NMDB35
NMDB34
NMDB33
NMDB32
NMDB63
NMDB61
NMDB60
NMDB62
NMDB58
NMDB57
NMDB59
NMDB56

+2.5VS

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

2 0.01U_0402_16V7K

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

2 0.1U_0402_16V7K

C842 1

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

C840 1

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

2
2
2
2

NDQSB0
NDQSB3
NDQSB1
NDQSB2

1
1
1
1

U39

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

U40
68_0402_5%
68_0402_5%
68_0402_5%
68_0402_5%

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

R734
R736
R738
R740

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

for NV36M
+1.25VSFBVTT

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

0.01U_0402_16V7K

K4D263238A-GC_FBGA144

for NV36M

2 68_0402_5%
2 68_0402_5%

C844 1

2 0.1U_0402_16V7K

C845 1

2 0.1U_0402_16V7K

C846 1

2 0.01U_0402_16V7K

C847 1

2 0.01U_0402_16V7K

NMCLKB1
NMCLKB1#

Compal Electronics, Inc.


Title

VGA DDR FOR CHANNEL B


Size

Document Number

Rev
0.3

Sapporo 300P
Date:
5

, 01, 2003

Sheet
1

21

of

57

CRT, TV-OUT & LVDS CONNECTOR


TV-OUT Conn.

U13D

CHB2012U170_0805

12

B_INVT_PWM

11

1
2
3
4
1

SN74LVC32APWLE_TSSOP14
+3VALW POWER

40

C511

1.
2.
3.
4.

1
2
3
4

Y
C
Y
C

16
16
16
16

TXOUT0+
TXOUT0TXOUT1+
TXOUT1-

330P_0402_50V7K

16
16
16
16

TXOUT2+
TXOUT2TXOUT3+
TXOUT3-

16
C804
16
0.1U_0402_16V7K

TXCLK+
TXCLK-

16
16
16
16

TZOUT0+
TZOUT0TZOUT1+
TZOUT1-

16
16
16
16

TZOUT2+
TZOUT2TZOUT3+
TZOUT3-

16
16

TZCLK+
TZCLK-

B+

+3VS

C17

0.1U_0603_50V4Z

10U_1210_35V4Z

R26

+5V

1 2

R25

R6
10K_0402_5%

200_0402_5%

C5

SI2302DS-T1_SOT23
RP6
+LCDVDD

ENVDD

1
2

0.1U_0402_16V4Z

C108

8
7
6
5

37
37
37
37

TXOUT0+
TXOUT0TXOUT1+
TXOUT1TXOUT2+
TXOUT2TXOUT3+
TXOUT3TXCLK+
TXCLKTZOUT0+
TZOUT0TZOUT1+
TZOUT1TZOUT2+
TZOUT2TZOUT3+
TZOUT3TZCLK+
TZCLKPID0
PID1
PID2
PID3

PID0
PID1
PID2
PID3

D41
@DAN217_SOT23

+3VS

DTC124EK_SOT23

1
2

BKOFF#

16,40

@2N7002
Q57

2
G

ENBKL

Q34
2N7002
1

DDC_DATA_1

P
OE#

0.1U_0402_16V4Z
2 A

@68P_0402_50V8K

C453
220P_0402_50V8K

C459

DDC_CLK_1
C456

1
2

C457

DDC_CLK 16
4

@68P_0402_50V8K
220P_0402_50V8K

Compal Electronics, Inc.

4 DACA_VSYNC_1
Y U26
SN74AHCT1G125GW_SOT353-5

Title

CRT,TV-OUT & LVDS Connector


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.7K_0402_5%

DDC_DATA 16

Q35
2N7002
1

16 DACA_VSYNC

DACA_VSYNC_2

2
C2

2
0_0603_5%

5
1

R4
1K_0402_5%

+CRT_VCC

U27
SN74AHCT1G125GW_SOT353-5

P
OE#

5
1
2

16 DACA_HSYNC

4.7K_0402_5%

100P_0402_50V8K
L2

100K_0402_5%

R10

2
G

4.7K_0402_5%

R1

4.7K_0402_5%

R11

R13

+5VS

2
R12

+5VS

C801
220P_0402_50V8K @0.1U_0402_16V7K
2

2
G

C454

DACA_HSYNC_2

+5VS

L1
15P_0402_50V8J
1
2
0_0603_5%

+CRT_VCC

C680

15P_0402_50V8J

+CRT_VCC

C458

C460

15P_0402_50V8J

1
2

18P_0402_50V8K

C461

CRT_B

C1
0.1U_0402_16V4Z
4

C464

18P_0402_50V8K
DACA_HSYNC_1

75_0603_1%
+CRT_VCC

C463

CRT_G

75_0603_1%

75_0603_1%

C462

R9

R8

R7

16

CRT_R

1
2
FCM2012C-800_0805
L4
1
2
FCM2012C-800_0805
L5
1
2
FCM2012C-800_0805

R746
R747
R748
1K_0402_1% 1K_0402_1% 1K_0402_1% 18P_0402_50V8K

16

6
11
1
7
12
2
8
13
3
CRT_VCC 9
14
4
10
15
5

L3

JP15
CRT-15P

R746, R747,R748 need for NV36M

DISPOFF#

40

CRT Conn.

D32
RB751V_SOD323
1
2

CH491D_SOT23 FUSE_1A
C455
0.1U_0402_16V4Z

R551
10K_0402_5%

+CRT_VCC

2
+3VS

+R_CRT_VCC
F1
1
1

D20

+5VS

D22
DAN217_SOT23

TC7SH08FU_SSOP5

D23
DAN217_SOT23

D24
DAN217_SOT23

U62

16,26,35,36 B_PCIRST#

5
1

ENVDD

IPEX_20323-040E-01

0.1U_0402_10V6K

16

JP1

10K_8P4R_1206_5%

Q2

+3VS

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

4.7U_0805_10V4Z

22K

C107

1
2
3
4

22K

R711
C799

200K_0402_5%1000P_0402_50V7K

1
2 2
R5
22K
47K_0402_5%

Q4
DTC124EK_SOT23
@0_0402_5%
1
2

PID3
PID2
PID1
PID0

1
3

22K

2
G
Q1
2N7002

ENVDD

4.7U_0805_10V4Z
+3VS

16

C6

Q3

2
G

R16

100K_0402_5%

+LCDVDD

+12VALW

@100K_0402_5%

C12

R686
C803
@0.1U_0402_16V7K

75_0603_1% 75_0603_1% 270P_0402_50V7K

R755, R756,R757 need for NV36M

L7 2INVPWR_B+
L6 2
CHB2012U170_0805
DAC_BRIG
B_INVT_PWM
DISPOFF#

+LCDVDD

270P_0402_50V7K
330P_0402_50V7K

DAC_BRIG

ground
ground
(luminance+sync)
(crominance)

SUYIN_030008FR004T101ZL

C502

1
1

B+

C800
@0.1U_0402_16V7K

JP20

CRMA_1

75_0603_1%

C515

R356

R387

13

INVT_PWM

DAN217_SOT23

LUMA_1

1
2
C512
C497 22P_0402_50V8J

1
R74

40
+3VS

D26

R755
R756
R757
1K_0402_1% 1K_0402_1% 1K_0402_1%

16 COMPS

2
CRMA

16

LUMA

16

C501 1
2 22P_0402_50V8J
L24
1
2
FBM-11-160808-121T_0603
L26
1
2
FBM-11-160808-121T_0603

LVDS Conn.

+3VALW

14

D25
DAN217_SOT23

Size
B

Document Number

Date:

, 01, 2003

Rev
0.3

Sapporo 300P
Sheet
E

22

of

57

+3VS_HDTV

L40
1
2
FBM-11-160808-121T_0603

C848

0.1U_0402_16V4Z
1
C849
C850

0.1U_0402_16V4Z
1
1
C851
C852

+3VS

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2
0.1U_0402_16V4Z

0.01U_0402_16V7K
1
1
C853
C854

2
0.1U_0402_16V4Z

1
C855

0.01U_0402_16V7K

+3VS_HDTV
+3VS_HDTV

+3VS

1
R777

BUFRST#

R779 1
R780 1
R781 1
R782 1

2
2
2

47K_0402_5%
47K_0402_5%
47K_0402_5%

412_0402_1%

Y3

HSYNC*
VSYNC*
FIELD
BLANK*

39
40
41

SID
SIC
ALTADDR

26

SLEEP

27

RESET*

CX25875

23
33

NC1
NC2

28
29
30

GPO[0]
GPO[1]
GPO[2]

54

FSADJUST

46

XTALIN

47

TQFP-6 4P

25
38
11
36

REG_OUT
REG_IN
VDD
VDD

50
49
10
32

DACA

60

DACA_NET

0.1U_0402_16V4Z

4.7U_0805_10V4Z
0.1U_0402_16V4Z

1
R769
R772 1

2 412_0402_1%

2
0.1U_0402_16V4Z

0.01U_0402_16V7K

4.7U_0805_10V4Z

1
C861

2
1K_0402_5%

DACB

61

DACC

62

DACC_NET

DACD

59

VSSHV
VSS
VSS
VSS
VSSO
VSSO
VSS_SO
VSS_PLL
VSS_OSC
VSS_BG
NG_DAC
VSS_DAC
VSS_DAC

XTALOUT

C856

DACB_NET

COMP
VREF
PLL_COMP
XTL_BFO

18
19
20
21

VDDHV
VDD_SIO
VDDO
VDDO

C862

C863

0.1U_0402_16V4Z

+3VS
C864

55 C865 1
53
43
1

2 0.1U_0402_16V4Z

2 0.1U_0402_16V4Z
C

L42

24
9
22
31
12
34
42
44
45
51
56
63
64

DACA_NET

1
C868
0.1U_0402_16V4Z

C869
0.1U_0402_16V4Z

AOUT_PB

1
2
FBM-11-160808-121T_0603
R778
75_0402_5%

2
4.7K_0402_5%
S ID
S IC
2
4.7K_0402_5%

P[0]
P[1]
P[2]
P[3]
P[4]
P[5]
P[6]
P[7]
P[8]
P[9]
P[10]
P[11]

1
C860

1
C866
0.1U_0402_16V4Z

C867
0.1U_0402_16V4Z
+3VS

1
R776

2
3
4
5
6
7
8
13
14
15
16
17

C857

DVO_HSYNC
DVO_VSYNC

+3VS

16

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

1
C859

PMBT3904_SOT23

1
1
1
1
1
1
1
1
1
1
1
1

Q74

2
2
2
2
2
2
2
2
2
2
2
2

48
52
57
58

16
16

R762
R763
R764
R765
R766
R767
R768
R770
R771
R773
R774
R775

2
B

VAA_OSC
VAA_BG
VAA_DAC
VAA_DAC

DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8
DVOD9
DVOD10
DVOD11

CLKO
CLKI

16
16
16
16
16
16
16
16
16
16
16
16

37
35

DVOCLKIN
DVOCLKOUT

33_0402_5%

16
16

U64
R761 2

+3VS_HDTV

L41
0.1U_0402_16V4Z
1
2
FBM-11-160808-121T_0603
1
C858

D45
DA204U_SOT23

C870 1

13.5MHZ_16PF_6X13500020

2 0.1U_0402_16V4Z

CX25875_TQFP64

27P_0402_50V8J

DACB_NET

+3VS_HDTV
C874
33P_0402_50V8J

1
C871
0.1U_0402_16V4Z

C872
0.1U_0402_16V4Z

R811
2.2K_0402_5%

2
B

BOUT_Y

1
2
FBM-11-160808-121T_0603
R783
75_0402_5%

C873

L43

+3VS

R784 1
2
75K_0402_5%

D46
DA204U_SOT23

R812
2.2K_0402_5%
S ID
S IC
C875 1

2 0.1U_0402_16V4Z

L44
1
2
FBM-11-160808-121T_0603

DACC_NET
R785
75_0402_5%

1
C876
0.1U_0402_16V4Z

C877
0.1U_0402_16V4Z

AOUT_PB

GND

OUT

JP38

BOUT_Y

GND

OUT

JP39

COUT_PR

GND

OUT

+3VS

JP37

COUT_PR

16 I2CB_DATA
16 I2CB_CLK

D47
DA204U_SOT23

SUYIN 040180FR002T111NR
(Blue)

SUYIN 040180FR002T111NR
(Green)

SUYIN 040180FR002T111NR
(Red)

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

CX75875 HDTV
Size
Document Number
Custom
Date:

Rev
0.3

Sapporo 300P

, 01, 2003

Sheet
1

23

of

57

+3VALW

H_CPUPERF#
ICH_VGATE
2
0_0402_5%
ICH_AC_BITCLK
ICH_AC_RST_R#
ICH_AC_SDIN0
ICH_AC_SDIN1

1
R528

D8
C12
E12
D12
A13
ICH_AC_SDOUT_R A9
ICH_AC_SYNC_R B8

32,39 ICH_AC_BITCLK
+3VS

1 ICH_AC_SDOUT
@8.2K_0402_5%

2
R225
2
R230
2
R229

1 ICH_AC_BITCLK
@10K_0402_5%
1 ICH_AC_SDIN0
@10K_0402_5%
1 ICH_AC_SDIN1
@10K_0402_5%

32 ICH_AC_SDIN0
39 ICH_AC_SDIN1

LPC_AD[0..3]

13,37,40 LPC_AD[0..3]

37 LPC_DRQ#1
13,37,40 LPC_FRAME#
38
38

+3VALW
RP141

4
3
2
1

USB_OC3#
USB_OC5#
USB_OC7#
USB_OC1#

5
6
7
8

+RTCVCC

2
R577
2
R576

ICH_INTVRMEN

1
330K_0402_5%
1
@10K_0402_5%

38

USB_OC0#

38

USB_OC2#

38

USB_OC4#

38

USB_OC6#

SPKR
1
@1K_0402_5%

36

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

1
2
R500
22.6_0603_1%

+3VS

2
R504

SIDERST#

34

R508
@10_0402_5%

R231

5 H_THERMTRIP#

SPKR

H_THERMTRIP# 1
R258

15 CLK_ICH_14M

OC0#
OC1#
OC2#
OC3#
OC4#/GPI9
OC5#/GPI10
OC6#/GPI14
OC7#/GPI15

E24

I/F

USBRBIAS
USBRBIAS#
GPIO32
GPIO33
GPIO34

SATA I/F
GPIO

INTVRMEN

MISC

SPKR

AB16
Y13
Y14
AC14
AA14
AC15
AD14
AB14
AD15
Y15
AD16
AA15
AC16
Y16
AA16
AB17

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

W22
W23
W21
V22
V20

IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDCS1#
IDE_SDCS3#

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY

Y20
W20
Y23
Y22
Y21

IDE_SDDREQ
IDE_SDDACK#
IDE_SDIOR#
IDE_SDIOW#
IDE_SDIORDY

AA22
AB23
AD23
AD24
AB21
AC21
AB20
AC20
Y19
AD22
AC22
AA20
AB22
AC24
AB24
AA23

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

USB I/F

2
T21
0_0402_5%

CLK_ICH_14M

F20

THRMTRIP#
CLK14

CLOCK

SATA0TXP
SATA0TXN
SATA0RXN
SATA0RXP

AA8
AB8
AD7
AC7

SATA1TXP
SATA1TXN
SATA1RXN
SATA1RXP

AA10
AB10
AD9
AC9

ICH_SYNC#

SYS_PWROK

C650
@10P_0402_50V8K

15 CLK_ICH_48M

CLK_ICH_48M

F24

CLK48

2
Q60
@MMBT3904_SOT23

Near ICH

32,39 ICH_AC_SDOUT

IDE_PDD[0..15]

R582
@220_0402_5%

2
Q59
@MMBT3904_SOT23
2 ICH_PWROK
0_0402_5%

1
R570

IDE_SDD[0..15] 36
R573

2
1
R476
4.7K_0402_5%

2
1
J1
JOPEN

+RTCVCC

200K_0402_5%
C686
1U_0805_25V4Z
B

Note:
SATABIAS keep less than 500mils
SATABIAS 2
R260

2
1ICH_VBIAS
R569
@10M_0603_5%

1
24.9_0603_1%

Y11
Y9

CLK100P
CLK100N

AC5
AD5

RTCRST#

AA12

ICH_RTCRST#

RTCX1

AC11

ICH_RTCX1

RTCX2

AB12

ICH_RTCX2

ICH_RTCX1
ICH_RTCX2

X6

@2.4M_0603_1%

1
10M_0402_5%

NC
3

@10_0402_5%

C691
@0.047U_0402_16V4Z
2
1
R575
@1K_0402_5%
1
2
R578
@22M_0603_5%
R568

2
R567

12P_0402_50V8J

C698
12P_0402_50V8J

32.768KHZ_12.5P_1TJS125DJ2A073
C354
@10P_0402_50V8K

PM_CLKRUN#

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

IDE_PDD[0..15] 35

IDE_SDD[0..15]

1
27,28,30,31,37,40 PM_CLKRUN#

1
4.7K_0402_5%

10 ICH_SYNC#

2
32,39 ICH_AC_SYNC

2
R546

7,43 SYS_PWROK

1
R254

IDE_SDIORDY

ICH_RTCRST#

SATARBIAS
SATARBIAS#

1 ICH_AC_RST_R#
33_0402_5%
1 ICH_AC_SYNC_R
33_0402_5%
1 ICH_AC_SDOUT_R
33_0402_5%

1
4.7K_0402_5%

R571

R223

2
R486
2
R485
2
R484

2
R572

R580
@1K_0402_5%

@220_0402_5%

IDE_SDDREQ 36
IDE_SDDACK# 36
IDE_SDIOR# 36
IDE_SDIOW# 36
IDE_SDIORDY 36

C697

32,39 ICH_AC_RST#

2 H_THERMTRIP#
62_0402_5%

IDE_PDIORDY

+3VS

ICH5

+CPU_CORE

PM_SLP_S5# 40

+3VS

IDE_SDA0 36
IDE_SDA1 36
IDE_SDA2 36
IDE_SDCS1# 36
IDE_SDCS3# 36

ICH_AC_BITCLK

SN74AHC1G08HDCK_TSSOP5

ICH_PWROK

C353
@4.7P_0402_50V8C

2 1

SPKR

IDE I/F

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

IN2

CLK_ICH_48M

@10_0402_5%

C15
D15
D14
C14
B14
A14
D13
C13

T1
G23
F21

I/F

LAD0
LAD1
LAD2
LPC
LAD3
LDRQ0#
LDRQ1#/GPI41
LFRAME#
USBP0P
USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
USBP4P
USBP4N
USBP5P
USBP5N
USBP6P
USBP6N
USBP7P
USBP7N

USBRBIAS A24
B24

SIDERST#

AC_BIT_CLK
AC_RST#
AC_SDIN0
AC97
AC_SDIN1
AC_SDIN2
AC_SDOUT
AC_SYNC

C23
D23
A22
B22
C21
D21
A20
B20
C19
D19
A18
B18
C17
D17
A16
B16

ICH_INTVRMEN AD10

Disable timer timeout

CLK_ICH_14M

LPC_DRQ1#
LPC_FRAME#

USBP2+
USBP2USBP3+
USBP3USBP4+
USBP4USBP5+
USBP5USBP6+
USBP6USBP7+
USBP7-

Note:
USBRBIAS keep less than 500mils

T5
R4
R3
U4
U5
R2
T4

USBP0+
USBP0-

38
38
36
36
38
38
39
39
38
38
36
36

10K_8P4R_1206_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

GPO23/(SSMUXSEL)
IST
GPO22/(CPUPERF#)
VRMPWRGD/(VGATE)

2
R477

F22
U20
R20

IN1

PM_SLPS5#

5 H_CPUPERF#
51,53,54 VGATE

IDE_PDDREQ 35
IDE_PDDACK# 35
IDE_PDIOR# 35
IDE_PDIOW# 35
IDE_PDIORDY 35

U17

EC_THRM#

EC_THRM#

IDE_PDDREQ
IDE_PDDACK#
IDE_PDIOR#
IDE_PDIOW#
IDE_PDIORDY

40

AC17
AC18
AD18
AA17
AA18

PM_SLPS4#

SUSCLK
1
@10K_0402_5%
EC_RSMRST#
1
10K_0402_5%

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY

2
1
C392 0.1U_0402_16V4Z

IDE_PDA0 35
IDE_PDA1 35
IDE_PDA2 35
IDE_PDCS1# 35
IDE_PDCS3# 35

IN

2
R542
2
R265

15,54 STP_CPU#
15 STP_PCI#
28 SUSCLK

IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDCS1#
IDE_PDCS3#

OUT

H_CPUPERF#
1
10K_0402_5%

AA19
AD19
AC19
AB19
Y18

+3VALW

NC

2
R257

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

40,45,47

USB_EN# 38

+CPU_CORE

PM

ACIN

EC_RSMRST#
PM_SLP_S1#
PM_SLP_S3#
PM_SLPS4#
PM_SLPS5#
STP_CPU#
STP_PCI#
SUSCLK

AC IN

1
D36

40 EC_SWI#
40,46 EC_RSMRST#
15 PM_SLP_S1#
40 PM_SLP_S3#

RB751V_SOD323

ICH_PWROK

GPI

ICH_ACIN

+3VS
EC_SMI# 40
EC_SCI# 40
EC_LID_OUT# 40
EC_FLASH# 41

PM_DPRSLPVR

54 PM_DPRSLPVR
40 PBTN_OUT#

U3
Y2
W4
W5
W3
V3
W2

ICH_VGATE
1
10K_0402_5%
EC_THRM#
1
4.7K_0402_5%
PM_CLKRUN#
1
10K_0402_5%

2
R253
2
R530
2
R653

R536
100K_0402_5%
ICH_ACIN 1
2
EC_SMI#
EC_SCI#
EC_LID_OUT#

GPI7
GPI8
GPI12
GPI13
GPIO25
GPIO27
GPIO28

+3VS

ICH5/(ICH5-M)

GPI6/(AGPBUSY#)
SYS_RESET#
TP0/(BATLOW#)
GPO21/(C3_SAT#)
GPIO24/(CLKRUN#)
NC/(DPRSLPVR)
PWRBTN#
PWROK
RI#
RSMRST#
GPO19/(SLP_S1#)
SLP_S3#
SLP_S4#
SLP_S5#
GPO20/(STP_CPU#)
GPO18/(STP_PCI#)
SUSCLK
SUS_STAT#/LPCPD#
THRM#

U49B

R5
U1
AB2
R1
AC1
P20
Y4
AC12
AB3
AB13
T20
W1
U2
AA3
U22
U21
Y1
AB1
T2

SYS_RESET#
TP0_PU

R251
10K_0402_5%
1
2

+3VS

TP0_PU
1
10K_0402_5%
SYS_RESET#
1
8.2K_0402_5%

2
R550
2
R540

ICH5-IDE/LPC/PM/GPIO/USB
Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

24

of

57

+CPU_CORE
+3VS

B5
F6
G1
H6
K6
L6
M10
N10
P6
R13
V19
W15
W17
W24
AD13
AD20
G19
G21

1
1

C373
0.1U_0402_16V4Z

0.1U_0402_16V4Z

C385
0.1U_0402_16V4Z

C363
0.1U_0402_16V4Z

C381
0.1U_0402_16V4Z

C389

0.1U_0402_16V4Z

Place near
ball T22
D

+1.5VS

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

K10
K12
K13
L19
P19
R10
R6
H24
J19
K19
M15
N15
N23
E15
F15
F14
W19
R12
W9
W10
W11
W6
W7
W8
E22

+1.5VS

VCCSUS1_5_A
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_C
VCCSUS1_5_C

F19
Y5
AA4
AB4
F7
F8

VCCSUS15_A
VCCSUS15_B

V5REF
V5REF

A8
W14

ICH_V5REF

V5REF_SUS

E16

ICH_V5REF_SUS

V_CPU_IO
V_CPU_IO
V_CPU_IO

R15
R19
T19

+CPU_CORE

VCCSATAPLL
VCCSATAPLL

AA6
AB6

+1.5VS

VCCUSBPLL

C24

C393
0.1U_0402_16V4Z

C401
0.1U_0402_16V4Z

C386
0.1U_0402_16V4Z

C368
0.1U_0402_16V4Z

C395
0.1U_0402_16V4Z

C360
0.1U_0402_16V4Z

C372

Place0.1u near ball(VSS)


G24,H24,K24,M24,AD4
and AD18; 0.01u near to
ball AD8.

C382
0.1U_0402_16V4Z

0.01U_0402_16V7K

C384
0.01U_0402_16V7K

Place near ball D24

+1.5VS

+3VALW

C378

C394
C

C356
0.01U_0402_16V7K

C361
0.1U_0402_16V4Z

C357
0.1U_0402_16V4Z

C391
0.1U_0402_16V4Z

C387

0.1U_0402_16V4Z

1U_0603_10V6K

0.01U_0402_16V7K

Place near ball AD6

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page278

+3VS

+5VS

Place0.1u near ball(VSS)


A17,A23,V1.Addition cap near
A15,A19

D30
RB751V_SOD323

R482

1K_0402_5%

ICH_V5REF

VCCSUS15_C

C362
0.01U_0402_16V7K

Place near
ball (VSS)A7

C398
0.01U_0402_16V7K

Place near
ball (VSS)AD4

0.1U_0402_16V4Z

C349
0.1U_0402_16V4Z

C636
1U_0603_10V6K
B

C359
0.01U_0402_16V7K

Place near ball A8

Place near
ball (VSS)A19

+3VALW +5VALW

C390

D12
RB751V_SOD323
+5VS

+1.5VS

AD11

ICH_V5REF_SUS

R233
1K_0402_5%

+RTCVCC

1
P14
P15
P21
R11
R14
T23
T3
T6
U19
V1
V21
W16
W18
Y3
Y6
Y7
Y8
Y10

C402

0.1U_0402_10V6K

1
C796
1000P_0402_50V7K

1
C797
1000P_0402_50V7K

C358
0.1U_0402_16V4Z

C355
0.1U_0402_16V4Z

C364
1U_0603_10V6K

Place near ball(VSS) A17


Place near ball AD11
A

Compal Electronics, Inc.


Title

ICH5 Power & Decoupling

ICH5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

C388

0.1U_0402_16V4Z

1
+3VALW

GND

C397

+1.5VS

E18
B15
E11
F10
F11
E13
E14
U6
V6
F16
F17
F18
K15

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Place near ball(VSS)


D1,A7,H1,P1,W24 and A21

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCRTC

Power

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

ICH5/(ICH5-M) VCC3_3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A1
A7
A10
A15
A17
A19
A21
A23
AA5
AA7
AA9
AA11
AA13
AA21
AA24
AB5
AB7
AB9
AB11
AB15
AB18
AC2
AC4
AC6
AC8
AC10
AC13
AC23
AD4
AD6
AD8
AD17
AD21
AD12
B13
B17
B19
B21
B23
C3
C8
C16
C18
C20
C22
D1
D6
D11
D16
D18
D20
D22
D24
E17
E19
E20
E21
E23
F3
F9
G6
G20
G24
H1
H19
H22
J6
J21
J23
K3
K11
K14
K20
K22
K24
L10
L11
L12
L13
L14
L15
L21
L23
M1
M5
M11
M12
M13
M14
M22
M24
N11
N12
N13
N14
N20
P1
P10
P11
P12
P13

+3VS

U49C

Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

25

of

57

HUB_HL[0..10]

10 HUB_HL[0..10]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_TRDY#
ICH_GPIO4_PIRQG#
PCI_PIRQB#

8.2K_8P4R_1206_5%

+3VS

RP140

4
3
2
1

5
6
7
8

PCI_REQ#2
ICH_GPIO3_PIRQF#
PCI_REQ#B
ICH_GPIO2_PIRQE#

8.2K_8P4R_1206_5%
+3VS

RP146

4
3
2
1

5
6
7
8

P CI_IRDY#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#

8.2K_8P4R_1206_5%
+3VS

RP143

4
3
2
1

5
6
7
8

+RTCVCC
U49A

PCI_STOP#
PCI_FRAME#
PCI_REQ#0
PCI_PIRQD#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

E3
J1
N3
M2

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

D5
C1
C5
B6
C6

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#/GPI40

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

D4
A3
B7
C7
A4

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#/GPO48

CLK_PCI_ICH

N1

PCICLK

PCI_FRAME#
PCI_DEVSEL#
P CI_IRDY#
PCI_PAR
PCI_PERR#
PCI_PLOCK#
PCIRST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

D2
L3
M3
F1
K2
L2
V2
V4
L4
E5
E4

FRAME#
DEVSEL#
IRDY#
PAR
PERR#
PLOCK#
PME#
PCIRST#
SERR#
STOP#
TRDY#

PCI_REQ#A
PCI_REQ#B

A5
E7

REQA#/GPI0
REQB#REQ5#/GPI1

PIDERST#

E8
B4

GNTA#/GPO16
GNTB#/GNT5#/GPO17

8.2K_8P4R_1206_5%
C

+3VS

27,28,30,31
27,28,30,31
27,28,30,31
27,28,30,31

RP142

4
3
2
1

5
6
7
8

ICH_GPIO5_PIRQH#
PCI_PIRQA#
PCI_PIRQC#

8.2K_8P4R_1206_5%
+3VS

DISABLE "TOP BLOCK SWAP"

1
R232

(GNTA#)
PIDERST#
2
8.2K_0402_5%

1
R512

PCI_PLOCK#
2
8.2K_0402_5%

2
R483

PCI_REQ#A
1
10K_0402_5%

1
R222

PCI_REQ#4
2
10K_0402_5%

1
R503

PCI_REQ#1
2
10K_0402_5%

1
R479

PCI_REQ#3
2
10K_0402_5%

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

31
30
28
27

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

31
30
28
27

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

15 CLK_PCI_ICH
27,28,30,31 PCI_FRAME#
27,28,30,31 PCI_DEVSEL#
27,28,30,31 PCI_IRDY#
27,28,30,31 PCI_PAR
27,28,30,31 PCI_PERR#

10,13,27,28,30,31,37,40
27,28,30,31
27,28,30,31
27,28,30,31

+1.5VS

PIDERST#

Y12
AD3
AA2
V5
AD2
AD1
AC3

A20GATE
A20M#
NC
FERR#
IGNNE#
CPU I/F
INIT#
INTR
NMI
CPUPWRGD/GPO49
RCIN#
CPUSLP#
SMI#
STPCLK#
NC/(DPSLP#)

T22
V23
A11
U24
R21
R23
U23
R22
P24
P23
P22
V24
T24
R24

SMI# 2
R537 2
R531

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HI11

H20
H21
J20
H23
M23
M21
N21
M20
L22
J22
K21
G22

HUB_HL0
HUB_HL1
HUB_HL2
HUB_HL3
HUB_HL4
HUB_HL5
HUB_HL6
HUB_HL7
HUB_HL8
HUB_HL9
HUB_HL10
HUB_HL11

CLK66

N22

CLK_ICH_66M

HI_STBF
HI_STBS

K23
J24

HIRCOMP
HIREF
HI_VSWING

N24
L24
L20

HI_RCOMP_ICH
HI_VREF_ICH
HI_SWING_ICH

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5
IRQ14
IRQ15
SERIRQ

B3
E1
A2
C2
D7
A6
E2
B1
Y17
Y24
F23

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
ICH_GPIO2_PIRQE#
ICH_GPIO3_PIRQF#
ICH_GPIO4_PIRQG#
ICH_GPIO5_PIRQH#
IDE_IRQ14
IDE_IRQ15
IRQ_SERIRQ

EEPROM I/F EE_CS


EE_DIN
EE_DOUT
EE_SHCLK

B10
B11
B9
A12

NC_EE_DOUT

LAN_RXD0
LAN_RXD1
LAN_RXD2
I/F LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_CLK
LAN_RSTSYNC
LAN_RST#

C10
C9
C11
D9
E9
B12
E10
D10
AA1

PCI I/F
HUB I/F

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

1
R264

2
10K_0402_5%

ICH_SMLINK0

1
R566

2
10K_0402_5%

ICH_SMLINK1

1
R547

2
10K_0402_5%

LINK_ALERT#

1
R261

2
10K_0402_5%

GPI_11

1
R652

2
10K_0402_5%

ICH_SMB_CLK

1
R565

2
2.7K_0402_5%

ICH_SMB_DATA 1
R559

2
2.7K_0402_5%

+3VALW
ICH_SMB_CLK 12,13,15
ICH_SMB_DATA 12,13,15
GATEA20 40
H_A20M# 5
H_FERR# 5
H_IGNNE# 5
H_INIT# 5
H_INTR
5
H_NMI
5
H_PWRGOOD 5
KBRST# 40
H_CPUSLP# 5
1
H_SMI#
5
1 0_0402_5%
H_STPCLK# 5
0_0402_5%
H_DPSLP# 5

+3VS

CLK_ICH_66M
R249

2
R234

@10_0402_5%

1
62_0402_5%

CLK_ICH_66M 15

HUB_HLSTRF 10
HUB_HLSTRS 10

2
R522

1
54.9_0603_1%

C383
@10P_0402_50V8K

+1.5VS

change to 52.3_1%

Interrupt I/F

LAN

R515
226_0603_1%

INTRUDER#
ICH_SMLINK0
ICH_SMLINK1
LINK_ALERT#
ICH_SMB_CLK
ICH_SMB_DATA
GPI_11

INTRUDER#
SMLINK0
SMLINK1
SMB I/F LINKALERT#
SMBCLK
SMBDATA
SMBALERT#/GPI11

35

PCIRST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

ICH5/(ICH5-M)

J4
J5
G3
K4
H5
H2
J3
J2
K5
F2
M4
H4
L5
G2
K1
G5
G4
L1
B2
P5
H3
N5
C4
N4
E6
P3
D3
N2
F5
P4
F4
P2

INTRUDER#

5
6
7
8

RP144

4
3
2
1

PCI_AD[0..31]

27,28,30,31 PCI_AD[0..31]
+3VS

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

16,28,31
27,28
28,30
28,30

+3VS

IDE_IRQ14 35
IDE_IRQ15 36
SERIRQ 28,37,40

IDE_IRQ15
1
R543

2
8.2K_0402_5%

IDE_IRQ14
1
R262

2
8.2K_0402_5%

IRQ_SERIRQ 1
R511

2
10K_0402_5%

2
1
R220
@1K_0402_5%
B

LAN_RST#

ICH5

2
1
R544
10K_0402_5%

+3V

HI_SWING_ICH

C377
0.01U_0402_16V7K

R520
@10_0402_5%

Close to ICH ball <250mils

113_0603_1%

C379
0.1U_0402_16V4Z

Close to ICH(L24)

C667
@10P_0402_50V8K

1
R241

PCIRST#

HI_VREF_ICH

CLK_PCI_ICH

Close to ICH(L20)

OE#

0.1U_0402_16V4Z

14

C371

147_0603_1%

2
1
C679 0.1U_0402_16V4Z
R513

U51A

O 3
+3V POWER

B_PCIRST# 16,22,35,36

SN74LVC125APWLE_TSSOP14

C374
0.01U_0402_16V7K

Close to ICH ball <250mils

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH5-PCI/HUB/LAN
Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

26

of

57

LAN Realtek RT8101L

0.1U_0402_16V4Z
Place closed to
RTL8101L pin58

75

+3V_LAN_VDD3

TRACE=20mil

EEDO
EEDI
EESK
EECS

52
53
54
55

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

LED0
LED1
LED2

78
77
76

ACTIVITY#
LINK10_100#

TXD+
TXD-

72
71

LAN_TD+
LAN_TD-

RXIN+
RXIN-

68
67

LAN_RD+
LAN_RD-

X1

61

LAN_X1

X2

60

LAN_X2

LWAKE

64

AVDD

TRACE=20mil

RTL8101L has internal


+2.5V generator at pin58
+2.5V_LAN

DGND1
DGND2
DGND3
DGND4
DGND5
AGND1
AGND2
AGND3

Power

47K

10K

0.1U_0402_16V4Z

RJ45_PR

C485
0.1U_0402_16V4Z

reserve transistor for ver.C


C177

51
69

@22U_1206_10V4Z

+3V

Y1
25MHZ_20PF_6X25000017
LAN_X1
LAN_X2
C180
27P_0402_50V8J

Q38
DTA114YKA_SOT23
1
1
2
R331
300_0402_5%

Amber LED+

11

Amber LED-

PR4+

PR2-

PR3-

PR3+

RJ45_RX+

PR2+

RJ45_TX-

PR1-

RJ45_TX+

PR1+

RJ45_RXC179
27P_0402_50V8J

R15
75_0402_5%

LINK10_100#

NC

15

10

Green LED-

Green LED+

SHLD2

14

SHLD1

13

R14
75_0402_5%

2
NC

16

SHLD3

AMP 440470-4 RJ45 with LED

NC

NC

10K

+3V
JP30

47K

1 2
C540
@10P_0402_50V8K

Q36
DTA114YKA_SOT23
1
1
2
R314
300_0402_5%

SHLD4
PR4-

ACTIVITY#

RTL8101L_LQFP100

SANTA_130403-1

JP16

12

RJ11

R312
75_0402_5%

+2.5V_LAN

100
99

2
16
31
44
88
62
66
73

R313
75_0402_5%

C476

0.1U_0402_16V4Z

2
1
3
4
5
7

Pulse H0013
(NS0013)

R327
49.9_0603_1%

Q9
@2SB1197K_SOT23

R326
49.9_0603_1%

C484

+3V

RJ45_TX+
RJ45_TX-

1
2

2
15K_0402_5%
2
5.6K_0603_1%

1
R146
1
R383

LAN_TD+
LAN_TD-

+3VS

2
1K_0402_5%

RJ45_RX+
RJ45_RX-

16
15
14
13
12
11
10
9

RX+
RXCT
NC
NC
CT
TX+
TX-

RJ45_PR

@0.1U_0402_16V4Z LANGND

C470
1000P_1206_2KV7K

Termination plane should be copled to chassis ground

ROMCS/OEB
NC

1
2

1
R145

Closed to RT8101L

R325
49.9_0603_1%

RD+
RDCT
NC
NC
CT
TD+
TD-

C449
C450
4.7U_0805_10V4Z

INTA#
INTB#
PME#

R324
49.9_0603_1%

1
2
3
4
5
6
7
8

GPIO0
GPIO1

U28
LAN_RD+
LAN_RD-

AC_RST#
AC_SYNC
AC_DOUT
AC_DIN
AC_BCK

Closed to PULSE H0013

VDD
VDD
VDD
VDD
VDD
VDD

56

Layout Note
H0013 pls close to
conn.

0.1U_0402_16V4Z

+3V

6
22
37
49
90
95

VCTRL

1
2
R384
5.6K_0402_5%

C504

RST#
PCICLK
CLKRUN#

RTT3

63

AT93C46-10SI-2.7_SO8

+3V

10,13,26,28,30,31,37,40 PCIRST#
15 CLK_PCI_LAN
24,28,30,31,37,40 PM_CLKRUN#

81
97
50

65

5
6
7
8

GND
NC
NC
VCC

10K

26,28 PCI_PIRQB#
28,30,31,40 LAN_PME#

80
79
57

74

RTSET

DO
DI
SK
CS

REQ#
GNT#

ISOLATE#

4
3
2
1

47K

83
82

+3V

TRACE=30mil

PCI_REQ#3
PCI_GNT#3

+3V_LAN_VDD2

C505

PERR#
SERR#

R393
@10_0402_5%

AVDD

70

C506

1
2
L25
LQG21N4R7K10_0805

IDSEL

25
26

CLK_PCI_LAN

+3V_LAN_VDD1

98

26,28,30,31 PCI_PERR#
26,28,30,31 PCI_SERR#

+3V

59

TRACE=20mil

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

AVDD

0.1U_0402_16V4Z
TRACE=20mil

Power

38
27
17
84

24
18
19
20
21
23

CLK_PCI_LAN

+2.5V_LAN

C507

U34

26,28,30,31 PCI_PAR
26,28,30,31 PCI_FRAME#
26,28,30,31 PCI_IRDY#
26,28,30,31 PCI_TRDY#
26,28,30,31 PCI_DEVSEL#
26,28,30,31 PCI_STOP#

26
26

58

2 LAN_IDSEL
100_0402_5%

AVDD25

0.1U_0402_16V4Z

PCI_AD17 1
R395

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C509

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

C508

IDSEL:PCI_AD17

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

22U_1206_16V4Z

48
94

26,28,30,31
26,28,30,31
26,28,30,31
26,28,30,31

C534

VDD25
VDD25

PCI I/F
LAN I/F

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

AC-Link

PCI_AD[0..31]

26,28,30,31 PCI_AD[0..31]

47
46
45
43
42
41
40
39
36
35
34
33
32
30
29
28
15
14
13
12
11
10
9
8
96
93
92
91
89
87
86
85

U37
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

C519

0_0603_5%

+2.5V_DLAN
R388

TRACE=20mil
+2.5V_LAN

+3V

C527

C516

C550

C549

C536

C529

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
Title

Compal Electronics, Inc.


LAN REALTEK RTL8101L

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet
1

27

of

57

PCI_AD[31..0]

26,27,30,31 PCI_AD[31..0]

+3V

PCI_C/BE#[3..0]

26,27,30,31 PCI_C/BE#[3..0]

U5A

R405

100_0402_5%

R404

100_0402_5%

SERIRQ
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCM_PME#

1
R807
1
R808

2
@10K_0402_5%
2
10K_0402_5%

N16
M16
L16
K16

IDSELSM
IDSELSD
IDSELVI
IDSELFL

IRQ_SERIRQ
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCM_PME#

T14
W15
V14
V15
U15
U12

IRQDT#
INTA#
INTB#
INTC#
INTD#
PME#

T4

PCICLK

R410

PCM_FCMODE
100_0402_5%

TBC

+3V

2
@0_0402_5%

PCIRST#

2
0_0402_5%

1
R688

PCLR#

CLK_PCI_PCM
R445
33_0402_5%

SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7

M1
N4
N5
P4
N1
N2
P2
N3

SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7

SMCLE
SMALE
SMCE#
SMWE#
SMRE#
SMWP#

M3
M2
L1
L3
L2
K3

SMRB#
SMCD#
SMLVD
SMWPD#
SMEJSW#

M4
L5
L4
K4
K5

SMLED#
SMLOCK#
SMEJCT#

M5
K2
K1

SMVC3EN

W3
Y11
Y6
U13

CLK32
PCLR#
SUSPEND#
FCMODE

H6
P6
P15
R5
R6
R7
R15
R16
T6
T15

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

L9
L10
L11
L12
M9
M10
M11
M12

GND
GND
GND
GND
GND
GND
GND
GND

GPIO Interface

CARD_RST 1
R687

SDPWR

Power Supply

C589

C561

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

SDLED

44

U41

+3V

SDPWR

FLG#

VOUT

GND

VIN

CE

+SD3_VCC
C554

RT9702_SOT23-5
+3V

P3

RSV0
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
RSV11
RSV12
RSV13
RSV14
RSV15
RSV16
RSV17
RSV18
RSV19
RSV20

V12
W12
Y12
W11
U6
Y4
U9
U10
V9
U4
U5
W4
W2
V2
U3
U2
V6
P5
V1
V5
V4

RSV#0
RSV#1
RSV#2
RSV#3
RSV#4
RSV#5
RSV#6
RSV#7
RSV#8

V11
Y5
V8
V7
U7
U8
U11
Y3
W7

GPO0
GPO1
GPO2
GPO3
GPO4
GPO5
GPO6
GPO7
GPO8
GPO9

V10
Y10
T10
T9
W9
Y9
W8
Y8
Y7
W6

GND
GND
GND
GND
GND
GND

T5
T16
W1
W20
Y2
Y19

R401
20K_0402_5%

4.7U_0805_10V4Z

JP2
+3V

R397

SDWP#
10K_0402_5%
SDC_D1
SDC_D0

12

Wr_Pt

SDCMD
SDC_D3

8
7
6
5
4
3
2
1

SD4
SD3
Vss2
SDCLK
Vdd
Vss1
SD2
SD1

SDC_D2

SDCLK
+SD3_VCC

Com
SD I/O

11
13

1
R674
+3V

SD5

2
@0_0402_5%

IDSELSM
IDSELSD
IDSELVI
IDSELFL

R1

System
Interface

+3V

FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
REQ#
GNT#
CLKRUN#
PCIRST#

SUSCLK
PCLR#

24 SUSCLK
+3VS

W18
W17
Y18
Y17
W16
Y16
Y15
W19
K20

CLK_PCI_PCM

15 CLK_PCI_PCM

PCI_FRAME#
P CI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_REQ#2_F
PCI_GNT#2
PM_CLKRUN#
PCIRST#

SDPWR

Other Pins

PCI_AD21 R712 100_0402_5%


PCI_AD22
PCI_AD20 R403 @100_0402_5%
PCI_AD21
R407
@100_0402_5%
26,37,40
16,26,31
R406
26,27
26,30
10K_0402_5%
26,30
27,30,31,40

PAR
PERR#
SERR#

SDCD#
SDWP#
SDLED

C574

0.1U_0402_10V6K

R191
10K_0402_5%

26 PCI_GNT#2
24,27,30,31,37,40 PM_CLKRUN#
10,13,26,27,30,31,37,40 PCIRST#

Y14
V16
U16

T1
P1
V13

C584

0.1U_0402_10V6K

CARD_DET#

10

SDCD#

ALPS_SCDA1A0301

+3V
R441
R436

RP111

100K_0402_5%
SMD3
SMD2
SMD1
SMD7

100K_0402_5%

1
2
3
4

8
7
6
5

+3V

100K_8P4R_1206_5%
RP53
SMD6
SMD4
SMD5
SMD0

+3V
R419
R423
R434
R435

100K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%

+3V

1
2
3
4

C776

TC6385XB_PBGA328

+3V

RP54

13

1U_0805_25V4Z

8
7
6
5

100K_8P4R_1206_5%

+3V

R689
100K_0402_5%

14

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#

PCI_PAR
PCI_PERR#
PCI_SERR#

SDCD#
SDWP
SDLED

C556

0.1U_0402_10V6K

U55F

U55C

26,27,30,31
26,27,30,31
26,27,30,31
26,27,30,31
26,27,30,31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

SDCMD
SDCLK

C586

0.1U_0402_10V6K

12

1
SN74LVC14APWLE_TSSOP14
+3V POWER

CARD_RST

26,27,30,31 PCI_PAR
26,27,30,31 PCI_PERR#
26,27,30,31 PCI_SERR#

V20
V19
V18
V17

PCI Interface

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

SDCMD
SDCLK

U1
R4

C577

Q72
2N7002

SDC_D0
SDC_D1
SDC_D2
SDC_D3

14

1PCI_REQ#2_F

R2
T2
R3
T3

PCI_REQ#2

PCI_REQ#2

SDCD0
SDCD1
SDCD2
SDCD3

2
2

26

SmartMedia Interface

R706
100K_0402_5%

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

+5VS

K17
K18
K19
L17
L18
L19
L20
M17
M18
M19
M20
N17
N18
N19
N20
P17
P18
P19
P20
P16
R17
R18
R19
R20
T17
T18
T19
T20
U17
U18
U19
U20

SD Interface

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

SDCMD
SDC_D1
SDC_D0
SDC_D2

R690
100K_0402_5%

1
2
3
4

8
7
6
5

+SD3_VCC

100K_8P4R_1206_5%

SN74LVC14APWLE_TSSOP14
+3V POWER

C588
10P_0402_50V8K

Compal Electronics, Inc.


Title
CARDBUS & SD CONN (1/2)
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

Document Number
Sapporo 300P
, 01, 2003

Rev
0.3
Sheet
1

28

of

57

RP19
U5B

S2_A161
2
R402
33_0402_5%

S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15

F17
F19
G16
E10
C10
E11
C11
A11
F18
F20
G18
D10
B10
D11
B11
E12

S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
S2_A15
R_S2_A16
S2_A17
S2_A18
S2_A19
S2_A20
S2_A21
S2_A22
S2_A23
S2_A24
S2_A25

E19
D20
D18
C20
C18
A18
B18
B17
E14
B13
B12
D13
A16
C14
A14
C16
E17
A13
D14
B14
D15
B15
D16
B16
C17
A17

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#
S2_CE1#
S2_CE2#
S2_WE#
S2_IORD#
S2_IOWR#
S2_OE#
S2_VS1
S2_VS2
S2_REG#
S2_RST
BVCC3_EN
BVCC5_EN
BEN0
BEN1
B

+S2_VCC

U38

SLTA30/D0/CAD27
SLTA31/D1/CAD29
SLTA32/D2/RESERVED
SLTA2/D3/CAD0
SLTA3/D4/CAD1
SLTA4/D5/CAD3
SLTA5/D6/CAD5
SLTA6/D7/CAD7
SLTA64/D8/CAD28
SLTA65/D9/CAD30
SLTA66/D10/CAD31
SLTA37/D11/CAD2
SLTA38/D12/CAD4
SLTA39/D13/CAD6
SLTA40/D14/RESERVED
SLTA41/D15/CAD8

A8
D9
B9
J3
H5
H2
G5
G3
E9
C9
A9
J2
H3
H1
G4
G2

S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

SLTB29/A0/CAD26
SLTB28/A1/CAD25
SLTB27/A2/CAD24
SLTB26/A3/CAD23
SLTB25/A4/CAD22
SLTB24/A5/CAD21
SLTB23/A6/CAD20
SLTB22/A7/CAD18
SLTB12/A8/CCBE#1
SLTB11/A9/CAD14
SLTB8/A10/CAD9
SLTB10/A11/CAD12
SLTB21/A12/CCBE#2
SLTB13/A13/CPAR
SLTB14/A14/CPERR#
SLTB20/A15/CIRDY#
SLTB19/A16/CCLK
SLTB46/A17/CAD16
SLTB47/A18/RESERVED
SLTB48/A19/CBLOCK#
SLTB49/A20/CSTOP#
SLTB50/A21/CDEVSEL#
SLTB53/A22/CTRDY#
SLTB54/A23/CFRAME#
SLTB55/A24/CAD17
SLTB56/A25/CAD19

SLTA29/A0/CAD26
SLTA28/A1/CAD25
SLTA27/A2/CAD24
SLTA26/A3/CAD23
SLTA25/A4/CAD22
SLTA24/A5/CAD21
SLTA23/A6/CAD20
SLTA22/A7/CAD18
SLTA12/A8/CCBE#1
SLTA11/A9/CAD14
SLTA8/A10/CAD9
SLTA10/A11/CAD12
SLTA21/A12/CCBE#2
SLTA13/A13/CPAR
SLTA14/A14/CPERR#
SLTA20/A15/CIRDY#
SLTA19/A16/CCLK
SLTA46/A17/CAD16
SLTA47/A18/RESERVED
SLTA48/A19/CBLOCK#
SLTA49/A20/CSTOP#
SLTA50/A21/CDEVSEL#
SLTA53/A22/CTRDY#
SLTA54/A23/CFRAME#
SLTA55/A24/CAD17
SLTA56/A25/CAD19

C8
E8
B7
D7
A6
C6
D6
B5
D4
E2
F3
E4
A4
D2
C4
A3
D5
E1
D3
D1
C3
C1
B2
B4
C5
A5

S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
R_S1_A16 1
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

E20
E18
G19
H20
A15
C19
G20
D17

SLTB63/BVD1/CSTSCHG
SLTB62/BVD2/CAUDIO
SLTB36/CD#1/CCD#1
SLTB67/CD#2/CCD#2
SLTB16/BSY#/CINT#
SLTB59/WAIT#/CSERR#
SLTB33/WP#/CCLKRUN#
SLTB60/INPACK#/CREQ#

SLTA63/BVD1/CSTSCHG
SLTA62/BVD2/CAUDIO
SLTA36/CD#1/CCD#1
SLTA67/CD#2/CCD#2
SLTA16/BSY#/CINT#
SLTA59/WAIT#/CSERR#
SLTA33/WP#/CCLKRUN#
SLTA60/INPACK#/CREQ#

D12
C12
C15
E13
C13
A12
H18
H19
D19
B19

SLTB7/CE#1/CCBE#0
SLTB42/CE#2/CAD10
SLTB15/WE#/CGNT#
SLTB44/IORD#/CAD13
SLTB45/IOWR#/CAD15
SLTB9/OE#/CAD11
SLTB43/VS1/CVS1
SLTB57/VS2/CVS2
SLTB61/REG#/CCBE#3
SLTB58/RESET/CRST#

SLTB30/D0/CAD27
SLTB31/D1/CAD29
SLTB32/D2/RESERVED
SLTB2/D3/CAD0
SLTB3/D4/CAD1
SLTB4/D5/CAD3
SLTB5/D6/CAD5
SLTB6/D7/CAD7
SLTB64/D8/CAD28
SLTB65/D9/CAD30
SLTB66/D10/CAD31
SLTB37/D11/CAD2
SLTB38/D12/CAD4
SLTB39/D13/CAD6
SLTBA40/D14/RESERVED
SLTB41/D15/CAD8

S1_CE1#
S1_CE2#
S1_WE#
S1_IORD#
S1_IOWR#
S1_OE#
S1_VS1
S1_VS2
S1_REG#
S1_RST

VC3ENA
VC5ENA
VPEN0A
VPEN1A

H17
G17
J20
H16

AVCC3_EN
AVCC5_EN
AEN0
AEN1

J18
J19
J16
J17

VC3ENB
VC5ENB
VPEN0B
VPEN1B

T13

ZVBEN

ZVAEN

U14

E15
F14
F15
F16
G15

VCCB
VCCB
VCCB
VCCB
VCCB

VCCA
VCCA
VCCA
VCCA
VCCA

E6
F5
F6
F7
G6

A19
B20
E16
J11
J12
K11
K12

GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND

A2
B1
E5
J9
J10
K9
K10

T7
T8
T11
T12

TSTI0
TSTI1
TSTI2
TSTI3

System
AUDIO
Interface ALARM
EXSMI#

W5
V3
W10

W14
W13
Y13

TSTO1
TSTO2
TSTO3

NC0
NC1
NC2
NC3

A1
A20
Y1
Y20

Slot B

Slot A

Test Pins
NC Pins

+5VALW

1
3

+12VALW

23
AVCC3_EN
AVCC5_EN
AEN0
AEN1

AVCC3IN

2
26
28
24

BVCC3IN

+5VALW

15
17

BVCC5IN
BVCC5IN

+12VALW

11
25

BVCCOUT
BVCCOUT
BVCCOUT

12
14
16

Slot B
Power
Supply BVPPOUT

+S2_VCC

10

BVCC3_EN
BVCC5_EN
BEN0
BEN1

1U_0805_25V4Z

GND
GND

4
18
C215

+3VALW

S1_WP
S1_CD2#
S1_D2
S1_D10
S1_D1
S1_D9
S1_D0
S1_D8
S1_A0
S1_BVD1
S1_A1
S1_BVD2
S1_A2

+12VALW

2 S1_A16
R442
33_0402_5%
C526

C544

C538

C537

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0805_25V7K

0.1U_0805_25V7K

S1_REG#
S1_A3
S1_INPACK#
S1_A4
S1_WAIT#
S1_A5
S1_RST

+5VALW

C545

C525

C543

C530

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

S1_A6
S1_VS2
S1_A7
S1_A25
S1_A12
S1_A24
S1_A15
C247
0.1U_0805_25V7K

+S2_VCC

S1_A23
S1_A16
S1_A22

+S1_VPP

C521

1U_0805_25V4Z

+S1_VCC

1U_0805_25V4Z

S1_A21
S1_RDY#
S1_A20

C253
0.1U_0402_10V6K

S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_A17
S1_A8

This area close to MIC2563A-0BSM

S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#

+S1_VCC
+S1_VCC

PCM_SPK# 34

47K_8P4R_1206_5%

C576

C575

C585

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

+S2_VCC

C557

C558

C555

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3
C301
1000P_0402_50V7K

TC6385XB_PBGA328

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75

This area close to TC6385XB

C531

1000P_0402_50V7K

C551

8
7
6
5

JP21

+S2_VPP

BVPPIN

1
2
3
4

CARDBUS
SOCKET

1U_0805_25V4Z

NC0
NC1

BVCC5_EN
BVCC3_EN
BEN0
BEN1

8
7
6
5
47K_8P4R_1206_5%

+S1_VPP

MIC2563A-0BSM_SSOP28

+S1_VCC

1
2
3
4

C542

AVCC3_EN
AVCC5_EN
AEN0
AEN1

20
19
21
22

AVCC5_EN
AVCC3_EN
AEN0
AEN1

+S1_VCC

AVPPIN

13

BVCC3_EN
BVCC5_EN
BEN0
BEN1

AVCCOUT

Slot A AVCCOUT
AVCC5IN
AVCCOUT
AVCC5IN Power
Supply AVPPOUT

6
5
7
8

+3VALW

S1_BVD1
B8
S1_BVD2
D8
S1_CD1#
J1
S1_CD2#
H4
S1_RDY#
B3
S1_WAIT#
E7
S1_WP
A10
C7 S1_INPACK#

G1
F4
C2
F1
E3
F2
J4
J5
A7
B6

SLTA7/CE#1/CCBE#0
SLTA42/CE#2/CAD10
SLTA15/WE#/CGNT#
SLTA44/IORD#/CAD13
SLTA45/IOWR#/CAD15
SLTA9/OE#/CAD11
SLTA43/VS1/CVS1
SLTA57/VS2/CVS2
SLTA61/REG#/CCBE#3
SLTA58/RESET/CRST#

27

+3VALW

RP14

a68
b68
a34
b34
a67
b67
a33
b33
a66
b66
a32
b32
a65
b65
a31
b31
GND
GND
a64
b64
a30
b30
a63
b63
a29
b29
a62
b62
a28
b28
a61
b61
GND
GND
a27
b27
a60
b60
a26
b26
a59
b59
a25
b25
a58
b58
a24
b24
GND
GND
a57
b57
a23
b23
a56
b56
a22
b22
a55
b55
a21
b21
a54
b54
GND
GND
a20
b20
a53
b53
a19
b19
a52/a18 b52/b18
none
none
a51/a17 b51/b17
a16
b16
a50
b50
a15
b15
GND
GND
a49
b49
a14
b14
a48
b48
a13
b13
a47
b47
a12
b12
a46
b46
GND
GND
a11
b11
a45
b45
a10
b10
a44
b44
a9
b9
a43
b43
a8
b8
GND
GND
a42
b42
a7
b7
a41
b41
a6
b6
a40
b40
a5
b5
a39
b39
GND
GND
a4
b4
a38
b38
a3
b3
a37
b37
a2
b2
a36
b36
a1
b1
a35
b35

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75

S2_WP
S2_CD2#
S2_D2
S2_D10
S2_D1
S2_D9

C216
1000P_0402_50V7K

S2_D0
S2_D8
S2_A0
S2_BVD1
S2_A1
S2_BVD2
S2_A2
S2_REG#
S2_A3
S2_INPACK#
S2_A4
S2_WAIT#
S2_A5
S2_RST

S2_A6
S2_VS2
S2_A7
S2_A25
S2_A12
S2_A24
S2_A15
S2_A23
S2_A16
S2_A22

C248
0.1U_0805_25V7K
+S2_VPP
+S2_VCC

S2_A21
S2_RDY#
S2_A20

C254
0.1U_0402_10V6K

S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S2_A17
S2_A8

S2_IOWR#
S2_A9
S2_IORD#
S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3
C302
1000P_0402_50V7K
A

PCMC150PIN

Compal Electronics, Inc.


Title
CARDBUS & PCMCIA (2/2)
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

Document Number
Sapporo 300P
, 01, 2003

Rev
0.3
Sheet
1

29

of

57

PCI_AD[0..31]

PCI_AD[0..31] 26,27,28,31

+3V

1
C346

WL_OFF#

34,39,40 KILL_SW#

U10
TC7SH08FU_SSOP5

MINI_PCI SOCKET
4

PCI_AD5
R449
@33_0402_5%

PCI_AD3
PCI_AD1

+5VS_MINIPCI

W=30mils

C593
@10P_0402_50V8K

+5VS

2 W=30mils
0_0603_5%

1
L31
0603

+5VS_MINIPCI

PCI_AD15
PCI_AD13
PCI_AD11

+5VS_MINIPCI
C214
@1000P_0402_50V7K

C233
@0.1U_0402_16V4Z

C598
@0.1U_0402_16V4Z

C600
@10U_1206_16V4Z

PCI_AD9
PCI_C/BE#0 26,27,28,31
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3VS_MINIPCI

W=20mils

C304
0.1U_0402_16V4Z

C252
0.1U_0402_16V4Z

C255
0.1U_0402_16V4Z

C243
0.1U_0402_16V4Z

C288
0.1U_0402_16V4Z

PCI_AD8
PCI_AD7

CLK_PCI_MINI

PCI_DEVSEL# 26,27,28,31

PCI_AD12
PCI_AD10

PCI_FRAME# 26,27,28,31
PCI_TRDY# 26,27,28,31
PCI_STOP# 26,27,28,31

PCI_AD14

PCI_PAR 26,27,28,31

26,27,28,31 PCI_PERR#
26,27,28,31 PCI_C/BE#1

IDSEL : PCI_AD18

24,27,28,31,37,40 PM_CLKRUN#
26,27,28,31 PCI_SERR#

PCI_AD18
PCI_AD16

2 PCI_AD18
100_0402_5%

PCI_AD17
26,27,28,31 PCI_C/BE#2
26,27,28,31 PCI_IRDY#

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1
R440
PCI_AD22
PCI_AD20

PCI_AD21
PCI_AD19

WLANPME# 27,28,31,40
PCI_AD30

PCI_AD23

+3V

26,27,28,31 PCI_C/BE#3

0_0603_5%

PCI_AD27
PCI_AD25

PCI_AD31
PCI_AD29

L30
PCI_GNT#1 26

PCI_REQ#1

W=40mils

26

+3VS_MINIPCI
+3V

CLK_PCI_MINI

15 CLK_PCI_MINI

+5VS_MINIPCI
PCI_PIRQC# 26,28

0_0603_5%

W=30mils
PCI_PIRQC#
W=40mils
PCIRST#

PCI_PIRQD#

26,28 PCI_PIRQD#
W=40mils

LAN RESERVED

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

L17
+3V

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

D9
RB751V_SOD323
1
2

+3VS_MINIPCI

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

C590
10U_1206_16V4Z

+3V

LAN RESERVED

Mini-PCI SLOT

TIP

PCIRST#

10,13,26,27,28,31,37,40 PCIRST#

JP27

40

2
0.1U_0402_16V4Z

C289
0.1U_0402_16V4Z

Compal Electronics, Inc.


Title

MINI_PCI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Sapporo 300P

Document Number

Date:

, 01, 2003

Rev
0.3
Sheet

30

of

57

+3VS
+3VS

1
R526
1
R527
1
R524
1
R267
2
R269

2
4.7K_0402_5%
2
10K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
1
4.7K_0402_5%

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD

15
27
39
51
59
72
88
100
7
1
2
107
108
120

CPS

106

NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)

125
124
123
122
121

+3VS

2 1394_IDSEL
100_0402_5%

1
R563

26,27,28,30 PCI_C/BE#3
26,27,28,30 PCI_C/BE#2
26,27,28,30 PCI_C/BE#1
26,27,28,30 PCI_C/BE#0
15 CLK_PCI_1394
26
PCI_GNT#0
26
PCI_REQ#0

26,27,28,30 PCI_FRAME#
26,27,28,30 PCI_IRDY#
26,27,28,30 PCI_TRDY#
26,27,28,30 PCI_DEVSEL#
26,27,28,30 PCI_STOP#
26,27,28,30 PCI_PERR#
16,26,28 PCI_PIRQA#
27,28,30,40 1394_PME#
26,27,28,30 PCI_SERR#
26,27,28,30 PCI_PAR
24,27,28,30,37,40 PM_CLKRUN#
10,13,26,27,28,30,37,40 PCIRST#

PCIRST#

C696
@10P_0402_50V8K

G_RST
GPIO3
GPIO2

R523
220_0402_5%

C409

C671

C410

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

86
96
10
11

CYCLEIN

CYCLEOUT/CARDBUS
CNA
TEST17
TEST16

20
35
48
62
78

C408

0.1U_0402_16V4Z

TSB43AB21
/(TSB43AB22)

+3VS

1394_PLLVDD

0.01U_0402_25V4Z
C407

C403

C400

C396

C670

C672

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

L18
BLM21A601SPT_0805
1
2 +3VS
C404
4.7U_0805_10V4Z

PCI BUS INTERFACE

BIAS CURRENT

R0

1
R545

2
1K_0402_5%

118
R564
6.34K_0603_1%

OSCILLATOR

FILTER

R1

119

X0

X1

FILTER0

C694

0.1U_0402_16V4Z

EEPROM 2 WIRE BUS SDA

92

SCL

91

1
R525
1
R521

PC0
PC1
PC2

99
98
97

FILTER1

POWER CLASS

PHY PORT 1

TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -

116
115
114
113
112

TEST9
TEST8

94
95

TEST3
TEST2
TEST1
TEST0

101
102
104
105

C702
22P_0402_50V8J
X7
24.576MHz_16P_3XG-24576-43E1
C700
22P_0402_50V8J

2
220_0402_5%
2
220_0402_5%

C684
R562
56.2_0603_1%

R561
56.2_0603_1%

0.33U_0603_16V4Z
JP35

TPBIAS0
TPA0+
TPA0TPB0+
TPB0-

4
3
2
1
R557
56.2_0603_1%

R558
56.2_0603_1%

4
3
2
1

SUYIN_020204FR004S507ZL

C681

14
89
90

C685

0.1U_0402_16V4Z

220P_0402_50V8K
TSB43AB21_PQFP128

R556
5.11K_0603_1%

R516
220_0402_5%

R583
@10_0402_5%

CLK_PCI_1394

C683

0.1U_0402_16V4Z

+3VS

PCI_AD16

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

C675

0.1U_0402_16V4Z

IDSEL:PCI_AD16

84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

PLLGND1
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
PCI_FRAME#
P CI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

26,27,28,30 PCI_AD[0..31]

U52

VDDP
VDDP
VDDP
VDDP
VDDP

PCI_AD[0..31]

87

C676

C695
0.1U_0402_16V4Z

C668
0.1U_0402_16V4Z

Compal Electronics, Inc.


Title

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

1394 Interface
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
E

31

of

57

AC97 Codec

LINE_IN_L

34

LINE_IN_R

Adjustable Output

+5VALW

1
6.8K_0402_5%
1
6.8K_0402_5%
1
6.8K_0402_5%
1
6.8K_0402_5%

U22

4
C741
C738

VOUT

DELAY SENSE or ADJ

@4.7U_0805_10V4Z @0.1U_0402_16V4Z

ERROR

19,35,40,41,42,50,51,52,53 SUSP#

SD

C432

VIN

+VDDA

+VDDA

LINEIN_L
1U_0603_10V6K
LINEIN_R
1U_0603_10V6K

C434

CNOISE

GND

R279

C431
@4.7U_0805_10V4Z

@100K_0603_1%

34

PROPRIETARY NOTE

2
R624
2
R621
2
R623
2
R622

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C433

@SI9182DH-AD_MSOP8

@0.1U_0402_16V4Z

+AVDD_AC97

R278
L45

@33K_0603_1%

+5VCDS

CHB2012U170_0805
L36

+5VCDS

34

2
R635

1
10K_0402_5%

2
R637

1
10K_0402_5%

MIC

34

24,39 ICH_AC_RST#

R787 2
R788 2

VIDEO_L

MONO_OUT

37

24

LINE_IN_R

18

CD_L

20

1
11
100_0402_5%
10

XTL_IN

1
R632
1
R636

2
22_0402_5%
2
22_0402_5%

CAP1

29

PC_BEEP

CAP2

30

VREFOUT

28

RESET#
VREF

27

CAP4

32

SYNC

EAPD

47

EAPD

34

SPDIF

48

ZV_BCK/DIT
DVSS1
DVSS2

22P_0402_25V8K

AC97_L
1
10K_0402_5%

2
R601

C436

EQ_LEFT

3
U53C
74HCT4066

+5VCDS

AC97_R
1
10K_0402_5%

2
R581

0.1U_0402_16V4Z
C736

C881

C729

EQ_RIGHT

U53D
74HCT4066

EC_IDERST

4.7U_0805_10V4Z

CAP3
CAP5
CAP6
ZV_LR/DIT
ZV_SIN/RES

31
33
34
43
44

MSEL
AVSS1
AVSS2

40
26
42

0.01U_0402_16V7K

C735

C723
22U_1206_16V4Z
+5VALW

C882

R616

C724
2200P_0402_50V7K

@1U_0603_10V6K

AGND
R579
100K_0402_5%

AGND

0.01U_0603_50V7K
EC_IDERST#

+AUD_VREF

35,40 EC_IDERST

EC_IDERST 2
G

Q61
2N7002_SOT23

CD_GNA

2
1
R628
20K_0402_5%

22P_0402_25V8K

DM_ON

DIRECT CD

DM_ON

SYSTEM ON

C717

R472

R629

0_0402_5%

6.8K_0402_5%

0.1U_0402_16V4Z

C726
4.7U_0805_10V4Z

Compal Electronics, Inc.

2
0_0603_5%

CD_AGND

1
R277

36

2
0_0603_5%

+2.5VOP_REF

R789
10K_0402_5%

1
R272

POWER ON PATH

1 24.576MHz_16P_3XG-24576-43E1
C435

C733 0.015U_0402_16V7K
2
+AUD_VREF
0_0402_5%

1
R617

YMF753

2
0_0603_5%

+2.5VOP_REF

ICH_AC_SDIN0 24

1
2
620_0402_5%

C734 2200P_0402_50V7K

0.1U_0402_16V4Z

1
R281

EQ_RIGHT 33,34

X1

0.01U_0402_16V7K

DGND

EQ_RIGHT

10
U53B
74HCT4066

ICH_AC_BITCLK 24,39

2
@10K_0402_5%

SDATA_OUT

34

C815

1
R638

R790

PHONE

11

1U_0603_10V6K

+5VCDS

R280
@1M_0402_5%

XTL_OUT

C690

EC_IDERST#

MIC1
MIC2

34 INT_CD_R

1
2
C752 15P_0402_50V8J

CD_GND

RESERVERD/ID0#
EXT24M/ID1#

4
7

6
8

CD_R

45
46

R627
@10K_0402_5%

BIT_CLK
SDATA_IN

+5VCDS

14

LINEIN_R

1 10K_0402_5%

41

R810 2

39

1 @10K_0402_5%
1 @10K_0402_5%

2
0_0402_5%

14
7
AC97_R

16

TRUE_LOUT_L

EQ_LEFT 33,34

U53A
74HCT4066

14

AC97_L

4.7U_0805_10V4Z

TRUE_LOUT_R

EQ_LEFT

1
DVDD1

4.7U_0805_10V4Z

C727

1
R814

C728

LINER

0.1U_0402_16V4Z

LINEL

36

LINE_IN_L

24,39 ICH_AC_SDOUT
+3VS
+3VS

35

VIDEO_R

24,39 ICH_AC_SYNC

C813

LINE_OUT_L
LINE_OUT_R

23

2
R633

1U_0603_10V6K

+2.5VOP_REF

AUX_R

C_MD_SPK 13
1U_0603_10V6K
12

MONO_IN

1000P_0402_50V7K

AUX_L

19
1U_0603_10V6K
C_MIC
21
1U_0603_10V6K
22
+AUD_VREF

C750

1000P_0402_50V7K

C732

15

17

1U_0603_10V6K

C731

14

LINEIN_L

1U_0603_10V6K

C709

14

MD_SPK

0.01U_0402_25V4Z

CD_L_R
C746
CD_R_R
C744
CD_GNA
C745
MIC
C743

34 INT_CD_L

39

1
20K_0402_5%
1
20K_0402_5%

10U_1206_16V4Z

C751

2
R630
2
R626

0.1U_0402_16V4Z

34 INT_CD_R

1
6.8K_0402_5%
1
6.8K_0402_5%

C693 0.1U_0402_16V4Z

34 INT_CD_L

2
R631
2
R625

C749

DVDD2

38

25

AVDD1

U58

AVDD2

2
R634
@0_0402_5%

C748
0.1U_0402_16V4Z

C747

13

+AUD_VREF

+2.5VOP_REF

+3VS

1 10K_0402_5%

10U_1206_16V4Z

R809 2

C742

0.1U_0402_16V4Z

C737

DIRECT PLAY PATH

+VDDC
+VDDC

@CHB2012U170_0805

12

+VDDA

Title

AC97 Codec YAM753

DGND

Size
B

AGND

Date:
5

Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

32

of

57

+5VCD

+5VCD
+5VCD

C423

C422

4.7U_0805_10V4Z

C730
100P_0402_50V8K

C425

BTQ00 EQ Circuit UPDATA 03/26

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1
2
R619
1.5K_0603_1%
U57A

O
+

R614
107K_0603_1%

EQ_L_OUT1

1
R612

EQ_L_IN5

2
4.99K_0603_1%

U56A

LMV824MT_TSSOP14
C721 0.082U_0402

1
2
R607
3.32K_0603_1%

C704 4700P_0402_25V7K
2

1
R598
2.49K_0603_1%

+5VCD

1AMP_LEFT_1

1
R684

AMP_LEFT 34

OUTPUT TO AMPLIFIER
LEFT CHANNEL

C701
1500P_0402_50V7K
1
2
R594
1.65K_0603_1%

+5VCD

2AMP_LEFT
0_0402_5%

LMV824MT_TSSOP14

11

+5VCD

EQ_L_IN3

LMV824MT_TSSOP14

11

10

R618

U56C
390P_0603_50V7K

OUT

EQ_L_IN4

LMV824MT_TSSOP14

U56D

OUT

12

R589
100K_0603_1%

R590
200K_0603_1%

14 EQ_L_OUT4

LMV824MT_TSSOP14

+2.5VOP_REF

200K_0603_1%

13

EQ_L_OUT3

390P_0603_50V7K

11

C703
EQ_L_OUT2

U56B

O
G

EQ_L_IN2

AUDIO LEFT CHANNEL

1800P_0402_50V7K

C705

C720

+2.5VOP_REF

11

C718
0.018U_0603_16V7K

EQ_L_IN1#
2
11.8K_0603_1%
EQ_L_IN1

1
R613

11

EQ_LEFT

C725
0.018U_0603_16V7K

+2.5VOP_REF

+2.5VOP_REF

+5VCD

BY-PASS EQ CIRCUIT

R595

4
+

C708
0.1U_0402_16V4Z

8
C722
100P_0402_50V8K

R596
100K_0603_1%

1
2
R620
1.5K_0603_1%

C420

14

LMV824MT_TSSOP14

LMV824MT_TSSOP14

11

4.7U_0805_10V4Z

+5VCD
C418

4.7U_0805_10V4Z

U57C

OUT

U57D

OUT
11

9
10

+5VCD

12

+2.5VOP_REF

100K_0603_1%

C421

13

+5VCD

EQ_RIGHT

32,34 EQ_RIGHT

AMP_LEFT
1
@0_0402_5%
AMP_RIGHT
1
@0_0402_5%

2
R609
2
R608

+5VCD
EQ_LEFT

32,34 EQ_LEFT

0.1U_0402_16V4Z

+5VCD

EQ_R_OUT1

LMV824MT_TSSOP14

1
R600
C713

1
2
R602
3.32K_0603_1%

EQ_R_IN5

2
4.99K_0603_1%

0.082U_0402

C688

+5VCD

7AMP_RIGHT_1

4700P_0402_25V8K

1
2
R586
2.49K_0603_1%

U57B

R606
107K_0603_1%

1
R685

AMP_RIGHT 34
B

OUTPUT TO AMPLIFIER
RIGHT CHANNEL

C706 1500P_0402_50V7K
1
2
R597
1.65K_0603_1%

+5VCD

2AMP_RIGHT
0_0402_5%

LMV824MT_TSSOP14

11

U54A

+5VCD

EQ_R_IN3

LMV824MT_TSSOP14

4
13

EQ_R_OUT3
EQ_R_IN4

12

LMV824MT_TSSOP14

R584
100K_0603_1%

R585
200K_0603_1%

U54D

390P_0603_50V7K

U54C

OUT

OUT
+

14 EQ_R_OUT4

LMV824MT_TSSOP14

R615
200K_0603_1%

10

390P_0603_50V7K

C689

7EQ_R_OUT2

11

EQ_R_IN2

U54B

11

AUDIO RIGHT CHANNEL

1800P_0402_50V7K

C707

C712

11

+2.5VOP_REF

C710
0.018U_0603_16V7K

EQ_R_IN1#
2
11.8K_0603_1%
EQ_R_IN1

11

1
R603

EQ_RIGHT

C719
0.018U_0603_16V7K

+2.5VOP_REF

+2.5VOP_REF

+2.5VOP_REF

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

HAREWARE EQ
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

33

of

57

Audio AMP
+5VCD

+5VCD

R661
100K_0402_5%
C761
4.7U_0805_10V4Z

SHUTDOWN#

0.1U_0402_16V4Z

C760

W=40Mil

D
Q66

HIGH

PIN 4,10 ACTIVE

LOW

PIN 5,9 ACTIVE

2
G

EAPD

32

2N7002_SOT23 S

NBA_PLUG
U59

C769 1

2 0.47U_0603_16V4Z

32,33

EQ_RIGHT

C770 1

2 0.47U_0603_16V4Z

16

+5VCD

+5VCD
R663
@10K_0402_5%

2
1

1
2

R666
@820_0402_5%

R665
@820_0402_5%

0.1U_0402_16V4Z

Enable Gain
soft start

C768
0.47U_0603_16V4Z

(0.47U~1U)

TPA6011A4_TSSOP24

C771

C767

0.47U_0603_16V4Z
1
1U_0603_10V4Z

+5VCD

EQ_LEFT

1
13
18

2
C766

R664
10K_0402_1%

32,33

19
20

@100K_0402_5%

2 0.47U_0603_16V4Z
C765

INTSPK_L2
INTSPK_R2

0.47U_0603_16V4Z
2 C763

R662
NBA_PLUG

SET SE MODE MAX


2.7V--- (-4dB)

AMP_RIGHT

2AMP_RIGHT_1 1

15
23
17
12
2
8
6

33

C762 1
0.47U_0603_16V4Z
1
C764
0.47U_0603_16V4Z

AMP_LEFT

33

VOL_AMP
INTSPK_L1
INTSPK_R1
2AMP_LEFT_1 1

22
21
14
24
9
5
10
4

PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
BYPASS
LOUTHP/LINE#
ROUTVOLUME
LIN
LOUT+
RIN
ROUT+
LLINEIN
SEMAX
RLINEIN
SEDIFF
LHPIN
RHPIN
PGND
PGND
FADE#
AGND

R604
100K_0402_5%
1
2

3
11
7

NBA_PLUG

R667
10K_0402_5%

R668
11.8K_0603_1%

SET SE MODE MAX


2.94V---0dB

JP9
INTSPK_R1
INTSPK_R2

1
2
MOLEX_53398-0290

fo=1/(2*3.14*R*C)=412Hz
R=820 / C=0.47U

AUDIO Board Conn.


+3V

R697(1.5K)----------10dB

BEEP#

C699
0.1U_0402_16V4Z

40

+3V
+AVDD_AC97

1
2
R599
8.2K_0402_5%

O
7

U51C
+3V POWER
SN74LVC125APWLE_TSSOP14C714

R610
560_0402_5%
1
2

C715

1U_0603_10V6K

R641
10K_0402_5%

+3V POWER

29

PCM_SPK#

2
B

Q63
2SC2411K_SOT23

JP10

NBA_PLUG
VOL_AMP

1
L37

2
FBML10160808121LMT_0603

32

MIC

MIC

LINE_IN_R
LINE_IN_L
2
FBML10160808121LMT_0603
INTSPK_R1
INTSPK_L2
1
2
+3V
R669
100K_0402_5%
INTSPK_L1
KILL_SW#
30,39,40 KILL_SW#
1
2
L38
FBML10160808121LMT_0603

R611
560_0402_5%
1
2

U55B
1U_0603_10V6K
SN74LVC14APWLE_TSSOP14
+3V POWER

2
300_0402_5%
2
@1.5K_0402_1%

32
32

1
L39

1
O

LINE_IN_R
LINE_IN_L

32 SPDIF

14

C716

P
3

SPKR

MONO_IN 32

R639
2.4K_0402_5%

1U_0603_10V6K
+3V

24

C754
10U_1206_16V4Z

R447
560_0402_5%
1
2

+5VCD
+AVDD_AC97
+AUD_VREF

C753
1U_0603_10V6K
MONO_IN

SN74LVC14APWLE_TSSOP14
0.22U_0603_16V4Z
C587

1
R698
1
R697

14

U55A

2
8

R640
10K_0402_5%

OE#

10

100K_0402_5%

R698(300)----------14dB

R593
2

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ACES_85201-2005

D35

R642
RB751V_SOD323

10K_0402_5%

Compal Electronics, Inc.


Title

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

AMP & Audio Jack


Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
E

34

of

57

Placea caps. near HDD


CONN.

+5VALW

C656

C657

C655

C653

1000P_0402_50V7K

10U_1206_16V4Z

10U_1206_16V4Z

1U_0805_25V4Z

0.1U_0402_16V4Z

C606
10U_1206_16V4Z

2
1

C654

+5VCDS

+5VS

C609
1U_0805_25V4Z
Q79
@AOS 3401_SOT23

1
R259

IDE_IRQ14
IDE_PDA1
IDE_PDA0
IDE_PDCS1#
+5VS

2
100K_0402_5%

+5VALW

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

1
R470

2
240K_0402_5%

8
7
6
5

C608
10U_1206_16V4Z

0.1U_0402_16V4Z

SUSP#

2
1
R469
10K_0402_5%

19,32,40,41,42,50,51,52,53 SUSP#

22K

22K

22K
PCSEL 1
R236

C604

SI4425DY-T1_SO8

2
1
C611 1U_0805_25V4Z

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

D
D
D
D

2
470_0402_5%

IDE_PDA2
IDE_PDCS3#

CD_PLAY

CD_PLAY 40

22K

Q46
@DTC124EK_SOT23

Q44
DTC124EK_SOT23

IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#

IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#
IDE_PDIORDY
IDE_PDDACK#
IDE_IRQ14
IDE_PDA1
IDE_PDA0
IDE_PDCS1#
PHDD_LED#
+5VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

S
S
S
G

PIDE_RST#
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

U43

1
2
3
4

+5VALW

HDD CONNECTOR
JP34

IDE_PDD[0..15]

24 IDE_PDD[0..15]

24
24
24
24
24
26
24
24
24
40

+5VALW

IDE_PDA2 24
IDE_PDCS3# 24

+5VS

OCTEK AFH-22DC

+5VALWP TO +5VLDO

13

+5VALW

PIDE_RST#

11

C884

+5VLDO

2 1U_0603_10V4Z
1

SN74LVC08APW_TSSOP14

+12VALW

AOS 3401_SOT23
U68D

R792

SN74LVC08APW_TSSOP14

R793
SI4800DY_SO8
U66

4
3
2
1

1K_0402_5%

10K_0402_5%

32,40 EC_IDERST

5
6
7
8

14
12

D
D
D
D

Q75

G
S
S
S

10

Q76

22U_1206_10V4Z

C885

C886

1U_0603_10V4Z

C887

C888

(4.5V)

C889

2N7002_SOT23

C890

C891

C892

@1U_0805_25V4Z

R794
3.9K_0603_1%

2N7002_SOT23

4.7U_0805_10V4Z 1U_0603_10V4Z

C897

C893

C894

0.1U_0402_10V6K

+5VCDS

2
G
Q77

D48

R795

LM431SC_SOT23

4.99K_0603_1%

C895

+5VALW

CD_PLAY

1
40

+5VCD DECOUPLING

CD_PLAY

2
G

(4.5V)

+5VCD

PIDERST#

26

B_PCIRST#

U68C

16,22,26,36

R791 10K_0402_5%
1
2

+5VS

14

+5VS

+5VALW

+5VCD TO +5VCDS
2

2
+5VCDS

22U_1206_10V4Z

1U_0603_10V4Z

22U_1206_10V4Z

4.7U_0805_10V4Z

L46
1
2
@CHB2012U170_0805

+5VCD

1U_0603_10V4Z 0.1U_0402_10V6K
L47
1
2
@CHB2012U170_0805

Compal Electronics, Inc.


Title

Softwave DJ
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

Date:

, 01, 2003

Rev
0.3

Sapporo 300P
Sheet

35

of

57

IDE,CD-ROM Module CONN.


Main Module Conn. (Master)

2nd Module Conn. (Slave)

IDE_SDD[0..15]

24 IDE_SDD[0..15]

JP28
32
32

INT_CD_L
CD_AGND

2
R471
37
37
37
37
37
37
37
37,40

INT_CD_L
CD_AGND
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
PDIAG
IDE_SDIOW#
IDE_SIORDY
IDE_IRQ15
IDE_SDA1
IDE_SDA0
SW_IDE_SDCS1#
SHDD_LED#
1 EXTCSEL1
470_0402_5%

EXTID0

Module
CDROM

FDD

HDD

TV Tuner/No Module

EXTID3

EXTID2

Module

CDROM

FDD

HDD

TV Tuner/No Module

JP29

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DSKCHG#
DRV0#

RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DSKCHG#
DRV0#

EXTID1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

INT_CD_R
CD_AGND
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
IDE_SDIOR#
IDE_SDDACK#
IDE_SDA2
SW_IDE_SDCS3#
EXTID0
EXTID1

INT_CD_R 32

IDE_SDDREQ 24
IDE_SDIOR# 24
IDE_SDDACK# 24
IDE_SDA2 24

HDSEL#
WGATE#
USBP7+
USBP7FDD IR#
3MODE#
INDEX#

EXTID0
EXTID1

40
40

HDSEL#
WGATE#

37
37

USBP7+
USBP7-

24
24

FDDIR#
3MODE#

37
37

INDEX#

37

SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
PDIAG
IDE_SDIOW#
IDE_SIORDY
IDE_IRQ15
IDE_SDA1
IDE_SDA0
SW_IDE_SDCS1#
SHDD_LED#
EXTCSEL2

24 IDE_SDIOW#
24 IDE_SDIORDY
26
IDE_IRQ15
24
IDE_SDA1
24
IDE_SDA0

+5VCDS

SUYIN_100311MB060S106ZU

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
IDE_SDIOR#
IDE_SDDACK#
IDE_SDA2
SW_IDE_SDCS3#
EXTID2
EXTID3

IDE_SDDREQ 24
IDE_SDIOR# 24
IDE_SDDACK# 24
IDE_SDA2 24

USBP3+
USBP3-

EXTID2
EXTID3

40
40

USBP3+
USBP3-

24
24

+5VS

SUYIN_100311MB060S106ZU

+3VALW

B_PCI_RST#

10K_0402_5%
R796

+5VCDS
+3VALW

24

IDE_SDCS1#

SIDE_RST#

2N7002_SOT23
Q78

2
G

U67C

P
9

SN74LVC125APWLE_TSSOP14

OE#

O
B

10

U68A

14
2

SIDERST#

24

B_PCIRST#

B_PCIRST#

16,22,26,35 B_PCIRST#

IDE_SDCS1#2

OE#

14

B_PCI_RST#
10K_0402_5%
R797
SW_IDE_SDCS1#

U67A

0.1U_0402_16V4Z C896

PCMRST# 40

+5VS
C652
0.1U_0402_16V4Z

SN74LVC08APW_TSSOP14

SN74LVC125APWLE_TSSOP14
R798

+5VCDS
+5VCDS

R799
B_PCI_RST#

24

IDE_SDCS3#

12

10K_0402_5%
R800
SW_IDE_SDCS3#

U67D

11

R464
100K_0402_5%

+5VCDS

IDE_SDCS3#

OE#

+5VCDS

10K_0402_5%

13

10K_0402_5%

W=80mils

SHDD_LED#

SHDD_LED# 40

SN74LVC125APWLE_TSSOP14
C612

C610

C616

C613

1000P_0402_50V7K

10U_1206_16V4Z

1U_0805_25V4Z

0.1U_0402_16V4Z

Place component's closely MODULE CONNECTOR.

+5VS
+5VS

+5VS

8
7
6
5

RDATA#
WP#
TRACK0#
INDEX#

+5VS
+3VALW

RP151

1
2
3
4

1K_8P4R_1206_5%
MTR0#
DSKCHG#
DRV0#
FDD IR#

8
7
6
5

D
+5VS

1K_8P4R_1206_5%

RP150

1
2
3
4

8
7
6
5

HDSEL#
WGATE#
WDATA#
STEP#

1K_8P4R_1206_5%

1
2
3
4

RP138

W=80mils

R467
100K_0402_5%

1
R468

RP82

C615

C617

C620

C614

1000P_0402_50V7K

10U_1206_16V4Z

1U_0805_25V4Z

0.1U_0402_16V4Z

EXTID0
EXTID1
EXTID2
EXTID3

2 EXTCSEL2
470_0402_5%

8
7
6
5

1
2
3
4

10K_8P4R_1206_5%
Place component's closely MODULE CONNECTOR.

2
G
Q45
2N7002_SOT23

EXTID0

Compal Electronics, Inc.


Title

IDE/ FDD MODULE CONN.


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Sapporo 300P

Document Number

Date:

, 01, 2003

Rev
0.3
Sheet

36

of

57

SUPER I/O SMsC FDC47N227

+3VS
1

R209
10K_0402_5%
LPD[0..7]

LPC_AD[0..3]

13,24,40 LPC_AD[0..3]

20
21
22
23

LAD0
LAD1
LAD2
LAD3

13,24,40 LPC_FRAME#
24 LPC_DRQ#1

24
25

LFRAME#
LDRQ#

10,13,26,27,28,30,31,40 PCIRST#

26
27

PCIRST#
LPCPD#

CLK_PCI_SIO

50
17
30
28
29

GPIO12/IO_SMI#
IO_PME#
SIRQ
CLKRUN#
PCICLK

CLK_14M_SIO

19

CLK14

48
54
55
56
57
58
59
6
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

GPIO10
GPIO15
GPIO16
GPIO17
GPIO20
GPIO21
GPIO22
GPIO24
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47

51
52
64

GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23/FDC_PP

18

VTR

53
65
93

VCC
VCC
VCC

7
31
60
76

VSS
VSS
VSS
VSS

R195 2
R212 2

+3VS
26,28,40 SERIRQ
24,27,28,30,31,40 PM_CLKRUN#
15 CLK_PCI_SIO

CLK_14M_SIO
R214
@10_0402_5%

1 1

15 CLK_14M_SIO

22

39

1 10K_0402_5%
1 10K_0402_5%

PID0
PID1
PID2
PID3

PID[0..3]

PID[0..3]

C341
@15P_0402_50V8J

BT_DET#

1
R643

+3VS

2
10K_0402_5%

CLK_PCI_SIO

38
R208
@33_0402_5%

FIR_EN#

1
R644

2
10K_0402_5%

+3VS

1 C330
@22P_0402_25V8K
2

2
R194
2
R192

1
10K_0402_5%
1
10K_0402_5%

+3VS

C340
0.1U_0402_16V4Z

C286
0.1U_0402_16V4Z

0.1U_0402_16V4Z

C315

4.7U_0805_10V4Z

C285

LPD[0..7] 39

U8
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD5
PD6/MTR0#
PD7

68
69
70
71
72
73
74
75

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0#
SLCTIN#/STEP#

79
78
77
81
80
66
82
83
67

LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#

DTR2#
CTS2#
RTS2#
DSR2#
TXD2
RXD2
DCD2#
RI2#

100
99
98
97
96
95
94
92

DTR1#
CTS1#
RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#

89
88
87
86
85
84
91
90

IRMODE/IRRX3
IRRX2
IRTX2

63
61
62

RDATA#
WDATA#
WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX#
DSKCHG#
WRTPRT#
TRK0#
MTR0#
DRVDEN0

16
10
11
12
8
9
5
13
4
15
14
3
1

DRVDEN1
GPIO11/SYSOPT

LPC47N227 TQFP100 SUPER I/O

2
49

LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#
INIT#
LPTAFD#
LPTSTB#
SLCTIN#

39
39
39
39
39
39
39
39
39

+3VS

+3VS

RP112
DSR#1
CTS#1
RI#1
DCD#1

CTS#2

8
7
6
5

RP113

1
2
3
4

CTS#2
DSR#2
DCD#2
RI#2

1
2
3
4

8
7
6
5
2

DSR#2

4.7K_8P4R_1206_5%

4.7K_8P4R_1206_5%

1
R206

DCD#2
RI#2

2
1K_0402_5%
+5V

DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1
DCD#1
RI#1

JP32

1
R199

2
1K_0402_5%

IRMODE 38
IRRX
38
IRTXOUT 38

IRRX
RDATA#
WDATA#
WGATE#
HDSEL#
FDD IR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#

2
R213
1
R198

RDATA#
WDATA#
WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
3MODE#

36
36
36
36
36
36
36,40
36
36
36
36
36
36

1
10K_0402_5%
2
1K_0402_5%

IRRX 1
2
R193
@10K_0402_5%

1
2
3
4
5
6
7
8
9
10

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

1
2
3
4
5
6
7
8
9
10
@96212-1011S

+5VS

Base I/O Address


* 0 = 02Eh
1 = 04Eh

Compal Electronics, Inc.


Title

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SUPER I/O
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
E

37

of

57

+USB_BS
+3VALW
+USB_AS

+USB_BS

+USB_AS
R173

R174
+

U4

C250

OC1#
OUT1
OUT2
OC2#

0.1U_0402_16V4Z

C230
0.1U_0402_16V4Z

150U_D2_6.3VM

470P_0402_50V7K

USB_OC2# 24
24
24

C231

USBP0USBP0+

R44
0_0603_5%
1
1
R45
0_0603_5%

JP17
USB0USB0+

2
2

0.1U_0402_16V4Z

1
2
3
4
10
12

2 USBEN#
@0_0402_5%

1
R182

470P_0402_50V7K

C465

150U_D2_6.3VM

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

R46
0_0603_5%
1
1
R47
0_0603_5%

USB2USB2+

2
2

USBP2- 24
USBP2+ 24

SUYIN_020122MR008S516ZU

USB_EN#

(New)

R177

0_0402_5%

+USB_CS
+USB_DS
+3VALW
+USB_CS

R242

100K_0402_5%

100K_0402_5%

1
1

C660

1
R243

150U_D2_6.3VM

C369
470P_0402_50V7K

C370
470P_0402_50V7K

C658

150U_D2_6.3VM

+5V

+USB_DS

1
+

U12

TPS2042ADR_SO8

USB_OC4# 24

USB_OC6#

0.1U_0402_16V4Z

USBEN#

USB_OC6# 24

C376
0.1U_0402_16V4Z

24
24

USBP4USBP4+

R247
0_0603_5%
1
1
R250
0_0603_5%

JP33

2
2

USB4USB4+

1
2
3
4
10
12

C375
0.1U_0402_16V4Z

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

USB6USB6+

R252
0_0603_5%
1
1
R256
0_0603_5%

2
2

USBP6- 24
USBP6+ 24

SUYIN_020122MR008S516ZU
(New)

+3VS

1
2
R99
@3.3_1206_5%

FIR Module
1
+3VS

+IR_ANODE

1
2
R87
3.3_1206_5%

C82
22U_1206_10V4Z

C81

R80

4.7U_0805_10V4Z

47_1206_5%

U2

37

+IR_VCC

IRRX

C64
100P_0402_50V8J

37

C350
150U_D2_6.3VM

C348

USB_OC4#

1
2
R240
47_0402_5%
1
2
R239
47_0402_5%

8
7
6
5

OC1#
OUT1
OUT2
OC2#

GND
IN
EN1#
EN2#

1
2
3
4

24

C3

USB_OC0# 24

USB_OC2#

TPS2042ADR_SO8

USB_OC0#

1
2
R175
47_0402_5%
1
2
R176
47_0402_5%

8
7
6
5

1
+
C251
150U_D2_6.3VM

GND
IN
EN1#
EN2#

1
2
3
4

C11

100K_0402_5%

100K_0402_5%

+5V

1
1

C467

C63
0.1U_0402_16V4Z
+IR_GND

FIR_EN#

IRRX

2
4
6
8

IRED_C
RXD
VCC
GND

IRED_A
TXD
SD/MODE
MODE

1
3
5
7

+IR_ANODE
IRTXOUT
IRMODE

IRTXOUT 37
IRMODE 37

IR_VISHAY_TFDU6101E-TR4_8P

1
R645

2
0_0402_5%

The component's most place


cloely IRDA MODULE.

LOW FIR Poped


HIGH FIR Un-Poped

Compal Electronics, Inc.


Title

FIR_EN#

USB Conn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

Date:

, 01, 2003

Rev
0.3

Sapporo 300P
Sheet

38

of

57

BlueTooth Interface
MDC CONN.
JP19

+3V
+3VS
24,32 ICH_AC_SDOUT
24,32 ICH_AC_RST#

R72
100K_0402_5%

1
R83

C27
0.1U_0402_16V4Z

ICH_AC_SYNC 24,32

2
0_0402_5%

40

BT_PWR

22K

ICH_AC_SDIN1 24
ICH_AC_BITCLK 24,32

Module ID
Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open

C80
1U_0805_25V4Z

40

BT_DET#

BT_RESET#
BT_WAKE_UP

40 BT_WAKE_UP

BT_RESET#

4
2

BT_RST#

C495
1U_0805_25V4Z

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

Module ID
Module_Detect

U30

30,34,40 KILL_SW#

JP18

37

5
2

C98
1U_0805_25V4Z

10U_1206_16V4Z

DTC124EK_SOT23

40 BT_DETACH

+5VS_MDC

C25

Q6

1
2
R79
22_0402_5%
2

+BT_VCC

22K

C489
@0.1U_0402_16V4Z

+3VS_MDC

Q7
SI2301DS-T1_SOT23

1
2
+5VS
L23
CHB1608B121_0603
1
2
+3VS
R350
10K_0402_5%

+3VS

+3V

0.1U_0402_16V4Z

+5VS_MDC

1
R78
22_0402_5%

ACES_88023-3010

C76

32

MD_SPK

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

R100
0_0402_5%
1
2
L22
1
2 +3VS_MDC
CHB1608B121_0603

MONO_OUT/PC_BEEP AUDIO_PWDN
GND
MONO_PHONE
AUXA_RIGHT
Bluetooth Enable
AUXA_LEFT
GND
CD_GND
+5V
CD_RIGHT
USB Data+
CD_LEFT
USB DataGND
PRIMARY DN
3.3Vaux
5Vd
GND
GND
3.3Vmain
AC97_SYNC
AC97_SDATA_OUT AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

+3VS

+5VS

@TC7SH08FU_SSOP5

1
R344

24
24

2
0_0402_5%

USBP5+
USBP5-

USBP5+ R338
USBP5- R333

0_0603_5%
0_0603_5%

USB5+
USB5-

+BT_VCC
(MAX=200mA)

ACES_87153-2008
(Top Contact)

C477
0.1U_0402_16V4Z
RP2
LPD0
LPD1
LPD2
LPD3
+5V_PRN

1
2
3
4

F D0
F D1
F D2
F D3

PARALLEL PORT

D21
+5VS

1
1

F D4
F D5
F D6
F D7

RB420D_SOT23

R303

2.7K_8P4R_1206_5%

37

LPTSTB# 1

LPTSTB#

R304
2.2K_0402_5%

33_0402_5%
LPD7
LPD6
LPD5
LPD4
+5V_PRN

8
7
6
5

8
7
6
5

F D7
F D6
F D5
F D4

37

LPD[0..7]

LPD[0..7]

RP1
68_8P4R_1206_5%

RP149

1
2
3
4

1
2
3
4

F D3
F D2
F D1
F D0

2.7K_8P4R_1206_5%

37
37
37
37

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

33_0402_5% 37

LPTERR#

AFD#/3M#
37

1 R302

LPTAFD#

+5V_PRN
+5V_PRN
RP87

1
2
3
4

8
7
6
5

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

10K_8P4R_1206_5%

1
R801
1
R802
1
R803
1
R804

LPTSLCTIN#
2
@2.7K_0402_5%
LPTINIT#
2
@2.7K_0402_5%
AFD#/3M#
2
@2.7K_0402_5%
LPTERR#
2
10K_0402_5%

C452
1
2

8
7
6
5

Bluetooth Connector

+5V_PRN

68_8P4R_1206_5%

RP3

1
2
3
4

8
7
6
5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
LPTERR#
15
LPTINIT#
16
LPTSLCTIN# 17
18
19
20
F D0
F D1
F D2
F D3
F D4
F D5
F D6
F D7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

CP11
F D3
LPTSLCTIN#
F D2
LPTINIT#

220P_0402_50V8K

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

37

INIT#

37

SLCTIN#

1
R2

1
2
3
4

@220P_1206_8P4C_50V8_V1
CP9
8
1
7
2
6
3
5
4

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

@220P_1206_8P4C_50V8_V1
CP1
1
8
2
7
3
6
4
5

F D1
LPTERR#
F D0
AFD#/3M#

F D7
F D6
F D5
F D4

JP14
@ACES_85201-2005

1
R3

8
7
6
5

@220P_1206_8P4C_50V8_V1
CP10
8
1
7
2
6
3
5
4
@220P_1206_8P4C_50V8_V1

LPTINIT#
2
33_0402_5%
LPTSLCTIN#
2
33_0402_5%

Compal Electronics, Inc.


Title

PARALLEL/MDC PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

Rev
0.3

Sapporo 300P
Date:

, 01, 2003

Sheet

39

of

57

+3VALW
+51VDD

1
2

1
2

0.1U_0402_16V4Z

26,28,37 SERIRQ

L33
FBM-L11-160808-800LMT_0603

C639

13,24,37
13,24,37
13,24,37
13,24,37
13,24,37

0.1U_0402_16V4Z
ECAGND

LPC_FRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

15 CLK_PCI_LPC

1 EC_RST#
4.7K_0402_5%

2
R549

+3VALW

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

R548
@33_0402_5%
2

24

C682
@22P_0402_25V8K

EC_SCI#

EC_SCI#

1
26
26

EC_GA20
EC_KBRST#

GATEA20
KBRST#

7
8
9
15
14
13
10
18
19
22
23

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

31

IOPD3/ECSCI#

5
6

GA20/IOPB5
KBRST/IOPB6

+3VALW

R494
100K_0402_5%
1
2
1
2
R478
100K_0402_5%

KSI0
KSI1
KSI2
KSI3
KSI4

EMAIL#
INTERNET#

+3VALW

R535
10K_0402_5%

27,28,30,31 WLANPME#

27,28,30,31 1394_PME#

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

BATT_TEMP
1
0.01U_0402_25V4Z

45
45

36
36
36
36
TP_CLK
TP_DATA

TP_CLK
TP_DATA

C RY1

158

32KX1/32KCLKIN

C RY2

160

32KX2

LID_SW#

44
LID_SW#
32,35 EC_IDERST

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

168
169
170
171
172
175
176
1

PBTN_OUT#
EC_SMB_CK2
EC_SMB_DA2
FAN_SPEED1
EC_PME#
EC_THRM#
FAN_SPEED2

PORTD-1

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2

26
29
30

ACIN
CD_PLAY
PM_SLP_S3#

PORTE

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46

2
44
24
25

PM_SLP_S5#
BT_WAKE_UP

IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

124
125
126
127
128
131
132
133

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

138
139
140
141
144
145
146
147

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

IOPJ0/RD
IOPJ1/WR0

150
151

FR D#
FWR#

SELIO#

152

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

41
42
54
55

NUM_LED#
CAPS_LED#
PADS_LED#

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD

143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

113
112
104
103
48

KBA16
KBA17
KBA18
KBA19
FSTCHG

PORTH
PS2 interface

RP145

MODE#
FR D#
SELIO#
FSEL#

8
7
6
5

PORTI

10K_1206_8P4R_5%
PORTJ-1
+5VALW
RP85

FSEL#

R519
C RY1

20M_0603_5%

173
174
47

SEL0#
SEL1#
CLK

PORTK
PORTM

PORTL

C RY2
R517
120K_0402_5%

R481
100K_0402_5%

JP5

EC_URXD 46
EC_UTXD 46
EC_USCLK 46
EC_SMB_CK1 41,48
EC_SMB_DA1 41,48
PCIRST# 10,13,26,27,28,30,31,37
PBTN_OUT# 24
EC_SMB_CK2 5
EC_SMB_DA2 5
FAN_SPEED1 43
EC_THRM# 24
FAN_SPEED2 43
BT_PWR 39
ACIN
24,45,47
CD_PLAY 35
PM_SLP_S3# 24
ON/OFF 44
PM_SLP_S5# 24
BT_WAKE_UP 39
PM_CLKRUN# 24,27,28,30,31,37

NUM_LED#
PADS_LED#
CAPS_LED#
1
2
300_0402_5% +3VS
KSO15 R219
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
1
2
+3VS
R218
300_0402_5%

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1
R217

2
300_0402_5%

+3VS

NUM_LED#
PADS_LED#
CAPS_LED#

CP8
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSO15
KSO14
KSO10
KSO11

CP7
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSO8
KSO9
KSO13
KSI7

CP6
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSO3
KSO7
KSO12
KSI4

CP5
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSI6
KSI5
KSO6
KSO5

CP4
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSI3
KSI0
KSO0
KSO1

CP3
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSI1
KSI2
KSO2
KSO4

CP2
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

Data
B

FRD#
FWR#

41
41

SELIO#

41

PHDD_LED# 35

1
ENV0 (KBA0)

IRE
* OBD
DEV
PROG

2E

2F

4E

4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1


Reserved
ENV1 (KBA1)

0
0
1
1

0
1
0
1

TRIS (KBA4)
0
0
0
0

SHBM(KBA5)=1: Enable shared memory with host BIOS


TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use
+3VALW
+5VS
FSTCHG

TP_CLK 1
R493
TP_DATA 1
R492

49

2
4.7K_0402_5%
2
4.7K_0402_5%

KBA1
KBA2
KBA3
KBA5

1
2
L32
FBM-L11-160808-800LMT_0603

I/O Address
Index

BADDR1(KBA3) BADDR0(KBA2)

1
R491
1
R490
1
R489
1
R488

2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%

D42
A

ECAGND

C665
12P_0402_50V8J

(Need to check layout library with KB spec)

1
IN

0.1U_0402_16V4Z

OUT

1
R487
18K_0402_5%

DAC_BRIG
C798

2
1
3

@0.1U_0402_16V4Z
2

+3VALW

C802
@DAN217_SOT23
@0.1U_0402_16V7K

Compal Electronics, Inc.

NC

10P_0402_50V8K

NC

Title
PROPRIETARY NOTE

Rb

X5

EC_URXD
EC_UTXD
EC_USCLK

KEYBOARD CONN.

6278-34P-KBCON

1
2

C664

49,53

+3VALW

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

(ACES_85201-2405_24P)

INVT_PWM 22
BEEP#
34
SHDD_LED# 36
ACOFF
49
KILL_SW# 30,34,39
EC_ON
44,46
EC_LID_OUT# 24
BT_DETACH 39

ACOFF
KILL_SW#
EC_ON
EC_LID_OUT#
BT_DETACH

ADP_I

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10

@96212-1011S

PC87591L-VPCN01 A2_LQFP176

AD_BID0
C638

1
C644

2
100K_0402_5%
2
0.22U_0603_16V4Z

DAC_BRIG 22
EN_DFAN2 43
IREF
49
EN_DFAN1 43

Ra

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

PORTJ-2

1
R499

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

BKOFF#

FSEL#

148
149
155
156
3
4
27
28

PORTD-2

AGND

SYSON
SUSP#
VR_ON

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

11
12
20
21
85
86
91
92
97
98

41

+3VALW

EN_DFAN3

42,43,51 SYSON
19,32,35,41,42,50,51,52,53 SUSP#
54
VR_ON
36
PCMRST#
24,46 EC_RSMRST#
36,37
DRV0#
16,22
ENBKL
22
BKOFF#

Analog Board ID definition,


Please see page 3.

62
63
69
70
75
76

96

10K_1206_8P4R_5%

EC_SMI#

EC_SMI#
S4_SATA
WL_OFF#
EC_SWI#
BT_RST#
EN_DFAN3

GND1
GND2
GND3
GND4
GND5
GND6
GND7

24
43
30
24
39
43

17
35
46
122
159
167
137

EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1

1
2
3
4

8
7
6
5

ALI/MH#
EMAIL#
MODE#
INTERNET#
AD_BID0

EC_URXD
EC_UTXD
EC_USCLK
EC_SMB_CK1
EC_SMB_DA1

+3VALW
1
2
3
4

BATT_OVP 49
FAN_DET 43
ALI/MH# 48
EMAIL# 44
MODE# 45
INTERNET# 44

153
154
162
163
164
165

JTAG debug port

BATT_TEMPA 48

BATT_OVP

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2

PORTC

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

BATT_TEMP

INVT_PWM
BEEP#

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

PWM
or PORTA

110
111
114
115
116
117
118
119

EXTID0
EXTID1
EXTID2
EXTID3

81
82
83
84
87
88
89
90
93
94

32
33
36
37
38
39
40
43

PORTB

For EC Tools
JP31

DAC_BRIG
EN_DFAN2#
IR EF
EN_DFAN1#

Key matrix scan

KBA[0..19]
ADB[0..7]

KBA[0..19]
ADB[0..7]

+RTCVCC

99
100
101
102

DA0
DA1
DA2
DA3

DA output

TINT#
TCK
TDO
TDI
TMS

41
41

VBAT

AD Input

105
106
107
108
109

EC_PME#

27,28,30,31 LAN_PME#

2
C649

71
72
73
74
77
78
79
80

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

27,28,30,31 PCM_PME#

ECAGND

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

Host interface

2
45
45
45
45
44

95

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

+3VALW
2

AVCC

0.1U_0402_16V4Z
U50

R813
0_0402_5%
2

161

C677
34
45
123
136
157
166

C637
1000P_0402_50V7K

+51AVCC
1

16

0_0402_5%

2
1

R552

VDD

+51AVCC

C666

+3VS

1000P_0402_50V7K

1
D

C643

0.1U_0402_16V4Z

+RTCVCC

+3VALW

1
2

C661

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C669

C678

0.1U_0402_16V4Z
C674

32.768KHZ_12.5P_1TJS125DJ2A073
5

EC PC87591

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
Custom
Sapporo 300P
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
, 01, 2003
3

Rev
0.3
Sheet
1

40

of

57

+5VALW
+5VALW

1
2
C351 0.1U_0402_16V4Z

+5VALW

20

14
KBA4

SELIO#

U13A

SN74HCT273PW_TSSOP20

CC
LARST#

11
1

CP
MR

CP
MR

VCC

11
1

10

U13B
SN74LVC32APWLE_TSSOP14

AA
LARST#

0.1U_0402_16V4Z

D0
D1
D2
D3
D4
D5
D6
D7

VCC

C366
1
2

3
4
7
8
13
14
17
18

GND

CD_FDD_LED#

+3VALW

CDON_LED# 45
MP3_LED# 45
EMAIL_LED# 45
PWR_LED# 45
PWR_SUSP_LED# 45
BATT_LOW_LED# 45
BATT_CHGI_LED# 45
CD_FDD_LED# 44

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

SN74LVC32APWLE_TSSOP14

10

2
5
6
9
12
15
16
19

SELIO#

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

KBA2

SELIO#

D0
D1
D2
D3
D4
D5
D6
D7

40

3
4
7
8
13
14
17
18

14

+3VALW

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

GND

U14

U11

20

1
2
C367
0.1U_0402_16V4Z

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

2
5
6
9
12
15
16
19

KSO16

KSO17
HDD_LED#

KSO17
44,45
HDD_LED# 44
WL_BT_LED# 44
S4_LATCH 43
EC_RCVEN 46
EC_RCRST# 46
CIR_GATING# 46

EC_RCVEN
EC_RCRST#

to 3V

SN74HCT273PW_TSSOP20

C352
1
2

1
2
R224
20K_0402_5%

1U_0805_25V4Z

+3VALW

CC

1
R246
1
R238

+5VALW
+5VALW

2
100K_0402_5%
2
100K_0402_5%

100K_0402_5%

SUSP#

19,32,35,40,42,50,51,52,53

8
7
6
5

40,48 EC_SMB_CK1
40,48 EC_SMB_DA1

2
G

R245
100K_0402_5%

14

Q15
2N7002_SOT23

R263
100K_0402_5%

40

1MB Flash ROM

512KB Flash ROM

Flash ROM Socket Conn.

KBA[0..19]
ADB[0..7]

KBA[0..19]
ADB[0..7]

EC_FLASH# 24

FWR#

40
40

A0
A1
A2
GND

3
S

1
D

10

VCC
WP
SCL
SDA

1
2
3
4

AT24C16N10SC-2.7_SO8

2
P

U13C
SN74LVC32APWLE_TSSOP14

R266

U18

C399
2 0.1U_0402_16V4Z

+3VALW

+3VALW

FWE#

AA

+3VALW

C663
0.1U_0402_16V4Z
2

U15
U16

40
40

FSEL#
FRD#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

FSEL#
FR D#
FWE#

22
24
9

CE#
OE#
WE#

VCC0
VCC1

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

GND0
GND1

23
39

JP7

1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RESET#

1
2
R248
@100K_0402_5%

C380
0.1U_0402_16V4Z

+3VALW

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FR D#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

+3VALW

@29F040/SST39VF040_PLCC

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KBA17
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
FR D#
FSEL#
KBA0

@SUYIN-80065A-040G2T

SST39VF080-70_TSOP40

Compal Electronics, Inc.


Title

BIOS & EXT. I/O PORT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Sapporo 300P

Document Number

Date:

, 01, 2003

Rev
0.3
Sheet

41

of

57

+3V

+5VALW TO +5V

+5V

+3V

1U_0805_25V4Z

U44

R408
@470_0805_5%

S
S
S
G

1
2
3
4

SYSON_ALW

SI4800DY_SO8

4.7U_0805_10V4Z

C438

1
1

C440

2 SYSON#
G
Q39
@2N7002_SOT23

1U_0805_25V4Z

C441
4.7U_0805_10V4Z

+12VALW

C605

R427

0.1U_0402_16V4Z

@1M_0402_5%

R184
@470_0805_5%

2 SYSON#
G
Q51
@2N7002_SOT23

2 SUSP
G
Q11
@2N7002_SOT23

SYSON_ALW

C635

10U_1206_16V4Z

2 SYSON#
G
Q41
2N7002_SOT23

C437
+3VS

+5VS

0.1U_0402_16V4Z

R426
100K_0402_5%
1
2

SI4800DY_SO8

R505
@470_0805_5%

D
D
D
D

1
2
3
4

8
7
6
5

S
S
S
G

D
D
D
D

10U_1206_16V4Z

8
7
6
5

C599

C601

+5V
U23

+2.5VS

+5VALW
+3VALW

+3VALW TO +3V

R507
@470_0805_5%

R475
@470_0805_5%

S
C343

+3VALW
U9

1
2
3
4

SI4800DY_SO8

R474
100K_0402_5%
1
2

5VS_GATE
C345

+12VALW

SI4800DY_SO8

1
C805
0.1U_0402_16V4Z

S
S
S
G

C647
4.7U_0805_10V4Z

C648
1U_0805_25V4Z

+5VALW

+5VALW

C646
4.7U_0805_10V4Z

R502
10K_0402_5%

R501
10K_0402_5%

0.1U_0402_16V4Z

R758
10K_0402_5%

Q53
19,32,35,40,41,50,51,52,53 SUSP#
2N7002_SOT23

2
G

Q52
2N7002_SOT23

2
G

S
R759
10K_0402_5%

SYSON

40,43,51 SYSON

C640

SUSP

SUSP

19,53
D

5VS_GATE

SYSON#
SUSP
2
G
Q47
2N7002_SOT23

@1M_0402_5%

R473

0.1U_0402_16V4Z

C342

D
D
D
D

1
2
3
4

10U_1206_16V4Z
2

+5VS
U45

8
7
6
5

Q80
@AOS 3400_SOT23

+5VALW

1U_0805_25V4Z

S
S
S
G

D
D
D
D

2
G

8
7
6
5

10U_1206_16V4Z

C344

2 SUSP
G
Q54
@2N7002_SOT23

2 SUSP
G
Q48
@2N7002_SOT23

+5VALW TO +5VS

+3VS

+3VALW TO +3VS
+3VALW

+3VALW

+3VALW

+3V

+2.5V TO +2.5VS
+2.5V

C807
0.1U_0402_16V4Z

C808
0.1U_0402_16V4Z

1
C809
0.1U_0402_16V4Z

C193

C194

SI4800DY_SO8

C192
4.7U_0805_10V4Z

4.7U_0805_10V4Z

1U_0805_25V4Z

14

U61B

14
P

2
1

0.1U_0402_16V4Z

3
O 2
+3VALW POWER
SN74LVC14APWLE_TSSOP14

I
G

U61A

C806
0.1U_0402_16V4Z

0_0402_5%

S
S
S
G

1
2
3
4

D
D
D
D

C781

R699

U3

8
7
6
5

+2.5VS
3

V_ON
O 4
+3VALW POWER
SN74LVC14APWLE_TSSOP14

51

5VS_GATE

+3VALW POWER
+3VS

0.1U_0402_16V4Z

+3VALW

+3VALW

C170

14

O
+3VALW POWER
SN74LVC14APWLE_TSSOP14

O
G

U61D

U61C

14

R700
0_0402_5%

VS_ON

51,52,53

+3VALW POWER
SN74LVC14APWLE_TSSOP14

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
PROPRIETARY TRADE
NOTE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A

POWER CONTROL CKT


Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
E

42

of

57

RTC Battery

FAN CONN. 1

+5VALW

VS

1
2

C692

ACES_85205-0400

11

O
+3V POWER

+3V POWER

CHGRTC

14

U55E
SN74LVC14APWLE_TSSOP14
O 10

C607

SYS_PWROK 7,24

0.1U_0402_16V4Z

1
2
3
4

1N4148_SOT23

1
R529

JP25

@0.1U_0402_16V4Z
D8

+3VS

U55D
SN74LVC14APWLE_TSSOP14

180K_0402_5%

FAN1

2
8.2K_0402_5%

+RTCVCC

R587

1SS355_SOD323

14

LM358A_SO8

1
1
R210

Q71
E

C782

2
B
2

BAS40-04_SOT23

+3V

R705
100_0402_5%

R211
10K_0402_5%

+3V

EN_FAN1

OUT

C287
10U_1206_16V4Z

1
1

-IN

FMMT619_SOT23

D7

+IN

D27

+3VS

8
P
2

40 EN_DFAN1

EN_DFAN1

+RTCBATT

+RTCBATT

RTCBATT

Power ON Circuit

U7A

1
2
C303
0.1U_0402_16V4Z
1

BATT1

R588

1U_0805_25V4Z

100K_0402_5%

2
10K_0402_5%

40 FAN_SPEED1

@1000P_0402_50V7K
1

C791

FAN CONN. 2

+5VALW

C792
1000P_0402_50V7K

+3VS

1
R541

2
10K_0402_5%
1

44 S4_LID_SW#

+12VALW

@1000P_0402_50V7K
1

RB751V_SOD323

0.1U_0402_10V6K
2

ON/OFFBTN# 44,46

1N4148_SOT23

2
1U_0603_10V6K

1
2
R268
U19
10K_0402_5%
NC7SZ14M5X

Q17
2N7002_SOT23

2
G

Q18
2N7002_SOT23

C794

2
G

40,42,51 SYSON

1000P_0402_50V7K

Q16
2N7002_SOT23

2
G

40 FAN_SPEED2

C406
1

1
D15

C793

680K_0402_5%

1
C411

ACES_85205-0300

FAN CONN. 3

100K_0402_5%

D13

1
2
3

1N4148_SOT23

2
8.2K_0402_5%

1
R201

100K_0402_5%

R270

JP23
D5

R271

R275

1SS355_SOD323

FAN2

0.1U_0402_16V4Z

C256

C249
10U_1206_16V4Z

D3

Q10

FMMT619_SOT23

RTCVREF

LM358A_SO8

2
B

RTCVREF

R202
10K_0402_5%

EN_FAN2 1
2
R200
100_0402_5%

OUT

-IN

+IN

RTCVREF RTCVREF

EN_DFAN2

40 EN_DFAN2

U7B

1
2
B

R707

FMMT619_SOT23

41

C257

D4

Q12

S4_LATCH
RTCVREF

10U_1206_16V4Z

1
2
R274
1
10K_0402_5%
C413

D6

+3VALW

JP22

1
2
3

1N4148_SOT23

1SS355_SOD323

Q73
2N7002_SOT23

40

2
1U_0805_16V7K

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

RTCVREF
C405
1

0.1U_0402_10V6K
2

74LCX74

D_SET_S4

Q19
2N7002_SOT23

2
G

RB751V_SOD323

ACES_85205-0300

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

14
13
12
11
10
09
08

D14

S4_SATA

1
2
3
4
5
6
7

S
C795
1000P_0402_50V7K
C779

1
R695

2
10K_0402_5%

D40

4.7U_0805_10V4Z

R696
100K_0402_5%

C260

@100_0402_5%

FAN_DET 40

RB751V_SOD323

R205

2
@0_0402_5%

+5V

EN_FAN2 1
R207

1
2
R276
10K_0402_5%

@1U_0805_16V7K

C780
0.1U_0402_16V4Z

Compal Electronics, Inc.

FAN2-1

2
G
3

EN_DFAN3

2
40 EN_DFAN3

Q69
2SA1036K_SOT23

1
C412

U20

D38
1N4148_SOT23

10K_0402_5%

1
2
R273
10K_0402_5%

+5VALW

R681
10K_0402_5%

+3VALW

2 2

RTCVREF

R679
10K_0402_5%

+5VALW

Title

0.1U_0402_16V4Z

Power OK/Reset/RTC battery/Lid Switch/Int. KB


Size

Document Number

Rev
0.3

Sapporo 300P
Date:
A

, 01, 2003

Sheet
E

43

of

57

LID Switch
43 S4_LID_SW#
LID_SW#

46 CIR_LID_SW#

DAN202U_SC70

+3VALW

2
R656

INTERNET_BTN#

SW1

2INTERNET#
1

INTERNET_BTN#
EMIAL_BTN#

DAN202U_SC70

1
100K_0402_5%

D1
@DAN217_SOT23

+3VALW
KSI4
KSO17

40
41,45

2
HORNG CHIH

JP6

INTERNET# 40

51ON#

40

Button FPC Conn.

D10
D2
LID_SW# 2

6
5
4
3
2
1

TV_OUT_EN#
KSO17

D11

+3VALW

EMIAL_BTN#

EMAIL#

51ON#

(DIFFERENT BETWEEN MPU-101-81A)

EMAIL#

ACES_85201-0605

40

DAN202U_SC70

1
JOPEN

1
JOPEN

+5VS

Power Button
2

+5V

+3VALW
J2

J3

R560

Q42
DTA114YKA_SOT23

47K

1
51ON#

ON/OFF

40

51ON#

45,47

DAN202U_SC70

RLZ20A_LL34

Power FPC Conn.

+5VS

D
Q55

1 WL_BTLED#
200_0402_5%

22K
B

1
2 2
R555
33K_0402_5%
Q58 22K
DTC124EK_SOT23

2
G

2
R466

D34

EC_ON

WL_BT_LED# 41

1000P_0402_50V7K

40,46

WL_BT_LED#

C687
R554
4.7K_0402_5%

EC_ON

1 CD_FDDLED#
200_0402_5%

2
R465

+3VALW

2
10K

ON/OFFBTN# 1

43,46 ON/OFFBTN#

CD_FDD_LED# 41

10K

D33

CD_FDD_LED#

Q43
DTA114YKA_SOT23

47K

100K_0402_5%
C

47K

Q13
DTA114YKA_SOT23
B

2N7002_SOT23 S

HDD_LED#

2
C

HDD_LED# 41

10K

ACES_85201-1405
R215

+5VS

200_0402_5%
HDDLED#
1
200_0402_5%

2
R216

45 POWER_ON_LED

WL_BTLED#
1
SDLED#
CD_FDDLED#
HDDLED#
ON/OFFBTN#
POWER_ON_LED

+5VALW
45 PWR_SUSPLED#_1

14
13
12
11
10
9
8
7
6
5
4
3
2
1

14
13
12
11
10
9
8
7
6
5
4
3
2
1

JP4

SDLED

SDLED

1
28
A

SDLED#

2
G

Q56
2N7002_SOT23

Compal Electronics, Inc.


Title

Switchs & Connectors


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B

Document Number

Date:

, 01, 2003

Rev
0.3

Sapporo 300P
Sheet
1

44

of

57

BATT_CHGILED#

BATT_LOWLED#

R294

R297

47K

1 2

PWRLED#

DTC115EKA_SOT23
Q28

100K

100K

100K

BATT_LOW_LED#

BATT_LOW_LED# 41

R295

DTC115EKA_SOT23
Q30

200_0402_5%

C772 1U_0805_25V4Z
2
1

100K

G
1
R672

+5VALW

2
470K_0402_5%
2
100K_0603_1%

-IN

+IN

2N7002_SOT23
R673

LM358A_SO8
U60A

2
R293

1PWR_SUSPLED#
200_0402_5%

2
R678

1
200_0402_5%

BATTERY CHGI/LOW LED

EMAIL LED

D37
PWR_SUSPLED#_1 44

C773 1U_0805_25V4Z
2
1

OUT

LED FPC Conn.

100K_0603_1% RB751V_SOD323

POWER/SUSP LED

+5VALW

JP12

C775

+5VALW

ACINLED#
PWRLED#
PWR_SUSPLED#
BATT_LOWLED#
BATT_CHGILED#
EMAILLED#

0.1U_0402_16V4Z

1
2
3
4
5
6
7
8
9
10

ACINLED#

2
R298
200_0402_5%

1
C

2 AC IN
G
Q32
2N7002_SOT23

1
R671

Q29

2
G

PWR_LED#

PWR_LED#

41

EMAILLED#

BATT_CHGI_LED# 2

PWR_SUSP_LED# 41

EMAIL_LED# 41

10K

2 1

41 BATT_CHGI_LED#

R646

200_0402_5%

R296

200_0402_5%

Q31
DTA114YKA_SOT23
B

2EMAIL_LED#
C

200_0402_5%

1 2

200_0402_5%

+5V
POWER_ON_LED

44 POWER_ON_LED

ACIN

24,40,47

ACES_85201-1005

CDON_LED#

41 CDON_LED#

3
Q21
DTA114YKA_SOT23

E
41 MP3_LED#

MP3_LED#

10K

U60B

2
C

+IN

-IN

OUT

11

U61E

R282

LM358A_SO8

O 10
+3VALW POWER
SN74LVC14APWLE_TSSOP14
B

200_0402_5%

200_0402_5%

+5VALW POWER

Touch Pad Connector

R283

2 1

2 1

10K

47K

14

47K

Q20
DTA114YKA_SOT23

ACIN LED

+5VCDS

+5VCDS

MODE#

40 MODE#

+3VALW

1N4148_SOT23

100P_0402

D_MODE#
R_CDON_LED#
R_MP3_LED#
KSO17
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#

C783
C784
C785
C786
C787
C788
C789
C790

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z

41,44
40
40
40
40

KSO17
KSI0
KSI1
KSI2
KSI3

D_MODE#
R_CDON_LED#
R_MP3_LED#
KSO17
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#

14
13
12
11
10
9
8
7
6
5
4
3
2
1

14

O
G

D43
@DAN217_SOT23

14
13
12
11
10
9
8
7
6
5
4
3
2
1

2
1

TP_CLK

2
1
3

C811
@180P_0402_50V8J
TP_DATA
C812
@180P_0402_50V8J

U68B

+5VS

6
5

12

+3VALW POWER
SN74LVC14APWLE_TSSOP14

U67B

SN74LVC125APWLE_TSSOP14

(+5VS)

(+3VALW)
A

SN74LVC08APW_TSSOP14

2
D44
@DAN217_SOT23

Compal Electronics, Inc.


Title

JP11

U61F

1U_0603_10V6K

Switchs & Connectors


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

13

SN74LVC125APWLE_TSSOP14
+3V POWER

ACES 85201-0602_6P

ACES_85201-1405

D_MODE#

11

D17

C347

OE#

1N4148_SOT23

C810
180P_0402_50V8J

14

CDPLAY Board Conn.

1
1

U51D

D16
51ON#

44,47 51ON#

+5VS

12

1
2
3
4
5
6

OE#

TP_CLK
TP_DATA

TP_CLK
TP_DATA

40
40

R_MP3_LED#

13

JP8
R_CDON_LED#

Size
B

Document Number

Date:

, 01, 2003

Rev
0.3

Sapporo 300P
Sheet
1

45

of

57

H24
SCREW 8.5x3.0

H21
SCREW 8.5x3.0

H22
SCREW 8.5x3.0

Q33
SI2301DS 1P_SOT23

C445

1U_0603_10V6K

H11
SCREW 8.5X2.8

H12
SCREW 8.5X2.8

1
R300

H17
SCREW 8.5X2.8

H18
SCREW 8.5X2.8

H16
SCREW 8.5X2.8

H19
SCREW 8.5X2.8

1
2
R284
100K_0402_5%
2
24,40 EC_RSMRST#
G

H29
SCREW 8.5x3.0

H30
SCREW 8.5x3.0

2
@10P_0402_50V8K

X2

R675

2
@10P_0402_50V8K

1
C758

H33
SCREW 8.5X2.8

H36
SCREW 8.5X2.8

H37
SCREW 8.5X2.8

H34
SCREW 8.5x3.0

H35
SCREW 8.5x3.0

2
0_0402_5%
CIR_RCRST#

C447
0.1U_0402_16V4Z
+5V_CIR

Q23
2N7002_SOT23

CIR_RCVEN
CIR_RCRST#
CIR_URXD
CIR_USCLK

H42
SCREW

2
+5V_CIR
@10K_0402_5%

1
R291

2
0_0402_5%

CIR_RCVEN
CIR_UTXD

P00
P01
P02
P03

20
19
18
17

P10
P11
P12/CNTR
P13/INT

16
15
14
13

CIR_UTXD

D0
D1

12
11

CIR_URXD
CIR_USCLK

1
R301

XIN

1
R290

XOUT

RESET#

1
2
3
4

7
8

P21/AIN1
P20/AIN0

9
10

D3/K
D2/C

CNVSS

VDD

VSS

C446

1U_0805_25V4Z

+5V_CIR

8
7
6
5

+5V_CIR
41 CIR_GATING#

1
2
@10K_0402_5%

40

EC_UTXD

EC_UTXD

10K_0402_5%

10K_0402_5%

2 2

1
2
3
4
5
6

CIR_GATING#

R670

1
R285

2 2

+3VALW

JP13
RCIRRX

Q67
100K

R650

CIR Reciever Board Conn.


+5V_CIR

Q25
2N7002_SOT23

DTC115EKA_SOT23

100K

R677
47K_0402_5%

+3VALW

H47
SCREW

0.1U_0402_16V4Z

H46
SCREW

2
G

C774

M34501M4-XXXFP

R286
H45
SCREW

2
0_0402_5%

H44
SCREW

+5V_CIR

+5V_CIR

10K_1206_8P4R_5%

H43
SCREW

2
1
R657
@10K_0402_5%

ON/OFFBTN# 43,44

RC_ON/OFFBTN

RP86
H41
SCREW

1U_0805_25V4Z

H40
SCREW

Q22
DTC115EKA_SOT23

P2
C443

2
1
R676

RCIRRX

H39
SCREW

MIC2951

@1M_0603_5%

2
C

H32
SCREW 8.5X2.8

8
7
6
5

IN
FB
TAP
ERR#

U25

3
4MHZ_30PF_6W04000042

H31
SCREW 8.5X2.8

OUT
SNS
SHDN
GND

H28
SCREW 8.5x3.0

Q24
2N7002_SOT23

H27
SCREW 8.5x3.0

H26
SCREW 8.5x3.0

2
G

P2

H20
SCREW 8.5X2.8

1
C757
H25
SCREW 8.5x3.0

2
10K_0402_5%

H15
SCREW 8.5X2.8

1
2
3
4

2
100K_0603_5%

44 CIR_LID_SW#

H14
SCREW 8.5X2.8

P2

H13
SCREW 8.5X2.8

1
R289

40,44

U24

H10
SCREW 8.5X2.8

EC_ON

C442
1U_0603_10V6K

H9
SCREW 8.5X2.8

H8
SCREW 8.5X2.8

H7
SCREW 8.5X2.8

H6
SCREW 8.5X2.8

+5VALW

2
1
2
C444 1U_0603_10V6K
1
2
R299
100K_0603_5%

H5
SCREW 8.5X2.8

+5V_CIR

H23
SCREW 8.5x3.0

H4
SCREW 8.5X2.8

H3
SCREW 8.5X2.8

H2
SCREW 8.5x3.0

100K

H1
SCREW 8.5x3.0

100K

3
1 CIR_UTXD
Q26
MMBT3904_SOT23

41

EC_RCVEN

+3VALW

2
10K_0402_5%

MMBT3904_SOT23

CIR_GATING#

1
R287

CIR_RCVEN

Q64

ACES_85201-0605

10K_0402_5%

40

EC_URXD

EC_URXD

2
D18

CIR_URXD

R651

EC_USCLK

2
10K_0402_5%
EC_USCLK

2
D19

41

CIR_USCLK

EC_RCRST#

3
Q65

10K_0402_5%

CIR_RCRST#

MMBT3904_SOT23
A

RB751V_SOD323

Compal Electronics, Inc.

1
FD5
FIDUCAL

FD6
FIDUCAL

Title
CIR & Screws
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FD4
FIDUCAL

FD1
FIDUCAL

1
FD3
FIDUCAL

FD2
FIDUCAL

CF21
CF27
CF23
CF24
CF22
CF26
CF25
CF28
CF2
CF4
CF12
CF17
CF1
CF3
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

40

1
R292

2 2

RB751V_SOD323
+3VALW

CF5
CF11
CF8
CF20
CF7
CF14
CF6
CF9
CF13
CF10
CF15
CF18
CF16
CF19
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

Size
B

Document Number
Sapporo 300P

Date:

, 01, 2003

Rev
0.3
Sheet
1

46

of

57

VS

1
PR1

1
2
C8B BPH 853025_2P

2
8

20K_0603_1%

LM393M_SO8

PD2

49,50

PR7
10K_0603_5%

0.1U_0603_25V7K

10K_0603_5%

VIN

PACIN

RLZ4.3B_LL34
PR8

1000P_0603_50V7K

24,40,45
1

PACIN

PC6

ACIN

PR6

PC5

SINGA_2DC-G313B200

2
22K_0603_5%

1
PR5

100P_0603_50V8J

1
2
PR4
1K_0603_5%

PU1A

1000P_0603_50V7K

84.5K_0603_1%
PC4

PC3

EC10QS04_SOD106 1000P_0603_50V7K 100P_0603_50V8J

PC2

PC1

5.6K_0603_5%

PD1

G
G
G
G

6
5
4
3

PR2

VS

PR3

2
1M_0603_1%

PCN1

VIN

PL1

VIN
PF1
12A_65VDC_451012
1
2

Vin Detector

RTCVREF

3.3V

High 18.764 17.901 17.063


Low 17.745 16.903 16.038

PD3

1N4148_SOD80
PD4

BATT+

RB751V_SOD323

PR9

VS

33_1206_5%

1
2
PR10
1K_1206_5%

2
3

1
PQ1
TP0610T_SOT23

PD5

0.22U_1206_25V7K

VIN
PC8
0.1U_0603_25V7K

N3

1
2
PR12
1K_1206_5%

1N4148_SOD80

B+

100K_0603_5%

PC7

PR13

1
2
PR11
200_0603_5%

N1

CHGRTCP

1
PR14

51ON#

2
22K_0603_5%

1
2
PR15
1K_1206_5%
1

44,45

RTCVREF

PR16

49

ACON

RB715F_SOT323

1
5

2
10K_0603_5%

PD8

PC12

PC13

PR22

RLZ16B_LL34

LM393M_SO8

PR21

PC11
499K_0603_1%

0.1U_0603_16V7K

1000P_0603_50V7K

PJP1

PR23
215K_0603_1%

1000P_0603_50V7K

RLZ6.2C_LL34

1U_0805_25V4Z

PD7

48,50 MAINPWON

PON
PD6

PC10
10U_1206_10V4Z

PC9

GND

200_0603_5%

PR19
499K_0603_1%

PU1B

N2

1
1M_0603_1%

IN

2
PR18

OUT

6.0V

2
3

2
10K_0603_5%

200_0603_5%

1
PR17

VS

200_0603_5%

CHGRTC

3.3V

PR20

PR200

PU2
S-812C33AUA-C2N-T2_SOT89

RTCVREF

3.3V

JUMP_43X118
+2.5V

(12A,480mils ,Via NO.=24)

PJP3
+5VALWP

JUMP_43X118
PJP4
+1.25VSP

+1.25VS(1.5A,120mils

,Via NO.= 6)

(6A,240mils ,Via NO.= 12)

JUMP_43X118
PJP5
PJP6
+CPUVIDP

+CPUVID

(150mA,40mils ,Via NO.= 2)

+3VALWP

PQ2 D
2N7002_SOT23

+5VALW

Precharge detector
15.34
15.90
16.48
13.13
13.71
14.20

2
G

PACIN
1
47K_0603_5%

2
PR24

JUMP_43X118

PJP2

+2.5VP

PQ3
DTC115EKA_SOT23

+3VALW

100K

JUMP_43X118

+5VALWP

JUMP_43X39

PJP7
+1.5VSP

+1.5VS

(6A,240mils ,Via NO.= 12)

JUMP_43X118

PJP8
+VGA_COREP

+12VALWP

+VGA_CORE
4

JUMP_43X118

PJP9

100K

(6A,240mils ,Via NO.= 12)

+12VALW

(300mA,20mils ,Via NO.= 1)

JUMP_43X39

(5A,200mils ,Via NO.= 10)


PJP10

+1.25VS

+VTT_GMCHP

PJP11

+1.25VSFBVTT (150mA,40mils

JUMP_43X118

,Via NO.= 2)

+VTT_GMCH

JUMP_43X79

(1.2A,60mils ,Via NO.= 3)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
C

Compal Electronics, Inc.


DCIN & DETECTOR
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

47

of

57

PH1 under CPU botten side :


CPU thermal protection at 84 degree C
Recovery at 45 degree C
1

VL

VS

VL

VMB

SUYIN_200275MR009G116ZL_RV

100_0603_5%

MAINPWON 47,50

PR31
1
2
16.9K_0603_1%
TM_REF1

1K_0603_5%

47K_0603_1%

0.01U_0603_50V7K

PR32
100_0603_5%

1000P_0603_50V7K

PC16

3
2

1
PR30

PC15

PR25

PC14
0.1U_0603_25V7K

PR29

2
47K_0603_5%
2

1
PR27

+3VALWP

15A_65VDC_451015

10KB_0603_1%_TH11-3H103FT
PH1

BATT+

PL2
1
2
C8B BPH 853025_2P

1
1K_0603_5%

2
PR26

PF2

ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA

GND
GND

1
2
3
4
5
6
7
8
9

10
11

BATT+
BATT+
ID
B/I
TS
SMD
SMC
GNDGND-

PCN2

PQ4
PD10

100K
DTC115EKA_SOT23

1SS355_SOD323
100K

LM393M_SO8

1
2
PR28
47K_0603_1%
PU3A
O 1

PC17

PR33

40
0.22U_0805_16V7K_V2

2
25.5K_0603_1%

PR34
2
1
VL
100K_0603_1%

3.32K_0603_1%

+3VALWP

1
PR35

ALI/MH#

PD9
@ BAS40-04_SOT23

PD11
@ BAS40-04_SOT23

PR36
PC18
100K_0603_1%

PR37
1K_0603_5%

1000P_0603_50V7K

1
2

BATT_TEMPA 40
EC_SMB_DA1 40,41

EC_SMB_CK1 40,41

PH2 near main Battery CONN :


BAT. thermal protection at 79 degree C
Recovery at 45 degree C

PD12
@ BAS40-04_SOT23

PD13
@ BAS40-04_SOT23

VL

VL

PH2

PR38
47K_0603_1%

PR39
1
2
47K_0603_1%

PU3B
PD14

2
14.7K_0603_1%
TM_REF2

1
1SS355_SOD323

LM393M_SO8

PC19

1
PR40

+5VALWP

10KB_0603_1%_TH11-3H103FT

PR42
PR41
3.48K_0603_1%

2
PC20

VL

100K_0603_1%
PR43
100K_0603_1%

0.22U_0805_16V7K_V2

1000P_0603_50V7K
4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


BATTERY CONN / OTP
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

48

of

57

P3

PC22
4.7U_1210_25V6K

PC23
4.7U_1210_25V6K

SI4825DY_SO8

PR47

23

+INE2

CS

22

-INE2 VCC(o)

21

FB2

OUT

20

VH

19

VCC

18

0_0603_5%

PC27
PR55
2 1
2
5
10K_0603_5%
4700P_0603_50V7K
6

PC29

PC30
PR56
1
2 1

0.1U_0603_16V7K

2
205K_0603_1%

FB1

2
PR60

-INE1

RT

17

+INE1

-INE3

16

OUTC1

FB3

15

OUTD

CTL

14

+INC1

13

1
10
10K_0603_5%

PC33

11

0.1U_0603_16V7K

40

LXCHRG

1
2
PC28
0.1U_0603_25V7K

1
PR57
68K_0603_5%

ACOFF

1
2
PC31
0.1U_0603_25V7K
2

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)
PL4

PR61
PC32
1
2
1
2
47K_0603_5%
1500P_0603_50V7K
ACON

4.7U_1210_25V6K

PR59

22UH_SPC-1204P-220_2.9A_20%

BATT+

0.02_2512_1%

-INC1

PD16

PC34

RB051L-40_SOD106

PC35

PC36

100K
MB3887_SSOP24

12

100K_0603_1%
PQ11
DTC115EKA_SOT23

PR62

100K

CS

2
7
1K_0603_5%

100K

0.1U_0603_25V7K

VREF

PQ9
DTC115EKA_SOT23

PC25
1
2

1000P_0603_50V7K

+3VALWP
PR63
47K_0603_5%

CS

N18

1
2
1
PR58

IREF

0.1U_0603_16V7K

PQ8
SI4835DY_SO8
PC24
0.022U_0603_25V7K
1
2

OUTC2 GND

33.2K_0603_1%
10K_0603_1%

VIN

PR54

2
47K_0603_5%

5
6
7
8

PR53

PC26

40

24
2

2N7002_SOT23

2
G

IREF=1.31*Icharge
IREF=0.73~3.3V

+INC2

PQ10

ACON

ACON

1
100K_0603_5%

47

-INC2

2
PR51

PACIN 1
2
PR52
3K_0603_5%

10K_0603_5%
PR50

1SS355_SOD323

PACIN

ADP_I

PU4
40,53

150K_0603_1%

PR48

3
2
1

PR49
PD15
ACOFF#1

ACOFF#

47,50

SI7447DP_SO8

4.7U_1210_25V6K

PC21

0.01_2512_1%(2W)

D
D
D
D

1
2
3

200K_0603_1%

10K_0603_5%

S
S
S
G

PL3
1
2
C8B BPH 853025_2P

PR46

SI4825DY_SO8

PR44

8
7
6
5

PR45

S
S
S
G

1
2
3
4

D
D
D
D

PQ7

PQ6

1
2
3
4

B++

B+

PQ5

8
7
6
5

Iadp=0~5.8A

P2

VIN

100K
PQ12
DTC115EKA_SOT23
40

FSTCHG

4.7U_1210_25V6K

100K
PR64
100K

4.7U_1210_25V6K

PR65

4.2V

47.5K_0603_0.1%

143K_0603_0.1%

VMB

PR66
340K_0603_1%

OVP voltage : LI
2

4S3P : 17.4V--> BATT_OVP= 1.935V


1

(BAT_OVP=0.1111 *VMB)
PR67
499K_0603_1%

P
1

PU5A
3

0
-

LM358A_SO8

40 BATT_OVP

+5VALWP

2.2K_0603_5%

PR68

PC38
0.01U_0603_50V7K

105K_0603_0.5%

PR69

@ 0.1U_0603_16V7K

PC37

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


CHARGER
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

49

of

57

PC39
4.7U_1210_25V6K
1
2

N4

PD17

PC40

PD18

PQ13
PDH31

8
7
6
5

1
PR71
1_0603_5%
PLX3

PD19

0.1U_0603_25V7K
VL

1SS355_SOD323

PC45

PC49

PQ14
4.7U_1206_16V4Z
PR72
PDH5

10UH_SPC-1205P-100_4.5A_20%

21

2
PC55

+5VALWP

4.7U_1206_16V4Z

MAX1632_SSOP28

PR79
10.5K_0603_1%

PC58
+
+
PC57
PD21
150U_D2E_6.3VM_R18
EP10QY03
2
2
@ 150U_D2E_6.3VM_R18

PC59
100P_0603_50V8J

1
PR81

0.012_2512_1%

2.5VREF

PR80

PC56
680P_0603_50V8J

PR76
2M_0603_5%

RUN/ON3

PR75

TIME/ON5

VL

V+

7
28

47P_0603_50V8J
CSH5

PLX5

PON

10K_0603_1%

CSH3
CSL3
FB3
SKIP#
SHDN#

PC51

100P_0603_50V8J

PC54

1
2
3
10
23

8
7
6
5

SI4814DY_SO8

1
2
PR201
10K_0603_5%

PR78

LX3
DL3

19,32,35,40,41,42,51,52,53 SUSP#

PC53
EP10QY03
@ 150U_D2E_6.3VM_R18

1
2
PR77
@ 10K_0603_5%

47,49

PACIN

PD20

PC52

150U_D2E_6.3VM_R18
2

3.57K_0603_1%

DH3

26
24

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

PDL5

4
5
18
16
17
19
20
14
13
12
15
9
6
11

CSH3

27

1M_0603_1%

0.012_2512_1%

PDH51

1
2
3
4

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

PR73

BST3

GND

1
PR74

25

22

PU6

2
1_0603_5%

+3VALWP

PC46
4.7U_1210_25V6K

@ 4.7U_1210_25V6K

PDH3

47P_0603_50V8J

PC48
0.1U_0603_25V7K

PDL3
PC50

PC47
4.7U_1206_16V4Z

+12VALWP

SI4814DY_SO8

PL6

B+++

4.7U_1210_25V6K

DAP202U_SOT323

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

10uH_SDT-1205P-100-118_5A_20%

PC44
1
2

1
2
3
4

PT1

VS

1
2

PC43

@ 4.7U_1210_25V6K

PC42

HCB4532K-800T90_1812

B+

EC11FS2_SOD106

1 FLYBACK
22_1206_5%

SNB 2
PR70

0.1U_0603_25V7K

470P_0805_100V7K

BST51

BST31

B+++

PL5

PC41

47K_0603_5%

PR82
B

VL

10K_0603_1%

PC60

+5V Ipeak = 6.66A ~ 10A

0.047U_0603_16V7K

+3.3V Ipeak = 6.66A ~ 10A

2
1
PR83
47K_0603_1%

MAINPWON 47,48
PC61
0.047U_0603_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


5V/3.3V/12V
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

50

of

57

+2.5V/+VTT_GMCHP
PL7

PC69

B+

PR84
0_0603_5%

HCB4532K-800T90_1812
1

4.7U_1210_25V6K

+5VALWP

LX1
DL1

PR89

28
1

CS1
OUT1

FB1

11

ON1

BST2
DH2
LX2
DL2
CS2

19
18
17
20
16

OUT2
FB2
ON2

15
14
12

D
D
D
D
4
3
2
1

G
S
S
S

PC72

5
6
7
8

21

1
+

PD28

+ PC73
EP10QY03

PD23

220U_D2_4VM 220U_D2_4VM
2
2

EC31QS04

4
PQ16
FDS6672A_SO8

PR92
15K_0603_1%

4.53K_0603_1%

VDD

+2.5VP

DH1

27
24

2
1
PC71
0.1U_0603_25V7K

26

BST1

+2.5V
PL8
2.2UH_SPC-1205P-2R2B_13A_30%
1
2

PC76
+ 150U_D2E_6.3VM_R18

22

PU7

25

UVP

PC70
1

VCC

PR86
3_0603_5%
1
2

PR87
3_0603_5%
1
2

3
2
1

1
2

SI4814DY_SO8

0.1U_0603_25V7K

PD27
EP10QY03

20_0603_5%
PC68
1U_0603_10V6K

+VTT_GMCHP

8
7
6
5

V+

PL9
5UH_SPC-06704-5R0_2.9A_30%
1
2

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

PC64
4.7U_1210_25V6K

5
6
7
8
PR85
2

PQ17

+1.45V/+1.225V

PQ15
IRF7811A_SO8

DAP202U_SOT323

1
2
3
4

PC63

4.7U_1210_25V6K

4.7U_1210_25V6K

1U_0805_25V4Z

PC62

4.7U_1206_16V4Z

PC66

PC65

PD22

24,53,54

VGATE

PR207
@ 0_0603_5%

PR203
0_0603_5%

PR97
PC79
0.22U_0805_16V7K_V2

GMCH_SEL=0 PRESCOTT

VTT_GMCH=1.225V

OCP 1.92A ~ 3.71A

GMCH_SEL=1 NORTHWOOD

VTT_GMCH=1.45V

OCP 1.98A ~ 3.78A

SYSON

40,42,43

2
PR95

1
0_0603_5%

V_ON

42

PR93
10K_0603_1%

PR98
3

100K_0603_1%

100K_0603_1%

1
@ 0_0603_5%

PR100
220K_0603_1%
2
1

PR202
@ 0_0603_5%

REF
10

23

PR206
0_0603_5%

2
PR94

PR99
42.2K_0603_1%
2
1

ENLL

13
3

5,54

MAX1845EEI_QSOP28

ILIM2
ILIM1

7
5

2
1
1
2
G
PQ23
2N7002_SOT23

PR91
@ 0_0603_5%

PR96
10K_0603_1%

GMCH_SEL

54

PR88
10K_0603_1% 19,32,35,40,41,42,50,52,53 SUSP#

SKIP

PGOOD
TON
GND

1
2
@ 0_0603_5%

OVP

VS_ON

42,52,53

PR90

2.5V OCP

11.84A ~ 21A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


DDR_2.5V/VTT_GMCH
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

51

of

57

PL10

PC82
4.7U_1210_25V6K

PC83
4.7U_1210_25V6K

+5VALWP

0_0603_5%

PR101

PC81
4.7U_1210_25V6K

4.7U_1210_25V6K

B+

HCB4532K-800T90_1812

PC80

PC84

1U_0805_25V4Z

PC85
4.7U_1206_16V4Z

DAP202U_SOT323

PD24

+1.5V

PR102

1845VCC 2
1
PC87
1U_0603_10V6K 20_0603_5%

+1.5VSP

PQ18

MAX1845EEI_QSOP28

2K_0603_1%
4700P_0603_50V7K

13
3

ILIM2
ILIM1

1
PR109

2 VS_ON
0_0603_5%

PC157
2200P_0603_50V7K

PR114
10K_0603_1%

1 SUSP#
@ 0_0603_5%

16.2K_0603_1%

PC95

PR119

PR118

16

100K_0603_1%

PR208

2
G
PQ20
S
2N7002_SOT23

@ 8.66K_0603_1%

100K_0603_1%

0.22U_0805_16V7K_V2

POWER_SEL

1 PR117

1
2
43K_0603_1%

100K_0603_1%

1.5V OCP 6.9A ~ 8.72A

2
PR112

PR204

470U_D2_2.5VM PD30
1
PC94
+ PC93
+
EP10QY03

@470U_D2_2.5VM
2
2

PR113

PC156

SI4308DY_SO14

PR108
86.6K_0603_1%
1
2
PR205

0_0603_5%

+VGA_COREP

PR1072

7
5

PL12
2.2UH_SPC-1205P-2R2B_13A_30%
1
2

PGOOD
TON

14
13
12
11
10
9
8

VS_ON

15
14
12

S1
S1
D2
D2
D2
D2
D2

VS_ON

ON1

OUT2
FB2
ON2

D1
D1
G1
G2
S2
S2
S2

42,51,53

11

REF

19,32,35,40,41,42,50,51,53 SUSP#

FB1

SKIP

10K_0603_1%

PR106
SUSP#
1
@ 0_0603_5%

CS1
OUT1

OVP

+1.2V/1.0V

PQ19

1
2
3
4
5
6
7

10

28
1

19
18
17
20
16

0.1U_0603_25V7K
2
1

LX1
DL1

VDD
BST2
DH2
LX2
DL2
CS2

PR104
3_0603_5%
1
2

27
24

PC89

21

DH1

UVP

BST1

26

VCC

25

3_0603_5%

5.1K_0603_1%

PR195

PU8

22

SI4814DY_SO8

PR103

V+

PC88
2
1
0.1U_0603_25V7K

GND

470U_D2_2.5VM
2
2

1
2
3
4

1
PC91
+ @ 470U_D2_2.5VMPR194
1

1
PC90
+

PD29
EP10QY03

G1
D1
S1/D2 D1
S1/D2 G2
S1/D2 S2

23

PL11
8
2.2UH_SPC-1205P-2R2B_13A_30% 7
1
2
6
5

NV36
POWER_SEL=1

VOUT=1.27V

POWER_SEL=0

VOUT=1V

OCP 7.1A ~ 13.5A

PR113=2K_0603_1%

OCP 7A ~ 13A

Unpop PR208

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


VGA_CORE/1.5V
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

52

of

57

1
PR120

2
1M_0603_1%

VL

t = -RC(1-Vb/Va)

+CPU_CORE

1
1

C759
0.33U_0805_10V7F

Vb

2
7

1
R702

2
0_0402_5%

CK409_PWRGD# 15
D

LM393M_SO8

R660
100K_0603_1%

PC98
1000P_0603_50V7K

PC99
10P_0603_50V8J

100K_0603_1%

PQ21
2N7002_SOT23

PU9A
LM393M_SO8

PR124

2
200K_0603_1%
2
10K_0603_1%

2
G

1
R658
1
R659

O
-

2
249K_0603_1%

1
PR123

2
3
64.9K_0603_1%
2

1
PR122

0.1U_0603_25V7K

ADP_I

VL

+3VS

H_PROCHOT# 5,7

PU9B

Va

PR121
PC97
365K_0603_1%

40,49

100K_0603_5%
R422

VS

145W THROTTLING
120W REVOVERY

+3VS

+CPU_CORE

1
R703
1
R704

24,51,54 VGATE

2
@0_0402_5%

Q70
@2N7002_SOT23

2
G

2
@0_0402_5%

+3VALWP

+3VALWP
PR125
0_1206_5%
C

PR126

1
2

PC101
4.7U_1206_16V4Z

PC92

100K_0603_5%

PC100
1U_0603_10V6K

PR110

5.1_0603_5%

0.1U_0603_16V7K

2
G

PR128

1K_0603_5%
19,42

1
PR196

SUSP

2
@ 0_0603_5%

100K_0603_5%
2

+1.25VSP

1
+

PC96
0.1U_0603_16V7K

1 PR129

0.1U_0603_16V7K
105K_0603_0.5%

CM3718_PSOP8
D

PL13
5UH_SPC-06704-5R0_2.9A_30%
1
2

8
7
6
5

PR115

PVIN
LX
PGND
VFB

FB_VDD+

PQ46
2N7002_SOT23
PC104

2
1
PR111
105K_0603_0.5%
1

+2.5VP

VIN
GND
SD
VREF

PU10

1
2
3
4

PC103
220U_D2_4VM

2
PC102
B

470P_0603_50V8J

REMOTE SENSE

@ 0_0603_5%

PR116
@ 499K_0603_1%

PQ22
2N7002_SOT23

PR199
42,51,52 VS_ON

2
G
1

PR198
19,32,35,40,41,42,50,51,52 SUSP#

2
0_0603_5%

1
PR197

0_0603_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
5

Compal Electronics, Inc.


DDR_1.25V/CLOCK THROTTLING
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
1

53

of

57

+5VALWP

+5VS

PR209
0_0402_5%

PR210
@ 0_0402_5%

+CORE_VCC

B+

PR130
80.6K_0603_1%

Battery Feed
Forward

34

33

0_0603_5%
2
1
PR136
@ 0_0603_5%

RAMPS

VID4
VID3
VID2
VID1
VID0
VID12.5

PGOOD

39

VGATE

PWM1

25

PWM1

55

ISEN1+
ISEN1-

24
23

ISEN1+

55

ISEN1-

55

DRSEN

PWM2

26

PWM2

55

27
28

ISEN2+

55

DSEN#

ISEN2+
ISEN2-

ISEN2-

55

PWM3

20

PWM3

56

ISEN3+
ISEN3-

21
22

ISEN3+

56

ISEN3-

56

ENLL

35

1
PR142

69.8K_0603_1%

9
PU5B
+ 5

GND

VDIFF
VSEN
VRTN

16
17
18

GND

OFS

40

NTC

PR146
2
0_0603_5%

+CPUVIDP

1
2

Place close to IC
0.1U_0603_16V7K
PC113

PQ26
2N7002_SOT23
2
G

2
D

51

2
G

GMCH_SEL

PC116
4.7U_1206_16V4Z

GND

4 BOOTSELECT

2 PR164 1
22K_0603_5%

PC114
1U_0603_10V6K

8.45K_0603_1%
3

2
1
PR159
0_0603_5%
PR160
2
1
@ 0_0603_5%

PR162
2
1
PQ27
0_0603_5%
2N7002_SOT23
2 PR163 1

PQ28
MMBT3904_SOT23

2
B

2
2.26K_0603_1%
PR153
1
2

3
PQ24
2N7002_SOT23

PR158
27K_0603_5% PR157
PR156
5.1K_0603_1%
340K_0603_1%

TP0610T_SOT23

1
PR150

PQ25

PR148
@ 0_0603_5%
2
1
PC111
@ 1000P_0603_50V7K

+CORE_VCC

ISL6247_MLFP40

+CPU_CORE

Remote
Sensing

VCCSENSE 5

Place near +VCC_CORE


output capacitor
VSSSENSE 5

@ 0_0603_5%

2
PR165
0_0603_5%

14

VR_ON

NC

1
1

MIC5258_SOT23-5
40

VR-TT#

EN

38

PG

13

Panasonic ERTJ0EV334J (0402)


Locate this NTC resistor on
PCB between phase 2 and 3
for thermal compensation.

@ 10K_0603_5%

OUT

FB

2
IN

DRSV

PR152
1.2M_0603_5%

1
2

PC115
4.7U_1206_16V4Z

37

1.2VDD

15

FS

NOW DISABLE THIS FUNCTION, POP 330K_0402_5%

PU12

56

COMP

ISEN4PR144
20K_0603_1%
2
1
1
2
PC108 1000P_0603_50V7K
2
1
PC110
@1000P_0603_50V7K

36

PH3
12
330K_0402_5%
19

2
2

PR151

VID_PWRGD

56

2
1

PC112

PR154
32.4K_0603_1%

220P_0603_50V8J

PR161
0_0603_5%

56

ISEN4+

PWM4

PR145
@ 0_0603_5%
1
2
+3VALWP

PR147
100K_0603_5%

+3VALWP

31
30
29

PR155
45.3K_0603_1%

PWM4

LM358A_SO8

PR149
10K_0603_1%

+CORE_VCC

ISEN4+
ISEN4-

DSV

24,51,53

2 PR139 1
@ 0_0603_5%

27.4K_0603_1%

PR143

Frequency Select

PC109
100P_0603_50V8J

SOFT

1U_0603_10V6K

475_0603_1%

11

OCSET

PR141
@ 0_0603_5%

10
PR138
@ 1K_0603_1%

PC107

PR140

PR137
@ 0_0603_5%

+5VALWP

15,24 STP_CPU#

H_VID5

ENLL

PR132
1
10K_0603_5%

VCC

1
2
3
4
5
6

5,51

PR135

H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

PR134
0_0603_5%

5
5
5
5
5

PU11

32

PR133
0_0603_5%

24 PM_DPRSLPVR

PC106
1U_0603_10V6K

PR131
@ 0_0603_5%

PR167

PR166
100K_0603_5%

100K_0603_5%

BOOTSELECT=1 PRESCOTT
4

BOOTSELECT=0 NORTHWOOD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


CPU_CORE_Controller
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

54

of

57

CPU_B+

PC117

G
S
S
S

PC118 +

22U_23V_M
2

5
6
7
8

4.7U_1210_25V6K
4.7U_1210_25V6K

PL14
2
B+
C8B BPH 853025_2P

PC119
22U_23V_M

2
1

+CORE_VCC

4
3
2
1

4
3
2
1

4.7U_1210_25V6K
+
PC121
PC122

PC120

PR168
3_0603_5%

PQ30

D
D
D
D

PQ29

D
D
D
D

5
6
7
8

0.22U_0805_16V7K_V2

G
S
S
S

IRF7811W_SO8

IRF7811W_SO8

PU13

PHASE

N6
PL15

PHASE1

PQ32
SI4362DY_SO8

G
S
S
S

PR172
68_0805_5%

PC126
220P_0603_50V8J

4
3
2
1

4
3
2
1

G
S
S
S

PQ31
SI4362DY_SO8

PC125

39K_0603_1%

1
0.01U_0603_50V7K

CPU_DRIVE_EN

PR173

12

ISL6207CB-T_SO8

0.6U_HK_AE26A0R6_26A_25%

5
6
7
8

LGATE

D
D
D
D

GND

0.1U_0603_16V7K

PC124
1U_0805_25V4Z

499K_0603_1%

EN

2
PR169
1 N5 2
0_0603_5%
8

BOOT

5
6
7
8

PC123

PR171

PWM UGATE

D
D
D
D

PR170
2
0_0603_5%

VCC

PWM1

54

N7

ISEN1ISEN1+

PH4
1

2
CPU_B+

PC129

PC128

4.7U_1210_25V6K
4.7U_1210_25V6K

4
3
2
1

4
3
2
1

IRF7811W_SO8

Local Transistor
Swtich Decoupling

PQ34

820B_0603_5%_ERAV33J821V

PC130
4.7U_1210_25V6K

D
D
D
D
G
S
S
S

PQ33

D
D
D
D

0.22U_0805_16V7K_V2

PR174
3_0603_5%

G
S
S
S

5
6
7
8

5
6
7
8

PC127

54
54
2

IRF7811W_SO8

PU14

PHASE

GND

LGATE

N9
PL16

PHASE2

ISL6207CB-T_SO8

PQ35
SI4362DY_SO8

4
3
2
1

PC131
1U_0805_25V4Z

G
S
S
S

PR176
499K_0603_1%

D
D
D
D

5
6
7
8

1
PQ36
SI4362DY_SO8

+CPU_CORE

0.6U_HK_AE26A0R6_26A_25%

EN

PR177
68_0805_5%
PR178

1 2

2
PR175
1 N8 2
0_0603_5%
8

BOOT

5
6
7
8

PWM UGATE

D
D
D
D

VCC

G
S
S
S

4
3
2
1

PWM2

54

PC132
220P_0603_50V8J

PC133

39K_0603_1%

1
0.01U_0603_50V7K

N10

54
54

ISEN2ISEN2+

PH5
1
820B_0603_5%_ERAV33J821V

Local Transistor
Swtich Decoupling

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


CPU_CORE_Power stage 1
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

55

of

57

CPU_B+
PC134

GND

LGATE

1
2

1
2

N12

PQ40
SI4362DY_SO8

1
0.6U_HK_AE26A0R6_26A_25%

PR182
68_0805_5%

4
3
2
1

4
3
2
1

G
S
S
S

D
D
D
D

PQ39
SI4362DY_SO8

G
S
S
S

ISL6207CB-T_SO8

PL17

IRF7811W_SO8

PHASE

IRF7811W_SO8

PR183

EN

4.7U_1210_25V6K

PR180
1
1N112
0_0603_5%
PHASE3
8

PC138
1U_0805_25V4Z

1
2

PWM UGATE

PC137

4.7U_1210_25V6K

5
6
7
8

PC136

BOOT

5
6
7
8

499K_0603_1%

VCC

D
D
D
D

PR181

PWM3

4
3
2
1

4
3
2
1

G
S
S
S

PU15

54

PC135
PQ38 @ 4.7U_1210_25V6K

D
D
D
D

D
D
D
D

PR179
3_0603_5%

PQ37

5
6
7
8

0.22U_0805_16V7K_V2

G
S
S
S

2
+CORE_VCC

5
6
7
8

PC140
220P_0603_50V8J

PC139

1
0.01U_0603_50V7K

39K_0603_1%

N13

ISEN3ISEN3+

CPU_DRIVE_EN

CPU_B+

ISL6207CB-T_SO8

D
D
D
D
G
S
S
S

4
3
2
1

G
S
S
S

PQ43
SI4362DY_SO8

PQ44
SI4362DY_SO8

0.6U_HK_AE26A0R6_26A_25%

LGATE

PL18

PR187
68_0805_5%
PR188

1 2

GND

Local Transistor
Swtich Decoupling

@ 4.7U_1210_25V6K

IRF7811W_SO8

5
6
7
8

PC144

N15

D
D
D
D

PHASE

PC143
4.7U_1210_25V6K

PC142

G
S
S
S

EN

PC145
1U_0805_25V4Z

PR185
1
1N142
0_0603_5%
PHASE4
8

BOOT

4
3
2
1

499K_0603_1%

PWM UGATE

5
6
7
8

PR186

VCC

+CPU_CORE

D
D
D
D

PWM4

54

4
3
2
1

4
3
2
1

IRF7811W_SO8

PU16

4.7U_1210_25V6K
PQ42

PH6
1

820B_0603_5%_ERAV33J821V

D
D
D
D

PQ41

G
S
S
S

5
6
7
8

0.22U_0805_16V7K_V2
PR184
3_0603_5%

5
6
7
8

PC141

PC147
220P_0603_50V8J

2
2

54
54

PC146

39K_0603_1%

1
0.01U_0603_50V7K

N16

54
54

ISEN4ISEN4+

PH7
2
820B_0603_5%_ERAV33J821V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


CPU_CORE_Power stage 2
Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet
D

56

of

57

PWR PIR LIST

DBQ02 PIR LIST


************* Rev0.1 PIR List **************

EVT

10/28/2003 Writen by Jason Shih


Change from DBQ01 LA-2041

page

P16:New add R749, R750, R751, R752, R753, R754


Add @ to R41, R343, R701

47

P17:R358, R389 change from 1K to 10K

Reason for change

Modify list

Change DC-jack from 3D to 2.5D

Change PCN1 from 2DC-S113L200 to 2DC-G313B200

P18:Add @ to R71, R76, R112, R348, R349


Add @ to C23, C55
Change R385 from 0_0402 to 49.9_0603
P19:New
Add
New
Add

add U63
@ to U63
add C826, C827, C828, C829, C830, C831
@ to C826, C827, C828, C829, C830, C831

P20:New add R722 - R733 (12pcs)


New add C832 ~ R839 (8pcs)
P21:New add R734 - R745 (12pcs)
New add C840 - R847 (8pcs)
P22:New add R746, R747, R748

************* Rev0.2 PIR List **************


11/03/2003 Writen by Jason Shih
P5:R18 del @
P5:R19 del @, Change to 680_0603_1%

-----------------------

for Prescott CPU

P22:New add R755, R756, R757


P39:R487 change from 0_0402 to 8.2K_0402
P41:Add new R758, R759

************* Rev0.2A PIR List **************


11/13/2003 Writen by Jason Shih
Add HDTV, SW-DJ, Yamaha AC97 Codec Function
P23:HDTV Function (NewPage)
P32:New add R787, 789, R790, C881, C882, C883
P34:JP10 change from 16pin to 20pin
JP10.18 new add SPDIF signal
P35: -Del
Del
Del

Del OZ-168 peripheral circuit -U46, X4, D31, Q14, Q49, Q50, L34, L35, RP83, RP84
R228, R235, R237, R244, R495, R496, R497, R498, R506, R509, R510, R514, R518, R532,
C365, C641, C642, C651, C659, C662, C673

R533, R534, R538, R539

Add new U66, U68, Q75, Q76, Q77, D48


Add new R791, R792, R793, R794, R795
Add new C884, C885, C886, C887, C888, C889, C890, C891, C892, C893, C894, C895, C897
P36:Del RP139, U47, U48, C645
Add new RP150, RP151, U67, U68, Q78
Add new R796, R797, R798, R799, R800
JP28.60 change from +5VCD to +5VCDS
P39:PR3, PR87 change from 10P8R to 8P4R
Add new PR149
Add new R801, R802, R803, R804

11/14/2003 Writen by Jason Shih


P22:R16 change from 100_0402 to 200_0402

11/18/2003 Writen by Jason Shih


P6:Add @ to C481, C482, C493, C494
P34:Add @ to R662
R604 del @

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

DBQ01 PIR LIST


Document Number

Rev
0.3

Sapporo 300P
, 01, 2003

Sheet

57

of

57

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