ECET 2310 (Electronics II) Laboratory Exercise 9 (Revised 5/30/08) Comparator Circuits

Prelab consists of: 1(a.), 1(b.), 1(c.), 2(a.), 2(b.), 3(a.), and 3(b.). Laboratory Procedure consists of: 1(d.), 2(c.), and 3(c.). 1. (a.) Design a noninverting Schmitt trigger circuit with transition voltages of -2.5 V and +5 V. Assume Vsat = 15 V and that vin = 8sin(100 t) V. Show all design work. Sketch the circuit schematic (showing the required resistor ratios and the specific value of any required external voltages).

(b.) Draw the predicted plot of vin and vout versus time for two periods of this circuit (utilize the same time axis for both plots). Completely label the plot.

(c.) Draw the predicted plot of vout versus vin for the circuit (that is, plot the hysteresis pattern). Completely label the plot.

(d.) Construct your designed circuit. Repeat procedures 1(b.) and 1(c.) for your constructed circuit (utilize the back of this page for your plots).

2.

(a.) For the circuit shown, assume Vsat = 15 V and that vin = 10sin(100 t) V and Vth = +3 V. Draw the predicted plot of vin and vout versus time for two periods of this circuit (utilize the same time axis for both plots). Completely label the plot. Show all work.
vin Vth R1 = 5 k RF = 10 k

vout

(b.) Draw the predicted plot of vout versus vin for the circuit (that is, plot the hysteresis pattern). Completely label the plot. Show all work.

(c.) Construct the circuit shown. Repeat procedures 2 (a.) and 2 (b.) for your constructed circuit. (utilize the back of this page for your plots).

3.

(a.) For the circuit shown, assume Vsat = 15 V and that vin is a 25 Hz, 20 Vpp, triangle waveform. Draw the predicted plot of vin and vout versus time for two periods of this circuit (utilize the same time axis for both plots). Completely label the plot. Show all work.
-15 V

20 k

vin

vout

5 k

(b.) Draw the predicted plot of vout versus vin for the circuit (that is, plot the hysteresis pattern). Completely label the plot. Show all work.

(c.) Construct the circuit shown. Repeat procedures 3 (a.) and 3 (b.) for your constructed circuit. (utilize the back of this page for your plots).

(revised 5/30/08 WRH)