1ade5 C500 IBL30 LA-3341P r02 0620la-3343p

A
Compal confidential
Schematics Document
Mobile Yonah uFCPGA with Intel
Calistoga_GM/PM+ICH7-M core logic
2006-05-19
REV:0.1
Compal Secret Data
Security Classification
2005/03/10
Issued Date
2006/03/10
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Compal Electronics, Inc.

Cover Sheet
Size Document Number

Custom LA-3341P
Date:
Rev
0.2
Sheet
Tuesday, June 20, 2006

E
of
40
Compal confidential
File Name : LA-3341P
ZZZ
Thermal Sensor
ADM1032
PCB
Mobile Yonah
uFCBGA-479/uFCPGA-478 CPU
page 4
page 4, 5, 6
Fan Control
page 4
H_A#(3..31)
Clock Generator
ICS 954306
FSB
H_D#(0..63)
533/667MHz
page 15
LVDS Panel
Interface
page
Intel Calistoga GMCH

16
PCBGA 1466
BANK 0, 1, 2, 3
page 13,14
Dual Channel
page 7, 8, 9, 10,11,12
CRT & TV OUT

2
DDR2 -400/533/667
DDR2-SO-DIMM X2
Mini-PCIE Card
page 17
page 27
DMI
PCIE x3
RTC CKT.
page 29
PCI BUS
USB conn X3
USB2.0
Intel ICH7-M
page 31
AC-LINK
mBGA-652
3.3V 33 MHz
Power On/Off CKT.
BT Conn
Reserved
page 31
page 18, 19, 20, 21
page 42
DC/DC Interface CKT.

3
page 38
Power Circuit DC/DC
10/100 LAN
RealTek 8100CL
page 26
29
28
AMP & Audio Jack
RJ45 CONN
page 22
page 34
Touch Pad
page 32
BIOS
page 31
PATA CDROM
Connector
Int.KBD
page 32
SATA HDD
Connector x2
ENE KB910/L
page 35
page 48~56
Audio CKT
AMOM page
LPC BUS
MO DEM
AMOM page
SPR CONN.
*RJ45 CONN
*MIC IN JACK
*LINE OUT JACK
*SPDIF CONN
*DC JACK
*TVOUT CONN
*USB CONN x1
*CIR x1
page 22
page 35
page 46
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
A
Title

Block Diagram

Custom LA-3341P
Date:
Rev
0.2
Sheet

E
of
40
Voltage Rails
+5VS
power
plane
+3VS
+2.5VS
+B
LDO3
+5VALW
+1.8V
LDO5
+3VALW
+5V
+1.5VS
+0.9VS
+CPU_CORE
+VCCP
State
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery

don't exist
O MEANS ON
X MEANS OFF
PCI Devices
EXTERNAL
IDSEL#
CARD BUS & 1394
AD22
C,D,E,G
RealTekK 8100CL
AD24
REQ/GNT#
PIRQ
Load BOM check item

1.U31 GM/PM/GML part number
2.U6 ICH7 part number
BOM: 43144132L01 (GM)

43144132L02 (GML)
Jump-Short:
PJP4,PJP6,PJP7,PJP8,PJP10,PJP12,PJP14,PJP18,PJP19,PJP20,PJP25
Compal Secret Data
2005/03/10
Issued Date
Deciphered Date
2006/03/10
A
Title

Notes List

Custom LA-3341P
Date:
Rev
0.2
Sheet
of
40
+VCCP
This shall place near CPU
R6
56_0402_5%
1
2
ITP_TDI
H_D#[0..63] <7>
JP16A
L2
V4
ADSTB0#
ADSTB1#
CLK_CPU_BCLK A22
CLK_CPU_BCLK# A21
<15> CLK_CPU_BCLK
<15> CLK_CPU_BCLK#
<7>
<7>
<7>
<7>
<7>
<7>
R17
<7>
56_0402_5%
<7>
1
2
<7>
<7>
+VCCP
<7>
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_RESET#
H_RS#[0..2]
<7>
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_TRDY#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
<20> ITP_DBRESET#
<7>
H_DBSY#
<19> H_DPSLP#
<19,39> H_DPRSTP#
<7>
H_DPWR#
<39> H_PROCHOT#
+VCCP
1 R18
2
75_0402_5%
<19> H_PWRGOOD
<7> H_CPUSLP#
R456 1
R455 1
2 @ 1K_0402_5%
51_0402_5%
2
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
F3
F4
G3
G2
RS0#
RS1#
RS2#
TRDY#
AD4
AD3
AD1
AC4
BPM0#
BPM1#
BPM2#
BPM3#
HOST CLK
CONTROL
ITP_DBRESET# C20
H_DBSY#
E1
H_DPSLP#
B5
H_DPRSTP#
E5
H_DPWR#
D24
ITP_BPM#4
AC2
ITP_BPM#5
AC1
H_PROCHOT# D21
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PW RGOOD D6
H_CPUSLP#
D7
ITP_TCK
AC5
ITP_TDI
AA6
ITP_TDO
AB3
TEST1
C26
TEST2
D25
ITP_TMS
AB5
ITP_TRST#
AB6
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
H_THERMDA
A24
H_THERMDC
A25
H_THERMTRIP# C7
<7,19> H_THERMTRIP#
BCLK0
BCLK1
H_THERMDA, H_THERMDC routing together.

Trace width / Spacing = 10 / 10 mil
R181 1
R3
56_0402_5%
ITP_TDO
R2
56_0402_5%
ITP_BPM#5
R1
56_0402_5%
ITP_TRST#
R4
56_0402_5%
ITP_TCK
R5
56_0402_5%
2 @ 200_0402_5%
PAD T27
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
PAD
PAD
PAD
PAD
PAD
T5
T4
T3
T1
T2
Thermal Sensor ADM1032AR

+3VS
C598
0.1U_0402_16V4Z
1
U30
C592
2
VDD
SCLK
EC_SMC_2
H_THERMDA
D+
SDATA
EC_SMD_2
H_THERMDC
D-
ALERT#
THERM#
GND
2200P_0402_50V7K
THERM#
+3VS
ADM1032AR_SOP8
10K_0402_5%
Address:100_1100
MISC
J26
M26
V23
AC20
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
H23
M24
W24
AD23
G22
N25
Y25
AE24
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
FAN control
+5VS
C765 1
2 10U_1206_16V4Z
U40
1
2
3
4
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
<7>
<7>
<7>
<7>
<31>
EN_FAN1
VEN
VIN
VO
VSET
8
7
6
5
GND
GND
GND
GND
G993P1UF_SOP8
B
H_DSTBN#[0..3] <7>
+5VS
H_DSTBP#[0..3] <7>
+3VS
R551
10K_0402_5%
1SS355_SOD323
D28
FAN1
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
A6
A5
C4
B3
C6
B4
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
STPCLK#
SMI#
D5
A3
H_STPCLK#
H_SMI#
LEGACY CPU
THERMAL
THERMDA DIODE
THERMDC
THERMTRIP#
H_A20M# <19>
H_FERR# <19>
H_IGNNE# <19>
H_INIT# <19>
H_INTR
<19>
H_NMI
<19>
1
D22
BAS16_SOT23
H_STPCLK# <19>
H_SMI#
<19>
FOX_PZ47903-2741-42_YONAH
<31> FAN_SPEED1
JP30
1
2
3
ACES_85205-0300
C762
1000P_0402_50V7K
+VCCP
EC_SMC_2
EC_SMD_2
<31> EC_SMC_2
<31> EC_SMD_2
FAN1
DINV0#
DINV1#
DINV2#
DINV3#
R458
H_ADSTB#0
H_ADSTB#1
ITP_DBRESET#
ITP_TMS
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
C763 10U_0805_10V4Z
K3
H2
K2
J3
L5
DATA GROUP
ADDR GROUP
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
C761
1000P_0402_50V7K
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
YONAH
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
<7> H_ADSTB#0
<7> H_ADSTB#1
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
<7> H_REQ#[0..4]
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#[3..31]
<7>
+VCCP
R437
H_DPSLP# 1
@ 56_0402_5%
@ 56_0402_5%
R436
H_DPRSTP# 1
2
2 2
R457
1 OCP#
Q35
@ MMBT3904_SOT23
5
OCP#
Compal Secret Data
2005/03/10
Issued Date
@ 56_0402_5%
H_PROCHOT# 3
2006/03/10
Deciphered Date
<20>
Title

Yonah CPU in mFCPGA479

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
of
40
C586
0.01U_0402_16V7K
+1.5VS
R454
1K_0402_1%
JP16B
R451
2K_0402_1%
AF7
AE7
VCCSENSE
VSSSENSE
B26
VCCA
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
H_PSI#
AE6
PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD6
AF5
AE5
AF4
AE3
AF2
AE2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
+VCCP
1
+VCCP is the FSB rail of the

processor and GMCH
Close to CPU pin AD26

within 500mils.
+CPU_CORE
R442
100_0402_1%
2
R441
100_0402_1%
1
2
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
133
166
<39>
H_PSI#
<39>
<39>
<39>
<39>
<39>
<39>
<39>
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD26
V_CPU_GTLREF
VCCSENSE
<15> CPU_BSEL0
<15> CPU_BSEL1
<15> CPU_BSEL2
VSSSENSE
R438
54.9_0402_1%
2
1
R439
27.4_0402_1%
2
1
R452
54.9_0402_1%
2
1
R453
27.4_0402_1%
2
1
GTLREF
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
B22
B23
C21
BSEL0
BSEL1
BSEL2
COMP0
COMP1
COMP2
COMP3
R26
U26
U1
V1
COMP0
COMP1
COMP2
COMP3
+CPU_CORE
Close to CPU pin

within 500mils.
JP16C
D
VCCSENSE
VSSSENSE
V_CPU_GTLREF
+1.5vs is a power source equired

by the PL clock generator on the
processorsilicon
C587
10U_0805_10V4Z
+VCCP
+CPU_CORE
Length match within 25 mils

The trace width 18 mils space
<39> VCCSENSE
7 mils
<39> VSSSENSE
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any
other toggling signal.
E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
YONAH
POWER, GROUNG, RESERVED SIGNALS AND NC
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1
AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
YONAH
POWER, GROUND
K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Yonah CPU in mFCPGA479

Custom LA-3341P
Date:
Rev
0.2
Sheet
1
of
40
+CPU_CORE
1
Place these capacitors on L8
(North side,Secondary Layer)
1
C13
10U_0805_6.3V6M
1
C14
10U_0805_6.3V6M
1
C28
10U_0805_6.3V6M
1
C23
10U_0805_6.3V6M
1
C34
10U_0805_6.3V6M
1
C18
10U_0805_6.3V6M
1
C19
10U_0805_6.3V6M
C30
10U_0805_6.3V6M
+CPU_CORE
1
(North side,Secondary Layer)
1
C33
10U_0805_6.3V6M
1
C39
10U_0805_6.3V6M
1
C42
10U_0805_6.3V6M
1
C35
10U_0805_6.3V6M
1
C38
10U_0805_6.3V6M
1
C41
10U_0805_6.3V6M
1
C2
10U_0805_6.3V6M
C48
10U_0805_6.3V6M
+CPU_CORE
1
(Sorth side,Secondary Layer)
1
C40
10U_0805_6.3V6M
1
C32
10U_0805_6.3V6M
1
C27
10U_0805_6.3V6M
1
C22
10U_0805_6.3V6M
1
C16
10U_0805_6.3V6M
1
C11
10U_0805_6.3V6M
1
C36
10U_0805_6.3V6M
C31
10U_0805_6.3V6M
+CPU_CORE
1
(Sorth side,Secondary Layer)
1
C26
10U_0805_6.3V6M
1
C21
10U_0805_6.3V6M
1
C15
10U_0805_6.3V6M
1
C10
10U_0805_6.3V6M
1
C1
10U_0805_6.3V6M
1
C6
10U_0805_6.3V6M
1
C24
10U_0805_6.3V6M
C12
10U_0805_6.3V6M
Mid Frequence Decoupling
+CPU_CORE
<6/19> Remove C37 330u Cap
1
+
2
1
+
2
1
+
2
C585
@330U_V_2.5VK_R9
C584
330U_V_2.5VK_R9
C576
330U_V_2.5VK_R9
C583
820U_E9_2_5V_M_R7
@ C8
330U_V_2.5VK_R9
South Side Secondary
C47
330U_V_2.5VK_R9
<6/19> Remove C578 820u Cap
ESR <= 1.5m ohm

Capacitor > 1980uF
1
+
North Side Secondary
2
B
+VCCP
1
C591
220U_D2_4VM
+
2
1
C43
0.1U_0402_16V4Z
1
C44
0.1U_0402_16V4Z
1
C45
0.1U_0402_16V4Z
1
C3
0.1U_0402_16V4Z
1
C4
0.1U_0402_16V4Z
C5
0.1U_0402_16V4Z
Place these inside

socket cavity on L8
(North side
Secondary)
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

CPU Bypass capacitors

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
of
40
R462
54.9_0402_1%
2
1
R464
24.9_0402_1%
2
1
R466
24.9_0402_1%
2
1
HVREF0
HVREF1
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
<20>
<20>
<20>
<20>
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
<20>
<20>
<20>
<20>
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
<20>
<20>
<20>
<20>
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
HADSTB#0
HADSTB#1
B9
C13
H_ADSTB#0
H_ADSTB#1
HCLKN
HCLKP
AG1
AG2
CLK_MCH_BCLK#
CLK_MCH_BCLK
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
K4
T7
Y5
AC4
K3
T6
AA5
AC5
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
J7
W8
U3
AB10
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3
H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#
HRS0#
HRS1#
HRS2#
B4
E6
D6
H_RS#0
H_RS#1
H_RS#2
<13>
<13>
<14>
<14>
H_ADSTB#0 <4>
H_ADSTB#1 <4>
H_DSTBP#[0..3] <4>
<13>
<13>
<14>
<14>
+1.8V
R41
<4>
<4>
<4>
<4>
H_RESET# <4>
H_ADS# <4>
H_TRDY# <4>
H_DPWR# <4>
H_DRDY# <4>
H_DEFER# <4>
H_HITM# <4>
H_HIT#
<4>
H_LOCK# <4>
H_BR0# <4>
H_BNR# <4>
H_BPRI# <4>
H_DBSY# <4>
H_CPUSLP# <4>
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
T17
T11
R40
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
<13>
<13>
<14>
<14>
CLK_MCH_BCLK# <15>
CLK_MCH_BCLK <15>
H_DSTBN#[0..3] <4>
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
1
1
PAD
PAD
M_ODT0
M_ODT1
M_ODT2
M_ODT3
2 80.6_0402_1%
2
80.6_0402_1%
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
AE35
AF39
AG35
AH39
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
AC35
AE39
AF35
AG39
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AE37
AF41
AG37
AH41
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
AC37
AE41
AF37
AG41
DMITXP0
DMITXP1
DMITXP2
DMITXP3
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
AY35
AR1
AW7
AW40
SM_CK0
SM_CK1
SM_CK2
SM_CK3
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
AW35
AT1
AY7
AY40
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
AU20
AT20
BA29
AY29
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
DDR_CS0_DIMMA# AW13
DDR_CS1_DIMMA# AW12
DDR_CS2_DIMMB# AY21
DDR_CS3_DIMMB# AW21
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
AL20
AF10
SM_OCDCOMP0
SM_OCDCOMP1
BA13
BA12
AY20
AU21
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
AV9
AT9
AK1
AK41
PM_BMBUSY#
G28
<20> PM_BMBUSY#
PM_EXTTS#0
F25
<13,14> PM_EXTTS#0
DPRSLPVR
H26
<20,39> DPRSLPVR
H_THERMTRIP#
G6
<4,19> H_THERMTRIP#
ICH_POK
AH33
<20,31> ICH_POK
PLTRST_R#
AH34
2
1
R98
100_0402_1%
K28
<18> MCH_ICH_SYNC#
D_REF_CLKN
D_REF_CLKP
D_REF_SSCLKN
D_REF_SSCLKP
CLK_REQ#
M_ODT0
M_ODT1
M_ODT2
M_ODT3
SMRCOMPN
SMRCOMPP
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
G_CLKP
G_CLKN
M_OCDOCMP0
M_OCDOCMP1
V_DDR_MCH_REF
<18,22,24> PLT_RST#
CFG
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
<13>
<13>
<14>
<14>
H_REQ#[0..4] <4>
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
HDINV#0
HDINV#1
HDINV#2
HDINV#3
<20>
<20>
<20>
<20>
<13>
<13>
<14>
<14>
D8
G8
B8
F8
A8
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
Description at page15.
U31B
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
CLK
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
SM_RCOMPN
SM_RCOMPP
PM_BMBUSY#
PM_EXTTS0#
PM_EXTTS1#
PM_THERMTRIP#
PWROK
RSTIN#
ICH_SYNC#
CALISTOGA_FCBGA1466~D
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
CFG3
PAD
CFG4
PAD
CFG5
CFG6
PAD
CFG7
CFG8
PAD
CFG9
CFG10
PAD
CFG11
CFG12
CFG13
CFG14
PAD
CFG15
PAD
CFG16
CFG17
PAD
CFG18
CFG19
CFG20
MCH_CLKSEL0 <15>
MCH_CLKSEL1 <15>
MCH_CLKSEL2 <15>
T6
T9
CFG5
<11>
T7
CFG7
<11>
T12
CFG9
<11>
T10
CFG11
<11>
CFG12
<11>
CFG13
<11>
T8
T16
CFG16
<11>
T14
CFG18
<11>
CFG19
<11>
CFG20
<11>
AG33 CLK_MCH_3GPLL
AF33 CLK_MCH_3GPLL#
A27
A26
H32
A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13
T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35
CLK_MCH_3GPLL <15>
CLK_MCH_3GPLL# <15>
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK# <15>
CLK_MCH_DREFCLK <15>
C40 MCH_SSCDREFCLK#
D41 MCH_SSCDREFCLK
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
SM_VREF0
SM_VREF1
PM
J13
H_VREF
K13
H_XRCOMP E1
H_XSCOMP E2
H_YRCOMP Y1
H_YSCOMP U1
H_SWNG0
E4
H_SWNG1 W1
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
DDR MUXING
+VCCP
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DMI
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
H_A#[3..31] <4>
U31A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
R461
54.9_0402_1%
2
1
NC
H_D#[0..63]
HOST
<4>
RESERVED
MCH_SSCDREFCLK# <15>
MCH_SSCDREFCLK <15>
CLKREQB#
CLKREQB# <15>
Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.
H_RS#[0..2] <4>
+1.8V
1
R483
1
R463
221_0603_1%
1
R38
2
221_0603_1%
100_0402_1%
2
1
PM_EXTTS#0
R71
10K_0402_5%
2
1
DPRSLPVR
R79
@ 10K_0402_5%
1
2
A
H_SWNG1
0.1U_0402_16V4Z
C601
1
R465
2
100_0402_1%
0.1U_0402_16V4Z
C82
1
R37
2
100_0402_1%
0.1U_0402_16V4Z
C87
2
1
R42
2
H_SWNG0
100_0402_1%
H_VREF
200_0402_1%
R45
+VCCP
R481
+VCCP
V_DDR_MCH_REF
C663
0.1U_0402_16V4Z
<13,14> V_DDR_MCH_REF
+VCCP
+3VS
100_0402_1%
Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 10/20.
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Calistoga (1/6)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
of
40
<13> DDR_A_DQS[0..7]
<13> DDR_A_DQS#[0..7]
<13> DDR_A_MA[0..13]
AU12
AV14
BA20
SA_BS0
SA_BS1
SA_BS2
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
SA_RCVENIN#
SA_RCVENOUT#
AY13
AW14
AY14
AK23
AK24
SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#
U31E
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
DDR SYS MEMORY A
<13> DDR_A_DM[0..7]
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
<13> DDR_A_CAS#
<13> DDR_A_RAS#
<13> DDR_A_WE#
T18 PAD
T19 PAD
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_D[0..63] <13>
<14> DDR_B_BS#0
<14> DDR_B_BS#1
<14> DDR_B_BS#2
<14> DDR_B_DM[0..7]
<14> DDR_B_DQS[0..7]
<14> DDR_B_DQS#[0..7]
<14> DDR_B_MA[0..13]
<14> DDR_B_CAS#
<14> DDR_B_RAS#
<14> DDR_B_WE#
T13 PAD
T15 PAD
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
AT24
AV23
AY28
SB_BS0
SB_BS1
SB_BS2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
SB_RCVENIN#
SB_RCVENOUT#
AR24
AU23
AR27
AK16
AK18
SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYS MEMORY B
U31D
<13> DDR_A_BS#0
<13> DDR_A_BS#1
<13> DDR_A_BS#2
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3
DDR_B_D[0..63] <14>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Calistoga (2/6)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
of
40
U31C
<16>
<16>
<16>
LVDSA0LVDSA1LVDSA2-
<16>
<16>
<16>
LVDSB0+
LVDSB1+
LVDSB2+
<16>
<16>
<16>
LVDSB0LVDSB1LVDSB2-
<16>
<16>
<16>
<16>
LVDSAC+
LVDSACLVDSBC+
LVDSBC-
TV_COMPS
TV_LUMA
TV_CRMA
LA_DATA0
LA_DATA1
LA_DATA2
LVDSA0LVDSA1LVDSA2-
C37
B35
A37
LA_DATA#0
LA_DATA#1
LA_DATA#2
LVDSB0+
LVDSB1+
LVDSB2+
F30
D29
F28
LB_DATA0
LB_DATA1
LB_DATA2
LVDSB0LVDSB1LVDSB2-
G30
D30
F29
LB_DATA#0
LB_DATA#1
LB_DATA#2
LVDSAC+
LVDSACLVDSBC+
LVDSBC-
A32
A33
E26
E27
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
D32
J30
H30
H29
G26
G25
F32
B38
C35
C33
C32
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
A16
C18
A19
TVDAC_A
TVDAC_B
TVDAC_C
EDID_CLK_LCD
EDID_DAT_LCD
GMCH_LVDDEN
2
1
R482 1.5K_0402_1%
TV_COMPS
TV_LUMA
TV_CRMA
2 R58
1
4.99K_0402_1%
3VDDCCL
3VDDCDA
<17>
CRT_G
<17>
CRT_R
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
J29
K30
TV_DCONSEL1
TV_DCONSEL0
3VDDCCL
3VDDCDA
C26
C25
DDCCLK
DDCDATA
CRT_VSYNC
CRT_HSYNC
CRT_B
H23
G23
E23
D23
C22
B22
A21
B21
VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
J22
CRT_IREF
CRT_G
CRT_R
2 R65
1
255_0402_1%
CRT
<17>
<17>
<17> CRT_VSYNC
<17> CRT_HSYNC
<17>
CRT_B
J20
B16
B18
B19
TV
<17>
<17>
<17>
B37
B34
A36
GMCH_ENBKL
<16> GMCH_ENBKL
<16> EDID_CLK_LCD
<16> EDID_DAT_LCD
<16> GMCH_LVDDEN
LVDSA0+
LVDSA1+
LVDSA2+
EXP_COMPI
EXP_COMPO
PCI-EXPRESS GRAPHICS
LVDSA0+
LVDSA1+
LVDSA2+
SDVOCTRL_DATA
SDVOCTRL_CLK
LVDS
<16>
<16>
<16>
H27
H28
D40
D38
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
PEGCOMP
+1.5VS_PCIE
R89
24.9_0402_1%
2
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Calistoga (3/6)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
of
40
+VCCP
+2.5VS
D5
D
H20
G20
+3VS_TVBG
C225
0.1U_0402_16V4Z
VCCA_TVBG
VSSA_TVBG
10U_1206_6.3V6M
+1.5VS_MPLL
10U_1206_6.3V6M
C665
AF2
220U_D2_4VM
C666
VCCA_MPLL
CRTDAC: Route caps within

250mil of Alviso. Route FB
within 3" of Calistoga
+1.5VS
1
+
L29
MBK160808_0603
2
1
+1.5VS
1
+
close pin A38
2
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
+1.5VS_TVDAC
+3VS
2
B
PCI-E/MEM/PSB PLL decoupling
+1.5VS
+1.5VS_3GPLL
R99
0_0603_5%
2
1
+1.5VS
+1.5VS_MPLL
R459
0_0603_5%
2
1
45mA Max.
1
C604
+1.5VS_TVDAC
+1.5VS_HPLL
+1.5VS
+1.5VS
R46
0_0603_5%
2
1
C105
0.1U_0402_16V4Z
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
+3VS
R460
0_0603_5%
2
1
45mA Max.
1
+1.5VS
10U_1206_6.3V6M
VCCHV0
VCCHV1
VCCHV2
A23
B23
B25
R39
2
1
0_0805_5%
1
C594
D21
H19
+3VS_TVBG
0.1U_0402_16V4Z
VCCD_TVDAC
VCCDQ_TVDAC
+1.5VS
C614
2200P_0402_50V7K
A28
B28
C28
C605
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
C113
0.1U_0402_16V4Z
AH1
AH2
C280
0.1U_0402_16V4Z
VCCD_HMPLL0
VCCD_HMPLL1
+3VS
R44
2
1
0_0805_5%
C106
0.1U_0402_16V4Z
+3VS_TVDACC
+3VS_TVDACA
C107
2200P_0402_50V7K
1
2
+3VS
R55
2
1
0_0805_5%
C109
0.1U_0402_16V4Z
+3VS_TVDACB
C114
2200P_0402_50V7K
+3VS_TVDACB
+3VS
R52
2
1
0_0805_5%
C111
0.1U_0402_16V4Z
+3VS_TVDACA
+3VS_TVDACC
C110
2200P_0402_50V7K
E19
F19
C20
D20
E20
F20
C215
0.1U_0402_16V4Z
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
10U_1206_6.3V6M
+1.5VS
+2.5VS
close pin G41
+1.5VS_DPLLB
L28
MBK160808_0603
2
1
+2.5VS
P O W E R
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
A38
B39
C248
10U_1206_6.3V6M
VCCA_LVDS
VSSA_LVDS
+1.5VS_DPLLA
C593
C596
0.47U_0603_10V7K
MCH_AB1
MCH_D2
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
2
L7 BLM11A601S_0603
1
2
+2.5VS
0.1U_0402_16V4Z
1
C597
0.22U_0603_10V7K
C81
0.22U_0603_10V7K
B26
C39
AF1
C174
0.1U_0402_16V4Z
C607
0.47U_0603_10V7K
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
+2.5VS
C160
0.01U_0402_16V7K
C613
2.2U_0805_16V4Z
C612
4.7U_0805_10V4Z
+2.5VS_CRTDAC
C645
MCH_A6
E21
F21
G21
330U_V_2.5VK_R9
C226
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2
0.1U_0402_16V4Z
+1.5VS_3GPLL
+2.5VS
C616
AC33
G41
H41
+1.5VS
330U_V_2.5VK_R9
C138
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
R490
0_0805_5%
2
1
0.1U_0402_16V4Z
@ 10_0402_5%
AB41
AJ41
L41
N41
R41
V41
Y41
C117
0.1U_0402_16V4Z
+1.5VS_PCIE
W=40 mils
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
C112
2200P_0402_50V7K
+2.5VS
C116
0.1U_0402_16V4Z
+3VS
B30
C30
A30
C115
2200P_0402_50V7K
1 1
@ CH751H-40_SC76
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
1
2
C162
0.1U_0402_16V4Z
C682
C610
220U_D2_4VM
D19
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76
H22
C615
10U_1206_6.3V6M
2
2
+1.5VS
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
VCC_SYNC
C124
0.1U_0402_16V4Z
+2.5VS
R80
@ 10_0402_5%
R520
U31H
+VCCP
C163
0.1U_0402_16V4Z
1 1
@ CH751H-40_SC76
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Calistoga (4/6)

Custom LA-3341P
Date:
Re v
0.2
Sheet
1
10
of
40
Strap Pin Table

CFG[3:17] have internal pull up
C606
220U_D2_4VM
C595
220U_D2_4VM
1
+
2
1
+
2
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
+VCCP
C602
0.47U_0603_10V7K
+1.8V
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
C603
0.47U_0603_10V7K
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
Place near pin AV1 & AJ1
CFG[19:18] have internal pull down

MCH_AT41
MCH_AM41
011
001
C668
0.47U_0603_10V7K
CFG[2:0]
CFG5
CFG7
0 = Reserved
1 = Mobile Yonah CPU*(Default)
CFG9
0 = Lane Reversal Enable

1 = Normal Operation (Default)*
CFG6
0 = Reserved
Place near pin AT41 & AM41
C84
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
C83
2
0.1U_0402_16V4Z
=
=
=
=
Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation *(Default)
0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled *(Default)
CFG16
1
1 = Calistoga
00
01
10
11
CFG[13:12]
= 667MT/s FSB
= 533MT/s FSB
0 = DMI x 2
1 = DMI x 4 *(Default)
PSB 4X CLK Enable
0.1U_0402_16V4Z
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
C669
0.47U_0603_10V7K
C85
0.22U_0603_10V7K
P O W E R
VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99
10 = 1.05V*(Default)
01 = 1.5V
CFG10 CFG18
0 = Normal Operation * (Default)

1 = DMI Lane Reversal Enable
CFG19
0 = No SDVO Device Present *

(Default)
SDVO_CTRLDATA
1 = SDVO Device Present
CFG20
(PCIE/SDVO select)
0 = Only PCIE or SDVO is

operational. *(Default)
1 = PCIE/SDVO are operating
simu.
Place near pin BA23
C599
470U_V_2.5VK_R9
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
C641
10U_1206_6.3V6M
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
C222
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
C125
0.47U_0603_10V7K
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
+1.8V
U31G
C609
10U_1206_6.3V6M
C139
1U_0603_10V4Z
C164
0.22U_0603_10V7K
C600
10U_1206_6.3V6M
C173
10U_1206_6.3V6M
C86
0.22U_0603_10V7K
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
P O W E R
AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18
+VCCP
+1.5VS
1
+
<7>
CFG5
<7>
CFG7
<7>
CFG9
<7>
CFG11
<7>
CFG12
<7>
CFG13
<7>
CFG16
R48
2 @
2.2K_0402_5%
R54
2 @
2.2K_0402_5%
R51
2 @
2.2K_0402_5%
R47
2 @
2.2K_0402_5%
R49
2 @
2.2K_0402_5%
R50
2 @
2.2K_0402_5%
R53
2 @
2.2K_0402_5%
+3VS
C104
0.47U_0603_10V7K
U31F
+VCCP
<7>
<7>
<7>
R74
R82
R87
CFG18
CFG19
CFG20
2 @ 1K_0402_5%
2 @ 1K_0402_5%
2 @ 1K_0402_5%
1
1
1
Place near pin BA15
A
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Calistoga (5/6)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
11
of
40
U31I
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
U31J
P O W E R
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
P O W E R
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
A
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

Calistoga (6/6)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
12
of
40
+1.8V
+1.8V
V_DDR_MCH_REF
<8> DDR_A_DQS#[0..7]
Layout Note:
Place near JP41
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D9
DDR_A_D15
+1.8V
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_A_D16
DDR_A_D17
C187
C193
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C143
0.1U_0402_16V4Z
C180
C206
0.1U_0402_16V4Z
C204
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C131
2.2U_0805_16V4Z
C129
2.2U_0805_16V4Z
C130
2.2U_0805_16V4Z
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D29
DDR_A_D24
DDR_A_DM3
DDR_A_D26
DDR_A_D27
<7> DDR_CKE0_DIMMA
<8> DDR_A_BS#2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
<8> DDR_A_BS#0
<8> DDR_A_WE#
+0.9VS
<8> DDR_A_CAS#
<7> DDR_CS1_DIMMA#
M_ODT1
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D37
DDR_A_D36
DDR_A_DQS#4
DDR_A_DQS4
C628
C136
C145
C158
C629
C630
C166
C175
C192
C639
C640
C642
C643
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
<7>
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
DDR_A_D35
DDR_A_D32
DDR_A_D40
DDR_A_D44
DDR_A_DM5
DDR_A_D41
DDR_A_D46
DDR_A_D49
DDR_A_D48
+0.9VS
DDR_A_MA5
DDR_A_MA8
RP25
1
2
DDR_A_MA1
DDR_A_MA3
RP24 56_0404_4P2R_5% RP15 56_0404_4P2R_5%

1
4
4
1 DDR_A_MA7
2
3
3
2 DDR_A_MA6
4
3
Layout Note:
Pla ce these resistor
closely JP41,all
trace length Max=1.5"
RP27 56_0404_4P2R_5%
4
1 DDR_A_BS#2
3
2 DDR_CKE0_DIMMA
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D50
DDR_A_D61
DDR_A_D60
DDR_A_DM7
RP6 56_0404_4P2R_5% RP26 56_0404_4P2R_5%

DDR_A_RAS#
1
4
4
1 DDR_A_MA9
DDR_CS0_DIMMA# 2
3
3
2 DDR_A_MA12
DDR_A_BS#0
DDR_A_MA10
RP23 56_0404_4P2R_5% RP12 56_0404_4P2R_5%

1
4
4
1 DDR_A_MA4
2
3
3
2 DDR_A_MA2
DDR_A_CAS#
DDR_A_WE#
RP22 56_0404_4P2R_5% RP9

1
4
4
2
3
3
56_0404_4P2R_5%
1 DDR_A_MA0
2 DDR_A_BS#1
RP21 56_0404_4P2R_5% RP3

DDR_CS1_DIMMA# 2
3
4
M_ODT1
1
4
3
56_0404_4P2R_5%
1 M_ODT0
2 DDR_A_MA13
DDR_A_D59
DDR_A_D58
<14,15> CLK_SMBDATA
<14,15> CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
+3VS
C80
0.1U_0402_16V4Z
56_0404_4P2R_5% RP18 56_0404_4P2R_5%

4
1 DDR_CKE1_DIMMA
3
2 DDR_A_MA11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_A_DM0
DDR_A_D5
DDR_A_D7
FOX_ASOA426-M4R-TR
CONN@
SO-DIMM A
REVERSE
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 <7>
M_CLK_DDR#0 <7>
DDR_A_D11
DDR_A_D10
DDR_A_D20
DDR_A_D21
PM_EXTTS#0 <7,14>
DDR_A_DM2
DDR_A_D23
DDR_A_D22
DDR_A_D28
DDR_A_D25
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D31
DDR_A_D30
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA <7>
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_BS#1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <7>
M_ODT0
DDR_A_MA13
M_ODT0
<7>
DDR_A_D39
DDR_A_D38
DDR_A_DM4
DDR_A_D34
DDR_A_D33
DDR_A_D45
DDR_A_D43
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D47
DDR_A_D42
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>
DDR_A_DM6
DDR_A_D51
DDR_A_D55
DDR_A_D57
DDR_A_D56
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
Top side
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
DDR_A_D13
DDR_A_D12
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
R35
10K_0402_5%
2
1
DDR_A_D8
DDR_A_D14
DDR_A_D6
DDR_A_D0
R33
10K_0402_5%
2
1
DDR_A_D2
DDR_A_D3
V_DDR_MCH_REF <7,14>
C369
DDR_A_DQS#0
DDR_A_DQS0
<8> DDR_A_MA[0..13]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
DDR_A_D4
DDR_A_D1
<8> DDR_A_DQS[0..7]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C368
<8> DDR_A_DM[0..7]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2.2U_0805_16V4Z
JP21
<8> DDR_A_D[0..63]
Title

DDRII-SODIMM SLOT1

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
13
of
40
+1.8V
<8> DDR_B_DQS#[0..7]
+1.8V
<8> DDR_B_D[0..63]
V_DDR_MCH_REF
<8> DDR_B_DM[0..7]
DDR_B_D10
DDR_B_D11
+1.8V
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_B_D17
DDR_B_D20
C140
C141
0.1U_0402_16V4Z
C142
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C169
0.1U_0402_16V4Z
C157
C159
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C205
2.2U_0805_16V4Z
C214
C132
2.2U_0805_16V4Z
2.2U_0805_16V4Z
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D25
DDR_B_DM3
DDR_B_D30
DDR_B_D31
<7> DDR_CKE2_DIMMB
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
<8> DDR_B_BS#2
DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
+0.9VS
<8> DDR_B_CAS#
<7> DDR_CS3_DIMMB#
1
<7>
M_ODT3
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D32
DDR_B_D33
2
C168
C176
C191
C133
C144
C147
C165
C170
C179
C202
C137
C146
C156
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
<8> DDR_B_BS#0
<8> DDR_B_WE#
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
+0.9VS
DDR_B_MA1
DDR_B_MA3
RP10
1
2
DDR_B_BS#0
DDR_B_MA10
RP7 56_0404_4P2R_5% RP17 56_0404_4P2R_5%

DDR_B_MA11
1
4
4
1
DDR_CKE3_DIMMB
2
3
3
2
DDR_B_BS#1
DDR_B_MA0
RP8 56_0404_4P2R_5% RP13 56_0404_4P2R_5%

DDR_B_MA5
1
4
4
1
DDR_B_MA8
2
3
3
2
4
3
4
3
RP16 56_0404_4P2R_5%
DDR_B_MA9
1
DDR_B_MA12
2
DDR_B_D48
DDR_B_D49
Layout Note:
Pla ce these resistor
closely JP42,all
trace length Max=1.5"
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D51
DDR_B_D50
DDR_B_D56
DDR_B_D61
DDR_B_DM7
DDR_B_D59
DDR_B_D58
RP5 56_0404_4P2R_5% RP14 56_0404_4P2R_5%

DDR_CS2_DIMMB# 1
DDR_B_MA6
4
4
1
DDR_B_RAS#
DDR_B_MA7
2
3
3
2
<13,15> CLK_SMBDATA
<13,15> CLK_SMBCLK
+3VS
DDR_B_CAS#
DDR_B_WE#
56_0404_4P2R_5% RP19
4
3
1
2
C79
0.1U_0402_16V4Z
DDR_B_DM1
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_D21
DDR_B_D16
PM_EXTTS#0 <7,13>
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D26
DDR_B_D24
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D29
DDR_B_D27
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB <7>
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_BS#1 <8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <7>
M_ODT2
DDR_B_MA13
M_ODT2
<7>
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D39
DDR_B_D38
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 <7>
M_CLK_DDR#2 <7>
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
FOX_ASOA426-M4R-TR
CONN@
SO-DIMM B
STANDARD
R32
1
+3VS
10K_0402_5%
A
Bottom side
DDR_B_BS#2
DDR_CKE2_DIMMB
Compal Secret Data
56_0404_4P2R_5%
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>
DDR_B_D14
DDR_B_D15
R34
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
10K_0402_5%
RP4 56_0404_4P2R_5% RP11 56_0404_4P2R_5%

DDR_B_MA2
1
4
4
1
DDR_B_MA4
2
3
3
2
RP1
56_0404_4P2R_5% RP2 56_0404_4P2R_5%
DDR_CS3_DIMMB# 2
DDR_B_MA13
3
4
1
M_ODT3
M_ODT2
1
4
3
2
CLK_SMBDATA
CLK_SMBCLK
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_B_D12
DDR_B_D13
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_DM0
C367
DDR_B_D2
DDR_B_D3
Layout Note:
Place near JP42
DDR_B_D5
DDR_B_D4
C366
DDR_B_DQS#0
DDR_B_DQS0
D
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
DDR_B_D0
DDR_B_D1
<8> DDR_B_MA[0..13]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
2.2U_0805_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
<8> DDR_B_DQS[0..7]
V_DDR_MCH_REF <7,13>
JP24
Title

DDRII-SODIMM SLOT2
Size
Document Number
Rev
0.2
LA-3341P
Date:
Sheet

1
14
of
40
FSLC
FSLB
FSLA
CLKSEL2
CLKSEL1
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
+3VS
133
100
166
100
33.3
33.3
1
<20,24> ICH_SMBDATA
Table : ICS954306
2
0_0805_5%
C456
C422
C431
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
CLK_Ra CLK_Rb CLK_Rc
No Stuff
CLK_Rd CLK_Re CLK_Rf<20,24>
Stuff
CLK_Rd CLK_Re CLK_Rf
2
0_0805_5%
3
S
2
ICH_SMBCLK
Stuff
CLK_Rd CLK_Rf
No Stuff
0.1U_0402_16V4Z
C417
0.1U_0402_16V4Z
+CK_VDD_48
1
C424
0.1U_0402_16V4Z
C419 2
CLK_14M_ICH
<20> CLK_14M_ICH
57
CLK_XTAL_IN
10
VDD48
X2
56
CLK_XTAL_OUT
VDDPCI
1
R305
1
R311
2
0_0402_5%
2
0_0402_5%
1
R239
1
R247
CLK_CPU_BCLK
2
10_0402_5%
CLK_CPU_BCLK#
2
10_0402_5%
1
R254
1
R258
CLK_MCH_BCLK
2
10_0402_5%
CLK_MCH_BCLK#
2
10_0402_5%
29
VDDSRC
CPUCLKT0
52
CPU_BCLK
VDDCPU
CPUCLKC0
51
CPU_BCLK#
CPUCLKT1
49
MCH_BCLK
CPUCLKC1
48
MCH_BCLK#
41
50
55
VDDREF
12_0402_5%
FSA
1
11
FSLA/USB_48MHz
FSB
15
FSLB/TEST_MODE
1 CLKREF1
33_0402_5%
2
R230
SATACLKT
SATACLKC
VDDSATA
2
+CK_VDD_REF
59
FSLC/TEST_SEL/REF1
CLKIREF
46
*CLKREQA#
64
LCDCLK_SST/SRCCLKT0
18
LCDCLK_SSC/SRCCLKC0
19
IREF
2 R266
CLK_PCI_ICH
<18> CLK_PCI_ICH
R201
@ 1K_0402_5%
61
H_STP_CPU#
H_STP_PCI#
CLK_ENABLE#
<20> H_STP_CPU#
<20> H_STP_PCI#
<39> CLK_ENABLE#
+VCCP
MCH_CLKSEL1 <7>
R200
1K_0402_5%
CLK_Rb
+3VS
<31> CLK_PCI_EC
<6/3> PCI_CLK_LAN
selection (33MHz)
@ R199
<29> CLK_PCI_SIO
0_0402_5%
+3VS
CLK_Re
<13,14> CLK_SMBDATA
<13,14> CLK_SMBCLK
PCI/SRC_STOP#
SRCCLKT2
22
Vtt_PwrGd#/PD
SRCCLKC2
23
**SEL_LCDCLK#/PCICLK_F1
SATA1/SRCCLKT4
30
SATA1/SRCCLKC4
31
PCI_ICH
1 R920
PCI_LAN
60
REF0/PCICLK1
REQ_SEL
62
*REQ_SEL/PCICLK2
33_0402_5% 2
<23> CLK_PCI_LAN
CPU_STOP#
2 R229
1
33_0402_5%
FSB
10K_0402_5%2
1 R216
33_0402_5% 2
1 R215
33_0402_5% 2
100K_0402_5%
1
*SEL_PCI1/PCICLK3
*CLKREQB#
63
PCI_EC
**SEL_SATA1/PCICLK4
SRCCLKT1
20
1@ R225
PCI_SIO
**SEL_SATA2/PCICLK5
SRCCLKC1
21
2 R589
PCI_PCM
PCICLK6
CLK_SMBDATA
54
SDATA
CLK_SMBCLK
53
SCLK
+VCCP
2
<7> CLK_MCH_DREFCLK
R202
R205
8.2K_0402_5%
CLKREF1 2
1
MCH_DREFCLK
10_0402_5%
MCH_DREFCLK#
2
10_0402_5%
2
13
DOTT_96MHz
14
DOTC_96MHz
SRCCLKT3
26
SRCCLKC3
27
SATA2/SRCCLKT5
35
SATA2/SRCCLKC5
34
*CPUCLKT2_ITP/CLKREQC#
45
SRCCLKT6
37
SRCCLKC6
36
MCH_CLKSEL2 <7>
GND
12
GND
SRCCLKT8
43
17
GND
SRCCLKC8
42
58
GND
47
GNDCPU
*CPUCLKC2_ITP/CLKREQD#
44
25
GNDSRC
SRCCLKT7
39
+3VS
40
GNDSRC
SRCCLKC7
38
32
GNDSATA
R184
1K_0402_5%
Place near U54

Place these components
near each pin within 40
mils.
22P_0402_50V8J
CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>
CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>
+3VS
MCH_SSCDREFCLK <7>
MCH_SSCDREFCLK# <7>
CLK_PCIE_MCARD
2
10_0402_5%
CLK_PCIE_MCARD#
2
10_0402_5%
CLK_PCIE_MCARD <24>
CLK_PCIE_MCARD# <24>
CLK_PCIE_SATA
2
10_0402_5%
CLK_PCIE_SATA#
2
10_0402_5%
1
@ 10K_0402_5%
CLKREQB#
MCH_3GPLL
CLK_PCIE_SATA <19>
PCIE_ICH
1
R294
PCIE_ICH#
1
R301
2
R930
2
@ R273
CPU_XDP
1
R278
CLK_PCIE_ICH
2
10_0402_5%
CLK_PCIE_ICH#
2
10_0402_5%
1
10K_0402_5%
CLKREQC#
1
10K_0402_5%
CLK_CPU_XDP
2
@
10_0402_5%
1
@ 49.9_0402_1%
1
@ 49.9_0402_1%
CLK_MCH_BCLK 2
R255
CLK_MCH_BCLK# 2
R259
1
@ 49.9_0402_1%
1
@ 49.9_0402_1%
MCH_SSCDREFCLK 1
R256
MCH_SSCDREFCLK# 1
R269
CLK_PCIE_MCARD 1
R281
CLK_PCIE_MCARD#1
R283
CLK_MCH_3GPLL
1
R287
CLK_MCH_3GPLL#
1
R291
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
CLK_PCIE_SATA# <19>
+3VS
CLK_PCIE_ICH
1
R295
CLK_PCIE_ICH#
1
R302
CLK_MCH_DREFCLK 1
R245
CLK_MCH_DREFCLK#1
R252
CLK_PCIE_SATA 1
R296
CLK_PCIE_SATA# 1
R303
CLK_CPU_XDP
2
R279
CLK_CPU_XDP#
2
R272
CLKREQB# <7>
CLK_MCH_3GPLL
2
10_0402_5%
CLK_MCH_3GPLL#
2
10_0402_5%
1
R288
MCH_3GPLL# 1
R292
CLK_CPU_BCLK
2
R240
CLK_CPU_BCLK# 2
R248
CLKREQA# <24>
MCH_SSCDREFCLK
10_0402_5%
MCH_SSCDREFCLK#
2
10_0402_5%
2
PCIE_MCARD 1
R282
PCIE_MCARD#1
R284
1
R297
PCIE_SATA# 1
R304
2
R226
1
@ 10K_0402_5%
CLKREQA#
SSCDREFCLK 1
R257
SSCDREFCLK#1
R270
PCIE_SATA
Place crystal within

500 mils of CK410
CLK_MCH_3GPLL <7>
CLK_MCH_3GPLL# <7>
CLK_PCIE_ICH <20>
CLK_PCIE_ICH# <20>
+3VS
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
1
@49.9_0402_1%
1
@ 49.9_0402_1%
Delete 17" New Card PCIE CLK
1
1
Delete PCIE VGA CLK
1
R177
0_0402_5%
<7> CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK 1
R246
CLK_MCH_DREFCLK#1
R253
@ 1K_0402_5%
CLK_Rc
@ R183
0_0402_5%
CLK_Rf
LCD clock select
Pin44/45 function select
+3VS
1
+3VS
R235
R233
2
R931
2
@ R277
CPU_XDP#
1
@ R271
1
10K_0402_5%
CLKREQD#
1
10K_0402_5%
CLK_CPU_XDP#
2
10_0402_5%
+3VS
<6/12> Delete 15.4" New Card PCIE CLK
R312
ICS954306_TSSOP64
2 1000P_0402_50V7K
CLKREQB# C803 1
2 1000P_0402_50V7K
CLKREQC# C804 1
2 1000P_0402_50V7K
CLKREQD# C805 1
2 1000P_0402_50V7K
REQ_SEL
* Internal Pull-Up Resistor

** Internal Pull-Down Resistor
PCI_ICH
@ 10K_0402_5%
High:Pin18/19 = 100MHz
*Low:Pin18/19 = 96MHz
High:Pin44/45 = CLKREQ
*Low:Pin44/45 = CPUCLK2_ITP
4
Compal Secret Data
R308
10K_0402_5%
2
R238
2005/03/10
Issued Date
CLKREQA# C802 1
10K_0402_5%
CLK_ENABLE#
@ 10K_0402_5%
2
10K_0402_5%
2
0.1U_0402_16V4Z
CPU_BSEL2
2
R218
R228
2.4K_0402_1%1
C421
28
VDDSRC
R227
1K_0402_5%
X1
R236
2
CLK_48M_ICH
<20> CLK_48M_ICH
MCH_CLKSEL0 <7>
@ 1K_0402_5%
1
R191
0_0402_5%
1 22P_0402_50V8J
Y2
14.31818MHZ_20P_1BX14318BE1A
VDD
33
<6/12> Remove CLK_48M_CB
CLK_Rd
1
CLK_Ra
CPU_BSEL1
C430
2 +CK_VDD_REF
R188
1_0805_1%
1
2 +CK_VDD_48
R187
2.2_0805_1%
16
24
0.1U_0402_16V4Z
1
R231
0_0402_5%
0.1U_0402_16V4Z
Change Crustal to SJ100002F10

U13
2
R237
8.2K_0402_5%
FSA 2
1
<5>
10U_0805_10V4Z
C418
No Stuff
@ R232
56_0402_5%
<5>
C416
2N7002_SOT23
Q15
C425
CPU_BSEL0
C441
CLK_SMBCLK
+VCCP
0.1U_0402_16V4Z
1
1
2
G
Stuff
CLK_Re
<5>
1
R174
+3VS
+CK_VDD_MAIN1
667MHz
C450
533MHz
CLK_SMBDATA
2
G
*(Default)
0.1U_0402_16V4Z
+CK_VDD_MAIN2
FSB Frequency Selet:

CPU Driven
C440
2.2K_0402_5%
2.2K_0402_5%
Q12
2N7002_SOT23
1
R324
+3VS
R323
+CK_VDD_MAIN1
R299
2006/03/10
Deciphered Date
3
Title

Clock generator
Size
Document Number
Rev
0.2
LA-3341P
Date:
Sheet

1
15
of
40
LCD Panel & inverter Connector
<31>
<31>
INVT_PWM
DAC_BRIG
EDID_CLK_LCD
EDID_DAT_LCD
<9> EDID_CLK_LCD
<9> EDID_DAT_LCD
+5VS
+3VS
+LCDVDD
+3VS
LVDSAC+ <9>
LVDSAC- <9>
LVDSA1LVDSA1+
LVDSA1- <9>
LVDSA1+ <9>
LVDSBC+
LVDSBC-
R430
4.7K_0402_5%
LVDSBC+ <9>
LVDSBC- <9>
LVDSB1LVDSB1+
LVDSB0+
LVDSB0LVDSB2+
LVDSB2-
LVDSB1LVDSB1+
LVDSB0+
LVDSB0LVDSB2+
LVDSB2-
<9>
<9>
<9>
<9>
<9>
<9>
LVDSA0LVDSA0+
LVDSA2LVDSA2+
<9>
<9>
<9>
<9>
<31>
D17
CH751H-40_SC76
1
2
BKOFF#
DISPOFF#
D16
CH751H-40_SC76
1
2
LVDSA0LVDSA0+
LVDSA2LVDSA2+
<9> GMCH_ENBKL
R431
100K_0402_5%
1
INVPWR_B+
LVDSAC+
LVDSAC-
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
R434
1
2 EDID_CLK_LCD
10K_0402_5%
R435
1
2 EDID_DAT_LCD
10K_0402_5%
UMA
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
WL_LED#
DISPOFF#
INVT_PWM
DAC_BRIG
<24,29> WL_LED#
+3VS
JP2
ACES_88107-4000G
B+
INVPWR_B+
L25
2 FBMA-L10-201209-301LMT
@ L24
2 FBMA-L10-201209-301LMT
1
1
C806
C807
Delete 17" LVDS Conn JP1
0.1U_0402_16V4Z
68P_0402_50V8K
R429
+3VS
Q33
SI2301BDS_SOT23
+LCDVDD
R428
100K_0402_5%
2N7002_SOT23
Q32
2
G
0.047U_0402_16V4Z
2
G
S
C572
C574
Q31
DTC124EK_SC59
C575
4.7U_0805_10V4Z
C573
4.7U_0805_10V4Z
0.1U_0402_16V4Z
<9> GMCH_LVDDEN
1 2
100_0402_1%
+5VALW
2
+LCDVDD
1
Issued Date
2005/03/10
2006/03/10
Deciphered Date
A
Compal Secret Data
Title
LVDS Connector
Custom LA-3341P
Date:

G
Rev
0.2
Sheet
16
H
of
40
+R_CRT_VCC , +CRTVDD (40mils)

+5VS
NZQA5V6AXV5T1_SOT533-5
+CRTVDD
D1
+R_CRT_VCC
F1
1
1
RB411D_SOT23
CRT CONNECTOR
C582
0.1U_0402_16V4Z
2
2
1
EMI
1
CLOSE TO JP3
R21
R443 4.7K_0402_5%
16
17
2
G
2
74AHCT1G125GW_SOT353-5
3VDDCDA <9>
2
0_0402_5%
3VDDCCL <9>
3V_DDCCL
R445
2
G
220P_0402_25V8K
2
0_0402_5%
Q34
2N7002_SOT23
R19
R444
2.2K_0402_5%
2
+3VS
C577
CRT_VSYNC_R
D46
Q1
3V_DDCDA
3 2N7002_SOT23-3
220P_0402_25V8K
C581
10P_0402_50V8K
5
P
A
U28
CRT_VSYNCRFL
1
2
L26
FBM-L11-160808-800LMT_0603
<9> CRT_VSYNC
CRTVSYNC
2
0_0402_5%
CRT_HSYNCRFL
1
2
L27
FBM-L11-160808-800LMT_0603
OE#
R447
2
+CRTVDD
1
CRT_HSYNC_R
C7
22P_0402_50V8J
C17
22P_0402_50V8J
C25
22P_0402_50V8J
CRTL_B
C46
CRTL_G
R16 4.7K_0402_5%
CRTL_R
C579 10P_0402_50V8K
P
2
CR THSYNC
2
0_0402_5%
U29
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
EMI
<9> CRT_HSYNC
0.1U_0402_16V4Z
R449
OE#
C580
1
2
CRTB
1
C9
10P_0402_50V8K
EMI
+5VS
R7
75_0402_5%
1
2
CRT_B
C20
10P_0402_50V8K
<9>
CRTG
R10
75_0402_5%
1
2
CRT_G
C29
10P_0402_50V8K
<9>
CRTR
R14
75_0402_5%
1
2
CRT_R
L3
MBK2012800YZF
1
2
L2
MBK2012800YZF
1
2
L1
MBK2012800YZF
1
2
5
1
JP3
ALLTO_C10510-115A5-L_15P-s
<9>
1.1A_6VDC_FUSE
2.2K_0402_5%
TV-Out Connector
S-Video
2
0_0402_5%
TVLUMA
R31
<9>
TV_CRMA
2
0_0402_5%
TVCRMA
R26
C49
270P_0402_50V7K
C77
270P_0402_50V7K
TVCOMPS
C75
270P_0402_50V7K
2
0_0402_5%
R23
75_0402_5%
2
1
R29
75_0402_5%
2
1
TV_COMPS
R28
75_0402_5%
2
1
<9>
L4
MBC1608121YZF_0603
1
2
LUMA_CL
L6
MBC1608121YZF_0603
1
2
CRMA_CL
L5
MBC1608121YZF_0603
1
2
COMPS_CL
JP17
R22
1
1
2
3
4
5
6
7
C50
330P_0402_50V7K
C76
330P_0402_50V7K
TV_LUMA
C74
330P_0402_50V7K
EMI
R24
<9>
1
2
3
4
5
6
7
GND
GND
8
9
SUYIN_030107FR007G317ZR
TVGND
0_0805_5%
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
A
Title

CRT & TVout Connector

Custom LA-3341P
Date:
Rev
0.2
Sheet

E
17
of
40
+3VS
2 8.2K_0402_5%
PCI_PLOCK#
R540 1
2 8.2K_0402_5%
PCI _IRDY#
R538 1
2 8.2K_0402_5%
PCI_SERR#
R213 1
2 8.2K_0402_5%
PCI_PERR#
R178 1
2 8.2K_0402_5%
PCI_REQ4#
R527 1
2 8.2K_0402_5%
PCI_REQ3#
U6B
<23> PCI_AD[0..31]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
+3VS
R195 1
2 8.2K_0402_5%
PCI_PIRQA#
R196 1
2 8.2K_0402_5%
PCI_PIRQB#
R194 1
2 8.2K_0402_5%
PCI_PIRQC#
R193 1
2 8.2K_0402_5%
PCI_PIRQD#
R197 1
2 8.2K_0402_5%
PCI_PIRQE#
R524 1
2 8.2K_0402_5%
PCI_PIRQF#
R525 1
2 8.2K_0402_5%
PCI_PIRQG#
R198 1
2 8.2K_0402_5%
PCI_PIRQH#
R192 1
2 8.2K_0402_5%
PCI_REQ0#
R211 1
2 8.2K_0402_5%
PCI_REQ1#
R210 1
2 8.2K_0402_5%
PCI_REQ2#
R212 1
2 8.2K_0402_5%
PCI_REQ5#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
A3
B4
C5
B5
AE5
AD5
AG4
AH4
AD9
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4# / GPIO22
GNT4# / GPIO48
GPIO1 / REQ5#
GPIO17 / GNT5#
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
PCI_REQ0#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
B15
C12
D12
C15
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
PCI _IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
C26
A9
B19
PCI_PLTRST#
CLK_PCI_ICH
PCI_PME#
G8
F7
F8
G7
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI
Interrupt
PIRQA#
PIRQB#
PIRQC#
PIRQD#
I/F
GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#
MISC
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_REQ1# <23>
PCI_GNT1# <23>
PCI_REQ2#
PCI_GNT2#
PCI_REQ4#
+3VS
PCI_REQ5#
5
PCI_FRAME#
R526 1
AE9
AG8
AH8
F21
AH20
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_PCIRST#
<23>
<23>
<23>
<23>
PCI_IRDY# <23>
PCI_PAR <23>
R186
0_0402_5%
1
PCI_DEVSEL# <23>
PCI_PERR# <23>
U10
2 8.2K_0402_5%
PCI_RST#
PCI_RST# <23,29,31>
PCI_TRDY#
R530 1
@ TC7SH08FU_SSOP5
2 8.2K_0402_5%
+3VS
PCI_SERR# <23>
PCI_STOP# <23>
PCI_TRDY# <23>
PCI_FRAME# <23>
PCI_STOP#
R528 1
PCI_PLTRST#
1
2
CLK_PCI_ICH <15>
PCI_PME# <23,31>
PCI_PIRQE# <23>
Delete VGA_RST#
U11
PCI_DEVSEL#
2 8.2K_0402_5%
2 8.2K_0402_5%
R529 1
PLT_RST#
PLT_RST# <7,22,24>
@ TC7SH08FU_SSOP5
R179 1
R185
0_0402_5%
1
PCI_PIRQG#
MCH_ICH_SYNC# <7>
Place closely pin A9
ICH7_BGA652~D
CLK_PCI_ICH
B
R176
@ 10_0402_5%
C415
@ 8.2P_0402_50V
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

ICH7-M(1/4)
Size
Document Number
Rev
0.2
LA-3341P
Date:
Sheet

1
18
of
40
C370
18P_0402_50V8J
2
1
OUT
R517 1
20K_0402_5%
ICH_RTCX2
ICH_RTCRST#
ICH_INTVRMEN
SM_INTRUDER#
CLRP1
1
2
SHORT PADS
@ R608
47K_0402_5%
C381 @ 10P_0402_25V8K
2
1
1 R150
2
@ 10_0402_5%
ACZ_BITCLK
<25> ACZ_BITCLK
ACZ _SYNC
<25> ACZ_SYNC
R155
33_0402_5% 1
2 ACZRST#
<25,31> ACZ_RST#
ACZ_SDIN0
<25> ACZ_SDIN0
ACZ_SDOUT
<25> ACZ_SDOUT
<31> EC_RTCRESET
INTVRMEN
INTRUDER#
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LDRQ0#
LDRQ1# / GPIO23
AC3
AA5
LPC_DRQ0#
LFRAME#
AB3
LPC_FRAME#
A20GATE
A20M#
AE22
AH28
GATEA20
H_A20M#
H_CPUSLP_R#
DPRSLP#
H_DPSLP#
FERR#
AG26
H_FERR#
GPIO49 / CPUPWRGD
AG24
H_PW RGOOD
IGNNE#
INIT3_3V#
INIT#
INTR
AG22
AG21
AF22
AF25
H_IGNNE#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
R5
ACZ_RST#
T2
T3
T1
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
T4
IDE_LED#
ACZ_SDOUT
<22> PSATA_IRX_DTX_N0_C
<22> PSATA_IRX_DTX_P0_C
AF3
AE3
AG2
AH2
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
R516
AF7
AE7
AG6
AH6
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
1M_0402_5%
SM_INTRUDER#
<15> CLK_PCIE_SATA#
<15> CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_SATA
R127
AF1
AE1
SATA_CLKN
SATA_CLKP
+RTCVCC
+3VS
AH10
AG10
SATARBIASN
SATARBIASP
PD _IORDY
PD_IRQ
1 R126
1 R125
ICH_INTVRMEN
<22>
<22>
<22>
<22>
<22>
PD_IORDY
PD_IRQ
PD_DACK#
PD_IOW#
PD_IOR#
PD _IORDY
PD_IRQ
PD_DACK#
PD_IOW#
PD_IOR#
AG16
AH16
AF16
AH15
AF15
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
H_INIT#
H_INTR
2
AF23
AH24
H_SMI#
H_NMI
STPCLK#
H_STPCLK#
THERMTRIP#
AF26
THRMTRIP_ICH#
DA0
DA1
DA2
AH17
AE17
AF17
PD_A0
PD_A1
PD_A2
DCS1#
DCS3#
AE16
AD16
PD_CS#1
PD_CS#3
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
DDREQ
AE15
PD_DREQ
IDE
T23
1 R121 0_0402_5%
H_DPRSTP# <4,39>
H_DPSLP# <4>
56_0402_5% +VCCP
1
R114
H_FERR# <4>
H_IGNNE# <4>
H_INIT#
H_INTR
AH22
4.7K_0402_5% 2
8.2K_0402_5% 2
332K_0402_1%
+3VS
H_PWRGOOD <4>
SMI#
NMI
24.9_0402_1%
R519
KB_RST#
RCIN#
1 R122 10K_0402_5%
GATEA20 <31>
H_A20M# <4>
PAD
AG23
SATA
PSATA_IRX_DTX_N0_C
PSATA_IRX_DTX_P0_C
PSATA_ITX_DRX_N0_C
PSATA_ITX_DRX_P0_C
SATALED#
+RTCVCC
AF18
LPC_FRAME# <29,31>
2
AF24
AH25
U5
V4
T5
ACZ_BCLK
ACZ_SYNC
LPC_DRQ#0 <29>
AG27
LAN_RSTSYNC
U1
R6
CPUSLP#
LAN_CLK
EC_RTCRESET
<30> IDE_LED#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
TP1 / DPRSTP#
TP2 / DPSLP#
V3
U3
U7
V6
V7
AA6
AB5
AC4
Y6
AC-97/AZALIA
0.1U_0402_16V4Z
W4
Y5
LPC_AD[0..3] <29,31>
LAD0
LAD1
LAD2
LAD3
LAN
Q52
C828
RTCRST#
Delete INTEL LAN
@ 2N7002_SOT23
AA3
W1
Y1
Y2
W3
C707
1U_0603_10V4Z
1
2
RTXC1
RTCX2
RTC
+RTCVCC
U6A
AB1
AB2
<4>
<4>
1 R508 10K_0402_5%
KB_RST# <31>
+VCCP
+3VS
IN
NC
LPC
NC
H_SMI#
H_NMI
<4>
<4>
R119
1 R120
2
24.9_0402_1%
PD_A0
PD_A1
PD_A2
56_0402_5%
H_STPCLK# <4>
2
R144
10M_0402_5%
2
1
C356
18P_0402_50V8J
2
1
ICH_RTCX1
Y1
32.768KHZ_12.5P_1TJS125BJ4A421P
CPU
H_THERMTRIP# <4,7>
<22>
<22>
<22>
PD_CS#1 <22>
PD_CS#3 <22>
PD_DREQ <22>
ICH7_BGA652~D
PD_D[0..15]
<22> PSATA_ITX_DRX_N0
<22> PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
1
C353
PSATA_ITX_DRX_N0_C
2
3900P_0402_50V7K
PSATA_ITX_DRX_P0
1
C351
PSATA_ITX_DRX_P0_C
2
3900P_0402_50V7K
PD_D[0..15] <22>
LDO3
+RTCVCC
close ICH7
JP23
D26
BATT1.1
R488
1
3 1
2
DAN202U_SC70
W=20mils
+
1
BATT1
2
1K_0402_5%
C679
1U_0603_10V4Z
CR2032 RTC BATTERY

SUYIN_060003FA002TX00NL~D
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

ICH7-M(2/4)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
19
of
40
Place closely pin B2
+3VS
<25>
SB_SPKR
PAD T25
<4> ITP_DBRESET#
I CH_RI#
A28
RI#
SB_SPKR
SUS_STAT#
ITP_DBRESET#
A19
A27
A22
150_0402_5%
R221 1
2 ITP_DBRESET#
10K_0402_5%
R219 1
2 OCP#
SPKR
SUS_STAT#
SYS_RST#
<7> PM_BMBUSY#
<4>
<15> H_STP_PCI#
<15> H_STP_CPU#
10K_0402_5%
R159 1
2 SPI_CS#
10K_0402_5%
R223 1
2 BT_DET#
OCP#
PCI_CLKRUN#
GPIO0 / BM_BUSY#
B23
H_STP_PCI#
H_STP_CPU#
Remove EC_Flash# (GPIO28)
1K_0402_5%
R182 1
2 ICH_PCIE_WAKE#
AB18
PCI_CLKRUN#
AC20
AF21
GPIO18 / STPPCI#
GPIO20 / STPCPU#
A21
GPIO26
B21
E23
GPIO27
GPIO28
AG18
GPIO32 / CLKRUN#
AC19
U2
8.2K_0402_5%
R209 2
1 ICH_LOW_BAT#
10K_0402_5%
R153 1
WL_ON
2
<24> ICH_PCIE_WAKE#
<29,31>
SIRQ
<31> EC_THERM#
10K_0402_5%
R578 1
2 SPI_MOSI
<31,39>
VGATE
PCBEEP
<31>
EC_SMI#
EC_SMI#
AF19
AH18
AH19
AE19
AC1
B2
WAKE#
SERIRQ
THRM#
AD22
VRMPWRGD
AC21
AC18
E21
GPIO6
GPIO7
GPIO8
1
R136
@ 10_0402_5%
@ 10_0402_5%
GPIO
ICH7_BGA652~D
CLK_14M_ICH
CLK_48M_ICH
C20
ICH_SUSCLK
B24
D23
F22
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
AA4
ICH_POK
AC22
DPRSLPVR
TP0 / BATLOW#
C21
ICH_LOW_BAT#
PWRBTN#
C23
PWRBTN_OUT#
LAN_RST#
C19
LAN_RST#
RSMRST#
Y4
EC_RSMRST#
R514 10K_0402_5%
1
2
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
EC_SCI#
BT_DET#
PCBEEP
LID_OUT#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35 / SATAREQ#
GPIO38
GPIO39
@ 4.7P_0402_50V8C
C350
@ 4.7P_0402_50V8C
CLK_14M_ICH <15>
CLK_48M_ICH <15>
SUSCLK
GPIO16 / DPRSLPVR
C740
1 R507
2
100_0402_5%
SLP_S3#
SLP_S4#
SLP_S5#
GPIO33 / AZ_DOCK_EN#
GPIO34 / AZ_DOCK_RST#
ICH_PCIE_WAKE# F20
SIRQ
AH21
EC_THERM#
AF20
VGATE
CLK14
CLK48
GPIO11 / SMBALERT#
GPIO
10K_0402_5%
R156 1
2 SPI_MISO
OCP#
PM_BMBUSY#
SATA
GPIO
R172
1
2
8.2K_0402_5%
10K_0402_5%
R173 1
2 LINKALERT#
GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP
Clocks
+3VALW
SYS
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
R207 2
1 10K_0402_5%
R208 2
1
10K_0402_5%
+3VALW
+3VALW
1
C22
B22
A26
B25
A25
SMB
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
<15,24> ICH_SMBCLK
<15,24> ICH_SMBDATA
U6C
2.2K_0402_5%
2
2.2K_0402_5%
R539
R220
POWER MGT
R222
8.2K_0402_5%
R124 1
2 PCI_CLKRUN#
10K_0402_5%
R123 1
2 SIRQ
10K_0402_5%
R590 1
2
CLK_14M_ICH
+3VALW
Place closely pin AC1
CLK_48M_ICH
T28 PAD
SLP_S3#
SLP_S4#
SLP_S5#
<31>
<31>
<31>
R511
ICH_POK <7,31>
1
2 10K_0402_5%
DPRSLPVR <7,39>
PWRBTN_OUT# <31>
LAN_RST# <31>
CPUSB#
WL_ON
BT_ON#
EC_RSMRST# <31>
EC_SCI#
BT_DET#
PCBEEP
LID_OUT#
<31>
<28>
<27>
<31>
CPUSB#
WL_ON
BT_ON#
<31>
<24>
<28>
DPRSLPVR 2
1
R509
@ 100K_0402_5%
Need update symbol
<6/20> Remove New Card trace
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1 C389
1 C387
PCIE_RXN3
PCIE_RXP3
PCIE_C_TXN3
PCIE_C_TXP3
USB_OC#7
USB_OC#1
USB_OC#2
USB_OC#4
4
3
2
1
5
6
7
8
H26
H25
G28
G27
PERn2
PERp2
PETn2
PETp2
K26
K25
J28
J27
PERn3
PERp3
PETn3
PETp3
M26
M25
L28
L27
PERn4
PERp4
PETn4
PETp4
P26
P25
N28
N27
PERn5
PERp5
PETn5
PETp5
T25
T24
R28
R27
PERn6
PERp6
PETn6
PETp6
SPI_CS#
R2
P6
P1
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
P5
P2
SPI_MOSI
SPI_MISO
D3
C4
D5
D4
E5
C3
A2
B3
OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31
SPI
RP20
PERn1
PERp1
PETn1
PETp1
PCI-EXPRESS
<24>
<24>
<24>
<24>
To mini PCIE Card
F26
F25
E28
E27
DIRECT MEDIA INTERFACE
U6D
Delete 17" New Card PCIE traces
+3VALW
10K_1206_8P4R_5%
R175
10K_0402_5%
USB_OC#6 1
2
<28>
USB_OC#0
<28>
<29>
<29>
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V26
V25
U28
U27
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y26
Y25
W28
W27
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA28
AA27
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD25
AD24
AC28
AC27
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_CLKN
DMI_CLKP
AE28
AE27
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_ZCOMP
DMI_IRCOMP
C25
D25
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
USB20_N0
USB20_P0
USBRBIAS#
USBRBIAS
D2
D1
USBRBIAS
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
<7>
<7>
<7>
<7>
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
<7>
<7>
<7>
<7>
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
<7>
<7>
<7>
<7>
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
<7>
<7>
<7>
<7>
CLK_PCIE_ICH# <15>
CLK_PCIE_ICH <15>
R166 24.9_0402_1%
1
2
Within 500 mils

+1.5VS
USB20_N0 <28>
USB20_P0 <28>
Left side USB port
<6/12> Remove docking USB traces

USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
<28>
<28>
<29>
<29>
<29>
<29>
<28>
<28>
Left side USB port

Audio Board USB port
Audio Board USB port
BT module
<6/12> Remove New Card

R165 22.6_0402_1%
1
2
Within 500 mils

A
ICH7_BGA652~D
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

ICH7-M(3/4)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
20
of
40
+VCCP
U6F
F6
+3VS
2
220U_D2_4VM
+5VS
1
0.1U_0402_16V4Z
R518
C693
D18
C715
C739
0.1U_0402_16V4Z
CH751H-40_SC76
2
0.1U_0402_16V4Z
100_0402_5%
C714
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
ICH_V5REF_RUN
1
C697
0.1U_0402_16V4Z
Place closely pin

D28,T28,AD28.
C729
0.1U_0402_16V4Z
+5VALW +3VALW
R164
D8
CH751H-40_SC76
2
10_0402_5%
ICH_V5REF_SUS
C732
0.1U_0402_16V4Z
+3VS
C743
0.1U_0402_16V4Z
Place closely pin AG28 within 100mlis.

+1.5VS_DMIPLL
R129
1
0.5_0805_1%
2
0_0805_5%
C698
+3VALW
C734
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C800
+1.5VS
10U_1206_16V4Z
AG28
+1.5VS
C691
0.1U_0402_16V4Z
Place closely pin AG5.

+3VS
1
+1.5VS
C696
1U_0603_10V4Z
+1.5VS
C742
0.1U_0402_16V4Z
1
T30
T31
PAD
PAD
ICH_AA2
ICH_ Y7
Vcc3_3 / VccHDA
U6
VccSus3_3/VccSusHDA
R7
Vcc3_3[1]
VccDMIPLL
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9
Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
V5
V1
W2
W7
+3VALW
Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]
Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]
AA2
Y7
V5REF_Sus
AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5
Place closely pin AG9.
B27
+1.5VS_DMIPLL
C688
0.1U_0402_16V4Z
C349
22U_0805_10V4Z
R109
1
C352
0.01U_0402_16V7K
+1.5VS_DMIPLLR
+1.5VS
V5REF[2]
VccSus1_05/VccLAN1_05[1]
1
C721
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
A24
C24
D19
D22
G19
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
330U_V_2.5VK_R9
+3VS
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
P7
+ C708
+3VALW
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
W5
1U_0603_10V4Z
AE23
AE26
AH26
VccRTC
C711
V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]
VccSus3_3[1]
C695
1
2
C701
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+3VS
1
C694
0.1U_0402_16V4Z
1
2
C700
0.1U_0402_16V4Z
C690
22U_0805_10V4Z
+3VS
+RTCVCC
1
Vcc1_5_A[19]
Vcc1_5_A[20]
AB17
AC17
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
T7
F17
G17
Vcc1_5_A[24]
Vcc1_5_A[25]
AB8
AC8
C741
0.1U_0402_16V4Z
C723
0.1U_0402_16V4Z
+3VALW
C738
0.1U_0402_16V4Z
+3VALW
C720
0.1U_0402_16V4Z
+1.5VS
VccSus1_05[1]
K7
C699 0.1U_0402_16V4Z
ICH_K7
PAD
T32
VccSus1_05[2]
VccSus1_05[3]
C28
G20
ICH_C28
ICH_G20
T26
T29
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
+VCCP
C709
0.1U_0402_16V4Z
ICH_V5REF_SUS
0.1U_0402_16V4Z
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
C712
0.1U_0402_16V4Z
+1.5VS
D
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
C730
0.1U_0402_16V4Z
AD17
U6E
V5REF[1]
C737
0.1U_0402_16V4Z
G10
C731
0.1U_0402_16V4Z
ICH_V5REF_RUN
A1
H6
H7
J6
J7
PAD
PAD
+1.5VS
1
C727
0.1U_0402_16V4Z
A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
ICH7_BGA652~D
ICH7_BGA652~D
C375
0.1U_0402_16V4Z
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

ICH7-M(4/4)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
21
of
40
1
C449
1
C445
2
1U_0603_10V4Z
0.1U_0402_16V4Z
1
C464
C447
2
1U_0603_10V4Z
1
+
2
C832
330U_V_2.5VK_R9
C460
0.1U_0402_16V4Z
C468
1000P_0402_50V7K
C434
22U_1206_6.3V6M
+3VS
0.1U_0402_16V4Z
C457
0.1U_0402_16V4Z
C453
1000P_0402_50V7K
C439
22U_1206_6.3V6M
C831
330U_V_2.5VK_R9
+5VS
D
Pleace near HD CONN
Pleace near HD CONN
JP33
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
<19> PSATA_ITX_DRX_P0
C505
<19> PSATA_ITX_DRX_N0
3900P_0402_50V7K
2
1
<19> PSATA_IRX_DTX_N0_C
2
<19> PSATA_IRX_DTX_P0_C
1
2
3
4
5
6
7
PSATA_IRX_DTX_N0
PSATA_IRX_DTX_P0
C503
3900P_0402_50V7K
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
close SATA connector

+5VS
C
GND
A+
AGND
BB+
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SUYIN_127059FR022S305ZL
Main HDD
Need update symbol
Main SATA +5V Default
PD_D[0..15]
PD_D[0..15] <19>
Delete CD traces (JP25 pin1,2 and3)

JP25
B
<7,18,24> PLT_RST#
PLT_RST#
2 R217
1 33_0402_5%
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0
PD_IOW#
PD _IORDY
PD_IRQ
PD_A1
PD_A0
PD_CS#1
ACT_LED#
<19> PD_IOW#
<19> PD_IORDY
<19> PD_IRQ
<19> PD_A1
<19> PD_A0
<19> PD_CS#1
<30> ACT_LED#
+5VS
PRI_CSEL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
PD_DREQ
PD_IOR#
PD_DACK#
PDIAG#
PD_A2
PD_CS#3
+5VS
PD_DREQ <19>
PD_IOR# <19>
R157
PD_DACK# <19>
100K_0402_5%
1
2
PD_A2
<19>
PD_CS#3 <19>
1
1
+5VS
2
1
C371
1U_0603_10V4Z
+
C357
C835
330U_V_2.5VK_R9
10U_0805_10V4Z
2
+5VS
C380
0.1U_0402_16V4Z
SUYIN_800059MR050S119ZL
R147
470_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
CD-ROM Connector
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

HDD & CDROM

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
22
of
40
R36
300_0603_5%
1
2
ACTIVITY#
JP19
+3VALW
12
Amber LED-
11
Amber LED+
PR4+
PR2-
PR3-
PR3+
MDO1+
PR2+
MDO0-
PR1-
MDO0+
PR1+
MDO1D
PCI_AD[0..31]
<18> PCI_AD[0..31]
R912
3.6K_0402_5%
1
2
U41
1
R916
<18> PCI_PERR#
<18> PCI_SERR#
<18> PCI_REQ1#
<18> PCI_GNT1#
B
<18> PCI_PIRQE#
<18,31> PCI_PME#
<18,29,31> PCI_RST#
<15> CLK_PCI_LAN
92
77
60
44
C/BE#0
C/BE#1
C/BE#2
C/BE#3
LAN_IDSEL
100_0402_5%
PCI_PAR
PCI_FRAME#
PCI _IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
46
IDSEL
76
61
63
67
68
69
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PCI_PERR#
PCI_SERR#
70
75
PERR#
SERR#
PCI_REQ1#
PCI_GNT1#
30
29
REQ#
GNT#
25
INTA#
PCI_PME#
31
PME#
PCI_RST#
27
CLK_PCI_LAN 28
65
1
2
R915
10K_0402_5%
4
17
128
CLK_PCI_LAN
@ R905
10_0402_5%
@ C914
10P_0402_50V8K
2
A
LED0
LED1
LED2
NC/LED3
117
115
114
113
ACTIVITY#
LINK_100#
AT93C46-10SI-2.7_SO8
1
2
5
6
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
NC/M66EN
88
NC/AVDDH
NC/HV
10
120
NC/HSDAC+
NC/HG
NC/LG2
NC/LV2
11
123
124
126
0.1U_0402_16V4Z
9
13
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
22
48
62
73
112
118
LAN_X1
LAN_X2
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
26
41
56
71
84
94
107
R900
R901
R902
2 1K_0402_5%
2 15K_0402_5%
2 5.6K_0603_1%
1
1
1
C917
0.1U_0402_16V4Z
1
2
RXIN+/MDI1+
RXIN-/MDI1-
+3VS
R313 5.6K for 8100CL
8
7
6
3
2
1
TDTD+
CT
CT
RDRD+
TXTX+
CT
CT
RXRX+
9
10
11
MDO0+
MDO0MCT0
14
15
16
MCT1
MDO1+
MDO1-
R910
75_0402_5%
2
1
2
1
R911
75_0402_5%
C920
1U_0603_10V4Z
1
2
CTRL25
C486
RJ45_GND 2
1000P_1206_2KV7K
Q900
2SB1188_SC62
TXD+/MDI0+
V2.5_LAN
R906
49.9_0402_1%
2
1
C925
0.01U_0402_16V7K
2
1
2
1
R907
49.9_0402_1%
C919 4.7U_0805_10V4Z
1
2
+3VALW
1
1
C901
0.1U_0402_16V4Z
1
C902
0.1U_0402_16V4Z
1
C903
0.1U_0402_16V4Z
close to magnetic
1
C904
0.1U_0402_16V4Z
C905
0.1U_0402_16V4Z
RXIN+/MDI1+
3
7
20
16
+3VALW
1
2
32
54
78
99
1
C906
0.1U_0402_16V4Z
R908
49.9_0402_1%
2
1
C926
0.01U_0402_16V7K
2
1
2
1
R909
49.9_0402_1%
1
C907
0.1U_0402_16V4Z
C908
0.1U_0402_16V4Z
V2.5_LAN
1
C909
0.1U_0402_16V4Z
24
45
64
110
116
V_12P
1
C913
12
RTL8100CL_LQFP128
1
C910
0.1U_0402_16V4Z
R904
0_0402_5%
1
2
1
C911
0.1U_0402_16V4Z
C912
0.1U_0402_16V4Z
V2.5_LAN
0.1U_0402_16V4Z
Compal Secret Data
2005/03/01
Issued Date
2005/04/06
Deciphered Date
Title
LAN-8100CL
5
Green LED+
close to chip
RXIN-/MDI1-
AVDD25/HSDAC-
13
Green LED-
U12
TXD+/MDI0+
TXD-/MDI0-
C916 27P_0402_50V8J
1
2
8
125
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
14
SHLD1
+3VALW
RTT3/CRTL18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
SHLD2
SUYIN_100073FR012S100ZL
TXD-/MDI0-
AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL
+3VALW
+3VALW
NS0013_16P
NC/VSS
NC/VSS
GND/VSS
GND/VSS
GND/VSS
GND
GND
GND
GND
C918
10
15
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
105
23
127
72
74
CLK
CLKRUN#
35
52
80
100
LINK_100#
Y6 25MHZ_16P_XSL025000FK1H
121
122
RST#
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND
NC
NC
VCC
5
6
7
8
R43
300_0603_5%
1
2
16
SHLD3
C915 27P_0402_50V8J
1
2
14
15
18
19
X1
X2
CTRL25
21
38
51
66
81
91
101
119
DO
DI
SK
CS
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_PIRQE#
4
3
2
1
PCI_AD24
<18>
PCI_PAR
<18> PCI_FRAME#
<18> PCI_IRDY#
<18> PCI_TRDY#
<18> PCI_DEVSEL#
<18> PCI_STOP#
LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
EEDO
AUX/EEDI
EESK
EECS
108
109
111
106
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
LAN I/F
<18>
<18>
<18>
<18>
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Power
104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33
U90
PCI I/F
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
+3VALW
SHLD4
PR4-

Custom
Date:
Rev
0.2
LA-3341P
Sheet

1
23
of
40
Mini-Express Card(Slot 1-WLAN)

2
1 C608
0.1U_0402_16V4Z
JP18
C797 1
@ 0.1U_0402_16V4Z
WL_ON
<20>
PLT_RST# <7,18,22>
PLT_RST#
+3VALW
ICH_SMBCLK
ICH_SMBDATA
+3VS
ICH_SMBCLK <15,20>
ICH_SMBDATA <15,20>
47K
D2
2
LED_WLANOUT#
10K
LED_WLAN_OUT# 1
WLED#
Q48
DTA114YKA_SC59
BAS16_SOT23
MOLEX_67910-0002
<20> PCIE_TXN3
<20> PCIE_TXP3
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
<20> PCIE_RXN3
<20> PCIE_RXP3
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
+1.5VS
1
R592
470_0402_5%
2
1
WL_LED# <16,29>
2
G
Q49
S
2N7002_SOT23
3
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
+3VS
2
4
6
8
10
12
14
16
CLK_PCIE_MCARD#
CLK_PCIE_MCARD
2
4
6
8
10
12
14
16
0.1U_0402_16V4Z
2 100_0402_5%
1
3
5
7
9
11
13
15
0.1U_0402_16V4Z
C167
<15> CLK_PCIE_MCARD#
<15> CLK_PCIE_MCARD
1 R600
1
3
5
7
9
11
13
15
C78
<20> ICH_PCIE_WAKE#
<28> WL_PRIORITY
<28> BT_PRIORITY
<15> CLKREQA#
R593
100K_0402_5%
R594
100K_0402_5%
2
G
Q50
S
2N7002_SOT23
3
<28> WIRELESS_LED_BT
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
A
Title

Mini Card

Custom LA-3341P
Date:
Rev
0.2
Sheet

E
24
of
40
+3VAMP_CODEC
+VDDA_CODEC
U26
W=40Mil
MONO_IN
MONO_IN1
<6/12> Remove PCM_SPK

1
Q28
R422
560_0402_5%
2 1
2
MONO_INR <27>
VIN
DELAY
(3.33V)
250mA
VOUT
R385 7
2
10K_0402_5%
SENSE or ADJ
CNOISE
GND
ERROR
SD
1
2
R392
47K_0603_1%
R403
27K_0603_1%
1
C565
SI9182DH-AD_MSOP8
C533
1U_0603_10V4Z
@ C538
0.1U_0402_16V4Z
R409
5.1K_0402_5%
2
0.01U_0402_16V7K
SB_SPKR <20>
@ C502
0.1U_0402_16V4Z
1
2
For Layout:
MMBT3904_SOT23
C563
1U_0603_10V4Z
1
2 MONO_INR
R411
0_0402_5%
1
2
R408
10K_0402_1%
C526
0.1U_0402_16V4Z
C504
10U_0805_10V4Z
+5VS
Place decoupling caps near the

power pins of SmartAMC
device.
<26> DIB_DATAN
<26> DIB_DATAP
<19>
<19>
<19>
<19>
ACZ_BITCLK
ACZ_SYNC
ACZ_SDIN0
ACZ_SDOUT
1
2
C570
150P_0402_50V8J
R418
R417
R420
R419
1
1
1
1
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
47
48
3
4
DIBN
DIBP
PWRCLKP
PWRCLKN
R407
R158
R421
R151
1
1
1
1
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
13
10
8
7
BCLK
SYNC
SDI
SDO
43
PCBEEP
MONO_INR
R152
10K_0402_5%
15
16
@C516
0.1U_0402_16V4Z
1
2
+VDDA_CODEC
R423
0_1206_5%
1
2
@ R300
0_1206_5%
1
2
GNDA
<27,29>
25
35
+CODEC_REFF
R386
2.2K_0402_5%
AVDD1
AVDD2
VREF_FILT
VREF
VC
DVSS1
DVSS2
DVSS3
VSUB
23
19
18
2
5
46
6
0.1U_0402_16V4Z
C562
0.1U_0402_16V4Z
C549
1U_0603_10V4Z
C547
0.1U_0402_16V4Z
C548
REF_FILT
VREF
VC
1
XTALIN
XTALOUT
R149
10K_0402_5%
RST#
VSSCK
<26> PWRCLKP
<26> PWRCLKN
11
R404
0_0805_5%
1
2
R387
2.2K_0402_5%
GND
GNDA
MIC_INR
MIC_INL
C539 1
C540 1
+CODEC_REFF
2 10U_0805_10V4Z
2 10U_0805_10V4Z
ACZ_RST#
<19,31> ACZ_RST#
17
C571
150P_0402_50V8J
MIC_R
MIC_L
MICBIAS_F
MICBIAS_C
MICBIAS_B
26
27
20
21
22
CD_L
CD_GND
CD_R
28
29
30
PORT-A_L
PORT-A_R
40
39
PORT-B_L
PORT-B_R
38
37
<6/12> Remove Docking line out
PORT-C_L
PORT-C_R
34
33
<6/12> Remove Docking MIC
PORT-D_L
PORT-D_R
32
31
EAPD
SPDIF_OUT
45
44
EAPD
SPDIFO
SENSEA
SENSEB
41
42
SENSEA
SENSEB
MIC_R
MIC_L
<29>
<29>
Delete CD traces
LINE_OUTL
LINE_OUTR
AVSS1
AVSS2
24
36
DVDD1
DVDD2
DVDD3
C559
1U_0603_10V4Z
U27
C546
0.1U_0402_16V4Z
C564
0.1U_0402_16V4Z
14
VDDCK
+3VAMP_CODEC
1
9
12
C568
0.1U_0402_16V4Z
C569
0.1U_0402_16V4Z
C566
0.1U_0402_16V4Z
C560
10U_0805_10V4Z
C567
0.1U_0402_16V4Z
+3VDD_CODEC
R401
0_0805_5%
1
2
+3VALW
@ C519
0_0402_5%
1
2
LINE_OUTL <27>
LINE_OUTR <27>
SPDIFO
<29>
R414
1
2
20K_0402_5%
SENSEA
HP_DET# <27>
CX20551-22_TQFP48
2
<6/12> Remove JACK_DET from Docking

R410
1.5K_0402_5%
SENSEB
R405
1
2
5.1K_0402_5%
R393
0_0402_5%
MIC_DET <29>
+3VS
JACK_DET#
PORT-A
ON
PORT-B
OFF
Disable
EQ
NC
ON
OFF
Disable
NC
OFF
ON
Disable
R591
100_0402_5%
1
HP_DET#
MIC_DET
ON
PORT-C
PORT-F
ON
OFF
NC
OFF
ON
OFF
Enable
NC
NC
MUTE_LED <29>
EAPD
S Q47
2N7002_SOT23
2
G
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
A
Title

AMOM_codec

Custom LA-3341P
Date:
Rev
0.2
Sheet

E
25
of
40
MTP28
MTP52
VDD
MTP26
MTP59
BR908_CC
1
MC928
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
2
0_0402_5%
MR924
MTP61
PRI
SEC
@ 30U_82154R_1%_1:1.67
MC974
@ 0.001U_0402_50V7M
@ HEADER8
MJ1B
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
MC944
24
1
2
DIB_P
27
DIB_N2
28
DIB_N
MTP62
MC976
2
2
0.001U_0402_50V7M
0.1U_0402_10V6K
AGND_LSD
Vc
VRef
8
22
25
NC1
NC2
NC3
29
PADDLE
AGnd
DVdd
1
DIB_P2
Vref_LSD
MC940
1U_0603_6.3V6M
MTP63
1
1
1
18
Vc_LSD
TAC2
TRDC
12
EIC
11
RXI
GPIO1
RBias
VZ
10
EIO
17
2
1
E&T_3800-02
MTP42
2
4
MJ1
PWR+
EIF
16
TXO
14
TXF
13
CX20493-58_QFN28
1 3
MTP73
MJ2
MTP65
MR938
110_0603_5%
MTP31
MR928
27_0805_5%
2
DIB_N1
MT922
MR922
0_0402_5%
2
19
2 10P_1808_3KV
MTP25
RAC2
DIB_P1
20
MTP41
MC924 1
AGND_LSD
TAC1
MTP72
2 10P_1808_3KV
1 MTP35
1 MTP38
MFB902
RING_2
MOD_RING
1
2
1 MTP39
MR902
MMZ1608D301BT_0603
1M_0805_5%
MC902
RAC1
MC906
1
2 RAC1/RING
1
2 0.033U_1206_100V7K
1
470P_1808_3KV
MC904
TAC1
MBR904
2
1 TAC1/TIP
1
2 0.033U_1206_100V7K
MMBD3004S_SOT23
1M_0805_5%
2
MTP34
MR904
TIP_2
1
MTP40 1
TRDC
MR906 1
2 6.8M_0805_5%
1
MTP33
1
MC958
MC918
AGND_LSD
GND
1
1 MTP32
EIC
1
2
0.1U_0603_16V7K
MBR906
MC908
0.015U_0603_25V7K 2
MR910
MMBD3004S_SOT23 470P_1808_3KV
2
237K_0805_1%
AGND_LSD
RXI 1
RXI-1
2
1 MTP71
MFB904
TIP_2
MOD_TIP
1
2
1 MTP70
MMZ1608D301BT_0603
AGND_LSD
RBias 1
MR9542
59K_0402_1%
1
2 MC966
MTP69
MC910
0.01U_0805_100V7M
VZ 1 1 MR908 2
BRIDGE_CC
1
2
0.047U_1206_100V7K
348K_0805_1%
AGND_LSD
MTP68
MTP67
C
1
EIO 1
MQ902
2
B
PMBTA42_SOT23
Use 59K_0402_1% for MR954
E
EIF
MQ904
C
1
TXO
MQ906
2
B
PMBTA42_SOT23
FZT458TA_SOT223
E
MTP66
1
TXF
1 MTP64
1
1
MC922 1
<25> DIB_DATAN
AVdd
1
<25> DIB_DATAP
21
MTP30
PWR+
MTP60
Check 0.047u or 10p cap
C906 and C908 must be Y3 type

Capacitors for Nordic
Countries only
MTP37
30U_82154R_1%_1:1.67
MTP27
CLK
RAC1
DGnd
SEC
26
MTP36
DGND_LSD
23
PRI
MC970
0.1U_0402_10V6K
DC_GND
MTP24
PCLK
1
2
MMZ1608D301BT_0603
1
MBR908B
BAV99DW-7_SOT363
15
PWRCLKP
MC962
47P_0603_50V8J
<25>
MFB906
MTP58
MU902
MRV902
TB3100M-13-01_SMB
MTP23
AGND_LSD
PWRCLKN
MR932
MC926
15K_0402_5%
10P_0402_50V8J
1
2CLK2 1
2 CLK
<25>
4BR908_AC1
1
MT902
MC978
0.1U_0402_10V6K
2
VDD
1
MC930
2.2U_0805_10V6K
1
MTP29
MTP22
MBR908A
BAV99DW-7_SOT363
0.1U_0402_10V6K
1
2
@ HEADER8
GND
MTP49
AGND_LSD
DGND_LSD AGND_LSD
AGND_LSD
Compal Secret Data
Issued Date
AGND_LSD
2005/03/10
Deciphered Date
2006/03/10
Title

AMOM_modem

Custom LA-3341P
Date:
Rev
0.2
Sheet
26
of
40
+5VAMP
R322
0_1206_5%
1
2
0.1U_0402_16V4Z
1
C462
10U_0805_10V4Z
+5VS
HEADPHONE OUT/LINE OUT
C479
2
Gain Settings
C501
2
GAIN0
GAIN1
SE/BTL#
Av(inv)
0.1U_0402_16V4Z
C509 1
HP_C_OUTR
20
2 0.47U_0603_16V7K
19
RHPIN
RIN
LOUTLOUT+
ROUTROUT+
9
4
16
21
SPKLSPKL+
SPKRSPKR+
SPKL+
<29>
SPKR+
<29>
10 dB
LHPIN
LLINEIN
HP/LINE#
U45
PCBEEP
+5VS
1
2
3
6
5
4
IN
NO
V+
COM
GND
NC
C477 1
2 0.47U_0603_16V7K
14
22
<31> EC_MUTE#
17
GAIN1
GAIN0
PC-BEEP
BYPASS
<25> MONO_INR
21.6 dB
4.1 dB
@ R368
100K_0402_5%
JP11
11
SHUTDOWN#
PI5A4599ACEX
15.6 dB
3
2
GND1
GND2
GND3
GND4
<20>
R371
100K_0402_5%
1
12
13
24
@ R373
100K_0402_5%
C511
0.1U_0402_16V4Z
TPA0312PWPRG4_TSSOP24
R364
100K_0402_5%
SPKL+
SPKLSPKR+
SPKR-
1
2
3
4
+5V
+5VS
1
2
3
4
ACES_85205-0400
C496
47P_0402_50V8J
HP_C_OUTL
HP_DET
15
2 0.047U_0603_16V7K LINE_C_OUTL
SE/BTL#
2 0.47U_0603_16V7K
C507 1
LIN
C508 1
10
<25> LINE_OUTL
2 0.47U_0603_16V7K
C510 1
+5VS
C499
47P_0402_50V8J
2 0.47U_0603_16V7K
6 dB
* 10 dB
C498
47P_0402_50V8J
C476 1
RLINEIN
C497
47P_0402_50V8J
2 0.047U_0603_16V7K LINE_C_OUTR 23
PVDD2
PVDD1
C475 1
VDD
U21
<25> LINE_OUTR
18
7
R353
10K_0402_5%
R345
10K_0402_5%
HP_DET
D
Q13
HPDET#
2
G
3
2N7002_SOT23 S
HPDET# <29>
+5V
C785
1
U44
1
4
OE#
HP_DET#
<25>
0.1U_0402_16V4Z
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
A
Title

AMP & Audio Jack

Custom LA-3341P
Date:
Rev
0.2
Sheet

E
27
of
40
+5V
+USB_VCCB
U38
3
4
0.1U_0402_16V4Z
VIN
VOUT
VIN/CE VOUT
1
5
C754
2
1
R542
GND
RT9701PBL_SOT25
10K_0402_5%
USB_OC#0
1 R543
2
0_0402_5%
USB_OC#0 <20>
USB_OC#3
USB_OC#3 <20>
R544
20K_0402_5%
USB CONNECTOR (Left side)

JP26
Change to Aluminum Cap
W=40mils
9
10
11
12
5
6
7
8
5
6
7
8
USBP3+
USBP3-
R523 1
R532 1
2 0_0603_5% USB20_P3
USB20_P3 <20>
2 0_0603_5% USB20_N3
USB20_N3 <20>
+USB_VCCB
W=40mils
GND
GND
GND
GND
SUYIN_020122MR008S573ZR
C394
0.1U_0402_16V4Z
1
2
3
4
C397
1000P_0402_50V7K
C789
100U_6.3V_M
1
2
3
4
2 0_0603_5% USBP0+
2 0_0603_5% USBP0C400
1000P_0402_50V7K
USB20_P0 R535 1
USB20_P0
USB20_N0 R537 1
USB20_N0
+USB_VCCB
1
C401
0.1U_0402_16V4Z
<20>
<20>
1
1
@ C408
150U_D_6.3VM
<6/19> Remove C736 (not reserved)
BT CONNECTOR
U9
1
D1+
D2+
GND
VCC
D2-
D1-
USBP3-
<20>
Reserve Blueooth
BT_ON#
1
USBP0+
+USB_VCCB
BT@R541
100K_0402_5%
G
USBP0-
@ IP4220CZ6_SO6
USBP3+
1 +3V_BT
3
1
BT@ C108
1U_0603_10V4Z
1
2
BT@ C118
1U_0603_10V4Z
+3VALW
AO3419_SOT23
BT@ Q2
JP6
<20> USB20_P6
<20> USB20_N6
<24> WIRELESS_LED_BT
<24> WL_PRIORITY
BT@
1 R601
<24> BT_PRIORITY
<20> BT_DET#
USB20_P6
USB20_N6
WIRELESS_LED_BT
2100_0402_5%
BT_DET#
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
ACES_87213-0800
C808
@ 0.1U_0402_16V4Z
Compal Secret Data
Issued Date
BT@C611
0.1U_0402_16V4Z
2005/03/10
Deciphered Date
2006/03/10
Title

Bluetooth & USB CONN.

Custom LA-3341P
Date:
Rev
0.2
Sheet
28
of
40
D38
KSO2 1
D39
KSO7
Power BTN
KSI1 1
5 KSO9
D11
DAN202U_SC70
R396
1
ON/OFF#
3
2
ON/OFFBTN#
100K_0402_5%
2
LDO3
ON/OFF# <31>
1
1
KSO3 3
4 KSO13
KSI5 3
D42
KSO141
4 KSI2
D43
5 KSO15
KSI3 1
5 KSO1
4 KSO10
<31,36>
EC_ON
EC_ON
R603
2
1
0_0402_5%
1
C544
D12
R383
4.7K_0402_5%
RLZ20A_LL34
1000P_0402_50V7K
R604
@ 0_0402_5%
WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
2
G
Q25
@ 2N7002_SOT23
ACES_85201-2405
KSO113
5 KSO0
Q26
DTC124EK_SC59
KSO5 3
LDO5
Consumer IR
4 KSI0
KSI4 1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
5 KSO12
EC_PWR_ON# <34>
KSO6 1
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
D41
D40
LDO3
JP8
KSO[0..16] <31>
C809
0.1U_0402_16V4Z
ESD
15.4 ( TYPE "C" KB)
4 KSI6
KSI7 3
KSO8
KSO[0..16]
KSO4 3
<31>
KSI[0..7]
KSI[0..7]
D44
C442
0.1U_0402_10V6K
+5V
KSO161
@
2
<31>
KSO_D_17
KSO_D_173
CIR@ R569
100_0402_5%
TP to MB CONN(15.4)
1
<31>
<31>
2
1
2
3
4
5
6
7
JP7 8
ACES_87152-0807
CIR@
C784
10U_0805_10V4Z
TP_DATA
TP_CLK
TP_DATA
TP_CLK
<31>
CIR@ C783
0.1U_0402_10V6K
U43 CIR@
3
4
CIR_ IN
CIR_IN
Vs
OUT
GND
GND
1
2
TSOP36236TR_4P
R612
10K_0402_5%
1
2
LDO3
JP5
LPC_AD[0..3] <19,31>
LPC_FRAME# <19,31>
LPC_DRQ#0 <19>
PCI_RST# <18,23,31>
<16,24> WL_LED#
<31> VOL_UP#
<31> VOL_DWN#
<31>
LID_SW#
<31> NUMLED#
<25> MUTE_LED
@ R424
10K_0402_5%
2
1
CLK_PCI_SIO <15>
SIRQ
<20,31>
SIRQ
ON/OFFBTN#
KSI0
KSI1
KSI3
KSI4
KSO_D_17
WL_LED#
VOL_UP#
VOL_DWN#
LID_SW#
NUMLED#
MUTE_LED
KSI0
KSI1
KSI3
KSI4
PWR_ACTIVE#
<31> PWR_ACTIVE#
+5VALW
<31> PA_LED_ALW
<30> PR_LED_ALW
+5V
ACES_85201-2005
PA_LED_ALW
PR_LED_ALW
PA_LED
PR_LED
<30> PR_LED
+5VS
PA_LED_VS
PR_LED_VS
<30> PR_LED_VS
+3VALW
VOL_DWN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
KSI0 1
<20>
KSI3
KSI1 3
+5V
JP9
<20>
4KSO_D_17
USB_OC#4
USB_OC#4
NUP5120X6T1_SOT563-6
<25>
NUMLED# C795
2 100P_0402_50V8J
C796
2 100P_0402_50V8J
+5VALW
WL_LED#
LID_SW#
MUTE_LED
PWR_ACTIVE#
PA_LED_ALW
PR_LED_ALW
PA_LED
PR_LED
PA_LED_VS
PR_LED_VS
C810
C813
C814
C815
C816
C817
C818
C819
C820
C821
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
SPDIFO
<20>
<20>
3
<20>
2N7002_SOT23
<20>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
USB20_P4
USB20_N4
OVCUR#4
USB20_P4
USB20_N4
USB20_P5
USB20_N5
USB20_P5
USB20_N5
SPDIFO_R
1
2
FBMA-L10-201209-301LMT
1
<25>
C822
220P_0402_25V8K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+5V
Q10
MIC_L
MIC_L
<25>
2
+5VS
MIC_R
<25>
<27>
<27>
<27>
MIC_DET
HPDET#
SPKR+
SPKL+
MIC_R
MIC_DET
HPDET#
SPKR+
SPKL+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ACES_87213-2000
SM05_SOT23
Compal Secret Data

2005/03/10
Issued Date
2006/03/10
Deciphered Date
4
L32
Audio board conn
USB_OC#5
USB_OC#5
5 KSI4
ESD
R274
0_0402_5%
ACES_85201-2505
D47
VOL_UP#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
2
G
<31>
<31>
<31>
<31>
+3VS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
PCI_RST#
D45
Switch board conn
FOR LPC SIO DEBUG PORT
+5VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
JP15
Title

KBD,ON/OFF,T/P,LED/B,DEBUG

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
29
of
40
For PR
D
FOR POWER BUTTON BACKLIGHT SYSTEM POWER

"Right Angle"
+5VS
<31> PMLED_1#
PMLED_1#
R425
560_0402_5%
1
2
D13
2
PR_LED
<29>
12-21UYOC/S530-A2/TR8_YEL
+5VS
R570
20K_0402_5%
+3VS
<31> BATLED_0#
R426
560_0402_5%
BATLED_0# 2
1
D14
2
3
R568
10K_0402_5%
1
2
ACT_LED#
ACT_LED#
U48
O
IDE_ACT_LED#
R427
560_0402_5%
1
2
D15
2
PR_LED_VS <29>
1
3
IDE_LED#
<22>
IDE_LED#
1
<19>
PR_LED_ALW <29>
SN74AHCT1G08DCKR_SC70
C
C830 1
0.1U_0402_16V4Z
2
<31> CAPSLED#
R92
560_0402_5%
CAPSLED# 1
2
D7
1
PR_LED_VS
17-21UYOC/S530-A2/TR8_ORG
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
Title

INDICATE LED

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
30
of
40
Cd(uF)=T(ms) / 1685
Cd=2700PF ------> T=3.6ms
0.1U_0402_16V4Z
0.01U_0402_16V7K
1
C527
2
C512
2
C551
2
C550
2
0.1U_0402_16V4Z
5
CD
<20>
EC_SCI#
C525
@ 0.1U_0402_16V4Z
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO[0..16]
KSO[0..16]
R586 2
GM_PM#DET
@ R399
10_0402_5%
3/29 Design Change

@ C556
15P_0402_50V8J
<29> KSO_D_17
INVT_PWM/GPIO0F/PWM1
BEEP#/GPIO10/PWM2
OUT BEEP/GPIO12/PWM3
ACOFF/GPIO18/PWM4
FAN SPEED1/GPIO14/FANFB1
FAN SPEED2/GPIO15/FANFB2
25
27
30
31
32
33
INVT_PWM
CONA#
PGD_IN
ACOFF
FAN_SPEED1
VOL_DWN#
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
91
92
93
94
95
96
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO_D_17
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
89
90
key Matrix
scan
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
EC URXD/KSO16/GPIO48
EC UTXD/KSO17/GPIO49
EXPCRD_RST#
PWR_ACTIVE#
DOCK_VOL_UP#
TP_CLK
TP_DATA
ADB0/D0
ADB1/D1
ADB2/D2
ADB3/ D3
ADB4/D4
ADB5/D5
ADB6/D6
ADB7/D7
KBA0/A0
KBA1/A1
KBA2/A2
KBA3/A3
KBA4/A4
KBA5/A5
KBA6/A6
KBA7/A7
KBA8/A8
KBA9/A9
KBA10/A10
KBA11/A11
KBA12/A12
KBA13/A13
KBA14/A14
KBA15/A15
KBA16/A16
KBA17/A17
KBA18/A18
KBA19/A19
125
126
128
130
131
132
133
134
111
112
113
114
115
116
117
118
119
120
121
122
123
124
110
109
108
107
106
98
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1
88
87
86
85
EC SMD2/ GPIO47/SDA2
EC SMC2/GPIO46/SCL2
EC SMD1/GPIO44/SDA1
EC SMC1/GPIO44/SCL1
SELIO2#/ GPIO43
SELIO#/ GPIO50
FRD#/RD#
FWR#/WR#
FSEL#/SELMEM#
84
97
135
136
144
PS2 interface
Data
BUS
EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1
UTXD
SLP_S4#
PMLED_1#
NUMLED#
BATLED_0#
GM_PM#DET
CAPSLED#
CPUSB#
SYSON
<20>
SLP_S4#
<30> PMLED_1#
<29>
NUMLED#
<30> BATLED_0#
<30> CAPSLED#
<20>
CPUSB#
<33,37> SYSON
C RY2
C RY1
+3VS
140
138
C517
10P_0402_50V8K
XCLKO
XCLKI
KB910LQF_LQFP144
1
R372
10K_0402_5%
1
2 VOL_UP#
ALI/MH#/GPIO40
FSTCHG/GPIO41
VR ON/ GPIO42
GPIO57/GPIO57
GPIO58/GPIO58
GPIO59/GPIO59
@ R325
1K_0402_5%
2
BID
C463
0.22U_0603_10V7K
2
INVT_PWM <16>
CONA#
PGD_IN <39>
ACOFF
<35>
FAN_SPEED1 <4>
VOL_DWN# <29>
R333
2K_0402_5%
VOL_UP#
ACZ_RST# <19,25>
EXPCRD_RST#
PWR_ACTIVE# <29>
ADB[0..7]
C921 1
2 68P_0402_50V8J
VOL_DWN# C922 1
2 68P_0402_50V8J
LID_SW#
2 68P_0402_50V8J
C923 1
TP_CLK
<29>
TP_DATA <29>
<6/3> To eliminate coupling noise
ADB[0..7] <32>
KBA[0..19]
KBA[0..19] <32>
EC_ON
ACIN
EC_THERM#
ON/OFF#
VOL_UP#
ICH_POK
FRD#
FWR#
FSEL#
<32>
<32>
<32>
R581
100K_0402_5%
EC_ON
<29,36>
ACIN
<34,36>
EC_THERM# <20>
ON/OFF# <29>
VOL_UP# <29>
ICH_POK <7,20>
AIR_ACIN
81
AIR_ACIN <35>
FSTCHG
82
FSTCHG <35>
VR_ON
83
VR_ON
137 R365 2
1 0_0402_5%
VGATE
CIR_ IN
142
CIR_IN
<29>
EC_MUTE#
143
EC_MUTE# <27>
<39>
<20,39>
LDO3
0_0603_5%
R327
R326
2
1
0_0603_5%
EC DEBUG port
ECAGND
C474
2
+EC_AVCC
0.1U_0402_16V4Z
JP20
1
2
3
4
R330
10K_0402_5%
1
2 DOCK_VOL_DWN#
1
2
3
4
ACES_85205-0400
LDO5
UTXD
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
5
<35>
ADP_I
NV_ENBKL
NV_ENBKL
DOCK_VOL_DWN#
FR D#
FWR#
FSEL#
41
43
29
36
45
46
C522
10P_0402_50V8K
R402
10K_0402_5%
1
2 VOL_DWN#
R331
10K_0402_5%
1
2 DOCK_VOL_UP#
DAC_BRIG <16>
EN_FAN1 <4>
IREF
<35>
EC_RTCRESET <19>
2
R332
10K_0402_5%
TP_CLK
EC ON/ GPIO1B
AC IN/ GPIO1C
ECTHERM#/GPIO11
ONOFF/GPIO18
PCMRST#/GPIO1E
WL OFF#/GPIO1F
AGND
TP_DATA
EC_RSMRST#/ GPIO02
BKOFF#/GPIO03
PM SLP S3#/GPIO04
EC LID OUT#/GPIO06
PM SLP S05#/ GPIO07
EC SMI#/GPIO08
EC SWI#/GPIO09
LID SW#/ GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC PME#/GPIO0D
32.768KHZ_12.5P_MC-146
2
Y7
4
7
8
16
17
18
19
20
21
22
23
2 R394
1 FSEL#
10K_0402_5%
2 R390
1 FR D#
10K_0402_5%
2 R585
1 LID_SW#
@ 10K_0402_5%
+5V
R335
10K_0402_5% 2
R336
10K_0402_5% 2
EC_RSMRST#
BKOFF#
SLP_S3#
LID_OUT#
SLP_S5#
EC_SMI#
LAN_RST#
LID_SW#
SUSP#
PWRBTN_OUT#
PCI_PME#
<20> EC_RSMRST#
<16>
BKOFF#
<20>
SLP_S3#
<20>
LID_OUT#
<20>
SLP_S5#
<20>
EC_SMI#
<20>
LAN_RST#
<29>
LID_SW#
<33,37,38> SUSP#
<20> PWRBTN_OUT#
<18,23> PCI_PME#
LDO3
77
2 R339
1 EC_SMD_1
10K_0402_5%
2 R340
1 EC_SMC_1
10K_0402_5%
PCM_SPK#/EMAIL_LED#/ GPIO16
SB_SPKR/PWR_SUSP_LED#/ GPIO17
PWRLED#/ GPIO19
NUMLED#/ GPIO1A
BATT CHGI LED#/ E51CS#
BATT LOW LED#/ E51MR0
CAPS LED#/ E51TMR1
ARROW LED#/ E51 INT0
SYSON/GPIO56/ E51 INT1
GND
GND
GND
GND
GND
GND
+5VALW
34
35
38
40
99
101
100
102
104
Address
BUS
SM BUS
139
129
103
13
28
39
<4>
<4>
<32,40>
<32,40>
DAC_BRIG
EN_FAN1
IR EF
75
11
26
37
105
127
141
76
78
79
80
+3VALW
2 R337
1 EC_SMD_2
10K_0402_5%
2 R338
1 EC_SMC_2
10K_0402_5%
2 R400
1 EC_SMI#
@ 10K_0402_5%
2 R397
1 EC_SCI#
@ 10K_0402_5%
R605
2K_0402_5%
BATT_TEMP <40>
BATT_OVP <35>
1
DAC_BRIG/DA0/GPIO3D
EN DFAN1/DA1/GPIO3D
IREF2/DA2
EN DFAN2/DA3/ GPIO3F
DA output or GPO
PWR
KSI[0..7]
KSI[0..7]
10K_0402_5%
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPI032
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPI035
KSI6/GPIO36
KSI7/GPIO37
BATT_TEMP
BATT_OVP
ADP_IR
BID
71
72
73
74
63
64
65
66
67
68
69
70
BATTEMP/AD0/GPIO38
BATT OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD BID0/AD3/GPIO3B
AD INtput or GPI
<29>
<29>
+3VALW
GA20/ GPIO00/GA20
KBRST#/GPIO01/KBRST#
SERIRQ
LPC_FRAME# / LFRAME#
LPC AD3/LAD3
LPC AD2/LAD2
Host
LPC AD1/LAD1 INTERFACE
LPC AD0/LAD0
CLK_PCI_EC/PCICLK
PCIRST#
EC RST#/ ECRST#
EC SCI#/SCI#/GPIO0E
PM_CLKRUN#/ CLKRUN#
FAN/PWM
2
R611
22K_0402_5%
2
1
JOPEN
J1
1
2
3
5
6
9
10
12
14
15
42
24
44
EC_AVCC / AVCC
GATEA20
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
CLK_PCI_EC
PCI_RST#
EC_RST#
EC_SCI#
PA_PR#DET
VCC/ EC VCC
VCC / EC VCC
VCC / EC VCC
VCC / EC VCC
VCC
VCC
U24
1
2
47K_0402_5%
CLK_PCI_EC
2.2V(R325=1K,R333=2K): After PV type D KB(17")

1.65V(R605=2K,R333=2K): After PV type C KB(15")
+EC_AVCC
+3VALW
<19>
GATEA20
<19> KB_RST#
<20,29>
SIRQ
<19,29> LPC_FRAME#
<19,29> LPC_AD3
<19,29> LPC_AD2
<19,29> LPC_AD1
<19,29> LPC_AD0
<15> CLK_PCI_EC
<18,23,29> PCI_RST#
2
0.1U_0402_16V4Z
C51
2700P_0603_50V7K~D
R382
LDO3
BID definition,
High (3.3V): Before SI2 type D KB(17")
Low (0V): Before SI2 type C KB(15")
RESET
N.C.
VCC
GND
G696L263T1UF_SOT23-5
PA_PR#DET
R580
2K_0402_5%
LDO3
@ R579
1
2
1K_0402_5%
C472
4.7U_0805_6.3V6K
U47
<29> PA_LED_ALW
LDO3
1
Title

EC KB910L(LPC)

Custom LA-3341P
Date:
Rev
0.2
Sheet

1
31
of
40
<31>
ADB[0..7]
<31>
KBA[0..19]
ADB[0..7]
KBA[0..19]
+3VALW
+3VALW
JP12
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA17
C531
0.1U_0402_16V4Z
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
1
R366
100K_0402_5%
U22
8
7
6
5
<31,40> EC_SMC_1
<31,40> EC_SMD_1
LDO3
VCC
WP
SCL
SDA
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
A0
A1
A2
GND
1
2
3
4
AT24C16AN-10SI-2.7_SO8
ADB3
ADB2
ADB1
ADB0
FR D#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
R367
100K_0402_5%
FSEL#
KBA0
KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWR#
RESET#
SUYIN-80065A-040G2T
<31>
<31>
FSEL#
FRD#
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
FSEL#
FR D#
FWE#
22
24
9
CE#
OE#
WE#
LDO3
LDO3
U14
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
VCC0
VCC1
31
30
D0
D1
D2
D3
D4
D5
D6
D7
25
26
27
28
32
33
34
35
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RP#
NC
READY/BUSY#
NC0
NC1
10
11
12
29
38
RESET#
GND0
GND1
23
39
C437
0.1U_0402_16V4Z
FWE#
FWR#
<31>
R610 0_0402_5%
1
LDO3
R370
100K_0402_5%
SST39VF080-70_TSOP40
Compal Secret Data
2005/03/10
Issued Date
2006/03/10
Deciphered Date
A
Title

BIOS & EC I/O Port

Custom LA-3341P
Date:
Rev
0.2
Sheet

E
32
of
40
+5VALW to +5V Transfer

+3VALW to +3VS Transfer
1
+5VALW
+5V
+3VS
SI4800DY_SO8
1
C760
10U_0805_10V4Z
C759
C438
10U_0805_10V4Z
R549
8
7
6
5
D
D
D
D
1
2
3
4
S
S
S
G
SI4800DY_SO8
470_0402_5%
C459
10U_0805_10V4Z
C455
R306
470_0402_5%
2
1
D
1
SUSON
1
1
R546
SYSON# 2
G
S
S
2 SUSP
G
Q11
2N7002_SOT23
2
FM3
1
FM1
1
FM2
1
FM5
1
FM6
1
FM4
1
470_0402_5%
Q40
2N7002_SOT23
RUNON
2 SYSON#
G
Q41
2N7002_SOT23
R545
100K_0402_5%
1
2
3
4
S
S
S
G
0.1U_0402_16V4Z
U17
0.1U_0402_16V4Z
D
D
D
D
8
7
6
5
C758
10U_0805_10V4Z
U39
B+
+3VALW
C755
0.01U_0402_16V7K
CF1
CF2
CF3
CF4
CF10 CF8
CF9
CF12
+5VALW to +5VS Transfer

+2.5VS
R347
Q4
2 SUSP
G
2N7002_SOT23-3
S
2
G
SYSON#
2 SUSP
G
Q37
2N7002_SOT23
2 SUSP
G
Q18
2N7002_SOT23
2 SUSP
G
Q17
2N7002_SOT23
+0.9VS
H15
H3
H2
H11
H20
H12
H7
H14
H22
H13
H8
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1 2
H5
H10
H4
H9
H6
H21
H17
H18
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
SUSP
2
G
Q3
2N7002_SOT23
470_0402_5%
D
C557
0.01U_0402_16V7K
R68
470_0402_5%
2
1
470_0402_5%
3
Q5
2N7002_SOT23
R346
S
S
470_0402_5%
470_0402_5%
R395
SUSP
2
G
Q21
2N7002_SOT23
R522
470_0402_5%
RUNON
D
R131
470_0402_5%
1 2
C552
C561
10U_0805_10V4Z
R137
SI4800DY_SO8
1 2
1
2
3
4
R398
100K_0402_5%
+VCCP
S
S
S
G
0.1U_0402_16V4Z
D
D
D
D
1 2
+1.5VS
8
7
6
5
1 2
C515
10U_0805_10V4Z
U25
B+
+1.8V
+5VS
+5VALW
B+
R341
SYSON
1
<31,37>
SYSON#
330K_0402_5%
2
G
Q16
2N7002_SOT23
B+
R406
<31,37,38> SUSP#
SUSP
SUSP
<38>
330K_0402_5%
2
G
Q27
2N7002_SOT23
Compal Secret Data
Issued Date
2005/03/10
Deciphered Date
2006/03/10
Title
DC/DC Circuit
Custom LA-3341P
Date:
Rev
0.2
Sheet
of
33
40
Detector/Precharge
VIN
Vin Detector :
14.698 14.285
13.818 13.411
ADPIN
D
PL1
FBMA-L18-453215-900LMA90T_1812
ADPIN2
PR1
1M_0603_1%
1
2
PR10
1
1
1
2
P
8
+
PZD1
RLZ4.3B_LL34
PR9
10K_0402_5%
1
PR4
1K_0402_1%
2
PACIN
PU1A
LM393DR_SO8
ACIN
<31,36>
PACIN
<35>
PR7
10K_0402_5%
2
N3
PR3
10K_0805_5%
RTCVREF
3.3V
RLS4148_LLDS2
PR12
2
1K_1206_5%
PD3
RLS4148_LLDS2
ACIN:
VS
PD4
RLS4148_LLDS2
1
2
PR215
47_1206_5%
PR13
100K_0603_1%
PC8
0.22U_1206_25V7K
2
1
Precharge detector
7.558 7.333 7.112
6.108 5.933 5.704
PC9
0.1U_0603_25V7K
PQ1
TP0610K-T1-E3_SOT23
N6
1
2
PR14
22K_0603_1%
BATT
Precharge detector
12.384 12.000 11.624
10.927 10.600 10.223
CHGRTCP
VL
PR15
10K_0402_5%
2
PR16
1M_0603_1%
2
1
VS
B+
<29> EC_PWR_ON#
PC5
0.01U_0402_25V7K
N5
BATT+
N4
N2
PC7
1000P_0402_50V7K
PD2
2
1K_1206_5%
PR11
47_1206_5%
PJP27
@ JUMP_43X39
N58
2 2
1 1
1
1K_1206_5%
VIN
PR6
27K_0603_1%
2
1
B+
PC6
0.047U_0603_25V7M
PR8
1
PR5
47K_0603_1%
2
N1
VIN
PR2
82.5K_0603_0.1%
PCN1
ACES_88290-0400M
VS
PC4
1000P_0402_50V7K
2
1
PC3
100P_0402_50V8J
2
1
1
2
PC2
1000P_0402_50V7K
PC1
100P_0402_50V8J
4
VIN
ADPIN
13.879
13.000
RTCVREF
B
2
+2.5VSP
PJP4
@ JUMP_43X39
2 2
1 1
+1.8VP
PJP10
@ JUMP_43X118
1 1
2 2
+3VALW
+2.5VS
+1.5VSP
+1.05VSP
+0.9VSP
1
D
PR24
10K_0402_5%
2
1
+1.5VS
PJP12
@ JUMP_43X118
1 1
2 2
+VCCP
PJP14
@ JUMP_43X118
1 1
2 2
+0.9VS
PR23
47K_0402_5%
2 N13
2
1 PACIN
G
PQ2
2N7002-7-F_SOT23-3
PACIN
<35>
+5VALWP
2
PQ3
DTC115EUA_SC70
A
+1.8V
Compal Secret Data
Issued Date
2006/04/03
2007/04/03
Deciphered Date
Title
Dectector / Precharge
5
PC12
1000P_0402_50V7K
PR21
PR22
300K_0603_0.1% 1.5M_0603_1%
+3VALWP
PJP8
@ JUMP_43X118
1 1
2 2
+5VALW
N11
+5VALWP
PJP7
@ JUMP_43X118
1 1
2 2
N10
N12
VL
PJP6
@ JUMP_43X118
1 1
2 2
PC10
1U_0805_25V4Z
1
2
PC11
4.7U_0805_6.3V6K
N9
1
3
<36,40> MAINPWON
GND
<35> ACON
PR256
47K_0603_1%
PU1B
LM393DR_SO8
PD5
RB715F_SOT323
N8
PR18
280K_0603_1%
PC14
1000P_0402_50V7K
IN
OUT
3.3V
PR19
PR20
@ 510_0603_5% @ 510_0603_5%
1
2 N7 1
2
PC13
0.1U_0603_25V7K
CHGRTC
PR17
200_0603_5%
PU2
G920AT24U_SOT89

Custom
Date:
Rev
0.2
Sheet

1
34
of
40
Charger
B+
P2
65W Iadp=0~3.0A
B++
24
GND
23
CS
22
3887CS
PC19
2200P_0402_50V7K
1
2
+INE2
-INE2 VCC(o)
21
3887VCC
FB2
OUT
20
3887OUT
VH
19
3887VH 1
2
PC23
0.1U_0603_25V7K
VCC
18
RT
17
-INE3
16
3887RT 1
2
PR39
68K_0603_5%
3887-INE3
15
3887FB3
OUTC1
1
2
PR44
100K_0603_1%
-INC1
ACON
+INC1
3887+INC1
4
2
1
3
2
1
14
PC27
1500P_0402_50V7K
4.2V
PD10
EC31QS04
BATT+
PR40
0.02_2512_1%
PD11
EC31QS04
MB3887PFV-ERE1_SSOP24
<31>
PC31
0.1U_0402_16V7K
IREF=1.096*Icharge
IREF=0.438~3.069V
1
PR42
47K_0603_1%
13
ACOFF
PQ7
DTC115EUA_SC70
PL2
16UH_LF919AS-160M=P3_3.7A_20%
1
2
2
2N181
CTL
OUTD
12
2
PC26
0.1U_0603_25V7K
1
2
5
6
7
8
3887OUTD11
1
2
PR43
174K_0603_1%
IREF
FB3
PC28
4.7U_1206_25V6K
2
1
+INE1
3887OUTC1
10
PC20
0.1U_0603_25V7K
N19
-INE1
PQ6
AO4407_SO8
FB1
3887+INE19
2
1
PR41
10K_0603_1%
<31>
1
1
2N171
23887FB17
PR38
1K_0603_1%
PC25
1500P_0402_50V7K
3887-INE1 8
ACOFF#
S
PQ8
2N7002-7-F_SOT23-3
ACON
VREF
PR31
10K_0603_1%
2
G
23887FB25
PR35
6.8K_0402_1%
3887VREF 6
1
2
PC21
2200P_0402_50V7K
1
2 N16 1
VIN
PR45
150K_0603_0.1%
PC30
4.7U_1206_25V6K
2
1
3887-INE2
2
PR29
47K_0603_1%
PC29
4.7U_1206_25V6K
2
1
3887+INE2
PR30
2.2_0603_5%
+INC2
OUTC2
1
PR32
10K_0402_1%
5.0V
2
PACIN 1
PACIN
PR37
3K_0603_5%
4>
PC24
0.1U_0402_16V7K
2
1
PR36
10K_0402_1%
PD9
1SS355_SOD323
<34>
PC22
0.1U_0402_16V7K
2
1
PR34
31.6K_0603_1%
1
ACOFF#
PQ52
2N7002-7-F_SOT23-3
N15
PR33
150K_0402_1%
1
3
1
2
G
S
-INC2
N14
65W==>1.202V
PQ53
DTC115EUA_SC70
PQ5
AO4407_SO8
PU3
1
ADP_I
8
7
6
5
65W:1.40V(-1 level); 1.30V (+1 level)
<31>
N65 2
2
1
2
47K
PR28
200K_0402_1%
47K
PC206
0.1U_0603_25V7K
2
1
1
2
PQ54
DTA144EUA_SC70
N64
2
1
2
3
DIS
PR248
47K_0402_5%
PC209
@100U_25V_M
PC18
2200P_0402_50V7K
0.02_2512_1%
PC17
0.1U_0603_25V7K
PR27
15K_0603_5%
PR26
8
7
6
5
1
2
3
1
2
3
PC16
4.7U_1206_25V6K
8
7
6
5
PL18
FBMA-L18-453215-900LMA90T_1812
P3
VIN
D
PQ4
AO4407_SO8
PC15
4.7U_1206_25V6K
PQ49
AO4407_SO8
PR46
300K_0603_0.1%
CC=0.4~2.8A
3S2P/3S4P : 13.5V--> BATT_OVP= 2.0V

(BAT_OVP=0.14753 *BATT+)
VS
BATT++
AIR_ACIN
PU4B
LM358ADR_SO8
2
<31>
FSTCHG
PQ10
2N7002-7-F_SOT23-3
PR54
10.2K_0603_1%
PQ11
DTC115EUA_SC70
PC33
0.01U_0402_25V7K
2
G
VIN
PR52
(17V+-5%)
42.2K_0603_0.1%
4
2
PR53
10K_0603_1%
N25 2
N26
RTCVREF
1
1
PR50
10K_0603_1%
N23 2
1
N21
PR55
105K_0603_0.5%
PR56
22K_0402_5%
2
1
2
4
A
N22
PQ9
DTC115EUA_SC70
PR51
4.22K_0603_1%
2
1N247
3887CS
PR48
47K_0603_1%
PZD2
RLZ4.3B_LL34
3
2
PR49
499K_0603_1%
3887CS
1
2
8
P
PU4A
LM358ADR_SO8
+3VALWP
PR47
340K_0603_1%
N20
<31> BATT_OVP
PC32
0.01U_0402_25V7K
<31>
PR57
40.2K_0603_1%
Compal Secret Data
Issued Date
2006/04/03
2007/04/03
Deciphered Date
Title
Charger
2

Custom
Date:
Rev
0.2
Sheet

1
35
of
40
+3.3VALWP/+5VALWP
B+
PJP25
JUMP_43X118
PC180
0.1U_0603_25V7K
2
1
3
1
2
1
DL3
1
PR240
0_0805_5%
1
+
2
PC194
150U_D2E_6.3VM_R18
PD26
@SKUL30-02AT_SMA
MAX8734AEEI+_QSOP28
+3VALWP
FB3
PR230
@ 3.57K_0402_1%
23
DH3
LDO3
PC196
4.7U_0805_6.3V6K
+3VALWP
LDO3P
2
PR252
@ 0_0805_5%
PR234
0_0402_5%
2
1
PL17
10U_LF919AS-100M-P3_4.5A_20%
BST3A
LDO3P
2
1
PR233
806K_0603_1%
1999_ON
VL
PR242
100K_0402_5%
1
1
N60
2
G
PQ46
2N7002-7-F_SOT23-3
1
D
2 ACIN
G
PQ47
S
2N7002-7-F_SOT23-3
PC197
0.047U_0603_25V7M
<34,40> MAINPWON
PR223
0_0402_5%
1999_PRO 1
2
PR231
0_0402_5%
PC195
0.22U_0603_16V7K
LX3
REF
DH3A
SKIP#
AO4916_SO8
2
ACIN
ACIN
2VREF_1999
PR228
10K_0402_5%
PC193 <31,34>
@ 1U_1206_25V7K
12
7
2
8
7
6
5
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
PR232
0_0402_5%
1999_SKIP
2REF_1999
FB3
PGOOD
PC187
2200P_0402_50V7K
2
1
2
ILIM5
28
26
24
27
22
2 1
2
2 1
11
BST3
DH3
DL3
LX3
OUT3
1
2
3
4
PRO#
2
0_0402_5%
SHDN#
ON5
ON3
LDO3
1
PR257
6
4
3
10
PR227
47K_0402_5%
2
1
1999_SHDN
@ 0_0402_5%
2 N67
25
1999_V+
PR258
2REF_1999
1
PR220
0_0402_5%
PC186
4.7U_1206_25V6K
2
1
1
13
2
ILIM5
ILIM3
PR225
PR222
499K_0402_1% 200K_0402_1%
1
LX5
DL5
OUT5
FB5
N.C.
ILIM3
15
19
21
9
1
DH5
PC189
1U_0603_10V6K
PR224
PR221
499K_0402_1% 118K_0402_1%
16
1PC191
0.1U_0603_25V7K
1
BST5
GND
FB5
2
1
2
1
PR229
11.5K_0402_1%
1
2
PD25
@SKUL30-02AT_SMA
PR226
18.2K_0402_1%
DL5
PC192
150U_D2E_6.3VM_R18
PQ42
PC184
0.1U_0402_16V7K
2VREF_1999
VCC
14
+5VALWP
PU5
BST5A
TON
1
2
PL16
10U_LF919AS-100M-P3_4.5A_20%
PC190
4.7U_0805_6.3V6K
2
1
+5VALWP
@
C
1999_V+
VL
PR219
10_1206_5%
20
LX5
PR218
47_0402_5%
V+
PR241
0_0805_5%
LD05
AO4916_SO8
B+++
1999_V++
PC188
4.7U_1206_25V6K
2
1
PR216
0_0402_5%
VL
1999_VCC
PR217
0_0402_5%
18
DH5
PR239
10_1206_5%
2
1
2
1
PR251
0_0805_5%
2
1
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
DH5A 1
8
7
6
5
1
2
3
4
PD24
DAP202U_SOT323
17
PC183
2200P_0402_50V7K
2
1
PC182
4.7U_1206_25V6K
2
1
PC181
4.7U_1206_25V6K
2
1
LDO5
PQ41
P2
PR254
0_0805_5%
1
2
VS
PR255
@ 0_0805_5%
1
2
B+++
BST3B
2
BST5B
2
1
PC179
0.1U_0603_25V7K
PC185
4.7U_1206_25V6K
2
1
2
EC_ON
G
PQ48
2N7002-7-F_SOT23-3
<29,31>
Compal Secret Data
Issued Date
2006/04/03
2007/04/03
Deciphered Date
Title
+3VALWP/+5VALWP
2

Custom
Date:
Rev
Sheet
1
36
of
40
+2.5VSP/+1.8VP/+1.5VSP
PJP18
@ JUMP_43X118
5
6
7
8
D
D
D
D
ISEN1.5
LGATE1
LGATE2
27
LG1.5
PGND1
PGND2
26
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
OCSET2
18
VOUT1
VSEN1
EN1
PG1
11
OCSET1
1
2
PC73
4.7U_0805_6.3V6K
4
3
2
1
5
6
7
8
D
D
D
D
G
S
S
S
VOUT1.5
VSEN1.5
EN1.5
OC1.5
ISL6227CAZ-T_SSOP28
1
PR102
73.2K_0603_1%
PR101
73.2K_0603_1%
2
PC78
@ 0.1U_0402_16V7K
SUSP#
PR96
0_0402_5%
<31,33,38>
PC79
@ 0.1U_0402_16V7K
PR100
10K_0402_1%
2
1
9
10
8
15
PR94
2.43K_0603_1%
1
2
PR99
0_0402_5%
1
1
PQ59
SI4810BDY-T1-E3_SO8
4
3
2
1
22
PR88
0_0402_5%
2 UG1.5A
PC72
220U_D2_4VM
25
PHASE1.5
PR92
6.81K_0402_1%
2
1
UG1.5
+1.5VSP
PL5
3.3UH_PLC1045P-3R3A_6.1A_30%
1
2
PC77
0.01U_0402_25V7K
2
1
24
PC71
0.1U_0603_25V7K
2
1
PR91
@ 0_0402_5%
2
1
UGATE2
G
S
S
S
23
PQ58
SI4800BDY-T1-E3_SO8
ISL6227A_VCC
28
BOOT2
PR86
0_0402_5%
BOOT1.5
1
2
SOFT2
ISEN2
ISEN1
PC64
2200P_0402_50V7K
2
1
ISL6227A_VIN
14
VCC
SOFT1.52
PR95
0_0402_5%
PC69
0.01U_0402_25V7K
17
PHASE2
EN1.8
PHASE1
SYSON
UGATE1
<31,33>
OC1.8
PR98
@ 0_0402_5%
PR97
10K_0402_1%
2
1
VOUT1.8
VSEN1.8
BOOT1
B+
LG1.8
PC67
2.2U_0805_10V6K
PR93
2.43K_0603_1%
1
2 ISEN1.8
1
2
3
4
S
S
S
G
PQ17
SI4800BDY-T1-E3_SO8
SOFT1
DDR
PHASE1.8
PC63
4.7U_1206_25V6K
2
1
2
PR85
0_0402_5%
1
2BO0T1.86
VIN
1SOFT1.8 12
PR87
0_0402_5%
1
2 UG1.8
UG1.8A
D
D
D
D
PU6
2
PC68
0.01U_0402_25V7K
13
PR90
0_0402_5%
PC76
0.01U_0402_25V7K
2
1
PR89
10.5K_0402_1%
2
1
PC74
220U_D2_4VM
1
2
PC75
4.7U_0805_6.3V6K
PC66
0.1U_0603_25V7K
2
1
PD17
DAP202U_SOT323
2
BOOT1.8A
PC70
0.1U_0603_25V7K
2
1
8
7
6
5
GND
1
2
3
4
PL4
4.7UH_PCMB104E-4R7MS_10A_20%
PC62
4.7U_1206_25V6K
2
1
PC61
2200P_0402_50V7K
2
1
8
7
6
5
D
D
D
D
S
S
S
G
+1.8VP
PR84
2.2_0603_5%
BOOT1.5A
PQ16
SI4800BDY-T1-E3_SO8
+5VALWP
51_1206_5%
PC65
4.7U_0805_6.3V6K
2
1
PC60
4.7U_1206_25V6K
2
1
PC59
4.7U_1206_25V6K
2
1
IS6227A_B+
PR83
(400mA,40mils ,Via NO.= 1)

+2.5VSP
PU7
APL5508-25DC-TRL_SOT89-3
VIN2.5
IN
OUT
6
5
2
1
1
PC80
4.7U_0805_6.3V6K
PC82
10U_1206_25V6M
PQ18
@ SI3456DV-T1_TSOP6
1
2
GND
+3VS
PC81
4.7U_0805_6.3V6K
PJP19
@ JUMP_43X39
PR103
@ 47K_0603_1%
N32
1
SUSP#
PC83
@ 0.1U_0603_25V7K
Compal Secret Data
Issued Date
2006/04/03
2007/04/03
Deciphered Date
Title
+2.5VSP/+1.8VP/+1.5VSP
2

Custom
Date:
Rev
Sheet
1
37
of
40
PL6
FBMA-L18-453215-900LMA90T_1812
1
2
PC85
0.1U_0603_25V7K
1
2
D
D
D
D
BST1.05
PC89
0.1U_0603_25V7K
2DL1.05A
PR111
4.7_0402_5%
1
PR112
750_0603_1%
+
2
N33
1
PD18
1SS355_SOD323
PQ20
SI4810BDY-T1-E3_SO8
1
2
PC92
0.047U_0603_25V7M
PC90
330U_D2_2.5VM
BST
GND
DL1.05
DL
VCC
LX1.05
PR109
30_0402_5%
LX
PL7
3.3UH_PLC1045P-3R3A_6.1A_30%
1
2
2
1
FB
+1.05VSP
DH1.05A
DH1.05
PR108
7.15K_0402_1%
4
3
2
1
G
S
S
S
DH
+1.8V
PQ19
SI4800BDY-T1-E3_SO8
G
S
S
S
1
2
PR110
866_0402_1%
SS
PR106
0_0402_5%
1
2
4
3
2
1
PR107
0_0402_5%
PU8
MAX8578EUB_10UMAX
OCSET
IN 9
5
6
7
8
MAX8578_VCC 3
PC91
4.7U_0805_6.3V6K
2
1
+5VS
C
+1.05V_VCCPP/+0.9VSP
B+
PC87
@ 0.1U_0603_16V7K
D
D
D
D
FB1.05 1
2
<31,33,37>
5
6
7
8
MAX8575_OCSET
PC88
10
3300P_0402_50V7K
2
1 MAX8575_SS 2
SUSP#
PC84
10U_1206_25V6M
PR105
0_0402_5%
MAX8575_IN 1
2
1
2
PR104
6.81K_0402_1%
PC86
0.01U_0402_25V7K
2
1
MAX8575_B+
PC201
4.7U_0805_6.3V6K
PC93
0.1U_0402_16V7K
+1.8VP
PJP20
@ JUMP_43X118
PU9
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
+3VALW
2
VIN
PC94
10U_1206_6.3V7K
PR113
1K_0402_1%
APL5331KAC-TRL_SO8
1
2
PR115
1K_0402_1%
PQ21
2N7002-7-F_SOT23-3
PC96
0.1U_0402_16V7K
+0.9VSP
2
G
3
N66
@ PC97
0.1U_0402_16V7K
2
1
SUSP
PR253
510K_0402_5%
2
1
<33>
VREF0.9
PR114
510K_0402_5%
1
2
PC95
1U_0603_10V6K
VIN0.9
PC98
10U_1206_6.3V7K
A
Compal Secret Data
Issued Date
2006/04/03
Deciphered Date
2007/04/03
Title
+1.05V_VCCPP/+0.9VSP
5
Size
B
Date:
Document Number
Rev
Sheet
1
38
of
40
+CPU_B+
+CPU_CORE
PL8
FBMA-L18-453215-900LMA90T_1812
1
2
B+
PC103
10U_1206_25V6M
2
1
PC102
10U_1206_25V6M
2
1
PC101
2200P_0402_50V7K
2
1
PC100
0.1U_0603_25V7K
2
1
+CPU_B+
1
+
PC99
100U_25V_M
FCCM UGATE
PWM PHASE
GND
6208A_UGA
5
6
7
8
D
D
D
D
N42 1
PQ24
SI4856DY-T1-E3_SO8
5
6
7
8
G
S
S
S
1
F
VO
DPRSTP#
36
DPRSLPVR
ISL6260_PWM2
FCCM UGATE
PWM PHASE
GND
BOOT
6208B_UG 2
PR237
0_0603_5%
VR_ON
12
VSEN
13
RTN
11
VDIFF
10
FB
PC114
10U_1206_25V6M
2
1
PC112
2200P_0402_50V7K
2
1
PC113
10U_1206_25V6M
2
1
PWM3
25
ISL6260_PWM3 2
PR147
0_0402_5%
ISEN3
21
ISL6260_ISEN3 2
PR151
0_0402_5%
OCSET
ISL6260_OCSET
17
VSUM
+CPU_CORE
16
VO
DFB
VO
2
1
PR166
6.19K_0603_1%
1
2
PC130
0.22U_0603_16V7K
VW
2
1
PR167
1K_0402_1%
PR136
10_0402_1%
2
1
PC118
0.22U_0603_16V7K
2
PR143
5.11K_0603_1%
PC119
680P_0603_50V8J
PR144
@ NC
VSUM
VO
6208B_LG
+5VS
2
1
PR152
11.5K_0402_1%
COMP
VSUM
PR140
10K_0402_1%
1
2
2
5
6
7
8
D
D
D
D
PQ27
SI4856DY-T1-E3_SO8
N43 1
1
2
ISL6260_FCCM
24
PR138
4.7_1206_5%
35
FCCM
CLK_EN#
G
S
S
S
5
6
7
8
ISL6208CRZ-T_QFN8
4
3
2
1
ISEN2
ISL6260_ISEN2
22
LGATE
PQ26
SI4856DY-T1-E3_SO8
PGD_IN
PC111
0.1U_0603_25V7K
2
1
0.36UH_MPC1040LR36_24A_20%
CPU_PHASE2
G
S
S
S
PSI#
2
38
5
6
7
8
6208B_UGA
4
3
2
1
1
D
D
D
D
5
6
7
8
VCC
PL10
37
D
D
D
D
VIN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PR129
PC117
2.2_0603_5%
0.22U_0603_16V7K
1N 38 2
1N 39 1
2
1
2
PC129
1000P_0402_50V7K
2
1
PH2
10KB_0603_5%_ERTJ1VR103J
2
1
N35
2
1
PR158
PR165
3K_0402_1%
@ 1K_0402_1%
2
PR123
@ NC
VSUM
PQ45
SI4684DY-T1-E3_SO8
PWM2
26
PU12
5
G
S
S
S
ISL6260_ISEN1
4
3
2
1
23
PQ25
SI4684DY-T1-E3_SO8
ISEN1
G
S
S
S
ISL6260_PWM1
2
1
PC133
1000P_0402_50V7K
2
1
PC136
330P_0402_50V7K
PR164
6.98K_0402_1%
2
1
PC107
0.22U_0603_16V7K
PR122
5.11K_0603_1%
PC108
680P_0603_50V8J
2
2
27
4
3
2
1
39
18
40
PWM1
2
1
PC134
0.1U_0402_16V7K
1
2
PC132
220P_0402_50V7K
ISL6260CRZ-T_QFN40
PU11
28
29
30
31
32
33
34
PR120
10K_0402_1%
1
2
6208A_LG
PC208
@ 1U_0603_10V6K
D
D
D
D
SOFT
+CPU_CORE
PR118
10_0402_1%
+CPU_B+
2
1
PR159
4.53K_0402_1%
2
1
PR160
68.1K_0402_1%
PR119
4.7_1206_5%
<20,31>
PC115
1U_0603_10V6K
2
1
15
PR156
0_0402_5%
2
1
4
3
2
1
4
3
2
1
1
NTC
ISL6260_DFB
N 45 1
N 34
2
PC126
1800P_0402_50V7K
PR155
180_0603_1%
1 PR157 2
1.2K_0402_1%
1
N 57
1
2
PC128
0.022U_0402_16V7K
VGATE
PGOOD
RBIAS
3V3
19
20
VSS
VR_TT#
DROOP
ISL6260_DROOP 14
PR154
@ 10_0402_1%
VDD
2
1
2
1
PC121
1000P_0402_50V7K
PR153
0_0402_5%
2
1
<5> VSSSENSE
2
PC199
0.082U_0603_25V7K
ISL6260_VCIFF
ISL6260_FB
ISL6260_COMP
ISL6260_VW
+CPU_CORE2
PR150
@ 10_0402_1%
ISL6260_PGOOD
ISL6260_VIN
<5>
+5VS
PR236
@ 0_0402_5%
PR125
0_0402_5%
ISL6260_VRTT
2
1
PR126
ISL6260_RBIAS
0_0402_5%
2 PR127 1
150K_0402_1%
N
56
ISL6260_NTC
2
1
2
1
PR128
PH1
4.22K_0402_1% 2
1 470KB_0402_5%_ERTJ1VR103J ISL6260_SOFT
PC116
0.022U_0402_16V7K
ISL6260_VID0
PR1301
2
<5> CPU_VID0
ISL6260_VID1
0_0402_5%
2 PR131 1
<5> CPU_VID1
ISL6260_VID2
0_0402_5%
2 PR132 1
<5> CPU_VID2
ISL6260_VID3
PR133 1
0_0402_5%
2
<5> CPU_VID3
ISL6260_VID4
PR134 1
0_0402_5%
2
<5> CPU_VID4
ISL6260_VID5
PR135 1
0_0402_5%
2
<5> CPU_VID5
ISL6260_VID6
PR137 1
0_0402_5%
2
<5> CPU_VID6
0_0402_5%
ISL6260_DPRSTP
2 PR139 1
<4,19> H_DPRSTP#
0_0402_5%
2 PR141 1 ISL6260_DPRSLPVR
<7,20> DPRSLPVR
499_0402_1%
ISL6260_PSI
2 PR142 1
<5> H_PSI#
0_0402_5%
2 PR145 1 ISL6260_PGD
<31> PGD_IN
0_0402_5%
ISL6260_CLK
2 PR146 1
<15> CLK_ENABLE#
0_0402_5%
2 PR148 1 ISL6260_VRON
<31> VR_ON
0_0402_5%
ISL6260_VSEN
2
1
VCCSENSE
PR149
PC120
ISL6260_RTN
0_0402_5%
1000P_0402_50V7K
2
1
1
1
PC109
1U_0603_10V6K
N 59
<4> H_PROCHOT#
D
D
D
D
PQ23
SI4856DY-T1-E3_SO8
D
D
D
D
G
S
S
S
PR124
1.91K_0603_1%
ISL6260_VDD
PC110
0.01U_0402_25V7K
ISL6260_NTC
2
1
PL9
0.36UH_MPC1040LR36_24A_20%
CPU_PHASE1
0_0603_5%
5
6
7
8
LGATE
ISL6208CRZ-T_QFN8
PR121
10_0603_5%
G
S
S
S
G
S
S
S
PC105
0.22U_0603_16V7K
1
2
PQ43
SI4684DY-T1-E3_SO8
6208A_UG 2
PR235
4
3
2
1
2.2_0603_5%
1N 362
1N 37
PQ22
SI4684DY-T1-E3_SO8
BOOT
+3VS
VCC
+5VS
PR117
PU10
5
4
3
2
1
PC106
0.01U_0402_25V7K
2
1
PR116
10_0603_5%
D
D
D
D
PC104
1U_0603_10V6K
2
1
5
6
7
8
+5VS
PC200
0.1U_0402_16V7K
Compal Secret Data
2006/04/03
Issued Date
Deciphered Date
2007/04/03
Title
+CPU_CORE
8
Size
C
Date:
2
Document Number
Rev
Sheet
39
1
of
40
Battery Connect/OTP
BATT+
BATT+
BATT++
PC174
1000P_0402_50V7K
PL15
FBMA-L18-453215-900LMA90T_1812
PC175
0.01U_0402_25V7K
PCN2
BATT+
SMD
SMD
SMC
SMC
Res
Temp
GND
PR204
100_0402_5%
1
2
1
EC_SMD_1 <31,32>
PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C
EC_SMC_1 <31,32>
PR205
100_0402_5%
TS
2 BATT_TEMP
BATT_TEMP <31>
PR206
1K_0402_1%
SUYIN_200045MR006G110ZR
+3VALWP
PR207
6.49K_0402_1%
VL
MAINPWON
PJPB1 battery connector

PH3
100K_0603_1%_TH11-4H104FT
PC176
0.1U_0603_25V7K
VL
N53
CPU
1
PR208
470K_0402_1%
1
2
PU17A
8
OTPREF
N55
PQ40
2N7002-7-F_SOT23-3
2
G
LM393DR_SO8
PR214
470K_0402_1%
1
PR213
20K_0603_1%
PC178
1000P_0402_50V7K
VS
PC177
0.22U_0603_16V7K
VL
N54
1
2
PR212
470K_0402_1%
N52
PR209
470K_0402_1%
PR211
215K_0603_1%
1
2
PR210
0_0402_5%
SMART
Batte ry:
1.BATT+
2.SMBD
3.SM BC
4.R es
5. Temp
6.GND
<34,36>
VS
PU17B
LM393DR_SO8
Compal Secret Data
Issued Date
2006/04/03
2007/04/03
Deciphered Date
Title
Battery Connect/OTP
2

Custom
Date:
Rev
Sheet
1
40
of
40

1ade5 C500 IBL30 LA-3341P r02 0620la-3343p

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1ade5 C500 IBL30 LA-3341P r02 0620la-3343p

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A

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

Intel Calistoga GMCH

CRT & TV OUT

Power On/Off CKT.

page 18, 19, 20, 21

DC/DC Interface CKT.

Power Circuit DC/DC

AMP & Audio Jack

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

S5 S4/ Battery only

S5 S4/AC & Battery

CARD BUS & 1394

Load BOM check item

BOM: 43144132L01 (GM)

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

H_THERMDA, H_THERMDC routing together.

Thermal Sensor ADM1032AR

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

+VCCP is the FSB rail of the

Close to CPU pin AD26

Close to CPU pin

+1.5vs is a power source equired

Length match within 25 mils

Resistor placed within

POWER, GROUNG, RESERVED SIGNALS AND NC

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

Mid Frequence Decoupling

<6/19> Remove C37 330u Cap

South Side Secondary

<6/19> Remove C578 820u Cap

ESR <= 1.5m ohm

North Side Secondary

Place these inside

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Tuesday, June 20, 2006

DDR SYS MEMORY A

DDR SYS MEMORY B

Compal Secret Data

Compal Electronics, Inc.

Size Document Number