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Reg, No. :

M 20881

Vlll SemesterB.Tech.- lncluding Part Time Degree(Reg./Sup./lmp.) Examination,April 2012 (2007 Admn. Onwards) ARCHITECTURE COMPUTER 2K6 CS 804 : ADVANCED
Time: 3 Hours lnstruction : Answerall questions. throughout and termspipesegment, ? Define l. a) Whatdo youmeanby pipelining machine to pipelining. cyclerelated design. theperformance of computer b) Writea shortnoteon measuring parallelism ? Explain. c) Whatdp you meanby instruction-level dependence. d) Writea shortnoteon control fragmentation. e) Ex.plain theterminternal f) Whatis a diskcontroller ? Explain. g) Writea shortnoteon ringnetwork topology. ? Explain. h) Whatis multiprocessor cachecoherence typesof such various Also,explain ll. A) Explain hazards. the concept of pipeline hazards. OR B) a) Obtain equation. CPUperformance of Reference. b) Writea shortnoteon Locality Max.Marks: 100

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10 performance. vector lll. A) a) Writea noteon Enhancing How of 12clocks. witha readlatency banks we have16 memory b) Suppose ? 5 12 of vectorloadwitha stride 64-element longwillit taketo complete OR 15 theconcept B) Explain of tracescheduling.
P"T.O.

M 20881

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termsconnected thevarious Explain memory. lV. A) a) Writea noteon virtual memory. withvirtual Translation. of FastAddress theconcept b) Explain OR measures. l/Operformance B) Explain thevarious twoor more to connecting withreference topology theswitch V. A) a) Explain computers. latency. b) Writea shortnoteon communication OR to multiprocessors. withreference theconcept B) Explain of synchronization