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Microprocessors Programming and Interfacing ES C 263 Typical Instruction Execution

Basic Architecture
Processor Control unit Datapath ALU Controller Control /Status Registers

PC

IR

I/O Memory

2
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Datapath Operations
Load
Read memory location into register
ALU operation
Control unit Controller Processor Datapath ALU Control /Status

+1

Input certain registers through ALU, store back in register


Store
PC IR

Registers

10

11

Write register to memory location


Memory

I/O

...
10 11 ...

3
EA C 263 Microprocessors KCS Murti

Control Unit
Control unit: configures the datapath operations
Sequence of desired operations (instructions) stored in memory program
Processor Control unit Controller Datapath ALU Control /Status Registers

Instruction cycle broken into several sub-operations, each one clock cycle, e.g.:
Fetch: Get next instruction into IR Decode: Determine what the instruction means Fetch operands: Move data from memory to datapath register Execute: Move data through the ALU Store results: Write data from register to memory

PC

IR

R0

R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory

...
500 10 501 ...

4
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Control Unit Sub-Operations


Fetch
Get next instruction into IR PC: program counter, always points to next instruction IR: holds the fetched instruction
Control unit Controller Processor Datapath ALU Control /Status Registers

PC

100

load R0, M[500]

IR

R0

R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory 500 501

...
10

... 5

EA C 263 Microprocessors KCS Murti

Control Unit Sub-Operations


Decode
Determine what the instruction means
Control unit Controller Processor Datapath ALU Control /Status Registers

PC

100

load R0, M[500]

IR

R0

R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory 500 501

...
10

... 6

EA C 263 Microprocessors KCS Murti

Control Unit Sub-Operations


Fetch operands
Move data from memory to datapath register
Control unit Controller Processor Datapath ALU Control /Status Registers

10
PC 100 IR load R0, M[500] R0 R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory 500 501

...
10

... 7

EA C 263 Microprocessors KCS Murti

Control Unit Sub-Operations


Execute
Move data through the ALU This particular instruction does nothing during this suboperation
Control unit Controller Processor Datapath ALU Control /Status Registers

10
PC 100
load R0, M[500]

IR

R0

R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory 500 501

...
10

... 8

EA C 263 Microprocessors KCS Murti

Control Unit Sub-Operations


Store results
Write data from register to memory This particular instruction does nothing during this suboperation
Control unit Controller Processor Datapath ALU Control /Status Registers

10
PC 100
load R0, M[500]

IR

R0

R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory 500 501

...
10

... 9

EA C 263 Microprocessors KCS Murti

Instruction Cycles
PC=100
Processor Control unit Controller Datapath ALU Control /Status Registers

Fetch DecodeFetch Exec. Store ops result s clk

10
PC 100
load R0, M[500]

IR

R0

R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory

...
500 10 501 ...

10
EA C 263 Microprocessors KCS Murti

Instruction Cycles
PC=100
Processor Control unit Controller Datapath ALU Control /Status

Fetch DecodeFetch Exec. Store ops result s clk

+1

PC=101

Fetch DecodeFetch Exec. Store ops result s clk


PC 101
inc R1, R0

Registers

10
IR R0

11
R1

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory

...
500 10 501 ...

11
EA C 263 Microprocessors KCS Murti

Instruction Cycles
PC=100
Processor Control unit Controller Datapath ALU Control /Status Registers

Fetch DecodeFetch Exec. Store ops result s clk

PC=101

Fetch DecodeFetch Exec. Store ops result s clk


PC 102
store M[501], R1

10
IR R0

11
R1

PC=102

Fetch DecodeFetch Exec. Store ops result s clk

I/O
100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory

...
500 10 501 11 ...

12
EA C 263 Microprocessors KCS Murti

What makes difference?


Data bus size Address bus size Control signals Clock Frequency Registers ALU Instruction set Input/output And others
Processor Control unit Controller Datapath ALU Control /Status Registers

PC

IR

I/O
Memory

13
EA C 263 Microprocessors KCS Murti

EA C 263 Microprocessors KCS Murti

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