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8

CK
APPD

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.


2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

REV

ZONE

ECN

PAGE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

CONTENTS

PAGE

CONTENTS

357142PRODUCTION RELEASED

22
SYSTEM BLOCK DIAGRAM
23
POWER BLOCK DIAGRAM
24
INTERNAL CONNECTORS - DVD,
PCB NOTES AND HOLES
25 CARDSLOT,
HARD DRIVE, LEFT USB/BLUETOOTH
FAN CONTROLLER, MODEM, SOUND
MPC7450 MAXBUS INTERFACE
26 SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
MPC7450 DATA
USB 2.0
27
CPU PLL AND CONFIGURATION STRAPS
28 MARVELL GIGABIT ETHERNET PHY
FIREWIRE A/B PHY
INTREPID MAXBUS AND BOOT STRAPS
29
INTREPID MEMORY INTERFACE / BOOT ROM
30 FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
PMU (POWER MANAGEMENT UNIT)
DDR MEMORY MUXES
31
BATTERY CHARGER AND CONNECTOR
200PIN DDR MEMORY SODIMM CONNECTORS
32
INTREPID AGP 4X/PCI
33 12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
INTREPID ENET/FW/UATA/EIDE INTERFACES
34 3.3V / 5V SYSTEM POWER SUPPLIES
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG 35
CPU CORE VOLTAGE POWER SUPPLY
INTREPID POWER RAILS
36 1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
INTREPID DECOUPLING
37 SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK
CARDBUS CONTROLLER (PCI1510)
38 SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
M11 AGP & CLOCKS
39 SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
M11 LVDS/TMDS/VGA/GPIO & GPU VCORE
40 FUNCTIONAL TEST POINTS
SIL178 DUAL TMDS TRANSMITTER
41 REVISION HISTORY (1 OF 1)
M11 ANALOG, POWER, GND
42-45 SCHEMATIC CREF AND NETLIST REPORTS

STUFF

BOM OPTIONS
D3_HOT
D3_COLD
GPU_SS
GPU_SWITCH
SERIAL_DEBUG
VCORE_OFFSET
1_8V_MAXBUS
1_5V_MAXBUS
NEC_USB
INTREPID_USB
BBANG
NO_BBANG
ATI_MEMIO_HI
ATI_MEMIO_LO
SSCG
NO_SSCG
5V_HD_LOGIC
3V_HD_LOGIC
EXT_TMDS
INT_TMDS
MMM
INT_CLK
EXT_CLK

X.XX

DRAFTER

Apple Computer Inc.

MFG APPD

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

QA APPD

DESIGNER

RELEASE

SCALE

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

ANGLES
TABLE_5_HEAD

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION

TITLE

DO NOT SCALE DRAWING

SCHEM,MLB,PB17"

TABLE_5_ITEM

SCHEM,MLB,PB17

SCH1

820-1688

PCBF,MLB,PB17

PCB1

TABLE_5_ITEM

NONE

THIRD ANGLE PROJECTION

NOTICE OF PROPRIETARY PROPERTY

DESIGN CK

ENG APPD

NO STUFF

X.XXX

QTY

METRIC

XX

PART#

12/21/2004

DIMENSIONS ARE IN MILLIMETERS

DATE

12/21/04

SCHEM,MLB,PB17"

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO


DUAL-CHANNEL LVDS
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED
SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
MMM, BATTERY CURRENT SENSE

TITLE PAGE AND CONTENTS

051-6694

ENG
APPD

DESCRIPTION OF CHANGE
DATE

MATERIAL/FINISH
NOTED AS
APPLICABLE

SIZE

DRAWING NUMBER

051-6694

REV.
SHT

B
OF

45

3.3V
8BIT TX/RX
100MHZ

J14

EIDE

P.25

P.33

NOT USED
USB 2.0

J3 (SHARE WITH LEFT USB)

BlueTooth

P.31

P.26

NOT USED

P.25

J9
Modem Board
Connector

P.26

ETHERNET
FIREWIRE
100 EIDE CARDSLOT I2S I2C
10/100/1000 800 MB/S UATA
P.14
P.14
P.14
P.15 P.14
P.14
P.14
P.15
USB PORT A
SCCA
P.15
P.15
USB PORT B
VIA/PMU
P.15
P.15
USB PORT C
P.15
BOOTROM
P.14
USB PORT D
P.15
USB PORT E
PCI
P.15
32BITS
33MHZ
USB PORT F
P.13
P.15

P.9

INTRPEID
I2C
MAXBUS
1.8V

P.26

MEMORY BUS
2.5V

U11/U12/U13/U14

CPU PLL
Config
P.7

167MHZ
64BITS

2:1 DDR MUXES

TI PCI1510
CardBus
Controller
P.18

P.27
PCI BUS
32BITS
33MHZ
3.3V

AGP BUS

1.5V/3.3VU43
32BITS
66MHZ

MEMORY MEMORY
CH. C
CH. A

ATI M11

MEMORY
CH. B

P.18-21

J8
Inverter
Connector

J7
LCD Panel
Connector

P.22

DDR SDRAM DIMM 0

AIRPOPT
Connector

MEMORY
CH. D

(INTERNAL MEM)(INTERNAL

J17
S-Video
Connector
P.22

J21

(INTERNAL MEM)
(INTERNAL MEM)

64MB

J20/J23

P.25

MEM)

J16

DVI-I
Connector
P.22

SYSTEM BLOCK DIAGRAM


NOTICE OF PROPRIETARY PROPERTY

DDR SDRAM DIMM 1


SO-DIMM Connector

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

P.12

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-6694

SCALE

U26

USB 2.0
CONTROLLER

P.10

PMU

P.5-6

33MHZ
16/32 BITS
3.3V/5V

U52

BOOT ROM
1M X 8

P.22

P.11

P.18

P.24

U17

P.10

U42

(MPC7457)

Connector

4X AGP
P.13

DDR MEMORY

167MHZ
32BIT ADDRESS
64BIT DATA

APOLLO
CPU

Serial Debug

INTREPID

MAXBUS

CARDBUS
Connector

J15
Keyboard
TRACKPAD
Connector Connector
KB LED
LIGHT SENSOR

J5

U44

J10

SERIAL
5V

S-VIDEO

J12
BACKUP BATTERY

Fan
Circuit

I2C

NOT USED

USB 2.0

RIGHT USB

I2S I2C

I2C

P.24

PMU

EDID (I2C)

P.25

LMU

U39
U48/J2/J4

P.32

U36

SMBUS
3.3V

TUBA (SOUND)
Connector

P.26

UIDE

LEFT USB

J13
ULTRA ATA/100
Connector

1394 OHCI

3.3V
10/100/1000
8BIT TX
8BIT RX
125MHZ

Connector
P.25

P.32-36

(DDC TOO)

P.28
G/MII

P.32

OPTICAL DRIVE

P.29

Power Supply
& Charger

RGB

Ethernet
PHY

Battery
Connector

J11

FireWire
PHY

J19
SUTRO (PWR)
Connector

J25

P.26

2 DATA PAIRS
@ 400MHZ

U28

U49

J3 (SHARE WITH BLUETOOTH)

LMU

TMDS

2 DATA PAIRS
@ 200MHz

4 DATA PAIRS

SLEEP
LED

P.30

P.30

P.28
D

FW - B
Connector

FW - A
Connector

Ethernet
Connector

COMPOSITE

J18

5
J22

J24

LVDS

2
1

OF

45

POWER SYSTEM ARCHITECTURE


+5V_MAIN

BACKLIGHT

U21
>~13.44V TURNS-ON
<~13.44V SHUTS-OFF

PG 31
+

RUN/SS

AC
ADAPTER
IN
PG 31

INRUSH
LIMITER

+24V_PBUS

PG 30
14V_PBUS

BUCK
REGULATOR
VCC
(LTC1625)
PG 32

+3V_PMU
LDO

+5V_MAIN

MAP31 DDR I/O


MAP31 DDR CORE
DDR POWER
+2.5V_MAIN

1_5V_2_5V_OK

SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING

INTREPID CORE
AGP I/O

ON1/ON2

+5V_MAIN

DCDC_EN_L

RUN/SS - 5V

+5V_MAIN

MAIN 3V/5V
DC/DC
(LTC3707)
VCC
PG 33 STBYMD

+PBUS (12.8V)VCC

+5V_MAIN

PGOOD 3V_5V_OK

+PBUS

SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING

12.8V CHARGES BACKUP BATTERY

INTERNAL ZENER CLAMP TO 6V


<100UA ALLOWED
TURNS ON AT >1V

EXT_VCC

DC/DC
(LTC1778)
PG 20

HOLDS BOTH RUN/SS AT GND


WHEN ITS CONNECTED TO GND
TURNS CONTROL TO RUN/SS
WHEN ITS OPEN

SHUTDOWN: STOPPED
SLEEP: D3HOT/D3COLD
RUN: RUNNING

DCDC_EN
SLEEP

D3_COLD

RUN/SS - 3V

SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING

GPU_VCORE
+1.2V/+1.0V

CPU_VCORE
(+1.4V/+1.5V)

TURNS ON AS LOW AS 0.8V/TYP 1.5V


INTERNAL 1.2UA CURRENT SOURCE

RUN/SS

GPU_VCORE
SEQUENCING

+3.3V_MAIN

SHDN

DC/DC
(MAX1717)
PG 34

AFTER PMU IS UP AND RUNNING


DCDC_EN_L WILL PULL ON1/ON2
LOW IN SHUTDOWN

+3V_PMU
TURNS ON AT >1V
<100UA ALLOWED
INTERNAL ZENER CLAMP TO 6V

D
MAXBUS
SEQUENCING

VCC

RC AT 1M*0.047UF @ 24V

+4_6V_BU

DCDC_EN
SLEEP

+1.5V_MAIN

TURNS ON OUTPUT @ 2.4V

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

PG 32

BACKUP
BATTERY

VCC

MAIN 2.5V/1.5V
DC/DC
(MAX1715)
PG 35 PGOOD

+PBUS (12.8V)

AC: 12.8V
NO AC: BATTERY VOLTAGE
1625 NOT RUNNING
SHUTDOWN: RUNNING
SLEEP: RUNNING
RUN: RUNNING

+5V_MAIN

+BATT

INVERTER

+PBUS

1V20_REF -

1M & 0.1UF @14V, IT TAKES


~5.88MS TO START SWITCHER

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL


+5V_MAIN TURNS ON
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
DCDC_EN_L OR PMU_POWERUP_L
BECOMES 1; MUCH LESS THAN THE
RC CHARGING AT INT_VCC (5V)

1_5V_2_5V_OK
D3_HOT
DCDC_EN_L
D3_HOT

24V IS OUTPUT ONLY FROM


BACKUP BATTERY

CHARGER INPUT
& BOOST OUTPUT
PG 32

RC AT 1M*0.1UF @ 24V
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

SHUT-DOWNRUN

NO INRUSH PROTECTION
WHEN ONLY BATTERY IS CONNECTED

+24V_PBUS

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS


AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
(UNTIL DRAINED)

BATTERY
CHARGER

(MAX1772)
PG 31
+BATT
3S 3P PRISMATIC CELLS

SLEEP
SLEEP_L_LS5
DCDC_EN
DC/DC
DCDC_EN_L
+5V_MAIN
(LTC3411)+1.8V_MAIN
+5V_SLEEP
PG 35
MAXBUS
+3V_MAIN
SHUTDOWN: STOPPED BROADCOM
+3V_SLEEP
SLEEP: STOPPED
RUN: RUNNING
3V_5V_OK
+2_5V_MAIN
+2_5V_SLEEP
+1_5V_MAIN
NO INRUSH PROTECTION
+1_5V_SLEEP
WHEN ONLY BATTERY IS CONNECTED 1_5V_2_5V_OK

SLEEP RUN SHUT-DOWN


B

~11MS
~13.5MS
2.4V - ??? MS

2.6 MS
2.6 MS

(MAX1715 OUTPUT)

BATTERY VOLTAGE
FEED-IN PATH

POWER BLOCK DIAGRAM

1_5V_2_5V_OK

+PBUS

(AT LTC1778 RUN/SS)

GPU_VCORE

~???MS

NOTICE OF PROPRIETARY PROPERTY

(D3HOT)

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

GPU_VCORE
(D3COLD)

PG 31

+1_8V_MAIN

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

1.9 MS

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SCALE

SHT
NONE

REV.

051-6694

OF

B
45

BOARD HOLES
CHASSIS MOUNTS
ASICS HEATSINK MOUNTS
I/O AREA
INVERTER

PCB SPECS

OMIT

OMIT

ZT2
255R158

SHLD-SM

BS1

CHGND2

1
CHGND1

ZT6
235R126

OMIT

ZT83
146R126

OMIT

IMPEDANCE : 50 OHMS +/- 10%


DIELECTRIC: FR-4
LAYER COUNT: 12
SIGNAL TRACE WIDTH: 4 MILS
SIGNAL TRACE SPACING: 4 MILS
PREPREG THICKNESS: 2-3 MILS

SH1

2 OG-503040

STDOFF-217ODX150IDX35H-TH

ZT11
255R158
OMIT

CHGND5

OMIT

1/2 OZ CU THICKNESS: 0.7 MILS


1.0 OZ CU THICKNESS: 1.4 MILS

ZT5
146R126

255R158

THICKNESS : 1.2 MM / 0.047 IN

OMIT

ZT10

CHGND6

ZT16
235R126

SPEAKER CLIPS

SP6

SP1

SP3

SP5

SP2

SPKR_CLIP_P84
SPKR_CLIP_P84
SPKR_CLIP_P84
SPKR_CLIP_P84
SPKR_CLIP_P84

CONDUCTIVE MOUNTS
OMIT

ZT4
235R126

SP4

SPKR_CLIP_P84

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

BOARD STACK-UP AND CONSTRUCTION

GROUND VIAS
ZT57

ZT22

ZT1

ZT25

ZT48
ZT77
ZT35
HOLE-VIA-20R10 HOLE-VIA-20R10
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1
1
1

ZT56
ZT81
ZT50
HOLE-VIA-20R10 HOLE-VIA-20R10
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1
1
1

20R10 TH VIA OR VIA IN PAD

1
2 PREPREG (3MIL)
3 LAMINATE (4MIL)
4 PREPREG (3MIL)
5 LAMINATE (4MIL)
6 PREPREG (2MIL)
7 LAMINATE (3MIL)
8 PREPREG (2MIL)
9 LAMINATE (4MIL)
10PREPREG (3MIL)
11LAMINATE (4MIL)
12PREPREG (3MIL)

SIGNAL (1/3 OZ + COPPER PLATING)

GROUND (1/2 OZ)

ZT24
HOLE-VIA-20R10

ZT72
ZT44
HOLE-VIA-20R10 HOLE-VIA-20R10

ZT80

ZT3

HOLE-VIA-20R10 HOLE-VIA-20R10
1

ZT73

ZT55
ZT32
ZT38
ZT66
HOLE-VIA-20R10 HOLE-VIA-20R10
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1
1
1
1

SIGNAL (1/2 OZ)

ZT75

ZT29
ZT31
ZT36
ZT67
HOLE-VIA-20R10 HOLE-VIA-20R10
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1
1
1
1

SIGNAL (1/2 OZ)

ZT63

ZT74
ZT27
ZT52
ZT26
HOLE-VIA-20R10 HOLE-VIA-20R10
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1
1
1

ZT40

ZT82

ZT53

ZT61
HOLE-VIA-20R10

ZT23

GROUND (1/2 OZ)

HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10


1

CUT POWER PLANE(1 OZ)

ZT39
HOLE-VIA-20R10

ZT79
ZT70
HOLE-VIA-20R10 HOLE-VIA-20R10

ZT54
HOLE-VIA-20R10

ZT37
HOLE-VIA-20R10

ZT68
ZT71
HOLE-VIA-20R10 HOLE-VIA-20R10

HOLE-VIA-20R10

ZT28
HOLE-VIA-20R10

ZT78
HOLE-VIA-20R10

ZT60
HOLE-VIA-20R10

ZT42
HOLE-VIA-20R10

ZT69
HOLE-VIA-20R10

ZT58
HOLE-VIA-20R10

ZT64
HOLE-VIA-20R10

ZT41

ZT76
HOLE-VIA-20R10

ZT12
HOLE-VIA-20R10

CUT POWER PLANE(1 OZ)

GROUND (1/2 OZ)

ZT30
HOLE-VIA-20R10
1

SIGNAL (1/2 OZ)

ZT65

HOLE-VIA-20R10
1

ZT19

HOLE-VIA-20R10
1

ZT17
HOLE-VIA-20R10
1

ZT15
HOLE-VIA-20R10
1

ZT13

HOLE-VIA-20R10
1

ZT33
HOLE-VIA-20R10

ZT9
ZT47
HOLE-VIA-20R10HOLE-VIA-20R10

ZT62
HOLE-VIA-20R10

ZT14
HOLE-VIA-20R10

ZT43
HOLE-VIA-20R10

ZT7
HOLE-VIA-20R10

ZT59
HOLE-VIA-20R10

ZT18
HOLE-VIA-20R10

ZT8
HOLE-VIA-20R10

ZT21
HOLE-VIA-20R10

GROUND (1/2 OZ)

ZT51

HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10


1

SIGNAL (1/2 OZ)

ZT34

SIGNAL (1/3 OZ + COPPER PLATING)

ZT45
HOLE-VIA-20R10
1

ZT46

ZT49

HOLE-VIA-20R10 HOLE-VIA-20R10
1

ZT20

HOLE-VIA-20R10
1

BOARD INFORMATION
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

D
SCALE

DRAWING NUMBER

SHT

NONE

REV.

051-6694 B
4
45
1
OF

MAXBUS_SLEEP

CPU_VCORE_SLEEP
C25

R2411

C342

10uF
20%

470

5%
1/16W
MF
402 2

10uF
20%

6.3V
CERM
805

C346
10uF
20%

2 6.3V
CERM
805

6.3V
CERM
805

10uF
20%

0.1uF
20%

2 6.3V
CERM

2 10V
CERM

805

C8

10uF
20%

2 6.3V
CERM
805

C223

0.1uF
20%

2 10V
CERM

402

C138
0.1uF
20%

2 10V
CERM
402

0.1uF
20%

402

C153

C91

2 10V
CERM
402

C114
0.1uF
20%

10V
2 CERM
402

C191 1 C112
0.1uF
20%

2 10V
CERM

402

0.1uF
20%

2 10V
CERM

402

C104 1 C103
0.1uF
20%

2 10V
CERM

402

0.1uF
20%

2 10V
CERM

402

2 10V
CERM

402

C110
0.1uF
20%

2 10V
CERM

402

C168 1 C149
0.1uF
20%

0.1uF
20%

2 10V
CERM

402

C111
0.1uF
20%

2 10V
CERM

402

C190

0.1uF
20%

0.1uF
20%

10V
2 CERM

2 10V
CERM

402

1
R206
C189
470

402

C150
0.1uF
20%

2 10V
CERM

402

+1_5V_SLEEP

5 6 7 8 15 16 35 39

C72

0.1uF
20%

5%
1/16W
MF
402 2

0.1uF
20%

402

C73

20%

2 10V
CERM

402

C39

0.1uF
20%

2 10V
CERM

2 10V
CERM

402

C38
402

0.1uF
20%

0.1uF

2 10V
CERM

2 10V
CERM

402

C105

C48

0.1uF
20%

2 10V
CERM

1_5V_MAXBUS

CPU_OVDD DECOUPLING NETWORK

CPU_VCORE DECOUPLING NETWORK

C344

402

C74

0.1uF
20%

0.1uF
20%

10V
2 CERM

2 10V
CERM

402

C275
0.1uF
20%

10V
2 CERM

402

C107

402

C90

0.1uF
20%

C257

2 10V
CERM

402

C46

402

C272

C188

0.1UF
20%

2 10V
CERM

402

C155

39 35 16 15 8 7 6 5

5%
1/16W
MF
603

C92

8 5

0.1UF
20%

C12

2.2uF
20%

2 10V
CERM
805

C340
2.2uF
20%

2 10V
CERM
805

C193

0.1uF
20%

C154
0.1uF

20%
2 10V
CERM
402

2 10V
CERM
402

C115 1 C113
0.1uF
20%

2 10V
CERM

402

0.1uF
20%

2 10V
CERM

402

C152 1 C151
0.1uF
20%

2 10V
CERM

402

0.1uF
20%

2 10V
CERM

402

C202
0.1uF
20%

2 10V
CERM

402

C201
0.1uF
20%

2 10V
CERM

C192

0.1uF
20%

0.1uF
20%

2 10V
CERM

402

402

C40

0.1uF
20%

2 10V
CERM

2 10V
CERM

402

C224

402

C194
0.1uF
20%

2 10V
CERM

402

C203

0.1uF
20%

C273
0.1uF
20%

2 10V
CERM

2 10V
CERM

402

402

C41

0.1uF
20%

402

C169
0.1UF
20%

2 10V
CERM

2 10V
CERM

402

402

C139

0.1UF
20%

2 10V
CERM

402

CPU_TBEN

R58
10K

5%
1/16W
MF
402

CPU_CHKS_L

2 10V
CERM

MAXBUS_SLEEP

R693

402

2 10V
CERM

2 10V
CERM
402

C170

2 10V
CERM

0.1UF
20%

0.1uF
20%

5%
1/16W
MF
603
1_8V_MAXBUS
+1_8V_SLEEP

0.1UF
20%

20%
2 10V
CERM
402

2 10V
CERM

C47

0.1UF

0.1uF
20%
402

0.1uF
20%

2 10V
CERM

MPC7447 PULL-UPS

R702
0 2

C106

0.1UF
20%

CPU_SHD1_L

R73
10K

CPU_MCP_L

1
ADT7467_VCORE_MON

26

VDD

OMIT
37 8
37 8

C195
10UF
20%

2 6.3V
CERM

805

C347 1 C258 1 C345


10UF
20%

2 6.3V
CERM

805

10UF
20%

2 6.3V
CERM

805

10UF
20%

2 6.3V
CERM

805

C156 1 C341 1 C225 1 C343


10UF
20%

2 6.3V
CERM

805

10UF
20%

2 6.3V
CERM

805

10UF
20%

2 6.3V
CERM

805

10UF
20%

2 6.3V
CERM

805

CPU_PULLDOWN

37 8
37 8
37 8
37 8
37 8
37 8
37 8

PLACE BELOW CPU


IN FORMER L3 AREA

37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8

CPU_TS_L

37 8
37 8
37 8
37 8
37 8
37 8
37 8

CPU_ADDR<0>
CPU_ADDR<1>
CPU_ADDR<2>
CPU_ADDR<3>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<10>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<15>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<20>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<25>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<28>
CPU_ADDR<29>
CPU_ADDR<30>
CPU_ADDR<31>

L4

E11
H1
C11
G3
F10
L2
D11
D1
C10
G2
D12
L3
G4
T2
F4
V1
J4
R2
K5
W2
J2
K4
N4
J3
M5
P5
N3
T1
V2
U1
N5
W1
B12
C4
G10
B11
NC
NC
NC
NC
NC

37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8

37 8
37 8
5
5
37 8

CPU_TT<0>
CPU_TT<1>
CPU_TT<2>
CPU_TT<3>
CPU_TT<4>
CPU_TBST_L
CPU_TSIZ<0>
CPU_TSIZ<1>
CPU_TSIZ<2>
CPU_GBL_L
CPU_WT_L
CPU_CI_L
CPU_AACK_L
CPU_ARTRY_L
CPU_SHD0_L
CPU_SHD1_L
CPU_HIT_L

C1
E3
H6
F5
G7

E5
E6
F6
E9
C5
F11
G6
F7
E7
E2
D3
J1
R1
N2
E4
H5
B2

NO STUFF

BR*
BG*

BVSEL
SYSCLK
CLK_OUT
PLL_CFG0
PLL_CFG1
PLL_CFG2
PLL_CFG3
PLL_CFG4
DBG*
DRDY*
DTI0
DTI1
DTI2
DTI3

TS*
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

TABLE_5_ITEM

337S2955

IC,A7PM,R1.2.3,1.67GHZ,1.28V

U43

TABLE_5_ITEM

337S3029

IC,A7PM,R1.3,1.67GHZ,1.28V

U43

CRITICAL

NO STUFF

OMIT

B7

CPU_BUS_VSEL

A10
H2
B8
C8
C7
D7
A7
M2
R3
G1
K1
P1
N1

SYSCLK_CPU 8 37
CPU_CLKOUT_SPN
CPU_PLL_CFG<0> 7
CPU_PLL_CFG<1> 7
CPU_PLL_CFG<2> 7
CPU_PLL_CFG<3> 7
CPU_PLL_CFG<4> 7
CPU_DBG_L
8 37
CPU_DRDY_L
8 37
CPU_EDTI
5
CPU_DTI<0>
8 37
CPU_DTI<1>
8 37
CPU_DTI<2>
8 37

U43
1.50GHZ-1.28V
APOLL7_PM-R1.1

TDI
TDO
TMS
TCK
TRST*
LSSD_MODE*
L1_TSTCLK
L2_TSTCLK

B9
A4
F1
C6
A5
E8
G8
B3

TA*
TEA*

K6
L1

TBEN
QREQ*
QACK*
CKSTP_IN*
CKSTP_OUT*

E1
P4
G5
A3
B1

BGA

(1 OF 3)

JTAG_CPU_TDI
5
JTAG_CPU_TDO_TP
JTAG_CPU_TMS
5
JTAG_CPU_TCK
5
JTAG_CPU_TRST_L
CPU_LSSD_MODE 5
CPU_L1TSTCLK
5
CPU_L2TSTCLK
5
CPU_TA_L
CPU_TEA_L

CPU_VCORE_SLEEP

39

6 40
6 40
6 40

R280
10

C137

0.1uF
20%

C136

VOUT = 0.59*(1+R1/R2)
PLACE RXXX AND RXXX CLOSE
TO UXX PIN 5 AND 6

+3V_SLEEP

20%

402

6.3V

MIN_LINE_WIDTH=25MIL

CRITICAL

U6

5%
1/10W
MF
603 2

1 VIN
4 PG
3 EN

CPU_AVDD_SHDN_L

D35
SM

NO STUFF
2

C283

MBR0530

5%
1/16W
MF
402

2.2UF
20%
6.3V
CERM1

C946
0.001UF

FAN2558
SOT23-6

VOUT 6

10%
50V
CERM
402

1 R1
R282
118K

40 7 6 5

R2

31 5

R283

100K

1UF
10%
2 6.3V
CERM

1%
1/16W
MF

2 402

C945
0.1UF

5 8
8 37

AP0
AP1
AP2
AP3
AP4

D4
F9
C9
A2
D8

MPIC_CPU_INT_L
CPU_SMI_L
CPU_MCP_L
CPU_SRESET_L
CPU_HRESET_L

PMON_IN*
PMON_OUT*

TT0
TT1
TT2
TT3
TT4
TBST*
TSIZ0
TSIZ1
TSIZ2
GBL*
WT*
CI*
AACK*
ARTRY*
SHD0*
SHD1*
HIT*

BMODE0*
BMODE1*

MPIC_CPU_INT_L 1

EXT_QUAL
CHKS*
SRW0*
SRW1*
IARTRY0*
DX*

CPU_EMODE0_L
CPU_EMODE1_L

A11
A12
B10
E10
B6
D10

R128
470

R79
10K

R130
10K

R65
10K

CPU_EDTI

5
5 40
5 6 7 40

JTAG_CPU_TCK

5%
1/16W
MF
402

5%
1/16W
MF
402
5

5%
1/16W
MF
402

CPU_SRESET_L

CPU_L1TSTCLK

5%
1/16W
MF
402

JTAG_CPU_TDI

5 14

G9
F8

R129
10K

R59
470

CPU_PULLDOWN

R60
10K

5%
1/16W
MF
402

R97
10K
5%
1/16W
MF
402

CPU_PMONIN_L

5 40

5 31

JTAG_CPU_TMS

5%
1/16W
MF
402

5%
1/16W
MF
402

40 6 5

D9
A9NC

CPU_SMI_L

VCORE_SHDN_L 35

INT*
SMI*
MCP*
SRESET*
HRESET*

10K

8 37

CPU_CHKSTP_OUT_L

R98
1K

5%
1/16W
MF
402
470OHM FOR BOOT BANGER

40 5

5%
1/16W
MF
402

470OHM FOR BOOT BANGER


40 6 5

40 6 5

20%
2 10V
CERM
402

R120
10K

5%
1/16W
MF
402

CPU_PULLUP

CPU_HRESET_L

R109
10K

CPU_EMODE1_L

C909
402

NO STUFF

5%
1/16W
MF
402

14 5

CPU_TBEN
CPU_QREQ_L
CPU_QACK_L

CPU_PMONIN_L

R57
1K
5%
1/16W
MF
402

5%
1/16W
MF
402

CPU_AVDD_ADJ

ADJ 5
GND
2

R107

1%
1/16W
MF

2 402

603

5%
1/16W
MF
2 402

R148
10K

CERM

R2761
0

10K

CPU_SRWX_L

805

MIN_NECK_WIDTH=10MIL

R108
10K

5%
1/16W
MF
402

CPU_CHKSTP_OUT_L

CPU_AVDD_VOUT

4.7UF

2 10V
CERM

8 37

1%
1/16W
MF
402

R275

8 37

CPU_L2TSTCLK

CPU_AVDD

6 40
40

40 5

CPU_LSSD_MODE

5 6 35 39 40

1%
1/16W
MF
402

CPU_AVDD_VIN

CRITICAL

10

R87
10K

R72

R106

AVDD
OVDDSENSE

NC
37 8

C
1

CPU_BR_L
CPU_BG_L

D2
M1

OVDD

A8

XW31
SM

E18
G18

H8
H10
H12
J7
J9
J11
J13
K8
K10
K12
K14
L7
L9
L11
L13
M8
M10
M12

PLCAE SHORT CLOSE TO CENTER OF CPU

B4
C2
C12
D5
F2
H3
J5
K2
L5
M3
N6
P2
P8
P11
R4
R13
R16
T6
T9
U2
U12
U16
V4
V7
V10
V14

POWER SUPPLY PAGE (PG 33)

5%
1/16W
MF
402

10K 2

5%
1/16W
MF
402

MORE 0805 10UF CAPS ON VCORE

R139
5

10K 2

5%
1/16W
MF
402

5%
1/16W
MF
402

2 10V
CERM

402

402

CPU_SHD0_L

R160
1

R61
470

5%
1/16W
MF

402

7
5

CPU_PULLDOWN

CPU_CHKS_L

CPU_PULLUP
CPU_SRWX_L

MPC7447 MAXBUS

CPU_PULLUP

CPU_PULLDOWN

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

GND

B5
C3
D6
D13
E17
F3
G17
H4
H7
H9
H11
H13
J6
J8
J10
J12
K7
K3
K9
K11
K13
L6
L8
L10
L12
M4
M7
M9
M11
M13
N7
P3
P9
P12
R5
R14
R17
T7
T10
U3
U13
U17
V5
V8
V11
V15

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SCALE

SHT
NONE

REV.

051-6694

5
1

OF

45

BOOT BANGER E2PROM


+3V_MAIN

37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8

37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8

37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8

CPU_DATA<0>
CPU_DATA<1>
CPU_DATA<2>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<5>
CPU_DATA<6>
CPU_DATA<7>
CPU_DATA<8>
CPU_DATA<9>
CPU_DATA<10>
CPU_DATA<11>
CPU_DATA<12>
CPU_DATA<13>
CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<16>
CPU_DATA<17>
CPU_DATA<18>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<47>
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<60>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<63>

R15
W15
T14
V16
W16
T15
U15
P14
V13
W13
T13
P13
U14
W14
R12
T12
W12
V12
N11
N10
R11
U11
W11
T11
R10
N9
P10
U10
R9
W10
U9
V9
W5
U6
T5
U5
W7
R6
P7
V6
P17
R19
V18
R18
V19
T19
U19
W19
U18
W17
W18
T16
T18
T17
W3
V17
U4
U8
U7
R7
P6
R8
W8
T8

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

T3
W4
T4
W9
M6
V3
N8
W6

DP0
DP1
DP2
DP3
DP4
DP5
DP6
DP7

NC
NC
NC
NC
NC
NC
NC
NC

U43

1.50GHZ-1.28V
BGA

(2 OF 3)

40 39 35 5

CPU_VCORE_SLEEP

A13
A16
A18
B17
B19
C13
E13
E16
F12
F17
F19
G11
G16
H14
H17
H19
M14
M16
M18
N15
N17
P16
P18
N12
G13
A17
A19
B13
B16
B18
E12
E19
F13
F16
F18
G19
H18
J14
L14
M15
M17
M19
N14
N16
P15
P19

N13
G12
26

CPU_THERM_DP

26

CPU_THERM_DM

N/C_1
N/C_2
N/C_3
N/C_4
N/C_5
N/C_6
N/C_7
N/C_8
N/C_9
N/C_10
N/C_11
N/C_12
N/C_13
N/C_14
N/C_15
N/C_16
N/C_17
N/C_18
N/C_19
N/C_20
N/C_21
N/C_22
N/C_23
N/C_24
N/C_25
N/C_26
N/C_27
N/C_28
N/C_29
N/C_30
N/C_31
N/C_32
N/C_33
N/C_34
N/C_35
N/C_36
N/C_37
N/C_38
N/C_39

BBANG

U43
BGA

BBANG
1

10K

10K

5%
1/16W
MF

(3 OF 3)

2 402

RP6
10K

BBANG
1

5%
1/16W
MF

2 402

5%
1/16W
MF

VCC

2 402

32KX8_M24256B
SOI
1 NC1
SDA 5
2 NC2
SCL 6
3 NC3
WC* 7

R903 R905 R907


10K
10K
10K

2 402

5%
1/16W
MF

SYM_VER2

VSS

EEPROM_WP_PD
1

BBANG

BBANG

R532

10K

5%
1/16W
MF

2 402

INT_I2C_DATA0 6 11 13 23 40
INT_I2C_CLK0 6 11 13 23 40

NC

MAXBUS_SLEEP 5

R86

470

R885
10K

470OHM FOR BOOT BANGER


5%
1/16W
MF
2 402

BBANG
1

1/16W
5%
MF
2 402

C938
0.1UF

BBANG

R882
10K
1

5%
1/16W
MF

2 402

20

1/16W
5%
MF
402

ATTINY2313
SOI

TP_BB_XTAL
NC

40
40 23 13 11
40 23 13 11

402
1%
11/16W
MF

OMIT

XTAL1

XTAL2

12
13
14
15
16
17
18
19

PMU_CPU_HRESET_L
RESET_VREF
6 BBANG_HRESET_L
6 INT_I2C_CLK0
6 INT_I2C_DATA0
6 BB_MOSI
6 BB_MISO
6 BB_SCK

RESET*

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7

PD0
PD1
PD2
PD3
PD4
PD5
PD6

2
3
6
7
8
9
11

ESP_EN_L 6
BFR_TDO 6
ICT_TRST_L 6
BBANG_JTAG_TCK 6
JTAG_CPU_TMS 5
JTAG_CPU_TDI 5
JTAG_CPU_TRST_L 5

6 40

UNSTUFFING RA AND STUFFING RB


WILL DISABLE THE CONTROLLER
TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION
TABLE_5_ITEM

341S1660

U61

MCU,PROGRAMMED W/ BANGER

BBANG
TABLE_5_ITEM

341S1661

I2C EEPROM,PROGRAMMED W/ BANGER

U32

BBANG

SENSEVDD

39 35 16 15 8 7 6 5

MAXBUS_SLEEP

+3V_MAIN
39 35 16 15 8 7 6 5

MAXBUS_SLEEP

NO_BBANG
BBANG

BBANG

R39

R62

10K

10K

5%
1/16W
MF
402 2

5%
1/16W
MF
402 2

BBANG_TCK_EN

GND

BBANG_JTAG_TCK

1
2

5 SN74AUC1G08
A

U4

SC70-5
4

31 6

JTAG_CPU_TCK

R40

40 6

1
2

BBANG_HRESET_L

5%
1/16W
MF
402

5%
1/16W
MF
402 2

PMU_CPU_HRESET_L

10K

5 40

BBANG

R6

BBANG
1

5 SN74AUC1G08
A

U2

SC70-5

CPU_HRESET_L

5 7 40

BBANG
3

INPUTS ARE 3V TOLERANT

INPUTS ARE 3V TOLERANT

MPC7447/BBANG

BOOT BANGING SIGNAL DEFINITION


1/
2/
3/
4/
5/
6/

SENSEGND

BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)


PMU_HRESET_L (3V INPUT INTO LMU)
BBANG_JTAG_TCK (REGULAR OUTPUT)
JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

A6 HPR*

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

DRAWING NUMBER

REV.

051-6694
SHT
NONE

40

10

VDD

SCALE

40

GND

APPLE COMPUTER INC.

VCC

U61

BB_RESET_L

BBANG

NO_BBANG

R85
200

RB
NO STUFF

31 6

JTAG_CPU_TRST_L

R886

1%
1/16W
2 402
MF

R884
10K

40 6 5

20%
2 10V
CERM
402

10K

6 7 8 15 16 35 39

BBANG

RA
BBANG

SM

20%
2 10V
CERM
402

BOOT BANGER

+3V_MAIN

5
10

0.1UF

5%
1/16W
MF
2 402

2 402

C638

+3V_MAIN

1
2
3
4
6
7
8
9

ESP_EN_L
6 BFR_TDO
6 ICT_TRST_L
6 BBANG_JTAG_TCK
6 BB_MOSI
6 BB_MISO
6 BB_SCK
6

U32

NO STUFF NO STUFF NO STUFF


1
1
1
5%
1/16W
MF

5%
1/32W
25V

OMIT 8

BB_EEPR_ADDR0
BB_EEPR_ADDR1
BB_EEPR_ADDR2

N18 TEMP_ANODE
N19 TEMP_CATHODE
NC

BBANG
1

R904 R906 R533


10K

1.50GHZ-1.28V
APOLL7_PM-R1.1

37 8

OMIT
CRITICAL

APOLL7_PM-R1.1

NCA14
NCB14
NCC14
NCD14
NCE14
NCF14
NCG14
NCA15
NCB15
NCC15
NCD15
NCE15
NCF15
NCG15
NCH15
NCJ15
NCK15
NCL15
NCC16
NCD16
NCC17
NCD17
NCC18
NCD18
NCC19
NCD19
NCH16
NCJ16
NCK16
NCL16
NCJ17
NCK17
NCL17
NCJ18
NCK18
NCL18
NCJ19
NCK19
NCL19

OMIT
CRITICAL

6
1

OF

45

APOLLO 7

MAXBUS_SLEEP

10K

5%
1/16W
MF

R2

10K

5%
1/16W
MF

2 402

10K

5%
1/16W
MF

2 402

CORE FREQUENCY
MULTIPLIER(AT BUS FREQUENCY) CPU_PLL_CFG

R12

5%
1/16W
MF

2 402

2 402

R19

+3V_SLEEP
+5V_SLEEP

5%
1/16W
MF

2 402

R31

R331

5%
1/16W
MF
402 2

5%
1/16W
MF
402 2

47K

R20
0
5%

1/16W
MF

2 402

R21
0
5%

1/16W
MF

2 402

R01B

R00B

NO STUFF
1

R22

R23

5%
1/16W
MF

5%
1/16W
MF

2 402

2 402

R10B

R01C R00C

R10C

R01D

NO STUFF

NO STUFF NO STUFF NO STUFF

NO STUFF

R24
0

5%
1/16W
MF

2 402

R25

R26

5%
1/16W
MF

2 402

5%
1/16W
MF

2 402

R13
0

5%
1/16W
MF

2 402

R00D
1

R14

R15

5%
1/16W
MF

2 402

R01E R10E

NO STUFF NO STUFF
1

R16

5%
1/16W
MF

2 402

R10D

NO STUFF
1

5%
1/16W
MF

2 402

R17

R18

5%
1/16W
MF

5%
1/16W
MF

2 402

2 402

NO STUFF

R27

SOT-363

5%
1/16W
MF

2 402

STUFF PASS TRANSISTOR ONLY IF


R10E, R01E, OR PULLUP STUFFED

CPU_PLL_FS01

R48

82K

Q1

2N7002DW

R00E

CPU_PLL_CFGEXT

+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L


R01A R00A R10A
PULLUP TO ENSURE THAT Vgs OF PASS NO STUFFNO STUFFNO STUFF
TRANSISTOR ON CPU_PLL_CFG<4> IS MET.

CPU_PLL_CFG<0> 5
CPU_PLL_CFG<1> 5
CPU_PLL_CFG<2> 5
CPU_PLL_CFG<3> 5
CPU_PLL_CFG<4> 5

10K

5%
1/16W
MF

2 402

R11

10K

R10

R9

10K

5%
1/16W
MF
2 402

PLL_STOP_L

Q1

2N7002DW
SOT-363

Q3

31 7

2N7002

CPU_PLL_STOP_OC

CPU_PLL_FS00

SM

Q2

2N7002DW

7 PLL_STOP_L

Q2

2N7002DW
SOT-363

SOT-363

CPU_PLL_FS10

31 7

CPU_PLL_STOP_OC

CPU_PLL_STOP_BASE

R47

4
1

249K 2

2N3904

1%
1/16W
MF
402

35 31

STATE ENCODING
LOW SPEED
HIGH SPEED
PLL DISABLE

Q4

1
2

SM

CPU_PLL_STOP_OC
0
0
1

CPU_VCORE_HI_OC
0
1
X

CPU_VCORE_HI_OC

CPU CONFIGURATION
B
MAXBUS VSEL
INVERTED HRESET_L
39 35 16 15 8 7 6 5

BUSTYPE SELECT

MAXBUS_SLEEP

1.5V INTERFACE

CRITICAL
1_5V_MAXBUS

40 7 6 5

CPU_HRESET_L

SN74AUC1G04
4

04

SC70-5

R149

1_5V_MAXBUS

U1

CPU_HRESET_INV

R4
1

22

5%
1/16W
MF
402

40 7 6 5

CPU_BUS_VSEL

22

CPU_EMODE0_L

167MHZ 133MHZ
(Bus-to-Core)
(MHZ)
0.0X
PLL OFF
1.0X
PLL BYPASS
2.0X
333
267
3.0X
500
400
4.0X
667
533
5.0X
833
667
5.5X
917
733
6.0X
1000
800
6.5X
1083
867
7.0X
1167
933
7.5X
1250
1000
8.0X
1333
1067
8.5X
1417
1133
9.0X
1500
1200
9.5X
1583
1267
10.0X
1667
1333
10.5X
1750
1400
11.0X
1833
1467
11.5X
1917
1533
12.0X
2000
1600
12.5X
2083
1667
13.0X
2167
1733
13.5X
2250
1800
14.0X
2333
1867
15.0X
2500
2000
16.0X
2667
2133
17.0X
2833
2267
18.0X
3000
2400
20.0X
3333
2667
21.0X
3500
2800
24.0X
4000
3200
28.0X
4667
3733

4
E

0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1

0F
03
04
08
0A
0B
09
0D
05
02
01
0C
06
17
07
1A
18
19
00
1B
1F
15
0E
1C
11
1D
10
12
13
14
16
1E

APOLLO ONLY SUPPORTS MAXBUS

SIGNAL
CPU_EMODE0_L
(PROCESSOR)

TIED

APPLICATION

HIGH
CPU_HRESET_L
CPU_HRESET_L
LOW
CPU_HRESET_INV

60X
MAX
2.5V
1.8V
1.5V

NOTICE OF PROPRIETARY PROPERTY

BUS MODE
BUS MODE
INTERFACE
INTERFACE
INTERFACE

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

D
SCALE

DRAWING NUMBER

REV.

051-6694 B
7
45
1
SHT

NONE

1.8V INTERFACE

CPU_BUS_VSEL
(PROCESSOR)

1111
0011
0100
1000
1010
1011
1001
1101
0101
0010
0001
1100
0110
0111
0111
1010
1000
1001
0000
1011
1111
0101
1110
1100
0001
1101
0000
0010
0011
0100
0110
1110

CPU CONFIGURATION

DESKTOP HAD PROBLEM USING


INVERTER TO INVERT HRESET_L
NEED TO CHARACTERIZE

0123
ABCD HEX

5%
1/16W
MF
402

R5

5%
1/16W
MF
402 2

CPU_HRESET_L

1_8V_MAXBUS
1

10

CPU FREQUENCY CONFIGURATION

CPU PLL CONFIG CIRCUITRY


39 35 16 15 8 7 6 5

OF

10K

5%
1/16W
MF
402 2

D
37 8
37 8
37 8
37 8
37 8
37 8
37 8
37 8

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

37 8

37

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

37

10K

5%
1/16W
MF
402 2

37

5%
1/16W
MF
402 2

37
37
37

Spare

Spare

Spare

Spare

MAXBUS_SLEEP

ExtPLL_SDwn_Pol
0: Active high
1: Active low

DDR_TPDEn_Pol
0: Active high
1: Active low

AnalyzerClk_En_h
0: Inactive
1: Active

DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output

37
37
37
37
37
37
37
37
37

BIT 40 TO 47

37
37

NO STUFF NO STUFF NO STUFF

EXT_CLK
NO STUFF INT_CLK
1
1
1

37

INT_CLK INT_CLK
1
1

R1221 R1421 R1641 R134 R184 R177 R152 R165


10K

5%
1/16W
MF
402
37 8 6
37 8 6
37 8 6
37 8 6
37 8 6
37 8 6
37 8 6
37 8 6

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

37

10K

5%
1/16W
MF
402

37
37
37

37

CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<47>

37
37
37
37
37
37

CPU_CI_L
CPU_GBL_L
5 CPU_TBST_L
5 CPU_TSIZ<0>
5 CPU_TSIZ<1>
5 CPU_TSIZ<2>
5 CPU_TT<0>
5 CPU_TT<1>
5 CPU_TT<2>
5 CPU_TT<3>
5 CPU_TT<4>
5 CPU_WT_L

37 5

INT_CLK

EXT_CLK

EXT_CLK EXT_CLK

37 5

R6401 R6521 R6651 R6441 R6831 R6751 R6581 R6661


10K

10K

5%
1/16W
MF
402 2

5%
1/16W
MF
402 2

10K

10K

5%
1/16W
MF
402 2

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

10K

5%
1/16W
MF
402 2

37

10K

5%
1/16W
MF
402 2

37

5%
1/16W
MF
402 2

37
37
37
37

PLL4MODESEL_NXT[2:0]
000:
001:
010:
011:
100:

166.4MHZ (2.5X)
149.76MHZ
133.12MHZ (2.0X)
99.84MHZ (1.5X)
83.20MHZ

MODE A (2.5X) IS FOR STATIC OPERATION


MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
39 35 16 15 8 7 6 5

MAXBUS_SLEEP

BIT 48 TO 55

37 8

37 8 5

1%
1/16W
MF
402 2

37 8 6

37 8
37 8
37 8
37 8
37 8

INT_CLK

37

NO STUFF
1

R645 R641 R668 R659 R667 R653 R684


10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

BIT2

10K

5%
1/16W
MF
402 2

BIT1

5 SYSCLK_CPU 1

37

R676

R137

10K

BIT0

AH9

CPU_CLK_EN
INTREPID_ACS_REF

H13

SYSCLK_CPU_UF

J15
A31

CPU_TBEN

Vin = Intrepid Vcore (1.5V)


Vout = MaxBus rail (1.8V)
CPU_FB_IN
NO BUS KEEPER
CPU_FB_OUT
ANALYZER_CLK
INPUT - PU
STOPCPUCLK
NO BUS KEEPER NO BUS KEEPER ACS_REF
NO BUS KEEPER CPU_CLK
NO BUS KEEPER

- PU
DBG
DRDY

?DTI_0
?DTI_1
?DTI_2

- PUTA
NO BUS KEEPER - PU
TEA

INTREPID OUTPUTS HIGH BY DEFAULT

6 37

R167

6 37

0
2
INT_CPUFB_OUT
5%

37

0
1
INT_CPUFB_OUT_SHORT

1/16W
MF

NO STUFF

402

37 8 5

CPU_DRDY_L

6 37
37 8 5

CPU_TEA_L

R2251

37

5%
1/16W
MF

5%
1/16W
MF
402

INT_CPUFB_IN

R2081

402

R226
0 2
1

0
1
INT_CPUFB_OUT_NORM

5%
1/16W
MF
402 2

37

37 8 5

CPU_AACK_L

6 37

6 37

37 8 5

CPU_DBG_L

10K

6 37
6 37

37 8 5

RP21
10K

CPU_BG_L

6 37

6 37

37 8 5

CPU_QREQ_L

6 37

10K

5%
1/16W
SM1

RP24

6 37

5%
1/16W
SM1

5%
1/16W
SM1

5%
1/16W
SM1

6 37
6 37
6 37
6 37
6 8 37
6 8 37
6 8 37
6 8 37
6 8 37
6 8 37
39 35 16 15 8 7 6 5

MAXBUS_SLEEP

INTREPID BOOT STRAPS

6 8 37

BIT 56 TO 63

6 8 37
6 8 37

NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF

6 8 37

NO STUFF

R1401 R1611 R1751 R1321 R1311 R1501 R1741 R1821

6 8 37

10K

6 8 37

5%
1/16W
MF
402

6 8 37
6 8 37

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K

5%
1/16W
MF
402

10K
5%
1/16W
MF

10K

402 2

5%
1/16W
MF
402

6 8 37

CPU_DATA<56>
6 CPU_DATA<57>
6 CPU_DATA<58>
6 CPU_DATA<59>
6 CPU_DATA<60>
6 CPU_DATA<61>
6 CPU_DATA<62>
6 CPU_DATA<63>

37 8 6

6 8 37

37 8

6 8 37

37 8

6 8 37

37 8

6 8 37

37 8

6 8 37

37 8

6 8 37

37 8

6 8 37

37 8

6 8 37

B
NO STUFF

6 8 37

R654 R669 R677 R646 R647 R660 R678 R685

6 8 37

10K

6 8 37

10K

5%
1/16W
MF
402 2

6 8 37
6 8 37

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

10K

5%
1/16W
MF
402 2

6 8 37
6 8 37
6 8 37
6 8 37

5 8 37

5 37
5 37
5 37

5 8 37
5 8 37

Intrepid MaxBus

37

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

INT_CPUFB_LONG

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

402

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

NO STUFF

SIZE

R196
2

APPLE COMPUTER INC.

5%
1/16W
MF
402

RP23
2

10K

6 37

5%
1/16W
SM1

RP24

6 37

5%
1/16W
MF

0
1
INT_CPUFB_IN_NORM

5%
1/16W
MF
402

10K

5%
1/16W
SM1

6 37
6 37

10K

6 37

RP23
3

RP23

6 37

10K

5%
1/16W
SM1

5%
1/16W
SM1

6 37
6 37

10K

CPU_HIT_L

R207

37 8 5

6 37

5 8 37

K25CPU_DTI<0>
D29CPU_DTI<1>
B30CPU_DTI<2>
E27CPU_TA_L
E28CPU_TEA_L

RP23
1

RP24

6 37

G28CPU_DRDY_L

5%
1/16W
SM1

CPU_BR_L

LONG = 1" LONGER THAN MATCHED LENGTH


NO STUFF

R215

6 37

SHORT = 1" SHORTER THAN MATCHED LENGTH

37 8

37 8 5

VSSA_7
TBEN
(PLL6)
NO BUS KEEPER - PU

1%
1/16W
MF
402 2

37 8

CPU_ARTRY_L

6 37

H25

1K

5%
1/16W
MF
402 2

MaxBus output impedance


111: 28.6 ohm
011: 33.3 ohm
101: 40 ohm
001: 50 ohm
110: 66.6 ohm
010: 100 ohm
100: 200 ohm
000: 200 ohm

5%
1/16W
MF
402

Spare

TI 1394b workaround
0: Normal 1394b
1: TI PHY workaround

Spare

SelPLL4ExtSrc
0: PLL5
1: External source

BUF_REF_CLK_OUTEnable_h

0: Inactive
1: Active

31

R144
INT_CLK NO STUFF

37

INPUT - PD

37 8 5

6 37

Processor Bus Mode


0: Max Bus (G4)
1: 60x bus (G3)

R1971

37 8 6

37 8

INT_CPUFB_IN
8 INT_CPUFB_OUT
SYSCLK_LA_TP

NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU

NO BUS KEEPER - ?
QACK
SUSPENDREQ
SUSPENDACK

J24
H16
G8

37 8

511

CPU_DATA<48>
CPU_DATA<49>
6 CPU_DATA<50>
6 CPU_DATA<51>
6 CPU_DATA<52>
6 CPU_DATA<53>
6 CPU_DATA<54>
6 CPU_DATA<55>

G27
AK9
AM8

FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

1/16W
MF
402 2

AACK
ARTRY
HIT
QREQ

CPU_QACK_L
31 INT_SUSPEND_REQ_L
31 INT_SUSPEND_ACK_L

37 5

CI
GBL
TBST
TSIZ_0
TSIZ_1
TSIZ_2
TT_0
TT_1
TT_2
TT_3
TT_4
WT

6 37

10K

5%
1/16W
SM1

RP21

6 37

10K

FireWire PHY interface


0: Legacy interface
1: B-mode interface

1/16W
MF
402 2

A32

CPU_QREQ_L

MAXBUS
INTERFACE

RP21
1

PCI1_REQ0_L / PCI1_GNT0_L
0: REQ/GNT
1: GPIOs

1/16W
MF
402 2

37 8

A_0
A_1
A_2
A_3
A_4
A_5
A_6
A_7
A_8
A_9
A_10
A_11
A_12
A_13
A_14
A_15
A_16
A_17
A_18
A_19
A_20
A_21
A_22
A_23
A_24
A_25
A_26
A_27
A_28
A_29
A_30
A_31

CPU_TA_L

PCI1_REQ1_L / PCI1_GNT1_L

1/16W
MF
402 2

CPU_AACK_L
5 CPU_ARTRY_L
5 CPU_HIT_L

37 8 5

(1 OF 9)

37 8 5

5%
1/16W
SM1

6 37

Spare

1/16W
MF
402 2

37

NO BUS KEEPER

6 37

Spare

1/16W
MF
402 2

37

BGA

D10 CPU_DATA<0>
G12 CPU_DATA<1>
E11 CPU_DATA<2>
H11 CPU_DATA<3>
B9 CPU_DATA<4>
B8 CPU_DATA<5>
A9 CPU_DATA<6>
A8 CPU_DATA<7>
E12 CPU_DATA<8>
D11 CPU_DATA<9>
B10 CPU_DATA<10>
J13 CPU_DATA<11>
A10 CPU_DATA<12>
D12 CPU_DATA<13>
E13 CPU_DATA<14>
G13 CPU_DATA<15>
B11 CPU_DATA<16>
D13 CPU_DATA<17>
A11 CPU_DATA<18>
G14 CPU_DATA<19>
H14 CPU_DATA<20>
E14 CPU_DATA<21>
B12 CPU_DATA<22>
G15 CPU_DATA<23>
B13 CPU_DATA<24>
H15 CPU_DATA<25>
D14 CPU_DATA<26>
B14 CPU_DATA<27>
A12 CPU_DATA<28>
G16 CPU_DATA<29>
E15 CPU_DATA<30>
J16 CPU_DATA<31>
D15 CPU_DATA<32>
A14 CPU_DATA<33>
A13 CPU_DATA<34>
D16 CPU_DATA<35>
E16 CPU_DATA<36>
G17 CPU_DATA<37>
B15 CPU_DATA<38>
H17 CPU_DATA<39>
A15 CPU_DATA<40>
B16 CPU_DATA<41>
E17 CPU_DATA<42>
A16 CPU_DATA<43>
J18 CPU_DATA<44>
H18 CPU_DATA<45>
D17 CPU_DATA<46>
G18 CPU_DATA<47>
A17 CPU_DATA<48>
B17 CPU_DATA<49>
E18 CPU_DATA<50>
B18 CPU_DATA<51>
D18 CPU_DATA<52>
A18 CPU_DATA<53>
A19 CPU_DATA<54>
H19 CPU_DATA<55>
B19 CPU_DATA<56>
J19 CPU_DATA<57>
A20 CPU_DATA<58>
D19 CPU_DATA<59>
E19 CPU_DATA<60>
G19 CPU_DATA<61>
B20 CPU_DATA<62>
G20 CPU_DATA<63>
A30CPU_DBG_L

Spare

1/16W
MF
402 2

37

NO STUFF

R1331 R1211 R1631 R1511 R1621 R1411 R1831 R1761


10K
10K
10K
10K
10K
10K
10K
10K
5%
5%
5%
5%
5%
5%
5%
5%
1/16W
MF
402 2

37

TS

INTREPID-REV2.1

INPUT
NO BUS KEEPER

D_0
D_1
D_2
D_3
D_4
D_5
D_6
D_7
D_8
D_9
D_10
D_11
D_12
D_13
D_14
D_15
D_16
D_17
D_18
D_19
D_20
D_21
D_22
D_23
D_24
D_25
D_26
D_27
D_28
D_29
D_30
D_31
D_32
D_33
D_34
D_35
D_36
D_37
D_38
D_39
D_40
D_41
D_42
D_43
D_44
D_45
D_46
D_47
D_48
D_49
D_50
D_51
D_52
D_53
D_54
D_55
D_56
D_57
D_58
D_59
D_60
D_61
D_62
D_63

10K

CPU_TS_L

0: REQ/GNT
1: GPIOs

NO STUFF NO STUFF NO STUFF

37 8 5

U45

5 6 7 8 15 16 35 39

RP21

PCI1_REQ2_L / PCI1_GNT2_L
0: REQ/GNT
1: GPIOs

EXT_CLK EXT_CLK

PCI0 Source Clock


1: PLL4
0: PLL5 (NO SPREAD)

BIT0

PCI1 Source Clock


1: PLL4
0: PLL5 (NO SPREAD)

BIT1

InternalSpreadEn
0: Inactive
1: Active

Spare

Spare

BIT2

BR
BG

B27
D24
D25
A27
E24
G23
B26
A26
D23
A25
E23
J22
B25
H22
G22
D22
B24
B23
E22
J21
G21
E21
A24
D21
A23
H20
B22
H21
A22
E20
B21
D20
A21
G26
A29
A28
G24
H24
D26
E25
G25
B28
D27
J25
D28
B29
H23
B31

CPU_TS_L

CPU_ADDR<0>
5 CPU_ADDR<1>
5 CPU_ADDR<2>
5 CPU_ADDR<3>
5 CPU_ADDR<4>
5 CPU_ADDR<5>
5 CPU_ADDR<6>
5 CPU_ADDR<7>
5 CPU_ADDR<8>
5 CPU_ADDR<9>
5 CPU_ADDR<10>
5 CPU_ADDR<11>
5 CPU_ADDR<12>
5 CPU_ADDR<13>
5 CPU_ADDR<14>
5 CPU_ADDR<15>
5 CPU_ADDR<16>
5 CPU_ADDR<17>
5 CPU_ADDR<18>
5 CPU_ADDR<19>
5 CPU_ADDR<20>
5 CPU_ADDR<21>
5 CPU_ADDR<22>
5 CPU_ADDR<23>
5 CPU_ADDR<24>
5 CPU_ADDR<25>
5 CPU_ADDR<26>
5 CPU_ADDR<27>
5 CPU_ADDR<28>
5 CPU_ADDR<29>
5 CPU_ADDR<30>
5 CPU_ADDR<31>

37

R1361 R6431 R6391 R6571 R6641 R6731 R1431 R6741

39 35 16 15 8 7 6 5

E29
E26

37 5
37

MAXBUS PULL-UPSMAXBUS_SLEEP

VDD15A_7
(PLL6)

CPU_BR_L
5 CPU_BG_L

37 8 5

10K

D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED


D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED
D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED
D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED
D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED
D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
A STRAP IS NOT LISTED, THEN
CANNOT BE CHANGED BY SOFTWARE

OMIT
CRITICAL

5%
1/16W
MF
402 2

NO STUFF
5%
1/16W
MF
402 2

H26

37 8 5

10K

+1_5V_INTREPID_PLL7

10K

5%
1/16W
MF
402 2

6 CPU_DATA<32>
6 CPU_DATA<33>
6 CPU_DATA<34>
6 CPU_DATA<35>
6 CPU_DATA<36>
6 CPU_DATA<37>
6 CPU_DATA<38>
6 CPU_DATA<39>

10K

39

20%
6.3V 2
CERM
402

NO STUFF NO STUFF NO STUFF NO STUFF

10K

5%
1/16W
MF
402

C308 1

0.22UF

R6421 R1351 R1231 R1531 R1661 R1791 R6511 R1781


10K

4.7

+1_5V_INTREPID_PLL

BIT 32 TO 39

NO STUFF NO STUFF NO STUFF

1/
2/
3/
4/
5/
6/
IF
IT

R227
39 14 12

MAXBUS_SLEEP

THE FOLLOWING STRAP BITS CAN BE


CHANGED BY SOFTWARE:

INTREPID BOOT STRAPS


39 35 16 15 8 7 6 5

DRAWING NUMBER

051-6694

SCALE

SHT
NONE

8
1

OF

REV.

45

SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS


37 9

37 9

22

SYSCLK_DDRCLK_A1_L_UF3

37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10

37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10

37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10

U45

AN34
AN36
AL35
AL33

MEM_DQS<0> 10
MEM_DQS<1> 10
MEM_DQS<2> 10
MEM_DQS<3> 10
MEM_DQS<4> 10
MEM_DQS<5> 10
MEM_DQS<6> 10
MEM_DQS<7> 10

AJ33
AH33
AD33
AC35
T35
T33
N32
L33

MEM_DQM<0> 10
MEM_DQM<1> 10
MEM_DQM<2> 10
MEM_DQM<3> 10
MEM_DQM<4> 10
MEM_DQM<5> 10
MEM_DQM<6> 10
MEM_DQM<7> 10

L29
H32
K30
AN35
AM35
AM36
AL36

MEM_RAS_L 9
MEM_CAS_L 9
MEM_WE_L 9
MEM_CKE<0> 9
MEM_CKE<1> 9
MEM_CKE<2> 9
MEM_CKE<3> 9

AB32MEM_MUXSEL_H<0>
AE29MEM_MUXSEL_H<1>
N30 MEM_MUXSEL_L<0>
T32 MEM_MUXSEL_L<1>
Y32
Y33
Y35
Y36
Y30
W30
W32
W33
V33
V32
W35
W36

37
37
37
37
37
37

22

5%
1/16W
SM1
37 9

37
37 9

37

22

37 9

37

37 9

SYSCLK_DDRCLK_B0_L_UF 4

9 37
9 37

0 & 1 GO TO SLOT A
2 & 3 GO TO SLOT B

37 9

37

MEM_CS_L<0>

37

37 9

MEM_CS_L<1>

22

37

37 9

MEM_CS_L<3>

37

37 9

37

37
37
37
37

37 9

MEM_CKE<1>

22

22

37 9

MEM_CKE<3>

37
37
37 9

0 & 1 GO TO SLOT A
2 & 3 GO TO SLOT B

37
37

37 9

22

10 37 0S

ARE SAME POLARITY (ACTIVE-LO)


1S ARE SAME POLARITY (ACTIVE-HI)

37 9

37 9

MEM_ADDR<3>

9 37

9 37
37 9

9 37
37 9

MEM_ADDR<5>

9 37

37 9

R199

37 9

1K

37 9

+2_5V_INTREPID

37 9

22

R1911

C245 1

1%
1/16W
MF
402 2

20%
10V
CERM 2
402

10K

BA

INT_MEM_VREF

9 39

MEM_BA<0>

22

5%

MEM_BA<1>

MEM_WE_L

22

5%

37 9

MEM_RAS_L

22

RAM_ADDR<2> 11

1K

40 38 27 25 17
40 38 27 25 17

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
38

ROM_ONBOARD_CS_L
ROM_OE_L
12 ROM_RW_L
ROM_WP_L
13 INT_RESET_L

22
24
9
12
10

40 25

5%
1/16W
MF
402

40 25 12
40 25

31

37

CE
OE
WE
WP
PWD

RAM_ADDR<4>

PCI_AD<24> 12
PCI_AD<25> 12
PCI_AD<26> 12
PCI_AD<27> 12
PCI_AD<28> 12
PCI_AD<29> 12
PCI_AD<30> 12
PCI_AD<31> 12

17 25 27 38 40
17 25 27 38 40
17 25 27 38 40
17 25 27 38 40
17 25 27 38 40
17 25 27 38 40
17 25 27 38 40
17 25 27 38 40

GND
23

39

11 37

RAM_ADDR<5> 11

TABLE_5_HEAD

37

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

TABLE_5_ITEM

341S1556 1
RAM_ADDR<6> 11

37

RAM_ADDR<7> 11

37

RAM_ADDR<8>

IC,BOOTROM,Q41B

U17

11 37

RAM_ADDR<9> 11

37

RAM_ADDR<10>

11 37

RAM_ADDR<11>

11 37

PULL-DOWN RESISTORS TO ENSURE


CKE STAYS LOW AFTER INTREPID
2.5V I/O SHUTS OFF

RAM_ADDR<12> 11

37

RAM_BA<0> 11

37

22

RAM_BA<1> 11

37

37 11 9

RAM_CKE<0>

37 11 9

RAM_CKE<1>

37 11 9

RAM_CKE<2>

37 11 9

RAM_CKE<3>

R5001
10K
5%
1/16W
MF
402 2

R4391
10K

5%
1/16W
MF
402 2

R4091

10K
5%
1/16W
MF
402 2

INT - DDR/BOOTROM

R3871
10K

5%
1/16W
MF
402 2

22

11 37

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

RAM_CAS_L

11 37

RAM_RAS_L

11 37

5%

SIZE

1/16W
MF

402

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

APPLE COMPUTER INC.

5%

25
26
27
28
32
33
34
35

37

DRAWING NUMBER

D
SCALE

1/16W
MF
402

U17

FEPR-1MX8
3.3V
A0 TSOP DQ0
A1 OMIT DQ1
A2
DQ2
A3
DQ3
DQ4
A4
A5
DQ5
A6
DQ6
DQ7
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20

OVERRIDE ROM MODULE


INTERCEPTS ROM CHIP SELECT

RAM_WE_L

R238
37 9

40 38 27 25 17

40 38 27 25 17

R357
ROM_CS_L

40 38 27 25 17

12 PCI_AD<0>
12 PCI_AD<1>
12 PCI_AD<2>
12 PCI_AD<3>
12 PCI_AD<4>
12 PCI_AD<5>
12 PCI_AD<6>
12 PCI_AD<7>
12 PCI_AD<8>
12 PCI_AD<9>
12 PCI_AD<10>
12 PCI_AD<11>
12 PCI_AD<12>
12 PCI_AD<13>
12 PCI_AD<14>
12 PCI_AD<15>
12 PCI_AD<16>
12 PCI_AD<17>
12 PCI_AD<18>
12 PCI_AD<19>
12 PCI_AD<20>

R250

1/16W
SM1

MEM_CAS_L

1/16W
MF
402 2

37

5%
1/16W
SM1

RP26
37 9

5%

11 37

RP26

SM1

0.1UF

RAM_ADDR<0>

RAM_ADDR<1> 11

SM1

1/16W
37 9

CNTL

37 9

10K

5%
1/16W
MF
402 2

5%
1/16W

RP26

1%
1/16W
MF
402 2

R386

10K

40 25 12

22

22

MEM_ADDR<12>

10K

R338

11 37

RP30

SM1

R198

40 38 27 25 17

40 38 27 25 17

11 37

5%
1/16W
SM1

5%

37 9

40 38 27 25 17

40 38 27 25 17

RAM_CKE<2> 9

RP31

1/16W

+3V_MAIN

11 37

40 38 27 25 17

5%
1/16W
SM1

MEM_ADDR<10>

MEM_ADDR<11>

11 37

22

22

RP26
39 16 15 10

40 38 27 25 17

40 38 27 25 17

31

VCC

RP30

MEM_ADDR<8>

MEM_ADDR<9>

RAM_CKE<0> 9

RAM_CKE<1> 9

30

5%
1/16W
SM1

5%
1/16W
SM1

1%
1/16W
MF
2 402

40 38 27 25 17

40 38 27 25 17

22

22

22

22

11 37

40 38 27 25 17

RP30

RP31
1

40 38 27 25 17

40 38 27 25 17

5%
1/16W
SM1

5%
1/16W
SM1
37 9

11 37

40 38 27 25 17

5%
1/16W
SM1

39

RAM_CS_L<2>

40 38 27 25 17

RP30
22 8
1

402

RP25
3

MEM_ADDR<6>

MEM_ADDR<7>

40 38 27 25 17

RAM_ADDR<3> 11

RP31
37 9

40 38 27 25 17

5%
1/16W
SM1

MEM_ADDR<4>

9 37
9 37

22

5%
1/16W
SM1

9 37

C479
0.1UF
20%

2 10V
CERM

37

RP25
2

22

22

RP25
9 37

11

5%

MEM_ADDR<2>

10 37

0.1UF
20%
10V
2 CERM
402

11 37

RAM_CS_L<1> 11

1/16W
SM1

5%
1/16W
SM1

10 37

10 37

22

RAM_CS_L<0>

RAM_CKE<3> 9

C470

11 37

RP31

MEM_ADDR<0>

MEM_ADDR<1>

11 37

5%
1/16W
SM1

RP25

37

SYSCLK_DDRCLK_B0

C460

2.2UF
20%
2 10V
CERM
805

RP35

5%
1/16W
SM1

37

1
11 37

VPP

22

22

RP35

37

5%
1/16W
SM1

9 MEM_CKE<2>

37

11 37

RP36

5%
1/16W
SM1
37

RAM_CS_L<3>

SYSCLK_DDRCLK_B1

5%
1/16W
SM1

RP36

37

+3V_MAIN

RP35

MEM_CKE<0>

37

1MB BOOT ROM

11 37

SYSCLK_DDRCLK_B1_L

5%
1/16W
SM1

5%
1/16W
SM1

37

22

22

RP35

37

11 37

SYSCLK_DDRCLK_B0_L

MEM_CS_L<2>

37

SYSCLK_DDRCLK_A0

RP36

5%
1/16W
SM1
37 9

5%
1/16W
SM1

RP36

9 37

37

22

5%
1/16W
SM1

9 37

INT_MEM_VREF 9

MEM_VREF

22

RP34

37
37

11 37

RP34

SYSCLK_DDRCLK_B0_UF

37

22

5%
1/16W
SM1

5%
1/16W
SM1

37

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_B1_L_UF1

11 37

RP33

SYSCLK_DDRCLK_B1_UF

37

INT_MEM_REF_H 39

Y22
T22

SYSCLK_DDRCLK_A0_L_UF 2

SYSCLK_DDRCLK_A1

5%
1/16W
SM1

RP33

SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_L_UF
INT_DDRCLK2_P_TP
INT_DDRCLK2_N_TP
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1_L_UF
INT_DDRCLK5_P_TP
INT_DDRCLK5_N_TP

AA22

RP34
37 9

RP34

SYSCLK_DDRCLK_A0_UF

37

MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>

AJ31
AH31
AD32
AB30
V30
P32
N29
L32

CLOCKS

37 10

DDR_DATA_0
OMIT
DDR_DATA_1
CRITICAL
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4INTREPID-REV2.1
BGA
(2 OF 9)
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDRCS_0
DDR_DATA_16
DDRCS_1
DDR_DATA_17
DDRCS_2
DDR_DATA_18
DDRCS_3
DDR
DDR_DATA_19
DDR_DQS_0
MEMORY
DDR_DATA_20
INTERFACE
DDR_DQS_1
DDR_DATA_21
DDR_DQS_2
DDR_DATA_22
DDR_DQS_3
DDR_DATA_23
DDR_DQS_4
DDR_DATA_24
DDR_DQS_5
DDR_DATA_25
DDR_DQS_6
DDR_DATA_26
DDR_DQS_7
DDR_DATA_27
DDR_DATA_28
DDR_DM_0
DDR_DATA_29
DDR_DM_1
DDR_DM_2
DDR_DATA_30
DDR_DATA_31
DDR_DM_3
DDR_DATA_32
DDR_DM_4
DDR_DATA_33
DDR_DM_5
DDR_DATA_34
DDR_DM_6
DDR_DATA_35
DDR_DM_7
DDR_DATA_36
DDRRAS
DDR_DATA_37
DDRCAS
DDR_DATA_38
DDRWE
DDR_DATA_39
DDRCKE0
DDR_DATA_40
DDRCKE1
DDR_DATA_41
DDRCKE2
DDR_DATA_42
DDRCKE3
DDR_DATA_43
DDR_DATA_44
DDR_SELHI_0
DDR_DATA_45
DDR_SELHI_1
DDR_DATA_46
DDR_SELLO_0
DDR_DATA_47
DDR_SELLO_1
DDR_DATA_48
DDR_MCLK_0_P
DDR_DATA_49
DDR_MCLK_0_N
DDR_DATA_50
DDR_MCLK_1_P
DDR_DATA_51
DDR_MCLK_1_N
DDR_DATA_52
DDR_MCLK_2_P
DDR_DATA_53
DDR_MCLK_2_N
DDR_DATA_54
DDR_MCLK_3_P
DDR_DATA_55
DDR_MCLK_3_N
DDR_DATA_56
DDR_MCLK_4_P
DDR_DATA_57
DDR_MCLK_4_N
DDR_DATA_58
DDR_MCLK_5_P
DDR_DATA_59
DDR_MCLK_5_N
DDR_DATA_60
DDR_DATA_61
DDR_REF
DDR_DATA_62
DDR_VREF_0
DDR_DATA_63
DDR_VREF_1

MEM_ADDR<0> 9
MEM_ADDR<1> 9
MEM_ADDR<2> 9
MEM_ADDR<3> 9
MEM_ADDR<4> 9
MEM_ADDR<5> 9
MEM_ADDR<6> 9
MEM_ADDR<7> 9
MEM_ADDR<8> 9
MEM_ADDR<9> 9
MEM_ADDR<10> 9
MEM_ADDR<11> 9
MEM_ADDR<12> 9
MEM_BA<0> 9
MEM_BA<1> 9

CS

37 10

DDR_A_0
DDR_A_1
DDR_A_2
DDR_A_3
DDR_A_4
DDR_A_5
DDR_A_6
DDR_A_7
DDR_A_8
DDR_A_9
DDR_A_10
DDR_A_11
DDR_A_12
DDR_BA_0
DDR_BA_1

CKE

AK32
AK33
AK31
AK35
AK36
AJ32
AJ35
AJ36
AG33
AG35
AH35
AG36
AH36
AH32
AG32
AG31
AE32
AF35
AF36
AE36
AE35
AE33
AD36
AD35
AA36
AA35
AA33
AB36
AB35
AC36
AA32
AB33
V36
U33
U32
V35
T30
U36
U35
T36
P33
R30
P35
P36
R36
R35
R33
R32
N35
M36
L35
M35
M33
L36
N33
M30
J32
J33
J35
K32
K33
J36
K36
K35

ADDR

37 10

MEM_DATA<0>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<3>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>
MEM_DATA<8>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<14>
MEM_DATA<15>
MEM_DATA<16>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<19>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>
MEM_DATA<24>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<30>
MEM_DATA<31>
MEM_DATA<32>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<35>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>
MEM_DATA<40>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<44>
MEM_DATA<45>
MEM_DATA<46>
MEM_DATA<47>
MEM_DATA<48>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<51>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<54>
MEM_DATA<55>
MEM_DATA<56>
MEM_DATA<57>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<62>
MEM_DATA<63>

37 9

22

5%
1/16W
SM1

5%
1/16W
SM1

H35
G35
G36
F36
F35
E35
E36
G32
D36
H36
G33
H33
D35
L30
M29

RP33
4

SYSCLK_DDRCLK_A1_UF

RP33

PINS ARE SWAPABLE FOR RPAKS

SHT

NONE

REV.

051-6694 B
9
45
1
OF

BIT 0..15

+2_5V_INTREPID

39 16 15 10 9

BIT 16..31

+2_5V_INTREPID

39 16 15 10 9

39 16 15 10 9

BIT 48..63

+2_5V_INTREPID

D
20%

0.1UF
20%
402

C752
0.1UF

37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11

RAM_DATA_B<0>
RAM_DATA_B<1>
RAM_DATA_B<2>
RAM_DATA_B<3>
RAM_DATA_B<4>
RAM_DATA_B<5>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DQS_B<0>
RAM_DQM_B<0>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DATA_B<10>
RAM_DATA_B<11>
RAM_DATA_B<12>
RAM_DATA_B<13>
RAM_DATA_B<14>
RAM_DATA_B<15>
RAM_DQS_B<1>
RAM_DQM_B<1>

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

VDD

U13

DB4*

DA15

DB5*
DB6*

DA16
DA17

DB7*

DA18

DB8*
DB9*

DA19

37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11

RAM_DATA_A<0>
RAM_DATA_A<1>
RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DATA_A<6>
RAM_DATA_A<7>
RAM_DQS_A<0>
RAM_DQM_A<0>
RAM_DATA_A<8>

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10

37 11
11 37
37 11
11 37
37 11
11 37
37 11
11 37
37 11
11 37
37 11
11 37
37 11
11 37
37 11
11 37
37 11
11 37

37 11

DB10*

37 11

DH0 F2

J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

MEM_DATA<0> 9
MEM_DATA<1> 9
MEM_DATA<2> 9
MEM_DATA<3> 9
MEM_DATA<4> 9
MEM_DATA<5> 9
MEM_DATA<6> 9
MEM_DATA<7> 9
MEM_DQS<0> 9
MEM_DQM<0> 9
MEM_DATA<8> 9
MEM_DATA<9> 9
MEM_DATA<10> 9
MEM_DATA<11> 9
MEM_DATA<12> 9
MEM_DATA<13> 9
MEM_DATA<14> 9
MEM_DATA<15> 9
MEM_DQS<1> 9
MEM_DQM<1> 9

SEL E3

RAM_MUXSEL_L

DH1 H2
DH2 J2
DH3 J3
DH4 J5

DB15*
DB16*
DB17*

DH5 J6
DH6
DH7

DB18*
DB19*

DH8
DH9
DH10

37 11

A5
B4
A2
B1
D1

RAM_DATA_A<9>
RAM_DATA_A<10>
RAM_DATA_A<11>
RAM_DATA_A<12>
RAM_DATA_A<13>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DQS_A<1>
RAM_DQM_A<1>

37 11

DB13*
DB14*

DH11

DA0

DH12
DH13

DA1
DA2

DH14
DH15

DA3
DA4
DA5

DH16
DH17
DH18

DA6
DA7
DA8

DH19

37 11

37
37

37 11

37

37 11

37

37 11

37

37 11
37 11

37
37

37 11

37

402

37 11

RAM_DATA_B<16>
RAM_DATA_B<17>
RAM_DATA_B<18>
RAM_DATA_B<19>
RAM_DATA_B<20>
RAM_DATA_B<21>
RAM_DATA_B<22>
RAM_DATA_B<23>
RAM_DQS_B<2>
RAM_DQM_B<2>
RAM_DATA_B<24>
RAM_DATA_B<25>
RAM_DATA_B<26>
RAM_DATA_B<27>
RAM_DATA_B<28>
RAM_DATA_B<29>
RAM_DATA_B<30>
RAM_DATA_B<31>
RAM_DQS_B<3>
RAM_DQM_B<3>

0.1UF
20%
402

402

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

VDD

DA11 C10

DB1*

DA12 A10

U12

DB2*
DA13 A8
CBTV4020
DB3*
DA14 A7
BGA
DB4*
DB5*

DA15
DA16

DB6*

DA17

DB7*
DB8*

DA18
DA19

A5
B4
A2
B1
D1

DH2 J2
DH3 J3

DB15*
DB16*

DH4 J5
DH5 J6
DH6 J8

DB17*
DB18*
DB19*

DH7 J9
DH8 H9
DH9 F9

37
37 11
37 11
37 11

37
37

37 11

37

37 11

37

37 11

37

37 11

37

37 11

37

37 11
37 11
37 11

RAM_DATA_A<16>
RAM_DATA_A<17>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<20>
RAM_DATA_A<21>
RAM_DATA_A<22>
RAM_DATA_A<23>
RAM_DQS_A<2>
RAM_DQM_A<2>
RAM_DATA_A<24>

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10

37
11 37
37
11 37
37
11 37
37
11 37
37
11 37
37
11 37
37
11 37

37

DH0 F2
DH1 H2

DB13*
DB14*

DH11 C9
DH12 B9

DA0
DA1
DA2

DH13 B8
DH14 B6

DA3
DA4

DH15 B5
DH16 B3
DH17 B2

DA5
DA6
DA7

DH18 C2
DH19 E2

DA8

MEM_DATA<16> 9 37
MEM_DATA<17> 9 37
MEM_DATA<18> 9 37
MEM_DATA<19> 9 37
MEM_DATA<20> 9 37
MEM_DATA<21> 9 37
MEM_DATA<22> 9 37
MEM_DATA<23> 9 37
MEM_DQS<2> 9 37
MEM_DQM<2> 9 37
MEM_DATA<24> 9 37
MEM_DATA<25> 9 37
MEM_DATA<26> 9 37
MEM_DATA<27> 9 37
MEM_DATA<28> 9 37
MEM_DATA<29> 9 37
MEM_DATA<30> 9 37
MEM_DATA<31> 9 37
MEM_DQS<3> 9 37
MEM_DQM<3> 9 37

37
37
37
37
37
37
37
37

0.1UF

C743
0.1UF

20%

SEL E3

RAM_MUXSEL_L

RAM_DATA_A<32>
RAM_DATA_A<33>
11 RAM_DATA_A<34>
11 RAM_DATA_A<35>
11 RAM_DATA_A<36>
11 RAM_DATA_A<37>
11 RAM_DATA_A<38>
11 RAM_DATA_A<39>
11 RAM_DQS_A<4>
11 RAM_DQM_A<4>
11 RAM_DATA_A<40>

37 11
37 11
37
37
37
37
37
37
37

DB0*
DB1*
DB2*
DB3*
DB4*

U10

DA11 C10
DA12 A10
DA13 A8
DA14 A7
DA15 A5

DB5*

DA16

DB6*
DB7*

DA17
DA18

DB8*

DA19

37

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10

B4
A2
B1
D1

RAM_DATA_A<41> 11 37
RAM_DATA_A<42> 11 37
RAM_DATA_A<43> 11 37
RAM_DATA_A<44> 11 37
RAM_DATA_A<45> 11 37
RAM_DATA_A<46> 11 37
RAM_DATA_A<47> 11 37
RAM_DQS_A<5> 11 37
RAM_DQM_A<5> 11 37

DB9*
DB10*

37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11

DB11*

DH0 F2

DB12*
DB13*

DH1 H2
DH2 J2
DH3 J3

DB14*
DB15*

DH4 J5
DH5 J6

DB16*
DB17*
DB18*

DH6 J8
DH7
DH8

DB19*

DH10
DH11

DA0
DA1

DH12
DH13
DH14

DA2
DA3

DH15
DH16

DA4
DA5
DA6

DH17
DH18
DH19

DA7
DA8
DA9

J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

MEM_DATA<32> 9 37
MEM_DATA<33> 9 37
MEM_DATA<34> 9 37
MEM_DATA<35> 9 37
MEM_DATA<36> 9 37
MEM_DATA<37> 9 37
MEM_DATA<38> 9 37
MEM_DATA<39> 9 37
MEM_DQS<4> 9 37
MEM_DQM<4> 9 37
MEM_DATA<40> 9 37
MEM_DATA<41> 9 37
MEM_DATA<42> 9 37
MEM_DATA<43> 9 37
MEM_DATA<44> 9 37
MEM_DATA<45> 9 37
MEM_DATA<46> 9 37
MEM_DATA<47> 9 37
MEM_DQS<5> 9 37
MEM_DQM<5> 9 37

37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11

0.1UF
20%

10V
2 CERM

C737
0.1UF
20%

2 10V
CERM

402

402

37 11
37 11
37 11
37 11
37 11
37 11
37 11
37 11

37 11

SEL E3

CRITICAL

RAM_MUXSEL_H

10 37

RAM_DATA_B<48>
RAM_DATA_B<49>
RAM_DATA_B<50>
RAM_DATA_B<51>
RAM_DATA_B<52>
RAM_DATA_B<53>
RAM_DATA_B<54>
RAM_DATA_B<55>
RAM_DQS_B<6>
RAM_DQM_B<6>
RAM_DATA_B<56>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<59>
RAM_DATA_B<60>
RAM_DATA_B<61>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_DQS_B<7>
RAM_DQM_B<7>

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

VDD

DA11 C10

DB0*
DB1*
DB2*
DB3*
DB4*

DA12 A10

U9 DA13
CBTV4020
BGA

DA14
DA15

DB5*

DA16

DB6*
DB7*

DA17
DA18

DB8*

DA19

37 11

RAM_DATA_A<48>
RAM_DATA_A<49>
RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DATA_A<54>
RAM_DATA_A<55>
RAM_DQS_A<6>
RAM_DQM_A<6>
RAM_DATA_A<56>

F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10

A8
A7
A5
B4
A2
B1
D1

RAM_DATA_A<57>
RAM_DATA_A<58>
RAM_DATA_A<59>
RAM_DATA_A<60>
RAM_DATA_A<61>
RAM_DATA_A<62>
RAM_DATA_A<63>
RAM_DQS_A<7>
RAM_DQM_A<7>

11 37
11 37
11 37
11 37
11 37
11 37
11 37
11 37
11 37

DB9*
DB10*
DB11*

DH0 F2

DB12*
DB13*

MEM_DATA<48> 9 37
MEM_DATA<49> 9 37
MEM_DATA<50> 9 37
MEM_DATA<51> 9 37
MEM_DATA<52> 9 37
MEM_DATA<53> 9 37
MEM_DATA<54> 9 37
MEM_DATA<55> 9 37
MEM_DQS<6> 9 37
MEM_DQM<6> 9 37
MEM_DATA<56> 9 37
MEM_DATA<57> 9 37
MEM_DATA<58> 9 37
MEM_DATA<59> 9 37
MEM_DATA<60> 9 37
MEM_DATA<61> 9 37
MEM_DATA<62> 9 37
MEM_DATA<63> 9 37
MEM_DQS<7> 9 37
MEM_DQM<7> 9 37

DH1 H2
DH2 J2
DH3 J3

DB14*
DB15*

DH4 J5
DH5 J6

DB16*
DB17*
DB18*

DH6 J8
DH7
DH8

DB19*

DH9

37 11

DA10

C738

CRITICAL

CBTV4020

BGA

DH10
DH11

DA0
DA1

DH12
DH13
DH14

DA2
DA3

DH15
DH16

DA4
DA5
DA6

DH17
DH18
DH19

DA7
DA8
DA9

J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2

SEL E3

DA10

RAM_MUXSEL_H 10

37

10 37

GND

GND

C5
C6
D2
D9
G2
G9
H5
H6

C5
C6
D2
D9
G2
G9
H5
H6

402

VDD

10 37

GND

20%

2 10V
CERM

402

G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1

C736
0.1UF

20%

2 10V
CERM

402

RAM_DATA_B<32>
RAM_DATA_B<33>
11 RAM_DATA_B<34>
11 RAM_DATA_B<35>
11 RAM_DATA_B<36>
11 RAM_DATA_B<37>
11 RAM_DATA_B<38>
11 RAM_DATA_B<39>
11 RAM_DQS_B<4>
11 RAM_DQM_B<4>
11 RAM_DATA_B<40>
11 RAM_DATA_B<41>
11 RAM_DATA_B<42>
11 RAM_DATA_B<43>
11 RAM_DATA_B<44>
11 RAM_DATA_B<45>
11 RAM_DATA_B<46>
11 RAM_DATA_B<47>
11 RAM_DQS_B<5>
11 RAM_DQM_B<5>

DH9

37

DA9
DA10

10V
2 CERM

37 11

37

DB12*

C727

37 11
11 37
11 37

37

DH10 E9

37

RAM_DATA_A<25>
RAM_DATA_A<26>
RAM_DATA_A<27>
RAM_DATA_A<28>
RAM_DATA_A<29>
RAM_DATA_A<30>
RAM_DATA_A<31>
RAM_DQS_A<3>
RAM_DQM_A<3>

DB9*
DB10*
DB11*

CRITICAL

DB0*

37

37

C735

2 10V
CERM

20%

37

DA9
DA10

C748

2 10V
CERM

CRITICAL
DA11 C10
DA12 A10

0.1UF

20%

2 10V
CERM

402

DB2*
DA13 A8
CBTV4020
DB3*
DA14 A7
BGA

DB11*
DB12*

C742

0.1UF

20%

2 10V
CERM

402

DB0*
DB1*

C753

0.1UF

20%

2 10V
CERM

E8
F3
F8

402

C747

2 10V
CERM

E8
F3
F8

0.1UF

GND

C5
C6
D2
D9
G2
G9
H5
H6

C741

2 10V
CERM

E8
F3
F8

E8
F3
F8

BIT 32..47

+2_5V_INTREPID

C5
C6
D2
D9
G2
G9
H5
H6

39 16 15 10 9

SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND


SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW
MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
NO STUFF

R242
37 9

MEM_MUXSEL_L<0>

R243
RAM_MUXSEL_L

10 37

37 9

MEM_MUXSEL_L<1>

5%
1/16W
MF
402

RAM_MUXSEL_L

16BIT 2:1 DDR MUXES

10 37

5%
1/16W
MF
402

NO STUFF

37 9

R252
0 2
1

MEM_MUXSEL_H<0>

R239
RAM_MUXSEL_H

10 37

37 9

MEM_MUXSEL_H<1>

5%
1/16W
MF
402

RAM_MUXSEL_H

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


10 37

II NOT TO REPRODUCE OR COPY IT

5%
1/16W
MF
402

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

051-6694

SCALE

SHT
NONE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

10
1

OF

REV.

45

7
+2_5V_MAIN
39 11

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 9
37 9

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

DDR_VREF
RAM_DATA_A<0>
RAM_DATA_A<1>
RAM_DQS_A<0>
RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<8>
RAM_DATA_A<9>
RAM_DQS_A<1>
RAM_DATA_A<10>
RAM_DATA_A<11>
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A0_L

RAM_DATA_A<16>
RAM_DATA_A<17>
RAM_DQS_A<2>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<24>
RAM_DATA_A<25>
RAM_DQS_A<3>
RAM_DATA_A<26>
RAM_DATA_A<27>

NC
NC

STANDARD
SLOT "A"
FACTORY SLOT
37 9

NC
NC
NC
NC
NC
NC

RAM_CKE<1>

NC
37 11 9
37 11 9

37 11 9
37 11 9
37 11 9
37 11 9

37 11 9
37 11 9
37 11 9
37 9

RAM_ADDR<12>
RAM_ADDR<9>
RAM_ADDR<7>
RAM_ADDR<5>
RAM_ADDR<3>
RAM_ADDR<1>
RAM_ADDR<10>
RAM_BA<0>
RAM_WE_L
RAM_CS_L<0>
NC

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 10
37 10

37 10

37 10

37 10
37 10

37 10

+3V_MAIN

37 10

40 23 13 11 6
40 23 13 11 6

RAM_DATA_A<32>
RAM_DATA_A<33>
RAM_DQS_A<4>
RAM_DATA_A<34>
RAM_DATA_A<35>
RAM_DATA_A<40>
RAM_DATA_A<41>
RAM_DQS_A<5>
RAM_DATA_A<42>
RAM_DATA_A<43>

RAM_DATA_A<48>
RAM_DATA_A<49>
RAM_DQS_A<6>
RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<56>
RAM_DATA_A<57>
RAM_DQS_A<7>
RAM_DATA_A<58>
RAM_DATA_A<59>
INT_I2C_DATA0
INT_I2C_CLK0

NC

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

201
VREF0

VREF1

VSS0
DQ0

J19

VSS1
DQ4

DQ1
VDD0

F-RT-SM

DQ5
VDD1

AS0A42-D2S

DQS0

DM0

DQ2
VSS2

DQ6
VSS3

DQ3

DQ7

DQ8
VDD2

DQ12
VDD3

DQ9

DQ13

DQS1
VSS4

DM1
VSS5

DQ10
DQ11

DQ14
DQ15

VDD4

VDD5

CK0
CK0*

VDD6
VSS6

VSS7

VSS8
KEY

DQ16

DQ20

DQ17
VDD7

DQ21
VDD8

DQS2
DQ18

DM2
DQ22

VSS9

VSS10

DQ19
DQ24

DQ23
DQ28

VDD9

VDD10

DQ25
DQS3

DQ29
DM3

VSS11

VSS12

DQ26
DQ27

DQ30
DQ31

VDD11
RFU0

VDD12
RFU1

RFU2

RFU3

VSS13
RFU4

VSS14
RFU5

RFU6

RFU7

VDD13
RFU8

VDD14
RFU9

RFU10

RFU11

VSS15
RFU12

VSS16
VSS17

RFU13
VDD16

VDD15
VDD17

CKE1

CKE0

RFU14
A12

RFU15
A11

A9

A8

VSS18
A7

VSS19
A6

A5

A4

A3
A1

A2
A0

VDD18
A10_AP

VDD19
BA1

BA0

RAS*

WE*
S0*

CAS*
S1*

RFU16

RFU17

VSS20
DQ32

VSS21
DQ36

DQ33

DQ37

VDD20
DQS4

VDD21
DM4

DQ34
VSS22

DQ38
VSS23

DQ35

DQ39

DQ40
VDD22

DQ44
VDD23

DQ41

DQ45

DQS5
VSS24

DM5
VSS25

DQ42

DQ46

DQ43
VDD24

DQ47
VDD25

VDD26
VSS26

CK1*
CK1

VSS27

VSS28

DQ48
DQ49

DQ52
DQ53

VDD27

VDD28

DQS6
DQ50

DM6
DQ54

VSS29

VSS30

DQ51
DQ56

DQ55
DQ60

VDD29
DQ57

VDD30
DQ61

DQS7

DM7

VSS31
DQ58

VSS32
DQ62

DQ59

DQ63

VDD31
SDA

VDD32
SA0

SCL

SA1
SA2
RFU19

VDDSPD
RFU18

+2_5V_MAIN

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_VREF 11

39 11

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DDR_VREF

39

RAM_DATA_A<4> 10
RAM_DATA_A<5> 10

37 10
37
37 10

37 10

RAM_DQM_A<0> 10 37
RAM_DATA_A<6> 10 37
RAM_DATA_A<7> 10
RAM_DATA_A<12> 10
RAM_DATA_A<13> 10
RAM_DQM_A<1> 10 37
RAM_DATA_A<14> 10
RAM_DATA_A<15> 10

RAM_DATA_A<20> 10
RAM_DATA_A<21> 10
RAM_DQM_A<2> 10 37
RAM_DATA_A<22> 10
RAM_DATA_A<23> 10
RAM_DATA_A<28> 10
RAM_DATA_A<29> 10
RAM_DQM_A<3> 10 37
RAM_DATA_A<30> 10
RAM_DATA_A<31> 10

RAM_DATA_B<4>
RAM_DATA_B<5>

37

37 10

37 10
37
37 10

RAM_DQM_B<0>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DATA_B<12>

37

37 10
37
37 10

37 10
37
37 10

RAM_DATA_B<13>
RAM_DQM_B<1>
RAM_DATA_B<14>
RAM_DATA_B<15>

37

37 10
37
37 10

RAM_DATA_B<20>
RAM_DATA_B<21>

37

37 10
37 10

RAM_DQM_B<2>
RAM_DATA_B<22>

37

37 10
37
37 10

RAM_DATA_B<23>
RAM_DATA_B<28>

37

37 10
37
37 10

37 10
37
37 10

RAM_DATA_B<29>
RAM_DQM_B<3>
RAM_DATA_B<30>
RAM_DATA_B<31>

37

NC
NC

NC
NC

REVERSED
SLOT "B"
CUSTOMER SLOT

NC
NC
NC
NC

RAM_CKE<0> 9

37 9

RAM_ADDR<6>
RAM_ADDR<4>
RAM_ADDR<2>
RAM_ADDR<0>

NC
NC

RAM_CKE<2>

37

NC

NC
RAM_ADDR<11>
RAM_ADDR<8>

NC
NC

37 11 9
9 11 37
37 11 9

RAM_ADDR<11>
RAM_ADDR<8>

9 11 37

37 11 9
9 11 37
37 11 9
9 11 37
37 11 9
9 11 37
37 11 9

RAM_ADDR<6>
RAM_ADDR<4>
RAM_ADDR<2>
RAM_ADDR<0>

9 11 37

RAM_BA<1> 9
RAM_RAS_L 9
RAM_CAS_L 9
RAM_CS_L<1>

37 11 9
11 37
37 11 9
11 37
37 11 9
11 37
37 9

RAM_BA<1>
RAM_RAS_L
RAM_CAS_L
RAM_CS_L<3>

9 37

NC

NC
RAM_DATA_A<36> 10
RAM_DATA_A<37> 10
RAM_DQM_A<4> 10 37
RAM_DATA_A<38> 10
RAM_DATA_A<39> 10
RAM_DATA_A<44> 10
RAM_DATA_A<45> 10
RAM_DQM_A<5> 10 37
RAM_DATA_A<46> 10
RAM_DATA_A<47> 10
SYSCLK_DDRCLK_A1_L 9
SYSCLK_DDRCLK_A1 9 37
RAM_DATA_A<52> 10
RAM_DATA_A<53> 10
RAM_DQM_A<6> 10 37
RAM_DATA_A<54> 10
RAM_DATA_A<55> 10
RAM_DATA_A<60> 10
RAM_DATA_A<61> 10
RAM_DQM_A<7> 10 37
RAM_DATA_A<62> 10
RAM_DATA_A<63> 10

37 10
37
37 10

RAM_DATA_B<36>
RAM_DATA_B<37>

37

37 10
37 10

RAM_DQM_B<4>
RAM_DATA_B<38>

37

37 10
37
37 10

RAM_DATA_B<39>
RAM_DATA_B<44>

37

37 10
37
37 10

37 10
37
37 10

RAM_DATA_B<45>
RAM_DQM_B<5>
RAM_DATA_B<46>
RAM_DATA_B<47>

37

37 9
37
37 9

37 10
37
37 10

SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_B1
RAM_DATA_B<52>
RAM_DATA_B<53>

37

37 10
37 10

RAM_DQM_B<6>
RAM_DATA_B<54>

37

37 10
37
37 10

RAM_DATA_B<55>
RAM_DATA_B<60>

37

37 10
37
37 10

RAM_DATA_B<61>
RAM_DQM_B<7>

+3V_MAIN
37 10
37
37 10

RAM_DATA_B<62>
RAM_DATA_B<63>

37

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

VREF1

DM0
DQ6

DQS0
DQ2

VSS3

VSS2

DQ7
DQ12

DQ3
DQ8

VDD3
DQ13

VDD2

DM1

DQ9
DQS1

VSS5
DQ14

VSS4
DQ10

DQ15

DQ11

VDD5
VDD6

VDD4
CK0

VSS6

CK0*

VSS8

VSS7
KEY

DQ16
DQ17

DQ21

VDD7

VDD8
DM2
DQ22

DQS2
DQ18

VSS10
DQ23

VSS9
DQ19

DQ28

DQ24

VDD10
DQ29

VDD9
DQ25

DM3
VSS12

DQS3
VSS11
DQ26

DQ30

DQ27

DQ31
VDD12
RFU1

VDD11
RFU0

RFU3
VSS14

RFU2
VSS13
RFU4

RFU5

RFU6
VDD13

RFU7
VDD14

RFU8

RFU9
RFU11

RFU10
VSS15

VSS16

RFU12

VSS17
VDD15
VDD17

RFU13
VDD16

CKE0
RFU15

CKE1
RFU14
A12

A11

A9
VSS18

A8
VSS19

A7

A6
A4

A5
A3

A2

A1

A0
VDD19

VDD18
A10_AP

BA1

BA0
WE*

RAS*
CAS*

S0*

S1*

RFU16
VSS20

RFU17
VSS21

DQ32

DQ36
DQ37

DQ33
VDD20

VDD21

DQS4

DM4
DQ38

DQ34
VSS22

VSS23

DQ35
DQ40

DQ39
DQ44

VDD22

VDD23

DQ41
DQS5

DQ45
DM5

VSS24

VSS25
DQ46

DQ42
DQ43

DQ47

VDD24

VDD25
CK1*
CK1

VDD26
VSS26

VSS28
DQ52

VSS27
DQ48
DQ49

DQ53

VDD27
DQS6

VDD28
DM6

DQ50

DQ54
VSS30

VSS29
DQ51

DQ55

DQ56

DQ60
VDD30
DQ61

VDD29
DQ57

DM7
VSS32

DQS7
VSS31
DQ58

DQ62

DQ59
VDD31

DQ63
VDD32

SDA

SA0
SA1

ADDR=0XA2(WR)/0XA3(RD)
ADDR=0XA0(WR)/0XA1(RD)
NC

NC

SCL
VDDSPD

SA2

RFU18

RFU19

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DDR_VREF

+2_5V_MAIN

11 39

RAM_DATA_B<0>
RAM_DATA_B<1>

10 37

RAM_DQS_B<0> 10
RAM_DATA_B<2> 10
RAM_DATA_B<3>
RAM_DATA_B<8>

SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B0_L

ONE 0.1UF PER SLOT

R449
1K

1%
1/16W
MF
2 402

37
37

DDR_VREF

10 37
10 37

RAM_DATA_B<9> 10
RAM_DQS_B<1> 10
RAM_DATA_B<10>
RAM_DATA_B<11>

DDR VREF

10 37

R440

1K

37

C542

0.1UF

1%
1/16W
MF
2 402

37

11 39

C482

0.1UF

20%

20%

2 10V
CERM

2 10V
CERM

402

402

10 37
10 37

9 37
9 37

RAM_DATA_B<16>
RAM_DATA_B<17>

DDR BYPASS CAPS


SLOT "A"

10 37
10 37

+2_5V_MAIN
RAM_DQS_B<2> 10
RAM_DATA_B<18> 10
RAM_DATA_B<19>
RAM_DATA_B<24>

37
37

10 37

10 37

C602

10UF

RAM_DATA_B<25> 10
RAM_DQS_B<3> 10
RAM_DATA_B<26>
RAM_DATA_B<27>

20%
2 6.3V
CERM
805

37
37

10UF
20%
805

10 37
10 37

NC
NC

C573

0.1UF
20%

2 10V
CERM

NC
NC
NC
NC

C595

20%
2 10V
CERM
402

0.1UF
20%

C525
20%

0.1UF

20%
2 10V
CERM
402

C490
20%

0.1UF

20%
2 10V
CERM
402

C527
0.1UF

20%

2 10V
CERM

402

C549

0.1UF

2 10V
CERM

402

C524

0.1UF

2 10V
CERM

402

0.1UF

NC
NC

C526

2 10V
CERM

402

RAM_CKE<3> 9

C601

2 6.3V
CERM

402

C523

0.1UF

20%
2 10V
CERM
402

C481
0.1UF
20%

2 10V
CERM

402

37

NC
RAM_ADDR<12> 9 11 37
RAM_ADDR<9> 9 11 37
RAM_ADDR<7> 9
RAM_ADDR<5> 9
RAM_ADDR<3> 9
RAM_ADDR<1> 9

11 37
11 37

+2_5V_MAIN

11 37
11 37

RAM_ADDR<10> 9 11 37
RAM_BA<0> 9 11 37
RAM_WE_L 9 11 37
RAM_CS_L<2> 9 37

RAM_DATA_B<32>
RAM_DATA_B<33>

C589

FOR RETURN CURRENT

SLOT "B"
1

10UF

20%
2 6.3V
CERM
805

NC

10UF
20%
805

10 37
10 37

RAM_DQS_B<4> 10 37
RAM_DATA_B<34> 10 37

C551

0.1UF

RAM_DATA_B<35>
RAM_DATA_B<40>

C530

2 6.3V
CERM

20%

2 10V
CERM

10 37

402

10 37

C550

0.1UF
20%

C596
0.1UF
20%

2 10V
CERM

2 10V
CERM

402

C597

402

0.1UF
20%

2 10V
CERM

C522
0.1UF
20%

2 10V
CERM

402

402

RAM_DATA_B<41> 10 37
RAM_DQS_B<5> 10 37
RAM_DATA_B<42>
RAM_DATA_B<43>

RAM_DATA_B<48>
RAM_DATA_B<49>

1
10 37

C761
0.1UF

20%
2 10V
CERM
402

10 37

C565
0.1UF

20%
2 10V
CERM
402

C548
0.1UF

20%
2 10V
CERM
402

C594
0.1UF

20%
2 10V
CERM
402

C489
0.1UF
20%

2 10V
CERM

402

10 37
10 37

RAM_DQS_B<6> 10 37
RAM_DATA_B<50> 10 37
RAM_DATA_B<51>
RAM_DATA_B<56>

DDR SODIMM CONNS

10 37
10 37

NOTICE OF PROPRIETARY PROPERTY

RAM_DATA_B<57> 10 37
RAM_DQS_B<7> 10 37
RAM_DATA_B<58>
RAM_DATA_B<59>
INT_I2C_DATA0
INT_I2C_CLK0

NC

10 37

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

+3V_MAIN

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

6 11 13 23 40

SIZE

6 11 13 23 40

APPLE COMPUTER INC.

DRAWING NUMBER

051-6694

SCALE

202

202

J22

VREF0
VSS0

DQ0
DQ4AS0A42-D2R
DQ1
F-RT-SM
DQ5
VDD0
VDD1

DQ20

+2_5V_MAIN
CRITICAL

201

VSS1

+2_5V_MAIN
CRITICAL

SHT
NONE

REV.

11 45
OF

AGP PULL-UPS/PULL DOWNS

R146
39 14 12 8

R112
39 14 12 8

+1_5V_INTREPID_PLL

0.22UF

+1_5V_INTREPID_PLL6

R192
33 2
1
CLK33M_AIRPORT

39 21 19 18 16 15 12

R209

AR17
AR16
AT17

AIRPORT_PCI_REQ_L
CBUS_PCI_REQ_L
USB2_PCI_REQ_L

VDD15A_6
(PLL4)

PCIAD_0
PCIAD_1
CRITICAL PCIAD_2
33
PCIAD_3
AT16 PCI_GNT_0
2
37 17 CLK33M_CBUS1
40 25 AIRPORT_PCI_GNT_L
U45
PCIAD_4
AN18 PCI_GNT_1
5%
17 CBUS_PCI_GNT_L
INTREPID-REV2.1 PCIAD_5
1/16W
AN17 PCI_GNT_2
BGA
MF
27 USB2_PCI_GNT_L
402
(7 OF 9)
PCIAD_6
NEC_USB
AR18 PCI_CLK0
37 CLK33M_AIRPORT_UF
PCIAD_7
AH18
37 CLK33M_CBUS_UF
PCI_CLK1
PCIAD_8
PCI/ROM
22 2
AT18
1
37
CLK33M_USB2
CLK33M_USB2_UF
37 27
PCI_CLK2
INTERFACE
PCIAD_9
AM18 PCI_CLK_OUT
5%
37 INT_PCI_FB_OUT
PCIAD_10
1/16W
AJ19 PCI_CLK_IN VOUT = 3.3V PCIAD_11
37 INT_PCI_FB_IN
MF
402
OUTPUT IMPEDANCE IS ABOUT 20OHM
VIN = 1.5V (CORE)
PCIAD_12
AT14 PCI_PAR
38 27 25 17 PCI_PAR
40
PCIAD_13
AN16 PCI_FRAME
27 25 17 12 PCI_FRAME_L
40 38
33
PCIAD_14
AT15 PCI_TRDY
1
2
27 25 17 12 PCI_TRDY_L
40 38
PCIAD_15
AH16 PCI_IRDY
5%
27 25 17 12 PCI_IRDY_L
40 38
1/16W
PCIAD_16
AR15 PCI_STOP
MF
27 25 17 12 PCI_STOP_L
40 38
402
PCIAD_17
AM17 PCI_DEVSEL
27 25 17 12 PCI_DEVSEL_L
40 38
PCIAD_18
AR14
40 38 27 25 17 PCI_CBE<0>
PCI_CBE_0
PCIAD_19
1
AK16 PCI_CBE_1
40 38 27 25 17 PCI_CBE<1>
PCIAD_20
47
AM16 PCI_CBE_2
40 38 27 25 17 PCI_CBE<2>
PCIAD_21
5%
1/16W
AJ15
40 38 27 25 17 PCI_CBE<3>
PCIAD_22
PCI_CBE_3
MF
402
2
PCIAD_23
AK17 ROM_OVRLY_EN
37 CLK66M_GPU_AGP_UF
PCIAD_24
AM9 ROM_CS
12 INT_ROM_CS_L
PCIAD_25
AR7
12 INT_ROM_OE_L
ROM_OE
PCIAD_26
AN9 ROM_WE
12 INT_ROM_RW_L
PCIAD_27
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
PCIAD_28
PCIAD_29
PCIAD_30
33
PCIAD_31
(PLL4)
1
2
37 18 CLK66M_GPU_AGP
VSSA_6
5%
J10
1/16W
MF
402
27 12

PCI_REQ_0
PCI_REQ_1
PCI_REQ_2

OMIT

R157

R171

+1_5V_INTREPID_PLL5

R186

R169

+3V_GPU

5%
1/16W
MF
402

AM10
AR8
AK12
AJ8
AN10
AT8
AN11
AH13
AK13
AR9
AR10
AT9
AR11
AM12
AN12
AK11
AT11
AT10
AN13
AM13
AR12
AJ11
AT12
AM11
AR13
AK15
AH15
AN14
AT13
AK14
AN15
AM15

PCI_AD<0> 9 17 25 27 38 40
PCI_AD<1> 9 17 25 27 38 40
PCI_AD<2> 9 17 25 27 38 40
PCI_AD<3> 9 17 25 27 38 40
PCI_AD<4> 9 17 25 27 38 40
PCI_AD<5> 9 17 25 27 38 40
PCI_AD<6> 9 17 25 27 38 40
PCI_AD<7> 9 17 25 27 38 40
PCI_AD<8> 9 17 25 27 38 40
PCI_AD<9> 9 17 25 27 38 40
PCI_AD<10> 9 17 25 27 38 40
PCI_AD<11> 9 17 25 27 38 40
PCI_AD<12> 9 17 25 27 38 40
PCI_AD<13> 9 17 25 27 38 40
PCI_AD<14> 9 17 25 27 38 40
PCI_AD<15> 9 17 25 27 38 40
PCI_AD<16> 9 17 25 27 38 40
PCI_AD<17> 9 17 25 27 38 40
PCI_AD<18> 9 17 25 27 38 40
PCI_AD<19> 9 17 25 27 38 40
PCI_AD<20> 9 17 25 27 38 40
PCI_AD<21> 17 25 27 38 40
PCI_AD<22> 17 25 27 38 40
PCI_AD<23> 17 25 27 38 40
PCI_AD<24> 9 17 25 27 38 40
PCI_AD<25> 9 17 25 27 38 40
PCI_AD<26> 9 17 25 27 38 40
PCI_AD<27> 9 17 25 27 38 40
PCI_AD<28> 9 17 25 27 38 40
PCI_AD<29> 9 17 25 27 38 40
PCI_AD<30> 9 17 25 27 38 40
PCI_AD<31> 9 17 25 27 38 40

STOP_AGP_L
INT_AGPPVT
INT_AGP_VREF

U45

AN19
AJ24
AB20
AB21
AT19
AK28
AK27
AK25

R217
0

AGP I/O REFERENCE

39 21 19

R185

C247

AGPPAR AT29
AGPFRAME AN28
AGPTRDY AR29
AGPIRDY AT28
AGPSTOP AM28
AGPDEVSEL AM27

+3V_SLEEP

RP17
3

PCI_FRAME_L

10K

5%
1/16W
SM1
40 38 27 25 17 12

PCI_DEVSEL_L

PCI_IRDY_L

10K

10K

5%
1/16W
SM1
40 25 12

SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS


PLACE CLOSE TO INTREPID SIDE
R103

7
12

10K

INT_ROM_CS_L

22

5%

12

MF
402

INT_ROM_OE_L

5%
1/16W
SM1

12

INT_ROM_RW_L

22

R82

ROM_CS_L

22

ROM_OE_L

9 25 40

AGP_ST0 AN29
AGP_ST1 AT30
AGP_ST2 AR30

9 25 40

5%
1/16W
MF
402

ROM_RW_L 9

5%
1/16W
MF
402

25 40
18 12

AGP_WBF_L

27 12

17 12

USB2_PCI_REQ_L

CBUS_PCI_REQ_L

RP18
10K 6
3

10K

AK30

AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N

AGP_WBF

VSSA_5
(PLL5)

AGPPIPE
AGPRBF

AK20
AK19
AK21
AK22

+1_5V_AGP
AGP_REQ_L
AGP_GNT_L
AGP_AD<0>
AGP_AD<1>
AGP_AD<2>
AGP_AD<3>
AGP_AD<4>
AGP_AD<5>
AGP_AD<6>
AGP_AD<7>
AGP_AD<8>
AGP_AD<9>
AGP_AD<10>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<14>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<21>
AGP_AD<22>
AGP_AD<23>
AGP_AD<24>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<31>
AGP_CBE<0>
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>

12 18 38

18 38
18 38

RP22

18 38
18 38

38 18 12

AGP_SB_STB
AGP_SB_STB_L
AGP_ST<0>
AGP_ST<1>
AGP_ST<2>

18 38

38 18 12

RP20

18 38
38 18 12

AGP_FRAME_L

18 38

10K

5%
1/16W
SM1

18 38
18 38
38 18 12

18 38

RP19

38 18 12

AGP_IRDY_L

10K

18 38
18 38
38 18 12

RP22

18 38
38 18 12

AGP_STOP_L

10K

5%
1/16W
SM1

18 38
18 38
38 18 12

18 38

RP19

18 12

AGP_WBF_L

10K

5%
1/16W
SM1

18 38
18 38

18 38

12

AGP_PIPE_L

R193

18 38

10K

AGP_AD_STB<0> 1

12 18 38
12 18 38

38 18 12

R187

AGP_SB_STB

10K

18 38
18 38
18 38
18 38
18 38

R194

18 38
18 38
38 18 12

AGP_AD_STB_L<0> 1

12 18 38

18

10K

5%
1/16W
MF
402

12 18 38

38 18 12

AGP_AD_STB_L<1>

18

R216

18

38 18 12

AGP_SB_STB_L

10K

R170
1

10K

5%
1/16W
MF
402

5%
1/16W
MF
402

12
12 18 38

INTREPID AGP/PCI

NOTICE OF PROPRIETARY PROPERTY

5%
1/16W
SM1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

USB2 AND CBUS REQ REMAINS ON


+3V_MAIN BECAUSE THESE CHIPS
ARE POWERED IN SLEEP

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

REV.

051-6694 B
12
45
SHT

NONE

5%
1/16W
MF
402

18 38

5%
1/16W
SM1

5%
1/16W
MF
402

R230

12 18 38

10K

AGP_AD_STB<1>

12 18 38
12 18 38

5%
1/16W
MF
402

18 38

RP20
10K
5%
1/16W
SM1

18 38
18 38

5%
1/16W
SM1

RP22

18 38
18 38

10K

AGP_RBF_L

18 38

5%
1/16W
SM1

RP20

18 38

10K

AGP_TRDY_L

18 38
18 38

5%
1/16W
SM1

18 38

5%
1/16W
SM1

RP22

18 38
18 38

10K

AGP_DEVSEL_L

18 38

5%
1/16W
SM1

RP20

18 38

10K

AGP_GNT_L

18 38

AGP_AD_STB<0> 12 18 38
AGP_AD_STB_L<0> 12 18 38
AGP_AD_STB<1> 12 18 38
AGP_AD_STB_L<1> 12 18 38

AJ29 AGP_PIPE_L
AK24 AGP_RBF_L

5%

1/16W
SM1

18 38

38 18 12

AGP_SBA<0>
AGP_SBA<1>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<6>
AGP_SBA<7>

10K

AGP_REQ_L

18 38

38 18 12

AGP_PAR
AGP_FRAME_L
AGP_TRDY_L
AGP_IRDY_L
AGP_STOP_L
AGP_DEVSEL_L

12 15 16 18 19 21
39

12 18 38

V13

+3V_MAIN
RP18

AT32
AR32
AM31
AN31
AR31
AT31
AM30
AN30

AGP_SB_STB_P AH25
AGP_SB_STB_N AG25

R77

1/16W

RP18
2

AIRPORT_PCI_REQ_L

10K

5%
1/16W
SM1

RP17
4

PCI_STOP_L

RP17

12 PCI_TRDY_L

40 38 27 25 17 12

10K

5%
1/16W
SM1

5%
1/16W
SM1
40 38 27 25 17

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

RP18

RP17
40 38 27 25 17 12

SIMPLY PROVIDING REFERENCE TO CHIP


BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS

10K

5%
1/16W
SM1

STP_AGP INTREPID-REV2.1 AGPREQ AT33


BGA
AGPPVT
AGPGNT AM29
(3 OF 9)
39 18 12
AGPVREF0
AGPAD0 AR19
CRITICAL
AGPVREF1
AGPAD1 AM19
AGPAD2 AT20
18 12 AGP_BUSY_L
AGP_BUSY
AGPAD3 AR20
CLK66M_AGP_15V_TP
AGP_CLK
AGPAD4 AT21
37 INT_AGP_FB_IN
= Vcore (1.5V)
AGP_FB_IN Vin
AGPAD5 AN20
37 INT_AGP_FB_OUT
AGP_FB_OUT Vout = AGPIO (1.5V)
AGPAD6 AR21
AGPAD7 AN21
Need divider for 3.3V slot!
AGPAD8 AM21
AGPAD9 AT22
1
2
AGPAD10 AR22
5%
AGPAD11 AN22
1/16W
MF
AGPAD12 AM22
402
AGP
AGPAD13 AN23
INTERFACES
AGPAD14 AR23
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
AGPAD15 AT24
AGPAD16 AM23
AGPAD17 AR24
AGPAD18 AT25
AGPAD19 AR25
AGPAD20 AM24
(PLACE CLOSE TO INTREPID AGP BALLS)
AGPAD21 AN25
AGPAD22 AL24
18 16 15 12 +1_5V_AGP
AGPAD23 AR26
AGPAD24 AT26
AGPAD25 AM25
1
AGPAD26 AN26
4.99K
AGPAD27 AM26
1%
1/16W
AGPAD28 AR27
MF
402 2
AGPAD29 AT27
AGPAD30 AR28
INT_AGP_VREF 12 18 39
AGPAD31 AN27
1
1
AGPCBE_0 AM20
4.99K
0.22UF
1%
AGPCBE_1 AT23
20%
1/16W
6.3V
MF
2 CERM
AGPCBE_2 AN24
402 2
402
AGPCBE_3 AL25
12

STOP_AGP_L

VDD15A_5
(PLL5)
OMIT

PCI PULL-UPS
40 38 27 25 17 12

12

V14

10K

5%
1/16W
SM1

RP19

use 52-ohm a resistor here.

1%
1/16W
MF
2 402

18 19 21 39

RP19
2

AGP_BUSY_L

NOTE: Designs using AGP slot should

60.4

R180

39

18 12

40 25 12

4.7

20%
6.3V 2
CERM
402

+1_5V_AGP

J11

17 12

R147

39

0.22UF

20%
6.3V 2
CERM
402

D
5%
1/16W
MF
402

C160 1

5%
1/16W
MF
402

C83 1

40 37 25

4.7

+1_5V_INTREPID_PLL

OF

7
OMIT

CRITICAL

U45

ATA_D0
ATA_D1
ATA_D2
ATA_D3
ATA_D4
ATA_D5
ATA_D6
ATA_D7
ATA_D8
ATA_D9
ATA_D10
ATA_D11
ATA_D12
ATA_D13
ATA_D14
ATA_D15

INTREPID-REV2.1
BGA
(5 OF 9)

D
UATA100

37 28

V5
T1
U1
U2
V4
V2
W1
V1
W2
W8
W4
W5
Y2
Y1
W7
Y8

UIDE_DATA<0> 25 38
UIDE_DATA<1> 25 38
UIDE_DATA<2> 25 38
UIDE_DATA<3> 25 38
UIDE_DATA<4> 25 38
UIDE_DATA<5> 25 38
UIDE_DATA<6> 25 38
UIDE_DATA<7> 25 38
UIDE_DATA<8> 25 38
UIDE_DATA<9> 25 38
UIDE_DATA<10> 25 38
UIDE_DATA<11> 25 38
UIDE_DATA<12> 25 38
UIDE_DATA<13> 25 38
UIDE_DATA<14> 25 38
UIDE_DATA<15> 25 38

CARDSLOT

10

ENET_PHY_TX_EN

IDE

IDEA0
IDEA1
IDEA2
IDEA3
IDEA4
IDEA5
IDEA6
IDEA7
IDEA8
IDEA9

AF5
AE7
AK1
AG5
AH4
AL1
AK2
AH5
AF7
AG7

38 28

ENET_PHY_TX_ER

10

H10
E9
D8
A6
B7
G10
D9
E10

ENET_LINK_TXD<0>
ENET_LINK_TXD<1>
ENET_LINK_TXD<2>
ENET_LINK_TXD<3>
ENET_LINK_TXD<4>
ENET_LINK_TXD<5>
ENET_LINK_TXD<6>
ENET_LINK_TXD<7>

38 13
38 13
38 13
38 13
38 13

38 13

J12 RX_CLK
C4 RX_DV
D2 RX_ER

ENET_LINK_RXD<0>
28 ENET_LINK_RXD<1>
28 ENET_LINK_RXD<2>
28 ENET_LINK_RXD<3>
28 ENET_LINK_RXD<4>
28 ENET_LINK_RXD<5>
28 ENET_LINK_RXD<6>
28 ENET_LINK_RXD<7>
28 CLKENET_LINK_GBE_REF
37 CLKENET_LINK_GTX
28 ENET_CRS
28 ENET_COL
28 ENET_MDIO
28 ENET_MDC

D3
E7
D6
B4
A4
D7
G9
E8
L13
H12
E6
C5
B5
B6

38 28
38

HD_DMARQ

38

25 38

38
38
38

R92

38

HD_INTRQ

MF
+3V_MAIN
402

R124

25 38

37 28

CLKENET_PHY_GTX

10

5%
1/16W
MF
402

CSLOT_CE1_L_SPN
CSLOT_CE2_L_SPN
1
CSLOT_IORD_L_SPN
CSLOT_IOWR_L_SPN
10K
5%
CSLOT_OE_L_SPN
1/16W
MF
CSLOT_WE_L_SPN
2 402
CSLOT_IOWAIT_L_PU

R52

38
37

2
38
38
38
38

40 14
40 28
40 28

EIDE_DATA<0> 25 38
EIDE_DATA<1> 25 38
EIDE_DATA<2> 25 38
EIDE_DATA<3> 25 38
EIDE_DATA<4> 25 38
EIDE_DATA<5> 25 38
EIDE_DATA<6> 25 38
EIDE_DATA<7> 25 38
EIDE_DATA<8> 25 38
EIDE_DATA<9> 25 38
EIDE_DATA<10> 25 38
EIDE_DATA<11> 25 38
EIDE_DATA<12> 25 38
EIDE_DATA<13> 25 38
EIDE_DATA<14> 25 38
EIDE_DATA<15> 25 38

40 28

28 13

GB ETHERNET

FIREWIRE

U5

INT_RESET_L

9 31

T2

INT_PU_RESET_L

26 31

PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA4
PHY_DATA5
PHY_DATA6
PHY_DATA7

L4
M4
P7
N5
K1
K2
L2
N4

FW_LINK_DATA<0>
FW_LINK_DATA<1>
FW_LINK_DATA<2>
FW_LINK_DATA<3>
FW_LINK_DATA<4>
FW_LINK_DATA<5>
FW_LINK_DATA<6>
FW_LINK_DATA<7>

PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK

M1
P5
L1
M2
T7

FW_PHY_LPS
29
FW_LINK_CNTL<0> 29
FW_LINK_CNTL<1> 29
38 FW_LINK_LREQ
CLKFW_LINK_PCLK 29

FWR_LCLK U14
FW_LINKON N2
FW_PINT N1

37

10K

5%
1/16W
MF

29 38

RP16

402

29 38
40 28 13

29 38
40 28 13

29 38

1K

JTAG_ASIC_TRST_L 1

5%
1/16W
MF
402

29 38
29 38

R34
22

38

13

FW_PHY_LREQ

1/16W
MF
402

37

13

22

CLKFW_PHY_LCLK 29

37

I2C PULL-UPS
40 23 13 11 6

INT_I2C_CLK0

2.2K
2

40 23 13 11 6

IICCLK_0 AN2
IICDATA_0 AN1

INT_I2C_CLK0
INT_I2C_DATA0

IICCLK_1 AK5
IICDATA_1 AM3

INT_I2C_CLK1
INT_I2C_DATA1

40 26 24 23 14 13

INT_I2C_CLK1

2.2K

5%
1/16W
SM1

13 14 23 24 26 40
13 14 23 24 26 40

38 28

ENET_PHY_TXD<0>

ADDR

5%
1/16W
SM1
38 28

ENET_LINK_TXD<0>

ENET_PHY_TXD<2>

22

5%
1/16W
SM1

NOT USING CARDSLOT INTERFACE

38 28

ENET_PHY_TXD<3>

ENET_PHY_TXD<4>

38 28

ENET_PHY_TXD<7>

22

ENET_LINK_TXD<3>

13 38

5%
1/16W
SM1
ENET_LINK_TXD<4>

13 38

5%
1/16W
SM1

22

ENET_LINK_TXD<5>

13 38

5%
1/16W
SM1

RP15
ENET_PHY_TXD<6>

13 38

RP15

ENET_PHY_TXD<5>

38 28

22

5%
1/16W
SM1
38 28

13 38

RP14

RP14
38 28

ENET_LINK_TXD<1>

ENET_LINK_TXD<2>

22

5%
1/16W
SM1

RP14
38 28

22

ENET_LINK_TXD<6>

13 38

RP15
4

22

ENET_LINK_TXD<7>

R154

1
0
0
0
0
0
0
0
0
0

1K

1%
1/16W

MF

2 402

X
0
0
0
1
1
1
1
1
1

X
EXTPLL
SHUTDOWN

(OUTPUT)
(OUTPUT)

HWPLL_
TESTSEL5
(INPUT)

0(I)
0(I)
0(I)
1(I)
1(I)
1(I)

X
DDR_
TPDENABLE
(OUTPUT)

0(I)
1(I)
0(I)
1(I)
1(I)
0(I)
0(I)
1(I)

0
1
1

(OUTPUT)

MEMWE

0
1
0
1
X

SELECTED
PLL OUTPUTS
SELECTED
PLL OUTPUTS
SYNC/MEM DATA
BYPASS

X(I)
X(I)
X(I)
X(I)
X(I)

BUS

A0-WR
A1-RD
A2-WR
A3-RD
AC-WR
AD-RD
AE-WR
AF-RD
84-WR
85-RD
58-WR
59-RD
6A-WR
6B-RD
D0-WR
D1-RD
B0-WR
B1-RD

13 38

RP14

ENET_PHY_TXD<1>

RP12
3

INT_I2C_DATA1

2.2K

5%
1/16W
SM1

RP15
22

2.2K

5%
1/16W
SM1

RP12

6 11 13 23 40

RP12
1

INT_I2C_DATA0

6 11 13 23 40

+3V_MAIN

5%
1/16W
SM1
TEST

5%
1/16W
MF
402

5%
1/16W
MF
402

38

1K

INT_TST_MONIN_PD 1

R145
1

10K

5%
1/16W
SM1

R629

5%

38

RP16
4

INT_JTAG_TEI

29 38

5%
1/16W
SM1

R626

29 38

10K

JTAG_ASIC_TCK

29 38

CLKFW_LINK_LCLK
FW_LKON
29
FW_PINT
29

I2C-0
(MAIN)

RAM - STANDARD
J20 - PG 12

RAM - REVERSED
J23 - PG 12

I2C-2

I2C-1

PMU

(SLEEP)

(MAIN)

N/A
N/A

(SLEEP)

N/A

N/A

N/A

N/A

DASH MODEM

N/A

N/A

N/A

BOOTBANG E2PROM

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

U37 - PG 23

LMU
U36 - PG 23

J9 - PG 25

N/A

FAN CONTROLLER

N/A

N/A

N/A

CLOCK SLEW SSCG

N/A

U3 - PG 24

U56 - PG 15

MMM

SNAPPER SOUND
J12 - PG 24

N/A

N/A

N/A

N/A

N/A

13 38

5%
1/16W
SM1

INT_TST_PLLEN_PD 1

5%
1/16W
MF
402

R621
13

10K

RP12

JTG_RSTN_LTST_TEI_H JTG_TDO_H JTG_TDI_H TST_PLLEN_H ANALYZER_CLK


(I/O)
(I/O)

RESET
PURESET

MISC

R117
2

JTAG_ENET_TDO

ENET_TXD SERIES TERMINATION

38

EIDE_RST_L 25 38
EIDE_WR_L
25 38
EIDE_RD_L
25 38
EIDE_DMACK_L 25 38
EIDE_DMARQ 25 38
EIDE_INT
25 38

5%
1/16W
SM1

40 26 24 23 14 13

38

AJ4
AM2
AL2
AG8
AH7
AA7

10K

JTAG_ASIC_TMS

(4 OF 9)

TDI
TDO
TCK
TMS
TRSTN
TEI
TST_MONIN
TST_MONOUT
TST_PLLEN

38

EIDE_IOCHRDY 25 38
EIDE_CS0_L 25 38
EIDE_CS1_L 25 38

40 28 13

BGA

RXD_0
RXD_1
RXD_2
RXD_3
RXD_4
RXD_5
RXD_6
RXD_7
GBE_REFCLK
GTX_CLK
CRS
COL
MDIO
MDC

AK8
AT5
AP5
AR5
AN6
AH10
AM7
AK10
AR6

JTAG_ENET_TDO
13 JTAG_ASIC_TDO
13 JTAG_ASIC_TCK
13 JTAG_ASIC_TMS
13 JTAG_ASIC_TRST_L
13 INT_JTAG_TEI
13 INT_TST_MONIN_PD
INT_TST_MONOUT_TP
13 INT_TST_PLLEN_PD

28 13

U45

5%
1/16W
SM1

RP16

INTREPID-REV2.1

10K

JTAG_ASIC_TDO

CRITICAL

TXD_0
TXD_1
TXD_2
TXD_3
TXD_4
TXD_5
TXD_6
TXD_7

CLKENET_LINK_RX
28 ENET_RX_DV
28 ENET_RX_ER

37 28

38

OMIT

H9 TX_CLK
A7 TX_EN
A5 TX_ER

ENET_LINK_TX_ER

38 13

R51

IDECHRDY AK4
IDECS0 AB7
IDECS1 AM1
IDERST
IDEWR
IDERD
IDEDMACK
IDEDMARQ
IDEINTRQ

38

5%
1/16W
MF
402

UIDE_REF
39
UIDE_RST_L 25 38
UIDE_DIOW_L 25 38
UIDE_DIOR_L 25 38
82 2
1
UIDE_IOCHRDY 25 38
UIDE_CS0_L 25 38
5%
1/16W
UIDE_CS1_L 25 38
MF
402
UIDE_DMACK_L 25 38
38 UIDE_DMARQ
82 2
1
38 UIDE_INTRQ

EIDE_ADDR<0> 25
EIDE_ADDR<1> 25
EIDE_ADDR<2> 25
CSLOT_ADDR3_SPN
CSLOT_ADDR4_SPN
CSLOT_ADDR5_SPN
CSLOT_ADDR6_SPN
CSLOT_ADDR7_SPN
CSLOT_ADDR8_SPN
CSLOT_ADDR9_SPN

+3V_MAIN
RP16

ENET_LINK_TX_EN

R624

CS_WAIT IS AN INPUT
AC5
AD4
AF1
AG1
AF2
AH1
AD5
AG2
AE4
AE5
AF4
AH2
AD7
AG4
AJ1
AJ2

38

40 14 13

38

AD1
AB4
AB5
AD2
AC4
AE1
AE2

IDEDD0
IDEDD1
IDEDD2
IDEDD3
IDEDD4
IDEDD5
IDEDD6
IDEDD7
IDEDD8
IDEDD9
IDEDD10
IDEDD11
IDEDD12
IDEDD13
IDEDD14
IDEDD15

5%
1/16W
MF
402

5%
1/16W

CS_CE1
CS_CE2
CS_IORD
CS_IOWR
CS_OE
CS_WE
CS_WAIT

TEST PULL-UPS/DOWNS

R630
38 28

UIDE_ADDR<0> 25 38
UIDE_ADDR<1> 25 38
UIDE_ADDR<2> 25 38

ATA_VREF Y15
ATA_RST Y4
ATA_WR AA1
UDMA - STOP
ATA_RD AA2
UDMA - HOSTDMARDY/HSTROBE
UDMA - DEVICEDMARDY/DSTROBE ATA_CHRDY AA5
ATA_CS0 AA4
ATA_CS1 AB2
ATA_DMACK AC1
ATA_DMARQ AC2
ATA_INTRQ AA8

CLKENET_LINK_TX

38 13

ATA_A0 Y5
ATA_A1 AB1
ATA_A2 Y7

ADDR LSB INDICATES READ (1) OR WRITE (0) MODES

DESCRIPTION
JTAG MODE
NORMAL OPERATION
VIEW
VIEW
ATPG
ATPG
TEST

INT - ENET/FW/UATA
EIDE/I2C

PLLS (SOFTWARE)
PLLS (HARDWARE)
NORMAL
IDDQ
TRI-STATE

FUNCTIONAL
POSTSCALAR
FUNCTIONAL
POSTSCALAR

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

TEST WITHOUT
BYPASS
TEST WITH
BYPASS

SIZE

APPLE COMPUTER INC.

FUNCTIONAL TEST IDDQ

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

DRAWING NUMBER

D
SCALE

SHT

NONE

REV.

051-6694 B
13
45
OF

R244

20%

C200

2 6.3V
CERM
805

LT1962_INT_BYPR2771

+3V_MAIN

USB_PWREN_CD_L 14

10K

USB_OC_CD_L

RP29

5%
1/16W
MF
402

AUDIO_MCLK_SEL

10K

RP51
10K
3

MF
402

PMU_INT_L

R682

14

14 31

RP51
10K

RP29

5%
1/16W
SM1

14 17
37 14

PMU_INT_NMI

14 31

14

R220

5%
1/16W
SM1

10K

PMU_REQ_L

40 26 24 23 13
14 31

5%

R204

40 26 24 23 13

INT_REF_CLK_OUT
CG_FSEL
INT_I2C_CLK1
INT_I2C_DATA1

1/16W

MF
402

INT_MOD_DTO_UF

NO STUFF

5%
1/16W

MF

402

NO STUFF

CG_RESET_L
AUDIO_SPDIF_RESET_L

1/16W
MF
402 AUDIO_LI_SPDIF_PLUG_L

5%
1/16W
MF
402

R820
10K

NO STUFF

14

10K 2
1

AUDIO_SPDIF_GPO0

SSCG

14 26

R636
VCORE_VGATE 1

10K

INT_EXTINT10_PU

5%
1/16W
SM1

R819
1

10K 2

MMM_SIRQ_L

1/16W
MF
2 402

10K

MMM_FFIRQ_L

14 24

SYSTEM_CLK_EN 1

5%
1/16W
SM1

R111
1

14

40 13

JTAG_ASIC_TDO

100K 2

5%
1/16W
MF
402

INT_MOD_DTI_UF

INT_MOD_BITCLK_UF

10K

5%
1/16W
SM1

14

OMIT

CRITICAL

Y1

18.432M
1

31

INT_WATCHDOG_L

AT7 WATCHDOG

5%
1/16W
MF
402

R632

31

5%
1/16W
MF
2 402

37 14
37 14

INT_REF_CLK_OUT
INT_REF_CLK_IN

CLK18M_XTAL_IN
1

22PF

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

359S0074

359S0086

U42

ALT FOR NEW SCREEN

USB
INTERRUPTS

INT_MOD_SYNC_UF

14

R91

20%
2 6.3V
CERM
805

14

22

USB_DDP

22

USB_DDM

5%
1/16W
MF
402

USB_VD1_P G2
USB_VD1_N G1

USB_DBP
USB_DBM

J4
K4

USB_DCP
USB_DCM

USB_VD3_P M7
USB_VD3_N M8

USB_DDP
USB_DDM

J2
J1

USB_VD5_P P8
USB_VD5_N N8
USB_PRTPWR2
USB_PWRFLT2

AUDIO/I2S

CLOCKS

AUD_DTO
AUD_DTI
AUD_SYNC
AUD_BITCLK
AUD_CLKOUT

R4
R7
T5
P2
R5

MOD_DTO
MOD_DTI
MOD_SYNC
MOD_BITCLK
MOD_CLKOUT

R2
T4
R1
V8
P1

15K
MF

PORT E - BLUETOOTH

26 40

R67

26 40

31
14 31
31

22

USB_DEM

38 14

5%
1/16W
MF
402

R50

31

22

USB_DEP

38 14

BT_USB_DP

25 38 40

BT_USB_DM

25 38 40

5%

31

1/16W
MF

402

14 27
14 27

PORT F - TPAD R66


22

14
14

38 14

USB_DFP

14

USB_DFM

38 14

1/16W

R41
22

14

R89,R80 NEED PLACE NEAR TPAD CONNECTOR


USB_TPAD_P

MF
5%
402

14 27

15K 2
1

47

SND_TO_AUDIO

5%

14 38

14

INT_SND_TO_AUDIO
INT_AUDIO_TO_SND
INT_SND_SYNC
INT_SND_SCLK

47

47

5%
1/16W

SM1

SND_SCLK

26 37 40

47

SND_CLKOUT 26

R102

47

47

SM1

37 40

MOD_DTO

26 40

MOD_SYNC

26 40

HWPLL_
TESTMUXSEL

5
4
3
2
1
0

RP56
1

47

5%
1/16W
SM1

RP56
4

5%
1/16W
MF
1 402

26 40

RP8

5%
1/16W
SM1

RP56

40

+3V_SLEEP

1K

SND_SYNC

5%
RP56 1/16W

14

R29

INT_SND_CLKOUT
INT_MOD_DTO_UF
INT_MOD_DTI
26
14 INT_MOD_SYNC_UF
14 INT_MOD_BITCLK_UF
14 INT_MOD_CLKOUT_UF

1/16W

5%
1/16W
SM1

26 40

47

5%
SM1

RP8

14

26 40

RP8

1/16W
SM1

14 38

5%
1/16W
MF
402

RP8

14 38

15K

1
14

USB_PWREN_EF_L
USB_OC_EF_L

5%
1/16W
MF
402

R80

14

14 38

23

R89

14

USB_DEP
USB_DEM

23

USB_TPAD_N

5%
1/16W
MF
402

14 27

14

C140

5%
1/16W

2 402

26 40

USB_PWREN_CD_L
USB_OC_CD_L

IICCLK_2 AL4
IICDATA_2 AH8

26 38 40

26 40

USB_DFP
USB_DFM

M5
N7

MODEM_USB_DM

26 40

USB_PWREN_AB_L
USB_OC_AB_L

USB_VD2_P H2
USB_VD2_N H1

26 38 40

R115

15K

1/16W
MF
402

MODEM_USB_DP

R114

26 40

PMU_FROM_INT
PMU_REQ_L
PMU_TO_INT
PMU_ACK_L
PMU_CLK
USB_DAP
USB_DAM

USB_VD4_P K5
USB_VD4_N L5

VGATE/LOCK INTERRUPT
CBUS_IREQ_L
FAN PWM
BRIGHTNESS PWM
CONTRAST PWM

IIC

5%
2 50V
CERM
402

USB_D1M 27

PORT D - MODEM

C97

MOD_BITCLK 26

MOD_CLKOUT

40

26 40

5%
1/16W
SM1

SIGNAL NAME
MOD_BITCLK_B_H
MOD_CLKOUT_B_H
MOD_DTO_B_H
MOD_SYNC_B_H
MOD_DTI_B_H
JTG_TDO_H

INT - USB/GPIOS/I2S

1K

5%
1/16W
MF

1 402

NOTICE OF PROPRIETARY PROPERTY


INT_I2C_CLK2
INT_I2C_DATA2

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

26 40
26 40

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

TABLE_ALT_ITEM

5%
402
MF

10UF

20%
2 10V
CERM
402

USB_VD0_P L8
USB_VD0_N L7

USB_PRTPWR1
USB_PWRFLT1

POWERBOOK SPARE

37

22PF

5%
50V
CERM 2
402

PART NUMBER

10K

5%
1/16W
MF
402

10K
1/16W

1/16W
5%
402
MF

24

5%
1/16W
MF
402

U15 BUF_REF_CLK_OUT
K9 SS_REF_CLK_IN

TABLE_ALT_HEAD

14

STUFF

0.1UF

R701

14

USB_PRTPWR0
USB_PWRFLT0

8X4.5MM-SM

C15 1

U4 XTAL_IN
V15 XTAL_OUT
AN7 STOPXTAL

CRYSTAL LOAD CAPACITANCE IS 16PF

RP1NO
4

CG_SYSCLK_EN

10M

5%
1/16W
MF
2 402

EXTINT0
EXTINT1
EXTINT2
EXTINT3
EXTINT4
EXTINT5
EXTINT6
EXTINT7
EXTINT8
EXTINT9
EXTINT10
EXTINT11
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
CPU_INT

CLK18M_INT_XIN
CLK18M_INT_XOUT
14 SYSTEM_CLK_EN

37

R622

R28

C85

USB_D1P 27

MF
402

R90

MISO
SCCTXDB AR4
REQ*
SCCRTSB AL5
MOSI
SCCRXDB AG10
ACK* SCCGPIOB AP4
SCK
SCCTRXCB AM5

PMU_PME_L

37

51

VIA

GPIO0
GENERAL
SEL
GPIO1 VCORE_A/B PURPOSE
GPIO2
I/OS
GPIO3
GPIO4
GPIO5
GPIO6
GPIO9
GPIO11
GPIO12
GPIO15
GPIO16

AJ7 PCIPME
AT6 PROCSLEEPREQ
INT_PROC_SLEEP_REQ_L
AN8 PENDPROCINT
31 INT_PEND_PROC_INT

31 27

NO STUFF

5%
1/16W
MF
402

5%
1/16W
SM1

RP1
10K

5%
1/16W
MF
402R604

RP1

NO STUFF
2

SCCTXDA AF9 COMM_TXD_L


SCCRTSA AN3 COMM_RTS_L
SCCDTRA AF10 COMM_DTR_L
SCCRXDA AG11 COMM_RXD
SCCGPIOA AG9 COMM_GPIO_L
SCCTRXCA AT4 COMM_TRXC

(6 OF 9)

INT_GPIO0

INT_GPIO1_PU
26 COMM_SHUTDOWN
26 COMM_RESET_L

NO STUFF

F-ST-SM

R285

NO STUFF

10K

U.FL-R_SMT

5%

31

J1

NO STUFF
14 24

5%
1/16W
MF
402

CRITICAL
NO STUFF

FW_PHY_PD_INT

R897

CLK18M_INT_EXT

OMIT

BGA

35 14

14

31 14

5%
1/16W
MF
402

SM-1

R49

R720
10K

400-OHM-EMI

402

14

5%
1/16W
MF
402

5%
1/16W
MF
402

NO STUFF

R863

1
NO STUFF 5%

R864

CG_FSEL 1

L18

20%

1 R708

+3V_INTREPID_USB

C84

20%
2 16V
CERM
402

INTREPID-REV2.1

14

37

INT_GPIO9_PU

NO STUFF

5%
1/16W
MF
402

14

PLACE R68 CLOSE TO INTREPID SIDE


OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT

39

U45

SSCG

0.1UF

NEC_USB

NEC_USB

R609

CRITICAL

R634

RP24
10K

33

R656

5%
1/16W
MF
402

14

14

R281

CG_SYSCLK_EN
CG_LOCK

39 35 14

INT_EXTINT13_PU

5%
1/16W
MF
402

R895

5%
1/16W
MF
402 1

14

5%

R530
0

R825
100K2

CG_ADDRSEL

14

AUDIO_SPDIF_RESET_L

USB_DCM

39

R608

C691

U42

CBUS_INT_L

C686

5%

10K

5%
1/16W
MF
402 2

1/16W

5%
1/16W
SM1

10K

2 INT_MOD_CLKOUT_UF

10K

5%
1/16W
MF
402 2

14 26

R219

R698

VSSQ

5%
STUFF
1/16W
SM1

SSCG

R6311 R6251
0

26 31 40

27 14

1
+1_5V_INTREPID_PLL1

24

USB_DCP

0.01UF

G5
E1
1/16W
J7
MF
40
2
2 402
F2
40
39 +2_5V_CG_MAIN
0 2 14 FW_PHY_PD_INT J8
1
29 FW_PHY_PD
SSCG
H5
5%
26 SND_HP_MUTE_L
NO STUFF
SOUND_SPDIF_GPO0
1
1/16W
NO STUFF
L9
MF
26 SND_AMP_MUTE_L
0.1UF
402
0
1
H4
1
2
14 INT_GPIO9_PU
20%
10V
2 CERM
10K
J5
5%
40 26 14 SND_HW_RESET_L
5%
402
1/16W
R896
1/16W
K8
MF
14 AUDIO_SPDIF_RESET_L
0 2
MF
402
1
402
F1
2
26 14 AUDIO_MCLK_SEL
5%
CRITICAL
K7
INT_ENET_RST_L
28
1/16W
SSCG
MF
402
F33
40 31 26 14 COMM_RING_DET_L
CY28512-2
20 CLKIN TSSOP
E34
31 14 PMU_INT_L
2 INT_REF_CLK_IN 14
SSCG
CPU0 16 CG_CLKOUT1
37
C33
18 AGP_INT_L
3 FSEL OUTPUT IMPEDANCE ~18-20OHM
5%
1/16W
D34
INTERNAL 250K PULL-UP
26 14 AUDIO_LI_SPDIF_PLUG_L
MF
9 SCLK
402
B33
26 AUDIO_LI_DET_L
A33
ENET_ENERGY_DET
28
8 SDATA
E31
40 25 14 AIRPORT_PCI_INT_L
14 ADDRSEL INTERNAL 250K PULL-DOWN
G30
17 14 CBUS_INT_L
SSCG
D31
14 INT_EXTINT8_PU
17 RESET*
C32
31 14 PMU_INT_NMI
0
13 PD*
1
2
14 INT_EXTINT10_PU
B32
39 35 14 VCORE_VGATE
5%
E30
SSCG
24 14 MMM_FFIRQ_L
2 LOCK OPEN-DRAIN OUTPUT
1/16W
2
MF
J9
24 14 MMM_SIRQ_L
R100
402
4 ODSEL INTERNAL 250K PULL-UP
F4
75
14 INT_EXTINT13_PU
NO STUFF
5%
D1
26 14 AUDIO_LO_SPDIF_PLUG_L
1
1/16W
MF
E2
26 AUDIO_LO_DET_L
10K
1 402
H7
5%
14 AUDIO_SPDIF_GPO0
1/16W
MF
G4
27 14 USB2_PCI_INT_L
2 402
D30
5 MPIC_CPU_INT_L

VDDC 5

COMM_RING_DET_L 14

402

2 10V
CERM

603

VSSC

20%

2 10V
CERM

10K
5%

VDDA 12

NO STUFF

39

SSCG

1UF

R638

14 35

VSSA

10K

R780NO

INT_GPIO1_PU

11

RP51

10K

C692

MAIN_RESET_L

VDD0 1
VDD1 10

5%
1/16W
MF
402

SSCG

40 31 27 25 20 18 17

VSS0
VSS1

5%
1/16W
SM1

+3V_CG_PLL_MAIN

INT_EXTINT8_PU 14

L1

VDDQ 18

7
19

10K

SOT-363

+2_5V_MAIN

39

402

1/16W
MF

Q36

402

+1_5V_INTREPID_PLL2

2N7002DW

SM-1

10V
CERM 2

CERM

PORT C - LEFT USB

5%
INTREPID_USB
1/16W

FERR-EMI-100-OHM
SM

1%

L22
400-OHM-EMI

20%

14 26

SSCG

0.1UF

14 27

6.3V

NO STUFF
1
R914
AUDIO_SPDIF_RESET
10K

C698 1

USB2_PCI_INT_L

SSCG

R770

14

10K

1%

2N7002DW

20%

1/16W
MF
402

SOT-363

0.22UF

5%
1/16W
MF
2 402

R614

27 14

5%
1/16W
MF
402

+3V_SLEEP 1
C198

R913
100K

Q36

+3V_MAIN

14

5%
STUFF
1/16W
SM1 AUDIO_LO_SPDIF_PLUG_L

5%
1/16W
MF
402

USB_PWREN_AB_L

RP48
1

AUDIO_SPDIF_RESET_C

15

R554NO

26 14

402

4.7

10K

1/16W
5%
SM1

INTREPID_USB

R155
1

MF

5%
1/16W
SM1

5%
1/16W
SM1

USB POWER FAULT SIGNALS

20%
6.3V 2
CERM
402

+3V_SLEEP

1/16W

RP7
1

10K

14

+3V_MAIN

39

5%
1/16W
MF
402

C148 1

1%

USB_OC_AB_L

0.22UF

+1_5V_INTREPID_PLL3

R125
4.7

R707
10K

1/16W
MF
2 402

VDDU33_2 U8

10K

RP47

5%
1/16W
MF
402

14

R912
10K

5%
1/16W
SM1

5%
1/16W
SM1

USB_OC_EF_L

+3V_SLEEP

2 AUDIO_SPDIF_RESET_L

R8 VSSU_2

10K

14
26

AUDIO_SPDIF_RESET_C 1

RP47
8

RP47

14

4.7

1/16W
5%
SM1

10K
5%

RP48

RP7
10K

NEC_USBNEC_USB

R699

PCI_
VDD15A_1 AA16
(PLL1)

5%
1/16W
MF
402
6

USB_PWREN_EF_L

5%
1/16W
MF
402

R113
10K

USB_DAM

39

AA15 VSSA1

20%
6.3V 2
CERM
402

R916

+1_5V_INTREPID_PLL4

5%
1/16W
MF
402

C182 1

10K

27 14

R156
1

0.22UF

NO STUFF

R7

20%
6.3V 2
CERM
402

1/16W
MF
402 2

5%
1/16W
SM1

4.7

5%
1/16W
MF
402

0.22UF

68.1K
1%

USB_DBP
14 USB_DBM

10UF

LT1962_INT_ADJ

BYP 3
GND 4

SHDN

R168
1

VDDU33_1 T8

NC

C419

R9 VSSU_1

14 25 40

1UF
20%
10V
CERM 2
603

5%
1/16W
MF
603

ADJ 2

VDD15A_8 AG29
(PLL9)

AIRPORT_PCI_INT_L

NC 6

OUT 1

(PLL9)

NC

PORT B - UNUSE

USB_DAP

14

AH29 VSSA_8

10K

IN

27 14

PCI_
VDD15A_4 AJ18
(PLL7)

RP29
4

C433 1

NC 7

20%
6.3V
CERM 2
402

(PLL7)

LTC1962_INT_VIN

1%
1/16W
MF
402 2

39

PORT A - RIGHT USB 1

AK18 VSSA4

39

0.01UF
20%
16V
CERM 2
402

MSOP

0.22UF

15.8K

+1_5V_INTREPID_PLL8

PCI_
VDD15A_3 AJ17
(PLL3)

+1_8V_MAIN603
R264

+3V_SLEEP

R278

C424 1

(PLL3)

5%
MF

1/16W

C353 1

4.7

5%
1/16W
MF
402

AJ16 VSSA3

U7
LT1962-ADJ

(PLL2)

CRITICAL

8 12 39

R291

PCI_
VDD15A_2 AJ12
(PLL2)

+1_5V_INTREPID_PLL

NO STUFF

USB PORT ASSIGNMENTS

AJ13 VSSA2

+2_5V_MAIN

(PLL1)

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


TABLE_5_ITEM

197S0090
SND_HW_RESET_L

XTAL,CER,LOW PROF,18,432MHZ,8X4.5MM,SMD

Y1

RP29

14 26 40
TABLE_5_HEAD

PART#

QTY

DESCRIPTION

RES,METAL FILM,10 K OHM,5,1/16W,0402,SM

REFERENCE DESIGNATOR(S)

NC

BOM OPTION

R100

10K

5%
1/16W
SM1

TABLE_5_ITEM

116S1104

NO_SSCG

NC NC

10K

SIZE

RP48

RP7
3

5%
1/16W
SM1

NC NC

10K

NC

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

5%
1/16W
SM1

SHT

NONE

REV.

051-6694 B
14
45
1
OF

+2_5V_MAIN
+2_5V_SLEEP
NO STUFF

R2871
0

5%
1/10W
FF
805 2

R399
0

5%
1/10W
FF
2 805

39 21 19 18 16 12

+1_5V_AGP

+3V_MAIN

+1_5V_MAIN

MAXBUS_SLEEP
39 16 10 9

+2_5V_INTREPID

AD20
AE20
AE23
AF22
AH19
AH22
AH28
AJ21
AJ23
AL19
AL22
AL28
AL30
AN32
AP19
AP22
AP25
AP28
AP31
AR33
AR34

D
AA25
C12
AA29
C15
AB25
OMIT
CRITICAL
C18
AB27
C21
AB31
INTREPID-REV2.1
C24
AB34
BGA
(8 OF 9)
AC25
C27
C30
AC27
AC28
C9
AE31
F12
F15
AE34
F18
AF28
F21
AH30
F24
AH34
F27 VDD1.8/CPUVIO
AK34
M15
AP35
M16
C35
M19
G31
M22
G34
M23
K31
N18
K34
N21
VDD2.5 N28
N23
N31
P16
N34
P19
N36
P25
P28
POWER/GROUND
R25
R27
T25
T28
T29
T31
T34
U25
U28
L24
V25
M14
V29
M17
W25
M18
W31
M20
W34
M21
Y27
M24
Y29
M28
E33
M3
M31
AN33
M32
AN4
M34
AP1
M6
AP12
M9
AP15
N15
AP18
N25
AP21
P12
AP24
P17
AP27
P22
AP3
P29
AP30
P4
AP33
R14 VSS
AP34
R16
AP36
R18
AP6
R19
VSS AP9
R21
AR2
R23
AR35
R24
AT3
R26
AT34
R29
B2
R3
B35
R31
C1
R34
C10
R6
C13
T11
C16
T14
C19
T23
C22
C25
T24
T27
C28
U10
C3
U16
C31
C34

AGP_IO_VDD

VDD3.3

U45

INTREPID-REV2.1
BGA
(9 OF 9)

POWER

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

TABLE_5_ITEM

343S0305

IC,ASIC,INTREPID,REV2.1,974BGA,FAST

U45

AD28
AD3
AD31
AD34

AD6
AE14
AE16
AE18
AE19
AE21
AE22
AE28
AG21
AG23
AG24
AG3
AG30
AG34 VSS
AG6
AH20
AH21
AH23
AH27

GROUND

VSS

AK3
AK7
AL12
AL15
AL18
AL21
AL27
AL31
AL34
AL6
AL9

U19
U22
U27
U29
V10
V12
V17
V18
V21
V24
V3
V31
V34
V6
W11
W14
W23
W26
Y11
Y12
Y14
Y16
Y19
Y23
Y24
Y25

Intrepid Power

NOTICE OF PROPRIETARY PROPERTY

AGP_IO_VSS

J6
J34
J31
J3
G7
F6
F34
F31
F3
F28
F25
F22
F19
F16
F13
F10
D4
D33
C7
C36

U45

AL13
AL16
AL3
AL7
AM4
AN5
AP10
AP13
AP16
K3
K6
N24
N3
N6
P13
P14
R22
T12
T18
T3
VDD3.3 T6
U12
W12
W13
W3
W6
AP2
AP7
AR3
B3
C2
C6
D32
D5
B34
E4

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

A3
A34
AA20
AA27
AA3
AA31
AA34
AA6
AB11
AB12
AB14
AB16
AB18
AB24
AB28
AB29
AC11
AC15
AC16
AC18
AC20
AC22
AC26
AD12
AD23
AD25

OMIT
CRITICAL

AA21
AA24
AB13
AB15
AB17
AB19
AC17
AC19
AC23
AD13
AD15
AD22
P15
P18
P20
P21 VDD1.5
R17
R20
T13
U17
U18
U24
V16
V19
V20
V22
W16
W24
Y13
Y18

AA11
AA12
AB3
AB6
AC12
AC13
F30
F7
F9
G3
G6
AC14
AD21
AE15
AE17
AE3
AE6
AF25
AH3
AH6
AK6
AL10

39 35 16 8 7 6 5

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

051-6694

D
SCALE

SHT
NONE

15

OF

REV.

45

C204 1

C348 1

20%
6.3V 2
CERM
805

20%
6.3V 2
CERM
805

10uF

C236 1

C196 1

20%
6.3V 2
CERM
805

20%
6.3V 2
CERM
805

10uF

C239

0.22uF

20%
2 6.3V
CERM
402

10uF

C174

0.22uF

20%
2 6.3V
CERM
402

C173

20%
402

C205

0.22uF

20%
2 6.3V
CERM
402

C240

0.22uF

20%
2 6.3V
CERM
402

C206

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

39 21 19 18 15 12

C171

0.22uF

20%
2 6.3V
CERM
402

20%
402

C259

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C350

C175

0.22uF

20%
2 6.3V
CERM
402

20%
402

C237

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C312

C226

20%
402

0.22uF

20%
2 6.3V
CERM
402

C238

0.22uF

C95

0.22uF

20%
2 6.3V
CERM
402

C288

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C176

20%
2 6.3V
CERM
402

C172

0.22uF

C207
20%

2 6.3V
CERM

402

402

C231 1

20%
6.3V 2
CERM
805

20%
6.3V 2
CERM
805

10uF

C281 1

C394 1

20%
6.3V 2
CERM
805

20%
6.3V 2
CERM
805

10uF

10uF

C356

0.22uF

20%
2 6.3V
CERM
402

10uF

C228

0.22uF

20%
2 6.3V
CERM
402

C251
20%
402

0.22uF

20%
2 6.3V
CERM
402

C117

0.22uF

20%
2 6.3V
CERM
402

C118

0.22uF

20%
2 6.3V
CERM
402

20%
402

C241

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C94

C287

0.22uF

20%
2 6.3V
CERM
402

20%
402

C260

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C286

C119

0.22uF

20%
2 6.3V
CERM
402

20%
402

C314

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C158

C128 1
10uF

C101 1

20%
6.3V 2
CERM
805

10uF
20%
6.3V 2
CERM
805

C157 1

C315 1

20%
6.3V 2
CERM
805

20%
6.3V 2
CERM
805

10uF

10uF

C349

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

20%

2 6.3V
CERM

402

402

10uF

20%
6.3V 2
CERM
805

C418 1
10uF

20%
6.3V 2
CERM
805

C417 1

C423
10uF

C407

0.22uF

10uF
20%
6.3V 2
CERM
805

20%
2 6.3V
CERM
402

C367

0.22uF

20%
6.3V 2
CERM
805

20%
2 6.3V
CERM
402

C321

0.22uF

20%
6.3V
2 CERM
402

C404

0.22uF

20%
2 6.3V
CERM
402

C337

0.22uF

20%
2 6.3V
CERM
402

C243

0.22uF

20%
2 6.3V
CERM
402

C212

0.22uF

20%
2 6.3V
CERM
402

C246

0.22uF

20%
2 6.3V
CERM
402

20%

C178

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C262

C211
20%
402

C242

0.22uF

20%
2 6.3V
CERM
402

C179

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

402

C263

20%
402

0.22uF

20%
2 6.3V
CERM
402

C177

20%
2 6.3V
CERM
402

C180

C297

0.22uF

20%
6.3V
2 CERM
402

C230

0.22uF

20%
2 6.3V
CERM
402

C266
20%
402

C391

0.22uF

20%
2 6.3V
CERM
402

C292

0.22uF

20%
2 6.3V
CERM
402

C318

0.22uF

20%
2 6.3V
CERM
402

C400

0.22uF

20%
2 6.3V
CERM
402

C290

0.22uF

20%
2 6.3V
CERM
402

C159

20%
2 6.3V
CERM
402

C213
20%
402

C142

0.22uF

20%
2 6.3V
CERM
402

C161

20%

2 6.3V
CERM

402

C197

20%
2 6.3V
CERM
402

20%

2 6.3V
CERM

402

402

C278

0.22uF

C208

20%

2 6.3V
CERM

402

20%
402

C279

C214

0.22uF
20%

2 6.3V
CERM

402

57 Balls
4 X 10UF (0805)
72 X 0.22UF (0402)

21 Balls
4 X 10UF (0805)
24 X 0.22UF (0402)

C268

0.22uF

20%
2 6.3V
CERM
402

C265

0.22uF

20%
2 6.3V
CERM
402

C217

0.22uF

20%
6.3V
2 CERM
402

C378

0.22uF

20%
2 6.3V
CERM
402

C355

0.22uF

C267

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C357

0.22uF

C229

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C250

0.22uF

20%
2 6.3V
CERM
402

C325

0.22uF

20%
2 6.3V
CERM
402

C298

0.22uF

20%
2 6.3V
CERM
402

C393

0.22uF

20%
2 6.3V
CERM
402

C377

C324

C216

0.22uF
20%

2 6.3V
CERM

402

0.22uF

20%
2 6.3V
CERM
402

C395 1

20%
6.3V 2
CERM
805

6.3V
CERM 2

10uF

0.22uF

20%
2 6.3V
CERM
402

C164 1

10uF
20%
805

C10 1

C9 1

10uF

10uF

20%
6.3V
CERM 2
805

20%
6.3V
CERM 2
805

C323

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

2 CERM

402

C249

0.22uF

20%

2 6.3V
CERM

402

0.22uF

402

C317

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C399

0.22uF

20%
2 6.3V
CERM
402

C386

0.22uF

20%
2 6.3V
CERM
402

C402

0.22uF

20%
2 6.3V
CERM
402

C403

0.22uF
20%

2 6.3V
CERM

402

C410

0.22uF

20%
6.3V
2 CERM
402

C289

0.22uF

20%
2 6.3V
CERM
402

C397

0.22uF

20%
2 6.3V
CERM
402

C480

0.22uF

20%
2 6.3V
CERM
402

C291

20%
2 6.3V
CERM
402

C335

0.22uF

C369

0.22uF
20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

1 C387
0.22uF

C401

0.22uF

20%
2 6.3V
CERM
402

C352

0.22uF

0.22uF
20%
2 6.3V
CERM
402

C390

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C368

0.22uF

C334

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C370

0.22uF

20%
2 6.3V
CERM
402

C322

0.22uF

20%
2 6.3V
CERM
402

C384

0.22uF

20%
2 6.3V
CERM
402

C354

0.22uF

20%
2 6.3V
CERM
402

C388

0.22uF

20%
2 6.3V
CERM
402

C75

0.22uF

20%
2 6.3V
CERM
402

44 Balls
4 X 10UF (0805)
51 X 0.22UF (0402)

20%
2 6.3V
CERM
402

C295
0.22uF

C34

C320
0.22uF

20%
2 6.3V
CERM
402

C392

0.22uF

20%
2 6.3V
CERM
402

C294

0.22uF

1 C365

0.22uF
20%
2 6.3V
CERM
402

C385

0.22uF

20%
2 6.3V
CERM
402

C406

20%
6.3V
2 CERM
402

20%
2 6.3V
CERM
402

C293

0.22uF
20%
2 6.3V
CERM
402

C309

C319

0.22uF
20%
6.3V

2 CERM

402

20%

2 6.3V
CERM
402

C376

0.22uF

C183

0.22uF

20%
2 6.3V
CERM
402

C296

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C184

0.22uF

20%
2 6.3V
CERM
402

C108

0.22uF

20%
2 6.3V
CERM
402

C23

20%
2 6.3V
CERM
402

C43

0.22uF

20%
2 6.3V
CERM
402

C55

0.22uF

20%
2 6.3V
CERM
402

C120
20%

2 6.3V
CERM

402

C122

C51

0.22uF

0.22uF
20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C248

0.22uF
20%
2 6.3V
CERM
402

C18

0.22uF

20%
2 6.3V
CERM
402

0.22uF
20%
2 6.3V
CERM
402

C210

C49

0.22uF
20%
6.3V

2 CERM

402

C42

0.22uF
20%

2 6.3V
CERM

402

C35

1 C21
0.22uF
20%
2 6.3V
CERM
402

0.22uF

20%
2 6.3V
CERM
402

C32

0.22uF

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

402

0.22uF

0.22uF
20%

C53

C146
20%

402

C59

0.22uF

20%
2 6.3V
CERM
402

C58

0.22uF

C125

C141

20%
2 6.3V
CERM
402

20%

402

C163

0.22uF

20%
2 6.3V
CERM
402

C31

0.22uF

20%
2 6.3V
CERM
402

C22

C17

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

402

C76

0.22uF
20%
2 6.3V
CERM
402

2 6.3V
CERM

402

C98

0.22uF

20%
2 6.3V
CERM
402

C20
0.22uFC61
0.22uF
1

20%
2 6.3V
CERM
402

0.22uF

C126

0.22uF

0.22uF

6.3V
2 CERM

1 C145
C30
0.22uF
0.22uF
20%
20%

2 6.3V
CERM

402

C45

0.22uF

0.22uF

2 6.3V
CERM

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C36
0.22uF

20%
2 6.3V
CERM
402

402

0.22uF

0.22uF

6.3V
2 CERM

402

0.22uF

2 6.3V
CERM

C185

1 C60
1 C52
C261
0.22uF
0.22uF
0.22uF
20%
20%
20%

6.3V
2 CERM

C99

0.22uF

20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

C396

0.22uF

20%
2 6.3V
CERM
402

C143

C123

0.22uF

C121

0.22uF
20%

0.22uF
20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

2 6.3V
CERM

C199
0.22uF
20%

6.3V
2 CERM
402

C277

0.22uF
20%
2 6.3V
CERM
402

C96
20%
402

C109

0.22uF

20%
2 6.3V
CERM
402

C44

0.22uF

20%
2 6.3V
CERM
402

C124

0.22uF

20%
2 6.3V
CERM
402

C57
0.22uF

402

C28

0.22uF

20%
2 6.3V
CERM
402

402

C54

0.22uF

20%

2 6.3V
CERM

402

402

C56

0.22uF

20%
2 6.3V
CERM
402

C27
0.22uF
20%

2 6.3V
CERM

402

C29

C24

0.22uF

0.22uF
20%
2 6.3V
CERM
402

C50

0.22uF

20%

C26
0.22uF
20%

2 6.3V
CERM

2 6.3V
CERM

20%

2 6.3V
CERM

C127

0.22uF

C100

0.22uF

20%
2 6.3V
CERM
402

20%

2 6.3V
CERM

402

0.22uF
20%
402

C398
0.22uF
20%

2 6.3V
CERM

402

Intrepid Decoupling

C336

0.22uF

20%
2 6.3V
CERM
402

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

20%
6.3V
CERM 2
402

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-6694 B

D
SCALE

402

C405

C3161

2 6.3V
CERM

402

C19

0.22uF
20%

20%
6.3V
2 CERM

0.22uF

2 6.3V
CERM

402

2 6.3V
CERM

0.22uF

20%
2 6.3V
CERM
402

C366

0.22uF

0.22uF

20%
6.3V
2 CERM
402

C389
0.22uF

C351

0.22uF

0.22uF

20%

C310

C16

0.22uF

2 6.3V
CERM

C33

0.22uF

0.22uF
20%
6.3V

C375

0.22uF

0.22uF
20%
2 6.3V
CERM
402

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C264

0.22uF

20%
2 6.3V
CERM
402

1 C280
C162
0.22uF 0.22uF
20%

0.22uF

2 6.3V
CERM

C215

0.22uF

0.22uF

0.22uF

2 6.3V
CERM

402

0.22uF

20%

INTREPID 3.3V DECOUPLING

0.22uF

2 6.3V
CERM

20%
2 6.3V
CERM
402

0.22uF

2 6.3V
CERM

C181

0.22uF

0.22uF

0.22uF

2 6.3V
CERM

C227

+3V_MAIN

+2_5V_INTREPID

C422 1

C144

0.22uF

0.22uF
20%

2 6.3V
CERM

20%
2 6.3V
CERM
402

INTREPID DDR DECOUPLING

C244

0.22uF

1
39 15 10 9

C147

0.22uF

0.22uF

2 6.3V
CERM

C313

30 Balls
4 X 10UF (0805)
29 X 0.22UF (0402)

INTREPID CORE DECOUPLING

C209

+1_5V_AGP

C371 1

0.22uF

20%

2 6.3V
CERM

INTREPID AGP I/O DECOUPLING

+1_5V_MAIN

4 X 10UF (0805)
32 X 0.22UF (0402)

INTREPID MAXBUS DECOUPLING

24 Balls

MAXBUS_SLEEP

35 15 8 7 6 5
39

10uF

16

OF

45

7
+3V_MAIN

PCI1510 PULL-UPS

40 31 27 25 20 18 17 14

MAIN_RESET_L

5%
1/16W
MF
402

5%
1/16W
MF
402

R756
10K

10K

10UF

10K

CBUS_PCI_SERR_L

+5V_MAIN

5%
1/16W
MF

2 402

C797

20%
2 6.3V
CERM
402

R3731

C791
20%

2 6.3V
CERM

402

5%
1/16W
MF
402 2

TPS2211_SHDN_L_PU

20%

NC H10

402

PCI1510_VR_EN_L D4

L8

PCI_AD<0>

PCI_AD<1>
PCI_AD<2>
40 38 27 25 12 9 PCI_AD<3>
40 38 27 25 12 9 PCI_AD<4>
40 38 27 25 12 9 PCI_AD<5>
40 38 27 25 12 9 PCI_AD<6>
40 38 27 25 12 9 PCI_AD<7>
40 38 27 25 12 9 PCI_AD<8>
40 38 27 25 12 9 PCI_AD<9>
40 38 27 25 12 9 PCI_AD<10>
40 38 27 25 12 9 PCI_AD<11>
40 38 27 25 12 9 PCI_AD<12>
40 38 27 25 12 9 PCI_AD<13>
40 38 27 25 12 9 PCI_AD<14>
40 38 27 25 12 9 PCI_AD<15>
40 38 27 25 12 9 PCI_AD<16>
40 38 27 25 12 9 PCI_AD<17>
40 38 27 25 12 9 PCI_AD<18>
PCI_AD<19>
40 38 27 25 12 9 PCI_AD<20>
40 38 27 25 12 PCI_AD<21>
40 38 27 25 12 PCI_AD<22>
40 38 27 25 12 PCI_AD<23>
40 38 27 25 12 9 PCI_AD<24>
40 38 27 25 12 9 PCI_AD<25>
40 38 27 25 12 9 PCI_AD<26>
40 38 27 25 12 9 PCI_AD<27>
40 38 27 25 12 9 PCI_AD<28>
40 38 27 25 12 9 PCI_AD<29>
40 38 27 25 12 9 PCI_AD<30>
40 38 27 25 12 9 PCI_AD<31>
40 38 27 25 12 9
40 38 27 25 12 9

R7671
22

5%
1/16W
MF
402 2

PCI_CBE<0>
12 PCI_CBE<1>
12 PCI_CBE<2>
12 PCI_CBE<3>

40 38 27 25 12
40 38 27 25
40 38 27 25
40 38 27 25

N8
M7
L7
N6
K4
M6
L6
N5
N4
M2
M5
L4
N3
K5
L5
M4
J4
H1
H3
H2
G2
G4
F1
C3
F3
E2
F4
B1
D2
E4
D3
E3
K6
M3
J2
A1

N1
PCI_PAR
K1
12 PCI_IRDY_L
L2
CBUS_PCI_SERR_L
17
CBUS_PCI_IDSEL F2
17 CBUS_PCI_PERR_L K3
J1
12 PCI_FRAME_L
L1
12 PCI_STOP_L
J3
12 PCI_TRDY_L
K2
12 PCI_DEVSEL_L
CBUS_PCI_RESET_LG3
12 CBUS_PCI_REQ_L C2
12 CBUS_PCI_GNT_L C1
G1
12 CLK33M_CBUS

40 38 27 25 12
40 38 27 25

40 38 27 25
40 38 27 25

31 28 27 24 23

NO STUFF
R764
47 2
IO_RESET_L1

40 38 27 25
40 38 27 25

5%
1/16W
MF
402
37

R766
40 31 27 25 20 18 17 14

MAIN_RESET_L 1

47

5%
1/16W
MF
402
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD
CBUS_MFUNC3_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD

2
17

17

17

17

17
17
17
17

NC
NC

NC M9
NC M8
CBUS_SUSPEND_PU N10

CBUS_INT_L
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD
17 CBUS_MFUNC3_PD
17 CBUS_MFUNC4_PD
17 CBUS_MFUNC5_PD
17 CBUS_MFUNC6_PD
14

17

K7
N9
L9
K10
M10
N12
L10
L11

SM

D5

E1

M1

N7

N11

VCC

C789

40 38 27 25 12 9

C13

1
2
15
14
16

10K

CRITICAL CLAMP FOR PC-CARDVCCCB


CLAMP FOR PCI
VCCP

CLK_48_RSVD/NC
VR_EN*
VR_PORT
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

U26

PCI1510GGU

VPPD0 K9
VPPD1 M11

INTEGRATED

CD1*/CCD1*
CD2*/CCD2*
IORD*/CAD13
IOWR*/CAD15
OE*/CAD11
CE1*/CC/BE0*
VS1*/CVS1
VS2*/CVS2
WE*/CGNT*
RDY/IREQ*/CINT*
RESET/CRST*
REG*/CC/BE3*
BVD1/CSTSCHG/STSCHG*/RI*
BVD2/SPKR*/CAUDIO
PULL-UP WP/IOIS16*/CCLKRUN*
CE2/CAD10*
INPACK/CREQ*
WAIT/CSERR*

L13
B5
F12
C11
G10
H13
B2
A9
D13
A6
D8
A8
C6
D6
A5
G13
B8
B6

A0/CAD26 C7
A1/CAD25 D7
A2/CAD24 B7
A3/CAD23 D10
A4/CAD22 B12
A5/CAD21 C8
A6/CAD20 C9
A7/CAD18 A12
A8/CC/BE1* E11
A9/CAD14 F11
A10/CAD9 G11
A11/CAD12 G12
A12/CC/BE2* D9
A13/CPAR E12
A14/CPERR* D12
A15/CIRDY* C10
A16/CCLK B13
A17/CAD16 F10
A18/RSVD E13
A19/CBLOCK* A13
A20/CSTOP* E10
A21/CDEVSEL* D11
A22/CTRDY* C12
A23/CFRAME* A10
A24/CAD17 B10
A25/CAD19 B9

C/BE0*
C/BE1*
C/BE2*
C/BE3*
PAR
IRDY
SERR
IDSEL
PERR
FRAME
STOP
TRDY
DEVSEL
PRST
REQ
GNT
PCLK

D0/CAD27
D1/CAD29
D2/RSVD
D3/CAD0
D4/CAD1
D5/CAD3
D6/CAD5
D7/CAD7
D8/CAD28
D9/CAD30
D10/CAD31
D11/CAD2
D12/CAD4
D13/CAD6
D14/RSVD
D15/CAD8

SPKROUT
RI_OUT/PME
SUSPEND
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
GRST
GND
A2

A11

D1

F13

TPS2211
V_12SSOIAVPP
V_5_1
V_5_2 AVCC0
V_3_1 AVCC1
V_3_2 AVCC2

10

+VPP_CBUS_SW

17 39

11
12
13

+VCC_CBUS_SW

17 39

C773 1

VCCD0
VCCD1 CRITICAL
VPPD0
VPPD1
SHTDWN
GND

OC

0.1UF

20%
10V
CERM 2
402

A4
C4
A3
K11
K12
J13
J10
H12
C5
B4
B3
M12
J11
K13
J12
H11

C467
0.1UF
20%

2 10V
CERM

402

0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV

CBUS_VCCD0_L
CBUS_VCCD1_L

PC CARD/CARDBUS CONNECTOR

CBUS_VPPD0
CBUS_VPPD1

CRITICAL

CBUS_DET_1_L 17 40
CBUS_DET_2_L 17 40
CBUS_IORD_L 17
CBUS_IOWR_L 17
CBUS_OE_L
17
CBUS_CE1_L
17
CBUS_VS1
17
CBUS_VS2
17
CBUS_WE_L
17
CBUS_READY
17
CBUS_RESET_L 17
CBUS_REG_L
17
CBUS_BVD1_L 17
CBUS_BVD2_L 17
CBUS_WP_L
17
CBUS_CE2_L
17
CBUS_INPACK_L 17
CBUS_WAIT_L 17
CBUS_ADDR<0> 17
CBUS_ADDR<1> 17
CBUS_ADDR<2> 17
CBUS_ADDR<3> 17
CBUS_ADDR<4> 17
CBUS_ADDR<5> 17
CBUS_ADDR<6> 17
CBUS_ADDR<7> 17
CBUS_ADDR<8> 17
CBUS_ADDR<9> 17
CBUS_ADDR<10> 17
CBUS_ADDR<11> 17
CBUS_ADDR<12> 17
CBUS_ADDR<13> 17
CBUS_ADDR<14> 17
CBUS_ADDR<15> 17
CBUS_ADDR_16_UF
CBUS_ADDR<17> 17
CBUS_ADDR<18> 17
CBUS_ADDR<19> 17
CBUS_ADDR<20> 17
CBUS_ADDR<21> 17
CBUS_ADDR<22> 17
CBUS_ADDR<23> 17
CBUS_ADDR<24> 17
CBUS_ADDR<25> 17

J9

QT500806-L111
M-ST-SM1

CBUS_DET_1_L
CBUS_DATA<11>
CBUS_DATA<12>
17 CBUS_DATA<13>

40 17
17
17

CBUS_DATA<14>
CBUS_DATA<15>
17 CBUS_CE2_L
17 CBUS_VS1
17
17

CBUS_IORD_L
17 CBUS_IOWR_L
17 CBUS_ADDR<17>
17 CBUS_ADDR<18>
17

CBUS_ADDR<19>
CBUS_ADDR<20>
CBUS_ADDR<21>
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
39 17 +VCC_CBUS_SW
17

17

C783

2.2UF
10V

CERM
805

+VPP_CBUS_SW
17 CBUS_ADDR<22>
17 CBUS_ADDR<23>
17 CBUS_ADDR<24>

39 17

2.2UF

20%

C776

20%
10V
CERM
805

CBUS_ADDR<25>
17 CBUS_VS2
17 CBUS_RESET_L
17 CBUS_WAIT_L
17

R750
1

47

CBUS_ADDR<16>

17

5%
1/16W
MF
402

CBUS_INPACK_L
CBUS_REG_L
17 CBUS_BVD2_L
17 CBUS_BVD1_L
17

17

CBUS_DATA<8>
17 CBUS_DATA<9>
17 CBUS_DATA<10>
17 CBUS_DET_2_L
17

40

CBUS_DATA<0> 17
CBUS_DATA<1> 17
CBUS_DATA<2> 17
CBUS_DATA<3> 17
CBUS_DATA<4> 17
CBUS_DATA<5> 17
CBUS_DATA<6> 17
CBUS_DATA<7> 17
CBUS_DATA<8> 17
CBUS_DATA<9> 17
CBUS_DATA<10> 17
CBUS_DATA<11> 17
CBUS_DATA<12> 17
CBUS_DATA<13> 17
CBUS_DATA<14> 17
CBUS_DATA<15> 17

84

81

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79

83

82

C
CBUS_DATA<3>
CBUS_DATA<4>
CBUS_DATA<5>
CBUS_DATA<6>

17
17
17
17

CBUS_DATA<7> 17
CBUS_CE1_L
17
CBUS_ADDR<10> 17
CBUS_OE_L
17
CBUS_ADDR<11> 17
CBUS_ADDR<9> 17
CBUS_ADDR<8> 17
CBUS_ADDR<13> 17
CBUS_ADDR<14> 17
CBUS_WE_L
17
CBUS_READY
17
+VCC_CBUS_SW 17 39
+VPP_CBUS_SW 17 39
CBUS_ADDR<16> 17
CBUS_ADDR<15> 17
CBUS_ADDR<12> 17
CBUS_ADDR<7>
CBUS_ADDR<6>
CBUS_ADDR<5>
CBUS_ADDR<4>
CBUS_ADDR<3>
CBUS_ADDR<2>
CBUS_ADDR<1>
CBUS_ADDR<0>
CBUS_DATA<0>
CBUS_DATA<1>
CBUS_DATA<2>
CBUS_WP_L

17
17
17
17

17
17
17
17

17
17
17
17

CARDBUS
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

H4

K8

M13

N2

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

REV.

051-6694 B
17
45
1
SHT

NONE

NC

B11
L3

VCCD0* N13
VCCD1* L12

BGA

MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES


TO MINIMIZE INDUCTANCE!

U19

9
5
6
3
4

NC

10K

5%
1/16W
MF
402

0.22UF

R7621

0.22UF

47

20%
402

0.22UF

20%
2 6.3V
CERM
402

17

2 6.3V
CERM

6
4
7
3
9
8
2
1

0.22UF

CBUS_SUSPEND_PU

5
10

R348

2 6.3V
CERM

402

C796

A7

10K

0.22UF

17

+2_5V_MAIN

5%
1/32W
25V

20%

+3V_MAIN

C790

NO STUFF

5%
1/16W
MF
402

RP39

2 6.3V
CERM

402

R753
1

C798

0.22UF

2 6.3V
CERM

805

17

20%

2 6.3V
CERM
CBUS_PCI_PERR_L

C795

0.22UF

20%

R757
1

C813

THIS PROPERLY SHUTS DOWN


CARDBUS POWER FOR PSUEDO-D3COLD

+3V_MAIN
1

OF

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

M11_CSP128

27M OSC

TABLE_5_ITEM

338S0214

IC,ATI,M11-CSP128,GRPHCTLR,667BGA,HYNIX GC
U44

39 21 19 18 12 +3V_GPU

U44

+3V_SLEEP

RAGE_MOBILITY
39 21 19 18 16 15 12

R119
47

U44

5%
1/16W
MF
402 2

RAGE_MOBILITY
M11-CSP64

12 38

38 12

12 38

38 12
38 12
38 12
38 12
38 12
38 12
38 12
38 12

R127
10K

5%
1/16W
MF
2 402

64MB
AB30 AD31
BGA AD_STB0 N29 AGP_AD_STB<0>
1
R159
AB27 AD30 (1 OF 6) AD_STB1 W29 AGP_AD_STB<1>
AGP_AD<30>
20K
AA29
M28
5%
AGP_AD<29>
AGP_AD_STB_L<0>
AD29
AD_STBB0
1/16W
MF
AB28 AD28
AGP_AD<28>
AD_STBB1 Y29 AGP_AD_STB_L<1>
402
2
AA30 AD27
AGP_AD<27>
AGP_BUSYB AG28AGP_BUSY_L
K30
AA27
AGP_AD<26>
INT_AGP_VREF
AD26
AGPREF
Y30 AD25
AGP_AD<25>
AGPTEST K29 GPU_AGP_TEST
AA28 AD24
AGP_AD<24>
AGP8X_DETB U25 AGP8X_DET_PU
W30 AD23
AGP_AD<23>
1 C62
1 C63
W27 AD22
AGP_AD<22>
SUS_STAT AJ28AGP_SUS_STAT_L_PU
0.1uF
0.01uF
20%
V30 AD21
20%
AGP_AD<21>
10V
2 CERM
ST0 AF30 AGP_ST<0>
2 16V
CERM
V28 AD20
AGP_AD<20>
402
402
AF28
AGP_ST<1>
ST1
V29 AD19
AGP_AD<19>
AE29
AGP_ST<2>
ST2
V27 AD18
(PLACE C1002 CLOSE
AGP_AD<18>
U30 AD17
AGP_AD<17>
SBA7 AC28 AGP_SBA<7>
U28 AD16
AGP_AD<16>
SBA6 AB29 AGP_SBA<6>
+3V_GPU
R27 AD15
AGP_AD<15>
SBA5 AC27 AGP_SBA<5>
OMIT
R29
AGP_AD<14>
AD14
SBA4 AC30 AGP_SBA<4>
P28 AD13
AGP_AD<13>
SBA3 AD27 AGP_SBA<3>
1
R172
P30 AD12
AGP_AD<12>
SBA2 AD30 AGP_SBA<2>
20K
P27
AGP_AD<11>
AD11
SBA1 AE28 AGP_SBA<1>
5%
1/16W
P29 AD10
AGP_AD<10>
SBA0 AD29 AGP_SBA<0>
MF
2 402
N28 AD9
AGP_AD<9>
RBFB AE30AGP_RBF_L
N30
AGP_AD<8>
AD8
STP_AGPB AG29AGP_STP_L
M30 AD7
AGP_AD<7>
SB_STB AC29 AGP_SB_STB
M27 AD6
AGP_AD<6>
R158
SB_STBS AD28 AGP_SB_STB_L
M29 AD5
AGP_AD<5>
0 2
1
RSTB_MSK AD24 ATI_RSTB_MSK
L28 AD4
AGP_AD<4>
5%
L30 AD3
AGP_AD<3>
1/16W
MF
DBI_LO Y25 ATI_DBI_LO_PU
L27 AD2
AGP_AD<2>
402
DBI_HI Y27 ATI_DBI_HI_PU
L29 AD1
AGP_AD<1>
+1_5V_AGP
K28 AD0
AGP_AD<0>
W28 CBEB3
RAGE_MOBILITY
AGP_CBE<3>
M11-CSP64
U29 CBEB2
AGP_CBE<2>
64MB
R30 CBEB1
AGP_CBE<1>
BGA
(6 OF 6)
R1261 1R138
N27 CBEB0
AGP_CBE<0>
47K
47K
5%
5%
CLK66M_GPU_AGPAG30 PCICLK
1/16W
1/16W
MF
MF
U27 FRAMEB
AGP_FRAME_L
402 2
OMIT
2 402
T30 IRDYB
AGP_IRDY_L
T28 TRDYB
AGP_TRDY_L
T27 STOPB
AGP_STOP_L
T29 DEVSELB
AGP_DEVSEL_L
R28 PAR
AGP_PAR
AF29
AGP_REQ_L
REQB
AF27 GNTB
AGP_GNT_L
AH29 INTAB
AGP_INT_L

38 12 AGP_AD<31>

38 12

M11-CSP64
64MB
BGA

+1_5V_AGP

12 38
12 38

12

12 39

12

38 12

12

38 12

12

38 12
38 12
38 12
38 12
38 12
38 12
38 12
38 12
38 12

38 12
38 12
38 12

TO AGPREF PIN)

12 38

12 38
39 21 19 18 12
12 38
12 38
12 38
12 38
12 38
12 38
12 38

12 38

38 12

12 38

38 12
38 12

39 21 19 18 12 +3V_GPU

38 12
38 12

R541

MAIN_RESET_L IS TOGGLED FOR SLEEP

R53

25 20 17 14 MAIN_RESET_L
40 31 27

47

38 12

10K

5%
1/16W
MF
402 2

5%
1/16W
MF
402

38 12
38 12
38 12
38 12
38 12
37 12

21 19 18 12
39

+3V_GPU

38 12
38 12

R43

38 12

1K

1%
1/16W
MF
2 402

38 12
38 12
38 12
38 12
38 12

R44

39 21 18

1K

14

AGP_ATI_RESET_LAH30
AE27
12 AGP_WBF_L

+GPU_MEM

1%
1/16W
MF
2 402

39
19
16
12
15
18
21

R45

AGP_ATI_VREFG
AGP_ATI_VREF

1K
1%

1/16W
MF
2 402
PLACE VERF VOLTAGE DIVIDER
CLOSE TO ATI M10 VREF PIN
1

R46
1K

1%
1/16W
MF
2 402

C11

0.1uF

C37

10uF

20%
2 10V
CERM
402

20%
2 6.3V
CERM
805

RSTB
WBF

AK3 VREFG
D8 MVREF
C19
P2
B18
P4
A19
R3
A18
R4
D19
P1 VSS
G29
G27
B29
C26
C16

39 21 20 19 +1_8V_GPU

A15

C11
ATI_MEMIO_LO
1

R55

4.7K

FOR 2.5 VDDR1


MEMVMODE0=1.8V
MEMVMODE1=GND
FOR 1.8 VDDR1
MEMVMODE0=GND
MEMVMODE1=1.8V

5%
1/16W
MF
402

ATI_MEMIO_HI

R701
4.7K

5%
1/16W
MF
402 2

ATI_MEMIO_HI
1

R104
4.7K

5%
1/16W
MF

2 402

ATI_MEMVMODE0
ATI_MEMVMODE1

U44

B7 MEMVMODE0
B6 MEMVMODE1

A10
C5
A3
G4
E2
U2
V4
AB2
AC4
VSS B23
K2
A23
K1
B22
L2
A22
L1
D+ AC10
D- AC11
TEST_YCLK E8
TEST_MLCK J6
MEMTEST
PLLTEST

C8

AC22
NC

40 39 19 GPU_VCORE

M2
P3
A21
B19
M15
N15
P15
R15
VSS
T15
T12
T13
T14
W16
V16
U16
T16
R16
R17
R18
R19
U6
AE15
VDDCI F18
P25

L2

60-OHM-EMI
1

39 GPU_VCORE_VDDCI

SM
1

C64

0.01uF
20%

GPU_THERM_DP_TP
GPU_THERM_DM_TP
+GPU_MEM 18 21 39

2 16V
CERM

402

C67

10uF
20%

2 6.3V
CERM

805

(PULL-UP to GPU_MEM_IO)
ATI_MEMTEST

C65

0.01uF

ATI_MEMIO_LO

20%
2 16V
CERM
402

R118

R105
4.7K

45.3

C68

0.01uF

20%
16V
2 CERM
402

1%
1/16W
MF

5%
1/16W
MF

2 402

2 402

C66

0.01uF

20%
2 16V
CERM
402

B26
A26
B25
A25
C22
D21
C21
D20
C20
D22
C23
D23
A27
B27
H2
H1
J2
J1
K4
K3
L4
M3
L3
M4 VSS
N2
N1
N4
N3
G30
G28
B30
D26
D16
B15
D11
B10
D5
B3
G3
E1
U1
V3
AB1
AC3
J30
J29
H30
H29
F30
F29
E30
E29
J28
J27
H28
H27
F28
F27
E28
E27
D30
D29 VSS
C30
C29
A30
A29
A28
B28
D28
C28
D27
C27
D25
C25
D24
C24
D18
C18
D17
C17
D15
C15
D14
C14
B17

C69

(2 OF 6)

OMIT

A17
B16
A16
B14
A14
B13
A13
D13
C13
D12
C12
D10
C10
D9
C9
B12
A12
B11
A11
B9
A9
B8
A8
VSS C7
D7
C6
D6
C4
D4
C3
D3
A5
B5
A4
B4
A2
B2
A1
B1
E4
E3
F3
F4
H3
H4
J3
J4
C1
C2
D1
D2
F1
F2
G1
G2
R1
R2
T1
T2
V1
V2
VSS W1
W2
T3
T4
U3
U4
W3
W4
Y3
Y4
Y1
Y2
AA1
AA2
AC1
AC2
AD1
AD2
AA3
AA4
AB3
AB4
AD3
AD4
AE3
AE4

(PLACE THE OSCILLATOR AND R189 AND R195


CLOSE TO ATI PIN AJ29)

L4

FERR-EMI-100-OHM
1

39 +3V_ATI_OSC_SLEEP

SM

C77 1

0.1uF
NO STUFF

4.7uF

20%
10V
CERM 2
402

CRITICAL14

R1881

C78
20%

2 6.3V
CERM
805

VCC

100K

5%
1/16W
MF
402 2

(PLACE R200 CLOSE TO OSC)


GPU_SS

G2

R200

27.0000M
1

ATI_OSC_OE

OE

OSC

SM-1

OUT

ATI_CLK27M_OSC 1

GND

R189
287

1%

ATI_CLK27M_IN

162

1%
1/16W
MF
402 2

C
S0=1;S1=M => -1.5% DOWN-SPREAD

SPREAD SPECTRUM SUPPORT


+3V_SLEEP

GPU_SS

L3

FERR-EMI-100-OHM
1

39

+3V_ATI_SS

SM

GPU_SS
1

GPU_SS

C70

10uF

NO STUFF

R1731
0

5%
1/16W
MF
402 2

C71

0.1uF

20%
2 6.3V
CERM
805

20%

2 10V
CERM

402

GPU_SS 7 CRITICAL

GPU_SS

R181

VDD

U47

5%
1/16W
MF
SOI
2 40218 ATI_CLK27M_OSC_SS
1 XIN/CLKIN

CY25811

NC

XOUT

NC

FRSEL

CY25811_S1
CY25811_S0

3
4

S1
S0

SSCLK 5

ATI_SSCLK_UF
1

33

5%
1/16W
MF
2 402

VSS

ATI_SSCLK_IN

19

NO STUFF NO STUFF

R371
0

5%
1/16W
MF
402 2

R38
0

5%
1/16W
MF

2 402

M11 AGP INTERFACE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

0.01uF

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

20%
2 16V
CERM
402

SIZE

GPU_SS

R201

DRAWING NUMBER

REV.

051-6694 B
18
45
1
SHT

NONE

19

R1951

SCALE

18

1/16W
MF
402 2

APPLE COMPUTER INC.

2 ATI_CLK27M_OSC_SS

5%
1/16W
MF
402

OF

+1_5V_AGP

FERR-220-OHM

SI3446DV
TSOP

M11-CSP64
64MB
BGA
(3 OF 6)

L24

Q77

U44

RAGE_MOBILITY

5
39 21 19 18 16 15 12

1
2
5
6

39

(500mA)

+1_5V_GPU_VDD15

0805

C222 C256 C299


C305 C328
NC
AJ5 ZV_LCDDATA0
GPU_DVOD<0>
ROMCSB AE5
0.01uF
0.01uF
0.01uF
0.01uF
10uF
3
GPU_CORE_OK
20%
20%
20%
20%
20%
AK5 ZV_LCDDATA1
GPU_DVOD<1>
16V
AK28
2 16V
2 16V
2 16V
2 CERM
2 6.3V
GPU_R
CERM
CERM
CERM
CERM
OMIT
R
AG6 ZV_LCDDATA2
4
GPU_DVOD<2>
+GPU_VDD15_UF 402
402
402
402
805
AH6 ZV_LCDDATA3
GPU_DVOD<3>
GPU_G
G AK27
AJ6
GPU_DVOD<4>
ZV_LCDDATA4
1 C166
GPU_B
B AK26
AK6 ZV_LCDDATA5
GPU_DVOD<5>
1
1000pF
R246 1R249
1
10%
1 C232 1 C269 1 C300 1 C306
AG7 ZV_LCDDATA6
GPU_DVOD<6>
R240
75
75
2 25V
ATI_VSYNC
X7R
VSYNC AG27
0.01uF
0.01uF
0.01uF
0.01uF
75
AH7
1%
1%
GPU_DVOD<7>
402
ZV_LCDDATA7
20%
20%
20%
20%
AG25
1%
1/16W
1/16W
V2SYNC
AJ7 ZV_LCDDATA8
NC
1/16W
MF
MF
2 16V
2 16V
2 16V
2 16V
GPU_DVOD<8>
CERM
CERM
CERM
CERM
MF
402
402
402
402
402
402
2
2
AK7 ZV_LCDDATA9
GPU_DVOD<9>
ATI_HSYNC
HSYNC AG26
2 402
AG8 ZV_LCDDATA10
GPU_DVOD<10>
H2SYNC AG24
NC
AH8 ZV_LCDDATA11
GPU_DVOD<11>
ATI_RSET
RSET AK25
GPU_VCORE
AJ8 ZV_LCDDATA12
GPU VCORE - 1.2V
GPU_DVOD<12>
ATI_R2SET
R2SET AJ24
(PUT ALL CAPs BELOW ATI ASIC)
AK8
GPU_DVOD<13>
ZV_LCDDATA13
R234
1
1
AG9
GPU_DVOD<14>
10K 2 INT_TMDS
R256
R257
ZV_LCDDATA14
1
+3V_GPU
715
499
1 C167 1 C219
1 C252
1 C270 1 C301
1 C307 1 C329
1 C332
AH9 ZV_LCDDATA15
GPU_DVOD<15>
1%
1%
5%
GPU_Y
Y_G AK23
AJ9 ZV_LCDDATA16
1/16W
1/16W
10uF
10uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
1/16W
GPU_DVOD<16>
AK24
MF
MF
20%
20%
20%
20%
20%
20%
20%
20%
MF
GPU_C
C_R
6.3V
6.3V
6.3V
6.3V
AK9 ZV_LCDDATA17
402 2
402
GPU_DVOD<17>
2 402
2 CERM
2 CERM
2 6.3V
2 CERM
2 6.3V
2 CERM
2 6.3V
2 6.3V
CERM
CERM
CERM
CERM
GPU_COMP
COMP_B AK22
805
805
402
402
402
402
402
402
AG10
GPU_DVOD<18>
ZV_LCDDATA18
1
1
R248
R254
1
R237
AH10 ZV_LCDDATA19
GPU_DVOD<19>
R245
75
75
10K
EXT_TMDS
75
AJ10 ZV_LCDDATA20
1%
1%
2
1
+1_8V_GPU
GPU_DVOD<20>
1%
1/16W
1/16W
AK10 ZV_LCDDATA21
1/16W
MF
MF
1 C186
1 C913
1 C253
1 C271 1 C302
1 C311 1 C330
1 C333
5%
GPU_DVOD<21>
FP_PWR_EN
DIGON AE13
MF
1/16W
2 402
2 402
AG11
AF13
402
0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF
MF
GPU_DVOD<22>
INV_ON_PWM
ZV_LCDDATA22
BLON
2
20%
20%
20%
20%
20%
20%
20%
20%
402
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
AH11
GPU_DVOD<23>
ZV_LCDDATA23
2
2
2
2
2
2
2
2 6.3V
CERM
CERM
CERM
CERM
CERM
CERM
CERM
CERM
R99
GPU_HPD
HPD1 AF11
402
402
402
402
402
402
402
402
10
+3V_GPU
AJ4 ZV_LCDCNTL0
GPU_DVO_CLKP_R1
GPU_DVO_VSYNC
1
AK4
5%
GPU_DVO_HSYNC
R711
ZV_LCDCNTL1
1/16W
10K
R210
AH5 ZV_LCDCNTL2
MF
GPU_DVOD_DE
5%
402
10
1 C282
AG5 ZV_LCDCNTL3
1/16W
1 C187 1 C221
1 C254
1 C303
1 C326 1 C331
1 C338
GPU_DVO_CLKP_R
GPU_DVO_CLKP
R2471 R2531
MF
0.22uF
10K
10K
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
5%
2 402
20%
R110
AJ2
5%
5%
20%
20%
20%
20%
20%
20%
20%
1/16W
ATI_AGP_FBSKEW<0>
6.3V
GPIO0
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
1/16W
1/16W
2
MF
GPU_AUXWIN
10
CERM
2 CERM
2 CERM
2 CERM
2 CERM
2 CERM
2 CERM
2 6.3V
CERM
MF
MF
GPU_DVO_CLKP_R2
402
ATI_AGP_FBSKEW<1> AK2 GPIO1
402
AUXWIN AJ27
402
402
402
402
402
402
402
402 2
402 2
5%
ATI_X1CLK_SKEW<0> AK1 GPIO2
1/16W
AH3
MF
ATI_X1CLK_SKEW<1>
GPIO3
AH28
402
GPU_DVI_DDC_DATA
DDC1DATA
AH2 GPIO4
ATI_BUS_CFG<0>
+3V_GPU
GPU_DVI_DDC_CLK
R210,R99,R110 PLACE NEAR ATI CHIP
DDC1CLK AH27
AJ1 GPIO5
ATI_BUS_CFG<1>
AF4 GPIO6
ATI_BUS_CFG<2>
LVDS_DDC_DATA
DDC2DATA AE12
AH1 GPIO7
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF
ATI_GPIO7
LVDS_DDC_CLK
DDC2CLK AF12
M10 Power Shut down Sequencing1
1
R258 1R260 1R262 1R265
R269 1R271 1R273
AG3 GPIO8
ATI_GPIO8_PD
AH26
+2_5V_SLEEP
SI_I2C_DATA
10K
10K
10K
10K
10K
10K
10K
DDC3DATA
AF3
ATI_GPIO9_SPN
+3V_GPU
GPIO9
5%
5%
5%
5%
5%
5%
5%
2 402
SI_I2C_CLK
DDC3CLK AH25
1/16W
1/16W
1/16W
1/16W
1/16W
1/16W
1/16W
AG2 GPIO10
ATI_GPIO10_SPN
NO STUFF
MF
MF
MF
MF
MF
MF
MF
MF
1
402
402
402
402
402
402
402
1/16W
AH18
AF2
2
2
2
2
2
2
2
DP6
ATI_GPIO11_SPN
LVDS_U0N
R637
GPIO11
TXOUT_U0N
5%
(GPIO0)
BAS16TW
1K
ATI_AGP_FBSKEW<0>
10K
XW21
XW24
AG18
AG1
ATI_GPIO12_SPN
LVDS_U0P
GPIO12
TXOUT_U0P
SOT-363
5%
SM
SM
R221
(GPIO1)
ATI_AGP_FBSKEW<1>
1/16W
AF1 GPIO13
1
ATI_GPIO13_SPN
LVDS_U1N
TXOUT_U1N AH19
1
6 +2_5V_SLEEP_NECK1
+1_8V_ATI_PVDD1
MF
2
1
2
(GPIO2)
ATI_X1CLK_SKEW<0>
AG19
402 2
AE2
LVDS_U1P
HPD_PWR_SNS_EN
GPIO14
TXOUT_U1P
(GPIO3) ATI_X1CLK_SKEW<1>
GPU_VCORE_CNTL_L AE1 GPIO15
LVDS_U2N
+1_8V_PVDD_NECK
TXOUT_U2N AH20
(GPIO4)
ATI_BUS_CFG<0>
M1 GPIO16
DP6
ATI_SSCLK_IN
LVDS_U2P
TXOUT_U2P AG20
(GPIO5)
BAS16TW +1_5V_AGP_NECK
ATI_BUS_CFG<1>
XW20
LVDS_U3N_TP (NO ICT TEST)
TXOUT_U3N AH22
SOT-363
SM
(GPIO6)
ATI_BUS_CFG<2>
AG22
(NO
ICT
TEST)
ATI_TMDS_DN<0> AJ13 TX0M
LVDS_U3P_TP
TXOUT_U3P
2
5
GPU_VCORE 1
2
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF
ATI_TMDS_DP<0> AK13 TX0P
CLKLVDS_UN
XW23
TXCLK_UN AH21
1
1
1
1
1
1
1
SM
R259
R261 R263 R266 R270 R272 R274
CLKLVDS_UP
GPU_VCORE_NECK
ATI_TMDS_DN<1> AJ14 TX1M
TXCLK_UP AG21
10K
10K
10K
10K
10K
10K
10K
1
2 +1_5V_AGP
DP6
LVDS_L0N
ATI_TMDS_DP<1> AK14 TX1P
TXOUT_L0N AK16
5%
5%
5%
5%
5%
5%
5%
BAS16TW
XW22
1/16W
1/16W
1/16W
1/16W
1/16W
1/16W
1/16W
ATI_TMDS_DN<2> AJ15 TX2M
LVDS_L0P
SOT-363
TXOUT_L0P AJ16
SM
MF
MF
MF
MF
MF
MF
MF
402
402
402
402
402
402
3
4
2
2
2
2
2
2
2 402
ATI_TMDS_DP<2> AK15 TX2P
LVDS_L1N
+GPU_VDD15_UF1
TXOUT_L1N AK17
2
AJ12
AJ17
ATI_TMDS_CLKN
LVDS_L1P
TXCM
TXOUT_L1P
+GPU_VDD15_NECK
AK12 TXCP
ATI_TMDS_CLKP
LVDS_L2N
TXOUT_L2N AK18
LVDS_L2P
TXOUT_L2P AJ18
AJ29 XTALIN
ATI_CLK27M_IN
LVDS_L3N_TP (NO ICT TEST)
TXOUT_L3N AK20
LVDS_L3P_TP (NO ICT TEST)
NC
TXOUT_L3P AJ20
AJ30 XTALOUT
R229
CLKLVDS_LN
TXCLK_LN AK19
1K 1 ATI_TESTEN AH24
2
CLKLVDS_LP
TESTEN
TXCLK_LP AJ19
+PBUS
5%
NC
AJ26 SSIN
1/16W
SSOUT AJ25
NC
38 20

38 20

19 21

22

19 39

38 20

22

38 20
38 20

22

38 20

38 20

22

38 20

38 20

38 20

22

38 20

38 20

40 39 19 18

38 20

38 20
38 20

39 21 19 18 12

38 20

22

38 20

22

38 20

22

38 20

38 20
38 20

39 21 20 18

38 20

22

38 20

22

38 20

22

20

12 18 19 21
39

38 20
38 20
20
37

19

20

19
19

19

22

19

39 21 19 18 12

22

19

22 40

19

22 40

20

20

39 21 19 18 12

20

22 38 40

22
19

22 38 40

18

22 38 40

U44

RAGE_MOBILITY

M11-CSP64
64MB

BGA

(5 OF 6)

OMIT

19

22 38 40

22 38
40
22 38 40

F12
L6
T6
AB6
F17 VDD15
G25
R25
AB25
AJ3
AF25
AG4
AH4
AF5
F6
G6
H6
P6
AD26
V6
W6
AC6
AD6
AE6
F7
F10
AE10
F11
AE11
F13 VDDC
F14
AE14
AF14
W26
AF15
AE17
AC25
AE18
F23
F24
AE24
F25
M25
N25
W25
V25

19

39

19

19

39

19

39

19
19

20

20

39 19 18
40
22 38 40

20

22 38 40

20

22 38 40

20

22 38 40

20
20

22 39 19
38 40
22 38 40

20

22 38 40

39

19 21 39
12 15
16 18

39

22 38 40

18

GPU VCORE SUPPLY

22 38 40
22 38 40

MF
402

B24 VSS
B20 VSS
A24 VSS

VSS
VSS

A20
B21

R430

R389

1M

5%
1/16W
MF
2 603

5%
1/16W
MF
2 402

39

+5V_MAIN

NO STUFF NO STUFF
1
1

R388 R341
0
5%

5%

39 21 19 18 16 15

1/16W
MF
402 2
GPU_VCORE_PWR_SEQ
12 +1_5V_AGP

R2941
10K

5%
1/16W
MF
402 2

5%
1/16W
MF
402 2

1778_SHDN_L_D3COLD

DP1

BAS16TW BAS16TW
SOT-363
6

SOT-363

33K

SM

R236
100K
5%

5%
1/16W
MF
402 2

1/16W
MF
2 402

1778_SHDN_L

SOT-363
3

DCDC_EN 30

34 35 40

R340
20K

1%
1/16W
MF
402 2
39 1778_ITH_RC

SM

5%

C494

39

1/16W

MF

C448 1

402 2

470pF
10%

50V
CERM 2
402

39 19

C4511R311 1R332

9
11
10
EXT INT VIN
VCC VCC

220pF
0
5%
25V

2 CERM

402

5%
1/16W
MF
2 402

5%
1/16W
MF
2 402

25V
CERM 2
603

39

1778_VRNG

3 VRNG

39

1778_FCB

SGND
6

1.2V = 0.8V * (1 + R332 / (R331//R333))

C514 1

B00ST 16
TG 15
SW 14

39

VFB 8
PGND
13

39

Q48
SI7892DP

1778_BG
1778_VFB

1778_GND

SO-8-PWRPK

NO STUFF
19 39 40

C882

0.0022UF
10%

20%
6.3V
POLY
SMD

20%
6.3V
POLY
SMD

C720 1

R410
10K

1
GPU_VCORE_CNTL_L

5%
1/16W
MF
2 402

C902

0.1UF
20%

2 10V
CERM

402

Q80

2N7002DW

10V
CERM 2
402

SOT-363

1.82K402
1%
1/16W
MF

HIGH_VCORE

GPU_VCORE_CNTL

R804
1/16W
MF

2 402
3

2N7002DW
SOT-363

M11 CORE PWR/LVDS/TMDS

NOTICE OF PROPRIETARY PROPERTY

Q80

VCORE_CNTL_RC6

5%
1/16W
MF
402

0.1uF
20%

100K

R351

1
GPU_PWRMSR GPU_PWRMSR
20K
1
1%
1

C515 1

402

R307

20%
6.3V 2
POLY
SMD

2 402

HIGH_VCORE_DIV

330UF

GPU_PWRMSR

2 50V
CERM

+5V_MAIN

GPU_PWRMSR
19

1%
1/16W
MF

330UF

20%
10V
CERM
1210

C719 1

CRITICAL

XW2
SM

402

18.2K

C721

330UF

1778_BST
39 1778_TG

GPU_PWRMSR

R451

C708

B340LB

1778_VFB
1

22uF

D24
SMB

1%
1/16W
MF
402 2
40 39 19

39

OMIT

2 10V
CERM

L30

4.99K

19 39 40

2.1UH-11A
SM

25V
CERM 2
603

1778_ION

R3521

GPU_VCORE 18

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

REV.

051-6694
SHT
NONE

1.0V = 0.8V * (1 + R332 / R333)

SCALE

WHEN VCORE_CNTL LOW => 1.0V

CRITICAL

GPU_VCORE_SW

4 FCB

GPU_CORE_OK 2 PGOOD

0.1uF
20%

2.2

39

39

0.1uF
20%

ION 7

CRITICAL

5 ITH

WHEN VCORE_CNTL HIGH => 1.2V

4.7UF

5%
1/16W
MF
603

U16

SSOP

1778_ITH

C483

LTC1778
1 RUN/SS

39

21
19

R416

0.1uF
20%

BG 12
1

D5
SM

MBR0540

1206

R3901

34 35 36

Q51

1778_VIN

+5V_MAIN

20%
25V
CERM 2
1206

SO-8-PWRPK
CRITICAL
39

1778_GND 19

2N3904

SLEEP_L_LS5 28

DP1

2N3904

BAS16TW

Q5

1
GPU_VCORE_SEQ

R2031

Q6

1/16W
MF
2 402

1/16W
MF
402

1778_VCC

DP1

GPU_VCORE_SEQ_L

1/16W
MF
2 402

2 10V
CERM

C766 1

20%
25V
CERM 2
1206

SI7860DP

C473

4.7UF
4.7uF
20%

63.4K
1%

C762 1
4.7UF

576K
1%

1778_BST_RC

1
R306 R316
100K
1

100K

R339

G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
H7
H8
H23
H24
J7
J24
K7
K24
L7
L24
M7
M24
N7
N24
P7
P24
R7
R24
T7
T24
U7
U24
V7
V24
W7
VSS W24
Y7
Y24
AA7
AA24
AB7
AB24
AC7
AC8
AC23
AC24
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23

19

OF

B
45

L83

R765

5%
MF
402

EXT_TMDS

39

R587
0
1

20

SI_RESET_L

ATI_GPIO7

R818
1K
2

NO STUFF

D32

1N914
1

19

MAIN_RESET_L

EXT_TMDS EXT_TMDS EXT_TMDS

C920

C922

C924

6.3V
CERM
805

50V
CERM
402

50V
CERM
402

10uF
20%

100pF
5%

100pF
5%

19

19

50V
CERM
402

39

PP3V3_SI_AVCC1

C89

10uF

1%
MF-LF
402

20%
6.3V
CERM
805

C129

100pF

5%
50V
CERM
402

EXT_TMDS

L87

C131
5%
50V
CERM
402

R205
EXT_TMDS
1/16W
10K
5%

5%
1/16W
MF
402 2

R817
10K
1/16W

5%
MF
402

38 19
38 19
38 19
38 19
38 19
38 19
38 19
38 19
38 19
38 19

20

GPU_DVOD<0>
GPU_DVOD<1>
GPU_DVOD<2>
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<11>
SI_MASTER
TMDS_MASTER
TMDS_SYNC

U35

SIL178
TQFP

20
19

SI_I2C_CLK
SI_I2C_DATA
SI_RESET_L

15
14
13

25
24

SI_TMDS_DP<0>
SI_TMDS_DN<0>

28
27

SI_TMDS_DP<1>
SI_TMDS_DN<1>

31
30

SI_TMDS_DP<2>
SI_TMDS_DN<2>

22
21

SI_TMDS_CLKP
SI_TMDS_CLKN

EXT_TMDS

38 19
38 19

38 19

20
20

20

C165
20%
6.3V
CERM
805

C233

100pF

5%

EXT_TMDS
1 R821
10K
38 19
5%

MF

1/16W
402

38 19
38 19

38 19

20
20

GPU_DVOD<12>
GPU_DVOD<13>
GPU_DVOD<14>
GPU_DVOD<15>
GPU_DVOD<16>
GPU_DVOD<17>
GPU_DVOD<18>
GPU_DVOD<19>
GPU_DVOD<20>
GPU_DVOD<21>
GPU_DVOD<22>
GPU_DVOD<23>
SI_SECONDARY

SI_VREF
EXT_TMDS
1

C916
0.1uF

TMDS_SYNC
19 GPU_DVO_VSYNC
GPU_DVO_CLKP_R2
20

38 20
19

2
20 19

SI_TMDS_DN<0>

SI_TMDS_DP<0>

20

RP63
0

GPU_DVOD_DE

63 D0
BSEL/SCL
62 D1
DSEL/SDA
61 D2
EXT_TMDS
ISEL/RST*
60 D3
PD*
59 D4
MSEN
58 D5
SIL178
DK1
55 D6
TQFP
DK3
54 D7
EDGE/HTPLG
53 D8
52 D9
EXT_SWING
51 D10
50 D11
TX0+
47 D12/DUAL
TX046 D13/MAST
TX1+
45 D14/SYNCO
TX144 D15
43 D16
TX2+
42 D17
TX241 D18
TXC+
40 D19
TXC39 D20
38 D21
NC
37 D22
RSVD
36 D23

TMDS_CONN_DN<4>

22

TMDS_CONN_DP<4>

22

L15

20

TMDS_DN<5>

TMDS_CONN_DN<5>

22

20

TMDS_DP<5>

TMDS_CONN_DP<5>

22

20

SI_TMDS_DP<1>

SI_TMDS_DN<2>

10uF

20%
6.3V
CERM
805

C255

100pF

SI_I2C_CLK
SI_I2C_DATA
SI_RESET_L

TMDS_DP<1>

TMDS_DP<2>

5%
50V
CERM
402

TMDS_DN<2>

INT_TMDS

28
27

SI_TMDS_DP<4>
SI_TMDS_DN<4>

31
30

SI_TMDS_DP<5>
SI_TMDS_DN<5>

20 TMDS_CLKP 1

1500PF
10%
25V
X7R
402

5%
1/16W
MF
402
2

SI_TMDS_DN<5>

SI_TMDS_DP<5>

20 22 38 40

19 20

20 22 38

1%
1/16W
MF
402

20

RP68

TMDS_DN<5>20

5%
1/16W
SM1

TMDS_DP<5>20

TMDS_DP<3> 1

1%
1/16W
MF
402

EXT_TMDS

TMDS_DN<0> 20

22 38 40
20

50V
CERM
402

R231
75

TMDS_D1_CMF 1

INT_TMDS

20

73.2

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION

10%
25V
X7R
402

TMDS_D5_CMF 1

TMDS_DN<5> 20

1%
1/16W
MF
402

EXT_TMDS

C941 1

0.001UF
10%
50V
CERM
402
INT_TMDS

TMDS_D2_CMF 1

C934
1500PF
TABLE_5_HEAD

TMDS_DP<5> 1

R836
84.5

1%
1/16W
MF
402

73.2

TMDS_DN<2> 20

INT/EXT TMDSA

R832

1%
1/16W
MF
402

EXT_TMDS

R232
84.5

22 38 40

R830
TMDS_DP<2> 1

EXT_TMDS

TMDS_DN<1> 20

1%
1/16W
MF
402

25V
X7R
402

40 38 22 20

22 38 40

1%
1/16W
MF
402

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

TABLE_5_ITEM

114S7501 2

RES, 75, 1%, 1/16W, 0402

R223,R831

EXT_TMDS

SIZE

R829,R833,R228,R231,R830,R832,R834,R837,R835,R714,R232,R836
TABLE_5_ITEM

114S8451 12

EXT_TMDS

RES, 84.5, 1%, 1/16W, 0402

132S0045 4

CAP CER .001UF,10%,50V,0402,SMD


C931,C932,C933,C934

APPLE COMPUTER INC.

EXT_TMDS

DRAWING NUMBER

D
SCALE

I2C ADDR. SLAVE = 0X72

REV.

051-6694 B
20
45
SHT

NONE

INT_TMDS

INT_TMDS

20

TMDS_DN<4> 20

C939 1

1500PF
10%

20

1%
1/16W
MF
402

EXT_TMDS

C931 1

20

TMDS_D4_CMF 1

0.001UF
10%

1%
1/16W
MF
402

20

EXT_TMDS

R714
84.5

1%
1/16W
MF
402

INT_TMDS

R228
75

R835
84.5

TMDS_DP<4> 1

INT_TMDS

20

INT_TMDS

C933 1

20

20

1%
1/16W
MF
402

C940 1

0.001UF
10%
50V
CERM
402

1%
1/16W
MF
402

TMDS_DP<1> 1

EXT_TMDS
R837
84.52 TMDS_DN<3>
TMDS_D3_CMF 1

1%
1/16W
MF
402
EXT_TMDS

R833
84.5

1500PF
10%

20

QTY

EXT_TMDS

R834
84.5

2 TMDS_D0_CMF 1

19 20

PART#

TMDS_DN<4>20

EXT_TMDS
TMDS_CLKN

R829
84.5

TMDS_DP<0> 1

EXT_TMDS

34

5%
1/16W
SM1

5%
1/16W
SM1

R831
66.5

C932 1

R212
10K

RP68

20 22 38 40

2 TMDS_CLK_CMF 1

1%
1/16W
MF
402 INT_TMDS

22
21
7

20

20 22 38 40

INT_TMDS

R223
66.5

40 38 22 20

SI_TMDS_DP<3>
SI_TMDS_DN<3>

SI_TMDS_DN<4>

INT/EXT TMDS CLK & D<0:2> TERMINATION


EXT. TMDS D<3:5> TERMINATION

C660

SLAVE_SWING

25
24

20

20

SI_S_HTPLG

19

20 22 38 40

TMDS_DP<4>20

5%
1/16W
SM1

EXT_TMDS

25V
X7R
402

10
11
8
6
9

RP67
0

RP67

TMDS_DN<1>

5%
1/16W
SM1

TERMINATION NETWORK SHOULD BE CONNECTED AS SHOWN


CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS

15
14
13

SI_TMDS_DP<4>

RP65

EXT_TMDS

22 38 40

EXT_TMDS
1

TMDS_DN<3>20

5%
1/16W
SM1

22 38 40

5%

100pF

5%
50V
CERM
402

TMDS_DP<3>20

5%
1/16W
SM1

EXT_TMDS

1/16W
SM1

EXT_TMDSEXT_TMDS EXT_TMDS

C218

RP65
0

RP64
0

EXT_TMDS

5%
1/16W
SM1

RP64
0
4

EXT_TMDS
20

RP66

SI_TMDS_DP<3>

EXT_TMDS

SM1
5%
1/16W

SI_TMDS_DP<2>

EXT_TMDS

22 38

20

INT_TMDS

TMDS_DP<4>

CRITICAL
90-OHM-300MA
2012H
SYM_VER-1

22 38

TMDS_DN<0> 20

TABLE_5_ITEM

20

RP66

TMDS_DP<0> 20

40 38 22 20

GND
AGND
1635 64 2026 32 17 48

20 22 38 40

SI_TMDS_DN<3>

INT_TMDS

3 VREF
4 HSYNC/SYNCI
5 VSYNC
57 IDCK+
56 IDCK2 DE

TMDS_DP<2>

20

EXT_TMDS

20

PP3V3_SI_PVCC2

SI_TMDS_DN<1>

112 33 23 29 18 49
VCC
AVCC

U48

1.472

5%
1/16W
SM1

5%
1/16W
SM1

5%
50V
CERM
402

1/16W
MF
1%
402

5%
1/16W
MF
402

TMDS_DN<4>

R841

20

TMDS_CLKP 20

RP63

C656

357

R823
10K

20 22 38 40

20

EXT_TMDS

EXT_TMDS

SM1

20

TMDS_CLKN 20

1/16W

100pF

5%
50V
CERM
402

R826

PGND2

1/16W
MF
402 2

20

20

18 19 21 39

20%
10V
CERM
402

5%
50V
CERM
402

EXT_TMDS
EXT_TMDS

PGND1

20%
10V
CERM
402

5%
50V
CERM
402

SI_TMDS_CLKP

MSEN_PULL_UP_SLAVE

1%

1
C930
1K
0.1uF
1%

2 CERM
402

100pF

38 22

402 2

R8281

5%
50V

C812

SM-1

EXT_TMDS

20

TMDS_DN<2>

5%
1/16W
SM1

RP62

400-OHM-EMI
39

19
20
20

1/16W
MF

20

100pF

EXT_TMDS

R827
1K
EXT_TMDS

C284

2
PP3V3_SI_AVCC2 1
SM-1
EXT_TMDS EXT_TMDS EXT_TMDS

C220

100pF

10uF

I2C ADDR. MASTER = 0X70

+1_8V_GPU

39

19
20

20

L14

SYM_VER-1

20 22 38 40

INT_TMDS
1

ATI_TMDS_DP<2>

EXT_TMDS

L88
400-OHM-EMI

7
34

19

SI_TMDS_CLKN

SI_M_HTPLG

38 19

GND
AGND
16 35 64 2026 32 17 48

EXT_TMDS

20%
6.3V
CERM
805

5%

38 19

PGND2

GPU_DVOD_DE

20 22 38 40

EXT_TMDS

MF
402

MASTER_SWING

1.472

ATI_TMDS_DN<2>

TMDS_CONN_DP<3> 22

EXTERNAL TMDS SERIES TERMINATION

EXT_TMDS

10K
1/16W

19

19

EXT_TMDS
2012H

TMDS_DP<1>

MF-LF
402

20

R214

10
11
8
6
9

TMDS_CONN_DN<3> 22

RP62

5%
50V
CERM
402

1/16W
MF
1%
402

2 402

38 19

PGND1

20 19

TMDS_DP<3>

1%
1/16W
MF-LF
402

1%
1/16W

100pF

R648
10K EXT_TMDS
5%
R822
1/16W
357
MF

C133

C132

PVCC2

38

3 VREF
4 HSYNC/SYNCI
5 VSYNC
57 IDCK+
56 IDCK2 DE

5%
50V
CERM
402

1.472

1%
1/16W
MF-LF
402

TMDS_DP<0>

PP3V3_SI_VCC2

10uF

EXT_TMDS

PVCC1

SI_VREF
19 GPU_DVO_HSYNC
19 GPU_DVO_VSYNC
38
GPU_DVO_CLKP_R1

MSEN_PULL_UP_MASTER

38 19
20

100pF

20 22 38 40

1%
1/16W
MF-LF
402

L89

63 D0
BSEL/SCL
62 D1
DSEL/SDA
61 D2
ISEL/RST*
EXT_TMDS
60 D3
PD*
59 D4
MSEN
58 D5
DK1
55 D6
DK3
54 D7
EDGE/HTPLG
53 D8
52 D9
EXT_SWING
51 D10
50 D11
TX0+
47 D12/DUAL
TX046 D13/MAST
TX1+
45 D14/SYNCO
TX144 D15
43 D16
TX2+
42 D17
TX241 D18
TXC+
40 D19
TXC39 D20
38 D21
NC
37 D22
RSVD
36 D23

20%
6.3V
CERM
805

C130

20

CRITICAL
90-OHM-300MA

ATI_TMDS_DP<1>

PVCC2

PVCC1

38 19

112 33 2329 18 49
VCC
AVCC

EXT_TMDS
1

TMDS_DN<0>

R839
1.47

R840

R824

EXT_TMDSEXT_TMDSEXT_TMDS EXT_TMDS

R218
10K
1

38 19

EXT_TMDSEXT_TMDS
1

C102
10uF

MF
402

EXT_TMDS
R2111
10K
1/16W

EXT_TMDS

19

INT_TMDS

TMDS_DN<3>

INT_TMDS

20

SM-1

20 22 38

20 22 38 40

20

EXT_TMDS

PP3V3_SI_PVCC1

TMDS_CLKP

SM-1
39

L20
400-OHM-EMI
39

TMDS_DN<1>

400-OHM-EMI

100pF

1.472

ATI_TMDS_DN<1>

1%
1/16W
MF-LF
402

5%
1/16W
MF
402

ATI_TMDS_DP<0>

EXT_TMDS

19

INT_TMDS

EXT_TMDS

EXT_TMDS

R815
1.47
1
2
1/16W

SM-1

EXT_TMDS EXT_TMDS

ATI_TMDS_DN<0>

20 22 38

INT_TMDS

ATI_TMDS_CLKP

EXT_TMDS

SOT23

TMDS_CLKN

R838
10

INT_TMDS

19

R816

5%
1/16W
MF
402

L19
400-OHM-EMI

ATI_TMDS_CLKN

C928
100pF
5%

L13

SYM_VER-1

R842
10

EXT_TMDS

19

5%
MF
402

2012H

INT_TMDS

INT_TMDS

14 17 18 25 27 31 40

5%
1/16W
MF
402

EXT_TMDS

CRITICAL
90-OHM-300MA

20 23 39

MIN_NECK_WIDTH=0
MIN_LINE_WIDTH=25

PP3V3_SI_VCC1

NO STUFF

5%
1/16W
MF
402

+3V_SLEEP

SM-1

10K
1/16W

1
L13,L14,L15 PLACE NEAR DVI CONNECTOR

INTERNAL TMDS SERIES TERMINATION

400-OHM-EMI

+3V_SLEEP
2

39 23 20

5
EXT_TMDS

OF

7
39 21

+2_5V_GPU

21 19

1
3
GPU_CORE_OK

VIN

CONT NOISE

C889

L58

(140mA)

0402

20%
2 6.3V
CERM
805
39
20
18
19
21

0.01uF
20%

402

39

(AVDD+VDDDI=75mA)

C415

C437

0.01uF

20%
2 6.3V
CERM
805

C870

0.01uF

20%
2 16V
CERM
402

39 21

+2_5V_GPU_A2VDD

39 21

+1_8V_GPU_AVDDQ

20%

2 16V
CERM

402

39 21

+1_8V_GPU_VDDDI

39 21

+GPU_MCLK

+1_5V_AGP

L59

AGP 4X I/O - 1.5V

FERR-10-OHM-500MA
1

C339
10uF C363
0.01uF

39

(20mA)

+1_5V_AGP_GPU

SM
1

20%
2 16V
CERM
402

C381

C420

0.1uF

0.1uF

20%
2 10V
CERM
402

20%
2 10V
CERM
402

C446

0.1uF

C543

0.1uF

20%
2 10V
CERM
402

C871
10uF

20%
2 10V
CERM
402

20%

2 6.3V
CERM

805

+1_8V_GPU

L56
FERR-220-OHM
1

(AVDD+VDDDI=75mA)

0402
1

20%
2 16V
CERM
402

20%
2 16V
CERM
402

C382

L63

L57
FERR-220-OHM

39

0402
1

20%
2 6.3V
CERM
805

20%
2 16V
CERM
402

20%
2 16V
CERM
402

R722
0

39 21 19

+1_5V_AGP

1.8V

+1_8V_GPU

R729
0

R728

5%
1/4W
FF
2 1210

0.01uF

20%
2 16V
CERM
402

C866

0.1uF

0.1uF

20%
2 10V
CERM
402

C672

39

C409

0.01uF

C428

C701

0.01uF

20%
2 16V
CERM
402

0.01uF

20%
2 16V
CERM
402

OMIT

20%
2 6.3V
CERM
805

20%
2 16V
CERM
402

+GPU_MEM

(40mA)

+1_8V_GPU_PNLPLL

10uF

2.5V

39 21 19

EXT_TMDS

C867

R279

0.01uF

20%

2 16V
CERM

5%
1/16W
MF
2 603

402

L62

+1_8V_ATI_PVDD

C411
10uF

21 39

20%

39 21

+3V_GPU

2 6.3V
CERM

+2_5V_GPU

C910
2.2UF

20%

2 6.3V
CERM1

603

10uF

20%
2 6.3V
CERM
805

0.01uF
20%
402

20%
2 16V
CERM
402

(20mA)

OUT2 4

C911 1

0.033UF

20%
10V 2
X7R
402

1
1

C912

39 21 20 19 18

C412

C434

10uF

SM

20%

2.2UF

2 6.3V
CERM

20%
2 6.3V
CERM1
MAX8860_FAULT603

+2_5V_SLEEP

(350mA)

FERR-10-OHM-500MA

100K
MAX8860_CC

5%
1/16W
MF
402 2

LVDS - 2.5V

L17

R6351

FAULT* 8
SET
CC 6
GND

+2_5V_GPU_PNLIO

0.01uF
20%

2 16V
CERM

805

402

+1_8V_GPU

L60

+3V_SLEEP

C868

0.01uF
20%

2 16V
CERM

39

R721

C413
10uF

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

IC,MAX8860,LDO,2.77V

REFERENCE DESIGNATOR(S)

BOM OPTION
TABLE_5_ITEM

353S0828

U8

(180mA)

+1_8V_GPU_PNLIO

3.3V

20%
2 6.3V
CERM
805

C435
0.1uF

20%
2 10V
CERM
402

C864
0.1uF

20%
2 10V
CERM
402

C704
0.1uF

M11-CSP64
64MB
BGA
(4 OF 6)

AK21 LPVDD
AK11 TPVDD
A7 MPVDD
AE16 LVDDR_18
AF16 LVDDR_18
AG16 LVDDR_25
AF17 LVDDR_25
AG12 TXVDDR0
AG13 TXVDDR1
AG14 TXVDDR2
AG15 TXVDDR3

LPVSS
TPVSS
MPVSS
LVSSR0
LVSSR1
LVSSR2
LVSSR3
DVOVMODE
TXVSSR1
TXVSSR2
TXVSSR3

AJ21
AJ11
A6
AH16
AG17
AH17
AF18
AH12
AH13
AH14
AH15

39 21 18

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

353S0647

353S0828

U8

ALT FOR 2.82V PART

1
TABLE_ALT_ITEM

GPU POWER SOURCES - 1.5V, 1.8V, 2.5V & 3.3V


6

C414
0.1uF

20%
2 10V
CERM
402

C436

0.01uF

20%
2 16V
CERM
402

0.01uF

SOT-363

2 +2_5V_SLEEP_NECK2

L67

FERR-220-OHM
1

MEMORY I/O
(1200mA)

GPU_MEM_IO_FLT

39

C872

0.1uF

805

C873

0.1uF

20%

C851

SOT-363

402

C856

0.1uF

C861
0.1uF

20%

20%

2 10V
CERM

402

20%

0.1uF

20%

402

20%

2 10V
CERM

402

C862

0.01uF

20%

2 10V
CERM

402

C857
0.1uF

20%

2 10V
CERM

402

C852

2 16V
CERM

402

402

+1_8V_GPU

EXT_TMDS

18 19 20 21 39

L16

FERR-10-OHM-500MA
2

+1_8V_DVO_F
1

C304

10uF

C327

0.1uF

20%

INT_TMDS

20%

2 10V
CERM

805

C647
0.1uF

20%

2 6.3V
CERM

R268

2 10V
CERM

402

1
SM

402

5%
1/16W
MF

2 603

+3V_GPU 12

L68

39

18 19 21

FERR-10-OHM-500MA

+3V_GPU_FLT

39

SM
1

C722
10uF
20%

2 6.3V
CERM

805

C725

20%

C849

C854

C863
0.1uF
20%

2 10V
CERM

402

402

C859
0.1uF

20%

20%

2 10V
CERM

402

0.1uF

0.1uF

20%

C858

2 10V
CERM

402

2 10V
CERM

402

20%

2 10V
CERM

0.1uF

20%

2 10V
CERM

C853
0.1uF

0.1uF
20%
2 10V
CERM
402

0.1uF

C848

2 10V
CERM

402

402

EXT_TMDS

R255

0
ATI_DVOVMODE
1
INT_TMDS

R251
0

+1_8V_GPU

18 19 20 21 39

5%
1/16W
MF
402

3.3V IO SUPPLY

5%

(Max Current varies, depends on usage)

M11 POWER

OMIT

XW30
SM

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

2 39 +1_5V_SLEEP_NECK

20%

2 10V
CERM

402

0.1uF

2 10V
CERM

DP7

20%

C847

0.1uF

4 +3V_SLEEP_NECK 1

BAS16TW

0.1uF

2 10V
CERM

C
C874

DP7

C860

20%
2 10V
CERM
402

2 10V
CERM

402

C855
0.1uF

0.1uF

20%

2 10V
CERM

402

20%
2 10V
CERM
402

C876

0.1uF

2 10V
CERM

C850
0.1uF

20%
2 10V
CERM
402

2 CERM

C875

10uF
20%
6.3V

SOT-363

2 39 +1_8V_SLEEP_NECK

0805

BAS16TW

+1_5V_SLEEP OMIT
XW29
SM

20%
2 16V
CERM
402

39

DP7

BAS16TW

+1_8V_SLEEP OMIT
XW28
SM

C869

+GPU_MEM

+3V_SLEEP
M11 SHUT DOWN POWER SEQUENCING

20%
2 10V
CERM
402

12 18 19 21 39

E5
E6
E12
E13
E18 VDDM
E19
E20
E26
F26
E7
H26
E9
E10
E11
E14
E15
E16 VDDR1
E17
E21
E22
E23
E24
E25

+2_5V_SLEEP OMIT
XW27
SM

TABLE_ALT_HEAD

+3V_GPU

805
INT_TMDS

10%

2 16V
CERM

1/16W
MF

LVDS/TMDS - 1.8V

5%
1/10W
FF
2 805

AK30
AF22
A2VSSQ AJ22
AVSSN0 AE22
AVSSN1 AE23
A2VSSN0 AE19
A2VSSN1 AE20
VSS1DI AG23
VSS2DI AF19
VSSRH0 F20
VSSRH1 M6
F5
G5
H5
J5
K5
L5
M5
N5
P5
R5
T5
U5
V5
W5
Y5
AA5
VDDR1
AB5
AC5
AD5
G26
K6
R6
Y6
AA6
F8
F9
F15
F16
F21
F22
H25
J25
J26
AF6
AE7
VDDR4 AF7
AE8
AF8
AE9
AF9
AF10
VDDR3 AD25
AE25
AE26
AF26

402

0402

R299
0

20%

2 6.3V
CERM

C880

0.01UF

2 402

FERR-220-OHM

U44
RAGE_MOBILITY

0.01uF

SM

+2_8V_GPU_LVDS_LDO

UMAXOUT1 1

C877 1 C878

FERR-10-OHM-500MA

MAX8860

SHDN*

+1_8V_GPU_TP_PLL
1

C429

L64

U8

IN

+1_8V_GPU_MEMPLL

2 16V
CERM

805

NO STUFF

OMIT

21

FERR-220-OHM
MEMORY PLL - 1.8V
1
2
0402

+GPU_MEM 18

21

10UF

INT_TMDS

GND

2
+1_8V_GPU_TP_PLL

PVSS
AVSSQ

10uF

20%
2 10V
CERM
402

C450

AK29 PVDD
AF23 AVDD0
AF24 AVDD1
AE21 A2VDD0
AF21 A2VDD1
AJ23 A2VDDQ
AH23 VDD1DI
AF20 VDD2DI
F19 VDDRH0
N6 VDDRH1
K25
L25
T25
Y28
K27
AA25
K26
L26
M26
N26
P26
R26 VDDP
T26
U26
V26
Y26
AA26
AB26
AC26

C715

LVDS PLL - 1.8V

39

1.8V

C426

20%
2 6.3V
CERM
805

5%
1/4W
FF
1210 2

(1800mA)

ATI_MEMIO_HI

2.5V

402

0402

18 19 20 21 39

+1_8V_SLEEP +2_5V_SLEEP

39

20%

2 16V
CERM

39 21 18

12 15 16 18 19 21 39

ATI_MEMIO_LO

C408

L61
FERR-220-OHM

1.5V

+2_5V_GPU 21

C671

0.01uF

20%
2 16V
CERM
402

+1_8V_ATI_PVDD

5%
1/10W
FF
805 2

5%
1/10W
FF
2 805

20%
2 10V
CERM
402

20%
2 16V
CERM
402

R284
0

C425
0.1uF

0.01uF

+1_8V_SLEEP

+1_5V_SLEEP

5%
1/10W
FF

0.01uF

+GPU_MEMCORE
1

20%
2 10V
CERM
402

21 39

C359
10uF C362
0.01uFC373
0.01uF
1

C383
0.1uF

+GPU_MCLK

2 805

C447

0805

39 21 19 18 12

MEMORY CORE - 2.5V

FERR-220-OHM

20%
2 16V
CERM
402

+GPU_MEM

+GPU_MEM

0.01uF

20%
2 16V
CERM
402
39 21 18

C421

0.01uF

21 39

C358
C361 C372
10uF 0.01uF0.01uF

20%
2 6.3V
CERM
805

+1_8V_GPU_VDDDI

C879

L69

FERR-220-OHM

5+1_8V_ATI_TPVDD 1
0402
4ATI_TPVDD_BYP 1 C881

603

+1_8V_GPU_AVDD

10uF

20%
2 6.3V
CERM
805

VOUT

CONT NOISE

10%

0402

39

VIN

402

+1_8V_GPU_AVDDQ 21

CRITICAL

1
INT_TMDS
GPU_CORE_OK 3
1UF

L66

20%
2 16V
CERM
402

(2mA)

INT_TMDS

MM1571J
SOT-25A

2 6.3V
CERM

402

FERR-220-OHM

39 21 19 18 16 15 12

2 16V
CERM

21 19

INT_TMDS

+1_8V_GPU

21 39

L55
FERR-220-OHM
0402

39
18
21

20%

+1_8V_GPU

39
20
18
19
21

2 10V
CERM

805

39 21 20 19 18

+2_5V_GPU

C716

C865
0.1uF

20%

20%
2 16V
CERM
402

10uF

C360
C364 C374
10uF 0.01uF 0.01uF

C438

1
U54

(21mA)

2 6.3V
CERM

20%
2 6.3V
CERM
805

20%
2 16V
CERM
402

+2_5V_GPU_A2VDD

10uF

0.01uF

39 21

+1_8V_GPU_PLL

C380

C379

FERR-220-OHM
1

39

0402

ATI_PVDD_BYP

GND

10%
2 6.3V
CERM
603

+2_5V_GPU

5
4

1UF

21
39

VOUT

FERR-220-OHM

(Total PVDD = 66mA)


39 21 19 +1_8V_ATI_PVDD

CRITICAL

GPU PLL - 1.8V

L65

MM1571J (100mA MAX)


SOT-25A

U55

APPLE COMPUTER INC.

D
SCALE

DRAWING NUMBER

SHT

NONE

REV.

051-6694 B
21 45
1
OF

ANALOG FILTERING PLACE CLOSE TO CONNECTOR


FL2

SM-220MHZ

19

GPU_B

VGA_B

3 4

FL1

GPU_G

+5V_SLEEP
1

VGA_G

22 40

FL3

SM

19

GPU_R

VGA_R
1

3 4

C684

2 50V
CERM

402

R718

SM

33

4 VGA_HSYNC_BUF 1

U56
32

2 VGA_HSYNC

20

22 40

5%
1/16W
MF
402

40 38 22

VGA VSYNC BUFFERS


CRITICAL

5
19

74AHC1G32

ATI_VSYNC

R687
33

SM

4 VGA_VSYNC_BUF 1

U57
32

40 38 22

40 22

2 VGA_VSYNC

22 40

5%
1/16W
MF
402

40 22

VGA_B
VGA_HSYNC

C3
C5B
C4
34

CRITICAL

L72

L21
165-OHM

90-OHM-300MA
2012H
SYM_VER-1

VGA_VSYNC
DVI_HPD_UF
VGA_R
VGA_G

40 38 20

1
TMDS_DN<0>

TMDS_CONN_DN<0>

22

40 38 20

2
TMDS_DP<0>

TMDS_CONN_DP<0>

22

TMDS_CONN_CLKP

22 38 40

TMDS_CLKN 2

TMDS_CONN_CLKN

22 38 40

CRITICAL

L73

40 38 20

1
TMDS_DN<1>

2
TMDS_DP<1>

22 40

TMDS_CONN_DP<1>

22

40 38 20

40 38 20

1
TMDS_DN<2>
2
TMDS_DP<2>

R1
0

5%
1/16W
MF
2 402

3 TMDS_CONN_DP<2>

2N7002DW

DVI_HPD

19

GPU_C

39

GPU_TV_GND2

C449 1

0.001uF
20%

39 40

40 38 19

50V
CERM 2
402

40 38 19
40 38 19

40 38 19

J15

L27

40 38 19

40 38 19

RT-TH
MH1177

TV_Y
TV_COMP

3
1
5

8
10

50V
CERM 2
402

40 38 19

40 38 19

40

CHGND1

R400

100K
5%

C713 1
1

1/16W
MF
2 402

560PF
10%

L28

50V
CERM 2
402

R391

TV_GND2

SM

39 40

100K2

22 19

1 G
FP_PWR_EN

+3V_LCD_SW

5%
50V
CERM
603

40 38 19

FERR-250-OHM

6
5
2
1

LCD_PWREN_L
TSOP

1/16W
MF
402

40 38 19

L6

SI3443DV

Q11

Q45

R696

1
1

1/16W
MF
402 2

C474 1

R704

SM

5%
1/16W
MF
402 2

C703 1
47UF
20%

2N7002DW
SOT-363

6.3V 2
CERM
1210

R705

68K

5%
1/16W
MF

2 402

+PBUS

+5V_MAIN
R317
100K

L32

CRITICAL

SM-1

5%
1/16W
MF

G2

FP_PWR_EN_L

J7

C746

SM-2MT

0.001UF
20%

C440

2 50V
CERM

10UF
20%

402 2

402

805

D1

+5V_INV_SW

Q7

FDG6324L

5 G1
FP_PWR_EN

40
39

SC70-6

S1

+3V_PMU

40

C749

0.001UF
20%

L31
400-OHM-EMI

1
2
3
4

2 6.3V
CERM

22 19

+12_8V_INV

400-OHM-EMI

3
2

D2

4 S2

40
39

+5V_INV_UF_SW

SC70-6

SM

Q7
FDG6324L

2 50V
CERM

402

2 BRIGHT_PWM

SM-1
1

C739

0.001UF
20%

2 50V
CERM

C552 1

402

0.1UF
20%

10V
CERM 2
402

19

14

INV_ON_PWM 1
2

74LVC32

CHGND2

TSSOP

U24
32

BRIGHT_PWM_UF

INVERTER EXPECTS ACTIVE HIGH SIGNAL

VIDEO CONNECTORS

33
SHARES LOGIC WITH KB RESET SIGNALS (PG 28)

NOTICE OF PROPRIETARY PROPERTY

R724

CHGND4

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

5%
1/16W
MF
402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

C744

0.01uF
1

SIZE

20%
50V
CERM
603

2N3904

L33

SM

Q44

FERR-1K-OHM-EMI

CHGND1

INVERTER INTERFACE

CRITICAL

CHGND4

2N7002

20K 2

5%
1/16W
MF
402 2

1
2
3
(LVDS DDC POWER) 4
5
NC
6
7
8
LVDS_L0N
9
LVDS_L0P
10
11
LVDS_L1N
12
LVDS_L1P
13
14
LVDS_L2N
15
LVDS_L2P
16
17
CLKLVDS_LN
18
CLKLVDS_LP
19
20
LVDS_U0N
21
LVDS_U0P
22
23
LVDS_U1N
24
LVDS_U1P
25
26
LVDS_U2N
27
LVDS_U2P
28
29
CLKLVDS_UN
30
CLKLVDS_UP

20%
50V
CERM
402

50V
CERM 2
402

G-501973
F-RT-SM

0.001uF
20%

HPD_BASE

R700
5%
1/16W
MF
402

Q41

R213
100K

2 402

100K

D
G

330

HPD_ON_RC

COMP_ENABLE

COMP_DISABLE

19 HPD_PWR_SNS_EN

R703

5%
1/16W
MF

100K
5%

NEED PULL-DOWN BECAUSE THIS


SIGNAL IS TRISTATED INITIALLY

SOT-363

TP0610
SM

1%
1/16W
MF
402 2

HPD_ON

Q41
2N7002DW

+PBUS

R686 R681
100K

0.001uF

4
S

V-

J6

C500

SM

Q8

50V
CERM 2
603

40 38 19

C484

2200pF

LCD_DIGON_L 5%

40 38 19

+3V_MAIN

FERR-10-OHM-500MA

40 38 19

LCD POWER SWITCHES

40

9
11

0.01UF
20%

C452 1

0.001uF
20%

40

C717 1

Place GND shorts at


graphics controller

40 38 19

MINIDIN

4
2

3.3UH

TV_C

CRITICAL

0603

50V
CERM 2
402

5%
1/16W
MF
402 2

40 38 19

560PF
10%

C714 1

XW13
SM

100K

CHGND4

+3V_LCD

LVDS_DDC_CLK
19 LVDS_DDC_DATA

50V
CERM 2
402

C724 1

560PF
10%

39

40 38 19

3.3UH

CHGND4

50V
CERM 2
402

R3421 R3201

50V
CERM 2
603

C718 1

C416 1

0.001uF
20%

SM

10K

0.01UF
20%

50V
CERM 2
402

19

LVDS INTERFACE

22

TV_GND1

560PF
10%

GPU_HPD

1%
1/16W
MF
402

1%
1/16W
MF
402 2

GPU_COMP

S 4

NO STUFF

0603

19

3 D

DVI_HPD_DIV

HPD_PWR_SW

LMC7211

CRITICAL

10K 2

DVI_HPD_UF1

5%
1/16W
MF
402 2

C707 1

50V
CERM 2
402

SOT-363

40 22

U46

34

40

L29

560PF
10%

5%
1/16W
MF
2 402

22

0603

50V
CERM 2
402

2
V+

R663

100K

LCD INTERFACE

C712 1

560PF
10%

Q35

100 2

CHGND1

SM

C702 1

HPD_4V_REF

19

R694

40 19

L25
3.3UH

GPU_DVI_DDC_DATA

402

100K pull-ups are for


no-panel case (development)
Panel has 2K pull-ups

39

GPU_Y

S 1

PLACE NEAR C5A & C5B

PLACE NEAR 3, 11 & 19

Place GND shorts at


graphics controller
L26
XW12
FERR-10-OHM-500MA
SM
1
2
GPU_TV_GND1
1
2

19

6 D
DVI_DDC_DATA

NOTE: DVI_HPD SHARES Q68 WITH ALS


BECAUSE OF BOARD REAL ESTATE

S-VIDEO/COMP OUT INTERFACE

SOT-363

R650

100K

Q38

2N7002DW

2 10V
CERM

1%
1/16W
MF
402 2

5%
1/16W
MF
2 402

0.1UF
20%

68.1K

10K

Q42

C696

R6801

R671

+3V_SLEEP

4 TMDS_CONN_DN<2>

19

402

L74

22

GPU_DVI_DDC_CLK

2 50V
CERM

CHGND5

330

5%
1/16W
MF
402 2

5%
1/16W
MF
402

C1

90-OHM-300MA
2012H
SYM_VER-1

TMDS_CONN_DN<1>

S 4

100pF
5%

20%
2 50V
CERM
603

CRITICAL

90-OHM-300MA
2012H
SYM_VER-1
40 38 20

1/16W
MF
402

C710

SOT-363

3 D
DVI_DDC_CLK

0
5%

2 50V
CERM
402

402

23 31
35

2N3904
5%
1/16W
SM
MF
2
402
Pulldown prevents
3904 from turning
on when DVI monitor
has active, selfpowered DDC clock
pullup.

R688

MF

NOTE: Pulldown for DVI_HPD provided by DVI power switch interface

R706

SM

100pF
5%

5%
1/16W
MF
2 402

5%
1/16W
MF
402

C669

0.01UF

32
35

SYM_VER-1

1
1

2N7002DW

R649
100

402

22 40

22 40

C706

5%
1/16W

Power key detect path


when system is running.
HPD normally driven to
3.3V. When power key +3V_SLEEP
on remote device pressed,
HPD will be driven to 5V.
COMPARATOR ENABLED BY NV17MAP
GPIO.

10K

5%
1/16W
MF
402

2 50V
CERM

(+5V_DDC SLEEP)
40 DVI_DDC_DATA_UF

Q38

R670
100

100pF
5%

TMDS_CONN_DN<4> 20
TMDS_CONN_DN<3> 20
TMDS_CONN_DP<4> 20
TMDS_CONN_DP<3> 20
40
22 DVI_DDC_CLK_UF

40
22

R662

5%
1/16W
MF

2 402

DVI_TRUN_ON_ILIM 1

+5V_DDC_SLEEP

40 39 22

4.7K

5%
1/16W
MF
402 2

TMDS_CONN_DN<2> 22
TMDS_CONN_DN<1> 22
TMDS_CONN_DP<2> 22
TMDS_CONN_DP<1> 22

TMDS_CLKP 1

R655

4.7K

R691
10K

SOFT_PWR_ON_L

DVI_TURN_ON_BASE

R690

+3V_SLEEP

DDC_CLK_ISO

R6611

TMDS FILTERING
PLACE CLOSE TO CONNECTOR
CRITICAL

DVI POWER SWITCH

680
2
DVI_TURN_ON

3V LEVEL SHIFTERS

D21
SM
MBR0530

1
9
2
10
3
11
4
12
5
13
6
14
7
15
8
16
C1
C5A
C2

20

74AHC1G32

ATI_HSYNC

17
TMDS_CONN_DP<0> 18
19
20
TMDS_CONN_DN<5>
21
TMDS_CONN_DP<5>
22
23
TMDS_CONN_CLKP
24
TMDS_CONN_CLKN
TMDS_CONN_DN<0>

22

CRITICAL
19

22 40

22

3.3PF
0.25%

+3V_MAIN

36
31

33

402

DVI_DDC_CLK_UF2

40 22

Isolation required for DVI power switch

QH1112
F-RT-TH

TP0610
SM

+5V_DDC_SLEEP

CRITICAL

C676

2 50V
CERM

SM-220MHZ

+5V_DDC_SLEEP_UF 1

J14

3.3PF
0.25%

CRITICALLCFILTER

39

400-OHM-EMI
SM-1

3 4
1

L23

F1

0.5AMP-13.2V

Q40

(55mA requirement per DVI spec)

C685
3.3PF
0.25%
402

SM-220MHZ

19

DVI DDC CURRENT LIMIT

22 40

2 50V
CERM

CRITICAL LCFILTER

Power key detect path when


system is shutdown or asleep..
DDC_CLK is isolated from
NV17M DURING SHUTDOWN. WHEN
power key on remote device
is pressed, 5V will be driven
into DDC_CLK. Since host rails
will be low, TP0610 will turn
on, driving SOFT_PWR_ON_L low.
As host rails rise, TP0610
will turn off, as will remote
device path into DDC_CLK.
Isolation will be disabled as well.

EXTERNAL VIDEO (DVI) INTERFACE

CRITICAL
LCFILTER

APPLE COMPUTER INC.

DRAWING NUMBER

SCALE

CHGND2

SHT
NONE

REV.

051-6694 B

22
1

OF

45

+3V_MAIN

MLB - ALS SENSOR

C673
0.1UF

KEYBOARD PULLUPS

20%

2 10V
CERM

402

CRITICAL

MLB_ALS_OP_COMP

R606
1K
1

MLB_PHOTODIODE

4
V+

U40

MLB_ALS_OP_IN

6 MAX4236EUTT

V-

1%
1/16W
MF
402

SOT23-6
1

R619
1K
1

MLB_ALS_OUT

SHDN_L

R605

PD1

5.1M

5%
1/16W
MF
2 402

TH

20%
2 16V
CERM
402

PART#

R615
15K

31 28 27 24 17

R550
47

23

ST7_ICP_SEL_PD

SOT-363

R568
0

353S0504

COMMENTS:

5%

OMIT

2 402

Y4

8.000M
1
2

C654
27PF

8X4.5MM-SM

ST7_XTAL_IN
1

C648
27PF
5%

5%
50V
CERM 2
402

U52

RP43
10K
5%
1/32W
25V

QTY

DESCRIPTION

2 50V
CERM

C637
0.1UF
20%

C1
C2
D1
E5
D6 NC
D5
C5
B6

LOAD CAPACITANCE = 16PF

402

REFERENCE DESIGNATOR(S)

CRITICAL

Y4

XTAL,CER,LOW PROF,8.000MHZ,8X4.5MM,SMD

CRITICAL

PA7/TDO
OMIT
PA6/SDAI
PA5/RDI
PA4/SCLI
PA3
PA2
PA1/ICCDATA
PA0/ICCCLK
PB7/SS*
PB6/SCK
PB5/MISO
PB4/MOSI
PB3/OCMP2_A
PB2/ICAP2_A
PB1/OCMP1_A
PB0/ICAP1_A

PC5/EXTCLK_A/AIN5
PC4/OCMP2_B/AIN4
PC3/ICAP2_B/AIN3
PC2/MCO/AIN2
PC1/OCMP1_B/AIN1
PC0/ICAP1_B/AINO

BOM OPTION
TABLE_5_ITEM

197S0091

E4
F5
F6
E6
C6
D4
A6
A5
A2
A1
B1
B2
C3
D2
E1
F1

31

R772
100

C663
0.1UF

R777
4.7K 2
SLEEP_LED_SW_L 1

ST7_SENSOR4_SCK_PD
INT_I2C_DATA0
ST7_SENSOR4_SDA_PD
INT_I2C_CLK0
PA3_PD
PA2_PD
ST7_SENSOR5_SCK
ST7_SENSOR5_SDA
SLEEP
ST7_PB6_PD
SUTRO_ALS_GAIN_SW
PB4_PD
PB3_PD
PB2_PD
ST7_KBD_LED_OUT
MLB_ALS_GAIN_SW

23

+3V_PMU

31
31

23
6 11 13 40

23

ST7_SLEEP_LED_H

Q74

31

RP42
10K
5%
1/32W
25V

3
SLEEP_LED_UF
40 31

40 31

L52

R776

23

SM-1

5%
1/16W
MF
2 402

23

31

400-OHM-EMI

10K

23

40 31

NOTE: KEEP L39 CLOSE TO C781


2

40 31
40 31

+3V_MAIN

25 40

3
D

R865
1

470K

5%
1/16W
MF
402

Q34
2N7002
SM

C929

4
3

23
23

RP52

23

10K

SUTRO_ALS_OUT 25 40
PMU_LID_CLOSED_L 23
PMU_SLEEP_LED
MLB_ALS_OUT
23
ST7_SLEEP_LED_H 23
PC0_PD
23

31

+3V_PMU

5%
1/16W
SM1

R598
100K

Q75

23

5%
1/16W
MF
2 402

23

PMU_SLEEP_LED_L

23

Q70

NO STUFF
2

23

L91 +3V_MAIN_CONN

J21
54550-1490
F-RT-SM

SM-1

+3V_MAIN

34 36

PMU_LID_CLOSED_L

40

1
2
3
4
5
6
7
8
9
10
11
12
13
14

LID_CLOSED_L

SM-1
14
14

USB_TPAD_N
USB_TPAD_P
39 23
39 23

R850
26

ADT7467_THERM

0
5%
1/16W
MF
402

35 31 22

SOFT_PWR_ON_L

40 26 24 14 13
40 26 24 14 13

L46
400-OHM-EMI
2

40 26

KBDLED_RETURN
KBDLED_ANODE

INT_I2C_CLK1
INT_I2C_DATA1
THERM_L_OC_CONN

PWR_BUTTON_L

C14

0.001UF

SM-1

10%
50V
CERM
402

1
2

C8141

0.001UF
10%
50V
CERM
402

C815

1
C816

0.001UF0.001UF

10%
50V
CERM
402

10%
50V
CERM
402

C914

R902

+3V_MAIN
R899
10K

23

23

5%
1/16W
MF
402

39 20

+3V_SLEEP

10K 1/16W
5% MF
402

VDD

ST7_KBD_LED_OUT
2

NC

R235 1/16W
5% MF
402
10K

10%
2 6.3V
CERM
603

16

PGND

5%
1/16W
SM1

RP52
10K

RP52
10K

5%
1/16W
SM1

5%
1/16W
SM1

RP53
10K

RP53
10K

5%
1/16W
SM1

1
ST7_SENSOR4_SCK_PD

ST7_PB6_PD

ST7_ICP_SEL_PD

RP53
10K

ST7_SENSOR4_SDA_PD

SW

AGND

NC

KBDLED_ANODE

23 39

KBDLED_RETURN

23 39

LMU/BOOTBANGER/SPIDEY

C80 R202
0.22uF
25.5
1% 1/8W

10%
2 50V
CERM
1210

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

MF-LF
805

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

0.001UF

10%
50V
CERM
402

SIZE

DRAWING NUMBER

SHT
NONE

REV.

051-6694

SCALE

5%
1/16W
SM1

PB3_PD

APPLE COMPUTER INC.

RP53
10K

3 CNTRLLLPVOUT 8
6 NC
FB 4
THRML_PAD 9

C79
1UF 5

5%
1/16W
SM1

5%
1/16W
SM1

U59
MM3120

1
23

PB4_PD

+5V_SLEEP_MM3120

NO STUFF

R222

5%
1/16W
SM1

23

1
2
3.8X3.8X1.5MM

+5V_SLEEP

PA3_PD

1
23

RP27
10K

RP27
10K

10K

5%
1/16W
MF

L11
22UH
39

23

1
ST7_SENSOR5_SCK

R900

10K

23

PA2_PD

5%
1/16W
SM1

5%
1/16W
MF
402

ST7_SENSOR5_SDA
1

402

15

L49

400-OHM-EMI

Keyboard LED Driver

CRITICAL

PB2_PD

NO STUFF

10K

5%
1/16W
MF
402

400-OHM-EMI
2

3V_5V_OK

31 23

+3V_MAIN

+3V_HALL_EFFECT

+5V_TPAD_FB

RP27
10K

31

23

SM-1

PC0_PD

5%
1/16W
SM1

R901

1L90

+5V_TPAD 2

TSOP

39

40 39

RP27
10K

2N7002DW
SOT-363

20%
2 10V
CERM
402

SM

LMU PULL-DOWNS

400-OHM-EMI

SI3443DV

20%
10V
CERM
402

10%
50V
CERM 2
603

23

5%
1/16W
MF
402

6
5
2
1

0.1UF

22

5
10

1
C828
470pF

23

R88

3V_5V_OK_L

3V_5V_OK_G

NC
KBD_OPTION_L
KBD_X<1>
KBD_X<0>

1
2
8
9
6
3
7
4

SLEEP_ANODE 26

23

USB Trackpad Connector

1/16W
402
5%
MF 1

KBD_FUNCTION_L
KBD_CONTROL_L
KBD_SHIFT_L
KBD_COMMAND_L

31 34 36 40

23

2
R866
100K

5
10

SM

40 31

23

3
7
4
6
1
2
9
8

KBD_X<6>
KBD_X<7>
KBD_X<8>
KBD_X<9>
KBD_X<2>
KBD_X<4>
KBD_X<3>
KBD_X<5>

SOT-363

40 31
31

2N3906
SM

Q75
2N7002DW

6 11 13 40

1 C636
C655
0.1UF 0.1UF

20%
2 10V
CERM
402

31

SLEEP_LED_I

5%
1/16W
MF
402

A4

5%
1/16W
MF
402

SLEEP_LED_L

F2
E2
F3 (PMU_PWM)
E3
F4
D3

VSS

+5V_MAIN

31

R7731

BGA

TABLE_5_HEAD

PART#

20%
2 10V
CERM
402

ST72264G2H1
256KX8

B5 TEST
A3 RESET*
ST7_RESET_L
C4 OSC1 XIN
ST7_OSC1
B3 OSC2 XOUT
ST7_OSC2

NC
2 10V
CERM NC
402
NC
NC
NC
NC
NC
NC

CRITICAL1/16W
MF

TABLE_ALT_ITEM

ALT FOR SUPPLY PROBLEM

U40

CRITICAL

5%
1/16W
MF
402 2

VDD

5%
1/16W
MF
2 402

TABLE_ALT_HEAD

REF DES

BOM OPTION

2.2K

B4

1
BOM OPTION

U52

ALTERNATE FOR
PART NUMBER

IC,LMU,P84

IO_RESET_L

Q35
2N7002DW

CRITICAL

+3V_MAIN

20%
6.3V
CERM
402

2
23 MLB_ALS_GAIN_SW

REFERENCE DESIGNATOR(S)

5%
1/16W
MF
402

TABLE_5_ITEM

341S1194

C675
0.22UF

1%
1/16W
MF
2 402

DESCRIPTION

5%
1/16W
MF
402

R618
1K

QTY

GAIN_SETTING2

353S0856

KBD_ID

+5V_MAIN

R617
120K

C670
0.01UF
1%
1/16W
MF
402 2

PART NUMBER

31

TABLE_5_HEAD

BS520

SLEEP LED

LMU

23

1%
1/16W
MF
402

CRITICAL
1

MLB_ALS_OUT_FB

+3V_PMU

R771
100K

23

OF

45

5%
1/16W
MF
402

+3V_PMU

R851

5%
1/16W
MF
402

24 PP3V3_MMM
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=15MIL

KIONIX_ACCEL

NO STUFF

C936
0.1UF

R847

20%
10V
CERM
402

5%
1/16W
MF
402

MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=15MIL

0.1UF

20%
10V
CERM 2
402

10K

5%
1/16W
MF
402 2

MMM

C919

5%
1/16W
MF
402 2

8 KIONIX_ACCEL

NC

VDD

NC
NC

U5

KXM52-2050
QFN

10 SELF

MMM_ACC_SELFTEST
MMM_ACC_PWRDOWN
NO STUFF

R8481

NC

10K

MMM_ACC_X_AXIS

OUTPUTY 13

MMM_ACC_Y_AXIS

24 40

5 PARITY

OUTPUTZ 14

MMM_ACC_Z_AXIS

24 40

RSVD
RSVD

DNC 1

NC
NC

24 40

9 PS

4
6
7
11

5%
1/16W
MF
4022

NC

OUTPUTX 2

TEST

NC
NC

R854

0.1UF
20%

R856

10K

2 10V
CERM

10K

5%
1/16W
MF
2 402

402

5%
1/16W
MF

2 402

U53

16F818
QFN RA0/AN0 23
OMIT RA1/AN1 24

2
4
6
11
14
18
22
25

RA2/AN2/VREF- 26
RA3/AN3/VREF+ 27
RA4/AN4/T0CKI 28
RA5/MCLR*/VPP 1
RA6/OSC2/CLKO 20
RA7/OSC1/CLKI 21

NC

MMM_ACC_X_AXIS

24 40

MMM_ACC_Y_AXIS

24 40

MMM_ACC_Z_AXIS

24 40

MMM_PIC_AN2_PD
NO_TEST=YES
MMM_PIC_AN3_PU
NO_TEST=YES
MMM_RESET_L

MMM

R860

24

MMM_PIC_SIRQ_L

MMM_ACC_SELFTEST 24

40

RB0/INT 7
RB1/SDI/SDA 8
RB2/SDO/CCP1 9
RB3/CCP1/PGM 10 TP_MMM_ICSP_PGM
RB4/SCK/SCL 12
RB5/SS* 13
RB6/T1OSO/T1CKI/PGC 15 TP_MMM_ICSP_PGC
RB7/T1OSI/PGD 16 TP_MMM_ICSP_PGD
THM
GND PAD

NC

R858

THRML
PAD

3 12 15

3
5

MMM_PIC_FFIRQ_L
INT_I2C_DATA1
MMM_ACC_DETECT

1
40
13 14
23 26

MMM

1 MMM

23
26

MMM_FFIRQ_L

14

MMM_ACC_PWRDOWN

10K
5%

C923
0.0047UF

OMIT

C921

0.0047UF
2

10%
25V
CERM
402

OMIT
1 C926

31 28 27 23 17

IO_RESET_L

PP3V3_MMM_PIC

PP3V3_MMM

MMM_ACC_X_AXIS

24 40

MMM_ACC_Y_AXIS

24 40

24

0.0047UF

10%
25V
CERM
402

10%
25V
CERM
402

MMM

NO STUFF

R861

R862
10K

10K
5%
1/16W
MF
2 402
24

24

1/16W
MF
402

OMIT

1/16W

MF
402

14

5%

R855 R883

5%
1/16W
MF
2 402

MMM_SIRQ_L

I2C Wr: 0xB0, Rd: 0xB1

R859
1

ST_ACCEL

10K

5%
1/16W
MF
402

24

INT_I2C_CLK1 40
13 14
MMM_PIC_AAC_PWRDOWN

5%
1/16W
MF
402

MMM

CRITICAL

RSVD
RSVD
GND

1KIONIX_ACCEL

1 MMM

VDD

R849 1
10K

24

MMM

C918

KIONIX_ACCEL

40 24

24 PP3V3_MMM_PIC

17
19

MMM

NO STUFF

R846
0

MMM

MMM

R845
1

29

+3V_MAIN

5%
1/16W
MF

2 402

MMM_RESET_L

24

TABLE_5_HEAD

ST_ACCEL

MMM_ACC_Z_AXIS

C937

0.1UF

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION

1
TABLE_5_ITEM

24 40

20%
10V
CERM
402

132S4733 3

CAP CER .0047UF,10%,25V,X7R,0402,SMD

C921,C923,C926

KIONIX_ACCEL

132S0072 3

CAP CER .0015UF,10%,25V,X7R,0402,SMD

C921,C923,C926

ST_ACCEL

MMM

C927

0.1UF
TABLE_5_ITEM

20%
10V
CERM
402

TABLE_5_ITEM

24

MMM_ACC_PWRDOWN

24

MMM_ACC_DETECT

ST_ACCEL

R8811

17
18
20
NC
22
NC
23
NC
26
NC27
NC28
NC
NC

10K

5%
1/16W
MF
402 2

FS:FULL SCALE SELECTION


0--->+/- 2G

VOUTY
15
VOUTZ

SELFTEST
PWRDWN
FS

CRITICAL
ST_ACCEL

U60

LIS3L02AQ
QFN

RSVD
NC

1--->+/- 6G

BATTERY CURRENT SENSE


+BATT

+BATT_ISNS

R852

MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL

0.0102

1%
1W
MF
2512

OMIT

XW14

SM

OMIT

XW16

SM

+BATT_ISNS_P
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL

45

THM
PAD

1 NC
2 NC
3 NC
9 NC
10NC
11NC
12NC
13NC
19NC
21NC
24NC
25NC
29NC
30NC
31NC
32NC
33NC
34NC
35NC
36NC
37NC
38NC
39NC
40NC
41NC
42NC
43NC
44NC

GND

MMM

BOM TABLE USED TO COMPENSATE DIFFERENT OUTPUT RESISTANCE

7
14
16

MMM_ACC_SELFTEST

U53

IC,UCTLR,MMM,PIC16F818,SMD,W/PROGRAM

40 24

VOUTX8

VDD5

341S1630 1

+PPBATT_ISNS_N 40
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL

U51

5
1

MMM, BATTERY CURRENT SENSE

VIN+ VIN-

+3V_SLEEP

C917
0.1UF

20%
10V

INA138

V+ SOT23-5OUT

OMIT

XW17
SM

BATT_ISNS_OUT

GND

2 BATT_ISNS_R

R857
1

49.9K
1%
1/16W
MF
402

R853

SYS_BATT_ISNS

1/16W
MF
402

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

C925

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

20%
4V
X5R
603

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

REV.

051-6694 B
24
45
SHT

NONE

NOTICE OF PROPRIETARY PROPERTY

10UF

150K
1%

CERM
2 402

31

OF

HARD DRIVE INTERFACE (UATA100)


PLACE TERMINATORS NEAR INTREPID

38 13

EIDE_DATA<8>

38 13

EIDE_DATA<10>

38 13

EIDE_DATA<9>

RP50
33 8
1
RP13
33

5%
1/16W
SM1

RP49
38 13

38 13

33

EIDE_DATA<11>

38 13

38 13

EIDE_DATA<14>

38 13

33

EIDE_DATA<15>

38 13

38 13

EIDE_DATA<1>

38 13

38 13

33

EIDE_DATA<3>

38 13

33

EIDE_DATA<7>

38 13

33

EIDE_DATA<5>

38 13

33

EIDE_ADDR<1>

38 13

EIDE_ADDR<0>
1

R36

EIDE_OPTICAL_DATA<2>

33

40 38 27 17 12

EIDE_OPTICAL_DATA<0>

33

40 38 27 17 12 9

EIDE_OPTICAL_DATA<6>

40 38 27 17 12 9
25 38 40
40 12 9
40 38 27 17 12 9

EIDE_OPTICAL_DATA<7>

33

EIDE_OPTICAL_DATA<4>

25 38 40

40 38 27 17 12 9

40 38 27 17 12 9
25 38 40
40 9
40 38 27 17 12 9

EIDE_OPTICAL_DATA<5>

33

5%
1/16W
SM1

40 12 9

EIDE_OPTICAL_CS0_L

PCI_CBE<2>
PCI_IRDY_L
AIRPORT_CLKRUN_L
PCI_CBE<1>
PCI_AD<14>
PCI_AD<12>
PCI_AD<10>
ROM_RW_L
PCI_AD<8>
PCI_AD<7>
PCI_AD<5>
ROM_ONBOARD_CS_L
PCI_AD<3>

25 38 40
40 38 27 17 12 9

PCI_AD<17>

25 38 40
40 38 27 17 12 9

PCI_AD<23>
PCI_AD<21>
PCI_AD<19>

25 38 40
40 38 27 17 12

EIDE_OPTICAL_DATA<3>

PCI_CBE<3>

25 38 40
40

PCI_AD<29>
PCI_AD<27>
PCI_AD<25>

25 38 40
40 38 27 17 12

EIDE_OPTICAL_DATA<1>

PCI_AD<31>

25 38 40
40 38 27 17 12 9

RP11
33
4

RP11
33

40 38 27 17 12

40 38 27 17 12 9

EIDE_OPTICAL_DATA<15>

PCI_AD<1>
ROM_CS_L

25 38 40

R7301

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_ADDR<2>

25 38 40

RP11

RP11
38 13

EIDE_OPTICAL_DATA<13>

40 38 27 17 12

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_CS0_L

25 38 40
40 38 27 17 12

33

40 38 27 17 12 9

RP49

RP49
38 13

EIDE_OPTICAL_DATA<14>

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_DATA<4>

25 38 40

RP13

RP49
38 13

EIDE_OPTICAL_DATA<12>

EIDE_OPTICAL_ADDR<1>
5

EIDE_OPTICAL_ADDR<2>

EIDE_OPTICAL_ADDR<0>

33

17 27 38 40

38 13

22

17 27 38 40

38 13

R81

38 13

10K

38 13

40

38 13

EIDE_OPTICAL_CS1_L

22

22

38 13

12 17 27 38 40

38 13

33

UIDE_DATA<8>

UIDE_DATA<9>

9 12 17 27 38 40

38 13

UIDE_DATA<10>

12 17 27 38 40
38 13

UIDE_DATA<14>

38 13

38 13

33

UIDE_ADDR<0>

UIDE_CS0_L

12 17 27 38 40

38 13

UIDE_ADDR<1>

12 17 27 38 40

38 13

38 13

UIDE_DATA<13>

UIDE_DATA<12>

38 13

UIDE_ADDR<2>

38 13

UIDE_CS1_L

33

82

5%
1/16W
MF
402

EIDE_OPTICAL_DMA_RQ 25

38 40

EIDE_OPTICAL_DMAACK_L

25 38 40

22

40 38 25
40 38 25

5%
1/16W
MF
402

EIDE_OPTICAL_RD_L

25 38 40

EIDE_OPTICAL_WR_L

25 38 40

82

40 38 25

EIDE_OPTICAL_IOCHRDY

40 38 25
40 38 25

EIDE_OPTICAL_INT

25 38 40

40 38 25

40 38 25

EIDE_OPTICAL_RST_L

EIDE_OPTICAL_DATA<8>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_DATA<11>
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_DATA<15>

25 38 40

R69
33

40 38 25
40 38 25

5%
1/16W
MF
402

40 38 25

40 38 25

R76
1

40 38 25

25 38 40

40 38 25

EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_RD_L
EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_CS1_L

5%
1/16W
MF
402

R4411
20K

5%
1/16W
MF
402 2

38 13

HD_DATA<4>

25 38

38 25

33

HD_DATA<6>

25 38

HD_DATA<8>

25 38

38 25
38 25

38 25

33

38 25

HD_DATA<9>

39

HD_DATA<10>

HD_DMARQ
HD_DIOR_L
HD_DMACK_L
HD_ADDR<1>
HD_ADDR<0>
HD_CS0_L

25 38

+HD_LOGIC_SLEEP

33

HD_DATA<14>

HD_ADDR<0>

25 38

HD_DATA<14>
HD_DATA<15>
HD_DIOW_L
HD_IOCHRDY

33

25 38

HD_CS0_L 25

M-ST-SM1

HD_ADDR<1>

33

5%
SM1

HD_DATA<15>

EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_DATA<4>

25 38

HD_DATA<13>

25 38

HD_DATA<12>

25 38

33

5%
1/16W
SM1

33

EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<2>
EIDE_OPTICAL_DATA<1>
EIDE_OPTICAL_DATA<0>

25 38 40

F-RT-SM

15
HD_CS1_L 25

38

1
2
3
4
5
6
7
8
9
10
11
12
13
14

40 38 14 BT_USB_DP

38 13

UIDE_RST_L

25 38 40
25 38 40

38 13

UIDE_DMACK_L

40

38 13

38 13

10K

33

UIDE_DIOR_L

22

HD_RESET_L

38 13

UIDE_IOCHRDY
1

C86

10PF

82

22

HD_DMACK_L

5%
1/16W
MF
402

5%
1/16W
MF
402

UIDE_DIOW_L

R71

R64

5%
1/16W
MF
2 402

25 38

25 38

HD_DIOR_L 25

38

INTERNAL I/O CONNECTORS

R68
1

22

HD_DIOW_L

5%
1/16W
MF
402

NOTICE OF PROPRIETARY PROPERTY

HD_IOCHRDY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
25 38

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

5%
1/16W
MF
402

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

5%

SIZE

DRAWING NUMBER

SHT
NONE

REV.

051-6694

SCALE

25 38

2 50V
CERM

16

15K

15K
5%
1/16W
MF
2 402

R613

R93

R458

NC

NEC_LEFT_USB_OVERCURRENT

R941

R35

5%
1/16W
MF
2 402

LEFT_USB_DP
LEFT_USB_DM

5%
1/16W
MF
402 2

5%
1/16W
MF
402

25 38 40

EIDE_OPTICAL_WR_L 25 38 40
EIDE_OPTICAL_IOCHRDY 25 38
EIDE_OPTICAL_INT 25 38 40
EIDE_OPTICAL_ADDR<1> 25 38 40
EIDE_OPTICAL_ADDR<0> 25 38 40
EIDE_OPTICAL_CS0_L 25 38 40

10K

40 38 27

R74

25 38 40

38

J3
+5V_MAIN
+3V_MAIN
54550-1490

25 38

40 38 27

5%
1/16W
MF
2 402

25 38 40

25 38

CRITICAL
HD_ADDR<2>

10K

10K

25 38

10K
5%
1/16W
MF
2 402

R75

R612

R63

25 38

BLUETOOTH/LEFT-SIDE USB

RP4
1

5%
1/16W
MF
402 2

25 38

R101

40 23 SUTRO_ALS_GAIN_SW

25 38 40

25 38

40 23 SUTRO_ALS_OUT

25 38 40

25 38

1/16W

40 27

25 38

ANY SEQUENCING REQUIREMENT BETWEEN


+5V_HD_SLEEP AND +3V_SLEEP?

25 38

RP5

25 38 40

25 38

HD_CS1_L 25

40 27 NEC_LEFT_USB_PWREN

EIDE_OPTICAL_RST_L

25 38

38

5%
1/16W
MF
2 402

1/16W
MF
2 402

25 38

HD_INTRQ 13 38
HD_ADDR<2> 25 38

5%
1/16W
MF
402 2

IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V

HD_DATA<12>
HD_DATA<13>

20K

APPLE COMPUTER INC.

HD_DATA<10>
HD_DATA<11>

R6031

402

HD_DATA<8>
HD_DATA<9>

25 38

10K

5%

J10

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26

38 25

+3V_SLEEP

R411

10K

CRITICAL

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
NC 22
23
24
25

25 38

PLACE PULLUP RESISTORS CLOSE TO INTREPID

R442

NC

HD_DATA<5>

HD_DATA<1>
HD_DATA<0>

5%
1/16W
MF
402

NO STUFF
1

5%
1/16W
MF
402 2

38 25

HD_DATA<3>
HD_DATA<2>

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26

40 38 14 BT_USB_DM

R452
100K

HD_DATA<5>
HD_DATA<4>

25 38
38 25

5%
SM1

5%
1/16W
SM1

82
38 13

33

33

HD_DATA<7>
HD_DATA<6>

25 38
38 25

HD_DATA<7>

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

1/16W

RP3
4

HD_DATA<0>

CRITICAL

J13
M-ST-SM1

RP5
2

5%
1/16W
SM1

UIDE_DATA<15>

38 25

5%
1/16W
SM1

RP5
33

33

5%
1/16W
MF

2 402

HD_RESET_L

RP4

5%
1/16W
SM1

12 17 27 38 40

38 25

SM1

RP4

PCI_AD<9> 9 12 17 27 38 40
PCI_CBE<0> 12 17 27 38 40
ROM_OE_L
9 12 40
PCI_AD<6> 9 12 17 27 38 40

25 38

5%
1/16W

5%
1/16W
SM1

12 17 27 38 40

HD_DATA<2>

RP4
4

RP3
33

38 25
38 25

5%
1/16W
SM1

5%
1/16W
SM1

12 17 27 38 40

25 38

RP3

RP3
2

HD_DATA<1>

5%
1/16W
SM1

5%
1/16W
SM1

UIDE_DATA<6>

38 25

25 38

RP2

5%
1/16W
SM1

25 38 40

R30

R81
1

82

5%
1/16W
MF
402

5%
1/16W
MF
402

38 13 EIDE_IOCHRDY

33

UIDE_DATA<4>

25 38 40

R116

5%
1/16W
MF
402

UIDE_DATA<5>

25 38

HD_DATA<3>

5%
1/16W
SM1

5%
1/16W
SM1

12 17 27 38 40

PCI_AD<4> 9
PCI_AD<2> 9
PCI_AD<0> 9

33

UIDE_DATA<7>

33

R601

5%
1/16W
MF
402 2

RP2
1

RP2

5%
1/16W
MF
402 2

12 17 27 38 40

PCI_AD<13> 9
PCI_AD<11> 9

5%
1/16W
SM1

UIDE_DATA<0>

HD_DATA<11>

5%
1/16W
SM1

RP9

5%
1/16W
MF
1 402

PCI_AD<15>

NO STUFF
2

R32

38 13 EIDE_RST_L

17 27 38 40

PCI_AD<22> 12 17 27 38 40
PCI_AD<20> 9 12 17 27 38 40
PCI_PAR
12 17 27 38 40
PCI_AD<18> 9 12 17 25 27 38
PCI_AD<16> 9 12 17 27 38 40
PCI_FRAME_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L

R745

UIDE_DATA<2>

RP9
33

RP9
1

+5V_SLEEP

5%
1/16W
MF
402

38 13 EIDE_RD_L

2
27 38 40

UIDE_DATA<1>

12 17 25 27 38 40
38 13

5%
1/16W
SM1

OPTICAL DRIVE INTERFACE (EIDE)

R95

38 13 EIDE_INT

PCI_AD<28> 9 12
PCI_AD<26> 9 12
PCI_AD<24> 9 12
AIRPORT_IDSEL

PCI_AD<18> 9

5%
1/16W
SM1

38 13 EIDE_DMARQ

38 13 EIDE_WR_L

AIRPORT_PCI_GNT_L 12 40
AIRPORT_PME_L_TP
AIRPORT_PCI_INT_L 14 40
PCI_AD<30> 9 12 17

40

38 13

12 37 40

33

5%
1/16W
SM1

RP5

R31

38 13 EIDE_DMACK_L

CLK33M_AIRPORT

33

UIDE_DATA<3>

25 38 40

5%
1/16W
MF
2 402

38 13 EIDE_CS1_L

38 13

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76 NC
78 NC
80

UIDE_DATA<11>

RP9

10K

5%
1/16W
MF
402 2

25 38 40

10K

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
NC 77
NC 79

MAIN_RESET_L
RF_DISABLE_L_SPN
AIRPORT_PCI_REQ_L

25 38 40

40 38 27 17 12 9

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_DATA<6>

40 38 27 17 12 9

RP50

RP10

33

40 12

40 38 27 17 12 9

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_DATA<0>

25 38 40

RP10

RP50
33

33

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_DATA<2>

40

RP50
3

RP10
38 13

EIDE_OPTICAL_DATA<9>

EIDE_OPTICAL_DATA<11>

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_DATA<13>

40 31 27 20 18 17 14

38 13

5V_HD_LOGIC

R6021

RP2

M-ST-SM
81

25 38 40

RP13

RP10
33

33

3V_HD_LOGIC

CPB-7280-1210

25 38 40

EIDE_OPTICAL_DATA<10>

5%
1/16W
SM1

5%
1/16W
SM1

EIDE_DATA<12>

EIDE_OPTICAL_DATA<8>

+5V_HD_SLEEP

PLACE SERIES R CLOSE TO INTERPID

+3V_SLEEP
CONNECTOR HAS CHANGED
J20

RP13

5%
1/16W
SM1

+3V_SLEEP

WIRELESS INTERFACE

EIDE SERIES TERMINATION

OF

25

45

+5V_MAIN

J12

SM

1 +5V_MAIN_AUDIO

M-ST-SM1

PLACE XW9 CLOSE TO 5V SWITCHER (U27)

AUDIO_LO_OPTICAL_PLUG_L

26

5%
1/16W
MF
402

R582
AUDIO_LI_OPTICAL_PLUG_L

26
26
26
26

FERR-220-OHM
1

0402

I2S0_SYNC_F 26
1

26

NO STUFF

C895
0.01UF

26
26

20%
L80
2 16V
CERM
FERR-220-OHM 402
40 37 14

SND_CLKOUT

26
26

I2S0_MCLK_F

NO STUFF
1 C899

0402

26
26
26

0.01UF

20%
2 16V
CERM
402

L81

FERR-220-OHM
40 14

1
INT_AUDIO_TO_SND

SM

AUDIO_LO_DET_L 14
AUDIO_LO_OPTICAL_PLUG_L 26
AUDIO_LI_DET_L 14
AUDIO_LI_OPTICAL_PLUG_L 26
AUDIO_SPKR_MUTE_F 26

INT_I2C_DATA2
INT_I2C_CLK2
SLEEP_ANODE

Q31

26

14

AUDIO_SPDIF_RESET_C1

0.01UF
20%

SND_SCLK 1

I2S0_BITCLK_F
1

FERR-220-OHM
1

2
1

0.01UF
20%

L48

FERR-220-OHM
1
2
MOD_BITCLK
0402

26

2 16V
CERM

CPU_M_DM

20%
10V
CERM
402

I2S1_BITCLK_F

26

NO STUFF

26

C82

0.01UF
26

402

SUPPLY_M_DM

C688

0.001UF

38

THERM2_DP 26

38

THERM2_DM 26

38

31 40

DEBUG POWER BUTTON

BOM OPTION

U3

ADT7460

1UF
20%

0.001UF

20%
2 50V
CERM
402

NO STUFF
1

C846

0.001UF

50V
CERM

+3V_SLEEP

10K

5%
1/16W
MF

5%

C905

0.001UF
20%

5%
1/16W
MF

2 402

5%
1/16W
MF

2 402

39 31

+3V_PMU_AVCC

FAN1_TACH

100K

5%
1/16W
MF
2 402

5%
1/16W
MF
2 402

26

R812

100K

100K

26

R811

R813

FAN1_PWM_L

5%
1/16W
MF

2 402

THERM_L_OC

FAN2_PWM_L 26
FAN2_TACH

26 23

ADT7467_THERM

Q87
2N7002DW

NO STUFF

PMU_NMI_BUTTON_L 1

LEFT FAN (CPU)

C681

0.001UF
20%

SUPPLY_M_DM

20%

26

38

NO STUFF
1

C678

0.001UF

20%
2 50V
CERM
402

38 26

THERM1_A_DM

R726

38 26

THERM1_A_DM

38 26

NO STUFF

C651

0.001UF

20%
2 50V
CERM
402

THERM2_A_DM

2N3904

SM

38 26

THERM2_A_DM

1
THERM1_DM 26

R878
0 2
5%
1/16W
MF
402

38

26

THERM2_DP 26

5%
1/16W
MF
402 2
+FAN1_PWR
26 FAN1_TACH
FAN1_PWM

ADT7467

38

NO STUFF

R717

Q62

THERM1_DP 26

FAN1_PWM_L

ADT7460
D
Q78
2N7002DW
G

R908
0

10K

5%
1/16W
MF
402 2

R710

NO STUFF

NO STUFF

THERM2_A_DP

3
1

5%
1/16W
MF
402

ALTERNATE2

STUFF
0

R910

10K

5%
1/16W
MF
402

NO STUFF

THERM2_A_DP
26

2N3904
SM

THERM1_A_DP

PLACE CLOSE TO BATTERY CHARGER/VCORE

NO STUFF

Q47

38 26

CPU_M_DM

3
1

SM

38 26

PLACE UNDERNEATH UPPER RAM


ALTERNATE1
38

+5V_SLEEP

NO STUFF
1

R6791

38

R723

2N3904

402

THERM1_DM 26

5%
1/16W
MF NO
402

Q39

50V
2 CERM

SM

26 THERM1_A_DP

C668

402

CPU_THERM_DM 1

0.001UF

2N3904

402

26

Q66

2 50V
CERM

CPU_M_DP

+5V_SLEEP

38

SOT-363

5%
MF
603

1/16W

CRITICAL

J4

4.7UF
20%
10V
CERM
1206

TO CONNECTOR

R911

R6231

10K

10K

5%
1/16W

5%
1/16W
MF
402

ADT7467

R879

MF
402

26

5%
1/16W
MF
402

26

5%
1/16W
MF
402

ADT7460
Q78
2N7002DW
SOT-363

SM-2MT

FAN/MODEM/SOUND/SLEEP LED/DEBUG

1
2
3
4

1 C135
4.7UF

20%
10V
CERM
1206
PLACE CLOSE

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

TO CONNECTOR

SIZE

THERM2_DM 26

APPLE COMPUTER INC.

38

DRAWING NUMBER

SHT
NONE

REV.

051-6694

SCALE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

5%
1/16W
MF
402

CRITICAL

5%
1/16W
MF
603

+FAN2_PWR
FAN2_TACH
FAN2_PWM

PLACE CLOSE

38

1
2
PMU_RESET_BUTTON_L
5%
1/16W
MF
603

R909
J2
0

3
D

FAN2_PWM_L

31

+5V_SLEEP
NO STUFF
1

SM-2MT
5
1
2
3
4

1 C134
2

+5V_SLEEP

26

THERM1_DP 26

R553

RIGHT FAN (GPU)

SUPPLY_M_DP MAIN1

5%
1/16W
MF
603
NO STUFF

26

402

20%
50V
CERM
402

5%
NO STUFF
1/16W
R620 MF

TO CPU

C903

0.1UF
20%
2 10V
CERM

SOT-363

SOT-363

R537

NO STUFF

MAIN2

23 26

31

R628
PLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY

2N7002DW

THERM_INV

KEEP STUFFING RESISTORS CLOSE TO ADT7467 CONTROLLER

PLACE CLOSE
PLACE CAPS AS CLOSE TO THERMISTORS AS POSSIBLE

Q87

ADT7460_TACH3_TP

ADT7467_THERM

31

26

ADT7467_ADR_EN_L

TACH3
TACH4/ 9
THERM#/
SMBALERT#/GPIO
GND

50V
CERM
402

5%
1/16W
MF

2 402

+3V_MAIN

10K

MF
2 402

ADT7467

PWM1/ 15
XTO
VCCP
6
SDA
ADT7467 TACH1
PWM2/ 5
SCL
SMBALERT#
7
TACH2
D1+
CRITICAL
D1PWM3 8
D2+
D2-

R695
10K

1/16W

U3
QSOP

16
1

2 402

THERM ISOLATION

ADT7460
1
1
R295

DEBUG JUMPERS

CPU_THERM_DP

5%
1/16W
MF
603

5%
1/16W
MF
402

PWR_BUTTON_L 1

FAN CONTROLLER

C904

VCC

NO STUFF
1

402

14 38 40

14

INT_I2C_DATA1
13 INT_I2C_CLK1

C690

20%

14 40

14 38 40

5%
1/16W
MF
402

R716

20%

2 16V
CERM

38

R713

SUPPLY_M_DP

ADT7467_VCC

R42

11
10

1
THERM1_DM 26

MODEM_USB_DM
MODEM_USB_DP

COMM_RING_DET_L 14

IC,ADT7460,FAN,CTLR,16P,QSOP

THERM2_DP
CONTROLLER
38 26 THERM2_DM

NO STUFF

5%
1/16W
MF
402

402

THERM1_DP 26

COMM_RXD

TABLE_5_ITEM

0.1UF

ADT7467_VCORE_MON 14

NO STUFF

COMM_GPIO_L

INT_MOD_DTI 14 26 40
MOD_BITCLK 14 26 40

REFERENCE DESIGNATOR(S)

R692 R293
10K
10K

13
12

5%
1/16W
MF
402

R725

C81

CPU_M_DP

DESCRIPTION

ADT7460
1
1

THERM1_DP
26 THERM1_DM

R719
26

NO STUFF

0402

1
40 24 23 14

38

I2S1_SYNC_F 26

40 14

14 26 40

100K

40 24 23 14 13

20%
16V
CERM
402

KEEP STUFFING RESISTORS CLOSE TO ADT7467

MOD_SYNC

14 40

R873

26
5

26

20%
2 16V
CERM
402

L84

SND_HP_MUTE_L

38 26

C901
0.01UF

INT_I2C_DATA2

2 10V
CERM
2

FAN INTERFACE

NO STUFF

0402

INT_I2C_CLK2

5%
MF
402
1/16W

C88

402

COMM_SHUTDOWN

C7111

20%
16V
CERM
402

0.01UF

2 16V
CERM

40 14
40 26 14
40 26 14

603

26

I2S1_RESET_L_F

CAPS FOR EMI EXPERIMENTATION ONLY

COMM_RESET_L

QTY

353S0608

NO STUFF
1

PART#

5%
1/16W
MF
402

C87

0402

26

10

SND_HP_MUTE

NO STUFF

MOD_CLKOUT

2
4
6
8
10
12
14
16

14 40

COMM_RTS_L

R814
G

Q31

0.01UF

FERR-220-OHM

40 14

40 14

1
3
5
7
9
11
13
15

COMM_DTR_L

R527

2N7002DW
SOT-363

I2S1_DEV_TO_SB_DTI_F

L86

13 31

MOD_DTO

10
9
8
7
6

TABLE_5_HEAD

0402

INT_PU_RESET_L

40 14

40 23

AMP_CONTROL
26

C898
0.01UF

I2S0_RESET_L_F
NO STUFF
1 C900

L79

1
2

COMM_TRXC

1
2
3
4
5

F-ST-SM1

+3V_MAIN

FERR-220-OHM

20%
2 16V
CERM
402

FERR-220-OHM

COMM_TXD_L

40 14

5%
1/16W
MF
2 402

J8

40 14

AUDIO_LO_MUTE_L

SOT-363

INT_MOD_DTI

M-ST-5087
SM

805

100K

14 26 40

L85

40 26 14

20%

R689

MF
402

This is an internal board short

26

J16

10UF

2 6.3V
CERM

402

5%

2N7002DW

20%

C469

NO STUFF

10K

C897

NO STUFF

0402

26
40

(SLEEP_LED_GND)

SND_AGND

39

20%
2 16V
CERM
402

Q26

R872

VER 1

402

1
SND_HW_RESET_L

SND_AMP_MUTE

0.1UF

QT510166-L010

5%
1/16W
MF
402

+3V_MAIN

26

2 10V
CERM

C478

CRITICAL

1/16W

23

5%
1/16W
MF

2 402

2N7002DW
SOT-363

14 26 40

14

I2S0_RESET_L_F 26
I2S1_RESET_L_F 26

R405
10K

20%
2 10V
CERM
402

R875
AMP_CONTROL 2 100K
26

XW11
SM

AUDIO_SPKR_MUTE_F

L78

SND_AMP_MUTE_L

2N7002

516S0154

I2S0_SB_TO_DEV_DTO_F

FERR-220-OHM

40 26 14

Q33

0.01UF

0402

MOD_SYNC

44

26

2 16V
CERM

SND_AMP_MUTE_INV1

40 26 14

43

1/16W
5%
402
MF

This is an internal board short


NO STUFF

NO STUFF

FERR-220-OHM

I2S1_BITCLK_F
I2S1_SYNC_F
I2S1_DEV_TO_SB_DTI_F

C896

L76

40 37 14

I2S0_MCLK_F
I2S0_BITCLK_F
I2S0_SYNC_F
I2S0_SB_TO_DEV_DTO_F
I2S0_DEV_TO_SB_DTI_F

20%

0402

40 14

AUDIO_EXT_MCLK_SEL
AUDIO_LO_MUTE_L

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

0.01UF

FERR-220-OHM

26

SPDIF_GPO0

+3V_SLEEP_AUDIO

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

R915

SERIAL_DEBUG
CRITICAL

NO STUFF
1

0.1UF

10UF

I2S0_DEV_TO_SB_DTI_F

L82

40 14 SND_TO_AUDIO

26

NO STUFF

0402

5%
1/16W
MF
402

L77

SND_SYNC

26

5%
1/16W
MF
402

40 14

R917
0

+3V_SLEEP_AUDIO 2

NO STUFF
1 C513

C767

20%
2 6.3V
CERM
805

26

+5V_MAIN_AUDIO_0
NO STUFF

Q26

2N7002DW

SND_AMP_MUTE_INV SOT-363

SM

42

0
AUDIO_LI_SPDIF_PLUG_L
1

41

R918

DEBUG INTERFACE

+5V_MAIN

+3V_MAIN

+5V_MAIN

R552
0 2
AUDIO_LO_SPDIF_PLUG_L
1

XW10+3V_SLEEP

QT500406-L111

R874
100K

SND_AMP_MUTE

40 26

XW9
2

5%
1/16W
MF
402

14

5%
402
MF

CRITICAL

This is an internal board short

14

R224
10K
1/16W

5%
1/16W
MF
402

+5V_MAIN
AUDIO_EXT_MCLK_SEL 26

SERIAL
MODEM
SUPPORTS BOTH THE LAST DASH AND Q52 SOFT MODEM

5%
1/16W
MF
402

NO STUFF

Place shorts at 3.3V and 5V regulators

R581
0 2

AUDIO_MCLK_SEL 1

+5V_MAIN

SND - INTREPID

AUDIO - CRYSTAL

Sound Board Connector

402

14

SOUND BOARD (SOUSAPHONE)


26

SPDIF_GPO0

5%
1/16W
MF

R534
0 2

SOUND_SPDIF_GPO0

14

26

OF

B
45

8
NEC_USB

C841

NEC_USB
1

0.1uF
20%

2 10V
CERM

402

C840
0.1uF
20%

2 10V
CERM

402

NEC_USB

C842
0.1uF

20%
2 10V
CERM
402

C837
20%

20%

0.1uF
20%

2 10V
CERM

C834
20%

20%
6.3V
CERM
805

20%
2 10V
CERM
402

10uF

C838
20%

0.1uF

PART#

NEC_AVDD

NEC_USB NEC_USB NEC_USB


1

20%
2 10V
CERM

R796

5%
1/16W
MF
2 603

20%
2 10V
CERM
402

C844

C667

20%

20%
6.3V
CERM
805

0.1uF

2 10V
CERM

402

0.1uF

C839
0.1uF

NEC_USB

C833

QTY

DESCRIPTION

402

197S0087

10uF

R783

RP52

10K

5%
1/16W
MF

10K

C
3
27

NEC_PCI_SERR_L

27

NEC_PCI_PERR_L

5%
1/16W
SM1

2 402

40 38 25 17 12 9

40 38 25 17 12
40 38 25 17 12

PCI_AD<28>
9 PCI_AD<29>
9 PCI_AD<30>
9 PCI_AD<31>

C649

27

27PF

N10
N12

P2
P3
P12
A13
A12
A3
E2
N8
L13
J13
H13
F13
D13
G12
H4
D7

AVDD

VDD

VDD_PCI

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C657

402

2 402

NEC_USB

NEC_XT1
37 NEC_XT2
37

Low/Full/High Speed (External)


RSDM1 M14

NEC_USB NEC_USB

27PF
5%
2 50V
CERM

5%

2 50V
CERM
XT1/SCLK L9
XT2 P8

27

U39

NEC_UPD720101_USB2
FBGA

Low/Full/High Speed (External)

RSDM3
DM3
DP3
RSDP3

H11 RSDM3_TP
G11
G13
G14RSDP3_TP

RSDM4
DM4
DP4
RSDP4

F12 RSDM4_TP
F14
E12
E14 RSDP4_TP

RSDM5
DM5
DP5
RSDP5

E13RSDM5_TP
D14
C13
C14 RSDP5_TP

22

40 38 25 17

5%
1/16W
MF
402 2

40 38 25 17

PCI_PAR
PCI_FRAME_L
12 PCI_IRDY_L
12 PCI_TRDY_L
12 PCI_STOP_L
NEC_IDSEL
12 PCI_DEVSEL_L
12 USB2_PCI_REQ_L
12 USB2_PCI_GNT_L
27 NEC_PCI_PERR_L
27 NEC_PCI_SERR_L
27 NEC_PCI_INTA_L
27 NEC_PCI_INTB_L
27 NEC_PCI_INTC_L
12 CLK33M_USB2

J4
F3
F4
G1
G3
B3
G2
C6
D6
H2
H1
C7
B7
A7
A8

PAR
FRAME
IRDY
TRDY
STOP
IDSEL
DEVSEL
REQ
GNT
PERR
SERR OD
INTA OD
INTB OD
INTC OD
PCLK

NEC_IO_RESET_L
NEC_CRUN_L
27 NEC_PME_L
27 NEC_MAIN_RESET_L
NEC_SMI_L_TP

B8
N6
D9
C9
L6

VBBRST
CRUN
PME OD
VCCRST
SMI OD

40 38 25 17 12
40 38 25 17 12
40 38 25 17
40 38 25 17
40 38 25 17

40 38 25 17

NEC_USB

RP55
47

5%

1
IO_RESET_L
2
14 PMU_PME_L
3
14 MAIN_RESET_L
40
4

31 28 24 23 17
31
31 25 20 18 17

8
7
6
5

NEC_IO_RESET_L 27
NEC_PME_L
27
NEC_MAIN_RESET_L 27

1/16W

37

CBE0
CBE1
CBE2
CBE3

LEFT PORT
OCI1 B12
RIGHT PORT OCI2 B11
OCI3 B10
OCI4 A10
OCI5 B9

OUTPPON1
OUTPPON2
OUTPPON3
OUTPPON4
OUTPPON5

NEC_USB

R5511
to

Series Rpaks required


4.7K
facilitate NAND-tree testing
5%
1/16W

MF

C11
C10
A9

L7

47

14

USB2_PCI_INT_L

1
2
3
4

5%

8
7
6
5

IPDNTEST1
IPD

NEC_USB_DAP
1

27 38

27 38

2
NEC_USB

R791
2

NEC_USB_DBM

27 38

NEC_USB_DBP

27 38

1% 36402
NEC_USB

R790
1

1%

402

36

+3V_MAIN

NEC_USB

R794

9.09K2

NEC_RREF

INTREPID_USBINTREPID_USB5 NEC_USB6 NEC_USB NEC_USB

NEC_AVSS_F 27

NEC_OCI<1>
NEC_OCI<2>
NEC_OCI<3>
NEC_OCI<4>
NEC_OCI<5>

R56

R531

10K

10K

5%
1/16W
MF
2 402

5%
1/16W
MF
2 402

RP45 RP45 2R586


10K

5%
1/16W
SM1

10K

5%
1/16W
SM1

10K

5%
1/16W
MF

1 402

27
27

NEC_USB

NEC_USB
1

R789
1.5K

5%
1/16W
MF
2 402

NEC_PPON3_TP
NEC_PPON4_TP
NEC_PPON5_TP

R793
1.5K

5%
1/16W
MF

2 402

NEED PULL-UP RESISTORS IN CASE USB 1.0 IS USED FOR PORT POWER

NEC_USB_DAM

SMC_TP

27 14

LEFT_USB_DM 25

IPD
IPD

TEB N7
AMC P7

IPD

TEST L8

TEB_TP 40
NEC_AMC_TP

R96
1

USB_D1M

TEST_TP

AVSS

40

MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL

25 38 40

R78
0

SUTRO CONNECTOR

5%
1/16W
MF
402

R545
NEC_USB_DBM

RIGHT_USB_DM

USB 2.0

33 38 40

5%
1/16W
MF
402

R286

SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING

LEFT_USB_DP
INTREPID_USB
1

NEC_USB

NEC_AVSS_F

PLACE NEAR J3

1/16W
MF
402

NEC_USB

38 27

USB_D1P

NEC_NANDTESTEN_TP
SRCLK_TP 40
NEC_NANDTESTOUT_TP
SRMOD_TP 40

5%
1/16W
MF
603

INTREPID USB CONSTRAINTS


5
5
5
5
5
5
5
5

5%
1/16W
MF
402
27 14

M10
M9
N9
P9

NEC_USB_DAP

5%

R83
38 27

38 40

INTREPID_USB

5%
1/16W
MF
402

M8 NTEST1_TP

SMC M7

NANDTEST
SRCLK
SRDTA
IPDSRMOD

USB_DA
USB_DA
USB_DC
USB_DC
USB_D1
USB_D1
USB_D2
USB_D2

402

1% 36402

NEC_USB

27

20%

NEC_NC1_TP
NEC_NC2_TP

USB_DAM
USB_DAP
USB_DCM
USB_DCP
USB_D1M
USB_D1P
USB_D2M
USB_D2P

0.1uF

R84

B1
N1
P10
N14
H14
B14
A2
B2
N2
N13
B13
M11
L12
H12
D12
G4
J11
F11
D8

SM1

C665

2 10V
CERM

R792

38 27

VSS

1/16W

402

LEGC

NEC_PCI_INTA_L 27
NEC_PCI_INTB_L 27
NEC_PCI_INTC_L 27
NEC_LEGC

33 40

NEC_USB

N11 AVSS(R)
P13
M12

RP54

NEC_RIGHT_USB_OVERCURRENT

36

C1240 25 NEC_LEFT_USB_PWREN
A11
40 33 NEC_RIGHT_USB_PWREN

NC1 P6
NC2 M6

NEC_USB

402 2

NEC_USB_DAM

NEC_USB

SM1
27

1%

1%
1/16W
MF
402

M2
J3
F1
C3

40 38 25 17 12

20%
2 10V
CERM
402

15K

5%
1/16W
MF
402
NEC_USB

0.1uF

NEC_USB

RREF P11

C661

R600

NEC_USB

5%
1/16W
MF

40

NEC_USB
1

100

38

K14 38 NEC_USB_RSDM2
K12 (NEC_USB_DBM)
J14 (NEC_USB_DBP)
J12 38 NEC_USB_RSDP2

NEC_LEFT_USB_OVERCURRENT 25

NEC_OCI<2>

R795

RSDM2
DM2
DP2
RSDP2

5%
1/16W
SM1

R590

NEC_USB_RSDM1
DM1 M13 (NEC_USB_DAM)
DP1 L14 (NEC_USB_DAP)
RSDP1 K13 38 NEC_USB_RSDP1

CRITICAL
NEC_USB

15K

NEC_OCI<1>

NEC_XT2_R
1

NEC_USB
5%
MF
402

402

PCI_CBE<0>
PCI_CBE<1>
12 PCI_CBE<2>
12 PCI_CBE<3>

40 38 25 17 12

R7841

10K

10K
5%
1/16W
SM1

R591

Tie to GND at ball N11


NEC_USB

NEC_USB

1/16W

8X4.5MM-SM

M5
P5
N5
P4
N4
M3
N3
M1
L2
L1
K2
L3
K1
K3
J2
J1
F2
E3
E1
D3
D1
D2
C2
C1
B4
A4
B5
C4
A5
C5
B6
A6

40 38 25 17 12 9
40 38 25 17 12

CRITICAL

OMIT

+3V_NEC_VDD

(PCI_AD<27>)

PCI_AD<27>

Y5

CRITICAL
30.0000M

H3
M4
C8
NEC_USB

RP45

BOM OPTION

Y5

40 38 25 17 12 9 PCI_AD<0>
40 38 25 17 12 9 PCI_AD<1>
40 38 25 17 12 9 PCI_AD<2>
40 38 25 17 12 9 PCI_AD<3>
40 38 25 17 12 9 PCI_AD<4>
40 38 25 17 12 9 PCI_AD<5>
40 38 25 17 12 9 PCI_AD<6>
40 38 25 17 12 9 PCI_AD<7>
40 38 25 17 12 9 PCI_AD<8>
40 38 25 17 12 9 PCI_AD<9>
40 38 25 17 12 9 PCI_AD<10>
40 38 25 17 12 9 PCI_AD<11>
40 38 25 17 12 9 PCI_AD<12>
40 38 25 17 12 9 PCI_AD<13>
40 38 25 17 12 9 PCI_AD<14>
40 38 25 17 12 9 PCI_AD<15>
40 38 25 17 12 9 PCI_AD<16>
40 38 25 17 12 9 PCI_AD<17>
40 38 25 17 12 9 PCI_AD<18>
40 38 25 17 12 9 PCI_AD<19>
40 38 25 17 12 9 PCI_AD<20>
40 38 25 17 12 PCI_AD<21>
40 38 25 17 12 PCI_AD<22>
40 38 25 17 12 PCI_AD<23>
40 38 25 17 12 9 PCI_AD<24>
40 38 25 17 12 9 PCI_AD<25>
40 38 25 17 12 9 PCI_AD<26>

+3V_MAIN

CRITICAL

Y7 LOAD CAPACITANCE IS 16PF

SERR_L AND PERR_L


HAS DEDICATED PULL-UP
FOR BOTH CBUS AND USB2

REFERENCE DESIGNATOR(S)

XTAL,CER,LW PROF,30.0000MHZ,8X4.5MM,SMD

39
27

8 NEC_USB

RP45
TABLE_5_ITEM

NEC_USB

39

7 NEC_USB

TABLE_5_HEAD

SM

402

C830

0.1uF

NEC_USB
1

2 10V
CERM

402

C845

FERR-EMI-100-OHM

NEC_USB

0.1uF

NEC_USB

+3V_MAINNEC_USB
L54

402

2 10V
CERM

402

27 39

20%

C836
0.1uF

NEC_USB
1

+3V_MAIN

2 10V
CERM

402

C829

NEC_USB
1

0.1uF

NEC_USB
1

C843

2 10V
CERM

402

+3V_NEC_VDD

NEC_USB
1

0.1uF

2 10V
CERM

NEC_USB
1

PLACE NEAR J12

NEC_USB

38 27

NEC_USB_DBP

RIGHT_USB_DP

5%
1/16W
MF
402

14
14
14

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

33 38 40

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

BUBBA CONNECTOR

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

14

SIZE

14 27
14 27

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

B
45

051-6694

SCALE

NOTICE OF PROPRIETARY PROPERTY

R540

27
1

OF

5
+3V_MAIN

+3V_MAIN
PART NUMBER

ALTERNATE FOR
PART NUMBER

R633

BOM OPTION

REF DES

338S0223 338S0079

5%
1/16W
MF
2 402

U49

LTC3405_SW 39

10uF
20%

6.3V
CERM 2
805

R333

COMMENTS:

88EE1111 B1

CRITICAL

VIN

U14

3405_MODE

JTAG_ASIC_TDI

L5

LTC3405
SOT23-6

RUN CRITICAL SW

MODE

VFB

R319

SM1

R334 C471 1
665K

5%
1/16W
MF
402 2

CLKENET_LINK_RX

37 13

5%
1/16W
MF
402

1
CLKENET_LINK_GBE_REF

37

CLKENET_PHY_TX

37

CLKENET_PHY_RX

5%
1/16W
MF
402

R344
0 2

37

38

38
38
38
38

38

TX_CLK

RX_CLK

22

125CLK

11
12
14
16
17
18
19
20
9
7

ENET_PHY_TX_EN
13 ENET_PHY_TX_ER

38 13
38

37 13

CLKENET_PHY_GTX

ENET_LINK_RXD<0> 95
ENET_LINK_RXD<1> 92
93
13 ENET_LINK_RXD<2>
91
13 ENET_LINK_RXD<3>
90
13 ENET_LINK_RXD<4>
89
13 ENET_LINK_RXD<5>
87
ENET_LINK_RXD<6>
13
86
13 ENET_LINK_RXD<7>

38 13

38 13
38
38
38
38
39 28

+2_5V_MARVELL

38
38

38 13
38 13

R371

R3451

R3541

5%
MF
402 2

5%
1/16W
MF
402 2

10K

10K
5%
1/16W
MF
402 2

38 13

1.5K

1/16W

38 13

38 13

R343

14

INT_ENET_RST_L1

1K

38 13

CTRL10

D1

14

27

C755 1
2.2uF

Q15

SOT-363

28

ENET_COMA

20%
10V
CERM 2
805

2N7002DW

AC_IN

2N7002DW

SLEEP_L_LS5

SOT-363

PLACES PHY IN "COMA" MODE WHEN


ASLEEP ON BATTERY (SAVES POWER)
37
37

NO STUFF

20K

Y3

25.0000M
1

33pF

5%
50V
CERM 2
402

37
38

55
54

CLK25M_ENET_XIN
CLK25M_ENET_XOUT

53

ENET_VSSC

PUT CRYSTAL CIRCUIT CLOSE TO PHY 5%


1/16W
MF
402
OMIT
CRITICAL
2

BCC

VDDO

TX_EN
TX_ER

RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7

CRS
COL
MDC
MDIO

RESET
COMA

C492
0.1UF

20%
2 10V
CERM
402

C511

R427
0

5%
1/16W
MF
2 402

NO STUFF

R3931

CLK25M_XTAL_IN

49.9

1%
1/16W
MF
402 2

NO STUFF

R4031
49.9

1%
1/16W
MF
402 2

10uF
20%

2 6.3V
CERM
805

0.01UF

20%
2 16V
CERM
402

C517

0.1UF

C502

0.01UF

20%
2 10V
CERM

C465

C475

0.1UF

20%
2 16V
CERM
402

402

+2_5V_MAIN

0.01UF

20%
2 10V
CERM
402

20%

PLACE CLOSE TO
ETHERNET CONNECTOR
NO STUFF

2 16V
CERM

R438

402

PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85

VDDOX

26
48

AVDD

32
35
36
40
45
78

LED_LINK10
LED_LINK100
LED_LINK1000
LED_DUPLEX
LED_RX
LED_TX
CONFIG0
CONFIG1
CONFIG2
CONFIG3
CONFIG4
CONFIG5
CONFIG6
TDI
TDO
TCK
TMS
TRST

HSDAC+
HSDAC-

RSET

XTAL1
XTAL2

SEL_OSC
SEL_2.5V

VSSC

5
21
88
96

R465
0

C464

0.1UF
20%

2 10V
CERM

402

C472

0.01UF
20%

2 16V
CERM

C453

0.1UF

0.01UF

20%

402

C466

0.1UF

C506

0.1UF

20%
2 10V
CERM
402

C520
0.1UF
20%

20%
2 10V
CERM
402

2 10V
CERM

402

PLACE CAPS AT TRANSFORMER PINS 1, 4, 7 & 10

C497
0.1UF
20%

2 10V
CERM

402

C504

0.01UF
20%

16V
2 CERM

C487

0.1UF

0.01UF

20%

CRITICAL
J17
RJ45
RT-TH

12

2 6.3V
CERM

38

38
38
38
38
38
38

402

805

R3461

R3721

R4041

R4131

1%
1/16W
MF
402 2

1%
1/16W
MF
402 2

1%
1/16W
MF
402 2

1%
1/16W
MF
402 2

49.9

LED_RX_SPN

49.9

49.9

18

RJ45_C1_PD

8
6

38 17
38 19

RJ45_DN<1>
RJ45_DP<2>

21

RJ45_C2_PD

20
38 22

RJ45_DN<2>
RJ45_DP<3>

40

40
40

SEE CONFIG TABLES


(BELOW)
1

C454

1%
1/16W
MF

0.01UF
16V

CERM
402

40

10
12

C477

20%
16V
CERM
402

CRITICAL

20%
16V
CERM
402

0.01UF

23

RJ45_DN<3>

R735
75

MDI3_PD

C493

40 38

RJ45_C3_PD

5%
1/16W
MF
2 402

C505

R733
75

5%
1/16W
MF
2 402

R382

R347

75

75

5%
1/16W
MF
2 402

5%
1/16W
MF

2 402

0.01UF

ENET_CTAP_CHGND

20%
16V
CERM
402

10%

PLACE RESISTORS CLOSE TO PHY

2 3KV
CERM

1808

40
40

CHGND1

13 40

CONFIG DEFINITIONS
PIN
BIT[2:0]
VDDO
111
LED_LINK10
110
LED_LINK100 101
LED_LINK1000 100
011
LED_DUPLEX
010
LED_RX
001
LED_TX
000
VSS

97
1

R380
4.99K
1%
1/16W
MF

2 402

8X4.5MM-SM

C491 1

MARVELL 88E1111
10/100/1000 ETHERNET

CONFIG INPUTS
PIN
BIT[2]
BIT[1]
BIT[0]
CONFIG<0>PHYADR[2]PHYADR[1]PHYADR[0]
CONFIG<1>ENA_PAUSEPHYADR[4]PHYADR[3]
CONFIG<2>ANEG[3] ANEG[2] ANEG[1]
DIS_125
CONFIG<3>ANEG[0] ENA_XC
CONFIG<4>MODE[2] MODE[1] MODE[0]
CONFIG<5>DIS_FC
DIS_SLEEPMODE[3]
CONFIG<6>SEL_BDT INT_POL 75/50 OHM

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

APPLE COMPUTER INC.

TABLE_5_ITEM

197S0086

XTAL,CER,25MHZ,.005%,20PF,8X4.5MM,SMD

Y3

DRAWING NUMBER

D
SCALE

REV.

051-6694
SHT
NONE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

SIZE

5%
50V
CERM 2
402

39

C457
100pF

40

56 NC
13

33pF

Short shielded RJ-45


CHGND1

T1

1%
1/16W
MF

2 402

MDI2_PD

SM

24

XFR-ENET-1000BT

49.9

1%
1/16W
MF

0.01UF

20%

R428

2 402

MDI1_PD
1

2
1

49.9

2 402

MDI0_PD

40 38

R406

49.9

1%
1/16W
MF

5
3

R381

2 402

ENET_RSET

1
2
3
4
5
6
7
8

49.9

R355

30

RJ45_DN<0>
RJ45_DP<1>

40 38

LED_LINK10
LED_LINK100

JTAG_ASIC_TDI 28
JTAG_ENET_TDO 13
JTAG_ASIC_TCK 13
JTAG_ASIC_TMS 13
JTAG_ASIC_TRST_L

RJ45_C0_PD

14
38 16

11
9

MDI_P<0>
MDI_M<0>
MDI_P<1>
MDI_M<1>
MDI_P<2>
MDI_M<2>
MDI_P<3>
MDI_M<3>

(000)
(000)
(111)
(110)
(111)
(101)
(000)

RJ45_DP<0>

15

10

PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78

38

13

40 38

11
9

20%

16V
2 CERM

402

C754
10uF

20%

2 10V
CERM

402

C476

Y3S LOAD CAPACITANCE IS 20PF

SM
1

44
50
49
46
47

5%
1/16W
MF

20%
2 10V
CERM
402

2
1

65
64
63
61
60
59
58

2 402

C488
0.1UF

FERR-EMI-600-OHM
+2_5V_MARVELL_AVDD

49.9

10K

805

L34

39

76
74
73 NC
70 NC
69
68 NC

R335

2 6.3V
CERM

PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96

29
31
33
34
39
41
42
43

CHGND1

C496
20%

2 10V
CERM

402

5%
1/10W
FF
805

10uF

20%

2 16V
CERM

402

C501

0.1UF

20%

2 10V
CERM

402

C503

5%
1/10W
FF
805

+2_5V_MARVELL

39 28

GND
1

C486

NC

1
6
10
15
57
62
67
71
85

52
66
72

MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-

RX_DV
RX_ER

INT-/
INT+

51

VDDOH
GTX_CLK

NC 82 S_IN+
NC 81 S_IN-

ENET_HSDACP
ENET_HSDACM

R435
1

U49

NC 79 S_CLK+
NC 80 S_CLK-

DVDD

88E1111

NC 77 S_OUT+
NC 75 S_OUT-

Q15

C555 1

23

ENET_ENERGY_DET

6
D

25
24

ENET_RST_L

SOT23

36 35 34 19

ENET_CRS
ENET_COL

84
83

1N914

IO_RESET_L

32 31 30

94
3

TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7

CRITICAL

5%
1/16W
MF
402
31 27 24 23 17

ENET_RX_DV
ENET_RX_ER

ENET_MDC
ENET_MDIO

13 ENET_PHY_TXD<0>
13 ENET_PHY_TXD<1>
13 ENET_PHY_TXD<2>
13 ENET_PHY_TXD<3>
13 ENET_PHY_TXD<4>
13 ENET_PHY_TXD<5>
13 ENET_PHY_TXD<6>
13 ENET_PHY_TXD<7>

38

1%
1/16W
MF
2 402
R2B

MF

CLKENET_PHY_GBE_REF

38

49.9K

2 402
R1

5%

1/16W
MF
402

R361

1
R362
VOUT = 0.8V*(1+R2EQV/R1)
182K
1%
R2EQV = R2A||R2B
1/16W

R353
1

Sandwich each RJ54 pair between chassis grounds

37 13

5%
50V
CERM 2
402

3405_VFB

PLACE ALL SERIES RES CLOSE TO PHY


R370
CLKENET_LINK_TX

22pF

1%
1/16W
MF
2 402R2A

+1_0V_MARVELL

GND

Must maintain 50-ohms trace impedance on all


MDI pairs and all RJ45 pairs

3.3uH

28 40

37 13

All differential signals should be close,


parallel, matched lengths, with minimum
via count, and short if possible

5%
1/16W
MF
402 2

TABLE_ALT_ITEM

10K

Ethernet routing priority:


1. Decoupling caps
2. TX SERIES TERMINATION - LOCATE NEAR LINK
3. RX SERIES TERMINATION - LOCATE NEAR PHY

C442 1
NO STUFF

TABLE_ALT_HEAD

28
1

OF

45

8
165MA MAX LOAD

FB
VOUT
GND ON/OFF

SDM20E40C

220uH

4
8

+3V_FW_UF

5
2

D20
SM

10UF

N20P20%
50V
CERM 2
2320

20%
10V 2

C777

2.2UF

R574

0.01UF

20%
2 16V
CERM
402

16.2K

1%
1/16W
MF
2 402

20%
805

R557
1 2
1

27.4K2
1

R555
1 2

29 39

CRITICAL

NC

C642
2.2UF

20%
10V
CERM 2
805

NC

7
6

IN

0.01UF
20%

MSOP

16V
2 CERM

OUT 1

402

NC
ADJ 2

NC
SHDN

C646

R577
16.2K
1%
1/16W
MF

C653
10UF

FW_CORE_ADJ

1
FW_CORE_BYP
R576

BYP 3
GND 4

5%
1/16W
MF
603

2 402
R2

20%
2 6.3V
CERM
805

1%
1/16W
MF

R4441

VOUT = 1.22*(1+R2/R1)+ IADJ*R2

1K
5%

IADJ = 30NA AT 25C

37 13

13

38 13

39 30 29

1/16W
MF
402 2

402K
1%
1/16W
MF
402 2

38
38
38
38
38
38
38

5%
1/16W
SM1

RP37
22
5%
1/16W
SM1

39

39

+1_95V_FW_PLL400VDD

39

C628
1UF
20%

2 10V
CERM

603

+1_95V_FW_DVDD 29

20%
10V
CERM
603

39

R547
1 2
+1_95V_FW_DVDD_RX01

38 29

5%
1/16W
MF
603

39

C808

0.1UF
20%

38 29

37 29

0.1UF

22

CLKFW_LINK_PCLK

13 37

5%
1/16W
MF
402

402

PHY PIN 38

DSX STRAP OPTIONS


1

C586

10UF

C540
0.1UF

20%
2 6.3V
CERM
805

20%
2 10V
CERM
402

C804

0.1UF

C561

C539
0.1UF

0.1UF

20%
2 10V
CERM
402

20%

20%
2 10V
CERM
402

2 10V
CERM

402

0 -> BILINGUAL PORT


1 -> A-ONLY PORT

R446

R775

R4371
1K
5%
1/16W

MF
402 2

1K

5%
1/16W
MF
2 402

5%
1/16W
MF
2 402

33
32
7

66
67
68

74
34
11
12
13
15
16
17
19
20

FW_PHY_DATA<0>
38 FW_PHY_DATA<1>
38 FW_PHY_DATA<2>
38 FW_PHY_DATA<3>
38 FW_PHY_DATA<4>
38 FW_PHY_DATA<5>
38 FW_PHY_DATA<6>
38 FW_PHY_DATA<7>

75
35

R464

36

1K

78

FW_TESTM

73

FW_VREG_PD
1

R740
470

5%
1/16W
MF
402 2

DVDD
1.8

DVDD
3.3

FW_PORT1_SEL AVDD
3.3

38

5%
1/16W
MF
402 2

38

PHY PINS 4,14

77

20%
6.3V 2
CERM
402

FW_LINK_CNTL<1> 13

20%

R436

FW_PHY_PD

1K

38

2 10V
CERM

402

20%
10V
CERM
603

FW_PC_PU
FW_PC_PD

R4451

FW_LINK_CNTL<0> 13

R469
1

CLKFW_PHY_PCLK

5%
1/16W
MF
402

R484
22 2
1
FW_PHY_CNTL<1>

5%
1/16W
MF
603

C634

22

FW_PHY_CNTL<0>

5%
1/16W
MF
402

R564
1

+1_95V_FW_DVDD_TX01

2 10V
CERM

C538 1

R485

39

PHY PIN 28

PHY PIN 25

C627
1UF

FW_INPUT_PD

0.22UF

+1_95V_FW_PLL500VDD

20%
1 10V
CERM
603

+3V_FW_AVDD

FW_PHY_RESET_L

5%
1/16W
MF

1UF

C591
1UF

80

5%
1/16W
MF
2 402

SIWARD ALT FOR FW OSC

2 603

C810

20%
10V

20%
10V
CERM
603

FW_BMODE

RP38
22

G1

FW_PHY_LREQ

8
7
6
5
8
7
6
5

5%
1/16W
MF
603

CERM
603

FW_CPS
FW_LINK_DATA<0> 1
2
13 FW_LINK_DATA<1>
3
13 FW_LINK_DATA<2>
4
13 FW_LINK_DATA<3>
1
13 FW_LINK_DATA<4>
2
13 FW_LINK_DATA<5>
3
13 FW_LINK_DATA<6>
4
13 FW_LINK_DATA<7>

3.3

C629
1UF

FW_PHY_LPS

14

COMMENTS:

R556

3.3

+3V_FW_AVDD_PORT1

CLKFW_PHY_LCLK

(MAY PROVIDE POWER, OR


MAY REQUIRE UP TO 3W)
(PC0 IS MSB, PC2 IS LSB)

R7811

38 13

PWR CLASS = 100

+FW_PWR_OR

R759

5%
1/16W
MF
2 402

27.4K

REF DES

39

1K

2 402
R1

BOM OPTION

TABLE_ALT_ITEM

197S0011 197S0052

+3V_FW_AVDD_PORT0

603

+1_95V_FW_DVDD
1

39

5%
1/16W
MF

1%
1/16W
MF
402 R1

U37
LT1962-ADJ

39

2 6.3V
CERM

R575

5%
1/16W
MF
603

C645
10UF

R2

805

ALTERNATE FOR
PART NUMBER

C570
1UF

24
39
44
51
57
63

20%
10V
CERM 2
805

R494

+3V_FW_AVDD_PORT2

R546
1K

DS0
DS1
LCLK

PLL
VDD
1.8

CRITICAL

R459
10K

PINT
CNA

(SYM_VER1)

LREQ
PC0
PC1
PC2

SN0201029PFP
1MA(MAX) BUS HOLDER EACH

PD
BMODE

CTL0
CTL1
C/LKON

(TXD-FWB)
(TXD-FWB)

TPA0+
TPA0-

(TXD-FWA)
(TXD-FWA)

TPA1+
TPA1-

CPS

TPA2+
TPA2-

D0
D1
D2
D3
D4
D5
D6
D7

(RXD-FWB)
(RXD-FWB)
(RXD-FWA)
(RXD-FWA)

RESETZ
SE

5
1

FW_PINT

79

1%
1/16W
MF
402 2

37

13 38

C571 C605 1
1UF

R478

20%

2 10V
CERM

56.2

1%
1/16W
MF
2 402

603

1UF

20%
10V
CERM 2
603

R5161

R509

56.2

1%
1/16W
MF
402 2

56.2
1%
1/16W
MF

2 402

FW_TPA0P
(TXD-FWB)

NC

9
10

FW_PHY_CNTL<0> 29
FW_PHY_CNTL<1> 29

FW_TPA0N
(TXD-FWB)

38

FW_TPA1P
(TXD-FWA)

38

FW_TPA1N
(TXD-FWA)

FW_LKON 13

46
45

FW_TPA0P
FW_TPA0N

53
52

FW_TPA1P
FW_TPA1N

TPB1+
TPB1TPB2+
TPB2-

56
55

FW_TPB2_PD

R5101
56.2

1%
1/16W
MF
402 2

R495
56.2

1%
1/16W
MF

2 402

R524
56.2

FWB_TPB1

1%
1/16W
MF
2 402

TPBIAS0
TPBIAS1
TPBIAS2

47
54
60 NC

XI
XO

27
26 NC

R0
R1

23
22

PLLGND

R4711
1K

5%
1/16W
MF
402 2

C587

FW_BIAS0
FW_BIAS1

37

220PF
5%
25V
CERM
402

R758
47
1

FW_XI

R496
4.99K
1%
1/16W
MF

FW_R0
FW_R1

R563
6.34K
2

1%
1/16W
MF
402

C614
220PF

+3V_FW

R760
100

C640

0.22UF
20%

5%
1/16W
MF

2 6.3V
CERM

402

2 402

VCC

G1

R522
56.2

1%
1/16W
MF

2 402

FWB_TPB0

2 402

5%
1/16W
MF
402

29 30 39

5%
25V
CERM
402

R525
4.99K

1%
1/16W
MF

FIREWIRE

2 402

NO STUFF

NOTICE OF PROPRIETARY PROPERTY

R7611
100K

PLACE NEAR PHY

5%
1/16W
MF
402 2

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

98.304MHZ

CAPACITOR IN CONJUCTION WITH


INTERNAL PULLUP PROVIDES
RESET PULSE WHEN PHY FIRST
RECEIVES POWER

37

FW_OSC

OSC

SM-A

OE
OUT
CRITICAL
GND

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

1 FW_OSC_EN

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

REV.

051-6694 B
29
45
1
SHT

NONE

FW_TPB0P
(RXD-FWB)
FW_TPB0N
(RXD-FWB)
(RXD-FWA)
FW_TPB1P
FW_TPB1N
(RXD-FWA)

59 NC
58 NC

FW_TPB1P
FW_TPB1N

5%
1/16W
MF

56.2

CLKFW_PHY_PCLK 29

49
48

2 402

R4861

FW_TPB0P
FW_TPB0N

TESTM
DGND

5%
1/16W
MF

1 402

42
41

TPB0+
TPB0-

SM

VREG_PD
THRML
AGND
PAD

PLACE NEAR PHY

SPEC SAID TO USE 10K


2

PLL
VDD
3.3
PCLK

U29
TSB81BA3A
PQFP

LPS

81

C650

2.2UF

GND
2

29 39

1
FW_PLL_ADJ

C641

+1_95V_FW_PLLVDD

ADJ 4

39

PHY PIN 61

3 BYP

FWPLL_BYP

5%
1/16W
MF
603

VOUT = 1.22*(1+R2/R1)+ IADJ*R2


IADJ = 30NA AT 25C

OUT 5

PART NUMBER

2 10V
CERM

+1_95V_FW_PLLVDD 29

20%
2 10V
CERM
402

PHY PIN 64

PHY PIN 50

1 IN

C541
0.1UF

20%
2 10V
CERM
805

PHY PIN 40

SYM_VER2

TABLE_ALT_HEAD

20%

20%
2 10V
CERM
402

100UF

PHY PIN 21

SOT-23-1

2.2UF

0.1UF

PHY PINS 72,76

39 +1_95V_FW_DVDD_PORT1

R470
LTC1761ES5-BYP

C546

C778

20%
2 10V
CERM
402

1/16W

C577
0.1UF

MF
2 402

39

C818 1

10
5%

SM-1

CRITICAL

U36

R447

400-OHM-EMI

POLY
MBR0540SMD-3

L7

SM-3

C635 1

39

31 TX0

SM

29
30

VIN

25
28

L51

6
18
69
70

3
2

4
14
38
64
72
76

+5V_SLEEP

+1_95V_FW_DVDD 29

CRITICAL

8
37 RX0
65
71

U34
LM2594

+3V_FW

39 30 29

CRITICAL

1
29 +FW_PWR_OR

21
40
43
50
61
62

D14

LM2594_IN

SC-59
39 30

7
39

OF

PORT POWER SWITCH

+3V_PMU

39

CRITICAL

+FW_FUSE

SM

BAS16TW
SOT-363
1

POWER_UP

R752

RUN_OR_AC

470K

Q25

PMU_POWER_UP_L 2

+FW_SW

39 29

C784

+3V_FW_ESD

0.1UF

402

+FW_PWR_OR

C786

D8
1N5227B

D26

D28

BAV99DW

SOT23

0.001UF
20%
2 50V
CERM
402

20%
2 10V
CERM
402

BAV99DW

SOT-363

SOT-363

5
3

B340B

C774

D26

20%
402

SOT-363

R743

R867
0 2

1/16W
MF
2 402

SOT-363

PORT 0

514S0059
FIREWIRE B - BILINGUAL

FW_PWREN_L

DP5

BAS16TW

R741
10K

AC_IN 2

330K
5%

BAS16TW
DCDC_EN_CTRL 4

5%
1/16W
MF
402
32 31 28

DP5

DCDC_EN

SOT-363

1 AC_IN_FW_CNTL 2

5
1

R737

470K

2N7002DW
SOT-363

5%
1/16W
MF
2 402

38 29

38 29

FW_TPA0P_CONN

90-OHM-300MA

FW_TPA0N_CONN

FW_TPA0P

SYM_VER-1

AREF

2012H

FW_TPA0N

L71

FERR-250-OHM

39

FW_TPB0P_CONN

29 FW_TPB0P

38 29

FW_TPB0N

4
1

R472

L70

1M

5%
1/16W
MF
2 402

CRITICAL

5%
1/16W
MF
603

C556

0.1UF

20%
2 16V
CERM
402

Q73

+FW_PWR_OR_F

D12

39 30 29

+FW_PWR_OR_GATE
NO STUFF

R888
470K2 NO
1/16W
MF
402
1%

BAV99DW

+3V_FW

OUTPUT

INPUT

F-RT-SM

C803

1394B-Q41

0.01UF

J26

20%

CRITICAL

2 16V
CERM

402

CHGND1

CHGND6
2

39

R453

NO STUFF

Q88

STUFF

SOT-363

1/16W
402
MF
1%

NO STUFF

NO STUFF

NO STUFF

U62

R892

SM
+FW_PWR_CTRL
1
2

SM

NO STUFF MBR0540
1

V-

C942

1UF

+3V_FW_ESD_R

V+

10K

NO STUFF

R890
1

+3V_FW_ESD

+2_5V_REG

D12

1.5AMP-33V
SM

30 39

SOT-363

402

2
6

NO STUFF

C944

39

+FW_PWR_PORTA

R893
332K

20%
16V
CERM
402

604K 2

402
1%
1/16W
MF

CRITICAL

L43

260-OHM-330MA

L50

+2_5V_REG_F
1%

FERR-250-OHM

1/16W
MF
402

38 29

FW_TPA1P

38 29

FW_TPA1N

(AC)

1
1
0
2.99V

0
0
1
0
0
1

DCDC_EN

0
1
1
0
1
1

+3V_PMU

FIREWIRE A
514-0057

AC_IN

1
1
1
0
0
0

STUFF R867

OFF
ON
ON
OFF
OFF
(PULL-DOWN RESISTOR)
ON

PORT 1

CRITICAL

J23

CRITICAL

1394A
F-RT-TH

L44

ENABLES PORT POWER WHEN MACHINE IS


RUNNING, SHUTDOEN OR WHEN ASLEEP ON AC
POWER_UP

SM1

SYM_VER-2

SM

STATE PMU_POWER_UP_L
SHUTDOWN
1
(AC)
SLEEP
1
(AC)
RUN
0

BREF SHOULD BE HARD CONNECTED TO


LOGIC GROUND FOR SPEED SIGNALING B
AND CONNECTION DETECTION CURRENTS
PER 1394B V1.33

20%

2 16V
CERM

BAV99DW

SOT-363

C606

0.01UF

D15

BAV99DW

NO STUFF

20%
16V
CERM 2
402

AREF NEEDS TO BE ISOLATED FROM


ALL LOCAL GROUNDS PER 1394B SPEC
SO WHEN A BILINGUAL DEVICE
IS PLUGGED TO BETA-ONLY DEVICE,
THERES NO DC PATH BETWEEN
THEM (TO AVOID GROUND OFFSET ISSUE)

402

0.01UF

20%
10V
CERM
603

F5

5%
1/16W
MF

0.01UF
1

C588 1

1/16W
1%
MF
402

102K

D31
LMC7211

R891

20%
10V
CERM
402

1 NO STUFF

C943
0.1UF

2
R889
649K

2N7002
SM

5%
1/10W
FF

1 805

BAV99DW

SOT-363

NO STUFF

+FW_PWR_OR_GATE_L

20%
16V
CERM 2
402

D15

RUN
(BATT)

0.01UF

TPA
TPA(R)
TPA*
VG
SC
VP
TPB
TPB(R)
TPB*

1/16W
402
1%
MF

SLEEP
(BATT)

STUFF

C607 1

CLEAR OUT ALL PLANES UNDER TRANSFORMERS

+3V_FW_ESD 30

R887
470K

SHUTDOWN
(BATT)

(TPI0R)

CHGND1

NO STUFF

C528 NO
0.01UF

20%
2 50V
CERM
805

SI2319DS
SOT23

+FW_VP0

NO STUFF

SYM_VER-1

BREF

FW_TPB0N_CONN

2012H
90-OHM-300MA

R894
0

FW_VGND0

39
38

SM

FW_TPO0R

NC
2

40 39

CRITICAL

L40

15
13
11
4
5
3
6
7
8
2
9
1
10
12
14

Q58

5%
1/16W
MF
402

NO STUFF

402

2
6

40 35 34 19

20%

2 16V
CERM

BAV99DW

SOT-363

C792

0.01UF

D28

BAV99DW

16V
CERM 2

FW_PWR_GATE

4
1

0.01UF

30 39

SM-1

5%
1/16W
MF
402

402

SOT-363

39

+3V_FW_ESD_ILIM

2 16V
CERM

2N7002DW

34 31

2 10V
CERM

D29
SMB

400-OHM-EMI
39

C781

0.01UF
20%

5%
1/16W
MF
2 402

6
D

20%

CRITICAL
8
7
6
5

3
2
1

DP5

C935

10K 2

L39

R751
1

0.1UF

NDS9407
SOI

5%

402 2

Q67

100K

1/16W
MF

+3V_FW

NO STUFF

1.5A-24V

R7361

39 30 29

F2

+PBUS

260-OHM-330MA
38 29

NO STUFF R867

ON
ON
ON
OFF
OFF
(PULL-DOWN RESISTOR)
ON

FW_TPB1N

38 29

SM1

SYM_VER-2

FW_TPB1P

40 38

FW_TPO1P

40 38

FW_TPO1N

40 38

FW_TPI1P

40 38

FW_TPI1N

+FW_VP1

CLEAR OUT ALL PLANES UNDER TRANSFORMERS


39

39

R779

C807
1 C805
0.01UF
20%

2 16V
CERM

0
5%
1/10W
FF
2 805

TPO#
TPI
TPI#

402

0.01UF
20%
2 16V
CERM
402

FIREWIRE PORTS

VP

FW_VGND1

TPO

NOTICE OF PROPRIETARY PROPERTY

10

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

CHGND6

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

CHGND6

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

+4_6V_BU +3V_PMU

SHT
NONE

REV.

051-6694

SCALE

VGND

30
1

OF

45

8
+3V_PMU

R505
470K
1

5%
1/16W
MF
402

31 32 40

PMU_POWER_UP_L

R492
10K
2

+3V_PMU

SOFT_PWR_ON_L

C643
10UF

40
17 23 24 27 28 31

NO STUFF

SLEEP

R518

23 31 34 36 40

NUMLOCK_LED_L1

5%
1/16W
SM1

RP40
100K
2

R782
1K

5%
1/16W
SM1

5%
1/16W
MF
402

R787
10K

1/16W
MF
402

9 13 31

40
40

NO STUFF

R513

INT_SUSPEND_REQ_L 8

PMU_BYTE

40

5%

INT_RESET_L

5%
1/16W
SM1

2.2K

40

+3V_PMU CAPSLOCK_LED_L

31

5%
1/16W
MF
402

40 32 31
34 31 30

31

R868

35 31 23 22

10K
5%

40 26 14

1/16W

PMU_CNVSS

31

5%
1/16W
MF
402

2.2K 2
1

MF
402

14

40 23

+3V_PMU

40 23

NO STUFF

R869
10K

23

1/16W
5%
MF
402

40 23
23
23

23

R844
1K

23

402
5%
MF
1/16W

23
23

31 28 27 24 23 17

R843
100K

5%
1/16W
MF
402

23
40 23
35

+3V_PMU_RESET

40 23
40 23

C915

40 23

0.1UF

20%
2 10V
CERM
402

14

23

VCC

U41

31

PMU_CUSTOM_RESET_L

MAX6804
SOT143
MR* RSET*

40 36 34 31 23

KBD_Y<0>
KBD_Y<1>
KBD_Y<2>
KBD_Y<3>
KBD_Y<4>
KBD_Y<5>
KBD_Y<6>
KBD_Y<7>

86
85
84
83
82
81
80
79

PMU_NUMLOCK_LED_L
PMU_CAPSLOCK_LED_L
CHARGE_LED_L
PMU_POWER_UP_L
PMU_SELECT
SOFT_PWR_ON_L
COMM_RING_DET_L
INT_WATCHDOG_L

78
77
76
75
74
73
72
71

KBD_X<0>
KBD_X<1>
KBD_X<2>
KBD_X<3>
KBD_X<4>
KBD_X<5>
KBD_X<6>
KBD_X<7>

70
69
68
67
66
65
64
63

KBD_X<8>
KBD_X<9>
IO_RESET_L
KBD_COMMAND_L
KBD_CONTROL_L
KBD_SHIFT_L
KBD_OPTION_L
KBD_FUNCTION_L

61
59
58
57
56
55
54
53

PMU_INT_L
KBD_ID
CPU_PLL_STOP_OC

NC

SLEEP

2
8

GND

31 8

PMU RESET CIRCUIT

31

INT_SUSPEND_ACK_L
INT_SUSPEND_REQ_L

PMU_BYTE

+3V_PMU

PMU_RESET_L
39 31 26

31

+3V_PMU_AVCC
PMU_CNVSS

R233

BAS16TW

5%
1/16W
MF
402

NO STUFF

SOT-363

32

AC_IN_L

R594
0
5%

BAS16TW

SOT-363
5
PMU_BATT_DET_L

PMU_CUSTOM_RESET

PMU_CUSTOM_RESET_L

1/16W
MF
402 2

31

Q18

5 G
SOFT_PWR_ON_L

P20_A0_D0
P21_A1_D1_D0
P22_A2_D2_D1
P23_A3_D3_D2
P24_A4_D4_D3
P25_A5_D5_D4
P26_A6_D6_D5
P27_A7_D7_D6

P70_TXD2_SDA_TA0OUT
P71_RXD2_SCL_TA0IN_TB5IN
P72_CLK2_TA1OUT_V
P73_CTS2_RTS2_TA1IN_V
P74_TA2OUT_W
P75_TA2IN_W
P76_TA3OUT
P77_TA3IN
P80_TA4OUT_U
P81_TA4IN_U
P82_INT0
P83_INT1
P84_INT2
P85_NMI
P86_XCOUT
P87_XCIN
P90_TB0IN_CLK3
P91_TB1IN_SIN3
P92_TB2IN_SOUT3
P93_DA0_TB3IN
P94_DA1_TB4IN
P95_ANEX0_CLK4
P96_ANEX1_SOUT4
P97_ADTRG_SIN4
P100_AN0
P101_AN1
P102_AN2
P103_AN3
P104_AN4_KI0
P105_AN5_KI1
P106_AN6_KI2
P107_AN7_KI3
AVSS

62

Q18
2N7002DW
SOT-363

C666
12PF
5%

50V
CERM 2
402

REFERENCE DESIGNATOR(S)

CRITICAL

XTAL,10.0000MHZ,.01%,12PF,8X4.5MM,SMD

Y6

CRITICAL

43
42
41
40
39
38
37

BOM OPTION

IC,PMU,V81B

36
35
34
33
32
31
30
29

PMU_ACK_L
14
PMU_CLK
14
PMU_FROM_INT
14
PMU_TO_INT
14
PMU_REQ_L
14
PMU_LID_CLOSED_L 23 31
PMU_RESET_BUTTON_L 26
PMU_NMI_BUTTON_L 26 31

28
27
26
25
24
23
22
21

TPAD_RXD
TPAD_TXD
SYSTEM_CLK_EN
CPU_CLK_EN
PMU_CHARGE_V
PMU_CHRG_BATT_0
NC (CHARGE_I)
NC

20
19
18
17
16
15
9
8

PMU_SLEEP_LED_L

5
4
3
2
1
100
99
98

CPU_SMI_L
POWER_VALID
PMU_PME_L
INT_PEND_PROC_INT
PMU_NMI_L

31

THERM_L_OC
PMU_AC_IN
PMU_AC_DET 31
SYS_BATT_ISNS2
PMU_I2C_CLK
PMU_I2C_DATA
PMU_SMB_CLK
PMU_SMB_DATA

AIRLINE
HOOPER

40 32 31

5%
1/16W
SM1
31

NO STUFF

32 31

32 31

7.15K1

PMU_SMB_DATA

R769

7.15K1

PMU_SMB_CLK

1%
1/16W
MF +3V_SLEEP
402

R870

31
31

31

SYS_BATT_ISNS2

SYS_BATT_ISNS

24

RP41

5%
1/16W
MF
402

14
8

31

32

10K

PMU_I2C_DATA

31

5%
1/16W
SM1

32

RP41
10K

PMU_I2C_CLK

23

14

+5V_SLEEP

R573
10K 1
2

Keep crystal subcircuit close to PMU.

31

R593
1K
1

31

NO STUFF

PMU_BATT_DET_L

31 32 40

R572
1K
1

31

AC_IN

CRITICAL

Y7

28 30 32

5%
1/16W
MF
402

26

31

TPAD_TXD

5%
1/16W
MF
402

SM-1
1
4

31
31

R785
0

31 32

31

5%
1/16W
MF
2 402

CLK32K_PMU_XOUT_UF

31 27 14

POWER_VALID

100K 1

5%
1/16W
MF
402

PMU_PME_L

R596
2

PMU_LID_CLOSED_L

5%
2 50V
CERM
402

31 26 13

R501

10K

R502
100K

0.1UF

ADAPTER_DET 40
32

R491
52.3K
1%
1/16W
MF

100K 1

R583
1

PMU_OOPS

10K

5%
1/16W
MF
402

INT_PU_RESET_L

R544
1

STATUS
1.65V-RECOGNIZES AS Q11
2.31V FULL FUNCTIONS
2.31V-RECOGNIZES AS A29
2.97V LIMITED FUNCTIONS
0.589V- 0.33V-FULL FUNCTIONS
0.663V 0.99V NO BATTERY CHARGING
3.19V- 2.97V-RECOGNIZES AS HOOPER
3.28V
3.30V LIMITED FUNCTIONS

A29_DETECT 32
2

1%
1/16W
MF
2 402

2_34V_REF 3

U27

Q22

LMC7211

SM
1
CRITICAL

402K

1/16W
MF
402 2

402

V+

R503

100K
5%

2 10V
CERM

2 402

2 402
AC_DET

1
A29_DET_L

V-

PMU

2N7002
SM

2
5

R475
127K

1%
1/16W
MF

4.7M 2

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

5%
1/16W
MF
402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

50MV OF HYSTERSIS

SIZE

2 402

NOTICE OF PROPRIETARY PROPERTY

R476
1

100K 2

5%
1/16W
MF
402

R5171

20%

5%
1/16W
MF
402

31

C558

10K

5%
1/16W
MF
402

R562
31 23

A29 DETECT CIRCUIT


1

+3V_MAIN

R597

C832
C831
12PF
12PF

5%
2 50V
CERM
402

31 32

10K

5%
1/16W
MF
402

32.768K

31

+4_85V_RAW

R584
2

5%
1/16W
MF
402

14

31

TPAD_RXD

R786
10M

5%
1/16W
MF
402
31

31

CLK32K_PMU_XOUT
CLK32K_PMU_XIN

Y7S LOAD CAPACITANCE IS 12.5PF

PMU_AC_DET 1

5%
1/16W
SM1

14 27 31

1%
1/16W
MF
2 402

5%
SM1

1/16W

1%
1/16W
MF
402

5%
1/16W
MF
402

31

10K

R768

R898
1

SYS_BATT_ISNS1

31

RP41
1

PMU_NMI_L

DRAWING NUMBER

REV.

051-6694
SHT
NONE

10K

PMU_NMI_BUTTON_L

470K 1

5%
1/16W
MF
402

RP41
31 26

SCALE

R592
2

PMU_BATT_DET_L

APPLE COMPUTER INC.

470K 1

PMU_BATT1_DET_L_PU 2

31

INT_PROC_SLEEP_REQ_L
PMU_POWERUP_OK
SYS_BATT_ISNS1
PMU_OOPS

95
93
92
91
90
89
88
87

5%
1/16W
MF
402

20 25 27 31 40

NC
NC

Q11 ADAPTER DETECTION SCHEME


ID VOLT SYSTEM
RANGE

R788
31

1%
1/16W
MF

ADAPTER PIN VOLT


2.007V1 Q11 (65W)
2.066V
2.558V2 A29 (45W)
2.661V

100K 1

PMU_POWERUP_OK

10K

5%
1/16W
MF
402

PMU_BATT0_DET_L
PMU_BATT1_DET_L_PU

R877

CASE

R569
2

R585

U33

INT_RESET_L
9 13 31
MAIN_RESET_L
14 17 18
NC
PMU_INT_NMI
14
PMU_EPM
31
INT_PU_RESET_L
13 26 31
PMU_CPU_HRESET_L 6

1%
1/16W
MF
402

50V
CERM 2
402

PMU_RESET_BUTTON_L

100K

C664
12PF
5%

5%
1/16W
MF
402

BOM OPTION

+3V_PMU

31

REFERENCE DESIGNATOR(S)

94

Y6

TABLE_5_ITEM

P60_CTS0_RTS0
P61_CLK0
P62_RXD0
P63_TXD0
P64_CTS1_RTS1_CTS0_CLKS1
P65_CLK1
P66_RXD1
P67_TXD1

OMIT
CRITICAL

TABLE_5_HEAD

197S0088

P10_D8
P11_D9
P12_D10
P13_D11
P14_D12
P15_D13_INT3
P16_D14_INT4
P17_D15_INT5

BYTE
XOUT
XIN
RESET
VREF
CNVSS

DESCRIPTION

CPU_VCORE_HI_OC/PMU_AP should
have a pulldown for coming out of
reset. MLB will have a pull-up
to +3V_MAIN or +3V_SLEEP, which
will act as our pulldown since
both are off during PMU reset.
(PMU_AP)
44
CPU_VCORE_HI_OC
7 35

Y6S LOAD CAPACITANCE IS 12PF

A
DESCRIPTION

U33

12

+3V_PMU

R535
10K 1

5%
1/16W
MF
402

AVCC
CRITICAL
OMIT
P50_WRL_WR
P51_WRH_BHE
M16C62
P52_RD
FLAS
P53_BCLK
P54_HLDA
P55_HOLD
P56_ALE
P57_RDY_CLKOUT

P40_A16
P41_A17
P42_A18
P43_A19
P44_CS0
P45_CS1
P46_CS2
P47_CS3

PMU_EPM

TABLE_5_ITEM

341S1008

97

P30_A8_D7
P31_A9
P32_A10
P33_A11
P34_A12
P35_A13
P36_A14
P37_A15

QTY

Keep crystal subcircuit close to PMU.

8X4.5MM-SM

QTY

0.1UF

39 33

5%
1/16W
MF
402

SOT-363

PART#

CLK10M_PMU_XOUT
CLK10M_PMU_XIN

PART#

C827 1

60

P00_D0
P01_D1
P02_D2
P03_D3
P04_D4
P05_D5
P06_D6
P07_D7

TABLE_5_HEAD

10.0000M

CLK10M_PMU_XOUT_UF

2N7002DW

35 31 23 22

6
11
13
10
96
7

31 26

R595
10M 2
1

DP8

40
31
32

26 31 39

VSS

100K

DP8

52
51
50
49
48
47
46
45

+3V_PMU_AVCC

20%
10V
CERM 2
402

VCC

14 17 18 20 25 27 31 40

40

RP40
100K

MAIN_RESET_L

IO_RESET_L

RP40
100K6
3

C835 1

0.1UF
20%
10V
CERM 2
402

20%
10V
CERM 2
402

4.7

5%
1/16W
MF
402

14

5%
1/16W
MF
402

5%
1/16W
SM1

C574 1
0.1UF

805

RP40
100K

20%

22 23 31 35

6.3V
CERM 2

R536
100K

R778

30 31 34

5%
1/16W
MF
402

31

CHARGE_LED_L

5%
1/16W
MF
402

R504
10K 2
1

31
1

OF

45

DC POWER INPUT
(POWER JACK, ETC. ON SEPARATE BOARD)
CRITICAL

39

1
2
3
4
5
6
7
8

CHARGE_LED_L 31 40
39 33 +ADAPTER

NO STUFF

C757
0.1UF

R4142

C458 1

5%
1/16W
MF
402 1

20%
50V
CERM 2
805

330K

20%

50V
2 CERM

ADAPTER_DET 31

805

40

R396
20K

3
2
1

S3
S2

Q16

0.1UF

8
7
6
5

D4
D3
D2
D1

3
2
1

S1

R374
470K

U23

2
R395
102K

39 33

SM

NC
NC

68K

20%
50V
CERM
603

5%
1/16W
MF
2 402

BCKFD_PROT_EN_L

AC_IN

32 31 30 28

SOT-363

32 31 30 28

AC_IN

1M

AC_IN_L 31

32 31

R383

470K
5%

+3V_PMU SWITCHER VOLTAGE CONTROL

1
R754
100K

1%
1/16W
MF

R488
4.7

D9

1N914
SOT23

5%
1/16W
MF
402 2

1/16W

R5671
27.4K
1%
1/16W

MF
402 2

1
R558
10K

MF

1%
1/16W
MF

1/16W

39

MF

2 402

(+3V_PMU)
1772_VCTL
1772_ICTL
1

4.12K

1%
1/16W
MF
402 2

R565

R566
1K
1%

48.7K

1%
1/16W
MF
402 2

R5421

1/16W

1K

MF
402 2

1
R580
Q27
2N7002DW5.23K

SOT-363

1%
1/16W
MF
2 402

SOT-363

SOT-363

5 G
A29_DETECT

20%
16V
CERM 2
402

R497

1%
1/16W
MF
2 402

1
R748
100K

5%
1/16W
MF
402 2

+3V_PMU

100K
5%

C630 1
1UF

0.1UF

20%
2 10V
CERM
402

20%
10V
CERM 2
603

SOT-363

C775
1UF

20%
2 10V
CERM
603

1%
1/16W
MF
2 402

SOT23

R774

C608 1
CERM

Q63

L42
10uH
1

0.1UF

C802

CRITICAL

0.1UF

20%
25V
CERM 2
603

603

100K
5%
1/16W

1
5%

1/16W
MF
603 2

1 2 3

10%

2 50V
CERM

39

+BATT_24V_FUSE

C619
4.7UF
20%

2 25V
CERM
1206

R543

C906

0.0022UF

XW19
SM

R5591

MF
2512

MBRS140T3

SO-8

NO STUFF

R487

10%
2 50V
CERM
1812

32 39

1%
1W

D30
SM

1
Q64
IRF7811W

20%

2 25V
CERM

10%
2 50V
CERM
1812

R763
0.05

SM1

C817 1

10%
2 50V
CERM
1812

+BATT_RSNS

CRITICAL

1772_CLS

10%
2 50V
CERM
1812

SM

1772_CSIP
1772_CSIN

10K

SOT-363

IRF7805

1 2 3

20%

Q21

2N7002DW

1 C562 1 C563 1 C557 1 C564


C547
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF

10%
2 50V
CERM
1812

CRITICAL

2
4

1%
1/16W
MF
402 2

5 6 7 8

805

2 10V
CERM

BATT_14PBUS_EN

5%
1/16W
MF
2603

20%
50V

1UF

89

BAS16TW

SOT-363
5
2
BATT_24PBUS_EN

4.7

5 6 7 8

GND

5%
1/16W
MF
402 2

+24V_PBUS

25V
CERM 2
603

C652

DP4

WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF


WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
RC TIME IS 480K*10UF @ +3V_PMU

(GND)

BATT_14V_GATE

1772_BST_ESR

1772_LX
1772_DLO

38

47K
5%

1
R744
10K

C593

1772_DHI

38

R7461
MF
402 2

402 2

1772_DLOV
1772_BST

39

TO-252

6.3V 2
CERM
805

D10

S 3

1/16W

R489
158K

10UF
20%

1N914
1

SUD45P03

AC_IN_L_RC

0.1UF
39

S1

CRITICAL

Q76

8
7
6
5

D4
D3
D2
D1

5%
1/16W
MF

SOT-363

SOT-363

20%

1772_CELLS

S3
S2
GATE

AC_IN_L

DP4
BAS16TW

Q65
2N7002DW

0.1UF

402 2

603

1772_REF

C624 1

1/16W
MF

2 16V
CERM
402

Q20
2N7002DW

+BATT_14V_FUSE

D4

1
R512
10K

32 31

5%
1/8W
FF
1206

R549

26

4 3

1772_LDO

1206

REF CLS

SOT-363
AC_GTR_18V

39

BATT_24V_GATE

OVER_18V_ADJ

Q20
2N7002DW

33

20%

C621

C579
0.47UF
20%

C616
0.01UF

0.1%
1/16W IF ADAPTER IS OVER 18V,
FF
ADJUST CURRENT SETTING
2 603

0.1%
1/16W
FF
2 603

R571

2 50V
CERM

1K

0.01UF

1772_CCV_RC

SOT-363

C622

1K

1%
1/16W
MF
402 2

2N7002DW

Q27
2N7002DW

REF = 4.096V

R5261
Q29

2N7002DW

1772_CCV
1772_CCI
1772_CCS

1%
1/16W
MF
402 2
3

Q29

PMU_CHARGE_V 5

1772_ICHG
1772_IINP

BATT_LOW_L

31

BATTV_HIGH

1/16W
FF
603 2

CRITICAL

5%
1/16W
MF
402 2

1 DCINCSSP CSSNCELLS 16
U31 LDO 2
11 ACIN MAX1772
12 ACOK QSOP DLOV 22
13 RFIN CRITICAL BST 25
15 VCTL
DHI 24
14 ICTL
LX 23
10 ICHG
DLO 21
28 IINP
PGND 20
CSIP 19
7 CCV
CSIN 18
6 CCI
5 CCS
BATT 17

1772_DCIN

3
2
1

82.5K

0.1%

5%
1/16W
MF 38
2 402

20%
50V
CERM 2
1206

1772_ACIN
18V
1772_ACOK_L

OD OUTPUT LOW - WHEN AC GREATER THAN

R560

4.7

27

1%

402 2

R498

1772_CSSP
38 1772_CSSN

402 2

R548
10K

1 1625_COMP 33

1%
1/16W
MF
402

R739
51.1K

+3V_PMU

IF A29 ADAPTER USED,


ADJUST CURRENT SETTING
2 G
32 1772_ACOK_L

0.47UF

50V
CERM1
1210

1%

C578

C600
1UF
20%

R755

1
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
12.7K
CHARGE THROTTLED BY LOW BATTERY VOLTAGE

1%
1W
MF
2512

ADAPTER_I_REG

0.0252
1

SWITCHER CURRENT CONTROL

PMU SELECTS BETWEEN TWO VOLTAGES

BATTV_LOW

R734

R460

1/16W
MF
1 402

+BATT_24V_FUSE

SOI

1
R490
47K

A29_CURRENT_ADJ

402 2

R738
42.2K

603-1

GREATER THAN 13.5V DETECT

1/16W
MF
402 2

C883

32

R358
150

SOT-363

39 32

+PBUS

Q24
SI4435DY

1%
1/16W
MF
402 CURRENT_THRESHOLD

0.1UF
10%
2 50V
X7R

Q10
2N7002DW

SOT23-5

LTC1625_ITH

5%

1/16W
MF
402

1/16W

100K
5%

R394
1

57.6K

R5611

1
MAX4172_OUT

0.1%
1/16W
MF
603 2

SOT-363

2.21K

Q21
2N7002DW

R466
10K

R4541

Q10
2N7002DW

SOT-363

3
4

DP4
BAS16TW

U50
2 LMC7111
CRITICAL

7 NC

PLACE R358 CLOSE TO LTC1625


ROUTE LTC1625_ITH CAREFULLY

402

4
5

1%
MF
402 1

R499

0.01UF

AC_ENABLE_L

V-

R3652

10K

1/16W
MF
2 402

LMC7211

CRITICAL
3

AC_DIV

1%
1/16W
MF
402 1

10K
5%

U15

1V20_REF

V+

R3752

20%
16V
CERM 2
402

102K
1%
1/16W
MF
402 2

1%
1/16W
MF
402 1

R363

1
C468
0.01UF

R3641

C592

5%
1/16W
MF
1 402

TSSOP
RS+
RSCRITICAL
PG
NC1
NC2
OUT
GND

20%

IAC_FB

MAX4172

SM-2

+24V_PBUS

2 10V
CERM

42.2K
0.1%
1/16W
FF
603 2

+24V_PBUS

V+

F3

5AMP-125V
2

C772
0.1UF

R7471

5%
1/16W
MF
2 402

F4

5AMP-125V
SM-2

603

R474
47K

AC_ENABLE_GATE

20%
10V
CERM
402

+3V_PMU

+BATT

20%

BCKFD_PROT_GATE

1%
1/16W
MF
1 402

1
IAC_RC_COMP

2 50V
CERM

+ADAPTER_SENSE

39

GATE
4

C572
0.01UF

S3
S2

GATE

+3V_PMU

PLACE CLOSE
TO DC INPUT

8
7
6
5

BATTERY SWITCH-OVER CIRCUIT

C771
0.1UF

1%

1/16W
MF
402

SI4435DY
SOI

D4
D3
D2
D1

S1

+ADAPTER_SW

SI4435DY
SOI

M-RT-SM

R742
1K

U23 SENSE VOLTAGE DROP ACROSS R460

Q13

J18

87438-0833

1MSEC INTEGRATION TIME

PLACE U23 NEXT TO R460

DC INRUSH LIMITER

R511
1

5%
1/16W
MF
603 2

C631
4.7UF

C632
4.7UF

20%
2 25V
CERM
1206

4.7UF
20%
25V

20%
25V
CERM 2
1206

20%

2 25V
CERM

C633 1

C617
4.7UF

CERM 2
1206

C824
33UF

20%

2 25V

1206

1
C618
4.7UF

ELEC

SM1

20%
25V
CERM 2
1206

402

MF
402 2

R4731
4.12K

1
R578
100K

5%
1/16W
MF
402 2
CHARGE_DISABLE 2

1
R588
100K

C615
0.1UF

20%
2 10V
CERM
402

U38

SOT-363

1%
1/16W
MF
402 2

R579
499K

1%
1/16W
MF
402 2
A29_CLS_ADJ

V-

BATT_DIV
1V65_REF

VBATT = CELLS X (4.096 + (0.4096


*
V
VCTL
REFIN

/ V

R5991
100K

))

1%
1/16W
MF
402 2

For 4.15V cells, VCTL = 0.123 REFIN


For 4.20V cells, VCTL = 0.245 REFIN

ICHG = (0.2048/R
_62

)ICTL
* (VREFIN/ V

R570
100K

1%
1/16W
MF
2 402

C658
0.047uF
10%

2 16V
CERM

402

32 31

5
A29_DETECT

SOT-363

L9
FERR-EMI-100-OHM L53

1
2
3
4
5
6
7
8

FERR-50-OHM

SM

J25
87438-0833
M-RT-SM

Q65
2N7002DW

CRITICAL

+BATT_ISNS

+BATT_VSNS

BATTERY
CONNECTOR

1
R749
6.34K

1%
1/16W
MF
2 402

LMC7211
SM
V+
BATT_LOW 1
CRITICAL

1772_GND

39

SOT-363

Q30
2N7002DW

5
31 PMU_CHRG_BATT_0

39

Q30
2N7002DW

1%
1/16W
MF
402

+3V_PMU

1
1

L10

BATTERY CHARGER

FERR-EMI-100-OHM

+BATT_POS
(BATT_IN_PD)

40 39

PMU_SMB_CLK

NOTICE OF PROPRIETARY PROPERTY

31

SM

BATT_CLK
40 BATT_DATA
PMU_BATT_DET_L 31
40
40 39 BATT_NEG
40

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

L8

L12
FERR-50-OHM

2
SM

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

FERR-EMI-100-OHM
1

PMU_SMB_DATA

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

31

SM

SIZE

2
SM

APPLE COMPUTER INC.

DRAWING NUMBER

SCALE

SHT
NONE

REV.

051-6694

32

OF

B
45

CRITICAL

Q14
FDG6324L
+5V_MAIN SC70-6
R426
470K

1625_EXTVCC

G2

5%
1/16W
MF
402 2

3
2

D2

4 S2

1625_ENABLE_L
6

CRITICAL

D1

1625_ENABLE

5 G1
S1

Q14

FDG6324L
SC70-6

12.8V PBUS SUPPLY

C495
0.1UF

+24V_PBUS

20%
10V
2 CERM
402

PBUS HOLD-UP CAPS

CONNECT LTC1625 TK PIN AT TOP-SIDE FET

KEEP VIN/TK LOOP SHORT

+3V_PMU
R412
1
20%
10V
CERM 2
402

1%
1/16W
MF

402 2

39 32

1V20_REF

4
V+

SM

CRITICAL
1625_DIV

D4

1N914
SOT23

R432
1M 2

32

1%
1/16W
MF
402

1%
1/16W
MF
402 2

1
EXTVCC
U18
LTC1625

5%
1/16W
MF

39

V-

1
R433
10K

R402
0

2 402

U21
LMC7211

C510
0.1UF
20%

1625_VIN

1625_RUNSS
1625_COMP

C485 1

R3792

16
15
2
3
5
1625_FCB4
8

25V
CERM 2
603

1/16W
MF
402 1

SSOP

VIN
BG
TK CRITICAL
TG
SYNC VOSENSE
RUN/SS INTVCC
ITH
FCB
BOOST
VPROG
SW

4700pF
5%

4.99K
1%

50V
CERM 2
805

SGND

C462
470pF
10%

2 50V
CERM

C463 1
4700pF

D3
SM

SM

1625_BST_ESR 1
1
MBR0540 R401
1 C509
2.2
5%
0.22UF
1/16W
20%

10
13
7
11
12
14

2.2UF
10%
1812

805

39

1625_VSW

SO-8

XW4
SM

20%

C821
22uF
20%

2 35V
ELEC

SM-1

1 2 3
1

1
C765
33UF

R359
158K

C819
22uF
20%

2 35V
ELEC

SM-1

20%
25V
ELEC 2
SM1

1%
1/16W
MF
2 402

1206

10%
2 25V
CERM
402

20%
2 10V
CERM
1206

OMIT

C554
0.0047UF

C820
22uF

2 35V
ELEC

SM-1

C
C535
4.7UF

IRF7811W

C461
4.7UF

2.2UF
10%

2 50V
CERM

2 25V
CERM

NO STUFF

603

C604

20%
35V
ELEC 2
SM-1

+PBUS

Q60
1625_BG

1
C799
22uF

20%
35V
ELEC 2
SM-1

2 50V
CERM
1812

1812

20%

5%
1/16W
MF
2 402

2.2UF
10%

2 50V
CERM
1812

8.0UH-6.8A
1
SM1

5 6 7 8

R392
0

C569

1
C750
22uF

2.2UF
10%

CRITICAL

CRITICAL

1625_SGND

C626

2 50V
CERM
1812

L37

2 25V
CERM

MF

2 603

1625_BST

C801

C585
2.2UF
10%

1812

2 50V
CERM

2 3

2.2UF
10%

50V
2 CERM

CRITICAL

C787

2 50V
CERM
1812

IRF7805

PGND

5%
25V
CERM 2
603

39

1625_TG

C644
2.2UF
10%

Q59

COMP_RC
WHEN +24V_PBUS IS BELOW ~13.44V,
1625 IS SHUT-OFF

39

NO STUFF

5%
1/16W
MF
603 1

1
C537
0.1UF

1
R443
102K

5 6 7 8

1625_INTVCC

C769
33UF

20%
ELEC
SM1

2 25V

20%
ELEC
SM1

D27
SM

MBRS140T3
1
C536
4.7UF
20%

R360

1
C822
33UF

16.2K
1%

20%
25V
ELEC 2
SM1

1/16W
MF
2 402

25V
CERM 2
1206

C794
33UF

2 25V

1
C793
33UF

C758
33UF
20%

2 25V
ELEC

20%
25V
ELEC 2
SM1

SM1

1625_VFB

CRITICAL

BACKUP BATTERY / USB CONNECTOR

+5V_MAIN

F-RT-SM
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14

39 32

+ADAPTER

RIGHT_USB_DM
RIGHT_USB_DP

27 40

+BATT

2 39 +ADAPTER_ILIM

5%
1/4W
FF
1210

+PBUS
NEC_RIGHT_USB_OVERCURRENT

BACKUP_BATT

+5V_MAIN
D7

MBR0540

SOT23

U30

39

40

NC

D19
SM

+ADAPTER_OR_BATT 8
NC 2
NC 3

MBR0540+24V_PBUS

+4_85V_RAW
1
5NC
7

C625
C599 1
0.1UF 0.1UF

20%
2 50V
CERM
805

IF SUPERCAP BOM OPTION IS CHOSEN:


OUTPUT AT U30.1 IS 5.65V
INPUT AT U25.8 IS 5.4V

D11
SM

31 39

1%
1/16W
MF
402 2

2 50V
CERM

603

FB_4_85V_BU

C568
2.2UF

1%

+PBUS IS BOTH AN INPUT AND OUTPUT TO BUBBA


24V IS AN OUTPUT FROM BUBBA

LP2951
SOI-3.3V
IN
OUT
SENSE ERR
SHUT FDBK
GND
4

3V_PMU_SENSE

+4_85V_ESR 39
BACKUP_BATT
1

1/16W
MF
402 2

U25

8
2
NC 3

2 603

1
R541
100K

1210

39

R483MBR0520LT
1 C6131
5%
1/16W
470pF
MF
10%

R521
294K

6 CRITICAL
VTAP
+3V_PMU

(+4_6V_BU)
+4_6V_BU 34

BACKUP_BATT
1

BACKUP_BATT
1

20%
10V
CERM 2
402

MBR0520LT
1

R880
5%
1/4W BACKUP_BATT
FF

16

LP2951
SOI
IN
OUT
SENSE ERR
SHUT FDBK
GND

CRITICAL

PLUS5VTAP

3V_PMU_VTAP

SM

NC

D18

27 38 40

NC
+24V_PBUS_CONN

1N914

27 38 40

NEC_RIGHT_USB_PWREN 27

D17
SM

R508
390

PMU SUPPLY

BOOTSTRAP SYSTEM FROM


ADAPTER OR BATTERY

J11
54550-1490

20%

2 10V
CERM

C553
0.1UF

20%
2 10V
CERM
402

1
5NC
7

R468
1

5%
1/16W
MF

2 603

+3V_PMU_ESR
1

39

C584
10UF
20%

2 6.3V
CERM

805

12.8V REGULATOR

805

NOTICE OF PROPRIETARY PROPERTY

R871SUPERCAP

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

5%
1/4W
FF
1210

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

SUPERCAP

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


TABLE_5_ITEM

114S3575

RES,MF,1/16W/357K OHM,1%,0402,SMD

R521

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SCALE

SHT
NONE

REV.

051-6694

OF

33
1

45

3.3V/5V MAIN SUPPLY


+24V_PBUS

C516

2.2UF
10%

C508

39

22UF
20%
10V
CERM
1210

20%
6.3V
TANT
CASE-D4

CRITICAL
L38
4.7UH

R4561
0

D6
SM

MBR0540

R369
10
5%

10

5%
1/16W
MF

CRITICAL

1M
5%

1/16W
MF
402

39

C532

113K

C566

180pF

1%
1/16W
MF
402 2

5%
2 50V
CERM
402

20%
50V
CERM
402

C583 1
0.0022UF

C533 1
0.047UF

10%
50V
CERM 2
402

10%
16V
CERM 2
402

5V_ITH_RC

1%
1/16W
MF
402 2

36 34

+4_6V_BU 33

R506

470K
5%

DCDC_EN

31 30

R528
100K 2
1
PMU_POWER_UP_L

36 34

5%
1/16W
MF
402

SLEEP

40 36 34 31 23

2N7002DW

SOT-363

C623

0.01UF
20%

1 (2.99V)

402

0.01UF

R589

34

SLEEP_LS5 1 100K 2
5%
1/16W
MF
402

4
3

6
5
2
1

C659
10UF

20%
2 6.3V
CERM
805

R697
100K 2
1

TSOP

1/16W
MF
402

10UF
20%

2 6.3V
CERM
805

TSOP

SI3443DV

Q43

2 6.3V
POLY

SMD

1
R539
10

5%
1/16W
MF
402 2

C823
330UF
20%

1210

1
C826
22UF

5%
1/16W
MF
402 2

20%
10V
CERM 2
1210

20%
50V
CERM
402

C611
10%
50V
CERM
402

NO STUFF

R507

63.4K

180pF
5%
50V

CERM
402

C590 1
2

1%
1/16W
MF
402

5%
50V
CERM
402

R519

R514

12.7K

20K

1%
1/16W
MF
2 402

1%
1/16W
MF

2 402

3V_5V_OK
2

XW8
SM

23 36

C534
220PF
5%

2 25V
CERM

THERES NO 10UF INPUT CAP


BECAUSE Q21 IS PLACED AT
OUTPUT OF +3V_MAIN SWITCHER

+3V_MAIN

+3V_SLEEP

+3V_SLEEP
+5V_MAIN

Sleep

+3V_PMU+4_6V_BU

36

5%
1/16W
MF

5
+3V_SLP_OK_L

Q81
2N7002DW

VOLTAGE
2

+3V_SLP_ON

NO STUFF

6 NO STUFF
D

R309

40 36 34 31

3 NO STUFF

SOT-363

NO STUFF

R300
100K

R298
100K

1
R350
100K

40 36 34 31 23

C694
100uF

5%
1/16W
MF

Q9

2N7002DW
SOT-363

402

20%

2 10V
POLY

100K
MF
402

2
1

6
5
2
1

NO STUFF

C639

2200pF

SOT-363

SOT-363

3.3V/5V REGULATOR

402

NOTICE OF PROPRIETARY PROPERTY

Q9

C456

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

SOT-363

5%
50V
CERM
603

Q79
2N7002DW

D
G

NO STUFF

TSOP

Q28
2

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

ADDED FOR M10 POWER SEQUENCING

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

20%
16V
CERM
402

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-6694

D
SCALE

1) CPU PLL Config Control


2) INTREPID - IIC AND PCI PULL-UPS
3) MAP31 - 3V RAIL (IF USING D3COLD)
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
5) LVDS DDC PULL-UPS
6) DVI LEVEL SHIFTERS & PULL-UPS & HPD
7) SOUND BOARD
8) BOOT BANGER
9) HARD DRIVE (IF USING 3V LOGIC)
10) WIRELESS (IF POWERING OFF IN SLEEP)
11) PMU - IIC Pull-ups
12) PCI PULL-UPS

SI3443DV

0.01UF

SMD-3

2N7002DW

5%

1/16W

SLEEP_NET 2

5%
1/16W
MF

3
D

R367

100K2
1
SLEEP

+3V_SLEEP LOADS

Q79
2N7002DW

R296

40 36 34 31 23

SLEEP_LS5 34

28 35 36

SLEEP_LS5_EN_L

6
D

R368
SLEEP 1 100K 2

5%
1/16W
MF

4022

5%
1/16W
MF
2 402

SLEEP_NET_INV5

100K

3V_SLEEP_PWREN_L

1/16W
MF

2 402

R3771

5%
1/16W
MF

2 402

+5V_MAIN

470K
5%

(3V -> 5V)

SOT-363

5%
1/16W
MF
402

C825

SLEEP_L_LS5_EN_L

R538
100K

23 SLEEP

Q81
2N7002DW

2 402

2 402

Shutdown

+3V_PMU

5%
1/16W
MF

NO STUFF

100uF

SLEEP_L_LS5_NET

R310
100K

R308
100K

5%
1/16W
MF
402 2

6
5
2
1

C697

22UF
20%

3V_ITH_RC

C610

Run

2) DVI
SLEEP LEVEL SHIFTER
+5V_HD_SLEEP 3) TRACKPAD
4) FANS
+5V_MAIN
5) FIREWIRE PHY

+5V_SLEEP

3
5V_SLEEP_PWREN

C811

2 10V
CERM

1
R529
10

SOI

C609
0.01UF

SLEEP_L_LS5 19

5%

MBRS140T3

20%
2 10V
POLY
SMD-3

SI3443DV
Q32

1%
1/4W
FF
1206

402THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD


220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED

402

20%
10V
CERM
402

D34
SM

20%

0.1UF

100PF

2 16V
CERM

C700
1

SOT-363

1) OPTICAL DRIVE

Q72
SI4888DY1

0.0022UF

20%
10V
CERM
402

1/16W
MF
2 402

R515
0.005

3707_SGND

+5V_SLEEP LOADS

5V_HD_PWREN

20K
5%

Q23
2N7002DW

C598
0.22UF

0.1UF

PGND
20

CRITICAL

39

C620

C612

R467

0
0

+3V_PMU

20%
16V
CERM
402

1812

0.001uF

3V_RUNSS

PMU_POWER_UP_L
SLEEP DCDC_EN DCDC_EN_L State

+5V_MAIN
C662
1

5 6 7 8

3V_VOSNS
3V_ITH

PGOOD 28

DCDC_EN TRUTH TABLE

SOT-363

2 16V
CERM

SGND
9

VOSNS2 12
ITH2 11
RUN/ 15
SS2

2.2UF
10%

2 50V
CERM

+3V_MAIN
2

1 2 3

NO STUFF

Q23

Q25

3V_SNSM

C785

DCDC_EN_L

2N7002DW

3V_SNSP

38

3707_FSET

16V
CERM 2
402

LTC3707_START_RC 5

1N914
SOT23

19 30 35 40

38

SNS2- 13

SS1

3V_BOOST
3V_SW
3V_BG

SNS2+ 14

7 FCB
5 FREQSET
6 STBYMD

C560 1

D16

1/16W
MF

2 402

39

3 SNS14 VOSNS1
8 ITH1
1 RUN/

0.01UF
20%

5%
1/16W
MF
402

16
18
17
19

2 SNS1+

5V_VOSNS
5V_ITH
5V_RUNSS

1 2 3

20%
2 25V
CERM
805

1/16W
MF
603 2

2 50V
CERM
1812

3V_RSNS

IHLP-5050

2.2
5%

DCDC_EN_L

C576
100PF

39

R523
1M

39

5V_SNSP
5V_SNSM

LTC3707

SSOP
TG1
TG2
BOOST1
BOOST2
SW1
SW2
CRITICAL
BG1
BG2

3707_FCB

5%
2 50V
CERM
402

1/16W
MF
402 2

5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L


3V START TO TURN ON ~25MS AFTER DCDC_EN_L
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
POWERDOWN DELAY IS AROUND 4MS-15.6MS

15K
1%

21.5K

27
25
26
23

5V_TG
5V_BOOST
5V_SW
5V_BG

3707_STBY

R4811

R4621

R482

C779
2.2UF
10%

2 50V
CERM
1812

L41
4.7UH

MBR0540

U28

5%
1/16W
MF
2 603

0.001uF
NO STUFF

2.2UF
10%

SOI

D13
SM

3V_BOOST_ESR

24 10

EXT INT VIN 3.3


VCC VCC
VOUT

38

5%
1/16W
MF
2 402

22 21

38

R4631

1206

C800

CRITICAL

R520
1M

3 2 1

20%

2 50V
CERM
1812

Q71
SI4888DY

3V_TG

+5V_MAIN

R457
2.2

20%
25V
CERM 2
805

1/16W
MF

2 10V
CERM

C567
4.7UF

3707_INTVCC

C806
2.2UF
10%

CRITICAL

NC

0.22UF

SI4888DY
SOI

47K
5%
1/16W
MF
2 402

C545 1

Q52

2 402

2 402

R431

R477

5%
1/16W
MF
402 2

5V_BOOST_ESR

8 7 6 5

R378

20%
10V
CERM
1210

IHLP-5050

22UF

39

3 2 1

5 6 7 8

D22
SM
MBRS140T3

C760

CRITICAL
Q61
SI4888DY

1
1

8 7 6 5

2 50V
CERM
1812

SOI

5V_RSNS

1%
1/4W
FF
1206

C759

330UF

C770
2.2UF
10%

2 50V
CERM
1812

R731
0.005
1
2
C756 1

2.2UF
10%

2 50V
CERM
1812

+5V_MAIN

C763

2.2UF
10%

2 50V
CERM
1812

OF

34

B
45

VCORE POWER SEQUENCING


+5V_MAIN

39 16 15 8 7 6 5

5%
1/16W
MF
402 2

MAXBUS_SLEEP

DP2

1/16W
MF
2 402

470K

5%
1/16W
MF
402

5%
1/16W
MF
2 402

35 31 7

R329

470K

5%
1/16W
MF
2 402

5%
MF

2 402
2
3
5
6
11
10
14
13

VCORE_FAST<1>

35

VCORE_FAST<2>

35

VCORE_SLOW<3>

35

VCORE_FAST<4>

NO STUFF NO STUFF NO STUFF NO STUFF


1
1
1
1
1

R303

Q17

R313

5%
1/16W
MF
2 402

2N3904
SM

R327

470K

470K

5%
1/16W
MF
2 402

<D4>

5%

1/16W

MF

2 402

R323
470K

5%
1/16W
MF
2 402

R301

NO STUFF

R305

470K

5%
1/16W
MF
2 402

5%

NO STUFF NO STUFF
1

R330

CRITICAL

MF

MF

2 402

2 402

20%
2 16V
TANT
CASE-D

BAS16TW
SOT-363
3
DCDC_EN 4

R3491
20

5%
1/16W
MF
402 2

R384
0
1

CPU_VCORE_HI_OC

R397

5%
1/16W
MF
402

27.4K
1%
1/16W
MF

5%
1/16W
MF
402

402 2

VCC

603

2
5
10
(VCORE_GNDSNS)
11
16

14

INT_GPIO1_PU

35

R337
470K

39

5%
1/16W
MF

35
35
35

<D0>

VCORE_VID<0>
VCORE_VID<1>
VCORE_VID<2>
VCORE_VID<3>
VCORE_VID<4>

MAX1717 VID CAN TAKE 3.3V TO 5.5V 1INPUTS

R336
C529 1
0
0.01UF

5%
1/16W
MF
2 402

20%
16V
CERM 2
402

R4481

R3851

66.5K

12.7K

1%
1/16W
MF
402 2

NO STUFF

1%
MF
402 2

0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
NO CPUNO CPU 1

0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

VCORE_BST2

20%

5%
1/16W
MF
603

100K

CASE-D

LX

23

39

VCORE_LX

DL

14

39

VCORE_DL

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

21
20
19
18
17

D0
D1
D2
D3
D4

GND

13

C512 1

Q86

Q49

SO-8

C521

0.001UF

Q55
IRF7832

1 2 3

SO-8

VCORE_GNDDIV

Hi/Fast
1
1
0
0

Lo/Slow
0
1
1
0

CRITICAL

CRITICAL
B540C

1 SM

5%

CRITICAL

CRITICAL

C728 1

C734 1

C733 1

20%
2V 2
TANT
7343

20%
2V 2
TANT
7343

20%
2V 2
TANT
7343

220UF

D25

1/4W

220UF

1210

NO STUFF2

C731

220UF
20%

10%
50V
CERM
603

SM

C730

220UF
20%
2V

TANT
7343

C729

CRITICAL

C884
220UF

20%

20%

2 2V
TANT

7343

20%
2V
TANT 2
7343

220UF

20%

CRITICAL

1
C885
220UF

CRITICAL
1

2 2V
TANT

7343

0.0022uF

C732 1

220UF

2 2V
TANT

C764 1

CRITICAL

220UF

CRITICALCRITICAL

CPU_VCORE_SNUB

XW7

6 35 39 40

2 2V
TANT

7343

7343

2
Keep trace fat and short!!

R321
2K

1%
R1
1/16W
MF
2 402

PLACE THIS SHORT AT


PIN OF 1000uF CAP
CLOSEST TO CPU

NOTE: R310 (R2) NO STUFFED FOR NO OFFSET CASE

XW3
SM

39 35

39 35

1.320V -> 0.990V

1
VCORE_SNS

NO STUFF

VCORE_GNDDIV

R315
2.05K
1

FMAX CONNECTOR

CRITICAL
NO STUFF

1%
1/16W
MF
402

(CPU SPEC: 1.280V -> 0.980V)

J5

M-ST-SM-52465-1217

NO STUFF

VCORE_GNDSNS

R312
100
1

1/16W
MF
402

31

VCORE_GNDDIV_TEST
VCORE_GNDSNS_TEST
31 +3V_PMU_RESET
23 22 SOFT_PWR_ON_L
NC (RFU)

When A/B_ is high (fast): D4-D0 read as-is


When A/B_ is low (slow): <=1K-ohm -> 0
>=100K-ohm -> 1

1
2
3
4
5
6

12
11
10
9
8
7

VCORE_VID<0>
VCORE_VID<1>
VCORE_VID<2>
VCORE_VID<3>
VCORE_VID<4>

VCORE SUPPLY

35
35
35

NOTICE OF PROPRIETARY PROPERTY

35
35

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

If all pull-ups are >=100K and all


pull-downs are <=1K,
A
VB = V .

VCORE_GNDSNS

39

ROUTE AS DIFFERENTIAL PAIR

1.67GHZ

1%
1W
MF
2512

MF

1%

D<4..0>
1K PU
100K PU
100K PD
1K PD

NO STUFF

39 35

<=
>=
>=
<=

20%
6.3V 2
CERM
805

This allows for an offset to the ground sense to adjust the output voltage.
VREF = 2.0V WITH A 0.85 SCALE FACTOR, HENCE VOFFSET = 1.7V * (R1/(R1+R2)) AND VCORE = VDAC + VOFFSET.

35 39

5%
1/16W
MF
2 402

A/B_ =

2.2

1 2 3

25V
CERM 2
402

(WITH VCORE OFFSET)

R808
100K

1
C687
10UF

6.3V 2
CERM
805

R331
0.001

SM1

IRF7832
SO-8
1

1 2 3

C768 1
0.0047uF
10%

SOT-363

NO STUFF4

C3 1

10UF
20%

CPU_VCORE_SLEEP 5
Keep trace fat and short!!
CRITICAL

L36

CRITICAL
Q53

5%
1/16W
MF
402

20%
50V
CERM 2
402

6.3V 2
CERM
805

10UF
20%

GROUND SENSE VOLTAGE DIVIDER

R2

Q86
2N7002DW

FOR V-STEP:

CRITICAL

5 6 7 8

CRITICAL

VCORE_GND

C695 1

OMIT

Keep trace fat and short!!

5 6 7 8

IRF7832

R415
100 2
1

C4 1

6.3V 2
CERM
805

CPU_VCORE_SLEEP_F

SI7860DP
SO-8-PWRPK

Q54

C6 1

6.3V 2
CERM
805

XW15
SM

R732

39

20%
6.3V 2
CERM
805

10UF
20%

10UF
20%

20%
6.3V 2
CERM
805

1
C680
10UF

6.3V 2
CERM
805

CRITICAL

XW5
SM

6.3V 2
CERM
805

1
C285
10UF

C7 1

10UF
20%

CRITICAL

1 2 3

5 6 7 8

C116 1

20%
6.3V 2
CERM
805

10UF
20%

20%
6.3V 2
CERM
805

6.3V 2
CERM
805

1
C679
10UF

20%
6.3V 2
CERM
805

Connect MAX1717 GND pin 13


to GND at bottom-side FET

VCORE_OFFSET_SW

20%
TANT
CASE-D

2 16V

1
C274
10UF

C13 1

10UF
20%

6.3V 2
CERM
805

C234
10UF

20%
6.3V 2
CERM
805

6.3V 2
CERM
805

20%
6.3V 2
CERM
805

10UF
20%

AB_SEL_LOW
3
D

SOT-363

1
C674
10UF

C699
10UF

10UF
20%

VCORE_OFFSET_SW 1

2N7002DW

20%
TANT
CASE-D

2 16V

1 2 3

603

R376
162K

1
C682
10UF

1.2UH-18.3A

0.1UF
20%

1%
1/16W
MF
2 603

20%
TANT
CASE-D

2 16V

SO-8-PWRPK

C455
0.0047uF

C518

VCORE_OFFSET

VCORE_OFFSET_SW 1

R809

VCORE_SEL_OFF_PU6.04K

20%
6.3V 2
CERM
805

C693 1

1
C441
C444 1 C445
8.2UF 8.2UF 8.2UF

SI7860DP

10%
2 25V
CERM
402

VCORE_FB
VCORE_TIME 39
VCORE_VGATE 14

5%
1/16W
MF
402 2

VCORE_GNDA

39

R434
390K

5%
25V
CERM 2
402

603

40 39

220PF

C5

6.3V 2
CERM
805

CRITICAL
CRITICAL

CRITICAL

D
C689
10UF

20%
6.3V 2
CERM
805

2 16V

TANT

CRITICAL

NO STUFF

2 25V
CERM

CC

VCORE_SEL_ON

5%
1/16W
MF
402

REF
TON

R807
0

VCORE_DH

1%
1/16W
MF
2 402

5%
1/16W
MF
402

39

FB 4
TIME 3
VGATE 12

C2

20%
TANT
CASE-D

2 16V

R429
2.2 1

20%

5%
1/16W
MF
402
35 MAX1717_AB_SEL
VCORE_OFFSET_SW

0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

VCORE_CC

2 10V
CERM

R806
0

OUTPUT VOLTAGE
VDAC D3 D2 D1 D0

2.00 1.275
1.95 1.250
1.90 1.225
1.85 1.200
1.80 1.175
1.75 1.150
1.70 1.125
1.65 1.100
1.60 1.075
1.55 1.050
1.50 1.025
1.45 1.000
1.40 0.975
1.35 0.950
1.30 0.925

V+

VCORE_TON

C459

20%
2 16V
TANT
CASE-D

VCORE_VPLUS

39

+5V_MAINVCORE_OFFSET_SW
R805

D4=0D4=1

20%
TANT
CASE-D

L36

CPU_VCORE_SLEEP

1
C431
C443 1 C430
8.2UF 8.2UF 8.2UF

Q50

39

1UF

1/16W

VCORE_REF

C432
8.2UF

BST 22
DH 24

40 39 35 6 5

10UF
20%

2 16V

CRITICAL
1

MBR0530

VDD

SKP/SDN
FBS
ILIM
GNDS
A/B

5%
1/16W
MF

CRITICAL

CRITICAL

2 402

35

MAX1717_AB_SEL

NO STUFF

5%
1/16W
MF
402

35

VCORE_ILIM

39

D2
SM

15

U20
MAX1717
QSOP

10V
CERM 2

(VCORE_SNS)

R366
0

39

20%

VCORE_SHDN_L

1UF
20%
603

1UF

C498

2 10V
CERM

R4071 C507 1
0

NO STUFF+3V_MAIN

35 31 7

PLACE C423 CLOSE 1


TO PINS 15 & 13!!

VCORE_BOOST

DP2

40 34 30 19

BOM OPTION

R292

CRITICALCRITICAL CRITICAL CRITICAL

C427
8.2UF

CRITICAL

5%
1/16W

VCORE_VCC

IND,PWR,1.0UH,20,20.5A,SMD

2 402

5
2
SLEEP_L_LS5

39

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

Keep trace fat (40-100 mils) and short!!


+PBUS

SOT-363

36 34 28 19

DESCRIPTION

SEL = 0; Y1=A1
SEL = 1; Y1=B1

MF
2 402

1
TABLE_5_HEAD

QTY

VCORE_VID<4>

+5V_MAIN

DP2
BAS16TW

5%
1/16W
MF

2 402

VCORE_VID<3>

1K

<D2><D1> <D4> <D3> <D2> <D1>

<D3>

2 402

VCORE_VID<2>

R302

5%
1/16W
MF
2 402

1/16W

VCORE_VID<1>

GND

5%

1/16W

SEL
OE

NO STUFF

R326

470K

20%
10V
CERM
402

SYM_VER-2

1
VCORE_MUX_SEL
15
40 VCORE_MUX_EN

5%
1/16W
MF
402

SM

VCORE_FAST<3>

VCORE_SLOW<4>

R318
0

CPU_VCORE_HI_OC 1

35

16

VCC
NO STUFF
U11
PI3B3257 4
35
A1 QSOP Y1
B1
7
35
Y2
A2
B2
9 35
A3
Y3
B3
12 35
A4
Y4
B4

1/16W

VCORE_FAST<1> 35
PART#
NO_4XVCORE
1
35
152S0242
R288 VCORE_FAST<2>
NO_4XVCORE
0
VCORE_FAST<3> 35
5%
1
R289
1/16W
NO_4XVCORE
MF
0
VCORE_FAST<4> 35
402
2
5%
1
R290
1/16W
MF
NO_4XVCORE
0

0.1UF

10K

5%
1/16W
MF
2 402

NO STUFF
C439

NO STUFF

R322

R325

VCORE_SLOW<1>

2N3904

5%
1/16W
MF

R304

470K

2 402

R876

Q12

5%
1/16W

R324

VCORE_SLOW<2>

SOT-363

5%

R356
100K

1%
1/16W
MF
BAS16TW 2 402
6

CPU_VCORE_SEQ 1

5%
1/16W
MF
2 402

5%
1/16W
MF
402 2

CPU_VCORE_SEQ_L

402 2

R328

470K

5%
1/16W
MF
2 402

NO STUFF

MF

R314

470K

CPU_VCORE_PWR_SEQ

1
R267
10K

NO STUFF
1 NO STUFF
1NO STUFF
1NO STUFF NO STUFF1

R297

CPU core follows CPU I/O voltage


(approx. 7ms delay)

1
R408
R3981
100K 100K

1.300V -> 0.975V

+3V_MAIN

(WITHOUT VCORE OFFSET)

1.67GHZ

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT

NONE

REV.

051-6694 B
35
45
1
OF

+1_5V_SLEEP LOADS
1) AGP I/O - IF USING D3COLD
2) MAXBUS I/O - IF 1.5V INTERFACE

5%
1/16W
MF
603
39

1.5V/2.5V SWITCHER

+1_5V_SLEEP

+1_5V_SLEEP_VIN

+1_5V_MAIN LOADS

Q46

SI3446DV
NO STUFF

1
2
5
6

R712
0 2
1

+1_5V_LDO

5%
1/16W
MF
603

1_5V_SLEEP_EN_L

R461
100K

36

C723 1
10UF
20%

5%
1/16W
MF
402 2

C726

2200pF
5%

6.3V 2
CERM
805

2 50V
CERM

DP3

BAS16TW
SOT-363

36 34 23

R421
0

DP3

3V_5V_OK

R607
100K
5%
1/16W
MF

34

DCDC_EN_L

MAX1715_ON_RC1

36

34

SLEEP_L_LS5_NET

39

2_5V_ILIM

5%
1/16W
MF
402

CRITICAL

4.7UF
20%
25V
CERM

2N7002DW

2
1

SOT-363

R4181

1206

4.7UF
20%
25V
CERM 2
1206

8 7 6 5

10%

2 25V
X7R

CRITICAL

402

0.1UF
20%

39

1_5V_BST

36
39

C740
10UF
20%

2 6.3V
CERM

805

20%

20%

2 6.3V
TANT

R424
10K

SMD-1

1%
1/16W
MF
2 402

D23
SM

2 6.3V
TANT

SMD-1

Q56

36 39

V+
NC_15
NC_23
NC_28

4
15
23
28

BST2

18

DH1 CRITICAL DH2 17

27

LX1
DL1

DL2

19

TON

PGND

22

1
7
9

OUT1
PGOOD
REF

OUT2 14

FB1
AGND

FB2 13
THRML

SKIP

NC
NC
NC

MBRS130LT3

0.0022UF
10%
XW6 OMIT
2 50V
CERM
SM

20%
2 10V
CERM
603

402

39
36

20%

2_5V_BST

603

20%

2 25V
CERM

MAX1715_GND

2_5V_DH

36

39

5%
1/16W
MF

3V_5V_OK_INV

Q83
2N7002DW

1/16W
MF
2 402

R420

R616

CRITICAL

0
5%
1/16W
MF
2 402

Q68
39

SO-8

NO STUFF

C907

0.022UF
20%

IRF7811W

2_5V_DL
1

R798
0

1
3

Q83
2N7002DW

36 34 23

3V_5V_OK5

SOT-363

R627
15K
1%

1/16W

C890

MF
2 402

100PF
LTC3412_ITH_RC
5%

2 50V
CERM

402

C683

5%
1/16W
MF
2 402

C892
470PF
10%

2 50V
CERM

402

C809
10UF

D33
SM

20%
2 6.3V
CERM
805

MBRS130LT3

POSCAPS POSCAPS POSCAPS


1
1
1
C780
C788
C782
150UF
150UF
150UF

20%
2 6.3V
TANT
SMD-1

20%
2 6.3V
TANT
SMD-1

20%
6.3V

2 TANT

SMD-1

LTC3412
TSSOP

LTC3412_GND

MF

R672
1%
1/16W

MF

B
+1_8V_SLEEP
2 3 6 7
CRITICAL

SLEEP

R190
100K
1

LTC3412_VFB

110K
1%

R800
75K

1%
1/16W
MF
2 402

22PF

5%
1/16W
MF
2 402

5%
2 50V
CERM
402

R803
232K

1%
1/16W
MF
2 402

R801
309K

4) OPTIONAL VIDEO MEMORY (M10 PRO ONLY)

C235
2200pF
2

R610
100K

1
2
SLEEP_L_LS5_INV
5%
1/16W
MF
402

5%
NO STUFF 50V

C887 CERM
603
1000PF
10%

2 25V
X7R

402

1.5V/1.8V/2.5V SUPPLIES

22UF

C677
22UF

2) CPU JTAG & MaxBus Pull-ups


3) CPU PLL Config Straps

805

36

+1_8V_SLEEP LOADS
1) MPC7450 - MAXBUS I/O - IF 1.8V INTERFACE

1 5 8

NO STUFF

C894

TSSOP

20%
6.3V 2
CERM

+1_8V_MAIN

SI6467BDQ

1
C276
10UF

1_8V_SLEEP_PWREN_L

THERM
SGND PGND PAD

R799

1/16W
MF
2 402

C893

39

Q84
4

20%
2 6.3V
CERM
1206

NOTICE OF PROPRIETARY PROPERTY

20%

2 6.3V
CERM

1%
1/16W
MF

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

1206

2 402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

OMIT

XW1
SM
1

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE

APPLE COMPUTER INC.

D
SCALE

DRAWING NUMBER

REV.

051-6694 B
36
45
1
SHT

NONE

1/16W

MAX1715_FB2 36

2 402

1) INTREPID PLLS

LTC3412_PGOOD
CRITICAL
5 RT
7 RUN/SS PGOOD 2
L75
1.0UH-3.5A
2
3 ITH CRITICAL
101_8V_SW1
SM
6 SYNC/MODE
11
SW 14
4 VFB
15

LTC3412_ITH
LTC3412_SYNC

1000PF
5%
603

1%

2 402

10K

16V
CERM
402

5%
1/16W
MF
402

R802
100K

U58

LTC3412_VFB_DIV

2 25V
CERM

15.4K

1 2 3

+1_8V_MAIN LOADS

SVIN PVIN

BURST MODE
NO STUFF
1

SOT-363

5 6 7 8
1

9
16

R727 R797
4.7M
0
5%
5%

6
D

+1_8V_MAIN

2 402

+2_5V_MAIN

L45
4.7UH

29

MAX1715_GND

LTC3412_RT
LTC3412_RUNSS

R810
100K

CRITICAL

2_5V_LX

1/16W
MF
2 402

1206

SM4

17

20%
6.3V 2
CERM
1206

20%

1 2 3

MAX1715_FB2

1UF

6.3V 2
CERM
1206

402

2 25V
CERM

SM

C499

8
12
13

22UF
20%

10%

Q69
IRF7805

603

39

1.8V SWITCHER

1000PF

CRITICAL

0.1UF

CONTINUOUS MODE

C93 1
C891 22UF

C888

2 25V
X7R

5 6 7 8

C580

40 36 34 31 23

100K

1
2
SLEEP_L_LS5_INV
5%
1/16W
CRITICAL
MF
402
1 C582
4.7UF

5%
50V
CERM
603

2 39 2_5V_BOOST

CHANGE R424 BACK TO 10K, 1%, AND STUFF 5.11K FOR 1.5V OPERATION
CONNECTING 1_5V_FB TO GND, FORCES 1.8V OUTPUT

+3V_MAIN

1
NO STUFF

R479
4.7
5%
1/16W
MF

1_5V_DL

C908

3 2 1

39

NO STUFF
1

4.7UF
1206

39

IRF7811W
SO-8

C559

2 25V
CERM

16

+2_5V_MAIN

0
5%
1/16W
MF
402

CRITICAL

1_5V_FB

26

R4221

8 7 6 5

1%
1/16W
MF
2 402

C751
C745
150UF 150UF

BST1

NO STUFF

R425
5.11K

25

1_5V_FB

POSCAPS POSCAPS

ILIM1
ILIM2
ON1
ON2

LX2

39

CRITICAL

3
12
10
11

1_5V_2_5V_OK
MAX1715_REF

1_5V_LX

2200pF

R611

MAX1715
QSOP

39

1_5V_DH

3 2 1
2

1 5 8

10UF

2_5V_SLEEP_PWREN_L

36

MAX1715_SKIP

TSSOP

C709

VDD

U22

24

39

C705

SOT-363

20

VCC

39

SM4

21

+1_5V_MAIN
39

Q85
SI6467BDQ

NO STUFF

5%
1/16W
MF
603

C575

SM

L35
4.7UH

39

603

IRF7805
CRITICAL

2 25V
CERM

Q57

+1_5V_MAIN

100K 2

20%
6.3V 2
CERM
805

+PBUS

1%
1/16W
MF
2 402

R493
4.7

1_5V_BOOST

39

SLEEP 1

DP3
BAS16TW

R423
158K

158K

1000PF

+PBUS

1_5V_ILIM

C519 1

CRITICAL

R709
5%
1/16W
MF
402

1/16W
MF

+2_5V_SLEEP

2 3 6 7

40 36 34 31 23

1%
1/16W
MF
402 2

C886

R419

2 402

CRITICAL

C544 1

Q82

100K 2
34
1
SLEEP_L_LS5

39

MAX1715_GND 36

20%
10V
CERM
805

MAX1715_TON

SOT-363

R417

19
28
35

2
NO STUFF

SM

2N7002DW

SLEEP_L_LS5_INV 5

20%
10V
CERM
805

C603
2.2UF

MAP31 - FBCORE/FBIO IF USING D3HOT


GIGABIT ETHERNET - AVDDL
DDR SODIMMS - CORE/IO
DDR MUXES
CLOCK SLEWING I/O
PCI1510 CORE

0
5%

39

+PBUS

Q82

Q19

5%
1/16W
1 C531
MF
402
0.01UF
402
DIODE
PROVIDE
PROVIDE
QUICK SHUT-DOWN
20%
2
16V
POWER DOWN DELAY 1.5MS TO 23.5MS
CERM
1_5V_SLEEP_EN_L
36
402

2 402

C581
2.2UF

2N7002

330K 2

3
D

R450

1)
2)
3)
4)
5)
6)

MAX1715_VCC

39

5%
1/16W
MF
2 402

SOT-363

+5V_MAIN

5%
1/16W
MF
402

NO STUFF

BAS16TW

+2_5V_MAIN

+2_5V_MAIN LOADS

R480
20
1

603

R455
100K
5%
1/16W
MF

1) FBCORE/FBIO IF USING D3COLD


2) INTREPID MEMORY I/O

THERES 100K PULL-UP ON PG 31 ALREADY

+2_5V_SLEEP LOADS

+5V_MAIN

1) INTREPID CORE
2) AGP I/O IF USING D3HOT

TSOP

R715
0 2

+1_5V_MAIN

OF

GROUP

DIGITAL SIGNALS

MAXBUS

GROUP 0

GROUP 1

GROUP 2/3

DDR
RAM
GROUP 4/5

B
GROUP 6

GROUP 7

ADDR

CONTROL

7
SIG_NAME

MAX_VIAS
MAX_EXPOSED_LENGTH
STUB_LENGTH
NET_SPACING_TYPE
NO_TEST PULSE_PARAM

CPU_AACK_L
CPU_ADDR<0..31>
CPU_ARTRY_L
CPU_BG_L
CPU_BR_L
CPU_CI_L
CPU_DATA<0..31>
CPU_DATA<32..63>
CPU_DBG_L
CPU_DTI<0..2>
CPU_DRDY_L_UF
CPU_DRDY_L
CPU_GBL_L
CPU_HIT_L
CPU_QACK_L
CPU_QREQ_L
CPU_TA_L
CPU_TBST_L
CPU_TEA_L
CPU_TS_L
CPU_TSIZ<0..2>
CPU_TT<0..4>
CPU_WT_L

250.0000
250
250.0000
250.0000
250.0000
250.0000
250
250
250.0000
250

5
5
5
5
5

250.0000
250.0000
250.0000
250.0000
250.0000
250.0000
250.0000
250.0000
250.0000
250
250
250.0000

5
5

5
5
5

MEM_DATA<7..0>
RAM_DATA_A<7..0>
RAM_DATA_B<7..0>
MEM_DQS<0>
RAM_DQS_A<0>
RAM_DQS_B<0>
MEM_DQM<0>
RAM_DQM_A<0>
RAM_DQM_B<0>
MEM_DATA<15..8>
RAM_DATA_A<15..8>
RAM_DATA_B<15..8>
MEM_DQS<1>
RAM_DQS_A<1>
RAM_DQS_B<1>
MEM_DQM<1>
RAM_DQM_A<1>
RAM_DQM_B<1>
MEM_DATA<31..16>
RAM_DATA_A<31..16>
RAM_DATA_B<31..16>
MEM_DQS<3..2>
RAM_DQS_A<3..2>
RAM_DQS_B<3..2>
MEM_DQM<3..2>
RAM_DQM_A<3..2>
RAM_DQM_B<3..2>
MEM_DATA<47..32>
RAM_DATA_A<47..32>
RAM_DATA_B<47..32>
MEM_DQS<5..4>
RAM_DQS_A<5..4>
RAM_DQS_B<5..4>
MEM_DQM<5..4>
RAM_DQM_A<5..4>
RAM_DQM_B<5..4>
MEM_DATA<55..48>
RAM_DATA_A<55..48>
RAM_DATA_B<55..48>
MEM_DQS<6>
RAM_DQS_A<6>
RAM_DQS_B<6>
MEM_DQM<6>
RAM_DQM_A<6>
RAM_DQM_B<6>
MEM_DATA<63..56>
RAM_DATA_A<63..56>
RAM_DATA_B<63..56>
MEM_DQS<7>
RAM_DQS_A<7>
RAM_DQS_B<7>
MEM_DQM<7>
RAM_DQM_A<7>
RAM_DQM_B<7>
MEM_ADDR<12..0>
RAM_ADDR<12..0>
MEM_BA<1..0>
RAM_BA<1..0>
MEM_CS_L<3..0>
RAM_CS_L<3..0>
MEM_CKE<3..0>
RAM_CKE<3..0>
MEM_RAS_L
RAM_RAS_L
MEM_CAS_L
RAM_CAS_L
MEM_WE_L
RAM_WE_L
MEM_MUXSEL_H<1..0>
MEM_MUXSEL_L<1..0>
RAM_MUXSEL_H
RAM_MUXSEL_L

4
4
4

TOTAL LENGTH CONTROLLED BY

4
4
4
4
4
4
4
4
TOTAL LENGTH CONTROLLED BY
4
4
4
4
4
4
4
4
TOTAL LENGTH CONTROLLED BY
4
4
4
4
4
4
4
4
4
TOTAL LENGTH CONTROLLED BY
4
4
4
4
4
4
4
4
4
TOTAL LENGTH CONTROLLED BY
4
4
4
4
4
4
4
TOTAL LENGTH CONTROLLED BY
4

4
4
4
4
6
4
6
4
6
4
6
4

10 MIL SPACING

GROUP

INTREPID
CLOCKS

5 8

83 MHZ
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING

5 8
5 8
5 8
5 8
5 8

83 MHZ
83 MHZ
10 MIL SPACING

6 8
6 8
5 8
5 8

10 MIL SPACING
10 MIL SPACING

5 8
5 8

10
10
10
10
10

MIL
MIL
MIL
MIL
MIL

SPACING
SPACING
SPACING
SPACING
SPACING

5 8
5 8
5 8
5 8
5 8
5 8

10 MIL SPACING

5 8
5 8
5 8
5 8

200
200
200
SPREADSHEET
200
200
200
200
200
200
200
200
200
SPREADSHEET
200
200
200
200
200
200
200
200
200
SPREADSHEET
200
200
200
200
200
200
200
200
200
SPREADSHEET
200
200
200
200
200
200
200
200
200
SPREADSHEET
200
200
200
200
200
200
200
200
200
SPREADSHEET
200
200
200
200
200
200

167 MHZ
167 MHZ
167 MHZ

10 11
10 11
9 10
10 11
10 11
9 10
10 11
10 11

167 MHZ
167 MHZ
167 MHZ

INT_REF_CLK_OUT
INT_REF_CLK_IN
CLK66M_GPU_AGP_UF
CLK66M_GPU_AGP
INT_AGP_FB_OUT
INT_AGP_FB_IN
CLK33M_CBUS_UF
CLK33M_CBUS
CLK33M_AIRPORT_UF
CLK33M_AIRPORT
CLK33M_USB2_UF
CLK33M_USB2
INT_PCI_FB_OUT
INT_PCI_FB_IN

9 10

MAX VIASMAX EXPOSED LENGTH


STUB_LENGTH NET_SPACING_TYPE
PULSE PARAM
4
3
3
3
3
3
3
3
3
3
3
3
3
3
3

DDRCLK_A0
DDRCLK_A0
DDRCLK_A1
DDRCLK_A1
DDRCLK_B0
DDRCLK_B0
DDRCLK_B1
DDRCLK_B1

200.0000

10
10
10
10
10
10
10
10

MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL

SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING

200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000

10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10

MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL

SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING

200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000

10
10
10
10
10
10
10
10
10
10
10
10
10
10

MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL

SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING

200.0000

3
3
3
3
3
3

4
4

SHOULD BE AT MOST 4 VIAS FOR6 CLK


SHOULD BE AT MOST 4 VIAS FOR6 CLK
SHOULD BE AT MOST 4 VIAS FOR6 CLK
3

8
8
8
8
8
9

9
9
9
9
9
9
9
9 11
9 11
9 11
9 11
9 11
9 11
9 11
9 11

14
14
12
12 18
12
12
12
12 17
12
12 25 40
12

12 27
12
12

10 11

10 11
10 11
9 10

MAP31

10 11
10 11

167
167
167
167
167
167
167
167
167
167
167
167
167
167
167
167
167
167
167
167
167

MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ
MHZ

9 10
10 11
10 11
9 10
10 11
10 11
9 10

CRYSTALS

10 11
10 11
9 10
10 11
10 11
9 10
10 11
10 11
9 10
10 11
10 11

GPU_CLK27M_OUT
GPU_CLK27M_UF
GPU_SSCLK_UF
GPU_SSCLK_IN
GPU_FBCLK0
GPU_FBCLK0_L
GPU_FBCLK1
GPU_FBCLK1_L
GPU_DVO_CLKP

10
10
10
10
10
10
10
10
10

MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL

SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING

CLK27M_GPU_XOUT
CLK27M_XTAL_IN
CLK27M_GPU_XIN
CLK18M_INT_XIN
CLK18M_INT_XOUT
CLK18M_XTAL_IN
CLK18M_INT_EXT
CLK25M_ENET_XIN
CLK25M_ENET_XOUT
NEC_XT1
NEC_XT2

10
10
10
10
10
10
10
10
10
10
10

MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL
MIL

SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING

THERES ANOTHER 280MIL LEG

19

14
14
14
14
28

28
27
27

9 10
10 11

SOUND

10 11

SND_SCLK
SND_CLKOUT

200.0000
200.0000

10 MIL SPACING
10 MIL SPACING

14 26 40
14 26 40

9 10

ETHERNET

10 11

MARVELL

10 11
9 10
10 11
10 11

167 MHZ
167 MHZ
167 MHZ

9 10
10 11
10 11

CLKENET_PHY_RX
CLKENET_LINK_RX
CLKENET_PHY_GBE_REF
CLKENET_LINK_GBE_REF
CLKENET_PHY_TX
CLKENET_LINK_TX
CLKENET_LINK_GTX
CLKENET_PHY_GTX

200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000
200.0000

3
3
5
3

28

10 MIL SPACING

13 28
28

10 MIL SPACING

13 28
28

10 MIL SPACING

13 28
13

10 MIL SPACING

13 28

9 10

FIREWIRE

10 11
10 11
9 10
10 11
10 11
9

CLKFW_PHY_PCLK
CLKFW_LINK_PCLK
CLKFW_PHY_LCLK
CLKFW_LINK_LCLK
FW_XI
FW_OSC

200.0000
200.0000
200.0000
200.0000
200.0000
200.0000

3
3

29

10 MIL SPACING
10 MIL SPACING

13 29
13 29
13

10 MIL SPACING
10 MIL SPACING

29
29

9 11
9

200

9 11

SIGNAL CONSTRAINTS - PAGE 1

200

9 11
9

200

NOTICE OF PROPRIETARY PROPERTY

9 11
9

200.0000

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

9 11

200.0000

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

9 11

II NOT TO REPRODUCE OR COPY IT

200.0000

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

9 11

3
3
5
5

5 8
8

10 11

SIZE

9 10
9 10

APPLE COMPUTER INC.

10

DRAWING NUMBER

SCALE

10

REV.

051-6694

SHT
NONE

9 10

83 MHZ
200

9 10

SIG_NAME
SYSCLK_CPU_UF
SYSCLK_CPU
INT_CPUFB_OUT
INT_CPUFB_OUT_SHORT
INT_CPUFB_OUT_NORM
INT_CPUFB_IN_NORM
INT_CPUFB_LONG
INT_CPUFB_IN
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B1_L

CLOCK LINE CONSTRAINTS

37

OF

B
45

Digital Signals (contd)

GROUP

SIG_NAME

AGP
AGP BYTES 0-1

AGP BYTES 2-3

AGP SIDEBAND

AGP CONTROL

DVO

7
DELAY_RULE

MAX_VIASMAX_EXPOSED_LENGTH
STUB_LENGTH NET_SPACING_TYPE

AGP_AD<15..0>
AGP_CBE<1..0>
AGP_AD_STB<0>
AGP_AD_STB_L<0>
AGP_AD<31..16>
AGP_CBE<3..2>
AGP_AD_STB<1>
AGP_AD_STB_L<1>
AGP_SBA<7..0>
AGP_SB_STB
AGP_SB_STB_L
AGP_FRAME_L
AGP_IRDY_L
AGP_TRDY_L
AGP_DEVSEL_L
AGP_STOP_L
AGP_PAR
AGP_REQ_L
AGP_GNT_L
AGP_RBF_L
GPU_DVOD<0..23>
GPU_DVO_HSYNC
GPU_DVO_VSYNC

5
5
5
5
5
5
5
5
5

6
6
6

ULTRA ATA-100

EIDE
INTREPID

B
OPTICAL

8 MIL SPACING
8 MIL SPACING

ETHERNET

12 18
12 18
12 18
12 18

66 MHz
8 MIL SPACING
8 MIL SPACING

12 18
12 18
12 18
12 18
12 18
12 18
12 18
12 18
12 18
12 18

FIREWIRE

12 18
12 18
19 20

19 20

MIN_DAISY_CHAIN
MIN_DAISY_CHAIN
MIN_DAISY_CHAIN
MIN_DAISY_CHAIN
MIN_DAISY_CHAIN
MIN_DAISY_CHAIN
MIN_DAISY_CHAIN
MIN_DAISY_CHAIN

UIDE_DATA<15..8>
UIDE_DATA<7>
UIDE_DATA<6..0>
UIDE_ADDR<2..0>
UIDE_RST_L
UIDE_DIOW_L
UIDE_DIOR_L
UIDE_DMACK_L
UIDE_CS0_L
UIDE_CS1_L
UIDE_DMARQ
UIDE_IOCHRDY
UIDE_INTRQ
HD_DATA<15..0>
HD_ADDR<2..0>
HD_RESET_L
HD_DIOW_L
HD_DIOR_L
HD_DMACK_L
HD_CS0_L
HD_CS1_L
HD_DMARQ
HD_IOCHRDY
HD_INTRQ

5
5
5
5
5
5
5
5
5
5

200
NEED TO MATCH DELAY TO 250
200
200
200
200.0000
200.0000
10 MIL SPACING
200.0000
200.0000
200.0000
200.0000
200.0000
10 MIL SPACING
200.0000
200.0000
200
TOTAL UIDE+HD SKEW <500MIL
200
200.0000
200.0000
10 MIL SPACING
200.0000
200.0000
200.0000
200.0000
200.0000
10 MIL SPACING
200.0000

33 MHz
33 MHz

9 12 17 25 27 40
12 17 25 27 40
12 17 25 27 40
12 17 25 27 40
12 17 25 27 40
12 17 25 27 40
12 17 25 27 40
12 17 25 27 40

100 MHZ

13 25
13 25

100 MHZ
100 MHZ

LVDS
LOWER

13 25
13 25
13 25
13 25
13 25
13 25

UPPER

13 25
13 25
13
13 25
13

100 MHZ
100 MHZ

25
25
25

TMDS

25
25
25
25
25
13 25
25
13 25

EIDE_DATA<15..0>
EIDE_ADDR<2..0>
EIDE_CS0_L
EIDE_CS1_L
EIDE_RD_L
EIDE_WR_L
EIDE_IOCHRDY
EIDE_INT
EIDE_RST_L
EIDE_DMACK_L
EIDE_DMARQ
EIDE_OPTICAL_DATA<15..0>
EIDE_OPTICAL_ADDR<2..0>
EIDE_OPTICAL_CS0_L
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_RD_L
EIDE_OPTICAL_WR_L
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_INT
EIDE_OPTICAL_RST_L

33 MHZ
33 MHZ

13 25
13 25

USB

13 25
13 25
13 25
13 25
13 25
13 25
13 25
13 25
13 25

33 MHZ
33 MHZ

25 40
25 40
25 40
25 40
25 40
25 40
25 40
25 40
25 40
25 40
25 40

ENET_LINK_RXD<7..0>
ENET_RX_DV
ENET_RX_ER
ENET_PHY_TXD<7..0>
ENET_LINK_TXD<7..0>
ENET_PHY_TX_ER
ENET_LINK_TX_ER
ENET_PHY_TX_EN
ENET_LINK_TX_EN

FW_LINK_DATA<7..0>
FW_PHY_DATA<7..0>
FW_LINK_CNTL<1..0>
FW_PHY_CNTL<1..0>
FW_LINK_LREQ
FW_PHY_LREQ
FW_PINT

12 18
12 18

8 MIL SPACING
8 MIL SPACING

POWER

13 28

SUPPLIES

13 28
13 28

13 28
13

13 28
13

13 28
13

ENET_MDIO
ENET_MDC
ENET_COL
ENET_CRS
FIREWIRE MII

GROUP

THERMOSTAT

13 28
13 28
13 28
13 28

5
5

SIG_NAME

DIFFERENTIAL_PAIR

MAX_EXPOSED_LENGTHNET_SPACING_TYPEMAX_VIAS

12 18

12 18

66 MHz
66 MHz

Differential Signals

PULSE_PARAM

66 MHz
66 MHz

EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_DMA_RQ

ETHERNET MII

NO_TEST

19 20

PCI_AD<31..0>
PCI_CBE<3..0>
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_DEVSEL_L
PCI_STOP_L
PCI_PAR

PCI

100
100
100
100
100
100
100
100
100
100.0000
100.0000
250.0000
250.0000
250.0000
250.0000
250.0000
250.0000
285.0000
250.0000
250.0000
250

13 29
29
13 29
29
13
13 29

MDI_M<0>
MDI_P<0>
MDI_M<1>
MDI_P<1>
MDI_M<2>
MDI_P<2>
MDI_M<3>
MDI_P<3>
RJ45_DN<0>
RJ45_DP<0>
RJ45_DN<1>
RJ45_DP<1>
RJ45_DN<2>
RJ45_DP<2>
RJ45_DN<3>
RJ45_DP<3>
FW_TPA0N
FW_TPA0P
FW_TPB0N
FW_TPB0P
FW_TPI0N
FW_TPI0P
FW_TPO0N
FW_TPO0P
FW_TPA1N
FW_TPA1P
FW_TPB1N
FW_TPB1P
FW_TPI1N
FW_TPI1P
FW_TPO1N
FW_TPO1P
CLKLVDS_LN
CLKLVDS_LP
LVDS_L0N
LVDS_L0P
LVDS_L1N
LVDS_L1P
LVDS_L2N
LVDS_L2P
CLKLVDS_UN
CLKLVDS_UP
LVDS_U0N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
TMDS_CONN_CLKN
TMDS_CONN_CLKP
TMDS_CLKN
TMDS_CLKP
TMDS_DN<0>
TMDS_DP<0>
TMDS_DN<1>
TMDS_DP<1>
TMDS_DN<2>
TMDS_DP<2>
NEC_USB_DAM
NEC_USB_DAP
USB_DEM
USB_DEP
NEC_USB_DBM
NEC_USB_DBP
USB_DFM
USB_DFP
BT_USB_DM
BT_USB_DP
NEC_USB_RSDM1
NEC_USB_RSDP1
NEC_USB_RSDM2
NEC_USB_RSDP2
MODEM_USB_DM
MODEM_USB_DP
LEFT_USB_DM
LEFT_USB_DP
RIGHT_USB_DM
RIGHT_USB_DP
1772_CSSN
1772_CSSP
1772_CSIN
1772_CSIP
3V_SNSM
3V_SNSP
5V_SNSM
5V_SNSP
THERM1_DM
THERM1_DP
THERM2_DM
THERM2_DP
THERM1_M_DM
THERM1_M_DP
THERM2_M_DM
THERM2_M_DP
THERM1_A_DM
THERM1_A_DP
THERM2_A_DM
THERM2_A_DP

ENET_MDI0
ENET_MDI0
ENET_MDI1
ENET_MDI1
ENET_MDI2
ENET_MDI2
ENET_MDI3
ENET_MDI3
RJ45_DP0
RJ45_DP0
RJ45_DP1
RJ45_DP1
RJ45_DP2
RJ45_DP2
RJ45_DP3
RJ45_DP3
FW_TPA0
FW_TPA0
FW_TPB0
FW_TPB0
FW_TPI0
FW_TPI0
FW_TPO0
FW_TPO0
FW_TPA1
FW_TPA1
FW_TPB1
FW_TPB1
FW_TPI1
FW_TPI1
FW_TPO1
FW_TPO1
CLKLVDS_L
CLKLVDS_L
LVDS_L0
LVDS_L0
LVDS_L1
LVDS_L1
LVDS_L2
LVDS_L2
CLKLVDS_U
CLKLVDS_U
LVDS_U0
LVDS_U0
LVDS_U1
LVDS_U1
LVDS_U2
LVDS_U2
CLKCONN_TMDS
CLKCONN_TMDS
CLKTMDS
CLKTMDS
TMDS_D0
TMDS_D0
TMDS_D1
TMDS_D1
TMDS_D2
TMDS_D2
NEC_USB_DA
NEC_USB_DA
USB_DE
USB_DE
NEC_USB_DB
NEC_USB_DB
USB_DF
USB_DF
BT_USB_D
BT_USB_D
NEC_USB_RSD1
NEC_USB_RSD1
NEC_USB_RSD2
NEC_USB_RSD2
MODEM_USB_D
MODEM_USB_D
LEFT_USB
LEFT_USB
RIGHT_USB
RIGHT_USB

28
28

SPACING DELETED BECAUSE

28

OF PHYSICAL CONSTRAINTS

28

AROUND MARVELL PHY

28
28
28
28

500.0000
500.0000
500.0000
500.0000

MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5

MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5

MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5

MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=5

10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
5 MIL SPACING
5 MIL SPACING
10 MIL SPACING
10 MIL SPACING
5 MIL SPACING
5 MIL SPACING
5 MIL SPACING
5 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
5 MIL SPACING
5 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
10 MIL SPACING
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF

1772_CSS
1772_CSS
1772_CSI
1772_CSI
3V_SNS
3V_SNS
5V_SNS
5V_SNS
THERM1
THERM1
THERM2
THERM2
THERM1_MAIN
THERM1_MAIN
THERM2_MAIN
THERM2_MAIN
THERM1_ALT
THERM1_ALT
THERM2_ALT
THERM2_ALT

28 40
28 40
28 40
28 40
28 40
28 40
28 40
28 40
29 30
29 30
29 30
29 30

29 30
29 30
29 30
29 30

INTERNAL LAYER
ER = 4.3 (DIELECTRIC CONSTANT)
W = 4MIL (TRACE WIDTH)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 10MIL (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.57OHM
ZDIFF = 99.8OHM

30 40
30 40
30 40
30 40

4
4

19 22 40
19 22 40
19 22 40
19 22 40
19 22 40
19 22 40
19 22 40
19 22 40

4
4

19 22 40
19 22 40
19 22 40
19 22 40

FOR FIREWIRE
ER = 4.3 (DIELECTRIC CONSTANT)
W = 3.4MIL (TRACE WIDTH)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 10MIL (SEPERATION OF DIFF TRACES)
ZSINGLE = 53.37OHM
ZDIFF = 107.17OHM

19 22 40
19 22 40
19 22 40
19 22 40

4
4
4
4

22 40
22 40
20 22
20 22
20 22 40
20 22 40
20 22 40
20 22 40
20 22 40
20 22 40
27
27
14
14
27
27
14
14
14 25 40
14 25 40
27
27
27
27
14 26 40
14 26 40
25 27 40

ER = 4.3 (DIELECTRIC CONSTANT)


W = 4MIL(USB 1.1)/ 5MIL(USB 2.0) (TRACE WIDTH)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 5MIL (USB 1.1) (SEPERATION OF DIFF TRACES)
S = 10MIL (USB 2.0) (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.5OHM (USB 1.1)/ 46.2OHM (USB 2.0)
ZDIFF = 89.3OHM (USB 1.1)/ 89.4OHM (USB 2.0)

25 27 40
27 33 40
27 33 40

32
32
32
32
34
34
34

SIGNAL CONSTRAINTS - PAGE 2

34
26
26

26

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

26

SIZE

26
26
26

APPLE COMPUTER INC.

DRAWING NUMBER

REV.

051-6694

D
SCALE

NOTICE OF PROPRIETARY PROPERTY

26

13 29

INTERNAL LAYER (USB1.1/USB 2.0)

SHT
NONE

38

OF

45

POWER NET CONSTRAINTS


GROUP

SIG_NAME

MAIN/SLEEP

ADAPTER
BATTERY
CHARGER

PMU

MISC
HD

TRACKPAD
HALL EFFECT
VIDEO

VOLTAGE

MIN_LINE_WIDTH

MIN_NECK_WIDTH

+24V_PBUS
+BATT
+PBUS
+5V_MAIN
+5V_SLEEP
+3V_MAIN
+3V_SLEEP
+3V_PMU
+2_5V_MAIN
+2_5V_SLEEP
+1_8V_MAIN
+1_8V_SLEEP
+1_5V_MAIN
+1_5V_SLEEP
+1_5V_LDO
+1_5V_SLEEP_VIN

VOLTAGE=24V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

VOLTAGE=12.6V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

VOLTAGE=12.8V
VOLTAGE=5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

VOLTAGE=1.5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

36

+ADAPTER
+ADAPTER_SW
+ADAPTER_SENSE

VOLTAGE=24V

MIN_LINE_WIDTH=50

MIN_NECK_WIDTH=10

32 33

VOLTAGE=24V

MIN_LINE_WIDTH=50

MIN_NECK_WIDTH=10

32

VOLTAGE=24V

MIN_LINE_WIDTH=50

MIN_NECK_WIDTH=10

32

+BATT_POS
BATT_NEG
1772_DCIN
1772_LX
+BATT_14V_FUSE
+BATT_24V_FUSE
+BATT_RSNS
+BATT_VSNS
1772_LDO
1772_DLOV
1772_GND

+5V_MAIN_CONN

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

23

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=6

20 23

VOLTAGE=3.3V
VOLTAGE=2.5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

VOLTAGE=2.5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

VOLTAGE=1.8V
VOLTAGE=1.8V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=10

VOLTAGE=1.5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

VOLTAGE=1.5V
VOLTAGE=1.5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

40

40

REFERENCE
36

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

32 40

VOLTAGE=0V
VOLTAGE=24V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10

32 40

VOLTAGE=12.6V
VOLTAGE=12.6V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

32

VOLTAGE=12.6V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

32

VOLTAGE=12.6V
VOLTAGE=12.6V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

32

VOLTAGE=5.4V

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6

32

VOLTAGE=5.4V
VOLTAGE=0V

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

32
32

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6

33

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

33

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

33 34

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6

33

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6

26 31

32

MIN_NECK_WIDTH=10

25 34

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

25

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6

MIN_NECK_WIDTH=6

23 40

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

22 40

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

22 40

MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

22 40

MIN_LINE_WIDTH=12

MIN_NECK_WIDTH=10

22

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

22

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

22

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

22 40

22

22

22

22 40

KBDLED_ANODE
KBDLED_RETURN

VOLTAGE=0V
VOLTAGE=0V

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

23

FAN GND

FANL_GND
FANR_GND

VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

40

VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

40

+5V_SOUND_SLEEP
SND_AGND

SILICON
IMIAGE

VOLTAGE=5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=15

I/O AREA
INVERTER
TRACKPAD
LVDS
I/O AREA
I/O AREA
ENET_CTAP_CHGND

VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=6 GND

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12CHGND1

88E1111

26

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12CHGND2

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12CHGND3

CHGND1
VOLTAGE=0V

CHGND2
VOLTAGE=0V

CHGND3
VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12CHGND4

40

CHGND4
VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12CHGND5

CHGND5
VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12CHGND6

CHGND6
VOLTAGE=0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=12

VOLTAGE
VOLTAGE=1.4V

PP3V3_SI_PVCC1
I353
PP3V3_SI_AVCC1
I355
PP3V3_SI_VCC1
I354

MIN_LINE_WIDTH
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH

GROUP

MIN_NECK_WIDTH=10

5 6 35 40

VOLTAGE=1.4V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

VOLTAGE=1.8V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

5 6 7 8 15 16 35

VOLTAGE=1.25V
VOLTAGE=2.5V

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=10

11

VOLTAGE=3.3V
VOLTAGE=1.5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

14

VOLTAGE=1.5V

MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=6

14

VOLTAGE=1.5V
VOLTAGE=1.5V

MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

14

VOLTAGE=1.5V

MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=5

14

VOLTAGE=1.5V
VOLTAGE=1.5V

MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=5
MIN_NECK_WIDTH=6

12

VOLTAGE=1.5V

MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=6

VOLTAGE=1.5V

MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

14

VOLTAGE=1.25V

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6

8 12 14

MIN_LINE_WIDTH=10
9
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=8
13
MIN_NECK_WIDTH REDUCED FOR TESTPOINTS
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
17

12 18

VOLTAGE=5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

17

VOLTAGE=1.2V

MIN_LINE_WIDTH=30

MIN_NECK_WIDTH=10

18 19 40

VOLTAGE=2.5V

MIN_LINE_WIDTH=30

MIN_NECK_WIDTH=10

18 21

VOLTAGE=3.3V
VOLTAGE=3.3V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=8

12 18 19 21

VOLTAGE=1.5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

12 15 16 18 19 21

VOLTAGE=2.5V
VOLTAGE=2.5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

21

VOLTAGE=2.5V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

21

VOLTAGE=1.8V
VOLTAGE=2.5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=20

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

18 19 20 21

VOLTAGE=1.8V
VOLTAGE=1.5V

MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=20

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

19 21

VOLTAGE=1.5V

MIN_LINE_WIDTH=20

19

VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.2V
VOLTAGE=2.5V
VOLTAGE=1.8V
VOLTAGE=1.8V

MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10

MAX1715

2.5V SWITCHER

1.5V SWITCHER

21

CONTROL

21

21

28

USB 2.0
INTREPID
SSCG

VOLTAGE

MIN_LINE_WIDTH

MIN_NECK_WIDTH

1625_VIN
1625_VSW
1625_EXTVCC
1625_INTVCC
1625_SGND
1V20_REF

VOLTAGE=24V
VOLTAGE=12.8V
VOLTAGE=5V
VOLTAGE=5V
VOLTAGE=0V
VOLTAGE=1.2V

MIN_LINE_WIDTH=10MIN_NECK_WIDTH=6 33
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=1033
MIN_LINE_WIDTH=10MIN_NECK_WIDTH=6 33
MIN_LINE_WIDTH=10MIN_NECK_WIDTH=6 33
MIN_LINE_WIDTH=10MIN_NECK_WIDTH=6 33
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1032

3707_INTVCC
5V_SW
5V_RSNS

VOLTAGE=5V
VOLTAGE=5V
VOLTAGE=5V

MIN_LINE_WIDTH=10MIN_NECK_WIDTH=1034
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=1034
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=1034

3V_SW
3V_RSNS
3707_SGND

VOLTAGE=3.3V
VOLTAGE=3.3V
VOLTAGE=0V

MIN_LINE_WIDTH=25MIN_NECK_WIDTH=1034
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=1034
MIN_LINE_WIDTH=10MIN_NECK_WIDTH=6 34

2_5V_LX
2_5V_BST
2_5V_BOOST
2_5V_DH
2_5V_DL

VOLTAGE=2.5V
VOLTAGE=5V
VOLTAGE=5V
VOLTAGE=2.5V
VOLTAGE=2.5V

MIN_LINE_WIDTH=50MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1036

1_5V_FB
1_5V_LX
1_5V_BST
1_5V_BOOST
1_5V_DH
1_5V_DL
1_5V_ILIM
2_5V_ILIM
MAX1715_TON
MAX1715_SKIP
MAX1715_REF
MAX1715_VCC
MAX1715_GND

VOLTAGE=1.5V
VOLTAGE=1.5V
VOLTAGE=5V
VOLTAGE=5V
VOLTAGE=1.5V
VOLTAGE=1.5V

MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=50MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=30MIN_NECK_WIDTH=1036

VCORE_VCC
VCORE_LX
VCORE_DH
VCORE_DL
VCORE_BOOST
VCORE_BST
VCORE_ILIM
VCORE_REF
VCORE_TON
VCORE_CC
VCORE_FB
VCORE_TIME
VCORE_VGATE
VCORE_GND
VCORE_GNDSNS
VCORE_SNS
VCORE_GNDDIV

VOLTAGE=5V
VOLTAGE=1.4V

1778_VIN
1778_VCC
1778_GND
1778_BST
1778_BST_RC
1778_TG
1778_BG
GPU_VCORE_SW
1778_ION
1778_ITH
1778_ITH_RC
1_5V_2_5V_OK
1778_VFB
1778_FCB
1778_VRNG

VOLTAGE=14V
VOLTAGE=5V
VOLTAGE=0V
VOLTAGE=5V
VOLTAGE=5V

LTC3411_VCC
LTC3411_GND
1_8V_SW
1_8V_VFB
LTC3411_ITH_RC
LTC3411_ITH
LTC3411_SYNC
LTC3411_SHDN

VOLTAGE=3.3V
VOLTAGE=0V
VOLTAGE=1.8V

VOLTAGE=2.0V
VOLTAGE=5V
VOLTAGE=0V

18
21
21

MAX1717

21
21
21
21
21
18
18
19
19

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

19

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10

19

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

19

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10

21

MIN_NECK_WIDTH=10

21

MIN_LINE_WIDTH=10

MIN_NECK_WIDTH=10

21

VOLTAGE=3.3V
VOLTAGE=3.3V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=0
MIN_NECK_WIDTH=0
MIN_NECK_WIDTH=0

21

19

21

LTC1778

20
20
20

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=0

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=0

20

I358

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=0

20

20

VOLTAGE=2.5V
VOLTAGE=2.5V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=8

28

VOLTAGE=1.0V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=8

28

VOLTAGE=1.0V
VOLTAGE=3.3V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=8
MIN_NECK_WIDTH=10

28

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

30

VOLTAGE=3.3V
VOLTAGE=12.8V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=100

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=12

30

VOLTAGE=12.8V

MIN_LINE_WIDTH=100

MIN_NECK_WIDTH=12

30

VOLTAGE=33V
VOLTAGE=33V

MIN_LINE_WIDTH=100
MIN_LINE_WIDTH=100

MIN_NECK_WIDTH=12
MIN_NECK_WIDTH=12

29 30

VOLTAGE=33V
VOLTAGE=33V

MIN_LINE_WIDTH=100
MIN_LINE_WIDTH=100

MIN_NECK_WIDTH=12
MIN_NECK_WIDTH=12

30

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

29 30

VOLTAGE=3.3V
VOLTAGE=3.3V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

29

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=6

29

VOLTAGE=3.3V
VOLTAGE=3.3V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

29

VOLTAGE=1.95V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

29

VOLTAGE=1.95V
VOLTAGE=1.95V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

29

VOLTAGE=1.95V
VOLTAGE=1.95V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

29

VOLTAGE=1.95V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

29

VOLTAGE=1.95V
VOLTAGE=0V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=100

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=12

29

VOLTAGE=0V

MIN_LINE_WIDTH=100

MIN_NECK_WIDTH=12

30

VOLTAGE=0V
VOLTAGE=3.3V

MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10

30 40

VOLTAGE=3.3V

MIN_LINE_WIDTH=25

MIN_NECK_WIDTH=10

27

VOLTAGE=3.3V
VOLTAGE=2.5V

MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15

MIN_NECK_WIDTH=8
MIN_NECK_WIDTH=8

14

28

VOLTAGE=5V
VOLTAGE=5V

VOLTAGE=5V
VOLTAGE=1.4V

VOLTAGE=0V
VOLTAGE=0V
VOLTAGE=1.4V
VOLTAGE=0V

VOLTAGE=1.2V

MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=30MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=50MIN_NECK_WIDTH=1019
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 19
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 19
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 19
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 36
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 19
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 19
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 19

40

35

B
40

29

LTC3411

30

30

30

29

LTC1962
INT PLLS

29

MIN_LINE_WIDTH=20MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=30MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=30MIN_NECK_WIDTH=1036
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1014
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=10

LTC1962_INT_VIN
LTC1962_L3_VIN
LTC1962_L3_VOUT
LTC1962_1V5_VIN
LTC1962_1V5_VOUT

SIGNAL CONSTRAINTS - PAGE 3

29

NOTICE OF PROPRIETARY PROPERTY

29

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

30

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

27

SIZE

APPLE COMPUTER INC.

14

D
SCALE

C
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1035
MIN_LINE_WIDTH=200
MIN_NECK_WIDTH=1035
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1035
MIN_LINE_WIDTH=20MIN_NECK_WIDTH=1035
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1035
MIN_LINE_WIDTH=15MIN_NECK_WIDTH=1035
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 14
MIN_LINE_WIDTH=30MIN_NECK_WIDTH=1535
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35
MIN_LINE_WIDTH=8 MIN_NECK_WIDTH=6 35

DRAWING NUMBER

REV.

051-6694
B
39
45
SHT

OF

NONE

33

21

VOLTAGE=3.3V

+2_5V_MARVELL
+2_5V_MARVELL_AVDD
+1_0V_MARVELL
LTC3405_SW
LM2594_IN
+3V_FW_ESD_ILIM
+3V_FW_ESD
+FW_FUSE
+FW_SW
+FW_PWR_OR
+FW_VP0
+FW_PWR_PORTA
+FW_VP1
+3V_FW
+3V_FW_UF
+3V_FW_AVDD_PORT2
+3V_FW_AVDD_PORT1
+3V_FW_AVDD_PORT0
+3V_FW_AVDD
+1_95V_FW_DVDD
+1_95V_FW_DVDD_RX0
+1_95V_FW_DVDD_TX0
+1_95V_FW_DVDD_PORT1
+1_95V_FW_PLLVDD
+1_95V_FW_PLL400VDD
+1_95V_FW_PLL500VDD
FW_VGND0
FW_VGND1
FW_TPO0R
NEC_AVDD
+3V_NEC_VDD
+3V_CG_PLL_MAIN
+2_5V_CG_MAIN

21

I356 PP3V3_SI_PVCC2
I357 PP3V3_SI_AVCC2

PP3V3_SI_VCC2

3V SWITCHER

12

VOLTAGE=0V
VOLTAGE=0V

MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10

LTC3707

5V SWITCHER

14

MIN_LINE_WIDTH=10

MIN_LINE_WIDTH=15

14V SWITCHER

9 10 15 16

VOLTAGE=1.25V

VOLTAGE=3.3V

SIG_NAME

LTC1625

23

FW

VOLTAGE=0V

CPU_VCORE_SLEEP
CPU_AVDD
MAXBUS_SLEEP
DDR_VREF
+2_5V_INTREPID
+3V_INTREPID_USB
+1_5V_INTREPID_PLL
+1_5V_INTREPID_PLL1
+1_5V_INTREPID_PLL2
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL5
+1_5V_INTREPID_PLL6
+1_5V_INTREPID_PLL7
+1_5V_INTREPID_PLL8
INT_MEM_VREF
INT_AGP_VREF
INT_MEM_REF_H
UIDE_REF
+VCC_CBUS_SW
+VPP_CBUS_SW
GPU_VCORE
+GPU_MEM
+3V_GPU
+3V_GPU_FLT
+1_5V_AGP
GPU_MEM_IO
GPU_MEM_IO_FLT
+GPU_MEMCORE
+1_8V_GPU
+2_5V_GPU_PNLIO
+1_8V_ATI_PVDD
+1_5V_AGP_GPU
+1_5V_GPU_VDD15
+1_8V_GPU_PLL
+1_8V_GPU_VDDDI
I331

+2_5V_GPU_A2VDD
I336
+1_8V_GPU_AVDD
I334
+1_8V_GPU_PNLPLL
I333
VOLTAGE=1.8V
+1_8V_GPU_PNLIO
I335
VOLTAGE=2.5V
+GPU_MCLK
I337
VOLTAGE=1.8V
+1_8V_GPU_AVDDQ
I338
VOLTAGE=1.8V
+1_8V_GPU_MEMPLL
I341
VOLTAGE=3.3V
+3V_ATI_OSC_SLEEP
I340
VOLTAGE=3.3V
+3V_ATI_SS
I339
VOLTAGE=1.5V
+GPU_VDD15_UF
I342
VOLTAGE=1.8V
+2_5V_SLEEP_NECK1
I343
+3V_SLEEP_NECK VOLTAGE=1.8V
I347
+1_5V_AGP_NECK VOLTAGE=1.8V
I345
+1_8V_PVDD_NECK VOLTAGE=2.5V
I346
GPU_VCORE_NECK VOLTAGE=1.8V
I344
+GPU_VDD15_NECK VOLTAGE=1.8V
I348
VOLTAGE=3.3V
+2_5V_SLEEP_NECK2
I351
+1_8V_SLEEP_NECKVOLTAGE=3.3V
I349
+1_5V_SLEEP_NECKVOLTAGE=1.5V
I350
+2_5V_GPU
VOLTAGE=2.5V
I352

33

MIN_LINE_WIDTH=25

SIG_NAME

I332GPU_VCORE_VDDCI

31 33

KB LED

SOUND

ATI M11

32

VOLTAGE=3.3V

+12_8V_INV
VOLTAGE=12.8V
+5V_INV_UF_SW
VOLTAGE=5V
+5V_INV_SW
VOLTAGE=5V
+5V_DDC_SLEEP
VOLTAGE=5V
+5V_DDC_SLEEP_UFVOLTAGE=5V
+3V_LCD
VOLTAGE=3.3V
+3V_LCD_SW
VOLTAGE=3.3V
GPU_TV_GND1
VOLTAGE=0V
GPU_TV_GND2
VOLTAGE=0V
TV_GND1
VOLTAGE=0V
TV_GND2
VOLTAGE=0V

CARDBUS

32

VOLTAGE=5V

MIN_LINE_WIDTH=10

DDR RAM
INTREPID

23

VOLTAGE=16.8V

VOLTAGE=3.3V

CPU

PLLS

VOLTAGE=3.3V

VOLTAGE=5V

+3V_HALL_EFFECT

40

VOLTAGE=5V
VOLTAGE=3.3V

+ADAPTER_ILIM
VOLTAGE=24V
+ADAPTER_OR_BATTVOLTAGE=24V
+4_85V_RAW
VOLTAGE=4.85V
+4_6V_BU
VOLTAGE=4.6V
+4_85V_ESR
VOLTAGE=4.85V
+3V_PMU_ESR
VOLTAGE=3.3V
+3V_PMU_AVCC
VOLTAGE=3.3V
+5V_HD_SLEEP
+HD_LOGIC_SLEEP

40

GROUP

FUNCTIONAL TEST POINTS


FUNC_TEST=YES
JTAG_ASIC_TMS
FUNC_TEST=YES
JTAG_ASIC_TDI

FUNC_TEST=YES
TMDS_CONN_CLKP

13 28

TV_C

FUNC_TEST=YES
VGA_R 22

28

FUNC_TEST=YES
JTAG_ASIC_TDO
13

FUNC_TEST=YES

22 38

FUNC_TEST=YES
TV_Y 22
FUNC_TEST=YES

FUNC_TEST=YES
VGA_G 22

14

22

TV_COMP

FUNC_TEST=YES
PCI_AD<7>

9 12 17 25 27 38

FUNC_TEST=YES
PCI_AD<8>

9 12 17 25 27 38

FUNC_TEST=YES
PCI_AD<9>

22

FUNC_TEST=YES

PCI_PAR

12 17 25 27 38

FUNC_TEST=YES

PCI_CBE<0>

12 17 25 27 38

PCI_CBE<1>

25 38

FUNC_TEST=YES
EIDE_OPTICAL_CS1_L

25 38

FUNC_TEST=YES
EIDE_OPTICAL_RST_L

FUNC_TEST=YES
9 12 17 25 27 38

FUNC_TEST=YES
+5V_INV_SW

FUNC_TEST=YES
EIDE_OPTICAL_CS0_L

12 17 25 27 38

FUNC_TEST=YES
KBD_Y<0>
FUNC_TEST=YES
KBD_Y<1>

25 38

31

FUNC_TEST=YES
FW_TPO1P

31

28

FUNC_TEST=YES
VGA_B 22

28

FUNC_TEST=YES
VGA_VSYNC 22

FUNC_TEST=YES
JTAG_ASIC_TCK 13

FUNC_TEST=YES
CPU_CHKSTP_OUT_L

FUNC_TEST=YES
CPU_HRESET_L

FUNC_TEST=YES
SND_TO_AUDIO

5 6 7

FUNC_TEST=YES
JTAG_CPU_TMS 5
FUNC_TEST=YES
JTAG_CPU_TDI 5

FUNC_TEST=YES
JTAG_CPU_TDO_TP 5

9 12 17 25 27 38

14 26

FUNC_TEST=YES
PCI_AD<11>

9 12 17 25 27 38

SND_SYNC
FUNC_TEST=YES
SND_CLKOUT

14 26 37

PCI_CBE<2>

PCI_CBE<3>

9 12 17 25 27 38

AIRPORT_PCI_REQ_L

AIRPORT_PCI_GNT_L

FUNC_TEST=YES
DVI_DDC_DATA_UF

22

FUNC_TEST=YES
PCI_AD<14>

9 12 17 25 27 38

AIRPORT_PCI_INT_L

FUNC_TEST=YES
PCI_AD<15>

FUNC_TEST=YES

FUNC_TEST=YES
LVDS_L0N 19

22 38

FUNC_TEST=YES
LVDS_L0P 19

22 38

FUNC_TEST=YES
LVDS_L1N 19

22 38

SND_SCLK

14 26 37

FUNC_TEST=YES
SND_HW_RESET_L

14 26

FUNC_TEST=YES
EIDE_OPTICAL_IOCHRDY

EIDE_OPTICAL_INT

12 25

FUNC_TEST=YES
TPAD_F_TXD

14 25

FUNC_TEST=YES
TPAD_F_RXD

FUNC_TEST=YES

FUNC_TEST=YES
LID_CLOSED_L

FUNC_TEST=YES

EIDE_OPTICAL_DATA<0>

9 12 17 25 27 38

25 38

FUNC_TEST=YES
KBD_Y<3>

25 38

FUNC_TEST=YES
12 25

FUNC_TEST=YES
9 12 17 25 27 38

14 26

12 17 25 27 38

FUNC_TEST=YES

FUNC_TEST=YES
PCI_AD<12>
FUNC_TEST=YES
PCI_AD<13>

FUNC_TEST=YES
INT_AUDIO_TO_SND

FUNC_TEST=YES
EIDE_OPTICAL_WR_L

FUNC_TEST=YES

22

22

12 17 25 27 38

FUNC_TEST=YES

FUNC_TEST=YES
DVI_DDC_CLK_UF

FUNC_TEST=YES
DVI_HPD_UF

14 26

FUNC_TEST=YES
PCI_AD<10>

FUNC_TEST=YES

FUNC_TEST=YES
VGA_HSYNC 22

FUNC_TEST=YES
CPU_SRESET_L 5

FUNC_TEST=YES
PCI_AD<16>

9 12 17 25 27 38

EIDE_OPTICAL_DATA<1>

FUNC_TEST=YES
PCI_AD<17>

9 12 17 25 27 38

EIDE_OPTICAL_DATA<2>

FUNC_TEST=YES
PCI_AD<18>

9 12 17 25 27 38

EIDE_OPTICAL_DATA<3>

25 38

FUNC_TEST=YES
COMM_RESET_L

FUNC_TEST=YES
25 38

FUNC_TEST=YES
KBD_Y<4>

25 38

COMM_SHUTDOWN

25 38

FUNC_TEST=YES
JTAG_CPU_TCK 5

FUNC_TEST=YES
SND_HP_SENSE_L

FUNC_TEST=YES

FUNC_TEST=YES
JTAG_CPU_TRST_L 5

6 40

LVDS_L1P
FUNC_TEST=YES
LVDS_L2N

FUNC_TEST=YES

FUNC_TEST=YES
CLKLVDS_LN

FUNC_TEST=YES
INT_I2C_DATA0 6

13 23

11 13 23

FUNC_TEST=YES
INT_I2C_CLK1 13
FUNC_TEST=YES
INT_I2C_DATA1 13

14 23 24 26

14 23 24 26

FUNC_TEST=YES
CBUS_DET_1_L 17

26

FUNC_TEST=YES
PCI_AD<20>

14 26

FUNC_TEST=YES
INT_I2C_DATA2 14

19 22 38

FUNC_TEST=YES
INT_I2C_CLK2

22 38

FUNC_TEST=YES
19 22 38

I293

CHGND4

39

FUNC_TEST=YES

FUNC_TEST=YES
CLKLVDS_LP
FUNC_TEST=YES
INT_I2C_CLK0 6 11

SND_LIN_SENSE_L

19 22 38

FUNC_TEST=YES
LVDS_L2P 19

FUNC_TEST=YES
PCI_AD<19>

19 22 38

I294

SLEEP_LED

FUNC_TEST=YES
KBD_Y<6>
FUNC_TEST=YES
KBD_Y<7>

23

14 26

FUNC_TEST=YES
KBD_NUMLOCK_LED

14 26

FUNC_TEST=YES
+BATT_POS

12 17 25 27 38

EIDE_OPTICAL_DATA<6>

FUNC_TEST=YES
PCI_AD<22>

12 17 25 27 38

EIDE_OPTICAL_DATA<7>

FUNC_TEST=YES
PCI_AD<23>

12 17 25 27 38

EIDE_OPTICAL_DATA<8>

FUNC_TEST=YES
LVDS_U0P

19 22 38

FUNC_TEST=YES
PCI_AD<25>

19 22 38

FUNC_TEST=YES
BT_USB_DM 14

FUNC_TEST=YES
LVDS_U1P

19 22 38

FUNC_TEST=YES
BT_USB_DP 14

FUNC_TEST=YES
LVDS_U2N

FUNC_TEST=YES
CBUS_DET_2_L 17

FUNC_TEST=YES

FUNC_TEST=YES

FUNC_TEST=YES
CLKLVDS_UN

LVDS_U2P

19 22 38

19 22 38

FUNC_TEST=YES
MODEM_USB_DM
FUNC_TEST=YES
MODEM_USB_DP

25 38

25 38

14 26 38

25 38

FUNC_TEST=YES
+3V_HALL_EFFECT

25 38

FUNC_TEST=YES
KBD_CAPSLOCK_LED

25 38

FUNC_TEST=YES
KBD_FUNCTION_L

FUNC_TEST=YES

FUNC_TEST=YES
KBD_CONTROL_L

FUNC_TEST=YES

EIDE_OPTICAL_DATA<9>

25 38

FUNC_TEST=YES

EIDE_OPTICAL_DATA<10>

9 12 17 25 27 38

9 12 17 25 27 38

EIDE_OPTICAL_DATA<11>

FUNC_TEST=YES
PCI_AD<27>

9 12 17 25 27 38

EIDE_OPTICAL_DATA<12>

FUNC_TEST=YES
PCI_AD<29>

FUNC_TEST=YES
+5V_TPAD_SLEEP

FUNC_TEST=YES

FUNC_TEST=YES
PCI_AD<26>

FUNC_TEST=YES
PCI_AD<28>

14 26 38

25 38

FUNC_TEST=YES

9 12 17 25 27 38

I299

25 38

FUNC_TEST=YES
25 38

FUNC_TEST=YES
FANR_GND

30 38

25 27 38

RIGHT_USB_DM

31

RIGHT_USB_DP

NEC_LEFT_USB_PWREN

30 38

CHARGE_LED_L

31 32

FUNC_TEST=YES
ADAPTER_DET

31 32

SUTRO_ALS_GAIN_SW

TMDS_DN<0>
FUNC_TEST=YES
TMDS_DP<0>
FUNC_TEST=YES
TMDS_DN<1>
FUNC_TEST=YES
TMDS_DP<1>
FUNC_TEST=YES
TMDS_DN<2>

20 22 38

19 22 38

FUNC_TEST=YES
PCI_AD<0>

19 22 38

FUNC_TEST=YES
PCI_AD<1>

FUNC_TEST=YES
20 22 38

CLKLVDS_UP
FUNC_TEST=YES

20 22 38

LVDS_DDC_CLK

19 22

FUNC_TEST=YES
20 22 38

20 22 38

LVDS_DDC_DATA
FUNC_TEST=YES
BRIGHT_PWM

19 22

FUNC_TEST=YES
PCI_AD<2>
FUNC_TEST=YES
PCI_AD<3>
FUNC_TEST=YES
PCI_AD<4>

22

9 12 17 25 27 38

FUNC_TEST=YES
PCI_AD<30>

FUNC_TEST=YES
FANL_GND

23 31

FUNC_TEST=YES
NEC_RIGHT_USB_PWREN

9 12 17 25 27 38

FUNC_TEST=YES
PCI_AD<31>

9 12 17 25 27 38

FUNC_TEST=YES
PCI_FRAME_L

9 12 17 25 27 38

FUNC_TEST=YES
PCI_TRDY_L

9 12 17 25 27 38

FUNC_TEST=YES
PCI_IRDY_L

EIDE_OPTICAL_DATA<15>

FUNC_TEST=YES
KBD_OPTION_L

23 31

FUNC_TEST=YES
KBD_SHIFT_L

23 31

25 38

I271

FUNC_TEST=YES
FANR_PWM

I272

FUNC_TEST=YES
FANL_PWM

EIDE_OPTICAL_DMA_RQ

EIDE_OPTICAL_RD_L

FUNC_TEST=YES
KBD_X<3>

25 38

25 38

I298

25 38

I295

FUNC_TEST=YES

EIDE_OPTICAL_DMAACK_L

12 17 25 27 38

32 39

31 32

39

DCDC_EN

23 25

EIDE_OPTICAL_ADDR<0>

25 38

I296

25 38

I297

FUNC_TEST=YES
TMDS_DP<2>

20 22 38

FUNC_TEST=YES
TMDS_CONN_CLKN

22 38

FUNC_TEST=YES
TV_GND1 22
FUNC_TEST=YES
TV_GND2 22

39

39

FUNC_TEST=YES
PCI_AD<5>
FUNC_TEST=YES
PCI_AD<6>

9 12 17 25 27 38

FUNC_TEST=YES
PCI_DEVSEL_L

FUNC_TEST=YES
RJ45_DP<1>

23 31

9 12 17 25 27 38

23 31

FUNC_TEST=YES
MMM_ACC_SELFTEST

FUNC_TEST=YES
RJ45_DP<2>

24

FUNC_TEST=YES
MMM_ACC_X_AXIS

FUNC_TEST=YES
MMM_ACC_Y_AXIS

FUNC_TEST=YES
RJ45_DN<2>

24

FUNC_TEST=YES
COMM_TRXC

14 26

FUNC_TEST=YES
COMM_GPIO_L

14 26

FUNC_TEST=YES
COMM_DTR_L

14 26

FUNC_TEST=YES
COMM_RTS_L

14 26

RJ45_DP<3>

24

FUNC_TEST=YES
MMM_ACC_Z_AXIS

FUNC_TEST=YES
RJ45_DN<3>

24

FW_TPO0R

25 38

FUNC_TEST=YES
+PBUS

23 26

39

I273
39

I281

SND_AMP_MUTE

26

I287

FUNC_TEST=YES
SRMOD_TP

27

FUNC_TEST=YES
TEB_TP

27

I282

SND_HP_MUTE_INV

I288

I289

I283

I290

14 26

MOD_SYNC

14 26

FUNC_TEST=YES

39

SLEEP

23 31 34 36

FUNC_TEST=YES

1778_VFB

22 39

19 39

22 39

FUNCTIONAL TEST POINTS


NOTICE OF PROPRIETARY PROPERTY

VCORE_MUX_EN

35

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

VCORE_VID2

II NOT TO REPRODUCE OR COPY IT

I284

SIZE

VCORE_VID3
FUNC_TEST=YES

27

MOD_DTO

FUNC_TEST=YES

FUNC_TEST=YES

FUNC_TEST=YES

I286

5 6 40

FUNC_TEST=YES

39

VCORE_VID0
VCORE_VID1

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I285

TEST_TP

14 26

I280

FUNC_TEST=YES
FUNC_TEST=YES

I292

27

I276

I277

28 38

FUNC_TEST=YES

FUNC_TEST=YES
SRCLK_TP

14 26

FUNC_TEST=YES
MOD_CLKOUT

35 39

FUNC_TEST=YES
25 38

I275

I279

30 39

25

FUNC_TEST=YES
MOD_BITCLK

5 6 35 39

28 38

FUNC_TEST=YES
+12_8V_INV

12 25 37

FUNC_TEST=YES
ROM_OE_L 9 12 25
FUNC_TEST=YES
INT_MOD_DTI 14 26

I278

FUNC_TEST=YES
+5V_DDC_SLEEP

9 12 25

FUNC_TEST=YES
JTAG_CPU_TRST_L

18 19 39

28 38

FUNC_TEST=YES
+3V_PMU

9 25

I274

28 38

FUNC_TEST=YES
+1_8V_MAIN

9 12 25

FUNC_TEST=YES
AIRPORT_IDSEL

28 38

FUNC_TEST=YES
VCORE_FB

25

FUNC_TEST=YES
CLK33M_AIRPORT

28 38

CPU_VCORE_SLEEP

FUNC_TEST=YES
AIRPORT_CLKRUN_L

14 26

28 38

FUNC_TEST=YES
GPU_VCORE

25

FUNC_TEST=YES
ROM_CS_L

28 38

FUNC_TEST=YES
+24V_PBUS

FUNC_TEST=YES
RF_DISABLE_L_SPN

FUNC_TEST=YES
ROM_ONBOARD_CS_L

FUNC_TEST=YES

FUNC_TEST=YES
I291

C
14 17 18 20 25 27 31

FUNC_TEST=YES
ROM_RW_L

FUNC_TEST=YES

FUNC_TEST=YES

FUNC_TEST=YES

EIDE_OPTICAL_ADDR<2>

12 17 25 27 38

FUNC_TEST=YES
MAIN_RESET_L
14 26

FUNC_TEST=YES
PMU_KB_RESET_L

FUNC_TEST=YES

EIDE_OPTICAL_ADDR<1>

FUNC_TEST=YES
PCI_STOP_L

FUNC_TEST=YES
RJ45_DN<1>

FUNC_TEST=YES
12 17 25 27 38

19 30 34 35

FUNC_TEST=YES
BBANG_HRESET_L

FUNC_TEST=YES
COMM_TXD_L

FUNC_TEST=YES
COMM_RXD

39

FUNC_TEST=YES
RJ45_DN<0>

23 31

FUNC_TEST=YES
12 17 25 27 38

27 33

FUNC_TEST=YES

KBD_LED2_OUT

32

FUNC_TEST=YES
RJ45_DP<0>

FUNC_TEST=YES
12 17 25 27 38

27 33

FUNC_TEST=YES
NEC_RIGHT_USB_OVERCURRENT

23 25

PWR_BUTTON_L

FUNC_TEST=YES
9 12 17 25 27 38

25 27

FUNC_TEST=YES
32

FUNC_TEST=YES
FANL_TACH

24

FUNC_TEST=YES
KBD_X<1>

FUNC_TEST=YES
9 12 17 25 27 38

25 27

FUNC_TEST=YES
NEC_LEFT_USB_OVERCURRENT

FUNC_TEST=YES
KBD_LED1_OUT

32 39

27 33 38

FUNC_TEST=YES

FUNC_TEST=YES
31

27 33 38

FUNC_TEST=YES

FUNC_TEST=YES
FW_TPI1N

31

23 31

25 38

FUNC_TEST=YES

EIDE_OPTICAL_DATA<14>

9 12 17 25 27 38

FUNC_TEST=YES
FW_TPI1P

FUNC_TEST=YES
SUTRO_ALS_OUT

FUNC_TEST=YES
PMU_BATT_DET_L

23 39

FUNC_TEST=YES
KBD_X<0>

FUNC_TEST=YES

EIDE_OPTICAL_DATA<13>

FUNC_TEST=YES
+PPBATT_ISNS_N

FUNC_TEST=YES
BATT_NEG

25 38

FUNC_TEST=YES

9 12 17 25 27 38

30 38

FUNC_TEST=YES

25 27 38

FUNC_TEST=YES
LEFT_USB_DP

25 38

FUNC_TEST=YES

FUNC_TEST=YES
PCI_AD<21>

FUNC_TEST=YES
PCI_AD<24>

BATT_CLK

14 26 31

FUNC_TEST=YES
BATT_DATA

EIDE_OPTICAL_DATA<4>

9 12 17 25 27 38

EIDE_OPTICAL_DATA<5>

19 22 38

FUNC_TEST=YES
COMM_RING_DET_L

25 38

FUNC_TEST=YES

9 12 17 25 27 38

FUNC_TEST=YES
LVDS_U0N

FUNC_TEST=YES
LVDS_U1N

FUNC_TEST=YES

FUNC_TEST=YES
FW_TPO1N

FUNC_TEST=YES

FUNC_TEST=YES

FUNC_TEST=YES

31

FUNC_TEST=YES

FUNC_TEST=YES
LEFT_USB_DM

FUNC_TEST=YES

FUNC_TEST=YES
JTAG_ASIC_TRST_L 13

30 38

22 39

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-6694

SCALE

VCORE_VID4

40
1

OF

45

REVISION HISTORY
12/11/03
1)
2)
3)
4)
5)
6)
7)
8)
9)

IMPORTED Q41 PRODUCTION RELEASE SCHEMATIC


CHANGED CPU (U43) TO A7PM
CHANGED PLL CONFIG STUFFING FOR NEW CPU
CHANGED U44 TO M11-CSP64 SYMBOL
ADDED CPU AVDD LDO (U6)
ADDED R284 AND R604 TO ADD OPTION FOR PD_L OF U42 (CLOCK CHIP) TO BE DRIVEN BY JTAG_ASIC_TDO FROM INTREPID
ADDED R608 TO DISCONNECT INT_GPIO0 FROM CG_FSEL
CHANGED JTAG_ASIC_TDO_TP TO JTAG_ASIC_TDO AND MOVED IT TO INTREPIDS TDO
CHANGED JTAG_ASIC_TDI TO CONNECT TO ETHERNET PHYS TDI

12/15/03
12/16/03
10)
11)

09/20/2004
1) ADD R877 (10K OHM)
2) ADD R876 (470K OHM;NO_STUFF)

09/21/2004
1) ADD R878 AND R879 (0 OHM;NO_STUFF)[ADD A 0-OHM RESISTOR TO BY-PASS THE N-FET ON EACH FAN]

09/22/2004

CHANGED PIN 4 (DCDC_EN) ON J11 TO NEC_RIGHT_USBOVERCURRENT


CHANGED PIN 11 OF J11 TO NC

1) R822 (680 OHM CHANGE TO 510 OHM) AND R826 (680 OHM CHANGE TO 510 OHM)

12)
13)
14)
15)
16)
17)

ADDED R633 AS PULLUP ON JTAG_ASIC_TDI


CHANGED CPU_TEMP_DM TO CPU_THERM_DM
CHANGED CPU_TEMP_DP TO CPU_THERM_DP
CHANGED GPU_THERM_DP TO GPU_THERM_DP_TP
CHANGED GPU_THERM_DM TO GPU_THERM_DM_TP
FIXED MISSED CONNECTION WITH MAXBUS_SLEEP TO CPU

18)
19)
20)

CHANGED R657 (EXTPLL_SDWN_POL BOOT STRAP) TO NO STUFF AND REMOVED NO STUFF FROM R153
UPDATE DIFF NET_SPACING_TYPE PROPERTY ON POWER SUPPLY SENSE AND THERMAL DIODE DIFF PAIRS
CHANGED FIREWIRE OSCILLATOR (G1) TO NEW PREFERRED SUNNY PART

21)

CHANGED MAX VIA COUNT ON ALL AGP STB NETS TO 5 TO CLEAR DRCS

09/23/2004

1) ADD NC NETNAME AT U59 PIN6 AND PIN9


2) CHANGE R465 CAP SIZE FROM 0603 TO 0805
3) BOM OPTION FROM NO STUFF CHANGE TO SUPERCAP

12/17/03

09/24/2004
1)
2)
3)
4)
5)
6)

12/18/03

** RELEASED FOR EVT **

2/10/04

CHANGE R465 FROM MF 1/16W TO FF 1/10W


ADD R880 AND R871 (0 OHM;BOM_OPTIOM;FOR SUPERCAP AND BACKUP BATTERY SWITCH)
ADD U60 (LIS3L02AQ;ST SENSOR)
ADD R881 (10K OHM) ,R882 (10K OHM), R883 (10K OHM)
ADD C937 (0.1UF,10V,20%,0402)
ADD BOM_OPTION (KIONIX_ACCEL AND ST_ACCEL)

10/04/2004

22) REMOVED XW11 - JUMPER ON 1.8V SWITCHER OUTPUT


23) CHANGED R657 TO STUFFE AND R153 TO NO STUFF
24) CHANGED CPU PLL CONFIG TO 9X HIGH AND 5X LOW

1) CHANGE TEST POINT FUNC_TEST=NO FOR FUNC_TP_WRONG_SIDE.LOG


2) ADD NO_TEST=YES FOR NOTP.LOG(MMM_PIC_AN2_PD,MMM_PIC_AN3_PU)

** RELEASED FOR DVT **

10/05/2004

3/24/04

1) ADD R850 (0 OHM)

25) REMOVED ALTERNATE BOM OPTION FROM ALTERNATE ETHERNET CRYSTALS

3/29/04
C

26) ADDED ALTERNATE FOR Q41A REV 1.1.1 CPU (U43)


27) ADDED ALTERNATES FOR 128MB AND 64MB A16 M11S
28) CHANGED TMDS SERIES RPAKS TO 0 OHMS (RP57,RP27,RP32,RP28)
29) ADDED ALTERNATE FOR ALS OP-AMP (U40)

10/15/2004

1) REPLACE BOOT BANGER EEPROM U32 WITH 32KX M24256B FUNC_TP_WRONG_SIDE.LOG


** RELEASED TO REV A **
30) CHANGED TMDS TERMINATION R,C AND LS TO PRODUCTION VALUES

** RELEASED TO REV A UNDER NEW PART NUMBER **

09/17/2004

12/16/2004

1) GPU_DVOD<0..12> NETNAME CHANGE TO GPU_DVOD<0..23>


2) D8 FROM 1N5227B CHANGE TO BZX84C2V7LT1
3) R751 VALUE FROM 10K OHM CHANGE TO 604 OHM
4) ADD C935 (0.1UF)
5) ADD R867 (0 OHM) FOR IPOD ACTION
6) PMU PIN74 NETNAME FROM NC TO PMU_SELECT
7) ADD R868 (10K OHM; NO_STUFF) PULL UP TO +3V_PMU
8) ADD R869 (10K OHM) PULL DOWN TO GND
9) PMU PIN 91 NETNAME FROM NC TO SYS_BATT_ISNS2
10)ADD R870 (0 OHM) SYS_BATT_ISNS2 LINK TO SYS_BATT_ISNS
11)ADD U51 (INA138)
12)ADD R852 (0.010 OHM),R853 (150K OHM) AND R857(49.9 OHM)
13)ADD C917 (0.1UF) AND C925 (10UF)
14)ADD DESCRIPTION FOR MMM I2C BUS
15)MMM I2C BUS LINK TO INTREPID :INT_I2C_CLK1 AND INT_I2C_DATA1
16)CHANGE NETNAME FROM INT_EXTINT11_PU TO MMM_FFIRQ_L
17)CHANGE NETNAME FROM INT_EXTINT12_PU TO MMM_SIRQ_L
18)ADD R863 (10K OHM) AND R864 (10K OHM) FOR MMM_FFIRQ_L&MMM_SIRQ_L PULL UP TO +3V_MAIN
19)ADD U53 (16F818) AND U5 (KXM52)
20)ADD R845 (0 OHM),R846 (0 OHM;NO_STUFF),R847 (10K OHM;NO_STUFF),R848 (10K OHM;NO_STUFF)
21)ADD R849 (10K OHM),R850 (10K OHM;NO_STUFF),R851(0 OHM),R854 (10K OHM),R856 (10K OHM),
22)ADD R860 (0 OHM),R858 (0 OHM),R859 (0 OHM),R855 (10K OHM),R861 (10K OHM),R862(10K OHM;NO_STUFF)
23)ADD C936(0.1UF),C918(0.1UF),C919(0.1UF),C921(0.0047UF),C923(0.0047UF),C926(0.0047UF),C927(0.1UF)
24)DEL RP44 (100K OHM) AND ADD R874 (100K OHM), R875 (100K OHM) AND R873 (100K OHM)
25)ADD R872 (10K OHM) FOR AUDIO_LO_MUTE_L
26)ADD R871 (100 OHM) AND SUPERCAP C937 (N20P80;5.5V;ELEC;0.33F)
27)J21 PIN12 NETNAME FROM NC CHANGE TO THERM_L_OC
28)J21 PIN10 NETNAME FROM NC CHANGE TO INT_I2C_DATA1
29)J21 PIN11 NETNAME FROM NC CHANGE TO INT_I2C_CLK1
30)C592 VALUE FROM 0.001UF CHANGE TO 0.01UF (20%,50V,0603)
31)U59 FROM MP1518DJ CHANGE TO MM3120
32)L11 CHANGE TO 152S0235 (22UH;3.8*3.8*1.5MM)
33)DEL D31
34)R202 VALUE FROM 5.23 OHM CHANGE TO 25.5 OHM
35)C79 VALUE FROM 2.2UF CHANGE TO 1UF
36)ADD Q70 (SI3443), Q34 (2N7002)
37)ADD R866 (100K OHM),R865 (4.7 OHM),C929 (0.022UF)

1) SCHEMATIC RELEASE FOR PRODUCTION

REVISION HISTORY(1 OF 1)

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SCALE

SHT
NONE

REV.

051-6694
OF

41
1

B
45

*** Signal Cross-Reference for the entire design ***

2_5V_DL
2_5V_ILIM

AGP_CBE<2>
AGP_CBE<3..2>

12B2<> 18B7<>
38D5>

CBUS_DATA<11>
CBUS_DATA<12>

17A4<> 17C2<
17A4<> 17C2<

CPU_DATA<15>
CPU_DATA<16>

6C8<> 8C4<>
6C8<> 8C4<>

29A5<>
38C2>

INT_MEM_REF_H
INT_MEM_VREF

MEM_BA<0>
MEM_BA<1..0>

9A5< 9D6<>
37A5>

28D2< 39B3>
12C5< 12D1< 12D4< 15D6< 16C8<
18C6< 18D6< 19A8< 19B4<> 19D5<>
21B8< 21D6< 39C3>
+1_5V_AGP_GPU
21C5< 39C3>
+1_5V_AGP_NECK
19B4<> 39B3>
+1_5V_GPU_VDD15 19D3< 39C3>
+1_5V_INTREPID_PLL 8D6< 12D4< 12D8< 14D6<> 39D3>
+1_5V_INTREPID_PLL1 14C3< 39D3>
+1_5V_INTREPID_PLL2 14D3< 39D3>
+1_5V_INTREPID_PLL3 14D3< 39D3>

2_5V_LX
36B4<> 39D1>
2_5V_SLEEP_PWREN_L 36C2<>
2_34V_REF
31A4<
3V_5V_OK
23A7< 34B4<> 36A8<> 36D6<
3V_5V_OK_G
23B8<
3V_5V_OK_INV
36A8<>
3V_5V_OK_L
23B8<>
3V_BG
34C4<>
3V_BOOST
34C4<>
3V_BOOST_ESR
34D3<>
3V_ITH
34C4<>

AGP_CBE<3>
AGP_DEVSEL_L
AGP_FRAME_L
AGP_GNT_L
AGP_INT_L
AGP_IRDY_L
AGP_PAR
AGP_PIPE_L
AGP_RBF_L
AGP_REQ_L
AGP_SBA<0>

12B2<> 18C7<>
12B2<> 12C2< 18B7<> 38D5>
12B2<> 12C2< 18B7<> 38D5>
12C2< 12D2<> 18B7< 38D5>
14B5<> 18B7<>
12B2<> 12C2< 18B7<> 38D5>
12B2<> 18B7> 38D5>
12A2<> 12B2<
12A2<> 12C2< 18C6> 38D5>
12C2< 12D2<> 18B7<> 38D5>
12B2< 18C6>

CBUS_DATA<13>
CBUS_DATA<14>
CBUS_DATA<15>
CBUS_DET_1_L
CBUS_DET_2_L
CBUS_INPACK_L
CBUS_INT_L
CBUS_IORD_L
CBUS_IOWR_L
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD

17A4<> 17C2<
17A4<> 17C2<
17A4<> 17C2<
17C2< 17C4< 40B8>
17A2< 17C4< 40B8>
17B2< 17B4<
14B5<> 14B7< 17A7<>
17B2< 17C4>
17B2< 17C4>
17A7<> 17A7<
17A7<> 17A7<

CPU_DATA<17>
CPU_DATA<18>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<27>

6C8<>
6C8<>
6C8<>
6C8<>
6C8<>
6C8<>
6C8<>
6C8<>
6C8<>
6C8<>
6C8<>

8C4<>
8C4<>
8C4<>
8C4<>
8C4<>
8C4<>
8C4<>
8C4<>
8C4<>
8C4<>
8C4<>

EIDE_DATA<10>
13B7<> 25D8<
EIDE_DATA<11>
13B7<> 25D8<
EIDE_DATA<12>
13B7<> 25D8<
EIDE_DATA<13>
13B7<> 25C8<
EIDE_DATA<14>
13B7<> 25C8<
EIDE_DATA<15>
13B7<> 25C8<
EIDE_DMACK_L
13A7<> 25A8< 38B5>
EIDE_DMARQ
13A7< 25B8< 38B5>
EIDE_INT
13A7< 25A8< 38B5>
EIDE_IOCHRDY
13B7< 25A8< 38B5>
EIDE_OPTICAL_ADDR<0> 25A5<> 25B7< 40A4>
EIDE_OPTICAL_ADDR<2..0> 38B5>
EIDE_OPTICAL_ADDR<1> 25A5<> 25B7< 40A4>

FW_TPB2_PD
FW_TPI0N

+1_0V_MARVELL
+1_5V_AGP

FW_TPI0P
FW_TPI1N
FW_TPI1P
FW_TPO0N
FW_TPO0P
FW_TPO0R
FW_TPO1N
FW_TPO1P
FW_VGND0
FW_VGND1
FW_VREG_PD

38C2>
30A3<>
30A3<>
38C2>
38C2>
30C2<>
30A3<>
30A3<>
30C2<>
30A3<>
29A7<

INT_MOD_BITCLK_UF 14A3<> 14A7<


INT_MOD_CLKOUT_UF 14A3<> 14B7<
INT_MOD_DTI
14A2< 26C6< 26D2<> 40B1>
INT_MOD_DTI_UF
14A7<
INT_MOD_DTO_UF
14A3<> 14B7<
INT_MOD_SYNC_UF 14A3<> 14A7<
INT_PCI_FB_IN
12C7< 37C1>
INT_PCI_FB_OUT
12C7<> 37C1>
INT_PEND_PROC_INT 14A5> 31C4<>
INT_PROC_SLEEP_REQ_L 14A5< 31B4<>
INT_PU_RESET_L
13D3< 26D3<> 31A2< 31C4<>

MEM_BA<1>
MEM_CAS_L
MEM_CKE<0>
MEM_CKE<3..0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>
MEM_CS_L<0>
MEM_CS_L<3..0>
MEM_CS_L<1>
MEM_CS_L<2>

9A5< 9C6<>
9A5< 9C6<> 37A5>
9B6<> 9C5<
37A5>
9B6<> 9C5<
9B6<> 9C5<
9B6<> 9C5<
9C5< 9C6<>
37A5>
9C5< 9C6<>
9C5< 9C6<>

+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL5
+1_5V_INTREPID_PLL6
+1_5V_INTREPID_PLL7
+1_5V_INTREPID_PLL8

3V_ITH_RC
3V_PMU_VTAP
3V_RSNS
3V_RUNSS
3V_SLEEP_PWREN_L

34C3<
33B3<
34D2< 39D1>
34C4<
34A3<>

AGP_SBA<7..0>
AGP_SBA<1>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>

38D5>
12B2<>
12B2<>
12B2<>
12B2<>

CBUS_MFUNC3_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_OE_L

17A7<> 17A7<
17A7<> 17A7<
17A7<> 17A7<
17A7< 17A7<>
17C1< 17C4>

CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<32>

6C8<>
6C8<>
6C8<>
6C8<>
6C8<>

8C4<>
8C4<>
8C4<>
8C4<>
8C4<> 8D8<

EIDE_OPTICAL_ADDR<2> 25A6<> 25B7< 40A4>


EIDE_OPTICAL_CS0_L 25A5<> 25B7< 38B5> 40D4>
EIDE_OPTICAL_CS1_L 25A6<> 25B7< 38B5> 40D4>
EIDE_OPTICAL_DATA<0> 25A5<> 25C7< 40C4>
EIDE_OPTICAL_DATA<15..0> 38B5>

FW_XI
GAIN_SETTING2
GPU_AGP_TEST
GPU_AUXWIN
GPU_B

29A5<> 37A1>
23C7<>
18D6<
19C5<>
19D6<> 22D8<

INT_REF_CLK_IN
INT_REF_CLK_OUT
INT_RESET_L
INT_ROM_CS_L
INT_ROM_OE_L

MEM_CS_L<3>
MEM_DATA<0>
MEM_DATA<7..0>
MEM_DATA<1>
MEM_DATA<2>

9C5< 9C6<>
9D8<> 10C7<>
37C5>
9D8<> 10C7<>
9D8<> 10C7<>

+1_5V_LDO
36D8< 39D6>
+1_5V_MAIN
39D6>
+1_5V_SLEEP
39D6>
+1_5V_SLEEP_NECK 21A3<> 39B3>
+1_5V_SLEEP_VIN 36D8<> 39D6>
+1_8V_ATI_PVDD
19C5<> 21B6< 21B6< 21D6<> 39C3>
+1_8V_ATI_TPVDD 21D2<>
+1_8V_DVO_F
21B2<
+1_8V_GPU
18A7< 19C8< 20A8< 21A2< 21A6<
21B1< 21B6< 21C8< 21D6< 21D8< 39C3>
+1_8V_GPU_AVDD
21D5< 39C3>

3V_SNSM
3V_SNSP
3V_SW
3V_TG
3V_VOSNS
5V_BG
5V_BOOST
5V_BOOST_ESR
5V_HD_PWREN
5V_ITH
5V_ITH_RC

34C4< 38A2>
34C4< 38A2>
34C4<> 39D1>
34D4<>
34C4<>
34C5<>
34C5<>
34D6<>
34A8<>
34C5<>
34C6<

AGP_SBA<5>
12B2<> 18C6>
AGP_SBA<6>
12B2<> 18C6>
AGP_SBA<7>
12B2<> 18C6<>
AGP_SB_STB
12B2< 12B2<> 18C6<> 38D5>
AGP_SB_STB_L
12A2< 12A2<> 18C6<> 38D5>
AGP_ST<0>
12A2<> 18C6<
AGP_ST<1>
12A2<> 18C6<
AGP_ST<2>
12A2<> 18C6<
AGP_STOP_L
12B2<> 12C2< 18B7<> 38D5>
AGP_STP_L
18C6<
AGP_SUS_STAT_L_PU 18C6<

CBUS_PCI_GNT_L
CBUS_PCI_IDSEL
CBUS_PCI_PERR_L
CBUS_PCI_REQ_L
CBUS_PCI_RESET_L
CBUS_PCI_SERR_L
CBUS_READY
CBUS_REG_L
CBUS_RESET_L
CBUS_SUSPEND_PU
CBUS_VCCD0_L

12D7<> 17A7<
17B7<
17B7<> 17D7<
12A7< 12D7<> 17A7>
17A7<
17B7> 17D7<
17B1< 17C4<
17B2< 17C4>
17B2< 17C4>
17A7< 17D7<
17C4<>

CPU_DATA<32..63>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>

37D5>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6B8<> 8C4<>
6B8<> 8C4<>
6B8<> 8B4<>
6B8<> 8B4<>
6B8<> 8B4<>
6B8<> 8B4<>
6B8<> 8B4<>

EIDE_OPTICAL_DATA<1>
EIDE_OPTICAL_DATA<2>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<4>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_DATA<8>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_DATA<11>

GPU_C
GPU_CLK27M_OUT
GPU_CLK27M_UF
GPU_COMP
GPU_CORE_OK
GPU_DVI_DDC_CLK
GPU_DVI_DDC_DATA
GPU_DVOD<0>
GPU_DVOD<0..23>
GPU_DVOD<1>
GPU_DVOD<2>

19D6<> 22A8<
37C1>
37C1>
19C6<> 22A8<
19A6<> 19D4<> 21D2<> 21D7<>
19C5<> 22D3<>
19C5<> 22C3<>
19D7<> 20C8<
38D5>
19D7<> 20C8<
19D7<> 20C8<

INT_ROM_RW_L
12A6< 12C7>
INT_SND_CLKOUT
14A3<>
INT_SND_SCLK
14A3<>
INT_SND_SYNC
14B3<>
INT_SND_TO_AUDIO 14B3<>
INT_SUSPEND_ACK_L 8B6> 31B6<>
INT_SUSPEND_REQ_L 8B6< 31B6<> 31C7<
INT_TST_MONIN_PD 13C2< 13C5<
INT_TST_MONOUT_TP 13C5>
INT_TST_PLLEN_PD 13C5< 13D2<
INT_WATCHDOG_L
14A5> 31C6<>

MEM_DATA<3>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>
MEM_DATA<8>
MEM_DATA<15..8>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<12>

9D8<>
9D8<>
9D8<>
9D8<>
9D8<>
9D8<>
37C5>
9D8<>
9D8<>
9D8<>
9D8<>

+1_8V_GPU_AVDDQ 21D4< 21D7< 39C3>


+1_8V_GPU_MEMPLL 21B5< 39C3>
+1_8V_GPU_PLL
21D5< 39C3>
+1_8V_GPU_PNLIO 21A5< 39C3>
+1_8V_GPU_PNLPLL 21B5< 39C3>
+1_8V_GPU_TP_PLL 21B4< 21D1<

5V_RSNS
5V_RUNSS
5V_SLEEP_PWREN
5V_SNSM
5V_SNSP
5V_SW

34D7< 39D1>
34C5<
34A8<>
34C5< 38A2>
34C5< 38A2>
34C5<> 39D1>

AGP_TRDY_L
12B2<> 12C2< 18B7<> 38D5>
AGP_WBF_L
12A4<> 12B2< 18B7>
AIRPORT_CLKRUN_L 25C6<> 40C1>
AIRPORT_IDSEL
25C5<> 40B1>
AIRPORT_PCI_GNT_L 12D7<> 25D5<> 40C4>
AIRPORT_PCI_INT_L 14B5<> 14D7< 25D5<> 40C4>

CBUS_VCCD1_L
CBUS_VPPD0
CBUS_VPPD1
CBUS_VS1
CBUS_VS2
CBUS_WAIT_L

17C4<>
17C4<>
17C5<>
17B2< 17C4<>
17B2< 17C4<>
17B2< 17B4<

CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<47>
CPU_DATA<48>

6B8<>
6B8<>
6B8<>
6B8<>
6B8<>
6B8<>

EIDE_OPTICAL_DATA<12> 25A6<> 25D7< 40B4>


EIDE_OPTICAL_DATA<13> 25A6<> 25C7< 40B4>
EIDE_OPTICAL_DATA<14> 25A6<> 25C7< 40B4>
EIDE_OPTICAL_DATA<15> 25A6<> 25C7< 40B4>
EIDE_OPTICAL_DMAACK_L 25A6<> 25A7< 38A5> 40A4>
EIDE_OPTICAL_DMA_RQ 25A6<> 25B7< 38A5> 40A4>

GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>

19D7<>
19D7<>
19D7<>
19D7<>
19D7<>
19D7<>

20C8<
20B8<
20B8<
20B8<
20B8<
20B8<

INV_ON_PWM
IO_RESET_L

MEM_DATA<13>
MEM_DATA<14>
MEM_DATA<15>
MEM_DATA<16>
MEM_DATA<31..16>
MEM_DATA<17>

9C8<> 10B7<>
9C8<> 10B7<>
9C8<> 10B7<>
9C8<> 10C5<>
37C5>
9C8<> 10C5<>

+1_8V_GPU_VDDDI 21C7< 21D4< 39C3>


+1_8V_MAIN
39D6> 40A2>
+1_8V_PVDD_NECK 19B5<> 39B3>
+1_8V_SLEEP
39D6>
+1_8V_SLEEP_NECK 21A3<> 39B3>
+1_95V_FW_DVDD
29C4< 29C7<> 29D5< 39A3>
+1_95V_FW_DVDD_PORT1 29D6< 39A3>
+1_95V_FW_DVDD_RX0 29C5< 39A3>
+1_95V_FW_DVDD_TX0 29C5< 39A3>
+1_95V_FW_PLL400VDD 29D5< 39A3>
+1_95V_FW_PLL500VDD 29D5< 39A3>
+1_95V_FW_PLLVDD 29D5< 29D7<> 39A3>
+2_5V_CG_MAIN
14C6< 39A3>
+2_5V_GPU
21A8< 21B6< 21D3< 21D7< 21D8<
39B3>
+2_5V_GPU_A2VDD 21D4< 21D7< 39C3>

5V_TG
5V_VOSNS
1625_BG
1625_BST
1625_BST_ESR
1625_COMP
1625_DIV
1625_ENABLE
1625_ENABLE_L
1625_EXTVCC
1625_FCB
1625_INTVCC
1625_RUNSS
1625_SGND
1625_TG
1625_VFB

34C5<>
34C5<>
33C5<>
33C5<
33C5<>
32D2< 33C6<
33C8<
33D7<>
33D7<>
33D5<> 39D1>
33C6<
33C5<> 39D1>
33C6<
33B7<> 39D1>
33C5<>
33B5<>

AIRPORT_PCI_REQ_L 12A7< 12D7<> 25D6<> 40D4>


AIRPORT_PME_L_TP 25D5<>
AMP_CONTROL
26C5<> 26D4<>
ATI_AGP_FBSKEW<0> 19C2< 19C7<>
ATI_AGP_FBSKEW<1> 19C2< 19C7<>
ATI_BUS_CFG<0>
19B2< 19C7<>
ATI_BUS_CFG<1>
19B2< 19C7<>
ATI_BUS_CFG<2>
19B2< 19C7<>
ATI_CLK27M_IN
18C1< 19B7<
ATI_CLK27M_OSC
18D2<
ATI_CLK27M_OSC_SS 18B2< 18D1<
ATI_DBI_HI_PU
18C6<>
ATI_DBI_LO_PU
18C6<>
ATI_DVOVMODE
21A2<
ATI_GPIO7
19C7<> 20D7<
ATI_GPIO8_PD
19C7<>

CBUS_WE_L
CBUS_WP_L
CG_ADDRSEL
CG_CLKOUT
CG_FSEL
CG_LOCK
CG_RESET_L
CG_SYSCLK_EN
CHARGE_DISABLE
CHARGE_LED_L
CHGND1
CHGND2
CHGND3
CHGND4
CHGND5
CHGND6

17B1< 17C4>
17A1< 17B4<
14B7<
14B6<>
14B7< 14C5<
14B7<>
14B7<
14A6< 14B7<
32A7<>
31C6<> 31D7< 32D8<> 40D2>
39A6>
39A6>
39A6>
39A6> 40B6>
39A6>
39A6>

CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<60>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<63>
CPU_DBG_L

6B8<> 8A8<
6B8<> 8A8<
6B8<> 8A8<
6B8<> 8A8<
6B8<> 8A8<
6B8<> 8A8<
6B8<> 8A8<
6B8<> 8B3<
6B8<> 8B3<
6B8<> 8B3<
6B8<> 8B3<
6B8<> 8B3<
6B8<> 8B3<
6A8<> 8B3<
6A8<> 8B3<
5C4< 8A4<>

EIDE_OPTICAL_INT 25A5<> 25A7< 38A5> 40D4>


EIDE_OPTICAL_IOCHRDY 25A5<> 25A7< 38A5> 40D3>
EIDE_OPTICAL_RD_L 25A6<> 25A7< 38B5> 40A4>
EIDE_OPTICAL_RST_L 25A7< 25B5<> 38A5> 40D4>
EIDE_OPTICAL_WR_L 25A5<> 25A7< 38A5> 40D4>
EIDE_RD_L
13A7> 25A8< 38B5>
EIDE_RST_L
13B7> 25A8< 38B5>
EIDE_WR_L
13A7> 25A8< 38B5>
ENET_COL
13C5< 28B7> 38A5>
ENET_COMA
28B7<>
ENET_CRS
13C5< 28B7> 38A5>
ENET_CTAP_CHGND 28A1< 39A6>
ENET_ENERGY_DET 14B5<> 28B7<>
ENET_HSDACM
28A7<>
ENET_HSDACP
28A7<>
ENET_LINK_RXD<0> 13C5< 28C7>

GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<11>
GPU_DVOD<12>
GPU_DVOD<13>
GPU_DVOD<14>
GPU_DVOD<15>
GPU_DVOD<16>
GPU_DVOD<17>
GPU_DVOD<18>
GPU_DVOD<19>
GPU_DVOD<20>
GPU_DVOD<21>
GPU_DVOD<22>
GPU_DVOD<23>
GPU_DVOD_DE

19D7<>
19D7<>
19D7<>
19D7<>
19D7<>
19D7<>
19D7<>
19D7<>
19D7<>
19C7<>
19C7<>
19C7<>
19C7<>
19C7<>
19C7<>
19C7<>

20B8<
20B8<
20B8<
20B7<
20B7<
20B7<
20B7<
20B7<
20B7<
20B7<
20B7<
20A7<
20A7<
20A7<
20A7<
20A7< 20A8<

JTAG_ASIC_TMS
JTAG_ASIC_TRST_L
JTAG_CPU_TCK
JTAG_CPU_TDI
JTAG_CPU_TDO_TP
JTAG_CPU_TMS
JTAG_CPU_TRST_L
JTAG_ENET_TDO
KBDLED_ANODE
KBDLED_RETURN
KBD_CAPSLOCK_LED
KBD_COMMAND_L
KBD_CONTROL_L
KBD_FUNCTION_L
KBD_ID
KBD_LED1_OUT

13C5< 13D2< 28A5< 40D8>


13C2< 13C5< 28A5< 40D8>
5B2< 5B4< 6A3> 40C8>
5B2< 5C4< 6B1<> 40C8>
5C4> 40C8>
5B2< 5B4< 6B1<> 40C8>
5B4< 6B1<> 6C2< 40B1> 40C8>
13C5< 13D2< 28A5>
23A3< 23A7<> 39B6>
23A3<> 23A7<> 39B6>
40B4>
23C2< 31C6<>
23C2< 31C6<> 40B4>
23C2< 31B6<> 40B4>
23D2< 31B6<>
40C2>

MEM_DATA<18>
MEM_DATA<19>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>
MEM_DATA<24>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<30>
MEM_DATA<31>
MEM_DATA<32>
MEM_DATA<47..32>

9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10B5<>
9C8<> 10B5<>
9C8<> 10B5<>
9C8<> 10C3<>
37B5>

+2_5V_GPU_PNLIO
+2_5V_INTREPID

21A5< 39C3>
9A8< 10D3< 10D5< 10D7< 10D8< 15D7<
16B8< 39D3>
+2_5V_MAIN
39D6>
+2_5V_MARVELL
28B8< 28C4<> 39B3>
+2_5V_MARVELL_AVDD 28C4< 39B3>
+2_5V_REG
30B6<
+2_5V_REG_F
30A7<>
+2_5V_SLEEP
39D6>
+2_5V_SLEEP_NECK1 19C4<> 39B3>
+2_5V_SLEEP_NECK2 21A3<> 39B3>

1625_VIN
1625_VSW
1772_ACIN
1772_ACOK_L
1772_BST
1772_BST_ESR
1772_CCI
1772_CCS
1772_CCV
1772_CCV_RC
1772_CELLS

33C6< 39D1>
33C4<> 39D1>
32B5<
32B5<> 32C4<>
32B4<>
32C3<
32B5<>
32B5<
32B5<>
32B5<
32B4<

CLK10M_PMU_XIN
31B6<
CLK10M_PMU_XOUT 31B6<
CLK10M_PMU_XOUT_UF 31A7<
CLK18M_INT_EXT
14A6<> 37B1>
CLK18M_INT_XIN
14A5< 37B1>
CLK18M_INT_XOUT 14A5<> 37B1>
CLK18M_XTAL_IN
14A5< 37B1>
CLK25M_ENET_XIN 28A7< 37B1>
CLK25M_ENET_XOUT 28A7<> 37B1>
CLK25M_XTAL_IN
28A7<
CLK27M_GPU_XIN
37B1>

CPU_DRDY_L
CPU_DRDY_L_UF
CPU_DTI<0>
CPU_DTI<0..2>
CPU_DTI<1>
CPU_DTI<2>
CPU_EDTI
CPU_EMODE0_L
CPU_EMODE1_L
CPU_GBL_L
CPU_HIT_L

5C4> 8A4< 8C2< 37D5>


37D5>
5C4< 8A4<>
37D5>
5C4< 8A4<>
5C4< 8A4<>
5B2< 5C4<
5A4< 7A4<
5A4< 5C2<
5A7<> 8B6<> 37D5>
5A7> 8B6< 8D2< 37D5>

ENET_LINK_RXD<7..0> 38A5>
ENET_LINK_RXD<1> 13C5< 28C7>
ENET_LINK_RXD<2> 13C5< 28C7>
ENET_LINK_RXD<3> 13C5< 28B7>
ENET_LINK_RXD<4> 13C5< 28B7>
ENET_LINK_RXD<5> 13C5< 28B7>
ENET_LINK_RXD<6> 13C5< 28B7>
ENET_LINK_RXD<7> 13C5< 28B7>
ENET_LINK_TXD<0> 13B4< 13D5>
ENET_LINK_TXD<7..0> 38A5>
ENET_LINK_TXD<1> 13B4< 13D5>

GPU_DVO_CLKP
GPU_DVO_CLKP_R
GPU_DVO_CLKP_R1
GPU_DVO_CLKP_R2
GPU_DVO_HSYNC
GPU_DVO_VSYNC
GPU_FBCLK0
GPU_FBCLK0_L
GPU_FBCLK1
GPU_FBCLK1_L
GPU_G

19C7<> 37B1>
19C8<
19C8< 20B8<
19C8< 20A7<
19C7<> 20B8< 38C5>
19C7<> 20A7< 20B8< 38C5>
37B1>
37B1>
37B1>
37B1>
19D6<> 22D8<

KBD_LED2_OUT
KBD_NUMLOCK_LED
KBD_OPTION_L
KBD_SHIFT_L
KBD_X<0>
KBD_X<1>
KBD_X<2>
KBD_X<3>
KBD_X<4>
KBD_X<5>
KBD_X<6>

40C2>
40C3>
23C2<
23C2<
23C2<
23C2<
23C2<
23C2<
23C2<
23C2<
23D2<

MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<35>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>
MEM_DATA<40>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>

9C8<>
9C8<>
9C8<>
9C8<>
9C8<>
9C8<>
9B8<>
9B8<>
9B8<>
9B8<>
9B8<>

+2_8V_GPU_LVDS_LDO 21A6<>
+3V_ATI_OSC_SLEEP 18D2< 39C3>
+3V_ATI_SS
18B2< 39C3>
+3V_CG_PLL_MAIN 14C6< 39A3>
+3V_FW
29A3< 29D7<> 30B7<> 30D5< 39A3>
+3V_FW_AVDD
29C6< 39A3>
+3V_FW_AVDD_PORT0 29C6< 39A3>
+3V_FW_AVDD_PORT1 29C6< 39A3>
+3V_FW_AVDD_PORT2 29D6< 39A3>
+3V_FW_ESD
30B3<> 30B5< 30D2<> 39B3>
+3V_FW_ESD_ILIM 30D4< 39B3>
+3V_FW_ESD_R
30B6<
+3V_FW_UF
29D7<> 39A3>
+3V_GPU
12D1< 18B8< 18C5< 18C7< 18D6<
19C4< 19C5< 19C7< 19D8< 21A7< 21B1<
21B8< 39C3>
+3V_GPU_FLT
21B2< 39C3>
+3V_HALL_EFFECT 23B6<> 39B6> 40C4>
+3V_INTREPID_USB 14C3< 39D3>
+3V_LCD
22B4<> 39B6>
+3V_LCD_SW
22A4<> 39B6>
+3V_MAIN
23A7< 39D6>
+3V_MAIN_CONN
23A6<>
+3V_NEC_VDD
27D7< 27D7< 39A3>
+3V_PMU
39D6> 40A2>
+3V_PMU_AVCC
26B1< 31B6< 31D5<> 39C6>
+3V_PMU_ESR
33A2< 39C6>
+3V_PMU_RESET
31C7< 35A3<>
+3V_SLEEP
20D5< 20D8< 23A5< 39D6>
+3V_SLEEP_AUDIO 26D6<> 26D7<>
+3V_SLEEP_NECK
21A3<> 39B3>
+3V_SLP_OK_L
34B4<>
+3V_SLP_ON
34A5<>
+4_6V_BU
33A3<> 34B6< 39C6>
+4_85V_ESR
33A4< 39C6>
+4_85V_RAW
31B4< 33A4<> 39C6>
+5V_DDC_SLEEP
22D3<> 22D5<> 39B6> 40A2>
+5V_DDC_SLEEP_UF 22D6< 39B6>
+5V_HD_SLEEP
25D1<> 34A7<> 39C6>
+5V_INV_SW
22B2<> 39B6> 40D1>
+5V_INV_UF_SW
22B2<> 39B6>
+5V_MAIN
39D6>
+5V_MAIN_AUDIO
26D7<>
+5V_MAIN_AUDIO_0 26D7<>
+5V_MAIN_CONN
39B6>
+5V_SLEEP
23A4< 39D6>
+5V_SLEEP_MM3120 23A4<>
+5V_SOUND_SLEEP 39B6>
+5V_TPAD
23B7<>
+5V_TPAD_FB
23B6<>

1772_CLS
32A4<
1772_CSIN
32B4<> 38A2>
1772_CSIP
32B4<> 38A2>
1772_CSSN
32C5< 38A2>
1772_CSSP
32C5< 38A2>
1772_DCIN
32B5< 39C6>
1772_DHI
32B4<>
1772_DLO
32B4<>
1772_DLOV
32B4<> 39C6>
1772_GND
32A5<> 39C6>
1772_ICHG
32B5<>
1772_ICTL
32B5<>
1772_IINP
32B5<
1772_LDO
32C4<> 39C6>
1772_LX
32B4<> 39C6>
1772_REF
32B5<>
1772_VCTL
32B5<
1778_BG
19A5<> 39B1>
1778_BST
19A5<> 39B1>
1778_BST_RC
19A4<> 39B1>
1778_FCB
19A5< 39B1>
1778_GND
19A5< 19A7<> 39B1>
1778_ION
19A5< 39B1>
1778_ITH
19A5<> 39B1>
1778_ITH_RC
19A7< 39B1>
1778_SHDN_L
19A6<
1778_SHDN_L_D3COLD 19A7<>
1778_TG
19A5<> 39B1>
1778_VCC
19A5<> 39B1>
1778_VFB
19A2< 19A5< 39B1> 40A1>
1778_VIN
19A5< 39B1>
1778_VRNG
19A5< 39B1>
3405_MODE
28D5<
3405_VFB
28D4<>
3707_FCB
34C5<
3707_FSET
34C5<
3707_INTVCC
34D4<> 39D1>
3707_SGND
34B5<> 39D1>
3707_STBY
34C5<>
A29_CLS_ADJ
32A5<>
A29_CURRENT_ADJ 32C4<>
A29_DETECT
31A2< 32A5<> 32C4<>
A29_DET_L
31A3<
AB_SEL_LOW
35A6<>
AC_DET
31A4<
AC_DIV
32C8<
AC_ENABLE_GATE
32D6<>
AC_ENABLE_L
32C6<>
AC_GTR_18V
32C4<>
AC_IN
28B8<> 30C8< 31B3< 32C5<> 32C7<>

ATI_GPIO9_SPN
19C7<>
ATI_GPIO10_SPN
19C7<>
ATI_GPIO11_SPN
19C7<>
ATI_GPIO12_SPN
19C7<>
ATI_GPIO13_SPN
19C7<>
ATI_HSYNC
19D5<> 22C8<
ATI_MEMTEST
18A6<>
ATI_MEMVMODE0
18A7<
ATI_MEMVMODE1
18A7<
ATI_OSC_OE
18D3<
ATI_PVDD_BYP
21D6<>
ATI_R2SET
19D6<>
ATI_RSET
19D6<>
ATI_RSTB_MSK
18C6<>
ATI_SSCLK_IN
18B1< 19B7<>
ATI_SSCLK_UF
18B1<>
ATI_TESTEN
19B7<
ATI_TMDS_CLKN
19B7> 20D5<
ATI_TMDS_CLKP
19B7> 20D5<
ATI_TMDS_DN<0>
19B7> 20D5<
ATI_TMDS_DN<1>
19B7> 20D3<
ATI_TMDS_DN<2>
19B7> 20D3<
ATI_TMDS_DP<0>
19B7> 20D5<
ATI_TMDS_DP<1>
19B7> 20D3<
ATI_TMDS_DP<2>
19B7> 20D3<
ATI_TPVDD_BYP
21D1<>
ATI_VSYNC
19D5<> 22C8<
ATI_X1CLK_SKEW<0> 19C2< 19C7<>
ATI_X1CLK_SKEW<1> 19B2< 19C7<>
AUDIO_EXT_MCLK_SEL 26C7<> 26D7<
AUDIO_LI_DET_L
14B5<> 26C5<>
AUDIO_LI_OPTICAL_PLUG_L 26C5<> 26D7<
AUDIO_LI_SPDIF_PLUG_L 14B5<> 14B7< 26D8<
AUDIO_LO_DET_L
14B5<> 26D5<>
AUDIO_LO_MUTE_L 26C5<> 26C7<>
AUDIO_LO_OPTICAL_PLUG_L 26D5<> 26D7<
AUDIO_LO_SPDIF_PLUG_L 14B5<> 14C7< 26D8<
AUDIO_MCLK_SEL
14B5<> 14C7< 26D8<
AUDIO_SPDIF_GPO0 14B5<> 14B7<
AUDIO_SPDIF_RESET 14C5<>
AUDIO_SPDIF_RESET_C 14C6<> 14D7< 26B6<
AUDIO_SPDIF_RESET_L 14B5<> 14B7< 14C5<> 14D6<
AUDIO_SPKR_MUTE_F 26C5<> 26C7<
BATTV_HIGH
32B7<>
BATTV_LOW
32B8<>
BATT_14PBUS_EN
32C1<>
BATT_14V_GATE
32C1<>
BATT_24PBUS_EN
32C2<>
BATT_24V_GATE
32C1<>
BATT_CLK
32A4<> 40C3>
BATT_DATA
32A4<> 40C3>
BATT_DIV
32A5<
BATT_ISNS_OUT
24A4<>
BATT_ISNS_R
24A3<>
BATT_LOW
32A6<>
BATT_LOW_L
32B6<>
BATT_NEG
32A4<> 39C6> 40C3>
BBANG_HRESET_L
6A2< 6B3<> 40C1>
BBANG_JTAG_TCK
6A4< 6B1<> 6D2<
BBANG_TCK_EN
6A4<
BB_EEPR_ADDR0
6D3<

CPU_HRESET_INV
7A7<>
CPU_HRESET_L
5B4< 5C2< 6A1<> 7A5< 7A8< 40C8>
CPU_L1TSTCLK
5B2< 5B4<
CPU_L2TSTCLK
5B4< 5C2<
CPU_LSSD_MODE
5B4< 5C2<
CPU_MCP_L
5B4< 5D2<
CPU_M_DM
26A7< 26B6<
CPU_M_DP
26A7< 26B6<
CPU_PLL_CFG<0>
5C4< 7D3<
CPU_PLL_CFG<1>
5C4< 7D3<
CPU_PLL_CFG<2>
5C4< 7D3<
CPU_PLL_CFG<3>
5C4< 7D3<
CPU_PLL_CFG<4>
5C4< 7D3<>
CPU_PLL_CFGEXT
7D4<>
CPU_PLL_FS00
7C4<>
CPU_PLL_FS01
7C4<
CPU_PLL_FS10
7C4<
CPU_PLL_STOP_BASE 7C7<
CPU_PLL_STOP_OC 7C4<> 7C8<> 31B6<>
CPU_PMONIN_L
5A4< 5C2<
CPU_PULLDOWN
5A2< 5A4< 5A4< 5C7<>
CPU_PULLUP
5A4< 5A4< 5C2<
CPU_QACK_L
5B4< 8B6<> 37D5>
CPU_QREQ_L
5B4> 8B6< 8C2< 37D5>
CPU_SHD0_L
5A7<> 5D2<
CPU_SHD1_L
5A7<> 5D2<
CPU_SMI_L
5B4< 5C2< 31C4<>
CPU_SRESET_L
5B2< 5B4< 40C8>
CPU_SRWX_L
5A4< 5C2<
CPU_TA_L
5B4< 8A4<> 8D2< 37D5>
CPU_TBEN
5B4< 5D2< 8A6<>
CPU_TBST_L
5A7> 8B6<> 37D5>
CPU_TEA_L
5B4< 8A4<> 8C2< 37D5>
CPU_THERM_DM
6A6<> 26A6<
CPU_THERM_DP
6A6<> 26A6<
CPU_TSIZ<0>
5A7> 8B6<>
CPU_TSIZ<0..2>
37D5>
CPU_TSIZ<1>
5A7> 8B6<>
CPU_TSIZ<2>
5A7> 8B6<>
CPU_TS_L
5C7<> 8D2< 8D6<> 37D5>
CPU_TT<0>
5A7<> 8B6<>
CPU_TT<0..4>
37C5>
CPU_TT<1>
5A7<> 8B6<>
CPU_TT<2>
5A7<> 8B6<>
CPU_TT<3>
5A7<> 8B6<>
CPU_TT<4>
5A7<> 8B6<>
CPU_VCORE_HI_OC 7B8< 31D4<> 35C8< 35D7<
CPU_VCORE_PWR_SEQ 35D8<>
CPU_VCORE_SEQ
35D8<
CPU_VCORE_SEQ_L 35D8<

ENET_LINK_TXD<2> 13B4< 13D5>


ENET_LINK_TXD<3> 13B4< 13D5>
ENET_LINK_TXD<4> 13B4< 13D5>
ENET_LINK_TXD<5> 13B4< 13D5>
ENET_LINK_TXD<6> 13A4< 13D5>
ENET_LINK_TXD<7> 13A4< 13D5>
ENET_LINK_TX_EN 13D5<> 38A5>
ENET_LINK_TX_ER 13D5<> 38A5>
ENET_MDC
13C5> 28B7< 38A5>
ENET_MDIO
13C5<> 28B7<> 38A5>
ENET_PHY_TXD<0> 13B5< 28C7<
ENET_PHY_TXD<7..0> 38A5>
ENET_PHY_TXD<1> 13B5< 28C7<
ENET_PHY_TXD<2> 13B5< 28C7<
ENET_PHY_TXD<3> 13B5< 28C7<
ENET_PHY_TXD<4> 13B5< 28C7<
ENET_PHY_TXD<5> 13B5< 28C7<
ENET_PHY_TXD<6> 13A5< 28C7<
ENET_PHY_TXD<7> 13A5< 28C7<
ENET_PHY_TX_EN
13D6< 28C7< 38A5>
ENET_PHY_TX_ER
13D6< 28C7< 38A5>
ENET_RSET
28A5<
ENET_RST_L
28B7<
ENET_RX_DV
13D5< 28B7> 38A5>
ENET_RX_ER
13C5< 28B7> 38A5>
ENET_VSSC
28A7<>
ESP_EN_L
6C1<> 6D2<
FAN1_PWM
26A4<>
FAN1_PWM_L
26A5<> 26B2<>
FAN1_TACH
26A4<> 26B2<
FAN2_PWM
26A3<>
FAN2_PWM_L
26A4<> 26B2<>
FAN2_TACH
26A3<> 26B2<
FANL_GND
39B6> 40B3>
FANL_PWM
40B3>
FANL_TACH
40B3>
FANR_GND
39B6> 40B3>
FANR_PWM
40B3>
FB_4_85V_BU
33A5<
FP_PWR_EN
19C6<> 22A6< 22B3<>
FP_PWR_EN_L
22B3<>
FWB_TPB0
29A3<
FWB_TPB1
29A4<
FWPLL_BYP
29C8<>
FW_BIAS0
29A5<>
FW_BIAS1
29A5<>
FW_BMODE
29B7<
FW_CORE_ADJ
29C8<
FW_CORE_BYP
29C7<>
FW_CPS
29B7<

GPU_HPD
GPU_MEM_IO
GPU_MEM_IO_FLT
GPU_R
GPU_SSCLK_IN
GPU_SSCLK_UF
GPU_THERM_DM_TP
GPU_THERM_DP_TP
GPU_TV_GND1
GPU_TV_GND2
GPU_VCORE

19C5< 22C3<>
39C3>
21C2< 39C3>
19D6<> 22D8<
37B1>
37C1>
18A6<>
18A6<>
22B8<> 39B6>
22A8<> 39B6>
18A6< 19A3<> 19B5<> 19D4< 39C3>
40B2>
GPU_VCORE_CNTL
19A3<>
GPU_VCORE_CNTL_L 19A4< 19B7<>
GPU_VCORE_NECK
19B5<> 39B3>
GPU_VCORE_PWR_SEQ 19A8<>
GPU_VCORE_SEQ
19A8<
GPU_VCORE_SEQ_L 19A8<
GPU_VCORE_SW
19A4<> 39B1>
GPU_VCORE_VDDCI 18A5< 39C3>
GPU_Y
19D6<> 22B8<
HD_ADDR<0>
25C2<> 25C3<
HD_ADDR<2..0>
38C5>
HD_ADDR<1>
25C2<> 25C3<
HD_ADDR<2>
25B3< 25C1<>
HD_CS0_L
25C2<> 25C3< 38B5>
HD_CS1_L
25B3< 25C1<> 38B5>
HD_DATA<0>
25C2<> 25D3<
HD_DATA<15..0>
38C5>
HD_DATA<1>
25C2<> 25D3<
HD_DATA<2>
25D2<> 25D3<
HD_DATA<3>
25D2<> 25D3<
HD_DATA<4>
25C3< 25D2<>
HD_DATA<5>
25C3< 25D2<>
HD_DATA<6>
25C3< 25D2<>
HD_DATA<7>
25C3< 25D2<>
HD_DATA<8>
25C3< 25D1<>
HD_DATA<9>
25C3< 25D1<>
HD_DATA<10>
25C3< 25D1<>
HD_DATA<11>
25D1<> 25D3<
HD_DATA<12>
25B3< 25D1<>
HD_DATA<13>
25B3< 25D1<>
HD_DATA<14>
25C1<> 25C3<
HD_DATA<15>
25B3< 25C1<>
HD_DIOR_L
25A3< 25C2<> 38B5>
HD_DIOW_L
25A3< 25C1<> 38B5>
HD_DMACK_L
25A3< 25C2<> 38B5>
HD_DMARQ
13C6< 25C2<> 38B5>
HD_INTRQ
13C6< 25C1<> 38B5>
HD_IOCHRDY
25A3< 25C1<> 38B5>

KBD_X<7>
KBD_X<8>
KBD_X<9>
KBD_Y<0>
KBD_Y<1>
KBD_Y<2>
KBD_Y<3>
KBD_Y<4>
KBD_Y<5>
KBD_Y<6>
KBD_Y<7>
LCD_DIGON_L
LCD_PWREN_L
LED_LINK10
LED_LINK100
LED_RX_SPN
LEFT_USB_DM
LEFT_USB_DP
LID_CLOSED_L
LM2594_IN
LT1962_INT_ADJ
LT1962_INT_BYP
LTC1625_ITH
LTC1962_1V5_VIN
LTC1962_1V5_VOUT
LTC1962_INT_VIN
LTC1962_L3_VIN
LTC1962_L3_VOUT
LTC3405_SW
LTC3411_GND
LTC3411_ITH
LTC3411_ITH_RC
LTC3411_SHDN
LTC3411_SYNC
LTC3411_VCC
LTC3412_GND
LTC3412_ITH
LTC3412_ITH_RC
LTC3412_PGOOD
LTC3412_RT
LTC3412_RUNSS
LTC3412_SYNC
LTC3412_VFB
LTC3412_VFB_DIV
LTC3707_START_RC
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_L0N
LVDS_L0P
LVDS_L1N

23D2< 31C6<>
23D2< 31C6<>
23D2< 31C6<>
31D6<> 40D3>
31D6<> 40D3>
31D6<>
31D6<> 40D3>
31D6<> 40D3>
31D6<>
31C6<> 40C3>
31C6<> 40C3>
22A6<
22A5<>
28B5<>
28B5<>
28B5>
25B2<> 27B3< 38A2> 40D1>
25B2<> 27A3< 38A2> 40D1>
23A6<> 40C4>
29D8<> 39B3>
14D6<
14D6<>
32D3<>
39A1>
39A1>
14D7<> 39A1>
39A1>
39A1>
28D4<> 39B3>
39A1>
39A1>
39A1>
39A1>
39A1>
39B1>
36A6<>
36A6<>
36A6<
36A4<>
36A6<
36A6<>
36A6<>
36A6<>
36A6<
34B6<>
19C5<> 22B5<> 40A7>
19C5<> 22B5<> 40A7>
19B5> 22B4<> 38C2> 40C7>
19B5> 22B4<> 38C2> 40C7>
19B5> 22B4<> 38C2> 40C7>

+5V_TPAD_SLEEP
40C4>
+12_8V_INV
22B1<> 39B6> 40A2>
+24V_PBUS
39D6> 40B2>
+24V_PBUS_CONN
33A8<>
+ADAPTER
32D8<> 33B7< 39D6>
+ADAPTER_ILIM
33B6<> 39C6>
+ADAPTER_OR_BATT 33A5<> 39C6>
+ADAPTER_SENSE
32D5<> 39C6>
+ADAPTER_SW
32D6<> 39C6>
+BATT
39D6>
+BATT_14V_FUSE
32D1<> 39C6>
+BATT_24V_FUSE
32B1< 32D2<> 39C6>
+BATT_ISNS_P
24A5<>
+BATT_POS
32A4<> 39C6> 40C3>
+BATT_RSNS
32B2< 39C6>
+BATT_VSNS
32A4< 39C6>
+FAN1_PWR
26A4<>
+FAN2_PWR
26A3<>
+FW_FUSE
30D7<> 39A3>
+FW_PWR_CTRL
30B7<>
+FW_PWR_OR
29B8< 29D8<> 30D5<> 39A3>
+FW_PWR_OR_F
30B7<>
+FW_PWR_OR_GATE 30B8<>
+FW_PWR_OR_GATE_L 30B8<
+FW_PWR_PORTA
30B5< 39A3>
+FW_SW
30D5<> 39A3>
+FW_VP0
30C2<> 39A3>
+FW_VP1
30A3<> 39A3>
+GPU_MCLK
21C7< 21D4< 39C3>
+GPU_MEM
18A6<> 18B8< 21B4< 21B7< 21C6<
21C8< 21D2< 39C3>
+GPU_MEMCORE
21C5< 39C3>
+GPU_VDD15_NECK 19B5<> 39B3>
+GPU_VDD15_UF
19B5<> 19D4<> 39C3>
+HD_LOGIC_SLEEP 25C2<> 39C6>
+PBUS
39D6> 40B2>
+PPBATT_ISNS_N
24A4<> 40B4>
+VCC_CBUS_SW
17B1< 17B2< 17D2<> 39D3>
+VPP_CBUS_SW
17B1< 17B2< 17D2<> 39C3>
1V20_REF
32C7< 33C8< 39D1>
1V65_REF
32A5<
1_5V_2_5V_OK
36C5> 39B1>
1_5V_BOOST
36C6<> 39C1>
1_5V_BST
36C5<> 39C1>
1_5V_DH
36C5<> 39C1>
1_5V_DL
36B5<> 39C1>
1_5V_FB
36B5< 36B7< 39C1>
1_5V_ILIM
36C5<> 39C1>
1_5V_LX
36B5<> 39C1>
1_5V_SLEEP_EN_L 36C7<> 36D7<>
1_8V_SLEEP_PWREN_L 36A3<>
1_8V_SW
36A5<> 39A1>
1_8V_VFB
39A1>
2_5V_BOOST
36C4<> 39D1>
2_5V_BST
36C4<> 39D1>

AC_IN_FW_CNTL
30C8<>
AC_IN_L
31B8<> 32C2<> 32C6<>
AC_IN_L_RC
32C2<>
ADAPTER_DET
31A4< 32D8<> 40C2>
ADAPTER_I_REG
32D3<>
ADT7460_TACH3_TP 26B3<
ADT7467_ADR_EN_L 26B3<>
ADT7467_THERM
23A8< 26B2<> 26B3<
ADT7467_VCC
26C3<
ADT7467_VCORE_MON 5C8<> 26B4<
AGP8X_DET_PU
18C6<>
AGP_AD<0>
12D2<> 18C7<>
AGP_AD<15..0>
38D5>
AGP_AD<1>
12C2<> 18C7<>
AGP_AD<2>
12C2<> 18C7<>
AGP_AD<3>
12C2<> 18C7<>
AGP_AD<4>
12C2<> 18C7<>
AGP_AD<5>
12C2<> 18C7<>
AGP_AD<6>
12C2<> 18C7<>
AGP_AD<7>
12C2<> 18C7<>
AGP_AD<8>
12C2<> 18C7<>
AGP_AD<9>
12C2<> 18C7<>
AGP_AD<10>
12C2<> 18C7<>
AGP_AD<11>
12C2<> 18C7<>
AGP_AD<12>
12C2<> 18C7<>
AGP_AD<13>
12C2<> 18C7<>
AGP_AD<14>
12C2<> 18C7<>
AGP_AD<15>
12C2<> 18C7<>
AGP_AD<16>
12C2<> 18C7<>
AGP_AD<31..16>
38D5>
AGP_AD<17>
12C2<> 18C7<>
AGP_AD<18>
12C2<> 18C7<>
AGP_AD<19>
12C2<> 18C7<>
AGP_AD<20>
12C2<> 18C7<>
AGP_AD<21>
12C2<> 18C7<>
AGP_AD<22>
12C2<> 18C7<>
AGP_AD<23>
12C2<> 18C7<>
AGP_AD<24>
12C2<> 18C7<>
AGP_AD<25>
12C2<> 18D7<>
AGP_AD<26>
12C2<> 18D7<>
AGP_AD<27>
12B2<> 18D7<>
AGP_AD<28>
12B2<> 18D7<>
AGP_AD<29>
12B2<> 18D7<>
AGP_AD<30>
12B2<> 18D7<>
AGP_AD<31>
12B2<> 18D7<>
AGP_AD_STB<0>
12A2<> 12B2< 18D6<> 38D5>
AGP_AD_STB<1>
12A2<> 12B2< 18D6<> 38D5>
AGP_AD_STB_L<0> 12A2<> 12B2< 18D6<> 38D5>
AGP_AD_STB_L<1> 12A2< 12A2<> 18D6<> 38D5>

BB_EEPR_ADDR1
BB_EEPR_ADDR2
BB_MISO
BB_MOSI
BB_RESET_L
BB_SCK
BCKFD_PROT_EN_L
BCKFD_PROT_GATE
BFR_TDO
BRIGHT_PWM
BRIGHT_PWM_UF
BT_USB_DM
BT_USB_DP
CAPSLOCK_LED_L
CBUS_ADDR<0>
CBUS_ADDR<1>
CBUS_ADDR<2>
CBUS_ADDR<3>
CBUS_ADDR<4>
CBUS_ADDR<5>
CBUS_ADDR<6>
CBUS_ADDR<7>
CBUS_ADDR<8>
CBUS_ADDR<9>
CBUS_ADDR<10>
CBUS_ADDR<11>
CBUS_ADDR<12>
CBUS_ADDR<13>
CBUS_ADDR<14>
CBUS_ADDR<15>
CBUS_ADDR<16>
CBUS_ADDR<17>
CBUS_ADDR<18>
CBUS_ADDR<19>
CBUS_ADDR<20>
CBUS_ADDR<21>
CBUS_ADDR<22>
CBUS_ADDR<23>
CBUS_ADDR<24>
CBUS_ADDR<25>
CBUS_ADDR_16_UF
CBUS_BVD1_L
CBUS_BVD2_L
CBUS_CE1_L
CBUS_CE2_L
CBUS_DATA<0>
CBUS_DATA<1>
CBUS_DATA<2>
CBUS_DATA<3>

6D3<
6D3<
6B3<> 6D2<
6B3<> 6D2<
6C3<
6B3<> 6D2<
32C6<>
32D6<>
6C1<> 6D2<
22A1<> 40A7>
22A2<>
14C1< 25B2<> 38B2> 40B6>
14C1< 25B2<> 38B2> 40B6>
31C7<
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B4> 17C1<
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4>
17B1< 17B4<
17B2< 17B4>
17B2< 17B4>
17B2< 17B4>
17B2< 17B4>
17B2< 17B4>
17A4> 17B2<
17A4> 17B2<
17A4> 17B2<
17A4> 17B2<
17B5<>
17B2< 17C4<
17B2< 17C4<
17C1< 17C4>
17B4> 17C2<
17A1< 17A4<>
17A1< 17A4<>
17A1< 17A4<>
17A4<> 17C1<

CLK27M_GPU_XOUT 37B1>
CLK27M_XTAL_IN
37B1>
CLK32K_PMU_XIN
31B3<>
CLK32K_PMU_XOUT 31B3<>
CLK32K_PMU_XOUT_UF 31B2<>
CLK33M_AIRPORT
12D8< 25D5<> 37C1> 40B1>
CLK33M_AIRPORT_UF 12C7<> 37C1>
CLK33M_CBUS
12D8< 17A7< 37C1>
CLK33M_CBUS_UF
12C7<> 37C1>
CLK33M_USB2
12C8< 27B7< 37C1>
CLK33M_USB2_UF
12C7<> 37C1>
CLK66M_AGP_15V_TP 12C4>
CLK66M_GPU_AGP
12C8< 18B7< 37C1>
CLK66M_GPU_AGP_UF 12C7<> 37C1>
CLKENET_LINK_GBE_REF 13C5< 28C8< 37B1>
CLKENET_LINK_GTX 13C5<> 37A1>
CLKENET_LINK_RX 13D5< 28C8< 37B1>
CLKENET_LINK_TX 13D5< 28D8< 37A1>
CLKENET_PHY_GBE_REF 28C7<> 37B1>
CLKENET_PHY_GTX 13C6< 28C7< 37A1>
CLKENET_PHY_RX
28C7<> 37B1>
CLKENET_PHY_TX
28D7<> 37B1>
CLKFW_LINK_LCLK 13C3<> 37A1>
CLKFW_LINK_PCLK 13C3<> 29C3< 37A1>
CLKFW_PHY_LCLK
13C2< 29B8< 37A1>
CLKFW_PHY_PCLK
29B4> 29C3< 37A1>
CLKLVDS_LN
19B5> 22A4<> 38C2> 40B7>
CLKLVDS_LP
19B5> 22A4<> 38C2> 40B7>
CLKLVDS_UN
19B5> 22A4<> 38C2> 40B7>
CLKLVDS_UP
19B5> 22A4<> 38C2> 40A7>
COMM_DTR_L
14C2> 26D1<> 40B2>
COMM_GPIO_L
14C2<> 26D2<> 40C2>
COMM_RESET_L
14C5<> 26D3<> 40C4>
COMM_RING_DET_L 14B5<> 14C7< 26C2<> 31C6<> 40C4>
COMM_RTS_L
14C2> 26D1<> 40B2>
COMM_RXD
14C2<> 26D1<> 40B2>
COMM_SHUTDOWN
14C5<> 26D3<> 40C4>
COMM_TRXC
14C2<> 26D2<> 40C2>
COMM_TXD_L
14C2<> 26D2<> 40C2>
COMP_DISABLE
22C2<>
COMP_ENABLE
22C1<>
COMP_RC
33C6<
CPU_AACK_L
5A7< 8B6<> 8C2< 37D5>
CPU_ADDR<0>
5C7<> 8D6<>
CPU_ADDR<0..31> 37D5>
CPU_ADDR<1>
5C7<> 8D6<>
CPU_ADDR<2>
5C7<> 8D6<>
CPU_ADDR<3>
5C7<> 8D6<>
CPU_ADDR<4>
5C7<> 8D6<>
CPU_ADDR<5>
5C7<> 8C6<>
CPU_ADDR<6>
5C7<> 8C6<>
CPU_ADDR<7>
5C7<> 8C6<>
CPU_ADDR<8>
5C7<> 8C6<>
CPU_ADDR<9>
5C7<> 8C6<>
CPU_ADDR<10>
5B7<> 8C6<>
CPU_ADDR<11>
5B7<> 8C6<>
CPU_ADDR<12>
5B7<> 8C6<>
CPU_ADDR<13>
5B7<> 8C6<>
CPU_ADDR<14>
5B7<> 8C6<>
CPU_ADDR<15>
5B7<> 8C6<>
CPU_ADDR<16>
5B7<> 8C6<>
CPU_ADDR<17>
5B7<> 8C6<>
CPU_ADDR<18>
5B7<> 8C6<>
CPU_ADDR<19>
5B7<> 8C6<>
CPU_ADDR<20>
5B7<> 8C6<>
CPU_ADDR<21>
5B7<> 8C6<>
CPU_ADDR<22>
5B7<> 8C6<>
CPU_ADDR<23>
5B7<> 8C6<>
CPU_ADDR<24>
5B7<> 8C6<>
CPU_ADDR<25>
5B7<> 8C6<>
CPU_ADDR<26>
5B7<> 8C6<>
CPU_ADDR<27>
5B7<> 8C6<>
CPU_ADDR<28>
5B7<> 8C6<>
CPU_ADDR<29>
5B7<> 8C6<>
CPU_ADDR<30>
5B7<> 8C6<>
CPU_ADDR<31>
5B7<> 8B6<>
CPU_ARTRY_L
5A7<> 8B6<> 8D2< 37D5>
CPU_AVDD
5C3< 39D3>
CPU_AVDD_ADJ
5C2<>
CPU_AVDD_SHDN_L 5C3<>
CPU_AVDD_VIN
5C4<
CPU_AVDD_VOUT
5C3<>
CPU_BG_L
5C7< 8C2< 8D6<> 37D5>
CPU_BR_L
5C7> 8D2< 8D6< 37D5>
CPU_BUS_VSEL
5C4< 7A6<
CPU_CHKSTP_OUT_L 5B4<> 5C2< 40D8>
CPU_CHKS_L
5A4< 5D2<
CPU_CI_L
5A7> 8B6<> 37D5>
CPU_CLKOUT_SPN
5C4>
CPU_CLK_EN
8A6< 31C4<>
CPU_DATA<0>
6D8<> 8D4<>
CPU_DATA<0..31> 37D5>
CPU_DATA<1>
6D8<> 8D4<>
CPU_DATA<2>
6D8<> 8D4<>
CPU_DATA<3>
6D8<> 8D4<>
CPU_DATA<4>
6D8<> 8D4<>
CPU_DATA<5>
6D8<> 8D4<>
CPU_DATA<6>
6D8<> 8D4<>
CPU_DATA<7>
6D8<> 8D4<>

CPU_VCORE_SLEEP

5C3< 5D8<> 6C6<> 35C1< 35D2< 39D3>


40B2>
CPU_VCORE_SLEEP_F 35C2<>
CPU_VCORE_SNUB
35B3<
CPU_WT_L
5A7> 8B6<> 37C5>
CSLOT_ADDR3_SPN 13B7>
CSLOT_ADDR4_SPN 13B7>
CSLOT_ADDR5_SPN 13B7>
CSLOT_ADDR6_SPN 13B7>
CSLOT_ADDR7_SPN 13B7>
CSLOT_ADDR8_SPN 13B7>
CSLOT_ADDR9_SPN 13B7>
CSLOT_CE1_L_SPN 13C7>
CSLOT_CE2_L_SPN 13C7>
CSLOT_IORD_L_SPN 13C7>
CSLOT_IOWAIT_L_PU 13C7<
CSLOT_IOWR_L_SPN 13C7>
CSLOT_OE_L_SPN
13C7>
CSLOT_WE_L_SPN
13C7>
CURRENT_THRESHOLD 32C4<
CY25811_S0
18B2<
CY25811_S1
18B2<
DCDC_EN
19A7<> 30C8< 34B6<> 35C8<> 40C1>
DCDC_EN_CTRL
30C8<>
DCDC_EN_L
34B6< 34B7<> 36C7<>
DDC_CLK_ISO
22D4<>
DDR_VREF
11D1< 11D3<> 11D5<> 11D6<> 11D8<>
39D3>
DVI_DDC_CLK
22D4<>
DVI_DDC_CLK_UF
22C5<> 22D3<> 40C7>
DVI_DDC_DATA
22C4<>
DVI_DDC_DATA_UF 22C5<> 40C7>
DVI_HPD
22C4<>
DVI_HPD_DIV
22C3<
DVI_HPD_UF
22C3< 22C5<> 40C7>
DVI_TRUN_ON_ILIM 22D2<
DVI_TURN_ON
22D3<>
DVI_TURN_ON_BASE 22D2<
EEPROM_WP_PD
6D2<>
EIDE_ADDR<0>
13B7> 25B8<
EIDE_ADDR<2..0> 38B5>
EIDE_ADDR<1>
13B7> 25B8<
EIDE_ADDR<2>
13B7> 25B8<
EIDE_CS0_L
13B7> 25B8< 38B5>
EIDE_CS1_L
13B7> 25B8< 38B5>
EIDE_DATA<0>
13C7<> 25C8<
EIDE_DATA<15..0> 38B5>
EIDE_DATA<1>
13C7<> 25C8<
EIDE_DATA<2>
13C7<> 25C8<

FW_INPUT_PD
29A7<
FW_LINK_CNTL<0> 13C3<> 29C3<
FW_LINK_CNTL<1..0> 38A5>
FW_LINK_CNTL<1> 13C3<> 29C3<
FW_LINK_DATA<0> 13D3<> 29B8<
FW_LINK_DATA<7..0> 38A5>
FW_LINK_DATA<1> 13D3<> 29B8<
FW_LINK_DATA<2> 13D3<> 29B8<
FW_LINK_DATA<3> 13D3<> 29A8<
FW_LINK_DATA<4> 13C3<> 29A8<
FW_LINK_DATA<5> 13C3<> 29A8<
FW_LINK_DATA<6> 13C3<> 29A8<
FW_LINK_DATA<7> 13C3<> 29A8<
FW_LINK_LREQ
13C3<> 38A5>
FW_LKON
13C3<> 29B5<>
FW_OSC
29A4< 37A1>
FW_OSC_EN
29A3<
FW_PC_PD
29B7<
FW_PC_PU
29B7<
FW_PHY_CNTL<0>
29B4<> 29C3<
FW_PHY_CNTL<1..0> 38A5>
FW_PHY_CNTL<1>
29B4<> 29C3<
FW_PHY_DATA<0>
29B8<>
FW_PHY_DATA<7..0> 38A5>
FW_PHY_DATA<1>
29B8<>
FW_PHY_DATA<2>
29B8<>
FW_PHY_DATA<3>
29A8<>
FW_PHY_DATA<4>
29A8<>
FW_PHY_DATA<5>
29A8<>
FW_PHY_DATA<6>
29A8<>
FW_PHY_DATA<7>
29A8<>
FW_PHY_LPS
13C3<> 29B8<
FW_PHY_LREQ
13C2< 29B8< 38A5>
FW_PHY_PD
14C5< 29B8<
FW_PHY_PD_INT
14A7< 14C5<>
FW_PHY_RESET_L
29A8<
FW_PINT
13C3<> 29B4> 38A5>
FW_PLL_ADJ
29C7<
FW_PORT1_SEL
29B6<
FW_PWREN_L
30C6<>
FW_PWR_GATE
30D6<>
FW_R0
29A5<>
FW_R1
29A5<>
FW_TESTM
29A7<
FW_TPA0N
29B1<> 30C4<> 38D2>
FW_TPA0N_CONN
30C3<>
FW_TPA0P
29B1<> 30C4<> 38D2>
FW_TPA0P_CONN
30C3<>
FW_TPA1N
29B1<> 30A4<> 38C2>

LVDS_L1P
LVDS_L2N
LVDS_L2P
LVDS_L3N_TP
LVDS_L3P_TP
LVDS_U0N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
LVDS_U3N_TP
LVDS_U3P_TP
MAIN_RESET_L

AGP_ATI_RESET_L
AGP_ATI_VREF
AGP_ATI_VREFG
AGP_BUSY_L
AGP_CBE<0>
AGP_CBE<1..0>
AGP_CBE<1>

CBUS_DATA<4>
CBUS_DATA<5>
CBUS_DATA<6>
CBUS_DATA<7>
CBUS_DATA<8>
CBUS_DATA<9>

17A4<> 17C1<
17A4<> 17C1<
17A4<> 17C1<
17A4<> 17C1<
17A2< 17A4<>
17A2< 17A4<>

CPU_DATA<8>
CPU_DATA<9>
CPU_DATA<10>
CPU_DATA<11>
CPU_DATA<12>
CPU_DATA<13>

6D8<>
6D8<>
6C8<>
6C8<>
6C8<>
6C8<>

8D4<>
8D4<>
8D4<>
8D4<>
8C4<>
8C4<>

EIDE_DATA<3>
EIDE_DATA<4>
EIDE_DATA<5>
EIDE_DATA<6>
EIDE_DATA<7>
EIDE_DATA<8>

13C7<>
13C7<>
13B7<>
13B7<>
13B7<>
13B7<>

FW_TPA1P
FW_TPB0N
FW_TPB0N_CONN
FW_TPB0P
FW_TPB0P_CONN
FW_TPB1N

29B1<>
29B1<>
30C3<>
29B1<>
30C3<>
29B1<>

CBUS_DATA<10>

17A2< 17A4<>

CPU_DATA<14>

6C8<> 8C4<>

EIDE_DATA<9>

13B7<> 25D8<

FW_TPB1P

29B1<> 30A4<> 38C2>

HD_RESET_L
25A3< 25D2<> 38B5>
HIGH_VCORE
19A2<>
HIGH_VCORE_DIV
19A3<
HPD_4V_REF
22C3<
HPD_BASE
22C1<
HPD_ON
22C2<>
HPD_ON_RC
22C2<
HPD_PWR_SNS_EN
19C7<> 22C3<>
HPD_PWR_SW
22C2<>
I2S0_BITCLK_F
26B7< 26C7<>
I2S0_DEV_TO_SB_DTI_F 26C7< 26C7<>
I2S0_MCLK_F
26C7< 26C7<>
I2S0_RESET_L_F
26B7< 26C5<>
I2S0_SB_TO_DEV_DTO_F 26C7< 26C7<>
I2S0_SYNC_F
26C7< 26C7<>
I2S1_BITCLK_F
26B7< 26C7<>
I2S1_DEV_TO_SB_DTI_F 26C5< 26C7<>
I2S1_RESET_L_F
26B5< 26C5<>
I2S1_SYNC_F
26B7< 26C7<>
IAC_FB
32D4<
IAC_RC_COMP
32D4<
ICT_TRST_L
6B1<> 6D2<
INTREPID_ACS_REF 8A6<
INT_AGPPVT
12D4<>
INT_AGP_FB_IN
12C4< 37C1>
INT_AGP_FB_OUT
12C4<> 37C1>
INT_AGP_VREF
12B4< 12D4<> 18D5< 39D3>
INT_AUDIO_TO_SND 14B2< 26C8< 40C6>
INT_CPUFB_IN
8A6< 8B6< 37D1>
INT_CPUFB_IN_NORM 8A4< 37D1>
INT_CPUFB_LONG
8A4< 37D1>
INT_CPUFB_OUT
8A6< 8A6<> 37D1>
INT_CPUFB_OUT_NORM 8A4< 37D1>
INT_CPUFB_OUT_SHORT 8A5< 37D1>
INT_DDRCLK2_N_TP 9B6<>
INT_DDRCLK2_P_TP 9B6<>
INT_DDRCLK5_N_TP 9B6<>
INT_DDRCLK5_P_TP 9B6<>
INT_ENET_RST_L
14B5<> 28B8<
INT_EXTINT8_PU
14B5<> 14C7<
INT_EXTINT10_PU 14A7< 14B5<>
INT_EXTINT13_PU 14B5<> 14B7<
INT_GPIO0
14C5<>
INT_GPIO1_PU
14C5<> 14C7< 35C8<
INT_GPIO9_PU
14A7< 14B5<>
INT_I2C_CLK0
6B3<> 6D2< 11A3<> 11A8<> 13C2<
13C3<> 23C4<> 40B8>
INT_I2C_CLK1
13C2< 13C3<> 14B7< 23A7<> 24C2<>
26B4< 40B8>
INT_I2C_CLK2
14A2<> 26C5<> 26D3<> 40C6>
INT_I2C_DATA0
6B3<> 6D2<> 11A3<> 11A8<> 13C2<
13C3<> 23C4<> 40B8>
INT_I2C_DATA1
13B2< 13C3<> 14B7< 23A7<> 24C2<>
26B4<> 40B8>
INT_I2C_DATA2
14A2<> 26C3<> 26C5<> 40C6>
INT_JTAG_TEI
13C2< 13C5<

2_5V_DH

14D3< 39D3>
12D3< 39D3>
12D6< 39D3>
8D5< 39D3>
14D3< 39D3>

36C4<> 39D1>

36B4<> 39D1>
36C5<> 39C1>

18B7<
18B7<
18B7<
12C4<> 12D2< 18D6>
12B2<> 18B7<>
38D5>
12B2<> 18B7<>

18C6>
18C6>
18C6>
18C6>

8D8<
8D8<
8D8<
8D8<
8D8<
8D8<
8D8<
8C8<
8C8<
8C8<

8B4<> 8C8<
8B4<> 8C8<
8B4<> 8B8<
8B4<> 8B8<
8B4<> 8B8<
8A8< 8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8B4<>
8C2< 37D5>

25C8<
25C8<
25B8<
25C8<
25C8<
25D8<

25A5<> 25C7< 40C4>


25A5<> 25C7< 40C4>
25A5<> 25C7< 40C4>
25A5<> 25C7< 40C4>
25A5<> 25B7< 40C4>
25A5<> 25C7< 40C4>
25A5<> 25C7< 40B4>
25A6<> 25D7< 40B4>
25A6<> 25D7< 40B4>
25A6<> 25D7< 40B4>
25A6<> 25D7< 40B4>

30A4<> 38C2>
30C4<> 38D2>
30C4<> 38D2>
30A4<> 38C2>

38C2> 40D2>
38C2> 40D2>

39A3> 40A3>
38C2> 40D2>
38C2> 40D2>
39A3>
39A3>

JTAG_ASIC_TCK
JTAG_ASIC_TDI
JTAG_ASIC_TDO

9B6< 39D3>
9A7< 9B6<> 39D3>

14A5< 14B5< 37C1>


14A5> 14B7< 37C1>
9B3< 13D3< 31C7< 31D4<>
12A6< 12C7>
12A6< 12C7>

19C6<> 22A3<
17A7< 23C6< 24C2< 27B8< 28B8<
31C6<> 31D7<
13C5< 13D2< 28A5< 40D8>
28A5< 28D7< 40D8>
13C5> 13D2< 14A7< 40D8>

31B6<>
31C6<>
31C6<>
31C6<>
31C6<>
31C6<>
31C6<>
31C6<>
31C6<>

40B4>
40B4>
40B4>
40B4>
40B4>

10C7<>
10C7<>
10C7<>
10C7<>
10C7<>
10C7<>
10C7<>
10C7<>
10C7<>
10B7<>

10C3<>
10C3<>
10C3<>
10C3<>
10C3<>
10C3<>
10C3<>
10C3<>
10C3<>
10C3<>
10C3<>

MEM_DATA<44>
9B8<> 10C3<>
MEM_DATA<45>
9B8<> 10B3<>
MEM_DATA<46>
9B8<> 10B3<>
MEM_DATA<47>
9B8<> 10B3<>
MEM_DATA<48>
9B8<> 10C1<>
MEM_DATA<55..48> 37B5>
MEM_DATA<49>
9B8<> 10C1<>
MEM_DATA<50>
9B8<> 10C1<>
MEM_DATA<51>
9B8<> 10C1<>
MEM_DATA<52>
9B8<> 10C1<>
MEM_DATA<53>
9B8<> 10C1<>
MEM_DATA<54>
9B8<> 10C1<>
MEM_DATA<55>
9B8<> 10C1<>
MEM_DATA<56>
9B8<> 10C1<>
MEM_DATA<63..56> 37A5>
MEM_DATA<57>
9B8<> 10C1<>
MEM_DATA<58>
9B8<> 10C1<>
MEM_DATA<59>
9B8<> 10C1<>
MEM_DATA<60>
9B8<> 10C1<>
MEM_DATA<61>
9B8<> 10B1<>
MEM_DATA<62>
9B8<> 10B1<>
MEM_DATA<63>
9B8<> 10B1<>
MEM_DQM<0>
9C6<> 10C7<> 37C5>
MEM_DQM<1>
9C6<> 10B7<> 37C5>
MEM_DQM<2>
9C6<> 10C5<>
MEM_DQM<3..2>
37B5>
MEM_DQM<3>
9C6<> 10B5<>
MEM_DQM<4>
9C6<> 10C3<>
MEM_DQM<5..4>
37B5>
MEM_DQM<5>
9C6<> 10B3<>
MEM_DQM<6>
9C6<> 10C1<> 37B5>
MEM_DQM<7>
9C6<> 10B1<> 37A5>
MEM_DQS<0>
9C6<> 10C7<> 37C5>
MEM_DQS<1>
9C6<> 10B7<> 37C5>
MEM_DQS<2>
9C6<> 10C5<>
MEM_DQS<3..2>
37B5>
MEM_DQS<3>
9C6<> 10B5<>
MEM_DQS<4>
9C6<> 10C3<>
MEM_DQS<5..4>
37B5>
MEM_DQS<5>
9C6<> 10B3<>
MEM_DQS<6>
9C6<> 10C1<> 37B5>
MEM_DQS<7>
9C6<> 10B1<> 37A5>
MEM_MUXSEL_H<0> 9B6<> 10A6<
MEM_MUXSEL_H<1..0> 37A5>
MEM_MUXSEL_H<1> 9B6<> 10A4<
MEM_MUXSEL_L<0> 9B6<> 10A6<
MEM_MUXSEL_L<1..0> 37A5>
MEM_MUXSEL_L<1> 9B6<> 10A4<
MEM_RAS_L
9A5< 9C6<> 37A5>
MEM_WE_L
9A5< 9C6<> 37A5>

19B5> 22B4<> 38C2> 40C7>


19B5> 22B4<> 38C2> 40C7>
19B5> 22B4<> 38C2> 40C7>
19B5>
19B5>
19C5> 22A4<> 38C2> 40B7>
19C5> 22A4<> 38C2> 40B7>
19C5> 22A4<> 38C2> 40B7>
19C5> 22A4<> 38C2> 40B7>
19B5> 22A4<> 38B2> 40B7>
19B5> 22A4<> 38B2> 40B7>
19B5>
19B5>
14C7< 17A7< 17D5< 18C8< 20D7<
25D6<> 27B8< 31D4<> 31D7< 40C1>
MASTER_SWING
20B7<
MAX1715_FB2
36B1< 36B4<
MAX1715_GND
36B5<> 36C5< 39C1>
MAX1715_ON_RC
36C7<>
MAX1715_REF
36B5<> 39C1>
MAX1715_SKIP
36C4< 39C1>
MAX1715_TON
36C5< 39C1>
MAX1715_VCC
36D5< 39C1>
MAX1717_AB_SEL
35A7< 35C6<
MAX4172_OUT
32D4<>
MAX8860_CC
21A6<>
MAX8860_FAULT
21A6<>
MAXBUS_SLEEP
5D1< 5D5< 6B2< 6B4< 6C1< 7B7< 7D8<
8B8< 8C3< 8C8< 8D1< 8D8< 15D8< 16D8<
35D8< 39D3>
MDI0_PD
28B4<
MDI1_PD
28B4<
MDI2_PD
28B4<
MDI3_PD
28B3<
MDI_M<0>
28B5<> 38D2>
MDI_M<1>
28B5<> 38D2>
MDI_M<2>
28B5<> 38D2>
MDI_M<3>
28B5<> 38D2>
MDI_P<0>
28B5<> 38D2>
MDI_P<1>
28B5<> 38D2>
MDI_P<2>
28B5<> 38D2>
MDI_P<3>
28B5<> 38D2>
MEM_ADDR<0>
9B5< 9D6<>
MEM_ADDR<12..0> 37A5>
MEM_ADDR<1>
9B5< 9D6<>
MEM_ADDR<2>
9B5< 9D6<>
MEM_ADDR<3>
9B5< 9D6<>
MEM_ADDR<4>
9B5< 9D6<>
MEM_ADDR<5>
9B5< 9D6<>

MLB_ALS_GAIN_SW 23C4<> 23C8<>


MLB_ALS_OP_COMP 23D7<
MLB_ALS_OP_IN
23D7<
MLB_ALS_OUT
23B4<> 23D6<
MLB_ALS_OUT_FB
23D7<>
MLB_PHOTODIODE
23D8<>
MMM_ACC_DETECT
24B8<> 24C2<>
MMM_ACC_PWRDOWN 24B8<> 24C1< 24C7<>
MMM_ACC_SELFTEST 24B8<> 24C2<> 24C7<> 40A4>
MMM_ACC_X_AXIS
24C5< 24C5> 24D2<> 40A4>
MMM_ACC_Y_AXIS
24C5< 24C5> 24D2<> 40A4>
MMM_ACC_Z_AXIS
24B5< 24C2<> 24C5> 40A4>
MMM_FFIRQ_L
14A7< 14B5<> 24C1<
MMM_PIC_AAC_PWRDOWN 24C3<>
MMM_PIC_AN2_PD
24D4<>
MMM_PIC_AN3_PU
24C4<>
MMM_PIC_FFIRQ_L 24C2<>
MMM_PIC_SIRQ_L
24C2<>
MMM_RESET_L
24C1< 24C3<>
MMM_SIRQ_L
14A7< 14B5<> 24C1<
MODEM_USB_DM
14C1< 26D2<> 38A2> 40B6>
MODEM_USB_DP
14C1< 26D2<> 38A2> 40B6>
MOD_BITCLK
14A2< 26B8< 26D2<> 40B1>
MOD_CLKOUT
14A2< 26D3<> 40A1>
MOD_DTO
14A2< 26D3<> 40A1>
MOD_SYNC
14A2< 26B8< 26D2<> 40A1>
MPIC_CPU_INT_L
5B2< 5B4< 14B5>
MSEN_PULL_UP_MASTER 20C6<>
MSEN_PULL_UP_SLAVE 20B5<>
NEC_AMC_TP
27A5<
NEC_AVDD
27D6< 39A3>
NEC_AVSS_F
27A5< 27B4<
NEC_CRUN_L
27A7<>
NEC_IDSEL
27B7<
NEC_IO_RESET_L
27B7< 27B7<
NEC_LEFT_USB_OVERCURRENT 25B2<> 27D1< 40D1>
NEC_LEFT_USB_PWREN 25B2<> 27B5<> 40D1>
NEC_LEGC
27A7<
NEC_MAIN_RESET_L 27A7< 27B7<
NEC_NANDTESTEN_TP 27A5<
NEC_NANDTESTOUT_TP 27A4<>
NEC_NC1_TP
27B5<>
NEC_NC2_TP
27B5<>
NEC_OCI<1>
27B5< 27D2<
NEC_OCI<2>
27B5< 27D2<
NEC_OCI<3>
27B5<
NEC_OCI<4>
27B5<
NEC_OCI<5>
27B5<
NEC_PCI_INTA_L
27A7< 27B7>

MEM_ADDR<6>
MEM_ADDR<7>
MEM_ADDR<8>
MEM_ADDR<9>
MEM_ADDR<10>
MEM_ADDR<11>

9B5<
9B5<
9B5<
9A5<
9A5<
9A5<

NEC_PCI_INTB_L
NEC_PCI_INTC_L
NEC_PCI_PERR_L
NEC_PCI_SERR_L
NEC_PME_L
NEC_PPON3_TP

27A7< 27B7>
27A7< 27B7>
27B7<> 27C8<
27B7> 27C8<
27A7> 27B7<
27B5>

MEM_ADDR<12>

9A5< 9D6<>

NEC_PPON4_TP

27B5>

9D6<>
9D6<>
9D6<>
9D6<>
9D6<>
9D6<>

42

8
NEC_PPON5_TP
27B5>
NEC_RIGHT_USB_OVERCURRENT

RAM_ADDR<11>
RAM_ADDR<12>

9A4< 11B5<> 11B6<>


9A4< 11B3<> 11B8<>

RAM_DQM_B<2>
RAM_DQM_B<3..2>

10C6<> 11C5<>
37B5>

THERM2_A_DM
THERM2_A_DP

26A6< 26A7< 38A2>


26A6< 26A7< 38A2>

VCORE_VID<4>
VGA_B

35A2<> 35B8< 35D4<>


22C6<> 22D7< 40D7>

RAM_BA<0>
RAM_BA<1..0>
RAM_BA<1>
RAM_CAS_L
RAM_CKE<0>
RAM_CKE<3..0>
RAM_CKE<1>
RAM_CKE<2>
RAM_CKE<3>
RAM_CS_L<0>
RAM_CS_L<3..0>

9A4< 11B3<> 11B8<>


37A5>
9A4< 11B5<> 11B6<>
9A4< 11B5<> 11B6<> 37A5>
9A3< 9C4< 11B6<>
37A5>
9A3< 9C4< 11B8<>
9A3< 9C4< 11C5<>
9A3< 9C4< 11C3<>
9C4< 11B8<>
37A5>

RAM_DQM_B<3>
RAM_DQM_B<4>
RAM_DQM_B<5..4>
RAM_DQM_B<5>
RAM_DQM_B<6>
RAM_DQM_B<7>
RAM_DQS_A<0>
RAM_DQS_A<1>
RAM_DQS_A<2>
RAM_DQS_A<3..2>
RAM_DQS_A<3>

10C6<>
10C4<>
37B5>
10C4<>
10C2<>
10C2<>
10B8<>
10C7<>
10B6<>
37B5>
10C5<>

11C5<>
11B5<>

THERM2_DM
THERM2_DP
THERM2_M_DM
THERM2_M_DP
THERM_INV
THERM_L_OC
THERM_L_OC_CONN
TMDS_CLKN
TMDS_CLKP
TMDS_CLK_CMF
TMDS_CONN_CLKN

26A5< 26B5<> 26B5< 38A2>


26A5< 26B5<> 26B5< 38A2>
38A2>
38A2>
26B2<>
26B1<> 31B4<>
23A7<>
20B2< 20C3< 20D4< 22B7<> 38B2>
20B3< 20C3< 20D4< 22C7<> 38B2>
20B3<
22B6<> 22C7<> 38B2> 40A8>

VGA_G
VGA_HSYNC
VGA_HSYNC_BUF
VGA_R
VGA_VSYNC
VGA_VSYNC_BUF

22C5<>
22C6<>
22C8<>
22C5<>
22C5<>
22C8<>

NEC_XT1
NEC_XT2
NEC_XT2_R
NTEST1_TP
NUMLOCK_LED_L

RAM_CS_L<1>
RAM_CS_L<2>
RAM_CS_L<3>
RAM_DATA_A<0>
RAM_DATA_A<7..0>

9C4< 11B6<>
9C4< 11B3<>
9C4< 11B5<>
10C8<> 11D8<>
37C5>

RAM_DQS_A<4>
RAM_DQS_A<5..4>
RAM_DQS_A<5>
RAM_DQS_A<6>
RAM_DQS_A<7>

10B4<>
37B5>
10C3<>
10B2<>
10C1<>

11B8<>

TMDS_CONN_CLKP
TMDS_CONN_DN<0>
TMDS_CONN_DN<1>
TMDS_CONN_DN<2>
TMDS_CONN_DN<3>

22C6<>
22C7<>
22B7<>
22B6<>
20D1<>

22C7<> 38B2> 40D7>


22D6<>
22D5<>
22D5<>
22C5<>

32C3<>
23B2< 23C4<>
23B2< 23C4<>
23B2< 23C4<>
23B2< 23C4<>
23B2< 23C4<>
23B2< 23B4<>
17C7<
9C3< 12D6<> 17C7<> 25B5<> 27D7<>
40B6>
38C5>

RAM_DATA_A<1>
10C8<> 11D8<>
RAM_DATA_A<2>
10C8<> 11D8<>
RAM_DATA_A<3>
10B8<> 11D8<>
RAM_DATA_A<4>
10B8<> 11D6<>
RAM_DATA_A<5>
10B8<> 11D6<>
RAM_DATA_A<6>
10B8<> 11D6<>
RAM_DATA_A<7>
10B8<> 11D6<>
RAM_DATA_A<8>
10B8<> 11D8<>
RAM_DATA_A<15..8> 37C5>
RAM_DATA_A<9>
10C7<> 11D8<>
RAM_DATA_A<10>
10C7<> 11D8<>

RAM_DQS_B<0>
RAM_DQS_B<1>
RAM_DQS_B<2>
RAM_DQS_B<3..2>
RAM_DQS_B<3>
RAM_DQS_B<4>
RAM_DQS_B<5..4>
RAM_DQS_B<5>
RAM_DQS_B<6>
RAM_DQS_B<7>
RAM_MUXSEL_H

10C8<> 11D3<> 37C5>


10C8<> 11D3<> 37C5>
10C6<> 11C3<>
37B5>
10C6<> 11C3<>
10C4<> 11B3<>
37B5>
10C4<> 11B3<>
10C2<> 11A3<> 37B5>
10C2<> 11A3<> 37A5>
10A3< 10A5< 10B1<> 10B3<> 37A5>

TMDS_CONN_DN<4>
TMDS_CONN_DN<5>
TMDS_CONN_DP<0>
TMDS_CONN_DP<1>
TMDS_CONN_DP<2>
TMDS_CONN_DP<3>
TMDS_CONN_DP<4>
TMDS_CONN_DP<5>
TMDS_D0_CMF
TMDS_D1_CMF
TMDS_D2_CMF

20D1<>
20D1<>
22B7<>
22B7<>
22B6<>
20D1<>
20D1<>
20D1<>
20B3<
20A3<
20A3<

22C5<>
22C7<>
22D6<>
22D5<>
22D5<>
22C5<>
22C5<>
22C7<>

9C3< 12D6<> 17C7<> 25B6<> 27D7<>


40A6>
9C3< 12D6<> 17C7<> 25C5<> 27D7<>
40A6>
9C3< 12D6<> 17C7<> 25C6<> 27C7<>
40A6>

RAM_DATA_A<11>
RAM_DATA_A<12>
RAM_DATA_A<13>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DATA_A<16>

11D8<>
11D6<>
11D6<>
11D6<>
11D6<>
11D8<>

RAM_MUXSEL_L
RAM_RAS_L
RAM_WE_L
RESET_VREF
RF_DISABLE_L_SPN
RIGHT_USB_DM

10A3< 10A5< 10B5<>


9A4< 11B5<> 11B6<>
9A4< 11B3<> 11B8<>
6C3<>
25D6<> 40C1>
27A3< 33A7<> 38A2>

10B7<> 37A5>
37A5>
37A5>

TMDS_D3_CMF
TMDS_D4_CMF
TMDS_D5_CMF
TMDS_DN<0>

40D1>

TMDS_DN<1>

9C3<
40A6>
9C3<
40A6>
9C3<
40A6>
9C3<
40D5>
9C3<
40D5>
9C3<
40D5>
9C3<
40D5>
9C3<
40D5>

12D6<> 17C7<> 25C5<> 27C7<>

RAM_DATA_A<31..16> 37B5>
RAM_DATA_A<17>
10C6<> 11C8<>
RAM_DATA_A<18>
10C6<> 11C8<>
RAM_DATA_A<19>
10B6<> 11C8<>
RAM_DATA_A<20>
10B6<> 11D6<>
RAM_DATA_A<21>
10B6<> 11C6<>
RAM_DATA_A<22>
10B6<> 11C6<>
RAM_DATA_A<23>
10B6<> 11C6<>
RAM_DATA_A<24>
10B6<> 11C8<>
RAM_DATA_A<25>
10C5<> 11C8<>
RAM_DATA_A<26>
10C5<> 11C8<>
RAM_DATA_A<27>
10C5<> 11C8<>
RAM_DATA_A<28>
10C5<> 11C6<>
RAM_DATA_A<29>
10C5<> 11C6<>
RAM_DATA_A<30>
10C5<> 11C6<>
RAM_DATA_A<31>
10C5<> 11C6<>

RIGHT_USB_DP
RJ45_C0_PD
RJ45_C1_PD
RJ45_C2_PD
RJ45_C3_PD
RJ45_DN<0>
RJ45_DN<1>
RJ45_DN<2>
RJ45_DN<3>
RJ45_DP<0>
RJ45_DP<1>
RJ45_DP<2>
RJ45_DP<3>
ROM_CS_L
ROM_OE_L
ROM_ONBOARD_CS_L

27A3< 33A7<> 38A2> 40D1>


28B2<>
28B2<>
28B2<>
28B2<>
28B2<> 38D2> 40B3>
28B2<> 38D2> 40B3>
28B2<> 38D2> 40A3>
28B2<> 38D2> 40A3>
28B2<> 38D2> 40B3>
28B2<> 38D2> 40B3>
28B2<> 38D2> 40A3>
28B2<> 38D2> 40A3>
9B3< 12A5< 25B6<> 40B1>
9B3< 12A5< 25C5<> 40B1>
9B3< 25C6<> 40B1>

9C3<
40D5>
9C3<
40C5>
9C3<
40C5>
9C3<
40C5>
9C3<
40C5>
9C3<

12C6<> 17C7<> 25C6<> 27C7<>

RAM_DATA_A<32>
10C4<> 11B8<>
RAM_DATA_A<47..32> 37B5>
RAM_DATA_A<33>
10C4<> 11B8<>
RAM_DATA_A<34>
10C4<> 11B8<>
RAM_DATA_A<35>
10C4<> 11B8<>
RAM_DATA_A<36>
10B4<> 11B6<>
RAM_DATA_A<37>
10B4<> 11B6<>
RAM_DATA_A<38>
10B4<> 11B6<>
RAM_DATA_A<39>
10B4<> 11B6<>
RAM_DATA_A<40>
10B4<> 11B8<>
RAM_DATA_A<41>
10D3<> 11B8<>

ROM_RW_L
ROM_WP_L
RSDM3_TP
RSDM4_TP
RSDM5_TP
RSDP3_TP
RSDP4_TP
RSDP5_TP
RUN_OR_AC
SI_I2C_CLK
SI_I2C_DATA

9B3< 12A5< 25C6<> 40B1>


9B3<
27C5>
27C5>
27C5>
27C5>
27C5>
27C5>
30D7<>
19C5<> 20B5< 20C7<
19C5<> 20B5<> 20C7<>

40C5>
PCI_AD<18>
9C3< 12C6<> 17B7<> 25C5<> 25D4<
27C7<> 40C5>
PCI_AD<19>
9C3< 12C6<> 17B7<> 25C6<> 27C7<>
40C5>
PCI_AD<20>
9B3< 12C6<> 17B7<> 25C5<> 27C7<>
40C5>
PCI_AD<21>
12C6<> 17B7<> 25C6<> 27C7<> 40C5>
PCI_AD<22>
12C6<> 17B7<> 25C5<> 27C7<> 40B5>
PCI_AD<23>
12C6<> 17B7<> 25C6<> 27C7<> 40B5>
PCI_AD<24>
9C1<> 12C6<> 17B7<> 25C5<> 27C7<>
40B5>
PCI_AD<25>
9C1<> 12C6<> 17B7<> 25D6<> 27C7<>
40B5>
PCI_AD<26>
9C1<> 12C6<> 17B7<> 25C5<> 27C7<>
40B5>
PCI_AD<27>
9C1<> 12C6<> 17B7<> 25D6<> 27C8<>
40B5>
PCI_AD<28>
9C1<> 12C6<> 17B7<> 25D5<> 27C7<>
40B5>
PCI_AD<29>
9C1<> 12C6<> 17B7<> 25D6<> 27B7<>
40B5>
PCI_AD<30>
9C1<> 12C6<> 17B7<> 25D5<> 27B7<>
40B5>
PCI_AD<31>
9C1<> 12C6<> 17B7<> 25D6<> 27B7<>
40A5>
PCI_CBE<0>
12C7<> 17B7<> 25C5<> 27B7<> 40D4>
PCI_CBE<3..0>
38C5>
PCI_CBE<1>
12C7<> 17B7<> 25C6<> 27B7<> 40D4>
PCI_CBE<2>
12C7<> 17B7<> 25C6<> 27B7<> 40D4>
PCI_CBE<3>
12C7<> 17B7<> 25C6<> 27B7<> 40D4>
PCI_DEVSEL_L
12B7< 12C7<> 17A7<> 25C5<> 27B7<>
38C5> 40A5>
PCI_FRAME_L
12B7< 12C7<> 17B7<> 25C5<> 27B7<>
38C5> 40A5>
PCI_IRDY_L
12B7< 12C7<> 17B7<> 25C6<> 27B7<>
38C5> 40A5>
PCI_PAR
12C7<> 17B7<> 25C5<> 27B7<> 38C5>
40D4>
PCI_STOP_L
12A7< 12C7<> 17B7<> 25C5<> 27B7<>
38C5> 40A5>
PCI_TRDY_L
12B7< 12C7<> 17A7<> 25C5<> 27B7<>
38C5> 40A5>
PLL_STOP_L
7C4<> 7C8<>
PMU_ACK_L
14C2< 31C4<>
PMU_AC_DET
31A5< 31B4<>
PMU_AC_IN
31B4<>
PMU_BATT0_DET_L 31B4<>
PMU_BATT1_DET_L_PU 31B4<> 31D2<
PMU_BATT_DET_L
31A8<> 31B3< 31D2< 32A4<> 40C3>

RAM_DATA_A<42>
10C3<> 11A8<>
RAM_DATA_A<43>
10C3<> 11A8<>
RAM_DATA_A<44>
10C3<> 11B6<>
RAM_DATA_A<45>
10C3<> 11B6<>
RAM_DATA_A<46>
10C3<> 11A6<>
RAM_DATA_A<47>
10C3<> 11A6<>
RAM_DATA_A<48>
10C2<> 11A8<>
RAM_DATA_A<55..48> 37B5>
RAM_DATA_A<49>
10C2<> 11A8<>
RAM_DATA_A<50>
10C2<> 11A8<>
RAM_DATA_A<51>
10C2<> 11A8<>
RAM_DATA_A<52>
10B2<> 11A6<>
RAM_DATA_A<53>
10B2<> 11A6<>
RAM_DATA_A<54>
10B2<> 11A6<>
RAM_DATA_A<55>
10B2<> 11A6<>
RAM_DATA_A<56>
10B2<> 11A8<>
RAM_DATA_A<63..56> 37A5>
RAM_DATA_A<57>
10D1<> 11A8<>
RAM_DATA_A<58>
10C1<> 11A8<>
RAM_DATA_A<59>
10C1<> 11A8<>
RAM_DATA_A<60>
10C1<> 11A6<>
RAM_DATA_A<61>
10C1<> 11A6<>
RAM_DATA_A<62>
10C1<> 11A6<>
RAM_DATA_A<63>
10C1<> 11A6<>
RAM_DATA_B<0>
10C8<> 11D3<>
RAM_DATA_B<7..0> 37C5>
RAM_DATA_B<1>
10C8<> 11D3<>
RAM_DATA_B<2>
10C8<> 11D3<>
RAM_DATA_B<3>
10C8<> 11D3<>
RAM_DATA_B<4>
10C8<> 11D5<>
RAM_DATA_B<5>
10C8<> 11D5<>
RAM_DATA_B<6>
10C8<> 11D5<>
RAM_DATA_B<7>
10C8<> 11D5<>
RAM_DATA_B<8>
10C8<> 11D3<>
RAM_DATA_B<15..8> 37C5>
RAM_DATA_B<9>
10C8<> 11D3<>
RAM_DATA_B<10>
10C8<> 11D3<>
RAM_DATA_B<11>
10C8<> 11D3<>
RAM_DATA_B<12>
10C8<> 11D5<>
RAM_DATA_B<13>
10C8<> 11D5<>
RAM_DATA_B<14>
10C8<> 11D5<>
RAM_DATA_B<15>
10C8<> 11D5<>
RAM_DATA_B<16>
10C6<> 11D3<>
RAM_DATA_B<31..16> 37B5>

SI_MASTER
SI_M_HTPLG
SI_RESET_L
SI_SECONDARY
SI_S_HTPLG
SI_TMDS_CLKN
SI_TMDS_CLKP
SI_TMDS_DN<0>
SI_TMDS_DN<1>
SI_TMDS_DN<2>
SI_TMDS_DN<3>
SI_TMDS_DN<4>
SI_TMDS_DN<5>
SI_TMDS_DP<0>
SI_TMDS_DP<1>
SI_TMDS_DP<2>
SI_TMDS_DP<3>
SI_TMDS_DP<4>
SI_TMDS_DP<5>
SI_VREF
SLAVE_SWING
SLEEP

PMU_BYTE
31B6< 31C7<
PMU_CAPSLOCK_LED_L 31C6<>
PMU_CHARGE_V
31C4<> 32B8<>
PMU_CHRG_BATT_0 31C4<> 32A8<>
PMU_CLK
14C2<> 31C4<>
PMU_CNVSS
31B6< 31C7<
PMU_CPU_HRESET_L 6A2< 6C3<> 31C4<>
PMU_CUSTOM_RESET 31A8<>
PMU_CUSTOM_RESET_L 31A7<> 31B8<
PMU_EPM
31D2< 31D4<>
PMU_FROM_INT
14C2<> 31C4<>
PMU_I2C_CLK
31B4<> 31C2<
PMU_I2C_DATA
31B4<> 31C2<
PMU_INT_L
14B5<> 14B7< 31B6<>
PMU_INT_NMI
14B5<> 14B7< 31D4<>
PMU_KB_RESET_L
40B2>
PMU_LID_CLOSED_L 23A8< 23B4<> 31B2< 31C4<>
PMU_NMI_BUTTON_L 26A1< 31C2< 31C4<>
PMU_NMI_L
31C2< 31C4<>
PMU_NUMLOCK_LED_L 31C6<>
PMU_OOPS
31B2< 31B4<>
PMU_PME_L
14B5<> 27B8< 31B2< 31C4<>
PMU_POWERUP_OK
31B4<> 31D2<
PMU_POWER_UP_L
30D8<> 31C6<> 31D7< 34B8<
PMU_REQ_L
14B7< 14C2> 31C4<>
PMU_RESET_BUTTON_L 26A2< 31C4<> 31D2<
PMU_RESET_L
31B7<>
PMU_SELECT
31C6<>
PMU_SLEEP_LED
23B4<>
PMU_SLEEP_LED_L 23B3<> 31C4<>
PMU_SMB_CLK
31B4<> 31C2< 32A3<
PMU_SMB_DATA
31B4<> 31C2< 32A2<
PMU_TO_INT
14C2<> 31C4<>
POWER_UP
30D8<>
POWER_VALID
31B2< 31C4<>
PP3V3_MMM
24C8< 24D6<
PP3V3_MMM_PIC
24C1< 24D5<
PP3V3_SI_AVCC1
20D7< 39B3>
PP3V3_SI_AVCC2
20C5< 39B3>
PP3V3_SI_PVCC1
20C7< 39B3>
PP3V3_SI_PVCC2
20C5< 39B3>
PP3V3_SI_VCC1
20D7< 39B3>
PP3V3_SI_VCC2
20C5< 39B3>
PWR_BUTTON_L
23A7<> 26C1< 40B2>
RAM_ADDR<0>
9B4< 11B5<> 11B6<>
RAM_ADDR<12..0> 37A5>
RAM_ADDR<1>
9B4< 11B3<> 11B8<>
RAM_ADDR<2>
9B4< 11B5<> 11B6<>
RAM_ADDR<3>
9B4< 11B3<> 11B8<>
RAM_ADDR<4>
RAM_ADDR<5>
RAM_ADDR<6>
RAM_ADDR<7>
RAM_ADDR<8>
RAM_ADDR<9>

9B4<
9B4<
9B4<
9B4<
9B4<
9A4<

RAM_ADDR<10>

9A4< 11B3<> 11B8<>

OVER_18V_ADJ
PA2_PD
PA3_PD
PB2_PD
PB3_PD
PB4_PD
PC0_PD
PCI1510_VR_EN_L
PCI_AD<0>

PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>

NEC_RIGHT_USB_PWREN 27B5<> 33A7<> 40C1>


NEC_RREF
27B5<>
NEC_SMI_L_TP
27A7>
NEC_USB_DAM
27B4< 27C2<> 38B2>
NEC_USB_DAP
27A4< 27C2<> 38B2>
NEC_USB_DBM
27A4< 27C2<> 38B2>
NEC_USB_DBP
27A4< 27C2<> 38B2>
NEC_USB_RSDM1
27C5<> 38B2>
NEC_USB_RSDM2
27C5<> 38B2>
NEC_USB_RSDP1
27C5<> 38B2>
NEC_USB_RSDP2
27C5<> 38B2>

PCI_AD<31..0>

27D1< 33B7<> 40C1>

27D5< 37B1>
27D5<> 37B1>
27D4<
27B5<
31D7<

12D6<> 17C7<> 25C6<> 27C7<>


12C6<> 17C7<> 25C5<> 27C7<>
12C6<> 17C7<> 25C6<> 27C7<>
12C6<> 17C7<> 25C6<> 27C7<>
12C6<> 17C7<> 25C5<> 27C7<>
12C6<> 17C7<> 25C6<> 27C7<>
12C6<> 17C7<> 25C5<> 27C7<>

12C6<> 17C7<> 25C5<> 27C7<>


12C6<> 17C7<> 25C6<> 27C7<>
12C6<> 17C7<> 25C5<> 27C7<>
12C6<> 17C7<> 25C5<> 27C7<>
12C6<> 17C7<> 25C6<> 27C7<>

11B5<>
11B3<>
11B5<>
11B3<>
11B5<>
11B3<>

11B6<>
11B8<>
11B6<>
11B8<>
11B6<>
11B8<>

10C7<>
10C7<>
10C7<>
10C7<>
10C7<>
10C6<>

11B5<>
11A5<>
11A5<>
11D8<>
11D8<>
11C8<>

37B5>
37A5>
37C5>
37C5>

11C8<>

11A8<>
11A8<> 37B5>
11A8<> 37A5>

TMDS_DN<2>
TMDS_DN<3>
TMDS_DN<4>
TMDS_DN<5>
TMDS_DP<0>
TMDS_DP<1>
TMDS_DP<2>
TMDS_DP<3>
TMDS_DP<4>
TMDS_DP<5>
TMDS_MASTER

40A8>
20A2<
40A8>
20B1<
20B1<
20A1<
20B3<
40A8>
20A3<
40A8>
20A3<
40A8>
20B2<
20B2<
20A2<
20B8<

20C1<
20C1<
20C1<
20C3<

20C3< 20D2< 22B7<> 38B2>


20C1< 20D2<>
20C1< 20D2<>
20C1< 20D2<>

TMDS_SYNC
20A7< 20B8<
TPAD_F_RXD
40C4>
TPAD_F_TXD
40C4>
TPAD_RXD
31C2< 31C4<>
TPAD_TXD
31B2< 31C4<>
TPS2211_SHDN_L_PU 17C4<
TP_BB_XTAL
6C3<>
TP_MMM_ICSP_PGC 24C3<>
TP_MMM_ICSP_PGD 24C3<>
TP_MMM_ICSP_PGM 24C3<>
TV_C
22A6<> 40D6>

14B1< 26C8< 40D6>


14B1< 26C8< 40D6>
22D1< 23A8< 31A8<> 31C6<> 31D7<
35A3<>
SOUND_SPDIF_GPO0 14C5< 26D8<
SPDIF_GPO0
26D7<> 26D7<
SRCLK_TP
27A5> 40A4>
SRMOD_TP
27A5< 40A4>
ST7_ICP_SEL_PD
23A2< 23C6<
ST7_KBD_LED_OUT 23A5<> 23C4<>
ST7_OSC1
23C6<
ST7_OSC2
23C6<>
ST7_PB6_PD
23A2< 23C4<>
ST7_RESET_L
23C6<>
ST7_SENSOR4_SCK_PD 23B2< 23C4<>
ST7_SENSOR4_SDA_PD 23B2< 23C4<>
ST7_SENSOR5_SCK 23B2< 23C4<>
ST7_SENSOR5_SDA 23B3< 23C4<>
ST7_SLEEP_LED_H 23B4<> 23C4<>
ST7_XTAL_IN
23C6<
STOP_AGP_L
12D2< 12D4<>
SUPPLY_M_DM
26A8< 26B6<
SUPPLY_M_DP
26A8< 26B6<
SUTRO_ALS_GAIN_SW 23C4<> 25B2<> 40C2>
SUTRO_ALS_OUT
23B4<> 25B2<> 40C2>
SYSCLK_CPU
5C4< 8A6< 37D1>
SYSCLK_CPU_UF
8A6<> 37D1>
SYSCLK_DDRCLK_A0 9D4< 11D8<> 37D1>
SYSCLK_DDRCLK_A0_L 9D4< 11D8<> 37D1>
SYSCLK_DDRCLK_A0_L_UF 9B6<> 9D5< 37D1>
SYSCLK_DDRCLK_A0_UF 9B6<> 9D5< 37D1>
SYSCLK_DDRCLK_A1 9D4< 11A6<> 37D1>
SYSCLK_DDRCLK_A1_L 9D4< 11A6<> 37D1>
SYSCLK_DDRCLK_A1_L_UF 9B6<> 9D5< 37D1>
SYSCLK_DDRCLK_A1_UF 9B6<> 9D5< 37D1>
SYSCLK_DDRCLK_B0 9D4< 11D3<> 37D1>
SYSCLK_DDRCLK_B0_L 9C4< 11D3<> 37C1>
SYSCLK_DDRCLK_B0_L_UF 9B6<> 9C5< 37D1>
SYSCLK_DDRCLK_B0_UF 9B6<> 9D5< 37D1>
SYSCLK_DDRCLK_B1 9D4< 11A5<> 37C1>
SYSCLK_DDRCLK_B1_L 9D4< 11A5<> 37C1>
SYSCLK_DDRCLK_B1_L_UF 9B6<> 9D5< 37D1>
SYSCLK_DDRCLK_B1_UF 9B6<> 9D5< 37D1>
SYSCLK_LA_TP
8A6<>
SYSTEM_CLK_EN
14A5< 14A7< 31C4<>
SYS_BATT_ISNS
24A2< 31C2<
SYS_BATT_ISNS1
31B4<> 31C3<
SYS_BATT_ISNS2
31B4<> 31C3<
TEB_TP
27A5< 40A4>

USB_DDP
14B2<> 14C2<
USB_DEM
14B2<> 14C2< 38B2>
USB_DEP
14B2<> 14C2< 38B2>
USB_DFM
14B2<> 14B2< 38B2>
USB_DFP
14B2< 14B2<> 38B2>
USB_OC_AB_L
14B2< 14C7<
USB_OC_CD_L
14B2< 14C7<
USB_OC_EF_L
14B2< 14D7<
USB_PWREN_AB_L
14B2<> 14C7<
USB_PWREN_CD_L
14B2<> 14C7<
USB_PWREN_EF_L
14B2<> 14D7<
USB_TPAD_N
14B1< 23A7<>
USB_TPAD_P
14B1< 23A7<>
VCORE_BOOST
35C4<> 39C1>
VCORE_BST
35C5<> 39C1>
VCORE_CC
35B6<> 39B1>
VCORE_CNTL_RC
19A3<>
VCORE_DH
35B5<> 39C1>
VCORE_DL
35B5<> 39C1>
VCORE_FAST<1>
35D3< 35D5<
VCORE_FAST<2>
35D3< 35D5<
VCORE_FAST<3>
35D3< 35D5<
VCORE_FAST<4>
35D3< 35D5<
VCORE_FB
35B5< 39B1> 40A2>
VCORE_GND
35B5<> 39B1>
VCORE_GNDA
35B6<>
VCORE_GNDDIV
35A4< 35B5< 39B1>
VCORE_GNDDIV_TEST 35A3<>
VCORE_GNDSNS
35A2<> 35A4< 39B1>
VCORE_GNDSNS_TEST 35A3<>
VCORE_ILIM
35C6<> 39C1>
VCORE_LX
35B5<> 39C1>
VCORE_MUX_EN
35D5<> 40A2>
VCORE_MUX_SEL
35D5<>
VCORE_REF
35B6<> 39C1>
VCORE_SEL_OFF_PU 35B6<>
VCORE_SEL_ON
35B6<>
VCORE_SHDN_L
5B3<> 35C6<>
VCORE_SLOW<1>
35D6<
VCORE_SLOW<2>
35D6<
VCORE_SLOW<3>
35D6<
VCORE_SLOW<4>
35D6<
VCORE_SNS
35A1<> 39B1>
VCORE_TIME
35B4<> 39B1>
VCORE_TON
35B6< 39C1>
VCORE_VCC
35C6< 39C1>
VCORE_VGATE
14B6< 14B7< 35B4> 39B1>
VCORE_VID0
40A3>
VCORE_VID1
40A3>

RAM_DQM_A<4>
RAM_DQM_A<5..4>
RAM_DQM_A<5>
RAM_DQM_A<6>
RAM_DQM_A<7>
RAM_DQM_B<0>

10B4<>
37B5>
10C3<>
10B2<>
10C1<>
10C8<>

11A6<>
11A6<> 37B5>
11A6<> 37A5>
11D5<> 37C5>

TEST_TP
THERM1_A_DM
THERM1_A_DP
THERM1_DM
THERM1_DP
THERM1_M_DM

27A5<
26A6<
26A6<
26A5<
26A5<
38A2>

VCORE_VID2
VCORE_VID3
VCORE_VID4
VCORE_VID<0>
VCORE_VID<1>
VCORE_VID<2>

40A3>
40A3>
40A3>
35A2<> 35B8<
35A2<> 35B8< 35D4<>
35A2<> 35B8< 35D4<>

RAM_DQM_B<1>

10C8<> 11D5<> 37C5>

THERM1_M_DP

38A2>

VCORE_VID<3>

35A2<> 35B8< 35D4<>

40A4>
26A8<
26A8<
26A5<
26A5<

22D7< 40D7>
22C7< 40D7>

20C3< 20D2< 22B8<> 38B2>

SND_SYNC
SND_TO_AUDIO
SOFT_PWR_ON_L

11B6<>

22D7< 40D7>
22C7< 40D7>

20D2<>
20D2<>
20D2<>
20D4< 22B8<> 38B2>

RAM_DATA_B<23>
10C6<> 11C5<>
RAM_DATA_B<24>
10C6<> 11C3<>
RAM_DATA_B<25>
10C6<> 11C3<>
RAM_DATA_B<26>
10C6<> 11C3<>
RAM_DATA_B<27>
10C6<> 11C3<>
RAM_DATA_B<28>
10C6<> 11C5<>
RAM_DATA_B<29>
10C6<> 11C5<>
RAM_DATA_B<30>
10C6<> 11C5<>
RAM_DATA_B<31>
10C6<> 11C5<>
RAM_DATA_B<32>
10D4<> 11B3<>
RAM_DATA_B<47..32> 37B5>
RAM_DATA_B<33>
10C4<> 11B3<>
RAM_DATA_B<34>
10C4<> 11B3<>
RAM_DATA_B<35>
10C4<> 11B3<>
RAM_DATA_B<36>
10C4<> 11B5<>
RAM_DATA_B<37>
10C4<> 11B5<>
RAM_DATA_B<38>
10C4<> 11B5<>
RAM_DATA_B<39>
10C4<> 11B5<>
RAM_DATA_B<40>
10C4<> 11B3<>
RAM_DATA_B<41>
10C4<> 11B3<>
RAM_DATA_B<42>
10C4<> 11A3<>
RAM_DATA_B<43>
10C4<> 11A3<>
RAM_DATA_B<44>
10C4<> 11B5<>
RAM_DATA_B<45>
10C4<> 11B5<>
RAM_DATA_B<46>
10C4<> 11A5<>
RAM_DATA_B<47>
10C4<> 11A5<>
RAM_DATA_B<48>
10D2<> 11A3<>
RAM_DATA_B<55..48> 37B5>
RAM_DATA_B<49>
10C2<> 11A3<>
RAM_DATA_B<50>
10C2<> 11A3<>
RAM_DATA_B<51>
10C2<> 11A3<>
RAM_DATA_B<52>
10C2<> 11A5<>
RAM_DATA_B<53>
10C2<> 11A5<>
RAM_DATA_B<54>
10C2<> 11A5<>
RAM_DATA_B<55>
10C2<> 11A5<>
RAM_DATA_B<56>
10C2<> 11A3<>
RAM_DATA_B<63..56> 37A5>
RAM_DATA_B<57>
10C2<> 11A3<>
RAM_DATA_B<58>
10C2<> 11A3<>
RAM_DATA_B<59>
10C2<> 11A3<>
RAM_DATA_B<60>
10C2<> 11A5<>
RAM_DATA_B<61>
10C2<> 11A5<>
RAM_DATA_B<62>
10C2<> 11A5<>
RAM_DATA_B<63>
10C2<> 11A5<>
RAM_DQM_A<0>
10B8<> 11D6<> 37C5>
RAM_DQM_A<1>
10C7<> 11D6<> 37C5>
RAM_DQM_A<2>
10B6<> 11C6<>
RAM_DQM_A<3..2> 37B5>
RAM_DQM_A<3>
10C5<> 11C6<>

11C3<>
11C3<>
11C3<>
11D5<>
11C5<>
11C5<>

20C3< 20D2< 22B7<> 38B2>

TV_COMP
TV_GND1
TV_GND2
TV_Y
UIDE_ADDR<0>
UIDE_ADDR<2..0>
UIDE_ADDR<1>
UIDE_ADDR<2>
UIDE_CS0_L
UIDE_CS1_L
UIDE_DATA<0>
UIDE_DATA<6..0>
UIDE_DATA<1>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<4>
UIDE_DATA<5>
UIDE_DATA<6>
UIDE_DATA<7>
UIDE_DATA<8>
UIDE_DATA<15..8>
UIDE_DATA<9>
UIDE_DATA<10>
UIDE_DATA<11>
UIDE_DATA<12>
UIDE_DATA<13>
UIDE_DATA<14>
UIDE_DATA<15>
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_DMACK_L
UIDE_DMARQ
UIDE_INTRQ
UIDE_IOCHRDY
UIDE_REF
UIDE_RST_L
USB2_PCI_GNT_L
USB2_PCI_INT_L
USB2_PCI_REQ_L
USB_D1M
USB_D1P
USB_D2M
USB_D2P
USB_DAM
USB_DAP
USB_DBM
USB_DBP
USB_DCM
USB_DCP
USB_DDM

10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>

20B2<
20B1<
20A1<
20B2< 20C3< 20D4< 22C8<> 38B2>
40B8>
20A2< 20C3< 20D2< 22B8<> 38B2>

20B8<
20B7<
20B5< 20C7< 20D8<
20A7<
20A5<
20B7< 20C4<
20B7< 20C4<
20B7< 20C4<
20B7< 20C4<
20B7< 20C4<
20A5< 20C2<
20A5< 20C2<
20A5< 20C2<
20B7< 20C4<
20B7< 20C4<
20B7< 20C4<
20A5< 20C2<
20A5< 20C2<
20A5< 20C2<
20A8< 20B8<
20A5<
23C4<> 31B6<> 31D7< 34A4< 34A6<
34B3< 34B8<> 36B3< 36D2< 40A1>
SLEEP_ANODE
23C2< 26C5<>
SLEEP_LED
40B6>
SLEEP_LED_I
23C2<
SLEEP_LED_L
23C3<
SLEEP_LED_SW_L
23C3<>
SLEEP_LED_UF
23C2<
SLEEP_LS5
34A5<> 34A8<
SLEEP_LS5_EN_L
34A5<>
SLEEP_L_LS5
19A7<> 28A8<> 34A5<> 35C8<> 36C8<
SLEEP_L_LS5_EN_L 34A6<>
SLEEP_L_LS5_INV 36A3< 36C2< 36C8<>
SLEEP_L_LS5_NET 34B3<> 36C8<>
SLEEP_NET
34A3<>
SLEEP_NET_INV
34A3<>
SMC_TP
27B5<
SND_AGND
26C6<> 39B6>
SND_AMP_MUTE
26D4< 26D4<> 40A4>
SND_AMP_MUTE_INV 26C8< 26D4<
SND_AMP_MUTE_L
14C5<> 26D3<>
SND_CLKOUT
14B1< 26C8< 37B1> 40D6>
SND_HP_MUTE
26C4<>
SND_HP_MUTE_INV 40A4>
SND_HP_MUTE_L
14C5<> 26C4<>
SND_HP_SENSE_L
40C6>
SND_HW_RESET_L
14A7< 14B5<> 26B8< 40C6>
SND_LIN_SENSE_L 40C6>
SND_SCLK
14B1< 26B8< 37B1> 40C6>

RAM_DATA_B<17>
RAM_DATA_B<18>
RAM_DATA_B<19>
RAM_DATA_B<20>
RAM_DATA_B<21>
RAM_DATA_B<22>

38A2>
38A2>
26B5<> 26B5< 38A2>
26B5<> 26B5< 38A2>

22A6<> 40D6>
22B6<> 39B6> 40A7>
22A6<> 39B6> 40A7>
22A6<> 40D6>
13D7<> 25C4<
38C5>
13D7<> 25C4<
13D7<> 25B4<
13C7<> 25C4< 38C5>
13C7<> 25B4< 38C5>
13D7<> 25D4<
38C5>
13D7<> 25D4<
13D7<> 25D4<
13D7<> 25D4<
13D7<> 25C4<
13D7<> 25C4<
13D7<> 25C4<
13D7<> 25C4< 38C5>
13D7<> 25C4<
38C5>
13D7<> 25C4<
13D7<> 25C4<
13D7<> 25D4<
13D7<> 25B4<
13D7<> 25B4<
13D7<> 25C4<
13D7<> 25B4<
13C7<> 25A4< 38C5>
13C7<> 25A4< 38C5>
13C7<> 25A4< 38C5>
13C7<> 38C5>
13C7< 38C5>
13C7< 25A4< 38C5>
13C7<> 39D3>
13C7<> 25A4< 38C5>
12C7<> 27B7<
14B5<> 14C7< 27A8<
12A7< 12D7<> 27B7>
14D1< 27A5> 27B4<
14D1< 27A4< 27A5>
27A5>
27A5>
14B2<> 14D2< 27A5>
14B2<> 14D2< 27A5>
14B2<> 14D1<
14B2<> 14D1<
14B2<> 14D2< 27A5>
14B2<> 14D2< 27A5>
14B2<> 14C2<

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-6694

SCALE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

B
OF

43
43

45

*** Part Cross-Reference for the entire design ***

C166
C167

CAP
CAP

19
19

C334
C335

CAP
CAP

16
16

C502
C503

CAP
CAP

28
28

C670
C671

CAP
CAP

23
21

C838
C839

CAP
CAP

27
27

J7
J8

CON_4RT_WRIB 22
CON_F16ST_D_SMA 26

Q60
Q61

TRA_IRF7811W 33
TRA_SI4888DY 34

R140
R141

RES
RES

8
8

BS1
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10

PCB_STANDOFF 4
CAP
22
CAP
35
CAP
35
CAP
35
CAP
35
CAP
35
CAP
35
CAP
5
CAP
16
CAP
16

C168
C169
C170
C171
C172
C173
C174
C175
C176
C177
C178

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

5
5
5
16
16
16
16
16
16
16
16

C336
C337
C338
C339
C340
C341
C342
C343
C344
C345
C346

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

16
16
19
21
5
5
5
5
5
5
5

C504
C505
C506
C507
C508

CAP
CAP
CAP
CAP
CAP

28
28
28
35
34

C509
C510
C511
C512
C513
C514

CAP
CAP
CAP
CAP
CAP
CAP

33
33
28
35
26
19

C672
C673
C674
C675
C676
C677
C678
C679
C680
C681
C682

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

21
23
35
23
22
36
26
35
35
26
35

C840
C841
C842
C843
C844
C845
C846
C847
C848
C849
C850

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

27
27
27
27
27
27
26
21
21
21
21

J9
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19

CON_M80ST_D4MT_SM 17
CON_M50SM_5MM 25
CON_F14RT_S2MT_SM 33
CON_M40ST_D4MT_SM 26
CON_M50SM_5MM 25
CON_F30RT_T6MT_TH1 22
CON_F5RT_MINIDIN_TH 22
CON_10STSM_5087 26
CON_RJ45_SHORT_4MT_TH 28
CON_M8RT_S_SM 32
CON_F200RT_DDRDIMM_SM1 11

Q62
Q63
Q64
Q65
Q66
Q67
Q68
Q69
Q70
Q71
Q72

TRA_2N3904 26
TRA_IRF7805 32
TRA_IRF7811W 32
TRA_2N7002DW 32
TRA_2N3904 26
TRA_NDS9407 30
TRA_IRF7811W 36
TRA_IRF7805 36
TRA_SI3443DV 23
TRA_SI4888DY 34
TRA_SI4888DY 34

R142
R143
R144
R145
R146
R147
R148
R149
R150
R151
R152

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

8
8
8
13
12
12
5
7
8
8
8

C11
C12
C13
C14
C15

CAP
CAP
CAP
CAP
CAP

18
5
35
23
14

C179
C180
C181
C182
C183

CAP
CAP
CAP
CAP
CAP

16
16
16
14
16

C347
C348
C349
C350
C351

CAP
CAP
CAP
CAP
CAP

5
16
16
16
16

C515
C516
C517
C518
C519

CAP
CAP
CAP
CAP
CAP

19
34
28
35
36

C683
C684
C685
C686
C687

CAP
CAP
CAP
CAP
CAP

36
22
22
14
35

C851
C852
C853
C854
C855

CAP
CAP
CAP
CAP
CAP

21
21
21
21
21

J20
J21
J22
J23
J25

CON_M80ST_D2MT_SM3 25
CON_F14RT_S2MT_SM 23
CON_F200RT_DDRDIMM_SM2 11
CON_F6RT_S4MT_TH1 30
CON_M8RT_S_SM 32

Q73
Q74
Q75
Q76
Q77

TRA_SI2319DS 30
TRA_2N3906 23
TRA_2N7002DW 23
TRA_SUD45P03 32
TRA_SI3446DV 19

R153
R154
R155
R156
R157

RES
RES
RES
RES
RES

8
13
14
14
12

C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

16
16
16
16
16
16
16
16
16
5
16

C184
C185
C186
C187
C188
C189
C190
C191
C192
C193
C194

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

16
16
19
19
5
5
5
5
5
5
5

C352
C353
C354
C355
C356
C357
C358
C359
C360
C361
C362

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

16
14
16
16
16
16
21
21
21
21
21

C520
C521
C522
C523
C524
C525
C526
C527
C528
C529
C530

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

28
35
11
11
11
11
11
11
30
35
11

C688
C689
C690
C691
C692
C693
C694
C695
C696
C697
C698

CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP

26
35
26
14
14
35
34
35
22
34
14

C856
C857
C858
C859
C860
C861
C862
C863
C864
C865
C866

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

21
21
21
21
21
21
21
21
21
21
21

J26
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10

CON_F9RT_1394B_S6MT_SMA 30
IND
14
IND
18
IND
18
IND
18
IND
28
IND
22
IND
29
IND
32
IND
32
IND
32

Q78
Q79
Q80
Q81
Q82
Q83
Q84
Q85
Q86
Q87
Q88

TRA_2N7002DW 26
TRA_2N7002DW 34
TRA_2N7002DW 19
TRA_2N7002DW 34
TRA_2N7002DW 36
TRA_2N7002DW 36
TRA_SI6467BDQ 36
TRA_SI6467BDQ 36
TRA_2N7002DW 35
TRA_2N7002DW 26
TRA_2N7002 30

R158
R159
R160
R161
R162
R163
R164
R165
R166
R167
R168

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

18
18
5
8
8
8
8
8
8
8
14

C27
C28
C29
C30
C31
C32

CAP
CAP
CAP
CAP
CAP
CAP

16
16
16
16
16
16

C195
C196
C197
C198
C199
C200

CAP
CAP
CAP
CAP
CAP
CAP

5
16
16
14
16
14

C363
C364
C365
C366
C367
C368

CAP
CAP
CAP
CAP
CAP
CAP

21
21
16
16
16
16

C531
C532
C533
C534
C535
C536

CAP
CAP
CAP
CAP
CAP
CAP

36
34
34
34
33
33

C699
C700
C701
C702
C703
C704

CAP
CAP
CAP
CAP
CAP
CAP

35
34
21
22
22
21

C867
C868
C869
C870
C871
C872

CAP
CAP
CAP
CAP
CAP
CAP

21
21
21
21
21
21

L11
L12
L13
L14
L15
L16

IND
IND
FILTER_4P
FILTER_4P
FILTER_4P
IND

23
32
20
20
20
21

R1
R2
R3
R4
R5
R6

RES
RES
RES
RES
RES
RES

22
7
7
7
7
6

R169
R170
R171
R172
R173
R174

RES
RES
RES
RES
RES
RES

12
12
12
18
18
8

C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

16
16
16
16
18
5
5
5
5
16
16
16
16
5
5
5

C201
C202
C203
C204
C205
C206
C207
C208
C209
C210
C211
C212
C213
C214
C215
C216

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

5
5
5
16
16
16
16
16
16
16
16
16
16
16
16
16

33
29
29
29
29
11
21
36
34
29
32

C705
C706
C707
C708
C709
C710
C711
C712
C713
C714
C715

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

36
22
22
19
36
22
26
22
22
22
21

21
14
20
20
22
14
22
19
22
22
22

C716
C717
C718
C719
C720

CAP
CAP
CAP
CAP_P
CAP_P

21
22
22
19
19

14
25
7
7
7
7
7
7
7
7
7
7
7
7
7
7

R175
R176
R177
R178
R179
R180
R181
R182
R183
R184
R185
R186
R187
R188
R189
R190

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

8
8
8
8
8
12
18
8
8
8
12
12
12
18
18
36

16
20
19
20
19
19
5
5
5
16
16
16
16
16
16
19
20

21
36
36
36
36
36
26
26
26
26
26

R23
R24
R25
R26
R27
R28
R29
R30
R31
R32
R33

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

7
7
7
7
7
14
14
25
25
25
7

R191
R192
R193
R194
R195
R196
R197
R198
R199
R200
R201

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

9
12
12
12
18
8
8
9
9
18
18

18
18
18
18
18
18
5
5
5
16
16

C402
C403
C404
C405
C406
C407
C408
C409
C410
C411
C412
C413
C414
C415
C416
C417
C418
C419
C420
C421
C422
C423
C424
C425
C426
C427
C428
C429
C430
C431
C432
C433
C434
C435
C436
C437
C438
C439
C440
C441
C442
C443
C444
C445

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP_P
CAP_P
CAP_P

16
16
16
16
16
16
21
21
16
21
21
21
21
21
22
16
16
14
21
21
16
16
14
21
21
35
21
21
35
35
35
14
21
21
21
21
21
35
22
35
28
35
35
35

13
25
25
18
18
6
6
14
26
18
18
18
18
7
7
14
14

R202
R203
R204
R205
R206
R207
R208
R209
R210
R211
R212
R213
R214
R215
R216
R217
R218

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

23
19
14
20
5
8
8
12
19
20
20
22
20
8
12
12
20

18
18
23
23
26
26
12
14
14
25
26
26
20
5
5
5
36
16
16
16
14
16
16
16
16
20
5
5
5
5
5
16
16

35
36
16
16
16
16
16
16
16
16
16
9
16
12
16
16
16
16
19
19
19
20
19
5
5
16
16
16
16
16
16
16
16
16
16
19
19
19
5
5
35
5
36
16

C749
C750
C751
C752
C753
C754
C755
C756
C757
C758
C759

CAP
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP_P
CAP

22
33
36
10
10
28
28
34
32
33
34

C760
C761
C762
C763
C764
C765
C766
C767
C768
C769
C770
C771
C772
C773
C774
C775

CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP

34
11
19
34
35
33
19
26
35
33
34
32
32
17
30
32

13
13
18
18
18
27
5
5
5
5
5
6
25
25
5
14
14
25
25
18
25
5
5
25
25
25
12
27
5
14
25
12
27

R219
R220
R221
R222
R223
R224
R225
R226
R227
R228
R229
R230
R231
R232
R233
R234
R235
R236
R237
R238
R239
R240
R241
R242
R243
R244
R245
R246
R247
R248
R249
R250
R251

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

14
14
19
23
20
26
8
8
8
20
19
12
20
20
31
19
23
19
19
9
10
19
5
10
10
14
19
19
19
19
19
9
21

5
5
5
5
5
5
35
16
16
16
16
16
16
16
16
16
16
16
16
20
20
20
20
20
26
26
5
5
5
5
14
16
16
16
16
16
16
16
14
5
5
5
5
5

C154
C155
C156
C157
C158

CAP
CAP
CAP
CAP
CAP

5
5
5
16
16

C278
C279
C280
C281
C282
C283
C284
C285
C286
C287
C288
C289
C290
C291
C292
C293
C294
C295
C296
C297
C298
C299
C300
C301
C302
C303
C304
C305
C306
C307
C308
C309
C310
C311
C312
C313
C314
C315
C316
C317
C318
C319
C320
C321
C322
C323
C324
C325
C326

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

16
16
16
16
19
5
20
35
16
16
16
16
16
16
16
16
16
16
16
16
16
19
19
19
19
19
21
19
19
19
8
16
16
19
16
16
16
16
16
16
16
16
16
16
16
16
16
16
19

C446
C447
C448
C449
C450
C451
C452
C453
C454
C455
C456
C457
C458
C459
C460
C461
C462
C463
C464
C465
C466
C467
C468
C469
C470
C471
C472
C473
C474
C475
C476
C477
C478
C479
C480
C481
C482
C483
C484
C485
C486
C487
C488
C489
C490
C491
C492
C493
C494

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

21
21
19
22
21
19
22
28
28
35
34
28
32
35
9
33
33
33
28
28
28
17
32
26
9
28
28
19
22
28
28
28
26
9
16
11
11
19
22
33
28
28
28
11
11
28
28
28
19

C614
C615
C616
C617
C618
C619
C620
C621
C622
C623
C624
C625
C626
C627
C628
C629
C630
C631
C632
C633
C634
C635
C636
C637
C638
C639
C640
C641
C642
C643
C644
C645
C646
C647
C648
C649
C650
C651
C652
C653
C654
C655
C656
C657
C658
C659
C660
C661
C662

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

29
32
32
32
32
32
34
32
32
34
32
33
33
29
29
29
32
32
32
32
29
29
23
23
6
34
29
29
29
31
33
29
29
21
23
27
29
26
32
29
23
23
20
27
32
34
20
27
34

17
29
29
34
36
30
36
17
30
34
30
33
36
17
17
17
30
33
33
17
17
17
17
33
34
33
32
30
29
30
34
30
29
36
29
34
20
17
23
23
23
32
29
33
33
33
33
34
32
34
34
31
23
27
27

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP
CAP
CAP
CAP
CAP_P
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP

R51
R52
R53
R54
R55
R56
R57
R58
R59
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R70
R71
R72
R73
R74
R75
R76
R77
R78
R79
R80
R81
R82
R83

C110
C111
C112
C113
C114
C115
C116
C117
C118
C119
C120
C121
C122
C123
C124
C125
C126
C127
C128
C129
C130
C131
C132
C133
C134
C135
C136
C137
C138
C139
C140
C141
C142
C143
C144
C145
C146
C147
C148
C149
C150
C151
C152
C153

C776
C777
C778
C779
C780
C781
C782
C783
C784
C785
C786
C787
C788
C789
C790
C791
C792
C793
C794
C795
C796
C797
C798
C799
C800
C801
C802
C803
C804
C805
C806
C807
C808
C809
C810
C811
C812
C813
C814
C815
C816
C817
C818
C819
C820
C821
C822
C823
C824
C825
C826
C827
C828
C829
C830

CAP
26
CAP
26
CAP
19
CAP
26
CAP
26
CAP
26
CAP
32
CAP
36
CAP
36
CAP
5
CAP
21
CAP
21
CAP
21
CAP
19
CAP
23
CAP
31
CAP
20
CAP
24
CAP
24
CAP
24
CAP
20
CAP
24
CAP
20
CAP
24
CAP
20
CAP
24
CAP
24
CAP
24
CAP
20
CAP
23
CAP
20
CAP
20
CAP
20
CAP
20
CAP
20
CAP
30
CAP
24
CAP
24
CAP
6
CAP
20
CAP
20
CAP
20
CAP
30
CAP
30
CAP
30
CAP
5
CAP
5
DIODE
28
DIODE_SCHOT 35
DIODE_SCHOT 33

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

C900
C901
C902
C903
C904
C905
C906
C907
C908
C909
C910
C911
C912
C913
C914
C915
C916
C917
C918
C919
C920
C921
C922
C923
C924
C925
C926
C927
C928
C929
C930
C931
C932
C933
C934
C935
C936
C937
C938
C939
C940
C941
C942
C943
C944
C945
C946
D1
D2
D3

R34
R35
R36
R37
R38
R39
R40
R41
R42
R43
R44
R45
R46
R47
R48
R49
R50

C77
C78
C79
C80
C81
C82
C83
C84
C85
C86
C87
C88
C89
C90
C91
C92
C93
C94
C95
C96
C97
C98
C99
C100
C101
C102
C103
C104
C105
C106
C107
C108
C109

C234
C235
C236
C237
C238
C239
C240
C241
C242
C243
C244
C245
C246
C247
C248
C249
C250
C251
C252
C253
C254
C255
C256
C257
C258
C259
C260
C261
C262
C263
C264
C265
C266
C267
C268
C269
C270
C271
C272
C273
C274
C275
C276
C277

19
21
36
22
21
36
10
35
35
35
35
35
35
35
10
10
10
10
22
36
10
10
10
22
36
22
10
10

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP

C889
C890
C891
C892
C893
C894
C895
C896
C897
C898
C899

C66
C67
C68
C69
C70
C71
C72
C73
C74
C75
C76

C721
C722
C723
C724
C725
C726
C727
C728
C729
C730
C731
C732
C733
C734
C735
C736
C737
C738
C739
C740
C741
C742
C743
C744
C745
C746
C747
C748

IND
22
IND
22
IND_3P
19
IND
22
IND
22
IND
22
IND
28
IND
36
IND_3P
35
IND_3P
33
IND
34
IND
30
IND
30
IND
34
IND
32
FILTER_4P 30
FILTER_4P 30
IND
36
IND
23
IND
26
IND
23
IND
30
IND
29
IND
23
IND
32
IND
27
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
IND
21
FILTER_4P 30
FILTER_4P 30
FILTER_4P 22
FILTER_4P 22
FILTER_4P 22
IND
36
IND
26
IND
26
IND
26
IND
26
IND
26
IND
26
IND
26
IND
20
IND
26
IND
26
IND
26
IND
20
IND
20
IND
20
IND
23
IND
23
PHOTODIODE_2P 23
TRA_2N7002DW 7
TRA_2N7002DW 7

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

L28
L29
L30
L31
L32
L33
L34
L35
L36
L37
L38
L39
L40
L41
L42
L43
L44
L45
L46
L48
L49
L50
L51
L52
L53
L54
L55
L56
L57
L58
L59
L60
L61
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
L72
L73
L74
L75
L76
L77
L78
L79
L80
L81
L82
L83
L84
L85
L86
L87
L88
L89
L90
L91
PD1
Q1
Q2

R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22

C217
C218
C219
C220
C221
C222
C223
C224
C225
C226
C227
C228
C229
C230
C231
C232
C233

11
11
11
11
22
33
33
28
30
32
31
36
34
29
32
32
32
11
34
34
33
33
29
29
32
11
31
36
34
29
32
32
36
36
36
34
33
33
29
29
30
11
34
29
32
32
11
11
11
11
34
33
32
11
11
36
33
29
30
30
32
34
34
34
34
33

21
21
21
21
21
21
21
21
21
19
32
35
35
36
36
36

IND
IND
IND
IND
FILTER_4P
IND
IND
IND
IND
IND
IND

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP
CAP
CAP

L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27

C548
C549
C550
C551
C552
C553
C554
C555
C556
C557
C558
C559
C560
C561
C562
C563
C564
C565
C566
C567
C568
C569
C570
C571
C572
C573
C574
C575
C576
C577
C578
C579
C580
C581
C582
C583
C584
C585
C586
C587
C588
C589
C590
C591
C592
C593
C594
C595
C596
C597
C598
C599
C600
C601
C602
C603
C604
C605
C606
C607
C608
C609
C610
C611
C612
C613

C873
C874
C875
C876
C877
C878
C879
C880
C881
C882
C883
C884
C885
C886
C887
C888

16
16
16
16
16
16
16
16
16
16
16
16
16
18
18
18
18

16
16
16
21
21
21
16
16
16
16
21
21
21
21
21
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP

C537
C538
C539
C540
C541
C542
C543
C544
C545
C546
C547

C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65

C369
C370
C371
C372
C373
C374
C375
C376
C377
C378
C379
C380
C381
C382
C383
C384
C385
C386
C387
C388
C389
C390
C391
C392
C393
C394
C395
C396
C397
C398
C399
C400
C401

D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
DP1
DP2
DP3
DP4
DP5
DP6
DP7
DP8
F1
F2
F3
F4
F5
FL1
FL2
FL3
G1

DIODE
33
DIODE_SCHOT 19
DIODE_SCHOT 34
DIODE_SCHOT 33
ZENER
30
DIODE
32
DIODE
32
DIODE_SCHOT 33
DIODE_DUAL_6P 30
DIODE_SCHOT 34
DIODE_SCHOT_3P2 29
DIODE_DUAL_6P 30
DIODE
34
DIODE_SCHOT 33
DIODE
33
DIODE_SCHOT 33
DIODE_SCHOT 29
DIODE_SCHOT 22
DIODE_SCHOT 34
DIODE_SCHOT 36
DIODE_SCHOT 19
DIODE
35
DIODE_DUAL_6P 30
DIODE_SCHOT 33
DIODE_DUAL_6P 30
DIODE_SCHOT 30
DIODE_SCHOT 32
DIODE_SCHOT 30
DIODE
20
DIODE_SCHOT 36
DIODE_SCHOT 34
DIODE_SCHOT 5
DPAK3P
19
DPAK3P
35
DPAK3P
36
DPAK3P
32
DPAK3P
30
DPAK3P
19
DPAK3P
21
DPAK3P
31
FUSE
22
FUSE
30
FUSE
32
FUSE
32
FUSE
30
FILTER_LC 22
FILTER_LC 22
FILTER_LC 22
OSC
29

Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
Q15
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
Q24
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
Q33
Q34
Q35
Q36
Q38
Q39
Q40
Q41
Q42
Q43
Q44
Q45
Q46
Q47
Q48
Q49
Q50
Q51
Q52

TRA_2N7002 7
TRA_2N3904 7
TRA_2N3904 19
TRA_2N3904 19
TRA_FDG6324L 22
TRA_2N7002 22
TRA_2N7002DW 34
TRA_2N7002DW 32
TRA_SI3443DV 22
TRA_2N3904 35
TRA_SI4435DY 32
TRA_FDG6324L 33
TRA_2N7002DW 28
TRA_SI4435DY 32
TRA_2N3904 35
TRA_2N7002DW 31
TRA_2N7002 36
TRA_2N7002DW 32
TRA_2N7002DW 32
TRA_2N7002 31
TRA_2N7002DW 34
TRA_SI4435DY 32
TRA_2N7002DW 30 34
TRA_2N7002DW 26
TRA_2N7002DW 32
TRA_SI3443DV 34
TRA_2N7002DW 32
TRA_2N7002DW 32
TRA_2N7002DW 26
TRA_SI3443DV 34
TRA_2N7002 26
TRA_2N7002 23
TRA_2N7002DW 22 23
TRA_2N7002DW 14
TRA_2N7002DW 22
TRA_2N3904 26
TRA_TP0610 22
TRA_2N7002DW 22
TRA_2N3904 22
TRA_SI3443DV 34
TRA_2N3904 22
TRA_TP0610 22
TRA_SI3446DV 36
TRA_2N3904 26
TRA_SI7892DP 19
TRA_SI7860DP 35
TRA_SI7860DP 35
TRA_SI7860DP 19
TRA_SI4888DY 34

R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R97
R98
R99
R100
R101
R102
R103
R104
R105
R106
R107
R108
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
R123
R124
R125
R126
R127
R128
R129
R130
R131
R132

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

27
6
6
5
23
14
14
14
13
25
25
25
27
5
5
19
14
25
14
12
18
18
5
5
5
5
19
14
12
14
14
14
25
13
18
18
5
8
8
8
13
14
18
18
5
5
5
8
8

R252
R253
R254
R255
R256
R257
R258
R259
R260
R261
R262
R263
R264
R265
R266
R267
R268
R269
R270
R271
R272
R273
R274
R275
R276
R277
R278
R279
R280
R281
R282
R283
R284
R285
R286
R287
R288
R289
R290
R291
R292
R293
R294
R295
R296
R297
R298
R299
R300

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

10
19
19
21
19
19
19
19
19
19
19
19
14
19
19
35
21
19
19
19
19
19
19
5
5
14
14
21
5
14
5
5
21
14
27
15
35
35
35
14
35
26
19
26
34
35
34
21
34

C159
C160
C161
C162
C163
C164

CAP
CAP
CAP
CAP
CAP
CAP

16
12
16
16
16
16

C327
C328
C329
C330
C331
C332

CAP
CAP
CAP
CAP
CAP
CAP

21
19
19
19
19
19

C495
C496
C497
C498
C499
C500

CAP
CAP
CAP
CAP
CAP
CAP

33
28
28
35
36
22

C663
C664
C665
C666
C667
C668

CAP
CAP
CAP
CAP
CAP
CAP

23
31
27
31
27
26

C831
C832
C833
C834
C835
C836

CAP
CAP
CAP
CAP
CAP
CAP

31
31
27
27
31
27

C333

CAP

19

C501

CAP

28

C669

CAP

22

C837

CAP

27

TRA_IRF7832 35
TRA_IRF7832 35
TRA_IRF7832 35
TRA_IRF7811W 36
TRA_IRF7805 36
TRA_2N7002DW 30
TRA_IRF7805 33

R133
R134
R135
R136
R137
R138
R139

RES
RES
RES
RES
RES
RES
RES

8
8
8
8
8
18
5

35
35
35
35
35
19

20

Q53
Q54
Q55
Q56
Q57
Q58
Q59

RES
RES
RES
RES
RES
RES

CAP

OSC
18
CON_F1ST_S2MT_SM 14
CON_4RT_WRIB 26
CON_F14RT_S2MT_SM 25
CON_4RT_WRIB 26
CON_12
35
CON_F30RT_S2MT_SM 22

R301
R302
R303
R304
R305
R306

C165

G2
J1
J2
J3
J4
J5
J6

R307

RES

19

44

R308
R309

RES
RES

34
34

R476
R477

RES
RES

31
34

R644
R645

RES
RES

8
8

R812
R813

RES
RES

26
26

SP2
SP3

SPKR_CLIP_P84 4
SPKR_CLIP_P84 4

ZT67
ZT68

HOLE_VIA
HOLE_VIA

4
4

R310
R311
R312
R313
R314
R315
R316
R317
R318
R319
R320

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

34
19
35
35
35
35
19
22
35
28
22

R478
R479
R480
R481
R482
R483
R484
R485
R486
R487
R488

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

29
36
36
34
34
33
29
29
29
32
32

R646
R647
R648
R649
R650
R651
R652
R653
R654
R655
R656

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

8
8
20
22
22
8
8
8
8
22
14

R814
R815
R816
R817
R818
R819
R820
R821
R822
R823
R824

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

26
20
20
20
20
14
14
20
20
20
20

SP4
SP5
SP6
T1
U1
U2
U3
U4
U5
U6
U7

SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
XFR_ENET_1000BT 28
SN74AUC1G04 7
SN74AUC1G08 6
ADT7467
26
SN74AUC1G08 6
KXM52
24
FAN2558
5
VREG_LT1962 14

ZT69
ZT70
ZT71
ZT72
ZT73
ZT74
ZT75
ZT76
ZT77
ZT78
ZT79

HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA

4
4
4
4
4
4
4
4
4
4
4

R321
R322
R323
R324
R325

RES
RES
RES
RES
RES

35
35
35
35
35

R489
R490
R491
R492
R493

RES
RES
RES
RES
RES

32
32
31
31
36

R657
R658
R659
R660
R661

RES
RES
RES
RES
RES

8
8
8
8
22

R825
R826
R827
R828
R829

RES
RES
RES
RES
RES

14
20
20
20
20

U8
U9
U10
U11
U12

MAX8860
CBTV4020
CBTV4020
PI3B3257
CBTV4020

ZT80
ZT81
ZT82
ZT83

HOLE_VIA
HOLE_VIA
HOLE_VIA
MTGHOLE

4
4
4
4

R326
R327
R328
R329
R330
R331
R332
R333
R334
R335
R336

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

35
35
35
35
35
35
19
28
28
28
35

R494
R495
R496
R497
R498
R499
R500
R501
R502
R503
R504

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

29
29
29
32
32
32
9
31
31
31
31

R662
R663
R664
R665
R666
R667
R668
R669
R670
R671
R672

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

22
22
8
8
8
8
8
8
22
22
36

R830
R831
R832
R833
R834
R835
R836
R837
R838
R839
R840

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

20
20
20
20
20
20
20
20
20
20
20

U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23

CBTV4020 10
LTC3405
28
COMPARATOR_LMC7211 32
LTC1778
19
FEPR_1MX8 9
LTC1625
33
PWR_CNTRL_TPS2211 17
MAX1717
35
COMPARATOR_LMC7211 33
MAX1715
36
AMP_MAX4172 32

R337
R338
R339
R340
R341
R342

RES
RES
RES
RES
RES
RES

35
9
19
19
19
22

R505
R506
R507
R508
R509
R510

RES
RES
RES
RES
RES
RES

31
34
34
33
29
29

R673
R674
R675
R676
R677
R678

RES
RES
RES
RES
RES
RES

8
8
8
8
8
8

R841
R842
R843
R844
R845
R846

RES
RES
RES
RES
RES
RES

20
20
31
31
24
24

U24
U25
U26
U27
U28
U29

7432
22
VREG_LP2951 33
PCI1510GGU 17
COMPARATOR_LMC7211 31
LTC3707
34
TSB81BA3A 29

R343
R344
R345
R346
R347
R348
R349
R350
R351
R352
R353
R354
R355
R356
R357
R358

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

28
28
28
28
28
17
35
34
19
19
28
28
28
35
9
32

R511
R512
R513
R514
R515
R516
R517
R518
R519
R520
R521
R522
R523
R524
R525
R526

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

32
32
31
34
34
29
31
31
34
34
33
29
34
29
29
32

24
24
24
23
24
24
24
24
24
24
24
24
24
24
24
24

U30
U31
U32
U33
U34
U35
U36
U37
U38
U39
U40
U41
U42
U43
U44
U45

VREG_LP2951 33
MAX1772
32
EEPROM_32KX8_M24256B 6
M16C62
31
VREG_LM2594 29
SIL178
20
LTC1761
29
VREG_LT1962 29
COMPARATOR_LMC7211 32
UPD720101_FBGA 27
OPAMP_MAX4236EUTT 23
MAX6804
31
CLK_GEN_CY28512 14
APOLLO_MPC7447A_360 5 6
RAGE_MBLTY_M11_CSP64_667 18 19 21
INTREPID 8 9 12 13 14 15

33
33
28
28
32
32
32
35
34
34
34

14
14
23
23
30
31
31
31
33
26
26

U46
U47
U48
U49
U50
U51
U52
U53
U54
U55
U56

COMPARATOR_LMC7211 22
CLK_GEN_CY25811 18
SIL178
20
TRANSCEIVER_88E1111 28
OPAMP_LMC7111 32
INA138
24
FEPR_256KX8_ST72264_BGA 23
PIC16F818_QFN 24
VREG_MM1571J 21
VREG_MM1571J 21
741G32
22

28
28
28
17
32
32
35
34
34
33
28
28
28
32
35
35
9
9
19
19
19
22
33
28
32
32
32
35
35
15
22
33
33
28
28
26
28
35
35
9
19
25
33
28

26
34
34
14
27
6
6
26
31
31
26
34
34
27
33
32
32
31
27
29
29
32
32
23
27
26
26
14
29
29
29
32
32
32
32
31
29
29
32

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

R863
R864
R865
R866
R867
R868
R869
R870
R871
R872
R873

R370
R371
R372
R373
R374
R375
R376
R377
R378
R379
R380
R381
R382
R383
R384
R385
R386
R387
R388
R389
R390
R391
R392
R393
R394
R395
R396
R397
R398
R399
R400
R401
R402
R403
R404
R405
R406
R407
R408
R409
R410
R411
R412
R413

R527
R528
R529
R530
R531
R532
R533
R534
R535
R536
R537
R538
R539
R540
R541
R542
R543
R544
R545
R546
R547
R548
R549
R550
R551
R552
R553
R554
R555
R556
R557
R558
R559
R560
R561
R562
R563
R564
R565

26
22
22
14
8
8
8
22
22
22
26
22
22
26
5
22
26
22
34
14
14
22
14
5
22
22
22
22
14
14
36
26
19
36
26
20
36
26
26
22
26
14
21
21
26
22
26
26
36
21
21
25
34
35
28

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

R847
R848
R849
R850
R851
R852
R853
R854
R855
R856
R857
R858
R859
R860
R861
R862

R359
R360
R361
R362
R363
R364
R365
R366
R367
R368
R369

R679
R680
R681
R682
R683
R684
R685
R686
R687
R688
R689
R690
R691
R692
R693
R694
R695
R696
R697
R698
R699
R700
R701
R702
R703
R704
R705
R706
R707
R708
R709
R710
R711
R712
R713
R714
R715
R716
R717
R718
R719
R720
R721
R722
R723
R724
R725
R726
R727
R728
R729
R730
R731
R732
R733

R566
R567
R568
R569
R570
R571
R572
R573
R574
R575
R576
R577
R578
R579
R580
R581

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

32
32
23
31
32
32
31
31
29
29
29
29
32
32
32
26

R734
R735
R736
R737
R738
R739
R740
R741
R742
R743
R744
R745
R746
R747
R748
R749

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

32
28
30
30
32
32
29
30
32
30
32
25
32
32
32
32

32
35
19
36
36
36

R420
R421
R422
R423
R424
R425
R426
R427
R428
R429
R430
R431
R432
R433
R434
R435
R436
R437
R438
R439
R440
R441

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

36
36
36
36
36
36
33
28
28
35
19
34
33
33
35
28
29
29
28
9
11
25

R582
R583
R584
R585
R586
R587
R588
R589
R590
R591
R592
R593
R594
R595
R596
R597
R598
R599
R600
R601
R602
R603
R604
R605
R606
R607
R608
R609

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

26
31
31
31
27
20
32
34
27
27
31
31
31
31
31
31
23
32
27
25
25
25
14
23
23
36
14
14

R750
R751
R752
R753
R754
R755
R756
R757
R758
R759
R760
R761
R762
R763
R764
R765
R766
R767
R768
R769
R770
R771
R772
R773
R774
R775
R776
R777

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

17
30
30
17
32
32
17
17
29
29
29
29
17
32
17
20
17
17
31
31
14
23
23
23
32
29
23
23

26
26
35
31
26
26
33
24
6
24
6
6
6
30
30
30
30
30
30
30
30
14
14
14
31
23
23
23
23
6
6
6
6
6
26
26
26
26
14
14
14
26
14
26
26
14
25
25
25
25

741G32
22
LTC3412
36
MM3120
23
LIS3L02AQ 24
ATTINY2313 6
COMPARATOR_LMC7211 30
SHORT
36
SHORT
19
SHORT
35
SHORT
33
SHORT
35
SHORT
36
SHORT
35
SHORT
34
SHORT
26
SHORT
26
SHORT
26
SHORT
22
SHORT
22
SHORT
24
SHORT
35
SHORT
24
SHORT
24
SHORT
32
SHORT
19
SHORT
19
SHORT
19
SHORT
19
SHORT
19
SHORT
21
SHORT
21
SHORT
21
SHORT
21
SHORT
5
CRYSTAL
14
CRYSTAL
28
CRYSTAL
23
CRYSTAL
27
CRYSTAL
31
CRYSTAL_4PIN 31
HOLE_VIA 4
MTGHOLE
4
HOLE_VIA 4
MTGHOLE
4

RES
RES
RES
RES
RES
RES

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P

U57
U58
U59
U60
U61
U62
XW1
XW2
XW3
XW4
XW5
XW6
XW7
XW8
XW9
XW10
XW11
XW12
XW13
XW14
XW15
XW16
XW17
XW19
XW20
XW21
XW22
XW23
XW24
XW27
XW28
XW29
XW30
XW31
Y1
Y3
Y4
Y5
Y6
Y7
ZT1
ZT2
ZT3
ZT4

R414
R415
R416
R417
R418
R419

R874
R875
R876
R877
R878
R879
R880
R881
R882
R883
R884
R885
R886
R887
R888
R889
R890
R891
R892
R893
R894
R895
R896
R897
R898
R899
R900
R901
R902
R903
R904
R905
R906
R907
R908
R909
R910
R911
R912
R913
R914
R915
R916
R917
R918
RP1
RP2
RP3
RP4
RP5

25
33
29
29
29
29
35
11
36
19
25
30
32
36
34
34
25
29
32
36
34
34
29
28
32
34
33

R610
R611
R612
R613
R614
R615
R616
R617
R618
R619
R620
R621
R622
R623
R624
R625
R626
R627
R628
R629
R630
R631
R632
R633
R634
R635
R636

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

36
36
25
25
14
23
36
23
23
23
26
13
14
26
13
14
13
36
26
13
13
14
14
28
14
21
14

R778
R779
R780
R781
R782
R783
R784
R785
R786
R787
R788
R789
R790
R791
R792
R793
R794
R795
R796
R797
R798
R799
R800
R801
R802
R803
R804

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

31
30
14
29
31
27
27
31
31
31
31
27
27
27
27
27
27
27
27
36
36
36
36
36
36
36
19

6
14
14
25
25
25
13
25
13
13
13
12
12
12
12
8
12
8
8 14
9
9
23
14
9
9
9
9
9
9
29
29
17
31
31
23
23
27
14
14
25
25
14
23 27
23
27
27
14
20
20

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

RPAK10P2C
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK10P2C
RPAK4P
RPAK4P
RPAK10P2C
RPAK10P2C
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK4P
RPAK2P
RPAK2P

MTGHOLE
MTGHOLE
HOLE_VIA
HOLE_VIA
HOLE_VIA
MTGHOLE
MTGHOLE
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
MTGHOLE
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA

R442
R443
R444
R445
R446
R447
R448
R449
R450
R451
R452
R453
R454
R455
R456
R457
R458
R459
R460
R461
R462
R463
R464
R465
R466
R467
R468

RP6
RP7
RP8
RP9
RP10
RP11
RP12
RP13
RP14
RP15
RP16
RP17
RP18
RP19
RP20
RP21
RP22
RP23
RP24
RP25
RP26
RP27
RP29
RP30
RP31
RP33
RP34
RP35
RP36
RP37
RP38
RP39
RP40
RP41
RP42
RP43
RP45
RP47
RP48
RP49
RP50
RP51
RP52
RP53
RP54
RP55
RP56
RP62
RP63

ZT5
ZT6
ZT7
ZT8
ZT9
ZT10
ZT11
ZT12
ZT13
ZT14
ZT15
ZT16
ZT17
ZT18
ZT19
ZT20
ZT21
ZT22
ZT23
ZT24
ZT25
ZT26
ZT27
ZT28
ZT29
ZT30
ZT31
ZT32
ZT33
ZT34
ZT35
ZT36
ZT37
ZT38
ZT39
ZT40
ZT41
ZT42
ZT43
ZT44
ZT45
ZT46
ZT47
ZT48
ZT49
ZT50
ZT51
ZT52
ZT53
ZT54
ZT55
ZT56
ZT57
ZT58
ZT59

HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

R469
R470
R471
R472
R473
R474

RES
RES
RES
RES
RES
RES

29
29
29
30
32
32

R637
R638
R639
R640
R641
R642

RES
RES
RES
RES
RES
RES

19
14
8
8
8
8

R805
R806
R807
R808
R809
R810

RES
RES
RES
RES
RES
RES

35
35
35
35
35
36

HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA

4
4
4
4
4
4

RES

31

R643

RES

R811

RES

26

RPAK2P
20
RPAK2P
20
RPAK2P
20
RPAK2P
20
RPAK2P
20
SHLD_3P_EMI 4
SPKR_CLIP_P84 4

ZT60
ZT61
ZT62
ZT63
ZT64
ZT65

R475

RP64
RP65
RP66
RP67
RP68
SH1
SP1

ZT66

HOLE_VIA

21
10
10
35
10

45

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