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Department of Electrical Engineering

EC 302 ECAD
END OF CHAPTER 1
NAME & MATRIX NO. NAME & MATRIX NO. NAME & MATRIX NO. PROGRAMME LECTURERS NAME SUBMISSION DATE
REMINDER: Cheating or plagiarism will not be tolerated. All parties involved in cheating or plagiarism will be given zero mark on the specified assessment.

Learning Outcome

CLO1

CLO2
Q3 (10) Q4 (10) Q5 (30)

CLO3
Q1 (10) Q2 (20)

CLO4

CLO5

Questions/ Marks

Q6 (20)

Score

70

30

Course : ECAD EC 302

/100
1

EOC 1 Title : DC Simulation(ClassAAmplifier) 1. 2. 3. 4. 5.


(10 marks ;CLO3; Drawthe circuitin Figure1. Simulate the circuit in Figure1. Record Ic, Ie, Ib, Vce andVb (20 marks; CLO3; (10 marks ; CLO?; Draw the DC loadline for this circuitin Figure1. Find the Q-pointcircuit is based (10 marks ; CLO2; on readings takenin step2 For the circuit below,calculate the theoretical valuesfor all test pointsTP1,TP2 andTP3. (30 marks ; CLO2; Analyze (20 6. the theoreticaland simulationanswerfor Vcq. marks ; CLO2; 2.2.3) 3.2.8) 3.2.8\ 3.2.8) 3.2.8) 3.2.9)

Note:
Here are the ormula that can beused rn this
Iesat: Vcc Rc*Re :Icsat

em.
Vb: (R2) (Vcc) RI+R2

Ie:Yb_:_Ybe Re
Vcc: (lc)(Rc)* Vce + (le)(Re) pdc: Ic Ib

Ic:Ie-Ib=Ie Vce: Vcc - (Ic)(Rc)- (Ie)(Re)

t SFr FLsg 1.

Figure I

Vb:

; vbe:-

; ve=
; Vcc

I Ie: ; VRc :

Since Ie = Ic Ic:_ Vce :

PREPARED BY: CourseLecturer


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VERIFIED BY: /] CourseCoordinatJl


iABINIRA ^/LGAI{DHI IH^NGA R^JO{IIV PENSYAR^H 1| JA9AIAII KEJURUTERAAN ELEKTRIK
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Date:

5 /71,7

5 &vW dotz

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