YG4558/E/L

DUAL OPERATIONAL AMPLIFIER

DESCRIPTION
integrated circuit YG4558 is a monolithic D designed for dual operational amplifier.

DIP-8

FEATURES
*No frequency compensation required. *No latch-up *Large commom mode and differential voltage range *Parameter tracking over temperature range *Gain and phase match between amplifiers *Internally frequency compensated *Low noise input transistors

SOP-8

6,3

ORDERING INFORMATION
Device
YG4558 YG4558E YG4558L

Package
P-8-300-2.54 I D SOP-8-225-1. 27 SI P-8-2.54

BLOCK DIAGRAM
Vcc

IN(-)

OUT1

Vcc

IN(+)

IN1(-)

OUT2

OUTPUT

IN1(+)

IN2(-)

Vee

IN2(+)

Vee

http://www.ic-jiazhi.com
1

TEL:400-660-8382

YG4558/E/L
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply Voltage Differential input voltage Power Dissipation Input Voltage Operating Temperature Storage Temperature

LINEAR INTEGRATED CIRCUIT

Symbol
Vcc VI(DIFF) PD VI TOPR TSTG

Value
22 18 400 15 0~+70 -65~+150

Unit
V V mW V C C

ELECTRICAL CHARACTERISTICS( Ta=25C ,Vcc=15V,Vee=-15V)

Characteristic Supply Current Input offset voltage Input offset current Input bias current Large signal voltage gain Commom Mode Input Voltage Range Commom Mode Rejection Ratio Supply Voltage Rejection Ratio Output Voltage swing Power Comsumption Slew Rate Rise Time Overshoot CMRR PSRR Vo(p-p) Pc SR TRIS OS Vi=10V,RL>2k,CL<100pF Vi=20mV,RL>2kCL<100pF Vi=20mV,RL>2k,CL<100pF 1.2 0.3 15 Rs<10k Rs<10k RL>10k 70 76 90 90 12 70 14 170 dB dB V mV V/s s % Symbol Icc VIO IIO IBIAS Gv VI(R) Vo(p-p)=10V,RL<2k 20 12 Rs<10k Test Condition Min Typ. 3.5 2 5 30 200 13 Max 5.6 6 200 500 Unit mA mV nA nA V/mV V

http://www.ic-jiazhi.com
2

TEL:400-660-8382

YG4558/E/L
15.0 13.0 11.0 9.0 7.0 5.0 3.0 1.0 10
2

LINEAR INTEGRATED CIRCUIT

Fig.2 Positive output voltage swing vs Load resistance

TYPICAL PERFORMANCE CHARACTERISTICS

Fig.1 Positive output voltage swing vs Load resistance

10

10

10

Output Voltage (peak) (V)

Output Voltage (peak) (V)

10

10

10

10

Load resistance () Fig.3 Power bandwith(large signal swing vs frequency)

load resistance ()

32.0 28.0 24.0

Output Voltage (V)

20.0 16.0 12.0 8.0 4.0 0 10 10

2

10

10

10

10

Frequency (Hz)

http://www.ic-jiazhi.com
3

TEL:400-660-8382

YG4558/E/L
Fig. 4 Burst Noise vs Rs
10
3

LINEAR INTEGRATED CIRCUIT

Fig. 5 RMS Noise vs Rs
10
2

Input Noise(peak) (mV)

10

BW=1.0Hz To 1.0KHz

10

1 10 10
2

10

10

10

10

Input Noise(RMS) (V)

10

0.1 10 10
2

10

10

10

10

Rs () Fig. 6 Output Noise vs Rs

10 140 120 100 80 60

Rs () Fig. 7 Spectral Noise Density

Gv=1000

Output Noise(RMS) (mV)

Input Noise(nV/Hz)

1 Gv=100

Gv=10 Rs=100k

Gv=10

10

-1

40
20 0

Gv=1 10
-2

10

10

10

10

10

10

10

100

10

10

Rs () Fig. 8 Open loop frequency response

140 120 100 180 160 140 120

Frequency

Hz)

10

10

Fig. 9 PHASE MARGIN vs FREQUENCY

PHASE MARGIN
3 4 5 6 7

80

Avd ( dB)

100 80 60

60

40
20 0 -20 1 10 100 10

40
20 0 1 10 100 10

Frequency

Hz)

10

10

10

10

10

Frequency

Hz)

10

10

10

http://www.ic-jiazhi.com
4

TEL:400-660-8382

YG4558/E/L
PACKAGE DIMENSIONS

LINEAR INTEGRATED CIRCUIT

DIP-8-300-2.54

SOP-8-225-1.27

http://www.ic-jiazhi.com
5

TEL:400-660-8382

YG4558/E/L
SIP-8-2.54

LINEAR INTEGRATED CIRCUIT

UNIT: mm

http://www.ic-jiazhi.com
6

TEL:400-660-8382

YG4558/E/L
Attach Revision History
Data
2003.10.23 2005.3.17 2009.11.10

LINEAR INTEGRATED CIRCUIT

REV
1.0 1.1 1.2 1.3 Original

Description
Add OREDRING INFORMATION Change UTC4558 To UTC4558/E Revise Package Dimensions AddSIP-8-2.54 1,6

Page
1 1 5

http://www.ic-jiazhi.com
7

TEL:400-660-8382