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5

JV71-MV DDR3 Madison Block


SMSC
Mobile CPU
Diagram CLK GEN.
Penryn

3D3V_S5(7A)

3D3V_AUX_S5

VRAM
64MbX16X8 1024M

667/800/1066MHz@1.05V

PCIex16

L4

GND

L5

BOTTOM

L6

C-Link0

CardBus

6 PCIe ports

BCM5784

12 USB 2.0/1.1 ports


ETHERNET (10/100/1000MbE)
High Definition Audio
Serial Peripheral I/F
Matrix Storage Technology(DO)
Active Managemnet Technology(DO)

CHARGER
ISL88731A

OP AMP
MAX9789A

DCBATOUT

BT+

CPU DC/DC

RJ45

26

ISL6266A

26

PCIe

Mini 1 Card
Wire LAN 33

30

tp
:

LINE OUT

SATA

29

HDD SATA

ht

MODEM
MDC Card

Mini USB
Blue Tooth

21

SATA

30

ODD SATA

22

Finger
Printer

23

OUTPUTS

DCBATOUT

VCC_CORE
38A

SPI BIOS

KBC
Winbond

Camera

(2MB)
36

WPCE773
35

37

47

INPUTS

OUTPUTS

DCBATOUT

VGA_CORE
13A

ISL6263A

USB

USB
4 Port

41

INPUTS

GFXCORE

LPC BUS

RJ11

OUTPUTS

12,13,14,15

INT.SPKR

47

INPUTS

RT8202A

//
m

29

45
FBVDD(4A)

VGA_CORE

yc

LPC I/F

27

TXFM

25

om

4 SATA

ALC888S

DCBATOUT

Giga LAN

ACPI 2.0

MIC In

19

31

LAN

PCI/PCI BRIDGE

AZALIA

44
1D1V_S0(2A)

TPS51117

CRT

MS/MS Pro/xD
/MMC/SD

p.

ICH9M

Codec

RT9018
1D5V_S3

su

Int MIC

44
DDR_VREF_S3
(1.2A)

18

6,7,8,9,10,11

29

1D5V_S3(12A)

RT9026

20

LVDS, CRT I/F

LINE IN

OUTPUTS
1D05V_S0(9A)

LCD

INTEGRATED GRAHPICS

16,17

INPUTS

43

TPS51124

HDMI

RTS5159

29

L3

VGA

USB

1.5W

Madison / M96 52~57

X4 DMI
400MHz

L2

1D5V_S3

AGTL+ CPU I/F

DDR3

18

GND

SYSTEM DC/DC
34

DCBATOUT

DDR Memory I/F

1066 MHz

L1

Cantiga
16,17

5V_AUX_S5

TOP

/x
/

1066 MHz

OUTPUTS

PCB STACKUP

4, 5

DDR3

42

ISL62392
INPUTS

5V_S5(6A)

HOST BUS

SYSTEM DC/DC

DCBATOUT

EMC2102

ICS9LPRS365B

Project code: 91.4FX01.001


PCB P/N
: 48.4FX01.01M
REVISION
: 09924 -1

24

Touch
Pad 37

46

INPUTS

OUTPUTS

DCBATOUT

VCC_GFXCORE
(7A)

LPC

DEBUG
CONN.36

MEDIA
KEY
38

INT.
KB 35

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

BLOCK DIAGRAM
Size
A2
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

Wednesday, October 28, 2009


1

Sheet

of

-1
62

ICH9M Functional Strap Definitions


ICH9 EDS 642879 Rev.1.5

ICH9M Integrated Pull-up


and Pull-down Resistors

page 92

Signal

Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


PCIE Port Config1 bit1,
Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3


pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down

CL_CLK[1:0]

PULL-UP 20K

CL_DATA[1:0]

PULL-UP 20K

HDA_SYNC

PCIE config1 bit0,


Rising Edge of PWROK.

This signal has a weak internal pull-down.


Sets bit0 of RPC.PC(Config Registers:Offset 224h)

CL_RST0#

PULL-UP 20K

GNT2#/
GPIO53

PCIE config2 bit2,


Rising Edge of PWROK.

DPRSLPVR/GPIO16

PULL-DOWN 20K

ENERGY_DETECT

PULL-UP 20K

GPIO20

Reserved

This signal has a weak internal pull-up.


Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.

GNT1#/
GPIO51

ESI Strap (Server Only)


Rising Edge of PWROK

GNT0#:
SPI_CS1#/
GPIO58

SPI_MOSI

3
GPIO49

Top-Block
Swap Override.
Rising Edge of PWROK.

ICH9 EDS 642879

ESI compatible mode is for server platforms only.


This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

SIGNAL

HDA_BIT_CLK

PULL-DOWN 20K

HDA_DOCK_EN#/GPIO33

PULL-UP 20K

HDA_RST#

PULL-DOWN 20K

HDA_SDIN[3:0]

PULL-DOWN 20K

HDA_SDOUT

PULL-DOWN 20K

HDA_SYNC

Boot BIOS Destination


Selection 0:1.
Rising Edge of PWROK.

Controllable via Boot BIOS Destination bit


(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

GNT[3:0]#/GPIO[55,53,51]

PULL-UP 20K

GPIO[20]

PULL-DOWN 20K

Integrated TPM Enable,


Rising Edge of CLPWROK

Sample low: the Integrated TPM will be disabled.


Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

GPIO[49]

PULL-UP 20K

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 20K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PCI Express Lane


Reversal. Rising Edge
of PWROK.

Signal has weak internal pull-up. Sets bit 27


of MPC.LR(Device 28:Function 0:Offset D8)

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

SPI_CS1#/GPIO58/CLGPIO6

PULL-UP 20K

SPI_MOSI

PULL-DOWN 20K

SPKR

SATALED#

SPI_MISO

XOR Chain Entrance.


Rising Edge of PWROK.

This signal should not be pull low unless using


XOR Chain testing.

GPIO33/
HDA_DOCK
_EN#

Flash Descriptor
Security Override Strap
Rising Edge of PWROK

Sampled low:the Flash Descriptor Security will be


overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.

//
m

tp
:

USB[11:0][P,N]

Reserved

CFG5

DMI x2 Select

CFG6

iTPM Host
Interface

0 = DMI x2
1 = DMI x4 (Default)
0= The iTPM Host Interface is enabled(Note2)
1=The iTPM Host Interface is disalbed(default)
0 = Transport Layer Security (TLS) cipher
suite with no confidentiality
1 = TLS cipher suite with
confidentiality (default)

CFG7

Intel Management
engine Crypto strap

CFG9

PCIE Graphics Lane

0 = Reverse Lanes,15->0,14->1 ect..


1= Normal operation(Default):Lane
Numbered in order

CFG10

PCIE Loopback enable

0 = Enable (Note 3)
1= Disabled (default)

CFG[13:12]

CFG16

CFG19

00
10
01
11

XOR/ALL

=
=
=
=

Reserve
XOR mode Enabled
ALLZ mode Enabled (Note 3)
Disabled (default)

FSB Dynamic ODT

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled (Default)

DMI Lane Reversal

0 = Normal operation(Default):
Lane Numbered in Order

1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)

CFG20

Digital Display Port


(SDVO/DP/iHDMI)
Concurrent with PCIe

0 = Only Digital Display Port


or PCIE is operational (Default)
1 =Digital display Port and PCIe are
operting simulataneously via the PEG port
0 =No SDVO Card Present (Default)

SDVO_CTRLDATA

SDVO Present
1 = SDVO Card Present

PULL-UP 20K
PULL-UP 20K

Configuration
000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved

PULL-UP 20K
PULL-DOWN 20K

0.5

0 = LFP Disabled (Default)


L_DDC_DATA

Local Flat Panel


(LFP) Present

1= LFP Card Present; PCIE disabled

PULL-DOWN 15K
NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

ht

CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]

Strap Description
FSB Frequency
Select

PULL-UP 15K

TACH_[3:0]
TP[3]

CFG[2:0]

PULL-UP 20K

om

PWRBTN#

TP3

Pin Name

PULL-UP 20K

yc

SPKR

page 218

The pull-up or pull-down active when configured for native


GLAN_DOCK# functionality and determined by LAN controller

PME#
SATALED#

Montevina Platform Design guide 22339

PULL-DOWN 20K

GLAN_DOCK#

DMI Termination Voltage, The signal is required to be low for desktop


Rising Edge of PWROK.
applications and required to be high for
mobile applications.

Rev.1.5

Resistor Type/Value

su

GNT3#/
GPIO55

Comment

p.

Cantiga chipset and ICH9M I/O controller


Hub strapping configuration

/x
/

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Reference
Size
A3
Date:

Document Number

Rev

-1

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet

of

62

3D3V_S0
3D3V_S0

1D05V_S0

C418

DY
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

C454

SCD1U16V2ZY-2GP

C448

SCD1U16V2ZY-2GP

3D3V_S0

C445

SCD1U16V2ZY-2GP

C419

DY

SCD1U16V2ZY-2GP

C430

SCD1U16V2ZY-2GP

C416

SC4D7U6D3V3KX-GP

C436

SCD1U16V2ZY-2GP

C444

SCD1U16V2ZY-2GP

DY

C435

SCD1U16V2ZY-2GP

C417

SCD1U16V2ZY-2GP

C450

DY

SC4D7U6D3V3KX-GP

DY

SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

SC4D7U6D3V3KX-GP

C457 C455

SCD1U16V2ZY-2GP

C456

3D3V_VDD48_S0

1 R554
2
0R0603-PAD

1D05V_S0

3D3V_VDD48_S0

4
16
9
46
62
23

7
6

13 CLK_PW RGD

63

CK_PWRGD/PD#

8
10
11
12
13
14

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

2
SC33P50V2JN-3GP
4,7

CPU_SEL1

DY 2 SC33P50V2JN-3GP
DY 2 SC33P50V2JN-3GP

CPU_SEL2_R

DY 2 SC33P50V2JN-3GP
DY

55

NC#55

PCI1/CR#_B

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

PCI2/TME

0 = Overclocking of CPU and SRC Allowed


1 = Overclocking of CPU and SRC NOT allowed

PCI3
PCI4/27M_SEL

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#


1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

PCI_F5/ITP_EN

0 =SRC8/SRC8#
1 = ITP/ITP#

SRCT3/CR#_C

Byte 5, bit 3
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair
Byte 5, bit 2
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair

NB

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_PCIE_ICH 13
CLK_PCIE_ICH# 13

SB DMI

SRCT7/CR#_F
SRCC7/CR#_E

51
50

SRCT6
SRCC6

48
47

CLK_PCIE_PEG 52
CLK_PCIE_PEG# 52

GPU

SRCT10
SRCC10

41
42

CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25

LAN

SRCT11/CR#_H
SRCC11/CR#_G

40
39

SRCT9
SRCC9

37
38

CLK_PCIE_MINI1 32
CLK_PCIE_MINI1# 32

WLAN

SRCT4
SRCC4

34
35

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

NB CLK

SRCT3/CR#_C
SRCC3/CR#_D

31
32

SRCT2/SATAT
SRCC2/SATAC

28
29

CLK_PCIE_SATA 12
CLK_PCIE_SATA# 12
JTAG_TCK 53

SB SATA

DREFSSCLK 7
DREFSSCLK# 7

NB

DREFCLK 7
DREFCLK# 7

NB

NEWCARD

SB 1008
1 R694

ATI-ES

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2

24
25

DREFSSCLK_1
DREFSSCLK_1#

1
2

2
0R2J-2-GP
4 RN76
3 SRN0J-6-GP

SRCT0/DOTT_96
SRCC0/DOTC_96

20
21

DREFCLK_1
DREFCLK_1#

4
3

1 RN44
2 SRN0J-6-GP

UMA

UMA

3D3V_S0
ICS9LPRS365BKLFT-GP-U

71.09365.A03
RN47
SRN10KJ-6-GP

DY
RN45
13
7
25
32

SATACLKREQ#
CLK_MCH_OE#
LAN_CLKREQ#
W LAN_CLKREQ#

1
2
3
4

8
7
6
5

PCLKCLK0
PCLKCLK1
CR#_H
CR#_G

SEL2 SEL1 SEL0


FSC FSB FSA

DY

CPU

FSB

100M
133M
166M
200M
266M

X
533M
667M
800M
1067M

SRN470J-3-GP

PIN NAME

DESCRIPTION

SRCC3/CR#_D

Byte 5, bit 1
0 = SRC3 enabled (default)
1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
Byte 5, bit 0
0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair

SRCC7/CR#_E

Byte 6, bit 7
0 = SRC7# enabled (default)
1= CR#_F controls SRC6

SRCT7/CR#_F

Byte 6, bit 6
0 = SRC7 enabled (default)
1= CR#_F controls SRC8

SRCC11/CR#_G

Byte 6, bit 5
0 = SRC11# enabled (default)
1= CR#_G controls SRC9

SRCT11/CR#_H

Byte 6, bit 4
0 = SRC11 enabled (default)
1= CR#_H controls SRC10

1
0
0
0
0

0
0
1
1
0

1
1
1
0
0

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Clock Generator
Size
Date:

CR#_H
CR#_G

2nd = 71.09365.A03 71.08513.003

Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

PCI0/CR#_A

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

/x
/

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

ht

ICS9LPRS365YGLFT setting table


PIN NAME
DESCRIPTION

58
57

p.

64
5

tp
:

EMI capacitor for Antenna team suggestion

CPUT1_F
CPUC1_F

4
3
2
1

DY 2 SC33P50V2JN-3GP
DY 2 SC33P50V2JN-3GP

CPU

5
6
7
8

PCLK_FW H

PCLKCLK0
PCLKCLK1
R255 2
1 33R2J-2-GP PCLKCLK2
1PCLKCLK3
TPAD14-GP TP158
PCLKCLK4
PCLKCLK5

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

35

DY

22
30
36
49
59
26

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

om

10KR2J-3-GP 2R249

SCLK
SDATA

GND48
GNDPCI
GNDREF

DY

SC47P50V2JN-3GP

SRN33J-7-GP

PCI_STOP#
CPU_STOP#

15,16,17 SMBC_ICH
15,16,17 SMBD_ICH
3D3V_S0
C451
2

8 CPU_SEL2_R
7 CLK48
6 PCLKCLK4
5 PCLKCLK5

CLK48_5158E
1
EC46
CLK_ICH14
1
EC25
PCLK_FW H
1
EC24
PCLK_ICH
1
EC23
PCLK_KBC
1
EC39
CLK48_ICH
1
EC48

45
44

yc

CLK_ICH14
CLK48_ICH
34 PCLK_KBC
13 PCLK_ICH

USB_48MHZ/FSLA

modify by RF

PCLKCLK5

61
60

su

PCLKCLK2
CPU_SEL2_R

17

//
m

4
3
2
1

RN46

1
2
3
4

13

1 2K2R2J-2-GP CLK48
1 33R2J-2-GP

13 PM_STPPCI#
13 PM_STPCPU#

SRN10KJ-6-GP

13

R2512
R253 2

RN48

5
6
7
8

CPU_SEL2

CLK48_5158E

GND

2
4,7

CPU_SEL0
CLK48_5158E

CPUT0
CPUC0

X1
X2

SC27P50V2JN-2-GP
4,7
31

3
2

GEN_XTAL_IN

65

UMA

C452
1

R254
10KR2J-3-GP

X5
X-14D31818M-35GP

82.30005.891
2nd = 82.30005.951

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

PCLKCLK4

GEN_XTAL_OUT

18
15
1

DIS

3D3V_S0

U24

C453
SC33P50V2JN-3GP
1
2

VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

CL=20pF0.2pF
R260
10KR2J-3-GP

19
27
43
52
33
56

3D3V_S0

Document Number

Rev

JV71-MV DDR3Sheet
Madison
W ednesday, October 28, 2009
3
of
E

-1
62

H_A#[35..3]
H_DINV#[3..0]

TPAD14-GP TP97

RSVD_CPU_11

B1

1
2

H_THERMDA

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

PROCHOT#
THRMDA
THRMDC

1D05V_S0

THERMTRIP#

HCLK

BCLK0
BCLK1

C116
SC2200P50V2KX-2GP

DY

Close to CPU
R89
68R2-GP

6 H_DSTBN#0
6 H_DSTBP#0
6 H_DINV#0

1 R97
2DY
0R2J-2-GP

CPU_PROCHOT#_1

D21
A24
B25

H_THERMDC

C90
1

DY

H_THERMDA 33
H_THERMDC 33

C7

PM_THRMTRIP-A# 7,12,38

A22
A21

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CPU_PROCHOT#_R

SC47P50V2JN-3GP
2

PM_THRMTRIP#
ICH9 and MCH
PH @ page48

40

modify by RF

should connect to
without T-ing

1D05V_S0

Layout Note:
"CPU_GTLREF0"
0.5" max length.

KEY_NC
BGA479-SKT6-GPU7

H_CPURST# 1
EC75

62.10079.001
2nd = 62.10053.401

CPU_GTLREF0

R309
2KR2F-3-GP

SC33P50V2JN-3GP

DY

C526TPAD14-GP TP87
TPAD14-GP TP25
TPAD14-GP TP180
3,7
3,7
3,7

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

H_DSTBN#1
H_DSTBP#1
H_DINV#1

DY

ht

6
6
6

1KR2F-3-GP
R312

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

AD26
TEST1
C23
TEST2
D25
1RSVD_CPU_12 C24
TEST4
AF26
1RSVD_CPU_13 AF1
1RSVD_CPU_14 A26
B22
B23
C21

CPU_SEL0
CPU_SEL1
CPU_SEL2

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

DATA GRP2

TP28
TP27
TP26
TP32
TP29
TP30
TP34
TP50
TP31
TP49
TP33
TP88

2 OF 4

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP3

XDP_BPM#0
1
XDP_BPM#1
1
XDP_BPM#2
1
XDP_BPM#3
1
XDP_BPM#4
1
XDP_BPM#5
1
XDP_TCK
1
XDP_TDI
1
XDP_TDO
1
XDP_TMS
1
XDP_TRST#
1
XDP_DBRESET#1

CPU1B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

/x
/

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

6
6
6

MISC

BSEL0
BSEL1
BSEL2

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

R26
U26
AA1
Y1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
COMP0
COMP1
COMP2
COMP3

R71 1
R67 1
R57 1
R60 1

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

2
2
2
2

H_PW RGD 12,50


H_CPUSLP# 6
H_PSI#
40
C102

1D05V_S0

XDP_TMS

R54

2 54D9R2F-L1-GP

XDP_TDI

R55

2 54D9R2F-L1-GP

XDP_BPM#5

R46

2 54D9R2F-L1-GP

XDP_TDO

R47

H_CPURST#

R113 1

1 DY
R119

TEST1
1KR2J-1-GP

1 DY
2 TEST2
R114
1KR2J-1-GP
C525
2DY

TEST4
1
SCD1U10V2KX-4GP

Net "TEST4" as short as possible,


make sure "TEST4" routing is
reference to GND and away other
noisy signals

H_DPRSTP# 7,12,40
H_DPSLP# 12
H_DPW R# 6

DY
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

2 54D9R2F-L1-GP

DY

2 51R2F-2-GP

DY

3D3V_S0

XDP_DBRESET# R105 1

H_DPRSTP#
H_DPSLP#
H_DPW R#
H_PW RGD
H_CPUSLP#
H_INIT#
H_CPURST#

2 1KR2J-1-GP

DY
XDP_TCK

R32

2 54D9R2F-L1-GP

XDP_TRST#

R33

2 54D9R2F-L1-GP

1
1
1
1
1
1
1

TP76
TP95
TP114
TP81
TP78
TP92
TP86

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

Place these TP on button-side,


easy to measure.

JV71-MV DDR3 Madison

Wistron Corporation
Title

CPU (1 of 2)
Date:

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Size

All place within 2" to CPU

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

BGA479-SKT6-GPU7

EMI capacitor

modify by RF

su

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H_TRDY#
H_HIT#
H_HITM#

H_D#[63..0]

DY

p.

G6
E4

HIT#
HITM#

H_LOCK# 6
H_CPURST# 6,50
H_RS#[2..0]

H_RS#0
H_RS#1
H_RS#2

H_DSTBP#[3..0]

SC47P50V2JN-3GP

C1
F3
F4
G3
G2

C104
1

om

RESET#
RS0#
RS1#
RS2#
TRDY#

12

SC1KP50V2KX-1GP
2
1

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

H4

H_INIT#

1 1

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

LOCK#

H_BREQ#0 6
H_IERR#

STPCLK#
LINT0
LINT1
SMI#

D20
B3

yc

12
12
12
12

F1

H_STPCLK#
H_INTR
H_NMI
H_SMI#

D5
C6
B4
A3

BR0#
IERR#
INIT#

H_DSTBN#[3..0]

R88
56R2J-4-GP

A20M#
FERR#
IGNNE#

DEFER#
DRDY#
DBSY#

H_D#[63..0]

Place testpoint on
H_IERR# with a GND
0.1" away

THERMAL

ICH

12
12
12

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

//
m

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

H5
F21
E1

6
6
6

DATA GRP1

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_BNR#
H_BPRI#

tp
:

K3
H2
K2
J3
L1

H_DSTBP#[3..0]

1D05V_S0

H1
E2
G5

DATA GRP0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

ADS#
BNR#
BPRI#

XDP/ITP SIGNALS

H_ADSTB#0
H_REQ#[4..0]

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

RESERVED

6
6

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

H_DINV#[3..0]

H_DSTBN#[3..0]

TP74 TPAD14-GP

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

1 OF 4

CONTROL

CPU1A

H_A#[35..3]

SC100P50V2JN-3GP
2

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
E

of

-1
62

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

C537
SC10U6D3V5MX-3GP

C536
SC10U6D3V5MX-3GP

C547
SC10U6D3V5MX-3GP

C548
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

/x
/
su
1
SCD1U50V3KX-GP

1
2

DY

C84

tp
:

100R2F-L1-GP-U

FCM1608KF-1-GP
1
2
L18
68.00217.161
C6062nd = 68.00248.061
SC10U6D3V5MX-3GP

1
R25

C603

40

SCD01U16V2KX-3GP

1
H_VID[6..0]
VCC_CORE

ht

VCC_SENSE 40
VSS_SENSE 40

C83

1D5V_S0

1D5V_VCCA_S0

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

C80

yc

C58

layout note: "1D5V_VCCA_S0"


as short as possible

C79

Layout Note:
R24

VCCSENSE and VSSSENSE lines


should be of equal length.

100R2F-L1-GP-U

BGA479-SKT6-GPU7

CPU1D

DY

//
m

1
2

GAP-CLOSE-PW R
C57

p.

C75

om

C67

1D05V_S0

1
1D05V_S0_CPU

AE7

C539

DY

SC4D7U6D3V3KX-GP

VSSSENSE

SC10U6D3V5MX-3GP

AF7

C552

DY

SCD1U10V2KX-4GP

VCCSENSE

SC10U6D3V5MX-3GP

1D05V_S0

SCD1U10V2KX-4GP

AD6
AF5
AE5
AF4
AE3
AF3
AE2

SC10U6D3V5MX-3GP

VID0
VID1
VID2
VID3
VID4
VID5
VID6

C538

TPAD14-GP TP23

SCD1U10V2KX-4GP

B26
C26

SC10U6D3V5MX-3GP

VCCA
VCCA

DY

C553

DY

SCD1U10V2KX-4GP

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

DY

C52

DY

G2

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

C51
SC10U6D3V5MX-3GP

C50
SC10U6D3V5MX-3GP

C53
SC10U6D3V5MX-3GP

C88
SC10U6D3V5MX-3GP

C89
SC10U6D3V5MX-3GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SCD1U10V2KX-4GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

C87
SC10U6D3V5MX-3GP

3 OF 4

SCD1U10V2KX-4GP

C55
SCD1U10V2KX-4GP

C85
SCD1U10V2KX-4GP

CPU1C

C56
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_CORE

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

C86

VCC_CORE

VCC_CORE

VCC_CORE

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

A4
A8
A11
A14
A16
A19
A23
TP_AF2_CPU
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

4 OF 4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26 TP_AE26_CPU 1
TP_A2_CPU
A2
1
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25 TP_A25_CPU 1
AF25

TP174 TPAD14-GP
TP98 TPAD14-GP

TP181 TPAD14-GP

BGA479-SKT6-GPU7

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (2 of 2)
Size
Date:
A

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
E

of

-1
62

1 OF 10

NB1A

H_A#[35..3]
H_D#[63..0]

H_SWING routing Trace width and


Spacing use 10 / 20 mil

R381
221R2F-2-GP

H_SWING Resistors and


Capacitors close MCH
500 mil ( MAX )

R382
100R2F-L1-GP-U

1
2

C619
SCD1U10V2KX-4GP

H_SW ING

H_RCOMP routing Trace width and


Spacing use 10 / 20 mil
2 H_RCOMP
24D9R2F-L-GP

//
m

1
R380

Place them near to the chip ( < 0.5")

H_CPURST# 1
EC76

tp
:

SC33P50V2JN-3GP

DY
1D05V_S0

H_SW ING
H_RCOMP

ht

2
1

R370
1KR2F-3-GP

4,50 H_CPURST#
4
H_CPUSLP#

H_AVREF

SCD1U16V2ZY-2GP

R389
2KR2F-3-GP

EMI capacitor

C614

C5
E3
C12
E11
A11
B11

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

H_A#[35..3]

H_SWING
H_RCOMP
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF

H_ADS#
4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR#
4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPW R# 4
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

CANTIGA-GM-GP-U-NF

71.CNTIG.00U
2

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

/x
/

1D05V_S0
D

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6

su

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

omHOST
p.

H_D#[63..0]

yc

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Date:
5

Document Number

Cantiga (1 of 6)

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

Rev

-1
of

62

1D05V_S0

2 OF 10

NB1B

SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL

BC28
AY28
AY36
BB36

M_CKE0
M_CKE1
M_CKE2
M_CKE3

16
16
17
17

BA17
AY16
AV16
AR13

M_CS0#
M_CS1#
M_CS2#
M_CS3#

16
16
17
17

BD17
AY17
BF15
AY13

M_ODT0
M_ODT1
M_ODT2
M_ODT3

16
16
17
17

18 CLK_DDC_EDID
18 DAT_DDC_EDID
18 GMCH_LCDVDD_ON
TPAD14-GP TP189
R183 1
2
0R0402-PAD
18
18
18
18

SM_PWROK 38

BG22
BH21

M_RCOMPP
M_RCOMPN

BF28
BH28

SM_RCOMP_VOH
SM_RCOMP_VOL

AV42
AR36
BF17
BC36

DDR2 : connect to GND


SM_REXT
R4441
499R2F-2-GP
2
DDR3_DRAMRST#
DDR3_DRAMRST#

DDR_VREF_S3_1

0.75V

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

B38
A38
E41
F41

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

CLK

16
16
17
17

F43
E43

PEG_CLK
PEG_CLK#

16,17

DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
CLK_MCH_3GPLL
CLK_MCH_3GPLL#

C335

3
3

LCTLA_CLK
LCTLB_DATA
CLK_DDC_EDID
DAT_DDC_EDID

M33
K33
J33

GMCH_LCDVDD_ON
LIBG
1 L_LVBG
LVDS_VREF

M29
C44
B43
E37
E38
C41
C40
B37
A37

GMCH_TXACLKGMCH_TXACLK+
GMCH_TXBCLKGMCH_TXBCLK+

18 GMCH_TXAOUT018 GMCH_TXAOUT118 GMCH_TXAOUT2-

H47
E46
G40
A40

18 GMCH_TXAOUT0+
18 GMCH_TXAOUT1+
18 GMCH_TXAOUT2+

H48
D45
F40
B40

18 GMCH_TXBOUT018 GMCH_TXBOUT118 GMCH_TXBOUT2-

A41
H38
G37
J37

18 GMCH_TXBOUT0+
18 GMCH_TXBOUT1+
18 GMCH_TXBOUT2+

B42
G38
F37
K37

TV_DACA
TV_DACB
TV_DACC

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

F25
H25
K25

TVA_DAC
TVB_DAC
TVC_DAC

H24

DY

2 2K21R2F-GP

CFG16

R442
80D6R2F-L-GP

PWROK
2
100R2J-2-GP

1
R203

1 R195
2
0R0402-PAD

PWROK

1
EC77

PM_DPRSLPVR_MCH

2
SC33P50V2JN-3GP

DY

EMI capacitor

su

p.
45

CRT_RED
CRT_IRTN

H32
J32
J29
E29
L29

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CRT_IREF
1 UMA 2
R161
1K02R2F-1-GP

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

AH37
AH36
AN36
AJ35
AH34

CL_CLK0 13
CL_DATA0 13
PWROK
13,33
CL_RST#0
13

MCH_CLVREF

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

N28
M28
G36
E36
K36 CLK_MCH_OE#
H36

C288

TSATN#

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B12

B28
B30
B29
C29
A28

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

GMCH_HDMI_CLK 20
GMCH_HDMI_DATA 20
CLK_MCH_OE# 3
MCH_ICH_SYNC# 13

MCH_TSATN#

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

CRT_IREF routing Trace


width use 20 mil

R201
1KR2F-3-GP

R200
499R2F-2-GP

FOR Cantiga:500 ohm


Teenah: 392 ohm

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

C220
C648
C654
C228
C233
C658
C237
C239
C265
C264
C269
C660
C671
C666
C680
C679

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

PEG_TXP0_L
PEG_TXP1_L
PEG_TXP2_L
PEG_TXP3_L
PEG_TXP4_L
PEG_TXP5_L
PEG_TXP6_L
PEG_TXP7_L
PEG_TXP8_L
PEG_TXP9_L
PEG_TXP10_L
PEG_TXP11_L
PEG_TXP12_L
PEG_TXP13_L
PEG_TXP14_L
PEG_TXP15_L

DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

C213
C647
C651
C222
C229
C663
C234
C245
C259
C253
C266
C657
C667
C664
C672
C686

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

UMA 1
UMA 1

2 C600
2 C605

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN0_L_1
PEG_TXP0_L_1

UMA 1

UMA 1
UMA 1

2 C596
2 C598

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN1_L_1
PEG_TXP1_L_1

UMA 1

PEG_TXN2_L
PEG_TXP2_L

UMA 1
UMA 1

2 C589
2 C592

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN2_L_1
PEG_TXP2_L_1

UMA 1

PEG_TXN3_L
PEG_TXP3_L

UMA 1
UMA 1

2 C568
2 C561

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN3_L_1
PEG_TXP3_L_1

UMA 1

R555

UMA ACZ_SDIN3

ACZ_SDIN3

2UMA HDMI_DETECT#_L

R61
1

1
2
3
4

ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDATAOUT_R

ACZ_BIT_CLK 12
ACZ_SYNC_R 12
ACZ_RST#_R 12
ACZ_SDATAOUT_R

GMCH_RED
GMCH_GREEN
GMCH_BLUE
12

52

4 RN82
3 SRN0J-10-GP-U

HDMI_DATA2- 20,53
HDMI_DATA2+ 20,53

4 RN83
3 SRN0J-10-GP-U

HDMI_DATA1- 20,53
HDMI_DATA1+ 20,53

4 RN84
3 SRN0J-10-GP-U

HDMI_DATA0- 20,53
HDMI_DATA0+ 20,53

4
3 SRN0J-10-GP-U
RN85

HDMI_CLK- 20,53
HDMI_CLK+ 20,53

2UMA

HDMI_DETECT#

20

1
2
3
4

EC79

C756

EC78

C759

SCD01U16V2KX-3GP

SC2D2U6D3V3MX-1-GP

DY

DY

ACZ_BIT_CLK
SC12P50V2JN-3GP

ACZ_RST#_R
SC12P50V2JN-3GP

HDA_BCLK
SC12P50V2JN-3GP

DY
1

EC21
2

SM_RCOMP_VOH

R441
3K01R2F-3-GP

C757

FOR UMA,change to 150 ohm


(66.15156.08L)

RN32
GMCH_BL_ON
GMCH_LCDVDD_ON

UMA

LIBG

1
R384

CRT_IREF

1
R162

4
3
2
1

TV_DACC
TV_DACB
TV_DACA

DIS
2
0R2J-2-GP

RN33
GMCH_VS
GMCH_HS

SC2D2U6D3V3MX-1-GP

2
1

1
R178
100KR2F-L1-GP

3
4

DIS

FOR UMA,change to 75 ohm


(66.75036.08L)

2
2K37R2F-GP

RN31

C760

layout take note

3
4

UMA

SRN100KJ-6-GP

SRN0J-7-GP
SCD01U16V2KX-3GP

2
1

FOR Discrete change RN to 0 ohm


(66.R0036.A8L)

5
6
7
8

SM_RCOMP_VOL
R446
1KR2F-3-GP

GFXVR_EN 45

8
7
6
5
SRN0J-7-GP

1KR2F-3-GP
1

2
PM_EXTTS#0
PM_EXTTS#1

SRN10KJ-5-GP
RN35
4
1
3
2

PEG_TXP[15..0]

RN30
8
7
6
5

4
3

52

0R2J-2-GP

SRN0J-10-GP-U

Remove RN88 & RN89

Wistron Corporation

1
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga (2 of 6)
Size

SRN10KJ-5-GP

Document Number

Rev

JV71-MV DDR3 Madison


Date:

UMA

LCTLA_CLK
LCTLB_DATA

PEG_TXN[15..0]

12

1D5V_S3

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

33R2J-2-GP

R445
2

DY

DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS

52

R419

MCH_TSATN#

3D3V_S0

PEG_TXN0_L
PEG_TXN1_L
PEG_TXN2_L
PEG_TXN3_L
PEG_TXN4_L
PEG_TXN5_L
PEG_TXN6_L
PEG_TXN7_L
PEG_TXN8_L
PEG_TXN9_L
PEG_TXN10_L
PEG_TXN11_L
PEG_TXN12_L
PEG_TXN13_L
PEG_TXN14_L
PEG_TXN15_L

PEG_TXN1_L
PEG_TXP1_L

PEG_RXP3

RN34

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

PEG_RXP[15..0]

PEG_TXN0_L
PEG_TXP0_L

SRN33J-4-GP

GFXVR_EN

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

CANTIGA-GM-GP-U-NF

UMA

52

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

0R2J-2-GP

1D05V_S0

R387
56R2J-4-GP

PEG_RXN[15..0]

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

71.CNTIG.00U

RN36
HDA_BCLK
HDA_SYNC
HDA_RST#
HDA_SDO

modify by RF

DY

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

FOR Cantiga: 1.02k_1% ohm


Teenah: 1.3k ohm

1D05V_S0

tp
:

13,40 PM_DPRSLPVR

GFXVR_EN

for HDMI port C

MISC

1 R192
2
0R0402-PAD

NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43
NC#BH6
NC#BH5
NC#BG4
NC#BH3
NC#BF3
NC#BH2
NC#BG2
NC#BE2
NC#BG1
NC#BF1
NC#BD1
NC#BC1
NC#F1
NC#A47

NC

4,12,38 PM_THRMTRIP-A#

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47

HDA

DY

C34

GFX_VR_EN

ht

C324
SC100P50V2JN-3GP

ME

PLT_RST1#

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

PM_EXTTS#0
PM_EXTTS#1

PM

13,33
13,25,31,32,34,35,52

R29
B7
N33
P32
AT40
RSTIN#
AT11
NB_THERMTRIP#
T20
PM_DPRSLPVR_MCH R32

13
PM_SYNC#
4,12,40 H_DPRSTP#
16,17 PM_EXTTS#0

om

DY

CFG9

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4

CRT_GREEN

J28
G29

R556 1

2 2K21R2F-GP

R385 1

19 GMCH_VSYNC

GFX_VID[4..0]

B33
B32
G33
F33
E33

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

Close to GMCH as 500 mils.

SC47P50V2JN-3GP
1

CFG20

G28

GMCH_RED

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

CRT_BLUE

M_RCOMPN

E28

GMCH_GREEN

GMCH_DDCCLK
GMCH_DDCDATA
1 R189
2 GMCH_HS
0R0402-PAD
1 R188
2GMCH_VS
0R0402-PAD

19 GMCH_DDCCLK
19 GMCH_DDCDATA
19 GMCH_HSYNC

CFG20

GMCH_RED

GMCH_BLUE

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

1
49D9R2F-GP

C270
2

2 4K02R2F-GP

19

yc

DY

CFG16

R193 1

M_RCOMPP

GMCH_BLUE

19 GMCH_GREEN

DMI_RXP0 13
DMI_RXP1 13
DMI_RXP2 13
DMI_RXP3 13

SCD1U10V2KX-4GP
2

1
2

3D3V_S0

AD35
AE44
AF46
AH43

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

19

13
13
13
13

TV_DCONSEL_0
TV_DCONSEL_1

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

VGA

R443
80D6R2F-L-GP

CFG

CFG9

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

TV_RTN

C31
E32

DMI_TXP0 13
DMI_TXP1 13
DMI_TXP2 13
DMI_TXP3 13

AE35
AE43
AE46
AH42

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

13
13
13
13

//
m

1D5V_S3

AE40
AE38
AE48
AH40

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

DMI

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

CPU_SEL0
CPU_SEL1
CPU_SEL2

GRAPHICS VID

3,4
3,4
3,4

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

TV

AE41
AE37
AE47
AH39

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

PEG_CMP

T37
T36

PEG_COMPI
PEG_COMPO

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

GRAPHICS

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

L32
G32
M32

L_BKLTCTL
GMCH_BL_ON

PCI-EXPRESS

BG23
BF23
BH18
BF18

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

AR24
AR21
AU24
AV20

18
34

/x
/

RESERVED#AY21

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

16
16
17
17

LVDS

AY21

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

RESERVED#B31
RESERVED#B2
RESERVED#M1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

AP24
AT21
AV24
AU20

B31
B2
M1

RSVD

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SCD1U10V2KX-4GP

DDR CLK/ CONTROL/COMPENSATION

RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24

2
R196

3 OF 10

NB1C
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

Wednesday, October 28, 2009


1

Sheet

-1
of

62

BB20
BD20
AY20

M_A_RAS# 16
M_A_CAS# 16
M_A_W E# 16

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

CANTIGA-GM-GP-U-NF

5 OF 10

M_A_A[14..0] 16

om

p.

M_A_A[14..0]

M_A_DQS#[7..0] 16

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

M_B_BS#0 17
M_B_BS#1 17
M_B_BS#2 17
M_B_RAS# 17
M_B_CAS# 17
M_B_W E# 17
D

M_B_DM[7..0]

/x
/

M_A_DQS#[7..0]

M_A_DQS[7..0] 16

su

M_A_DQS[7..0]

M_A_DM[7..0] 16

yc

MEMORY

M_A_DM[7..0]

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SA_RAS#
SA_CAS#
SA_WE#

M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

MEMORY

M_A_BS#0 16
M_A_BS#1 16
M_A_BS#2 16

SYSTEM

BD21
BG18
AT25

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_DM[7..0] 17

M_B_DQS[7..0]

M_B_DQS[7..0] 17

M_B_DQS#[7..0]

M_B_DQS#[7..0] 17

M_B_A[14..0]

M_B_A[14..0] 17

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

ht

tp
:

71.CNTIG.00U

NB1E
17 M_B_DQ[63..0]

SA_BS_0
SA_BS_1
SA_BS_2

//
m

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

SYSTEM

AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

DDR

M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

4 OF 10

NB1D
16 M_A_DQ[63..0]

DDR

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga (3 of 6)
Size
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

of

-1
62

Coupling CAP

T32

/x
/

UMA

1
2
2

DY

C278

Coupling CAP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC CORE

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER

1
2

1
2

1
2

1
2

1
2
1

UMA

C279

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

VCC

VCC NCTF

p.
2

//
m

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

tp
:

SC1U10V3KX-3GP

om
1

1
2

yc

1
2

ST330U2D5VBM-GP

1
2

1
2

1
2
1
C340
2

SC1U10V3KX-3GP
2
1
C320

Place on the Edge

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

ht

place near Cantiga

1
C298

C329

SCD22U10V2KX-1GP
2

C347

SCD22U10V2KX-1GP
2

C290
SCD1U10V2KX-4GP
2
1

AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
AM40 SM_LF3_GMCH
AV21 SM_LF4_GMCH
AY5 SM_LF5_GMCH
AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH
C350
SCD1U10V2KX-4GP
2
1

VCC SM LF

VCC GFX

80.3371V.12L

C348

SC4D7U6D3V3KX-GP

C308

SC4D7U6D3V3KX-GP

C323

SC4D7U6D3V3KX-GP

C349

TC22

DY

SC4D7U6D3V3KX-GP

C359

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

C367

1D5V_S3

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

1D05V_S0

su

Place on the Edge

UMA

C271

1
2

1
2

1
2

1
2

1
2

DY

C286

SCD47U6D3V2KX-GP

VCC GFX NCTF

UMA

C275

C284
SCD1U10V2KX-4GP

UMA

C285

C289
SCD1U10V2KX-4GP

UMA

C302

SC10U6D3V5MX-3GP

VCC SM

C280
SCD1U10V2KX-4GP

SCD22U10V2KX-1GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C612

SCD1U10V2KX-4GP

DY

C282

SCD1U10V2KX-4GP

UMA

C276

SC1U10V3ZY-6GP

DY

C273

SC4D7U6D3V3KX-GP

UMA

C277

SC4D7U6D3V3KX-GP

C292

SC4D7U6D3V3KX-GP

TC18

C361

VCC_AXG_SENSE
VSS_AXG_SENSE

71.CNTIG.00U

C281

VCC_GFXCORE

FOR VCC SM

CANTIGA-GM-GP-U-NF

U60(ISL6263ACRZ-T-GP) place near Cantiga

C249

DY

SCD1U10V2KX-4GP

AJ14
AH14

C274

DY

SC4D7U6D3V3KX-GP

VCC_AXG_SENSE
VSS_AXG_SENSE

C287

Coupling CAP 370 mils from the Edge

SCD47U16V3ZY-3GP

45 VCC_AXG_SENSE
45 VSS_AXG_SENSE

C291

DIS

SC4D7U6D3V3KX-GP

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

1 R439
2
0R5J-6-GP

DY

6 OF 10

NB1F

FOR VCC CORE

DIS

SC4D7U6D3V3KX-GP

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

2
0R5J-6-GP

SC4D7U6D3V3KX-GP

VCC_GFXCORE

1D05V_S0

R438
1

SC4D7U6D3V3KX-GP

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

ST220U2D5VBM-2GP

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

POWER

NB1G
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

VCC_GFXCORE

7 OF 10
1D5V_S3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga (4 of 6)
Size
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

Wednesday, October 28, 2009


1

Sheet

of

-1
62

1
2

DY

C263
SCD1U10V2KX-4GP

C621
SCD1U10V2KX-4GP

2
2

UMA

DY
2

2
1

1D05V_S0

1
2

C732

C722

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DY

Cantiga (5 of 6)
Size
Date:

C268
SCD47U6D3V2KX-GP

1
2

DY

2 R396
1
0R0603-PAD
R398
0R2J-2-GP

1
1
2

C620
SCD47U6D3V2KX-GP

R167
0R2J-2-GP

1
2

C650
SCD47U6D3V2KX-GP

VTTLF1
VTTLF2
VTTLF3

C675

1D8V_NB_S0

119mA

SC4D7U6D3V3KX-GP

1
2

UMA

C186

1D05V_S0

DY

456mA

CANTIGA-GM-GP-U-NF

71.CNTIG.00U
SB 1202

UMA

C739

C283

C676
SCD47U6D3V2KX-GP

A8
L1
AB2

DY
2

1
2

AXF
HV
PEG
VTTLF

LVDS

VTTLF
VTTLF
VTTLF

C758

1782mA

VCCD_LVDS
VCCD_LVDS

C670
SC4D7U6D3V3KX-GP

C662
SC2D2U6D3V3MX-1-GP
2
1

/x
/
su

p.
SM CK

AH48
AF48
AH47
AG47

DMI

D TV/CRT

CRT
A LVDS
A PEG
TV

tp
:

HDA

//
m

yc

1
2
1

A SM

om

1
2

1
2

2
2

1
2

C175
SC4D7U6D3V3KX-GP

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

3D3V_HV_S0

106mA

C712

1
2

1
2
1
2

A CK

2
1

1
2

ht
2

1
1
2

1
1
2

1
2

1
2

1
2

1
2
1
2
1
2
1

1
2

1
2

V48
U48
V47
U47
U46

SC1U10V2ZY-GP

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

SC1U10V2ZY-GP

C35
B35
A35

UMA

SC10U6D3V5MX-3GP

UMA

VCCD_PEG_PLL

K47

VCC_HV
VCC_HV
VCC_HV

C751

SCD1U10V2KX-4GP
C678

UMA

AA47

VCC_TX_LVDS

1D8V_TXLVDS_S0

UMA

1D5V_S3

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

0R2J-2-GP

DIS

C235

VCCD_HPLL

M38
L37

1D8V_SUS_DLVDS

60.3mA

VCCD_QDAC

BF21
BH20
BG20
BF20

C877

2 R448
1
0R0603-PAD

SC10U6D3V5MX-3GP

R159

L28
AF1

200mA

B22
B21
A21

SC1U10V3KX-3GP
C634

1 R153
2
0R0603-PAD

VCCD_TVDAC

DY

SCD1U10V2KX-4GP

C690

50mA

M25

DY

C272

SC4D7U6D3V3KX-GP

1D05V_RUN_PEGPLL

1D8V_NB_S0

C188
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

UMA

157.2mA

SCD1U10V2KX-4GP

1D5VRUN_QDAC
1
2
PBY160808T-181Y-GP

C715
C174
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

DY

1D5VRUN_QDAC

VCC_HDA

C251

SC10U6D3V5MX-3GP

C243

58.7mA

0R2J-2-GP

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

1D5VRUN_TVDAC

1D5VRUN_TVDAC

A32

C616

SC4D7U6D3V3KX-GP

R383

DY

VCCA_TV_DAC
VCCA_TV_DAC

C876

74.G1117.B3C
UMA

1D5V_SUS_SM_CK

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

3D3V_S0
1D8V_NB_S0

G1117-18T63UF-GP

SC4D7U6D3V3KX-GP

VCC_HDA

B24
A24

1D05V_S0

322mA

POWER

VCC_AXF
VCC_AXF
VCC_AXF

3
2
1

VIN
VOUT
GND

SC1KP50V2KX-1GP
C635

1 R375
2
0R0603-PAD

3D3V_S0_DAC_1

I=1A

U66

SCD1U10V2KX-4GP
C750

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

R106
10R2J-2-GP

SC4D7U6D3V3KX-GP

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

3D3V_HV_S0

1 R376
2
0R0603-PAD

83.BAT54.D81
2nd = 83.BAT54.X81

SC4D7U6D3V3KX-GP

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

1D05V_HV_S0 2

2
BAT54-5-GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C305

SCD1U10V2KX-4GP

C691
SCD1U10V2KX-4GP

1D05V_SUS_MCH_PLL2

UMA

SC1U10V3KX-3GP

2 R386
1
0R2J-2-GP DY

1D5V_S0

180ohm 100MHz

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

1 R377
2
0R0603-PAD

C205

2nd = 68.00214.101

C293

3D3V_S0_DAC

1D5V_S0

C247

C309

DY

C313

SC2D2U6D3V3MX-1-GP

DY

C295

SC4D7U6D3V3KX-GP

139.2mA
C697
SCD1U10V2KX-4GP

UMA

UMA

DY

VCCA_PEG_PLL

1D05V_SM_CK
C294

SC4D7U6D3V3KX-GP

220ohm 100MHz

2nd = 68.00119.111

50mAAA48

1D05V_RUN_PEGPLL

SC4D7U6D3V3KX-GP

2 R202
1
0R0603-PAD

24mA

1D05V_RUN_PEGPLL

2
FCM1608CF-221T02-GP

VCCA_PEG_BG

1D05V_S0

C692
SCD1U10V2KX-4GP

L20

68.00217.521

AD48

C704
SCD1U10V2KX-4GP

C306

C752

SC4D7U6D3V3KX-GP

DY

C754

SC4D7U6D3V3KX-GP

C753

SC4D7U6D3V3KX-GP

1D05V_S0

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
SC10U6D3V5MX-3GP

DY

2nd = 68.00248.061

VCCA_PEG_BG

VSSA_LVDS

3D3V_S0

J47

VCCA_LVDS

13.2mA

1
2

D5

VCCA_MPLL

J48

VCCA_HPLL

852mA

1D05V_S0

AE1

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

C267
SC4D7U6D3V3KX-GP
2
1

1
AD1

M_VCCA_MPLL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

M_VCCA_HPLL

VTT

VCCA_DPLLB

1D05V_SM
C755

C250
SC4D7U6D3V3KX-GP
2
1

1
2

L48

PLL

M_VCCA_DPLLB

1D05V_S0

M_VCCA_MPLL
C694

68.00206.041

VCCA_DPLLA

DY

2 R447
1
0R0603-PAD

C687

FCM1608KF-1-GP
1
2
L21

1
2

2
1

UMA

M_VCCA_HPLL

68.00217.161

L6

VCCA_DAC_BG
VSSA_DAC_BG

F47

1 R421
2
0R0603-PAD

R400
0R2J-2-GP

24mA

1 R156
2
0R0603-PAD

A25
B25

M_VCCA_DPLLA

DY

C644

2nd = 68.00248.061

M_VCCA_DAC_BG

R168
0R2J-2-GP

C636
SC27P50V2JN-2-GP

1D05V_SUS_MCH_PLL2

FCM1608KF-1-GP
1
2
L22

VCCA_CRT_DAC
VCCA_CRT_DAC

1D5V_S0

1
2

DY

68.00217.161

DY

B27
A26

M_VCCA_DPLLB
C642

120ohm 100MHz

R379
0R2J-2-GP

1D8V_TXLVDS_S0

DY

480mA
R430
0R0603-PAD

8 OF 10

NB1H

UMA

R390
0R2J-2-GP

DY

C624

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

65mA

2 R399
1
0R0603-PAD

1D05V_S0

M_VCCA_DPLLA
C622

C617

UMA

65mA

UMA

1D05V_S0

2 R371
1
0R0603-PAD

C207

UMA

1 R374
2
0R0603-PADC625

5mA
1

2nd = 74.09198.Q7F

3D3V_S0_DAC

DY

SCD01U16V2KX-3GP

74.09091.J3F

UMA

UMA

SCD1U10V2KX-4GP

1
BC1

G9091-330T11U-GP
BC2

C141

NC#4

UMA

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

VOUT

3D3V_CRTDAC_S0

73mA

2 R378
1
0R0603-PAD C206

SC1U16V3ZY-GP

SC1U16V3ZY-GP

VIN
GND
EN

1D05V_S0

3D3V_S0_DAC

SC22U6D3V5MX-2GP

1
2
3

3D3V_S0_DAC

Imax = 300 mA
UMA

U13

5V_S0

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

10

of

-1
62

VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS
VSS
VSS
VSS

U24
U28
U25
U29

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

NCTF_VSS_SCB#BH48
NCTF_VSS_SCB#BH1
NCTF_VSS_SCB#A48
NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3

NC

NCTF TEST PIN:


A3,C1,A48,BH1,BH48

VSS NCTF

p.

AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

/x
/

BA16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

su

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

om
yc
//
m

tp
:

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

10 OF 10

NB1J

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

ht

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

NB1I

AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

VSS SCB

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48 NCTF_VSS_SCB#BH48
BH1 NCTF_VSS_SCB#BH1
A48 NCTF_VSS_SCB#A48
C1 NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3
A3

1
1
1
1
1

TP201
TP202
TP188
TP190
TP187

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF

71.CNTIG.00U

Title

71.CNTIG.00U

Cantiga (6 of 6)
Size
Date:

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

11

-1
of

62

C386
1
2

RTC_X1

INTVRMEN
LAN100_SLP

B22
A22

INTVRMEN
LAN100_SLP

D13
D12
E13

LAN_TXD0
LAN_TXD1
LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28
B27

GLAN_COMPI
GLAN_COMPO

AF6
AH4

HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDOUT

ACZ_SDIN3
ACZ_SDATAOUT_R

AG5

1HDA_DOCK_RST#

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16
AH16
AF17
AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

AH13
AJ13
AG14
AF14

tp
:

HDMI_EN

22
22
22
22

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

AG7
AE8

//
m

ODD

21
21
21
21

R217
10KR2J-3-GP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

RTC_AUX_S5

CPUPWRGD

AD22

IGNNE#

4
3

H_PW RGD

AF25

H_IGNNE#

AE22
AG25
L3

H_INIT# 4
H_INTR 4
KBRCIN# 34

NMI
SMI#

AF23
AF24

STPCLK#

AH27

THRMTRIP#

AG26

PECI

AG27

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

SATA_CLKN
SATA_CLKP

AH18
AJ18

SATARBIAS#
SATARBIAS

AJ7
AH7

modify by RF

R411
1
2
56R2J-4-GP

H_STPCLK# 4
H_THERMTRIP_R

TP195 TPAD14-GP

2
R410 54D9R2F-L1-GP

PM_THRMTRIP-A# 4,7,38
Layout note: R373 needs to placed
within 2" of ICH9, R379 must be
placed within 2" of R373 w/o stub

DY
C673

DY

modify by RF

CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
SATARBIAS

2
24D9R2F-L-GP

1
R194
B

Place within 500 mils of


ICH9 ball

1D05V_S0

71.ICH9M.00U

3D3V_S0

DY

RN70
SRN10KJ-5-GP

1
2
3
4

ACZ_BTCLK_MDC
ACZ_SYNC_MDC
ACZ_RST#_MDC
ACZ_SDATAOUT_MDC

8
7
6
5

ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDATAOUT_R

DY
H_INIT#

1
2
3
4

ACZ_BITCLK_AUDIO
ACZ_SYNC_AUDIO
ACZ_RST#_AUDIO
ACZ_SDATAOUT_AUDIO

SRN33J-4-GP
RN68
8
7
6
5

C FW H_INIT#

TP116 TPAD14-GP

Q14
MMBT3904-4-GP
ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDATAOUT_R

84.T3904.C11

JV71-MV DDR3 Madison

SRN33J-4-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable

Low=Disable

Title

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable

Size

Low=Disable

Date:
5

C706

DY

1D05V_S0

H_NMI 4
H_SMI# 4

DY

INTVRMEN

LAN100_SLP

C683

H_FERR# 4

SRN56J-4-GP

H_PW RGD 4,50

INIT#
INTR
RCIN#

ICH_TP8

RN71

1
2

3
4
27
27
27
27

R229
330KR2F-L-GP

330KR2F-L-GP

R265
A

ACZ_BTCLK_MDC
SC12P50V2JN-3GP
2 ACZ_BITCLK_AUDIO
SC22P50V3JN-GP

RTC_AUX_S5

H_DPRSTP# 4,7,40
H_DPSLP# 4

H_FERR#_R

H_INIT#_G
30
30
30
30

MEDIA_LED#

1
EC22DY
1
EC45DY

H_DPRSTP#

DY

H_DPRSTP#
H_PW RGD

RN37

R414
10KR2J-3-GP

FERR#

AJ26

ICH9M-GP-NF

ht

DY

AJ25
AE23

1D05V_S0

2
1

MEDIA_LED#

DPRSTP#
DPSLP#

KA20GATE 34
H_A20M# 4

R424
56R2J-4-GP

SC47P50V2JN-3GP

AE7

ACZ_SDATAIN0
ACZ_SDATAIN1

7 ACZ_SDATAOUT_R

N7
AJ27

HDA_BIT_CLK
HDA_SYNC

ACZ_RST#_R

7 ACZ_SDIN3

HDD

DY

LAN_RXD0
LAN_RXD1
LAN_RXD2

A20GATE
A20M#

/x
/

LAN_RSTSYNC

F14
G13
D14

AF4
AG4
AH3
AE5

TPAD14-GP TP197

3D3V_S0

R413
56R2J-4-GP

TP200 TPAD14-GP
TP144 TPAD14-GP

7 ACZ_RST#_R

2 GLAN_COMP
24D9R2F-L-GP
ACZ_BIT_CLK
ACZ_SYNC_R

7 ACZ_BIT_CLK
7 ACZ_SYNC_R

27 ACZ_SDATAIN0
30 ACZ_SDATAIN1

1
1

DY

R218
10KR2J-3-GP

LPC_LFRAME# 34,35
LDRQ0#
3D3V_LDRQ1_S0

1
R213

C13

yc

modify by RF

3D3V_S5

1D05V_S0

SC47P50V2JN-3GP

HDMI_EN

37

1D05V_S0

SC47P50V2JN-3GP

close to SB1

SC47P50V2JN-3GP

J3
J1

su

1TP_LAN_RSTSYNC

1D5V_S0

C381

LDRQ0#
LDRQ1#/GPIO23

p.

TPAD14-GP TP204

GLAN_CLK

LAN / GLAN
CPU

E25

GLAN_COMP place
within 500 mil of ICH9M

FWH4/LFRAME#

K3

34,35
34,35
34,35
34,35

RTCRST#
SRTCRST#
INTRUDER#

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

A25
F20
C22

K5
K4
L6
K2

RTC_RST#
SRTC_RST#
INTRUDER#

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

RTCX1
RTCX2

C23
C24

RTC
LPC

RTC_X2

IHDA

1
2

2
1

GAP-OPEN

C396
SC1U16V3ZY-GP

SC1U16V3ZY-GP

BAT-CON2-1-GP-U

3
4
2

R230
C397
1MR2J-1-GP

1 OF 6

SB1A

SC7P50V2DN-2GP

RN39
SRN20KJ-GP-U
2
1
1

G17

C385
1
2

2nd = 83.00040.M81
83.00040.E81

1
2
R228 1KR2J-1-GP

62.70001.011
2nd =

C402

RTC_BAT
1
2
NP1
NP2

PWR
GND
NP1
NP2

BAS40CW -GP

SATA

RTC_BAT_R

82.30001.661
2nd = 82.30001.B21

om

SC1U16V3ZY-GP

R215
10MR2J-L-GP

RTC_AUX_S5

RTC1

X4
X-32D768KHZ-34GPU

D12

3D3V_AUX_S5

SC7P50V2DN-2GP

Document Number

ICH9-M (1 of 4)

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

12

Rev

-1
of

62

3 OF 6

SB1C

ICH9M-GP-NF

SATACLKREQ#
TPAD14-GP TP198
TPAD14-GP TP194

71.ICH9M.00U

27
ACZ_SPKR
7 MCH_ICH_SYNC#

1ICH_TP3

TPAD14-GP TP205

GPIO49 should be pulled down to


GND only when using Teenah. When
using Cantiga, this ball should
be left as No Connect.

SPKR
MCH_SYNC#
TP3
PWM0
PWM1
PWM2

CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST0#
CL_RST1#
GPIO24/MEM_LED
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
GPIO9/WOL_EN

PWRBTN#_ICH

R3
D20

4 OF 6

R5

CLK_PWRGD

7,33

CL_CLK0 7

F22
C19

CL_DATA0 7
CL_VREF0_ICH

C25
A19
F21
D18

CL_RST#0 7

A16 ICH_GPIO24 1
C18 SUSPWRACK
C11 AC_PRESENT
ICH_GPIO91
C20

TP153 TPAD14-GP
TP206 TPAD14-GP

SPI_ICH_CS1#

D23
D24
F23
D25
E23

24
24

USB_OC#0
USB_OC#1

USB_OC#0
USB_OC#1

USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

These R need close SB


within 600 mils
24

USB_OC#9

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

USB_RBIAS_PN AG2
1
AG1
22D6R2F-L1-GP

2
R415

DMI_ZCOMP
DMI_IRCOMP

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

USB

7
7
7
7

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

DMI_IRCOMP_R
24
24
24
24
24
24
32
32
18
18

USBPN6 36
USBPP6 36
USBPN7 23
USBPP7 23
USBPN9 24
USBPP9 24
USBPN11 31
USBPP11 31

INT_PIRQD#
PCI_LOCK#

ICH9M-GP-NF

71.ICH9M.00U

1
2
3
4
5

PCI_FRAME#
R417
24D9R2F-L-GP

3D3V_S0

3D3V_S0

10
9 PCI_REQ#2
8 PCI_DEVSEL#
7 PCI_REQ#1
6 PCI_STOP#

3D3V_S0

3D3V_S5

10
9
8
7
6

USB_OC#7
USB_OC#6
USB_OC#10
USB_OC#11

3D3V_S5

SRN10KJ-L3-GP

3D3V_S5

Device

USB2

USB3

USB4

MINI1

CCD

NC

Finger Print

3D3V_S0

No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot

3D3V_S0

Blue Tooth

MIC_SEL_1

NC

ACZ_SPKR

USB1

10

NC

11

Cardreader

1
2
3
4
5

NO_iTPM
PWROK

PCI_GNT#0

34 RSMRST#_KBC

RSMRST#_SB

DY

R224
100KR2J-1-GP

2
BAT54-5-GP

3D3V_AUX_S5

SPI_CS#1

BOOT BIOS Location


B

0
1
1

1
0
1

10KR2J-3-GP

PCI_GNT#3

RSMRST#_SB

SPI
PCI
LPC(Default)

R699
10KR2J-3-GP

DY

DY

D11
3

83.BAT54.D81
2nd = 83.BAT54.X81
BOOT BIOS Strap

R701
10KR2J-3-GP

AC_PRESENT

3D3V_S0

SRN8K2J-2-GP-U

A16 swap override strap

DY

1
R405
1
R434

10
9 PCI_SERR#
8 INT_PIRQA#
7 INT_PIRQE#
6 ECSCI#_1

3D3V_S5
R702
10KR2J-3-GP

1 R222
2
1KR2F-3-GP

SRN8K2J-2-GP-U
RP2

INT_PIRQC#
INT_PIRQF#
INT_SERIRQ
PM_CLKRUN#

USB
Pair

10
9 INT_PIRQB#
8 PCI_PERR#
7 PCI_REQ#3
6 PCI_IRDY#

1
2
3
4
5

SRN8K2J-2-GP-U
RP4

1D5V_S0

AF29
AF28

USBPN0
USBPP0
USBPN1
USBPP1
USBPN2
USBPP2
USBPN3
USBPP3
USBPN4
USBPP4

1
2
3
4
5

3D3V_S0

CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3

RP5
USB_OC#4
USB_OC#9
USB_OC#5
USB_OC#8

SRN10KJ-L3-GP
RP3
PCI_TRDY#
INT_PIRQG#
PCI_REQ#0
INT_PIRQH#

T26
T25

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

3D3V_S5

SRN10KJ-6-GP

AD27
AD26
AC29
AC28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DY

1
2
3
4

DMI_CLKN
DMI_CLKP

AB27
AB26
AA29
AA28

1
EC80

10
3D3V_S5
9 DBRESET#
8 SMB_LINK_ALERT#
7 SUSPWRACK
6 SMB_ALERT#

8
7
6
5

1KR2J-1-GP

low = A16 swap override enable


high = default

C29
C28
D27
D26

PERN5
PERP5
PETN5
PETP5

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

EMI capacitor

1
2
3
4
5

3D3V_S5
RN73

USB_OC#0
USB_OC#1
USB_OC#3

R700
100KR2J-1-GP

Q43
4

RSMRST#_SB
2

E29
E28
F27
F26

PERN4
PERP4
PETN4
PETP4

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

7
7
7
7

RP1
PM_RI#
PM_BATLOW#_R
ECSWI#
PCIE_WAKE#

2 CLK_PWRGD
SC12P50V2JN-3GP

R227
453R2F-1-GP

G29
G28
H27
H26

PERN3
PERP3
PETN3
PETP3

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

VGATE_PWRGD
SC12P50V2JN-3GP

R226
3K24R2F-GP

F24
B19

J29
J28
K27
K26

Y27
Y26
W29
W28

DY

3D3V_S0

PWROK

TP148 TPAD14-GP

MINICARD1

EC81

om

1
1

7
7
7
7

yc

SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

tp
:

C369
C365

PERN2
PERP2
PETN2
PETP2

V27
V26
U29
U28

ht

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

TXN2
TXP2

L29
L28
M27
M26

LAN

PERN1
PERP1
PETN1
PETP1

N29
N28
P27
P26

PCI-Express

1
1

TXN1
TXP1

Direct Media Interface

SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

SPI

32
32
32
32

C363
C360

R6
B16 PM_SLP_M# 1

p.

1
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

//
m

SB1D
25
25
25
25

PM_PWRBTN# 34,50

3D3V_S5

7,40

su

71.ICH9M.00U

PM_DPRSLPVR

83.00016.B11 2nd = 83.00016.F11

RSMRST#_SB

D22

R220

ICH9M-GP-NF

7,33

R211 2
100R2J-2-GP
1
R212 1
2DY
100KR2J-1-GP
D8
BAS16-1-GP
1

B13 PM_BATLOW#_R

SATA
GPIO

SMB

SLP_M#
CL_CLK0
CL_CLK1

PWROK
PM_DPRSLPVR_1

100KR2J-1-GP

M7
AJ24
B21
AH20
AJ20
AJ21

CLPWROK

TP207 TPAD14-GP

G20
M2

TPAD14-GP TP196
TPAD14-GP TP122

CK_PWRGD

PM_SLP_S3# 27,33,34,38,43,45,48,51
PM_SLP_S4# 34,38,42,44
TP203 TPAD14-GP

G78

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

C10 S4_STATE#1

AG19
AH21
AG21
A21
C12
C21
PSW_CLR#
AE18
K1
1ICH9_GPIO20
AF8
1CLK_SEL1
AJ22
A9
D19
SATACLKREQ#
L1
1PCB_VER0_SB AE19
1PCB_VER1_SB AG22
MIC_SEL_1
AF21
AH24
NO_iTPM
A8

EC_TMR
ECSCI#_1
ECSWI#

34

RSMRST#

C16
E16
G17 PM_SLP_S5#
1

3
3

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

34
34

PWRBTN#
LAN_RST#

PM_SUS_CLK 33

H4
K6
F2
G2

R404

SST

BATLOW#

CLK_ICH14
CLK48_ICH

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

DY

VRMPWRGD

A20

PWROK
DPRSLPVR/GPIO16

SRN10KJ-6-GP

H1
AF3
P1

Interrupt I/F

2
SC100P50V2JN-3GP

WAKE#
SERIRQ
THRM#

D21

1
DY 2 ICH_TP7
0R2J-2-GP
R221
TPAD14-GP TP193
1FP_ID

PLT_RST1# 7,25,31,32,34,35,52
1
C388

CLKRUN#

E20
M5
AJ23

33,40 VGATE_PWRGD

PLT_RST#_R 1 R216
2
0R0402-PAD

STP_PCI#
STP_CPU#

L4

25 PCIE_WAKE#
34 INT_SERIRQ
33
THRM#

3D3V_S0

S4_STATE#/GPIO26

A14
E19

PM_STPPCI#
PM_STPCPU#

34 PM_CLKRUN#

PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

SMBALERT#/GPIO11

4
3
2
1

C409
SCD1U10V2KX-4GP
2

3
3

PCI_IRDY#

SLP_S3#
SLP_S4#
SLP_S5#

PMSYNC#/GPIO0

SMB_ALERT# A17

PCLK_ICH

PIRQA#
PIRQB#
PIRQC#
PIRQD#

M6

PM_SYNC#

CLK14
CLK48

5
6
7
8

/x
/

C14
D4
R2

SUS_STAT#/LPCPD#
SYS_RESET#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

SUSCLK

RI#

SATA0GP
SATA1GP
ICH_GPIO36
ICH_GPIO37

AH23
AF19
AE21
AD20

D8
B4
D6
A5

F19

1PM_SUS_STAT# R4
DBRESET#
G19

TPAD14-GP TP199

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SYS GPIO
Power MGT

PM_RI#

PCI_REQ#3

SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1

MISC
GPIO
Controller Link

PCI_REQ#2

PLTRST#
PCICLK
PME#

PCI_REQ#1

J5
E1
J6
C4

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

PCI_REQ#0

GAP-OPEN

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

F1
G4
B6
A7
F13
F12
E6
F6

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PCI

PCI_GNT#0 and SPI_CS1#


have weak internal Pull up

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

10KR2J-3-GP

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

G16
A13
SMB_LINK_ALERT# E17
C17
B18

15,25,32 SMB_CLK
15,25,32 SMB_DATA

Clocks

RN72
2 OF 6

SB1B

RN38
1
2

4
3

SPI_ICH_CS1# 1
R225

DY

2
1KR2J-1-GP

Q43_6

3V/5V_PWRGD

41

SB 1007

2N7002KDW-GP

SRN10KJ-5-GP

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

ICH9-M (2 of 4)

Rev

-1

JV71-MV DDR3 Madison


Date:
5

Wednesday, October 28, 2009


1

Sheet

13

of

62

1
2

1
2

1
2

1
2

1
2

1
2

1
2

2 0R2J-2-GP

3D3V_S0

1R402

2 0R2J-2-GP

1D5V_S0

1R408

2 0R2J-2-GP

3D3V_S5

1R409

2 0R2J-2-GP

1D5V_S0

DIS

32mA

2
1
1

1R403

3D3V_S5

C669

UMA

C726

UMA

32mA
C661

1
2
1

C734

3D3V_S0

1
2

C404

DY

C405

C406

VCCCL1D5V_INT_ICH

VCCCL1D05V_INT_ICH

C327

DY

C398

212mA3D3V_S5

1
2

su
2

p.
1
2

om

C738

DIS

C408
SCD1U10V2KX-4GP

DY

G23
A24
B24

1
2

1
2

/x
/

1
2

2
VCCPUSB

C730

19mA

VCCLAN3_3
VCCLAN3_3

DY

DY

A27

VCCGLANPLL

D28
D29
E26
E27

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

A26

CORE
VCCP_CORE
PCI

tp
:

ht
1mA

VCCCL3_3
VCCCL3_3

VCCSUSHDA_ICH

C407
SCD1U10V2KX-4GP

G22

1
2
SCD1U50V3KX-GP

3D3V_S0

VCCCL1_5

VCCLAN1_05
VCCLAN1_05

1
2

yc

SCD1U50V3KX-GP
2

2
1
2

1
2
1
2

1
2

VCCPSUS

1
2
1
2

1
2

1
2

1
2

//
m

1
2
1
2

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

1
2
1
2

1
2

1
2

1
A
K
1
2
A
K
1
2

VCCCL1_05

VCCHDA_ICH

AD8 VCCSUS1D5V_INT_ICH
F18

C717

SC4D7U6D3V3KX-GP

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

C374

AC8 TP_VCCSUS1D05V_ICH_1
F17

C743

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C392

DY

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

SCD1U10V2KX-4GP

VCCUSBPLL

C721

C716

SCD1U10V2KX-4GP

VCC1_5_A
VCC1_5_A
VCC1_5_A

AJ3

AF1

1D05V_S0

2mA
SCD1U10V2KX-4GP

VCC1_5_A

VCCSUS3_3

2nd = 68.1R220.10B

41mA

SCD1U10V2KX-4GP

VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A

C395

AJ4

A18
D16
D17
E22

SCD1U10V2KX-4GP

VCC1_5_A

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

C698

SCD1U10V2KX-4GP

VCCLAN_1D05V_INT_ICHA10
A11
SCD1U10V2KX-4GP
A12
B12

1D5VGLANPLL_ICH
C393

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

68.1R220.10D

DY

GLAN POWER

SC4D7U6D3V3KX-GP

C718

SCD1U10V2KX-4GP

80mA

C394

SC4D7U6D3V3KX-GP

1D5V_S0

C719

C390

23mA

1 R219
2
0R0603-PAD

AJ5
AA7
AB6
AB7
AC6
AC7

1D5V_S0

SC1U16V3ZY-GP

SCD1U10V2KX-4GP

VCCSUS1_5

USB CORE

C389

SCD1U10V2KX-4GP

19mA in S0;78mA in S3/S4/S5

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0

C682

VCCSUS1_5

C707
SC4D7U6D3V3KX-GP

DY

SCD1U10V2KX-4GP

USBPLL=11mA
C700

VCCSUS1_05
VCCSUS1_05

23mA

1D5V_S0
L9
1
2
IND-1D2UH-10-GP

C729

SCD1U10V2KX-4GP

AC12
AC13
AC14

1D5V_S0

C720

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

DY

3D3V_S0

SCD1U10V2KX-4GP

G10
G9

VCCHDA

DY

C728

3D3V_S0

SCD1U10V2KX-4GP

AC21

B9
F9
G3
G6
J2
J7
K7

C256

VCC3_3=308mA

SCD1U10V2KX-4GP

AC18
AC19

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

C391

SCD1U10V2KX-4GP

DY

AD19
AF20
AG24
AC20

C731

3D3V_S0

C677

SCD1U10V2KX-4GP

AC9

AC10

VCC3_3
VCC3_3
VCC3_3
VCC3_3

C746

2 R433
1
0R0603-PAD

C688
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

VCC3_3

VCCSUSHDA

ATX

C705
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C681

DY

AJ6

VCCSATAPLL

ARX

C689
C383

C674
SC1U16V3ZY-GP

SC1U16V3ZY-GP

C693

SC4D7U6D3V3KX-GP

C699
SCD1U16V2ZY-2GP

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

VCC3_3

1D05V_DMI_ICH_S0

SC4D7U6D3V3KX-GP

1.64A

AG29

C745

C713
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

AJ19

VCC3_3

C384

1D05V_S0

SC4D7U6D3V3KX-GP

1D5V_S0

83.R2004.B8F
2nd = 83.R0304.A8F

AB23
AC23

C735

DY

SCD1U10V2KX-4GP

R423
100R2J-2-GP

V_CPU_IO
V_CPU_IO

C744

C723
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

V5REF_S5

C261

5V_S5

D7
RB751V-40-2-GP

2mA

W23
Y23

C736

1D5V_DMIPLL_ICH_S0

SCD1U10V2KX-4GP

3D3V_S5

VCCDMI
VCCDMI

1D05V_S0

1.16A

SCD1U10V2KX-4GP

C387
SCD1U16V2ZY-2GP

Layout Note:
Place near ICH9

C241

SC1U16V3ZY-GP

C242

68.1R220.10D

2nd = 68.1R220.10B DY

83.R2004.B8F
2nd = 83.R0304.A8F

SC4D7U6D3V3KX-GP

V5REF_S0

R223
100R2J-2-GP

SC4D7U6D3V3KX-GP

D10
RB751V-40-2-GP

2mA

1D5V_APLL_S0

1L8
2
IND-1D2UH-10-GP

R29

Layout Note:Place near ICH9M

SCD1U10V2KX-4GP

DY

1D5V_S0

VCCDMIPLL

V5REF_SUS
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

SCD1U10V2KX-4GP

646mA
C733

47mA
5V_S0

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

V5REF

VCCA3GP

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

*Within a given well, 5VREF needs to be up before the


corresponding 3.3V rail

3D3V_S0

AE1

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

VCCRTC

SCD1U10V2KX-4GP

V5REF_S5

DY

SC2D2U10V3KX-1GP

C703
SCD1U10V2KX-4GP

DY DY

C724
SCD1U10V2KX-4GP

C382
SC4D7U6D3V3KX-GP

DY

C252
SC4D7U6D3V3KX-GP

C742
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C737

C413

A6

SCD1U10V2KX-4GP

A23
V5REF_S0

SCD1U10V2KX-4GP

1D5V_S0

6uA in G3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C412

6 OF 6

SB1F

RTC_AUX_S5

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

VCCGLAN3_3

Title

ICH9-M (3 of 4)

ICH9M-GP-NF

Size

71.ICH9M.00U

Document Number

Rev

JV71-MV DDR3
Madison
Sheet
14
of

Date: Wednesday, October 28, 2009


4

-1
62

/x
/
TP_A1
TP_A2
TP_B1
TP_A29
TP_A28
TP_B29
TP_AJ1
TP_AJ2
TP_AH1
TP_AJ28
TP_AJ29
TP_AH29

1
1
1
1
1
1
1
1
1
1
1
1

TP152
TP151
TP147
TP149
TP150
TP146
TP120
TP121
TP130
TP119
TP118
TP129

8
7
6
5

3D3V_S0

RN41

1
2
3
4

su
p.
om

A1
A2
B1
A29
A28
B29
AJ1
AJ2
AH1
AJ28
AJ29
AH29

3D3V_S5

yc

NCTF_VSS#A1
NCTF_VSS#A2
NCTF_VSS#B1
NCTF_VSS#A29
NCTF_VSS#A28
NCTF_VSS#B29
NCTF_VSS#AJ1
NCTF_VSS#AJ2
NCTF_VSS#AH1
NCTF_VSS#AJ28
NCTF_VSS#AJ29
NCTF_VSS#AH29

//
m

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

3D3V_S0

Q15
13,25,32 SMB_CLK

tp
:

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SMBC_ICH 3,16,17
2

2N7002KDW -GP
13,25,32 SMB_DATA

84.2N702.A3F

SMBD_ICH 3,16,17

SMBUS

ht

NCTF TEST PIN:


A1,A2,B1,A28,A29,B29
AH1,AJ1,AJ2,AH29,AJ28,AJ29

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SRN4K7J-10-GP

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

5 OF 6

SB1E

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH9-M (4 of 4)
Size

ICH9M-GP-NF

71.ICH9M.00U
Date:
A

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
E

15

of

-1
62

DDR3 SOCKET_1
DM1

1
2

1
2

1
1
2

SC2D2U6D3V3MX-1-GP

RESET#

203
204

VTT1
VTT2

C881
SCD1U16V2ZY-2GP

DDR_VREF_S3_1

VREF_CA
VREF_DQ

30

/x
/

C434

su

DY

om

p.

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

C466

TC8

DY

2nd = 77.23371.12L

C464

1
2

1
2

C458

C465

C439

DY

DY

C463

C437

C440

C442

C441

1D5V_S3

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

C433

1D5V_S3

3D3V_S0

10KR2J-3-GP
1
1
10KR2J-3-GP

77
122
125

R748 2
2
R749

DDRA_SA0
DDRA_SA1

197
201

ST330U6VDM-2-GP

C880

ODT0
ODT1

126
1

199

SC4D7U6D3V3KX-GP

7,17 DDR3_DRAMRST#

116
120

3,15,17
3,15,17

SCD1U16V2ZY-2GP

DDR_VREF_S3_1
DDR_VREF_S3_1
DDR_VREF_S3

Layout Note
Near Pin 1

C468

M_ODT0
M_ODT1

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

PM_EXTTS#0 7,17

SC4D7U6D3V3KX-GP

7
7
C879
SCD1U16V2ZY-2GP

SC10U6D3V5MX-3GP

SC2D2U6D3V3MX-1-GP

C878

12
29
47
64
137
154
171
188

SMBD_ICH
SMBC_ICH

198

SCD1U16V2ZY-2GP

DDR_VREF_S3_1

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

200
202

SC4D7U6D3V3KX-GP

8 M_A_DQS[7..0]

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

M_CLK_DDR1 7
M_CLK_DDR#1 7
M_A_DM[7..0]

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SCD1U16V2ZY-2GP

Layout Note
Near Pin 126

NC#1
NC#2
NC#/TEST

11
28
46
63
136
153
170
187

SC4D7U6D3V3KX-GP

Decoupling Capacitor

10
27
45
62
135
152
169
186

SA0
SA1

102
104

SCD1U16V2ZY-2GP

8 M_A_DQS#[7..0]

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

VDDSPD

M_CLK_DDR0 7
M_CLK_DDR#0 7

SC4D7U6D3V3KX-GP

0818 delete pull-up resistor(RN88~RN94),C400,C426

SDA
SCL
EVENT#

M_CKE0 7
M_CKE1 7

101
103

SC4D7U6D3V3KX-GP

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_CS0# 7
M_CS1# 7

73
74

SC2D2U6D3V2MX-GP

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

114
121

8 M_A_DQ[63..0]

CK1
CK1#

BA0
BA1

M_A_RAS# 8
M_A_WE# 8
M_A_CAS# 8

SCD1U16V2ZY-2GP

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

CK0
CK0#

110
113
115

109
108

CS0#
CS1#
CKE0
CKE1

NP1
NP2

M_A_BS#0
M_A_BS#1

NP1
NP2
RAS#
WE#
CAS#

yc

M_A_BS#2

8
8

TPAD14-GP TP154

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

//
m

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79

tp
:

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DY

ht

M_A_A[14..0]

NORMAL TYPE

8
4

DDR3-204P-45-GP

62.10017.P01

High 9.2mm
1

0818 add the net(DDR3_DRAMRST#)


C461
SCD1U16V2ZY-2GP

0818 modify the net(DDR_VREF_S3_1)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

DDR3 Socket

Rev

JV71-MV DDR3 Madison


Date:
A

Wednesday, October 28, 2009

Sheet
E

16

of

-1
62

DDR3 SOCKET_2
DM2

2
2

1
2

M_ODT2
M_ODT3

116
120

DDR_VREF_S3_1
DDR_VREF_S3_1

126
1
30

7,16 DDR3_DRAMRST#

ODT0
ODT1
VREF_CA
VREF_DQ
RESET#

203
204
C770
SCD1U16V2ZY-2GP

SC10U6D3V5MX-3GP

C771

DDR_VREF_S3
VTT1
VTT2

/x
/
su

DY

DY

2nd = 77.23371.12L

TC10

1
2

C422

C429

p.
C421

C428

C769

C768

C426

DY

C767

1
2

C763

C766

om

1D5V_S3

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

C400

DY

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

C399

ST330U6VDM-2-GP

7
7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

0818 add R642

SCD1U16V2ZY-2GP

C424
SCD1U16V2ZY-2GP

12
29
47
64
137
154
171
188

1D5V_S3

SC4D7U6D3V3KX-GP

SC2D2U6D3V3MX-1-GP

C423

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

DDRB_SA0
DDRB_SA1

77
122
125

SC4D7U6D3V3KX-GP

8 M_B_DQS[7..0]

197
201

10KR2J-3-GP
R750 2
1
2
1
R751
10KR2J-3-GP

SCD1U16V2ZY-2GP

DDR_VREF_S3_1

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

3D3V_S0

199

SC4D7U6D3V3KX-GP

Layout Note
Near Pin 1

10
27
45
62
135
152
169
186

0818 add the net(PM_EXTTS#0)

3,15,16
3,15,16

SCD1U16V2ZY-2GP

8 M_B_DQS#[7..0]

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

PM_EXTTS#0 7,16

SC10U6D3V5MX-3GP

C883
SCD1U16V2ZY-2GP

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

SMBD_ICH
SMBC_ICH

SCD1U16V2ZY-2GP

SC2D2U6D3V3MX-1-GP

C882

SA0
SA1

NC#1
NC#2
NC#/TEST

200
202
198

SC10U6D3V5MX-3GP

DDR_VREF_S3_1

VDDSPD

M_CLK_DDR3 7
M_CLK_DDR#3 7
M_B_DM[7..0]

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SC10U6D3V5MX-3GP

Layout Note
Near Pin 126

SDA
SCL
EVENT#

11
28
46
63
136
153
170
187

SC2D2U6D3V2MX-GP

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_CLK_DDR2 7
M_CLK_DDR#2 7

102
104

8 M_B_DQ[63..0]

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_CKE2 7
M_CKE3 7

101
103

SCD1U16V2ZY-2GP

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

BA0
BA1

M_CS2# 7
M_CS3# 7

73
74

yc

109
108

CK1
CK1#

114
121

M_B_BS#0
M_B_BS#1

CK0
CK0#

M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8

8
8

CS0#
CS1#
CKE0
CKE1

NP1
NP2
110
113
115

M_B_BS#2

NP1
NP2
RAS#
WE#
CAS#

TPAD14-GP TP157

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

//
m

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79

tp
:

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

ht

M_B_A[14..0]

NORMAL TYPE

8
4

DDR3-204P-46-GP

62.10017.P11

High 5.2mm

0818 add the net(DDR3_DRAMRST#)


0818 modify the net(DDR_VREF_S3_1)
0824 modify DM2 pin 203,204 to (DDR_VREF_S3)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDR3 Socket2
Size

Document Number

Rev

-1

JV71-MV DDR3 Madison


Date:
A

Wednesday, October 28, 2009

Sheet
E

17

of

62

LCD/INVERTER/CCD CONN
LCDVDD

3D3V_S0

LCD_EDID_CLK
LCD_EDID_DAT

BRIGHTNESS_CN
BLON_OUT_1

DCBATOUT

LCD: DCBATOUT 2 pins


LED: DCBATOUT 3 pins

F1
DCBATOUT_LCD1
C2
SC10U35V0ZY-GP

POLYSW-1D1A24V-GP

69.50007.A31
2nd = 69.50007.A41

SRN0J-7-GP
RN60

LCD_TXACLKLCD_TXACLK+
LCD_TXAOUT0LCD_TXAOUT0+

CCD_PWR
LCD_TXBCLK+
LCD_TXBCLKLCD_TXBOUT2+
LCD_TXBOUT2LCD_TXBOUT1+
LCD_TXBOUT1LCD_TXBOUT0+
LCD_TXBOUT0LCD_TXACLK+
LCD_TXACLKLCD_TXAOUT2+
LCD_TXAOUT2LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0+
LCD_TXAOUT0-

RN18

UMA
DIS

RN15

1
2
1KR2F-3-GP
R4

R3
1 33R2J-2-GP
R1
1 33R2J-2-GP

ATI_BRIGHTNESS

53

LCD_TXAOUT1LCD_TXAOUT1+
LCD_TXAOUT2LCD_TXAOUT2+

LCD_TXACLKLCD_TXACLK+
LCD_TXAOUT0LCD_TXAOUT0+

34

BLON_OUT 34

DIS

EN
GND
OUT

DIS

IN#5

8
7
6
5

GPU_TXBCLK- 53
GPU_TXBCLK+ 53
GPU_TXBOUT0- 53
GPU_TXBOUT0+ 53

need confirm with VGA co-layout

3D3V_S0

3D3V_VGA

DIS

yc

FUSE-1A6V-2-GP

69.50007.721
2nd = 69.50007.981

53
53
53
53

p.

2nd = 74.09724.09F

53
53
53
53

RN88
SRN2K2J-1-GP

UMA
RN2
SRN2K2J-1-GP

LCD_EDID_CLK
LCD_EDID_DAT

UMA

1
2

SRN0J-10-GP-U
4
3
RN1

tp
:

//
m

53 LCD_EDID_CLK
53 LCD_EDID_DAT

7 CLK_DDC_EDID
7 DAT_DDC_EDID

3D3V_S0

ht

C499

DY
2

1
2

1
SCD1U16V2ZY-2GP

GPU_TXBOUT1GPU_TXBOUT1+
GPU_TXBOUT2GPU_TXBOUT2+

om

1
2

2
2

74.05285.07F

C4D7U6D3V3KX-GP

DY

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

8
7
6
5

SRN0J-7-GP

C5

F2

MLVS0603M04-1-GP

GPU_TXACLK- 53
GPU_TXACLK+ 53
GPU_TXAOUT0- 53
GPU_TXAOUT0+ 53

IN#4

G5285T11U-GP

C3S

CCD_PWR

DY

8
7
6
5

SRN0J-7-GP

1
2
3
4

1
2
3

1
1

C7

CCD_PWR

2nd 20.F1561.002

GPU_TXAOUT1GPU_TXAOUT1+
GPU_TXAOUT2GPU_TXAOUT2+

RN58
LCD_TXBCLKLCD_TXBCLK+
LCD_TXBOUT0LCD_TXBOUT0+

SC4D7U6D3V3KX-GP

DIS

ACES-CON2-17-GP

8
7
6
5

SRN0J-7-GP

1
2
3
4

LCDVDD
2
0R2J-2-GP

R5
10KR2J-3-GP

AMIC1

GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7
GMCH_TXBOUT0- 7
GMCH_TXBOUT0+ 7

RN59

53 ATI_LCDVDD_ON

4
INT_MIC1_1 2
2
0R2J-2-GP
1
L35
3

8
7
6
5

SRN0J-7-GP
RN22

1
2
3
4

DIS

LCD_TXBOUT1LCD_TXBOUT1+
LCD_TXBOUT2LCD_TXBOUT2+

Layout 40 mil

1
R580

1
2
3
4

DIS
BRIGHTNESS

U1

INT_MIC1

1
2
3
4

L_BKLTCTL 7

3D3V_S0

27

7
7
7
7

SRN0J-7-GP

LCD_TXBCLKLCD_TXBCLK+
LCD_TXBOUT0LCD_TXBOUT0+

R2
10KR2J-3-GP

1
2

SC100P50V2JN-3GP

SC100P50V2JN-3GP

C4

UMA

C498

GMCH_TXBOUT1GMCH_TXBOUT1+
GMCH_TXBOUT2GMCH_TXBOUT2+

RN24
2

1
R6

8
7
6
5

UMA

SRN0J-7-GP

Internal Mic

1
2
3
4

UMA

BRIGHTNESS_CN

C6

GMCH_TXACLK- 7
GMCH_TXACLK+ 7
GMCH_TXAOUT0- 7
GMCH_TXAOUT0+ 7

SRN0J-7-GP

LCD_TXBOUT1LCD_TXBOUT1+
LCD_TXBOUT2LCD_TXBOUT2+

R752
1 33R2J-2-GP

DY

2nd = 20.F1557.040

BLON_OUT_1

8
7
6
5

UMA

ACES-CONN40C-4-GP

7 GMCH_LCDVDD_ON

1
2
3
4

20.F1296.040

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

/x
/

34 DBC_EN

39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
42

7
7
7
7

su

USBPP4
USBPN4

GMCH_TXAOUT1GMCH_TXAOUT1+
GMCH_TXAOUT2GMCH_TXAOUT2+

2
1

13
13

8
7
6
5

UMA

3
4

2 EC27 DY
SC22P50V2JN-4GP
2 EC26 DY
SC22P50V2JN-4GP

1
2
3
4

2
1

LCD_TXAOUT1LCD_TXAOUT1+
LCD_TXAOUT2LCD_TXAOUT2+

3
4

USBPP4

34 LCD_CB_SEL
USBPN4

C1

41
40

RN61

SCD1U16V2ZY-2GP

LCD1

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LCD CONN
Size
Date:

Document Number

Rev

JV71-MV DDR3 Madison

Wednesday, October 28, 2009

Sheet

18

of

-1
62

Close to MXM card


GMCH_RED 7
GMCH_GREEN 7
GMCH_BLUE 7

53 CRT_RED

Hsync & Vsync level shift

Ferrite bead impedance: 10 ohm@100MHz

5V_S0

CRT_R

2
FCB1608CF-GP

68.00230.021
2nd =

L4

HSYNC_1

3
4

SC100P50V2JN-3GP

C128
C115

CRT_VSYNC1

CRT_B

3
4

C93
CRT_IN#_R

DY

7
12
8
13
9
14
10
15

DAT_DDC1_5

SC18P50V2JN-1-GP

11

U18D

TSAHCT125PW -GP

om

TSAHCT125PW -GP

73.74125.L13
2nd = 73.74125.L12

69.50007.691
2nd = 69.50007.771

5V_S0

3D3V_VGA

3D3V_S0

D4
CH551H-30PT-GP

3D3V_S0

83.R5003.C8F

500mA

5V_CRT_DDC

8
7
6
5

2nd = 83.R5003.H8H

4
3

3
4
RN112
SRN2K2J-1-GP

RN20
SRN10KJ-6-GP

RN66
SRN2K2J-1-GP

UMA

1
2

2
1

1
2
3
4

DIS

CRT_IN#_R

84.2N702.A3F
DIS
53 CRT_DDCDATA
53 CRT_DDCCLK

2
1

5V_CRT_S0

2N7002KDW -GP

3
4

DAT_DDC1_5_Q

RN57
SRN0J-10-GP-U

CRT_HSYNC1

DAT_DDC1_5

UMA
U42

CRT_VSYNC1

7 GMCH_DDCDATA
7 GMCH_DDCCLK

C602

CLK_DDC1_5

1
2

4
3

CLK_DDC1_5_Q

RN53
SRN0J-10-GP-U

17

SC100P50V2JN-3GP

12

5V_CRT_S0

BAV99PT-GP-U

SCD01U16V2KX-3GP

SC18P50V2JN-1-GP

CRT_G

C105 CLK_DDC1_5

DY

CRT_HSYNC1

6
11

8
U18C

DDC_CLK & DATA level shift

p.
1

ht

CRT_R

DY

F3
FUSE-1D1A6V-4GP-U

//
m

CRT1

16

DY

tp
:

C633

5V_S0

73.74125.L13
2nd = 73.74125.L12

yc

2
BAV99PT-GP-U

CRT I/F & CONNECTOR

5V_S0

73.74125.L13
2nd = 73.74125.L12

/x
/
su

DY

SC47P50V2JN-3GP

C632

TSAHCT125PW -GP

1
CRT_B 3

DY

2
BAV99PT-GP-U

DAT_DDC1_5

D22

1
CRT_G 3

DY

1 R559
2 CRT_VSYNC1
0R0402-PAD

5V_S0

D23

14

4
3

SC47P50V2JN-3GP

D24

2nd = 73.74125.L12

U18B

14

1
2

7 GMCH_HSYNC
7 GMCH_VSYNC

5V_S0

1 R558
2 CRT_HSYNC1
0R0402-PAD

TSAHCT125PW -GP
CRT_VSYNC1_1

UMA

RN62
SRN0J-10-GP-U

5V_S0

CRT_HSYNC1_1

73.74125.L13

VSYNC_1 5

U18A
RN63
SRN0J-10-GP-U

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

CRT_R 3

C108

C151

SC3P50V2CN-1-GP

1
2

1
2

1
2

SC3P50V2CN-1-GP

DY

C165

1
2
3
4

DY

68.00230.021
2nd =

2
1

53,56 CRT_HSYNC
53,56 CRT_VSYNC

SC2D2P50V2CC-GP

DY

C109

SC2D2P50V2CC-GP

RN25
SRN150F-1-GP

C137

DIS

CRT_B

2
FCB1608CF-GP

SC2D2P50V2CC-GP

8
7
6
5

C158

SC3P50V2CN-1-GP

53 CRT_BLUE

C107
SCD1U16V2ZY-2GP

68.00230.021
L3 2nd =

14

CRT_G

2
FCB1608CF-GP

53 CRT_GREEN

13

L5

14

SRN0J-7-GP

8
7
6
5

1
2
3
4

10

RN26

UMA

Layout Note:
Place these resistors
close to the CRT-out
connector

CLK_DDC1_5

VIDEO-15-47-GP-U

20.20392.015
2nd = 20.20764.015

R93
CRT_DEC#

JV71-MV DDR3 Madison


5V_S0

470R2J-2-GP
SC100P50V2JN-3GP

C98

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

D21

1
CRT_IN#_R 3

Title

DY
2

Size

BAV99PT-GP-U
Date:
A

CRT_IN#_R

1
1

34

6
1
7
2
8
3
9
4
10
5

CRT CONN

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
E

19

of

-1
62

5V_S0
D3

2
HDMI1
RN10

CEC
DDC/CEC_GROUNG
HOT_PLUG_DETECT

13
17
19

RESERVED#14

14

TDMS_A_CLK
TDMS_A_DAT

3
4

3
2
1

TDMS_A_CLK_R
TDMS_A_DAT_R

Need confirm with VGA co-layout

5V_S0
3D3V_VGA

SRN1K5J-GP

11
10
12

TMDS_CLOCK_SHIELD
TMDS_CLOCK+
TMDS_CLOCK-

ATI_HDMI_DETECT 53

EC14

R313
10KR2J-3-GP

DIS

R314
100KR2J-1-GP

GND
GND
GND
GND

20
21
22
23
5V_S0

SKT-HDMI19P-11-GP-U2

DY DY

3
4

add D25 by NV

EC13

RN86
SRN1K5J-GP

DIS
83.00056.G11 66.15236.04L
2ND = 83.00056.Q11

Close

53 ATI_HDMI_CLK

TDMS_A_CLK

1
HDMI_A_HPD_CN

17
16

HDMI_TX1HDMI_TX1+

47
48

IN_D4IN_D4+

OUT_D4OUT_D4+

14
13

HDMI_TX2HDMI_TX2+

PC0
PC1

8
9
7

GMCH_HDMI_DATA
GMCH_HDMI_CLK
HPD

4K7R2J-2-GP
1
REXT_HDMI
PS8101_RT_EN#
PS8101_OE#
DDC_EN_PS8101

3
4

1
D

PC0
PC1

SDA
SCL
HPD

REXT
RT_EN#
OE#
DDC_EN

HPD_SINK
SDA_SINK
SCL_SINK

30
29
28

UMA
2

HDMI_A_HPD_CN
TDMS_A_DAT
TDMS_A_CLK

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PS8101-GP

UMA

UMA

3D3V_S0

R451
20KR2J-L2-GP

DY
3D3V_S0

UMA

DY

R94
4K7R2J-2-GP

1 R450
2
0R0402-PAD

PS8101_OE#

R458
1KR2J-1-GP

2
R74
499R2F-2-GP

Q37
2N7002-11-GP

UMA
DDC_EN_PS8101

HDMI_A_HPD_CN

JV71-MV DDR3 Madison

Wistron Corporation

R497
DY
100KR2J-1-GP

84.27002.W31
2ND = 84.27002.N31

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

DY

R13
100KR2J-1-GP

PS8101_RT_EN#

REXT_HDMI

DIS

2ND = 84.27002.N31

HDMI HPD control PS8101 OE#

3D3V_S0

84.27002.W31

Size
A3
Date:
5

R63
7K5R2F-1-GP

71.P8101.003

DIS

2ND = 84.27002.N31

UMA
84.27002.W31

R72
20KR2J-L2-GP

DY

Need check power use 3.3V or 5V

HDMI_DETECT_R

1
R73
1KR2J-1-GP

UMA

Q10
2N7002-11-GP

6
10
25
32

HDMI_DETECT# 7

DY

4K7R2J-2-GP
1
4K7R2J-2-GP
1

UMA

R64
20KR2J-L2-GP

R129

tp
:

UMA 2
DY 2

R695
0R2J-2-GP

Q24
2N7002-11-GP

4
3
1
2

OUT_D3OUT_D3+

IN_D3IN_D3+

1
1

DIS R79
DIS R77

35
34

44
45

1
5
12
18
24
27
31
36
37
43
49

1
1

DIS R83
DIS R80

HDMI_TXCHDMI_TXC+

R76
R75

ht

HDMI_TX2HDMI_TX2+

1
1

DIS R85
DIS R84

NC#35
NC#34

HDMI_TX0HDMI_TX0+

HDMI_TX1HDMI_TX1+

yc

20
19

Recommended Equalization: [PC1,PC0]=01, 4dB


3D3V_S0

/x
/

p.
om
NC#35
NC#34

7,53 HDMI_DATA27,53 HDMI_DATA2+

3D3V_S0

OUT_D2OUT_D2+

IN_D1IN_D1+

//
m

7,53 HDMI_DATA17,53 HDMI_DATA1+

2 HDMI_TX
2 499R2F-2-GP
499R2F-2-GP
2
2 499R2F-2-GP
499R2F-2-GP
2
2 499R2F-2-GP
499R2F-2-GP
2
2 499R2F-2-GP
499R2F-2-GP

7 GMCH_HDMI_CLK
7 GMCH_HDMI_DATA

IN_D2IN_D2+

41
42

DIS R90
DIS R86

UMA

HDMI_TXCHDMI_TXC+

7,53 HDMI_DATA07,53 HDMI_DATA0+

1
1

UMA
66.15236.04L

23
22

38
39

HDMI_TX0HDMI_TX0+

3D3V_S0

2ND =

RN14
SRN1K5J-GP

OUT_D1OUT_D1+

7,53 HDMI_CLK7,53 HDMI_CLK+

From NB

73.03306.D0B

1
1

DY

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

U8

ATI_HDMI_DAT 53

su

R96 4K7R2J-2-GP
2
R95 2
4K7R2J-2-GP

UMA

SCD1U10V2KX-4GP

HDMI_TXCHDMI_TXC+

C99

UMA

HDMI_TX2HDMI_TX2+

2
C91

3D3V_S0

2
11
15
21
26
33
40
46

From VGA on board

C82

UMA

SCD1U10V2KX-4GP

7,53 HDMI_CLK7,53 HDMI_CLK+

C77

UMA

SCD1U10V2KX-4GP

7,53 HDMI_DATA27,53 HDMI_DATA2+

HDMI_TX1HDMI_TX1+

7,53 HDMI_DATA17,53 HDMI_DATA1+

SCD1U10V2KX-4GP

HDMI_TX0HDMI_TX0+

3D3V_S0

2
2 SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2 SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2 SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2 SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

5V_S0
TDMS_A_DAT

DIS

BAV99PT-GP-U

1
DIS C5931
DIS C591
1
DIS C5871
DIS C583
1
DIS C5591
DIS C554
1
DIS C5511
DIS C546

8
7
6
5

SN74CBTD3306CPW R-GP

7,53 HDMI_DATA07,53 HDMI_DATA0+

1OE# VCC
1A
2OE#
1B
2B
GND
2A

DY

U11

1
2
3
4

D17

62.10078.171
2nd = 62.10078.121

HDMI1

SA 4.15

TMDS_DATA0_SHIELD
TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD

2
1

HDMI_A_HPD_CN

BAW 56-2-GP

66.15236.04L

DIS
1

8
5
2

TP20 TPAD14-GP

HDMI_A_CEC

SC220P50V2JN-3GP

TMDS_DATA0+
TMDS_DATA0TMDS_DATA1+
TMDS_DATA1TMDS_DATA2+
TMDS_DATA2-

SC220P50V2JN-3GP

7
9
4
6
1
3

HDMI_TXC+
HDMI_TXC-

15
16

HDMI_TX0+
HDMI_TX0HDMI_TX1+
HDMI_TX1HDMI_TX2+
HDMI_TX2-

SCL
SDA

+5V_POWER

18

HDMI CONNECTOR
Document Number

Rev

-1

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
1

20

of

62

SATA Connector

1
1

SCD01U50V2KX-1GP
2
SCD01U50V2KX-1GP
2

SATA_TXP0_C
SATA_TXN0_C

C255
C254

1
1

SCD01U50V2KX-1GP
2
SCD01U50V2KX-1GP
2

SATA_RXN0_C
SATA_RXP0_C

15
14
13
12
11
10
9
8
7
6
5
4
3
2

p.

12 SATA_RXN0
12 SATA_RXP0

C566
C565

su

12 SATA_TXP0
12 SATA_TXN0

24
NP2
22
21
20
19
18
17
16

/x
/

SKT-SATA22P-33-GP-U

om

5V_S0

yc

C577
SCD1U25V3ZY-1GP

1
NP1
23
SATA1

62.10065.551

2nd = 62.10065.471

ht

tp
:

//
m

SSM24PT-GP

TC6
SC10U10V5ZY-1GP

D19

DY

PWR TRACE 100mil

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

HDD CONN

Document Number

JV71-MV DDR3Sheet
Madison
21
of

Date: Wednesday, October 28, 2009

Rev

-1
62

ODD Connector

ODD1
8
NP1
S1
1
1

2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP

C258
C257

1
1

2 SCD01U50V2KX-1GP SATA_RXN1_C
2 SCD01U50V2KX-1GP SATA_RXP1_C
R214
DY
10KR2J-3-GP
1
2ODD_DP

5V_S0

p.

om

yc

TP145
TPAD14-GP

P1
P2
P3
P4
P5
P6
NP2
9

SKT-SATA7P+6P-46-GP

62.10065.631
2nd =

//
m

TC13
SC10U10V5ZY-1GP

SSM24PT-GP

DY

C379
SCD1U16V2ZY-2GP

D9

1ODD_MD

S2
S3
S4
S5
S6
S7

/x
/

12 SATA_RXN1
12 SATA_RXP1

SATA_TXP1_C
SATA_TXN1_C

C410
C403

su

12 SATA_TXP1
12 SATA_TXN1

ht

tp
:

JV71-MV DDR3 Madison

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ODD

Document Number

Size

Rev

JV71-MV DDR3
Madison
Sheet
22
of

Date: Wednesday, October 28, 2009


5

-1
62

3D3V_BT_S0

1
2
3

EC59 DY
SCD1U16V2ZY-2GP

OUT
GND
NC#3

IN

EN

om

2nd = 74.09711.A7F
74.05240.A7F

EC20 put near


BLUE1 / all
USB put one
choke near
connector by
EMI request

yc

BT1

USBPN7 13
USBPP7 13

//
m

4
3
2

BLUETOOTH_EN 34

G5240B1T1U-GP

C862
SC4D7U10V5ZY-3GP
2

p.

3D3V_BT_S0

su

3D3V_S0

U65

/x
/

BLUETOOTH MODULE

3D3V_BT_S0

ACES-CON4-1-GP-U2

20.D0197.104
B

ht

tp
:

2nd = 20.F0984.004

JV71-MV DDR3 Madison

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

BLUETOOTH

Document Number

Size

Rev

JV71-MV DDR3Sheet
Madison
23
of

Date: Wednesday, October 28, 2009


5

-1
62

EC50
1
2

5V_USB2_S0
5V_S5

5V_S5

USB_OC#9 13

2
3
4

USBPN0
USBPP0

//
m

SKT-USB-198-GP

3D3V_S0

SC1U16V3ZY-GP

13
13
13

USB_OC#1
USBPN1
USBPP1

DY

EC70

USB2

USBPN2
USBPP2

2
3
4
6
SKT-USB-198-GP
B

22.10218.W51

PW R_CON_BTN#_1
PW R_CON_LED#
USB_OC#1
USB_PW R_EN#

EC36
EC35
EC34
EC33

1
DY
1
DY
1
DY
1
DY

2
2
2
2

SC220P50V2JN-3GP
SC220P50V2JN-3GP
SC220P50V2JN-3GP
SC220P50V2JN-3GP

1
C871

13
USBCN1

EC60

SC1U16V3ZY-GP

SCD1U16V2ZY-2GP

34 USB_PW R_EN#

5V_S5

DY

14

12
11
10
9
8
7
6
5
4
3
2

PW R_CON_BTN#_1
PW R_CON_LED#

37 PW R_CON_BTN#_1
37 PW R_CON_LED#

EC71

MLX-CON12-18-GP

ht

C761
1

DY

tp
:

79.22710.6AL
2nd = 77.92271.021

TC31

5V_USB2_S0

13
13

22.10218.W51

G547F2P81U-GP

74.00547.A79

100 mil
1

OC#
OUT#6
OUT#7
OUT#8

2nd = 74.09711.079

yc

1
13
13

SC4D7U16V5ZY-GP

om

5V_USB2_S0

EN/EN#
IN#3
IN#2
GND

SC1000P50V3JN-GP-U

USB1

DY

C809

5V_USB1_S0

EC49

SCD1U16V2ZY-2GP

5
6
7
8

SCD1U16V2ZY-2GP

4
3
2
1

SE220U6D3VM-7GP

p.

USB_PW R_EN#

DY

EC72
1
2

U56

EC47

su

/x
/

22.10218.W51

79.22710.6AL
2nd = 77.92271.021

2nd = 74.09711.079

DY

SKT-USB-198-GP

G547F2P81U-GP

74.00547.A79

TC21

SC4D7U16V5ZY-GP

C764

100 mil

USB_OC#0 13

5
6
7
8

SC1000P50V3JN-GP-U

OC#
OUT#6
OUT#7
OUT#8

SCD1U16V2ZY-2GP

EN/EN#
IN#3
IN#2
GND

SE220U6D3VM-7GP

2
3
4

4
3
2
1

USB_PW R_EN#

USBPN9
USBPP9

SCD1U16V2ZY-2GP
5V_USB1_S0

1
13
13

DY

U47

USB3

JV71-MV DDR3 Madison

20.F1352.012

Wistron Corporation

2nd = 20.F0702.012

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

USB CONN
Size

Document Number

Rev

JV71-MV DDR3 Madison


Date:
5

W ednesday, October 28, 2009

Sheet
1

24

of

-1
62

3D3V_LAN_S5

U5
A0
A1
A2
GND

VCC
WP
SCL
SDA

8
7
6
5

EE_WP
SCLK
SO

C26
C69
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

72.24C02.R01
LAN_AVDD

3D3V_LAN_S0

REGCTL12

LAN_CLKREQ#

11

CLKREQ#

2nd = 71.05784.M03

REGCTL12

SUPER_IDDQ

1
1
2

2
1

PCIE_SDSVDD
C30
SC4D7U6D3V3KX-GP

4
2

R40
0R0603-PAD

3D3V_LAN_S5_1

2 R28
1
0R0603-PAD
C74

Q9

C27

PCIE_PLLVDD
C38
SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

2 R35
1
0R0603-PAD

2nd = 68.00248.011
68.00217.241

C71

R349 change to Bead


for Transmitter Distortion

DCP69A-13-GP
1D2V_LAN_S5

84.DCP69.01B
2nd = 84.00069.A1B
C24

16

69

BCM5784MKMLG-GP

14

1GPHY_PLLVDD
C19
SC4D7U6D3V3KX-GP

R19

FCM1608K-601T03GP

SCD1U10V2KX-4GP
2
1

RDAC

1K2R2F-1-GP

1
1

SCD1U10V2KX-4GP

C66

yc

C72

REGOUT12_IO

SC4D7U6D3V3KX-GP
C20

3D3V_LAN_S5

XTALO
XTALI

GND

LAN_CLKREQ#

2 R22
1 AVDDL_G
0R0603-PAD
C25

C35

C36
1

C68

2nd = 82.30020.851 82.30020.791

37

C49

2RDAC

18

VDDC_IO

SC4D7U6D3V3KX-GP

82.30020.851

2LAN_XI

XTAL-25MHZ-102-GP

SC15P50V2JN-2-GP
2

SC15P50V2JN-2-GP

SMB_CLK
SMB_DATA

17

SC4D7U6D3V3KX-GP

1D2V_LAN_S5

2D5V_1D2V_LAN
LAN_SMB_CLK 58
LAN_SMB_DATA57
-1
R65 1LAN_X0
200R2J-L1-GP
22
21
R23

tp
:

LAN_XO_R
X1

VAUX_PRSNT
VMAIN_PRSNT
LOW_PWR

ht

DY 1
DY 1

VAUX_PRESENT54
VMAINPRSNT 53
LOW_PWR
3

ENERGY_DET 34

R49
R44

2 R69
1
DY
0R2J-2-GP
2 0R2J-2-GP
2 0R2J-2-GP

59

C
C

LOW_PWR

ENERGY_DET

13,15,32 SMB_CLK
13,15,32 SMB_DATA

34

3
4

C73

4
3
2
1

//
m

RN13
SRN1K5J-GP
2
1

C17

2D5V_1D2V_LAN

5
6
7
8

SRN4K7J-10-GP

3D3V_LAN_S5
3D3V_LAN_S0

C61

10KR2J-3-GP
DY R52

SCD1U10V2KX-4GP

C78
SC33P50V2JN-3GP

C60

ENERGY_DET

SCD1U10V2KX-4GP
2
1

SCLK
SI
SO
CS#

TP73 TPAD14-GP

RN87
SCLK/EECLK
SI
SO/EEDATA
CS#

su

65
63
64
62

C47

SC4D7U6D3V3KX-GP
2
1

TP72 TPAD14-GP

UART_MODE1
EE_WP
GPIO0
1

p.

PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N
WAKE#
PERST#
PCIE_REFCLK_P
PCIE_REFCLK_N

9
7
4

SC4D7U6D3V3KX-GP

1
2

100R2J-2-GP

LAN_RST

3 CLK_PCIE_LAN
3 CLK_PCIE_LAN#

26
25
31
32
12
10
29
28

TP71 TPAD14-GP

13 PCIE_WAKE#

PCIE_RXDP
PCIE_RXDN

2 R78

7,13,31,32,34,35 PLT_RST1#

1 C39
1 C41

10KR2J-3-GP

DY R51

SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

PCIE_RXP1
PCIE_RXN1
PCIE_TXP1
PCIE_TXN1

GPIO2

LAN_ACT_LED# 26

SCD1U10V2KX-4GP

10M/100M/1G_LED# 26

C44

13
13
13
13

UART_MODE
GPIO_1/SERIAL_DI
GPIO_0/SERIAL_DO

3D3V_AUX_S5

3D3V_LAN_S5

2
1
67
66

GPIO_2

26
26

MDI0MDI0+

C22

Place PLLVDD/AVDDL
CKT as close to chip as
possible

/x
/

41
40

C31
SCD1U10V2KX-4GP

26
26

SCD1U10V2KX-4GP

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

PCIE_VDDL
PCIE_VDDL

MDI1MDI1+

SCD1U10V2KX-4GP

33
24

TRD0_N
TRD0_P

43
44

PCIE_SDSVDD

PCIE_PLLVDDL
PCIE_PLLVDDL

26
26

30
27

26
26

MDI2MDI2+

SCD1U10V2KX-4GP

PCIE_PLLVDD

TRD1_N
TRD1_P

MDI3MDI3+

47
46

C34

49
50

SCD1U10V2KX-4GP
2
1

TRD2_N
TRD2_P

TRD3_N
TRD3_P
GPHY_PLLVDDL

35

GPHY_PLLVDD

2 R45
1
0R0603-PAD

om

3D3V_S0

SCD1U10V2KX-4GP

C21

SCD1U10V2KX-4GP

2 R31
1
0R0603-PAD

AVDDL
AVDDL
AVDDL

2nd = 72.24C02.M01

LAN_AVDD
LAN_AVDD

48
42

2 R21
1
0R0603-PAD

1
2
3
4

BIASVDD_G

XTALVDDH

AVDDH
AVDDH
39
45
51

SCD1U10V2KX-4GP

23

XTALVDD_G

36

AT24C02BN-SH-T-GP

AVDDL_G
AVDDL_G
AVDDL_G

2 R53
1XTALVDD_G
0R0603-PAD
C48

R70
10KR2J-3-GP

C70

BIASVDDH
VDDC_IO
VDDC_IO
VDDC
VDDC
VDDC
VDDC

BIASVDD_G

C32

5
55
13
20
34
60

3D3V_LAN_S5

2D5V_1D2V_LAN

3D3V_LAN_S5

DC#38
DC#52
DC#68

1D2V_LAN_S5

TP221 TPAD14-GP
TP222 TPAD14-GP
TP223 TPAD14-GP

38
52
68

6
56
61
15
19

U3

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

C43

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2
1

C37

DC#38 1
DC#52 1
DC#68 1

2 R39
1
0R0603-PAD

SCD1U10V2KX-4GP

C59

3D3V_LAN_S5

3D3V_S5

SCD1U10V2KX-4GP
2
1

1
1

C18

SCD1U10V2KX-4GP
2
1

C45

SC4D7U6D3V3KX-GP
2
1

1D2V_LAN_S5

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

BCM5764
Size
Custom
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

Wednesday, October 28, 2009

Sheet
1

25

of

-1
62

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

LAN Connector

LAN Connector

SB 0520

GIGA Lan Transformer

RJ45

XRF_TDC1

11

RJ45_3

RJ45_1

MCT2

RJ45_2

MDI2+

3
25

MDI2-

25

MDI3+

25

MDI3-

RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PW R2

12

RJ45_4

10

MCT3

11

C16

B1(+) B2(-):YELLOW
13
15

25 LAN_ACT_LED#

Green(A3), behavior is the


same for 10/100/1000 bits

RJ45-13P-3-GP

Yellow(B2), when LAN is


transfering data.

22.10177.B51
2ND = 22.10177.B81

RJ45_5

RJ45_7

MCT4

RJ45_8

RN50

1
2

3D3V_S5

//
m

DY

A2(+) A1(-)::GREEN
A2(+) A3(-):ORANGE

om

XF2
25

CONN_PW R

CONN_PW R2
CONN_PW R

4
3

SRN470J-4-GP-U

DY

SC100P50V2JN-3GP

SC100P50V2JN-3GP

ht

EC29

EC7

68.HD081.301
2ND = 68.HD081.30B 68.68160.30B

68.HD081.30B

XFORM-271-GP

tp
:

1
2

1
2

68.HD081.301
2ND = 68.HD081.30B 68.68160.30B

68.HD081.30B

25 10M/100M/1G_LED#

p.

XFORM-271-GP

yc

1
2

MDI0-

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

MCT1

MDI0+

XRF_TDC4

C14

10

MDI1+

XRF_TDC3

DY

C12
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

RJ45_6

25

25
C11

12

25

XRF_TDC2
3

/x
/

MDI1-

su

25

LED COLOR

14
9
10
11
1
2
3
4
5
6
7
8
12

XF1

DY

8
7
6
5

MCT1
MCT2
MCT3
MCT4
RN11
SRN75J-1-GP

1
2
3
4

LAN_ACT_LED#
MCT_R

10M/100M/1G_LED#

C8
C502
SC1KP50V2KX-1GP SC1KP50V2KX-1GP

DY

C527
SC1KP2KV8KX-GP

JV71-MV DDR3 Madison

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN CONN
Size
A3
Date:
A

Document Number

Rev

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
E

26

-1
of

62

G129

DVDD_IO

1 R519
1 R516

2
2

3D3V_S0

DVDD_IO

EMI

UMA

0R3J-0-U-GP
0R3J-0-U-GP

1D5V_S0
3D3V_S0

near R549

C835
SCD1U50V3KX-GP

DIS

GAP-CLOSE

DY

C843
SC10U10V5ZY-1GP

AUD_AGND

C849

"VAUX" Pull high to enable standby mode

C855
SC10U10V5ZY-1GP

3D3V_S0

AUD_AGND

AUDIO_BEEP

4
3

AUDIP_PC_BEEP

C844

SCD1U10V2KX-4GP
RESET#

32
28
30

MIC1_VREFO_R
MIC1_VREFO_L
MIC2_VREFO

AVSS1
AVSS2
DVSS
DVSS

AUD_AGND

1DMIC_DAT
VREF

p.

34
13

44
43
LFE
CENTER

SENSE_B
SENSE_A

SPDIFO1
SPDIFI/EAPD

48
47

SIDESURR_L
SIDESURR_R

45
46

SURR_L
SURR_R

39
41

AUD_HP1_OUT_L 28
AUD_HP1_OUT_R 28

FRONT_L
FRONT_R

35
36

AUD_LINE_OUT_L 28
AUD_LINE_OUT_R 28

C828
SCD47U16V3ZY-3GP

AUD_SPDIF_OUT

29

ALC_EAPD

71.00888.D0G
DMIC_CLK 1
SPDIF_GPU 1

PM_SLP_S3# 13,33,34,38,43,45,48,51
AMP_SHUTDOW N# 34

TP211 TPAD14-GP
TP227 TPAD14-GP

MONO-OUT
1

TP216 TPAD14-GP

D32

R523
0R2J-2-GP

DY

SA 4.10

12

ALC888S-VC2-GR-GP

R524
20KR2F-L-GP

C826
SC10U10V5ZY-1GP

DY

ACZ_SDATAOUT_AUDIO
ACZ_SDATAIN0 12

2
39R2J-L-GP

AUD_SPDIF_OUT
ALC_EAPD

TP212

26
42
4
7

2
1
TPAD14-GP

C834
SC4D7U10V5ZY-3GP

AUD_AGND

SC4D7U10V5ZY-3GP

SRN2K2J-2-GP

C840

5
8

83.00056.K11

28 MAX9789A_SHDN#

AUD_AGND

MIC1V_R
MIC1V_L
MIC2V

8
7
6
5

ALC888S

Sense resistors need close codec

MIC1_L
MIC1_R
MIC2_L
MIC2_R

MIC_JD# 29

29

D34
BAW 56-3-GP

DY

MIC1-L_PORT-B
MIC1-R_PORT-B
MIC2-L_PORT-B
MIC2-R_PORT-B

2
20KR2F-L-GP

C821
C820
C823
C822

RN79

1
2
3
4

1
1
1
1

LINEIN_JD#

BAW56-3-GP

SRN75J-1-GP

2
2
2
2

2
3

SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP

tp
:

INT_MIC1_R
AUD_MIC_L
AUD_MIC_R

ht

8
7
6
5

1
2
3
4

INT_MIC1
AUD_MICIN_L
AUD_MICIN_R

18
29
29

2
10KR2F-2-GP

29

R510

21
22
16
17

RN77

SC22P50V2JN-4GP

om

LINE1_VREFO
LINE2_VREFO

LINEOUT_JD#

CD_L
CD_R
CD_GND

29
31

ALC268_SENSE

C833
1
2DY

AC97_DATIN 1
R518

2
39K2R2F-L-GP
R511

SDATA_OUT
SDATA_IN

18
20
19

LINE1_L
LINE1_R
LINE2_L
LINE2_R

yc

23
24
14
15

JDREF
PIN37_VREFO

ALC861_LINE_IN_L
ALC861_LINE_IN_R

VREF

1 C818
1 C824

27

SC4D7U10V3KX-GP 2
SC4D7U10V3KX-GP 2

LINE_IN_L
LINE_IN_R

//
m

29
29

BEEP
RESET#
SYNC
BCLK
AGPIO

DVDD
DVDD_IO
AVDD1
AVDD2

U57

GPIO0/DMIC_CLK/SPDIFO2
GPIO1/DMIC_DATA

SPKR_SB_1
2
C827

40
37

1
SCD47U16V3ZY-3GP

ACZ_SPKR

1
9
25
38

13

12
11
10
6
33

R512

2
C830

ACZ_RST#_AUDIO 12
ACZ_SYNC_AUDIO 12
ACZ_BITCLK_AUDIO 12

su

BCLK

JDREF

1
SCD47U16V3ZY-3GP

KBC_BEEP

SC22P50V2JN-4GP
1 R515
2
0R0402-PAD
1 R517
2
0R0402-PAD
1
2
C837
DY
SC22P50V2JN-4GP

DVDD_IO

34

C832
1
2DY

1
C829
SC100P50V2JN-3GP

R514
1K91R2F-1-GP

SRN47K-2-GP-U

SC1U10V3KX-3GP

1
2

AUD_AGND

/x
/

KBC_BEEP_1

C825
SCD1U10V2KX-4GP

AUD_AGND
C831
1

RN80

DY

C858
SCD1U50V3KX-GP

DY

DY

SCD1U50V3KX-GP

1
C859
SCD1U50V3KX-GP

5VA_S0

AUD_AGND

AUD_AGND

R527

83.00056.K11

2ND = 83.00056.E11 2ND = 83.00056.E11

R557
10KR2J-3-GP

3D3V_S0

JV71-MV DDR3 Madison

2
10KR2J-3-GP

DY

AUD_AGND

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Azalia codec ALC888


Document Number

Rev

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
1

27

of

-1
62

+5V_SPK_AMP

Close to U53.8

GAIN1
GAIN2

26
27

HP_INR
HP_INL

2
3

AUD_LIN_R 2
AUD_LIN_L 2

AUD_LIN_R_1 1
AUD_LIN_L_1 1

su

C801
SC4D7U10V3KX-GP

+5V_SPK_AMP

1
2

1
AUD_SPK_ENABLE#

MAX9789A_SHDN# 27

C802
SC1U6D3V2KX-GP

R526 1
2
0R0402-PAD

R504
100KR2J-1-GP

om

//
m
DY

AMP_MUTE#_R

U55
2N7002-11-GP

84.27002.W31
2ND = 84.27002.N31

G110

GAP-CLOSE
G111

Signal inverter for speaker shutdown

AGND

yc
2
1

ht

2
1

AUD_AMP_GAIN2
R475
100KR2J-1-GP

1
AGND

AGND

1
2

C805
1AUD_CPVSS

C812
SC1U10V3KX-3GP

1
R481
0R0402-PAD

74.09789.013

5V_S0

5VA_S0

AUD_BIAS
AUD_SET

MAX9789A-GP

100KR2J-1-GP

tp
:

R474
100KR2J-1-GP

DY

R483
100KR2J-1-GP

AUD_LINE_OUT_R 27
AUD_LINE_OUT_L 27

/x
/

2
2 SC1U10V3KX-3GP

DY

AUD_AMP_GAIN1

2 C788 SC1U10V3KX-4GP
2 C787 SC1U10V3KX-4GP

R478

AMP_REGEN
AMP_C1P
C799 1
AMP_C1N

AMP_MUTE#_R

R482
100KR2J-1-GP

SB 1202 -1

AUD_SPK_ENABLE#
AMP_MUTE#_R

CPVSS

23
25
22
4
10
12
29
24
1

PVSS
14

CPGND

SPKR_EN#
MUTE#
HP_EN
REGEN
C1P
C1N
VOUT
BIAS
SET

SC1U10V3KX-3GP

GAIN SETTING

1
2

Close to Pin9

4K99R2F-L-GP
R480
1
1

AGND

+5V_SPK_AMP

p.

C792
SC1U6D3V2KX-GP

C810
SC10U6D3V5MX-3GP

C811
SCD1U10V2KX-4GP

30

18

17

SPKR_INR
SPKR_INL

13

21
5

R495
2K2R2J-2-GP

11

C804
SC1U25V3KX-1-GP

C790
SC1U6D3V2KX-GP

1
31
32

C797
SC1U6D3V2KX-GP

AGND

VDD

AUD_AMP_GAIN1
AUD_AMP_GAIN2

HPVDD

HPR
HPL

CPVDD

15
16

SC1U25V3KX-1-GP
2K2R2J-2-GP
C807
R496
1
2 AUD_HP1_OUT_R1 1
2 AUD_HP1_OUT_R2
1
2 AUD_HP1_OUT_L1 1
2 AUD_HP1_OUT_L2

PVDD

SPKR_R+1
SPKR_L+1

DY

R479
10KR2F-2-GP

GND
GND

29 SPKR_R+1
29 SPKR_L+1

OUTL+
OUTLOUTROUTR+

28
33

SPKR_L+
SPKR_LSPKR_RSPKR_R+

6
7
19
20

PGND
PGND

29
29
29
29

SPKR_L+
SPKR_LSPKR_RSPKR_R+

PVDD

DY

DY

C800
SC1U6D3V2KX-GP

DY

SB 1202

U53

27 AUD_HP1_OUT_R
27 AUD_HP1_OUT_L

+5V_SPK_AMP

+5V_SPK_AMP

C793
SC1U10V3KX-3GP

1
2

1
2

60ohm 100MHz
3000mA 0.05ohm DC

C795
SCD1U10V2KX-4GP

Close to U53.18

+5V_SPK_AMP

2 R509
1
0R0603-PAD

C819
SC10U6D3V5MX-3GP

5V_S0

AGND

GAP-CLOSE
G113

GAIN1

GAIN2

GAIN

GAP-CLOSE

6dB

10dB

G112

1
1

15.6dB

21.6dB

GAP-CLOSE

JV71-MV DDR3 Madison

AGND

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AUDIO AMP
Size

Document Number

Rev

-1

JV71-MV DDR3 Madison


Date:
A

W ednesday, October 28, 2009

Sheet
E

28

of

62

Internal Speaker

LINE IN

-1

SPKR_R1

ECN99306_20090703

LINE_IN_R_CONN

3
4

LINE_IN_L_CONN

2nd 20.F1561.002

R505
R506

LIN1

DY DY

22.10265.211

DY

2
BAV99PT-GP-U

su

BAV99PT-GP-U
C

p.

LINE OUT

LINE_IN_L_CONN

5V_SPDIF_S0

MLVS0603M04-1-GP

MLVS0603M04-1-GP

L32

2nd =
22.10133.K21

MLVS0603M04-1-GP

MLVS0603M04-1-GP
B

ECN99306_20090703

L33

MLVS0603M04-1-GP

AUD_MICIN_L

AUD_MICIN_R

ht

MIC IN

L31

LOUT_R+1

LOUT1

tp
:

LOUT_L+1

3
4

RN74
DY
SRN1KJ-7-GP

SRN75J-2-GP-U

1
0R2J-2-GP

LOUT_L+1
LOUT_R+1

3
4

DY

RN75

2
1

SPKR_L+1
SPKR_R+1

5
4
3
2
1
7
6

yc

R452 2

28
28

2
1

DY

C773
SCD1U16V2ZY-2GP

DY

LINEOUT_JD#

METAL

74.05240.B7F
2nd = 74.09711.07F

27

//
m

G5240B2T1U-GP-U

C772
SCD1U16V2ZY-2GP

C
B
A

27 AUD_SPDIF_OUT
5V_SPDIF_S0

3
2
1
1

NC#3
GND
OUT

DRIVE
IC

IN

L30

LED

EN#

L29

TX

5V_S0

om

NP2
NP1

U48

ACES-CON2-17-GP

LINE_IN_R_CONN

PHONE-JK382-GP-U

LINEOUT_JD#

1
3

2nd 20.F1561.002

1
LINE_IN_L_CONN

DY

SPKR_L-

/x
/

D29

1
3

4
2

SPKR_L+

DY DY

3D3V_S0

D30
LINE_IN_R_CONN

SPKR_L1

3D3V_S0

1
3
ACES-CON2-17-GP

10KR2J-3-GP
10KR2J-3-GP

2
2

DYDY

SPKR_R-

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

1
1

SRN75J-2-GP-U

SPKR_LSPKR_L+
SPKR_RSPKR_R+

1
1
1
1

2
1

LINE_IN_R
LINE_IN_L

SPKR_LSPKR_L+
SPKR_RSPKR_R+

EC2
EC1
EC11
EC12

27
27

28
28
28
28

NP2
NP1
5
4
3
6
2
1

LINEIN_JD#_R

METAL

RN78

LINEIN_JD#

2
2
2
2

27

4
2

SPKR_R+

AUDIO-JK175-GP
G117
GAP-CLOSE
1
2

0617

L34

MLVS0603M04-1-GP

PHONE-JK387-GP

27

27 AUD_MICIN_R

MICIN1

R468
R472

1
1

27 AUD_MICIN_L

METAL

NP2
NP1
5
4
3
6
2
1

MIC_JD#

22.10265.201

JV71-MV DDR3 Madison

DYDY

3D3V_S0

10KR2J-3-GP
10KR2J-3-GP

2
2

D27

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

1
AUD_MICIN_L 3

DY

DY

2
BAV99PT-GP-U

Wistron Corporation

D26

1
AUD_MICIN_R 3

3D3V_S0

Title

AUDIO jack

BAV99PT-GP-U

Size

Document Number

Rev

-1

JV71-MV DDR3 Madison


Date:
5

W ednesday, October 28, 2009

Sheet
1

29

of

62

MDC 1.5 CONN

DIS
1
R263
1
R266

MDC1

su

1D5V_S5

DY

yc

ACZ_BTCLK_MDC 12
1

DY

DY

R262 C481

C483

C480

1 R267
2
0R0402-PAD

DUMMY-C2

TYCO-CONN12A-4-GP

20.F1074.012
2nd =

//
m

0R2J-2-GP

SCD1U10V2KX-4GP

SC22P50V2JN-4GP

om

SC33P50V2JN-3GP

ACZ_BTCLK_MDC_A

100KR2J-1-GP
2
1

DY

SC22P50V2JN-4GP
2
1

DY

SC22P50V2JN-4GP
2
1

DY

C494 C491 C490 C485

1
13
14
15

11

12

16
17
18

NC#4

SC1U16V3ZY-GP

UMA

74.09091.I3F
2nd = 74.09198.B7F

BC3

UMA

VOUT

VIN
GND
EN

1
2
3

1D5V_S5

UMA

G9091-150T11U-GP
BC4

U16

SC1U16V3ZY-GP

tp
:

3D3V_S5

ht

DY

UMA

3D3V_S5

3D3V_S5

ACZ_SYNC_A
ACZ_SDATAIN1_A
ACZ_RST#_A

2
2 39R2J-L-GP
2 39R2J-L-GP
100R2F-L1-GP-U

4
6
8
10
12
18
17
NP2

p.

3
5
7
9
11
16

39R2J-L-GP

SC4D7U10V5ZY-3GP

ACZ_SDATAOUT_A

12 ACZ_SYNC_MDC
12 ACZ_SDATAIN1
12 ACZ_RST#_MDC

1
R278
1
R2741
R2711
R270

SC22P50V2JN-4GP
2
1

12 ACZ_SDATAOUT_MDC

0R2J-2-GP
2

C482
1
2

1D5V_S5_3D3V_S5_MDC

13
1

/x
/

NP1
14
15
2

DY

C196
SC22U6D3V6KX-1GP

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

MDC

Document Number

JV71-MV DDR3Sheet
Madison
30
of

Date: Wednesday, October 28, 2009

Rev

-1
62

3D3V_D_S0

XD_CD#
SD_WP
SD_CD#
SD_DAT1/XD_D4
XD_D5/MS_BS
XD_D3/MS_D1
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
MS_INS#
SD_DAT6/XD_D7/MS_D3
SD_CLK/XD_D1/MS_CLK
SD_DAT5/XD_D0
SD_DAT4/XD_WP#
XD_R/B#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_ALE
XD_CE#
XD_CLE

3D3V_S0

1 R463
2
0R0603-PAD

CARD_3D3V_S0

DY

C785
SC1U10V3KX-3GP

33
11

D3V3
D3V3

45
36
14
2
44

MODE_SEL
SD_CMD
GPIO0
RREF
RST#

C774
SCD1U16V2ZY-2GP
MODE_SEL
SD_CMD
1VBUS_LED

TP208

R465 1
2 RREF
6K19R2F-GP
1 R455
2RST#_R
0R0402-PAD

DP
DM

RST#

3D3V_D_S0

MODE_SEL

USBPN11

DY
3D3V_D_S0

USB_11-

2 R460
1
0R0402-PAD

12M_XO

13

USB_11+

om

DY

2 R467
1
0R0402-PAD
2 R466
1
0R0402-PAD

USBPP11

C775
SC1U10V3KX-3GP

R456
13
0R0402-PAD

C779
SC47P50V2JN-3GP

2
1

R454 1RST#
2
0R0402-PAD

PLT_RST1#

7,13,25,32,34,35,52

XDAL_CTR

DY

R453
100KR2J-1-GP

30
7
3

GND
GND
GND
GND

13

5
4

NC#30
NC#7
NC#3

/x
/

3V3_IN

6
12
32
46

su

TPAD14-GP

VREG

EEDO
EEDI

DY

-1

10

24
22

15
18

C782
SCD1U16V2ZY-2GP

3D3V_D_S0

C783
SCD1U16V2ZY-2GP

2
1

C789
SC4D7U6D3V3KX-GP

3V_VBUS_S0

MS_D5
MS_D4

71.05159.00G

p.

VREG

2 R471
1
0R0603-PAD

3D3V_S0

EESK
EECS

AV_PLL

17
16

CARD_3V3

XTLO
XTLI

2 R464
1
0R0402-PAD

XTAL_CTR

AV_PLL

VREG

C784
SCD1U16V2ZY-2GP

47
48

2
1

C786
SC1U10V3KX-3GP

SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19

19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43

U51
RTS5159-GR-GP

CLK48_5158E

2 R459
1
0R0402-PAD

12M_XO

//
m

yc

CARD_3D3V_S0

DY

tp
:

C798
SCD1U16V2ZY-2GP

5 IN1 CARD-READER (SD/MMC/MS/XD/MS PRO)


C796
SC4D7U10V5ZY-3GP

SD_VCC
MS_VCC
XD_VCC

SD_DAT5/XD_D0_1
SD_CLK/XD_D1/MS_CLK
SD_DAT7/XD_D2/MS_D2_1
XD_D3/MS_D1_1
SD_DAT1/XD_D4_1
XD_D5/MS_BS_1
SD_DAT0/XD_D6/MS_D0_1
SD_DAT6/XD_D7/MS_D3_1

8
9
26
27
28
30
31
32

XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

XD_R/B#
SD_DAT2/XD_RE#_1
XD_CE#
XD_CLE
XD_ALE
SD_DAT3/XD_W E#_1
SD_DAT4/XD_W P#_1
XD_CD#

1
2
3
4
5
6
7
34

XD_R/B
XD_RE
XD_CE
XD_CLE
XD_ALE
XD_WE
XD_WP
XD_CD_SW

1 R494
2
0R0402-PAD

XD_D3/MS_D1

1 R484
2
0R0402-PAD

SD_DAT4/XD_W P#

SD_DAT0/XD_D6/MS_D0
SD_DAT1/XD_D4
SD_DAT2/XD_RE#
SD_DAT3/XD_W E#
SD_W P
SD_CD#
SD_CMD
SD_CLK/XD_D1/MS_CLK

EC51
EC55
EC52
EC57

DY
DY
DY
DY

EC54
EC53
EC58
EC56

1
1
1
1

ht

SD_DAT5/XD_D0

1 R493
2
0R0402-PAD

NP1
NP2

2
2 SC22P50V2JN-4GP
SC22P50V2JN-4GP
DY 2 SC22P50V2JN-4GP
DY 2 SC22P50V2JN-4GP

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

25
29
10
11

SD_DAT0/XD_D6/MS_D0_1
SD_DAT1/XD_D4_1
SD_DAT2/XD_RE#_1
SD_DAT3/XD_W E#_1

2
2
2
2

R486
R485
R488
R489

10R0402-PAD
10R0402-PAD
10R0402-PAD
10R0402-PAD

SD_DAT0/XD_D6/MS_D0
SD_DAT1/XD_D4
SD_DAT2/XD_RE#
SD_DAT3/XD_W E#

SD_CMD
SD_CLK
SD_CD_SW
SD_WP_SW

12
24
36
35

SD_CMD_1
SD_CLK/XD_D1/MS_CLK
SD_CD#
SD_W P

2 R490

10R0402-PAD

SD_CMD

MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3

19
20
18
16

SD_DAT0/XD_D6/MS_D0_1
XD_D3/MS_D1_1
SD_DAT7/XD_D2/MS_D2_1
SD_DAT6/XD_D7/MS_D3_1

2 R492
2 R491

10R0402-PAD
10R0402-PAD

SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3

MS_BS
MS_INS
MS_SCLK

21
17
15

XD_D5/MS_BS_1
MS_INS#
SD_CLK/XD_D1/MS_CLK

2 R487

10R0402-PAD

XD_D5/MS_BS

4IN1_GND
4IN1_GND
4IN1_GND
4IN1_GND

13
22
38
37

NP1
NP2

JV71-MV DDR3 Madison


A

Wistron Corporation

CARD-PUSH-36P-5-GP-U

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

20.I0081.011

DY
DY 2
1
1
1
1

CARD1

23
14
33

CARD_3D3V_S0

Title

2nd = 20.I0109.001

2 SCD1U25V2ZY-1GP
2 SCD1U25V2ZY-1GP
2 SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP

Cardreader RTS5159
Size

Rev

JV71-MV DDR3 Madison


Date:

Document Number

W ednesday, October 28, 2009

Sheet
1

31

of

-1
62

Mini Card Connector(WLAN)


Support debug-card
D

R29
0R0603-PAD

MINI1_PW R

10KR2J-3-GP
1
DY 2
R42

E51_RxD
E51_TxD

13
13

PCIE_RXN2
PCIE_RXP2

13 PCIE_TXN2
13 PCIE_TXP2
3D3V_S0

1 R15
2
0R0402-PAD

5V_S5

5V_S5_MIN1

PLT_RST1#_MINI1

SMB_CLK_MINI1
SMB_DATA_MINI1

W IRELESS_EN 34
PLT_RST1# 7,13,25,31,34,35,52

1 R34
2
0R0402-PAD

R26
R20

1
1DY

2
0R2J-2-GP
2
0R2J-2-GP

DY

SMB_CLK 13,15,25
SMB_DATA 13,15,25
USBPN3 13
USBPP3 13

LED_W W AN#

TP22 TPAD14-GP
W LAN_LED# 37

om

34
34

/x
/

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

su

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54

DY

C33
SC100P50V2JN-3GP

p.

4
6
8
10
12
14
16

3
5
7
9
11
13
15

3 W LAN_CLKREQ#
3 CLK_PCIE_MINI1#
3 CLK_PCIE_MINI1

R27
0R3J-0-U-GP

DY

MINI1

53
NP1
1

3D3V_S0

Mini Card Connector

3D3V_S5

3D3V_S0
1D5V_S0

SKT-MINI52P-20-GP

yc

20.F1117.052

//
m

2nd = 62.10043.391

ht

tp
:

Place near MINI1


3D3V_S0

1D5V_S0

C28
SCD1U16V2ZY-2GP

C29
SCD1U16V2ZY-2GP

1
2

1
2

C13
SC1U10V3ZY-6GP

C524
SCD1U16V2ZY-2GP

1
2

C523
SC1U10V3ZY-6GP

1
2

DY

SCD1U16V2ZY-2GP

MINI1_PW R
C542

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

MINI CARD

Document Number

Rev

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
1

32

of

-1
62

5V_S0

R338
10KR2J-3-GP

D18

EMC2102_FAN_TACH

RB551V30-GP
83.R5003.H8H

C42
SCD1U16V2ZY-2GP

C555
SC22U6D3V5MX-2GP

1
6

DN3

EMC2102_DP3

DP3

3D3V_S0
R59

DY

TRIP_SET

om
14

13

12

DY

VGATE_PW RGD 13,40

C23
1

DY
2
PW ROK 7,13

GND

3D3V_S0

VGATE_PW RGD
SC12P50V2JN-3GP

tp
:

VCC

C46

PURE_HW _SHUTDOW N#

R56
10KR2F-2-GP

ht

V_DEGREE

C40

CLK_32K

TRIP_SET Pin Voltage


V_DEGREE
=(((Degree-75)/21)
R48
2K8R2F-GP

3D3V_AUX_S5

R17
10KR2J-3-GP

D2
BAT54-7-F-GP
JV71-MV DDR3 Madison

Wistron Corporation

40,43,45
RSMRST# 34,38

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

R18
100KR2J-1-GP

(dummy, KBC already delay)

DY
2

CPUCORE_ON

DY
2

PM_SUS_CLK 13

PURE_HW _SHUTDOW N#

84.2N702.A3F
1

R30
240KR3-GP

2N7002KDW -GP
Q8

PM_SLP_S3#

CLK_32K_R

13,27,34,38,43,45,48,51

SCD1U16V2ZY-2GP

RSMRST#

SCD1U16V2KX-3GP

U2
EM2102_RESET#

73.01G08.L04
2nd = 73.7SZ08.DAH

EC82

10KR2J-3-GP

R38
10R2J-2-GP
1
2

DY
1

74LVC1G08GW -1-GP

GND = Fan is OFF


OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale

RUN_POW ER_ON

R41
2
0R2J-2-GP

SCD1U16V2ZY-2GP

R62

3D3V_S5
PW ROK

10KR2J-3-GP

SRN10KJ-5-GP

EM2102_RESET#

GND = Internal Oscillator Selected


+3.3V = External 32.768kHz Clock Selected

EMI capacitor

EMC2102_FAN_mode

15

PURE_HW _SHUTDOW N#

2
1

10KR2J-3-GP

2nd = 84.03904.P11

EMC2102_SHDN

NC#15

3D3V_S0

3
4

DY

16

THRM# 13
RN12

R66

11

NC#8

74.02102.A73
2nd = 74.07922.0B3

EMC2102-DZK-GP

RESET#

2 R37
1
0R2J-2-GP DY

EMC2102_CLK_SEL

p.

EMC2102_DN3

POWER_OK#

17

R36
8K2R2J-3-GP

23

24

22
SMDATA

SMCLK

CLK_SEL

THERMTRIP#

DP2

2nd = 20.D0246.103

25

1
2

C372 must be near EMC2102

FANb

EMC2102_DP2

SYS_SHDN#

CLK_IN

C76
SC470P50V2KX-3GP

3.HW T8 sensor

VDD_5Vb

27

CLK_32K

DN2

Layout notice : Both DN3 and DP3 routing


10 mil trace width and 10 mil spacing

DY

FANa

ALERT#

18

yc

Q11
MMBT3904-4-GP
C65
B
SC470P50V2KX-3GP

VDD_5Va

19

EMC2102

FAN_MODE

ALERT#

EMC2102_DN2

GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled

C375 must be near Q8


E

GND

DP1

2.System Sensor, Put between CPU and NB.

DN1

C373 must be near EMC2102

2nd = 84.03904.P11

84.T3904.C11

21
20

SHDN_SEL

DY

NC#21

VDD_3V

//
m

84.T3904.C11

SC470P50V2KX-3GP
C488

Q19
MMBT3904-4-GP C64
SC470P50V2KX-3GP
B

20.F0714.003

1.For CPU Sensor

C374 must be near Q7

ACES-CON3-GP-U1

83.R5003.C8F
2nd = 83.R5003.H8H

/x
/

H_THERMDA

Layout notice : Both DN2 and DP2 routing


10 mil trace width and 10 mil spacing

D20
CH551H-30PT-GP

3D3V_S0

su

Layout notice :
SC470P50V2KX-3GP
Both H_THERMDA and THERMDC routing
C63
10 mil trace width and 10 mil spacing

10

H_THERMDC

1
4

TACH

SCD1U16V2KX-3GP

28

29

U4

GND

C62

26

EMC2102_VDD_3D3

2
R68
49D9R2F-GP

*Layout* 15 mil

SMBC_Therm 34,53
SMBD_Therm 34,53

3
2

2nd = DY

DY
3D3V_S0

EMC2102_FAN_DRIVE

FAN1

EMC2102_FAN_TACH_1

1
2

C54
SC4D7U6D3V3KX-GP

10KR2J-3-GP

DY

DY

R334
5V_S0

R335 1
2
0R0402-PAD

3D3V_S0

C15
DY
SCD1U16V2ZY-2GP

Title
Size
Date:

Thermal/Fan Controllor

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet

33

of

-1
62

10KR2J-3-GP

THER_SCL
THER_SDA

R502 1
R503 1

2 0R0402-PAD
2 0R0402-PAD

SMBC_Therm 33,53
SMBD_Therm 33,53

13

ECSCI#_1

ECSCI#_KBC

SCD1U16V2ZY-2GP
2
1

SCD1U16V2ZY-2GP
2
1

SCD1U16V2ZY-2GP

F_SDI
F_SDO
F_CS0#
F_SCK

4KA20GATE
3KBRCIN#
SRN10KJ-5-GP

FIU

2
1KBC_XO_R
2

VCC_POR#

1KBC_THERMALTRIP#
2LID_CLOSE#
3LOW_PWR
4ECRST#
SRN10KJ-6-GP
33,38

BLON_IN

3D3V_S0

UMA
1
R367

2
0R2J-2-GP

1
R391
1
R392

GMCH_BL_ON

RSMRST#

Q13
B
MMBT3906-4-GP

84.T3906.A11
2nd = 84.03906.H11

7
UMA_DISCRETE# 1
R366

2 E51_TxD
10KR2J-3-GP

BLON_IN

1
R369

2
100KR2J-1-GP

1 BAT_IN#
100KR2J-1-GP

AD_OFF

2
R364

1
1KR2J-1-GP

2
10KR2J-3-GP

DIS

3D3V_S5
2

DY
3D3V_AUX_S5

2
R368

SRN10KJ-6-GP
65W_90W#

Madison-M96
1
R698

2
10KR2J-3-GP
PCB_VER0
PCB_VER1

ht
28

R373

PlanarID
(1,0)
SA: 0,0
SB: 0,1
-1: 1,0
-1M: 1,1
SB 1007

DY

DY

3D3V_AUX_S5

LID1
R397
LID_CLOSE#_1 1

LID_CLOSE#

ME268-002-GP

VDD

100R2F-L1-GP-U

GND
1

KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

OUT
3

74.00268.07B
2

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

27

R395

R372

Cover Up Switch
2nd source:20.F00984.002

KCOL1

SB 1007

R394

10KR2J-3-GP

20.K0382.026
20.K0320.026

2nd =
KB1
PTWO-CON26-4-GP

10KR2J-3-GP

UMA/M92/Park-->65W
M96/Madison -->90W

83.R0304.B8H
2ND = 83.R3004.A8E

C645
SC1U10V3KX-3GP

DIS

2 E51_RxD
10KR2J-3-GP

CH731UAPT-GP

Internal KeyBoard
Connector

ECRST#

RN64
8
7
6
5

DY

ECSWI#_KBC

85

3D3V_AUX_S5

RN65
8
7
6
5

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

WPCE773LA0DG-GP

RN67

1
2

E51_TxD 1
DBC_EN 2
SB_ID
3
Model_ID1 4

tp
:

ECSWI#

86
87
90
92

SPIDI
SPIDO
SPICS#
SPICLK

54
55
56
57
58
59
60
61

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

PS/2

10KR2J-3-GP

13

35
35
35
35

SPI_WP# 35
TP_LOCK_LED 37
BLON_OUT 18

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

KBC

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

10KR2J-3-GP

SCD1U16V2ZY-2GP
2
1

1
3D3V_S0

D6

13
12
11
10
71
72

37 BACKUP_BTN#
37 PWR_CON_LED
37 AC_IN_LED
37 PWR_CON_BTN#
36 TPDATA
36 TPCLK

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

LOW_PWR 25
ENERGY_DET 25
BT_LED
37
USB_PWR_EN# 24

//
m

71.00773.00G

5
18
45
78
89
116

103

WPCE773LA0DG-GP

1 R365
2
0R0402-PAD

UMA_DISCRETE#

VCORF

C609
SCD1U16V2ZY-2GP

2
19
46
76
88
115
VCC
VCC
VCC
VCC
VCC

102

SER/IR

65W_90W#
Model_ID1
SPI_WP_R#

PWRLED 37
STDBY_LED 37
CAP_LED 37
AD_OFF
47
RSMRST#_KBC 13
PM_SLP_S4# 13,38,42,44
CHARGE_LED 37

32KX2
GPIO55/CLKOUT

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

GPIO16
GPIO34
GPIO36

Volume_Up# 37
TP224 TPAD14-GP

63
117
31
32
118
62

13,50 PM_PWRBTN#
37
Volume_Down#
27 KBC_BEEP
13
EC_TMR
18 BRIGHTNESS

PM_SLP_S3# 13,27,33,38,43,45,48,51
KBC_PWRBTN# 37
AC_IN#
46

79
30

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

44

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

1
R507

GPIO

3G_EN
Model_ID0

KBC_XO

32KX1/32KCLKIN

10MR2J-L-GP

27 AMP_SHUTDOWN#

CRT_DEC# 19

LID_CLOSE#
SB_ID

77

VCORF

DY

S5_ENABLE

SPI

38

KBC_XI

114
14
15

37 DC_BATFULL
18 LCD_CB_SEL
41,50 S5_ENABLE

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

KBC_THERMALTRIP#

PCB_VER0
PCB_VER1

111
113
112

E51_TxD
E51_RxD

SP

GPIO66/G_PWM

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

101
105
106
107

2 OF 2

U14B

R147
KBC_XI_R 1

84
83
82
91

BLUETOOTH_EN
DBC_EN
WIRELESS_EN
WLAN_TEST_LED

32
32

SCD1U16V2ZY-2GP

80

VDD

SMB

GND
GND
GND
GND
GND
GND

23
18
32
37

NUM_LED

GPI94
GPI95
GPI96
GPI97

D/A

AGND

37

81

R152
1

10MR2J-L-GP

R151
33KR2J-3-GP

TP191 TPAD14-GP
FP_DETECT# 36

1 10KR2J-3-GP

DY

46,47 BAT_SDA
46,47 BAT_SCL

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

2 R98
X-32D768KHZ-34GPU

2nd = 82.30001.661 82.30001.B21


82.30001.661

BATTERY----->

68
67
69
70

MEDIA_INT

AD_IA
46
TP_LOCK_BTN# 37
WIRELESS_BTN# 37
BT_BTN# 37

C136
SC7P50V2DN-2GP

THER_SDA
THER_SCL

97
98
99
100
108
96

ECSWI#_KBC

THERMAL----->
5V_AUX_S5

TPAD14-GP TP215

ECSCI#_KBC

BLON_IN

LPC

104

FOR KBC DEBUG

53

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

2PCLK_KBC_RC

DY

VREF

A/D

/x
/

C630

X3

C169
SC7P50V2DN-2GP

su

SC4D7P50V2CN-1GP

R393
0R2J-2-GP

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

p.

DY

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

C610

yc

12,35 LPC_LFRAME#
12,35 LPC_LAD0
12,35 LPC_LAD1
12,35 LPC_LAD2
12,35 LPC_LAD3
13 INT_SERIRQ
13 PM_CLKRUN#
12
KBRCIN#
12
KA20GATE

C135

om

PLT_RST1#_1
PCLK_KBC

BAT_IN#
U14A
1 OF 2

C639

EC37

DY

AVCC

47

C611

2 R401
1
0R0603-PAD

3D3V_S0

GPIO41

SC27P50V2JN-2-GP

2
100R2J-2-GP
C613

C643

C646

DY

SCD1U16V2ZY-2GP

R388
1

PLT_RST1#

SC1U16V3ZY-GP

C555,C556 colse to Pin VDD

C629

SC4D7U6D3V3KX-GP
2
1

2
3D3V_AUX_S5
3D3V_AUX_S5_KBC

SC4D7U6D3V3KX-GP
2
1

1
2

DY
DY

7,13,25,31,32,35,52

C638

C626

DY

THER_SCL
THER_SDA

C615

SCD1U16V2ZY-2GP

BAT_SCL
BAT_SDA

C177
SC4D7U6D3V3KX-GP

1
2
3
4

DY

SCD1U16V2ZY-2GP

8
7
6
5

SRN4K7J-10-GP

EC43

RN23

3D3V_AUX_S5

3D3V_S0

3D3V_S0

SC4D7U6D3V3KX-GP

3D3V_AUX_S5

C627
SCD22U16V3KX-2-GP

C623
SC1U16V3ZY-GP
TP_LOCK_BTN#1

TP192TPAD14-GP

Model_ID0

TP185TPAD14-GP

TP_LOCK_LED 1

TP182TPAD14-GP

MB PIN DEFINE 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

K/B
24

Title

Size
A2
Date:
A

KBC WPC773
Document Number

Rev

-1

JV71-MV DDR3 Madison


Wednesday, October 28, 2009

Sheet

34

of

62

5
6
7
8

EC44

DY

3D3V_AUX_S5

SRN10KJ-6-GP
RN29

4
3
2
1

SCD1U16V2ZY-2GP

3D3V_AUX_S5

SPI_HOLD#
U19
ER1
1

1
2
3
4

SPI_DI
SPI_WP#

233R2J-2-GP

CS#
SO/SIO1
WP#/ACC
GND

VCC
HOLD#
SCLK
SI/SIO0

8
7
6
5

SPI_HOLD#
SPICLK
SPIDO

SPICLK
SPIDO

su

DY

//
m

yc

om

p.

16M Bits
SPI FLASH ROM

EC41

SC4D7P50V2CN-1GP

DY

EC40

72.25165.A01
2nd = 72.25X16.A01

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

MX25L1605DM2I-12G-GP

DY

EC38

34
34

/x
/

SPICS#
SPIDI
SPI_WP#

34
34
34

GOLDEN FINGER FOR DEBUG BOARD

tp
:

ht

3D3V_S0
12,34 LPC_LAD0
12,34 LPC_LAD1
12,34 LPC_LAD2
12,34 LPC_LAD3
12,34 LPC_LFRAME#
7,13,25,31,32,34,52 PLT_RST1#
3

PCLK_FWH

DB1
1
2
3
4
5
6
7
8
9
10
11
12
MLX-CON10-7-GP

JV71-MV DDR3 Madison

20.D0183.110
DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

BIOS
JV71-MV DDR3 Madison

Size

Document Number

Date: Wednesday, October 28, 2009


A

Sheet

35

of
E

Rev

-1
62

TOUCH PAD

DY EC16
D

TPCN1
14

12
11
10
9
8
7
6
5
4
3
2

RN27
34 TPDATA
34 TPCLK

TPDATA
TPCLK

1
2
SRN33J-5-GP-U

4
3

TP_DATA
TP_CLK

TP_RIGHT

TP_LEFT

/x
/

1
2
4
3

SRN10KJ-5-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY EC15

RN28

5V_S0

5V_S0

13
PTW O-CON12-3-GP-U

20.K0370.012
2nd = 20.K0315.012

12

su

T/P

DY

DY

EC84

2
1

EC83

DY

SC100P50V2JN-3GP

EC73

DY

SC100P50V2JN-3GP

EC74

DY

SC100P50V2JN-3GP

ht

EC20

DY

SC100P50V2JN-3GP

DY

SC100P50V2JN-3GP

FPCN1
13

EC19
SC100P50V2JN-3GP

R199
0R0603-PAD

EC17

DY

SC100P50V2JN-3GP

tp
:

EC18

5V_FP_S0

SC100P50V2JN-3GP

5V_S0

Finger printer

USBPP6
USBPN6
5V_FP_S0
FP_DETECT#
TP_DATA
TP_CLK
TP_LEFT
TP_RIGHT

//
m

yc

om

p.

13
13
34

USBPP6
USBPN6
FP_DETECT#

R197 1
2
R198
0R0402-PAD
2
1
0R0402-PAD

TP_LEFT
TP_RIGHT

USBPP6_1
USBPN6_1
FP_DETECT#

2
3
4
5
6
7
8
9
10
11
12

JV71-MV DDR3 Madison

14
PTW O-CON12-3-GP-U

Wistron Corporation

20.K0370.012

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

2nd = 20.K0315.012

Title

Touch PAD and FP


Size

Document Number

Rev

JV71-MV DDR3 Madison


Date:
5

W ednesday, October 28, 2009

Sheet
1

36

-1
of

62

LED

Q28
34

PW RLED

FRONT_PW RLED#_Q

R1

Q29

SRN300J-1-GP
FRONT_PW RLED#_Q 4
STDBY_LED#_Q
3
DC_BATFULL#_Q
2
CHARGE_LED#_Q
1

R2

BT_LED#_1

R1

BT_LED

DTC143ZUB-GP

84.00143.G1K
2nd = 84.00143.D1K

LED-OB-2-GP

83.19223.A70
2nd =

CHARGER_LED1

WLAN
LED
W LAN_LED1

RN81

32

84.00143.G1K 2nd = 84.00143.D1K

W LAN_LED#

W LAN_LED#_1

2W LAN_LED#_RK
75R2J-1-GP

1
R7

83.19223.A70
2nd =

DTC143ZUB-GP

BT_LED#_1

2BT_LED#_R
75R2J-1-GP

1
R14

84.00143.G1K 2nd = 84.00143.D1K

Q31

PW R_LED11
K
A

FRONT_PW RLED#_12
FRONT_PW RLED#_13

FRONT_PW RLED#_234 1R573 330R2J-3-GP


2

R1

83.00193.A70 2nd = 83.19217.G70

LED-B-98-GP

84.00143.G1K 2nd = 84.00143.D1K

83.00193.A70 2nd = 83.19217.G70

PW R_LED10
A

R2

DTC143ZUB-GP

LED-B-98-GP

84.00143.G1K 2nd = 84.00143.D1K FRONT_PW RLED#_56 1R574 330R2J-3-GP


2 FRONT_PW RLED#_10

Q35

83.00193.A70 2nd = 83.19217.G70

FRONT_PW RLED#_56 1R576 330R2J-3-GP


2 FRONT_PW RLED#_9
FRONT_PW RLED#_78 1R577 330R2J-3-GP
2 FRONT_PW RLED#_7
FRONT_PW RLED#_78 1R578 330R2J-3-GP
2 FRONT_PW RLED#_8

FRONT_PW RLED#_78

R1

PW R_LED9
K
A

R2

5V_S5

5V_S5

LED-B-98-GP

p.

FRONT_PW RLED#_56

R1

PW RLED

5V_S5

DTC143ZUB-GP
Q3
34

PW R_LED13
A

84.00143.G1K 2nd = 84.00143.D1K

12

NUM_LED

CAP_LED

RN52

RN51

1
2
3
4

DY SRN470J-3-GP

BK Button

TP Button

W IRELESS_BTN#_1

BACKUP_BTN#_1

TP_LOCK_BTN#_1

W LAN_SW 1

84.00143.G1K2nd = 84.00143.D1K

34 TP_LOCK_LED

R1
R2

5V_S5

TP_LOCK_LED# 1
R250

TP_LOCK_LED1

2TP_LOCK_LED#_R K
75R2J-1-GP

3D3V_S0

LED-Y-57-GP

LED-B-98-GP

DTC143ZUB-GP

83.00193.A70 2nd = 83.19217.G70

84.00143.G1K 2nd = 84.00143.D1K

83.01921.P70
2ND = 83.00190.S7A

Q25

34 PW R_CON_LED

R1
R2

PW R_CON_LED#

PW R_CON_LED# 24

DTC143ZUB-GP

84.00143.G1K2nd = 84.00143.D1K

BK_SW 1

Power Button

R8
10KR2J-3-GP

TP_SW 1

PW R_SW 1

KBC_PW RBTN#_1

5
3

5
3

5
3

SW -TACT-5P-1-GP

SW -TACT-5P-1-GP

SW -TACT-5P-1-GP

SW -TACT-5P-1-GP

62.40009.A61
2nd = 62.40009.B21

62.40009.A61
2nd = 62.40009.B21

62.40009.A61
2nd = 62.40009.B21

62.40009.A61
2nd = 62.40009.B21

62.40009.A61
2nd = 62.40009.B21

5
3

SW -TACT-5P-1-GP

JV71-MV DDR3 Madison

R9
470R2J-2-GP
G1
GAP-OPEN

KBC_PW RBTN# 34

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

EC3
SC1KP50V2KX-1GP

Title

DY
Size
Date:

5V_S0

83.00193.A70
2nd = 83.19217.G70

Q16

5
4

A
LED-B-98-GP

BT_SW 1

CAP_LED#

3D3V_AUX_S5

WLAN Button

CAP_LED1

K
SRN100J-3-GP

SRN10KJ-6-GP

BLT_BTN#_1

83.00193.A70
2nd = 83.19217.G70

EC42

DY

BT Button
A

5V_S0

LED-B-98-GP

4NUM_LED#_R
3CAP_LED#_R

1
2

DTC143ZUB-GP

5V_S5

EC4

SRN470J-3-GP
SRN10KJ-6-GP
RN6
RN5
8 BLT_BTN#_1
1
8
W
IRELESS_BTN#_1
7
2
7
6 BACKUP_BTN#_1 3
6
5 TP_LOCK_BTN#_1 4
5

NUM_LED1
A

DY

8
7
6
5

RN8

R1

EC5

SCD1U16V2ZY-2GP
2
1

DY

SCD1U16V2ZY-2GP
2
1

SCD1U16V2ZY-2GP
2
1

EC6

SCD1U16V2ZY-2GP
2
1

1
2
3
4

34
BT_BTN#
34 W IRELESS_BTN#
34 BACKUP_BTN#
34 TP_LOCK_BTN#

Volume_Up#_1
Volume_Down#_1

1
2
3
4

5V_S0

ht

34 PW R_CON_BTN#
34
Volume_Up#
34
Volume_Down#

8
7
6
5

R2

tp
:

3D3V_S0

NUM_LED#

84.00143.G1K
2nd = 84.00143.D1K

//
m

24 PW R_CON_BTN#_1

MEDIA_LED1
A

83.00193.A70
2nd = 83.19217.G70

DTC143ZUB-GP

83.00193.A70 2nd = 83.19217.G70

R1
R2

34

MEDIA_LED#_R K

Q6

LED-B-98-GP
PW R_LED8
K
A

2 R12
1
100R2J-2-GP

MEDIA_LED#

LED-B-98-GP

yc

PW R_LED7
K
A

84.27002.W31
2nd = 84.27002.N31

Q7

83.00193.A70 2nd = 83.19217.G70

DTC143ZUB-GP

34

BT LED

34 W LAN_TEST_LED

5V_S5

LED-B-98-GP

R2

PW R_LED12
A

su

83.00193.A70 2nd = 83.19217.G70

FRONT_PW RLED#_234

5V_S0

FRONT_PW RLED#_11

/x
/

FRONT_PW RLED#_234 1R571 330R2J-3-GP


2

84.00143.G1K 2nd = 84.00143.D1K FRONT_PW RLED#_234 1R572 330R2J-3-GP


2

Q2
AC_IN_LED

Q1
2N7002-11-GP

LED-B-98-GP

DTC143ZUB-GP

34

5V_S5

R2

3GBT_LED1
A

83.00193.A70
2nd = 83.19217.G70

R1

CHARGE_LED

LED-B-98-GP

CHARGE_LED#_Q

om

34

3D3V_S0

LED-Y-57-GP

LED-OB-2-GP

R2

83.01921.P70
2ND = 83.00190.S7A

Charger LED

DC_BATFULL#_Q

R560 2
1
33R2J-2-GP

Q30
R1

5V_AUX_S5

DC_BATFULL#_R
CHARGE_LED#_R

DTC143ZUB-GP

Q4

5V_S5

Power LED

5
6
7
8

R2

34 DC_BATFULL

34

STDBY_LED#_Q

R1

STDBY_LED

84.00143.G1K 2nd = 84.00143.D1K

34

3
FRONT_PW RLED#_R
STDBY_LED#_R

R2

DTC143ZUB-GP

PW R_LED1

LED&POWERBD CONN

Document Number

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

37

Rev

-1
of

62

Run Power
5V_S5

5V_S0

DY

C865
1
Q32
NDS0610-NL-GP

Z_12V_D4

Q33

Z_12V_D3

Z_12V_D3

Q34
2N7002-11-GP

D33
PDZ9D1B-GP

3D3V_S0

3D3V_S5

83.9R103.C3F
2nd = 83.9R103.F3F

1
2
3
4

U60
S
S
S
G

D
D
D
D

8
7
6
5

AO4468-GP

84.04468.037
2nd =

1D5V_S0

1D5V_S3

1
2
3
4

U26
S
S
S
G

D
D
D
D

8
7
6
5

AO4468-GP

p.

2N7002KDW -GP

R534

/x
/

G
1

1
D

3D3V_runpwr 2

R548
100KR2J-1-GP

C864

330KR2J-L1-GP

10KR2J-3-GP

330KR2J-L1-GP

DY

DY

Z_12V_G3

2nd = 84.00610.C31

SCD22U25V3KX-GP

R533

84.S0610.B31

R530
100R5J-3-GP

AO4468-GP

10KR2J-3-GP
R547
1

8
7
6
5

84.04468.037
2nd =

su

3D3V_S0

Z_12V

D
D
D
D

SCD1U25V3KX-GP
RUN_POW ER_ON

R549
1

DCBATOUT

1
2
3
4

U28
S
S
S
G

84.2N702.A3F

om

84.04468.037
2nd =

VCC

R753 12K1R2F-L1-GP

GND

PM_SLP_S4# 13,34,42,44

74LVC1G08GW -1-GP
R754
10KR2J-3-GP

3D3V_S5
U72
D

AO3400-1-GP-U

M96

84.03400.A37

R865

3D3V_M92_ON

M96
C1131
SC6800P25V2KX-1GP

2MR2F-GP

tp
:

73.01G08.L04

M96

3D3V_VGA

SM_PW ROK_R

1D5V_PW RGD 42

//
m

SM_PW ROK

3D3V_S5 U68

PM_SLP_S3#

yc

13,27,33,34,43,45,48,51

1D05V_S0

SB1019

R258
2K2R2J-2-GP

ht

1D05V_S0

R755

R257
56R2J-4-GP

DY
B

C472
SCD1U25V3KX-GP

DY

DY

PD 1019
PLT_RST1#_B

R901
9K1R2F-1-GP

C471
1

PM_THRMTRIP-A# 4,7,12

R256
20KR2F-L-GP

2
1
0R5J-5-GP

3D3V_S0

Madison-Park

PLT_RST1#

,25,31,32,34,35

3D3V_VGA

DY

2
SCD1U16V2ZY-2GP

KBC_THERMALTRIP# 34

Q17

Q18
MMBT2222A-3-GP

MMBT3904-3-GP

84.02222.V11
2nd = 84.02222.R11
JV71-MV DDR3 Madison

SB 1014

Wistron Corporation

83.00016.B11
3
41

3V/5V_EN

BAS16-1-GP
D13

2nd = 83.00016.F11

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

RSMRST# 33,34
Title
Size

RUN POWER and 3D3V_AUX_S5


Document Number

Rev

-1

JV71-MV DDR3 Madison


Date:

W ednesday, October 28, 2009

Sheet

38

of

62

CPU_CORE
ISL6266A

VID1
VID2
VID3
VID4
VID5
VID6

VID Setting

Output Signal

VID0(I / 3.3V)

PGOOD

Input Power
VGATE_PWRGD

DCBATOUT_62392

VID2(I / 3.3V)

VIN

5V(O)

Input Signal

S5_ENABLE

VID3(I / 3.3V)
VID4(I / 3.3V)

VCC_CORE_PWR(O)

3D3V(O)

EN0

Output Power
VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V

Output Signal
PGOOD

3D3V(O)

VIN

VCC(I)

PM_SLP_S3#
GFXVR_EN

TPS51124
1D5V/1D05V

PM_SLP_S4#
PM_SLP_S3#
A

VDD
VCC
Input Signal

S3

1D5V (O)

1D05V(O)

1D5V_S3 (12A)

VSS_AXG_SENSE

RT8202A
DCBATOUT_8202_VGA

VGFXCORE (O)

AD_OFF

VIN

VGA_CORE
VOUT(O)

VGA_CORE (13A)

VCC_GFXCORE(7A)
3D3V_S0

EN

NVVDD_PGOOD

PGOOD

Input Signal

Charger ISL88731A
Output Signal

Voltage Sense

Input Power

Output Power

ACN

Output Signal
(O)

BT+

VOUT (O)

AD+

Adapter

(I)

AD_IA

SRSET

RGND(I / Vcore)

Input Signal

AC_IN#

ACGOOD#

VSEN(I / Vcore)

1D05V_S0 (9A)

EN1

DDR_VREF_S3_1

VTTREF

VR_ON

tp
:

DCBATOUT_51124

Output Power

ht

5V_S5

VCC_AXG_SENSE

DDR_VREF_S3 (1.2A)

VTT

CPUCORE_ON

Output Power

yc

VDD

DCBATOUT

VCC(I)

Input Power

VLDOIN

su

om

VID4(I / 3.3V)
Input Power

DDR_VREF_S3

VIN

1D5V_S3

3D3V_AUX_S5

//
m

3D3V_S0

5V_S5

p.

VID3(I / 3.3V)

5V_S0

VCC(I)

PGOOD

VID2(I / 3.3V)

VID3

RGND(I / Vcore)

Output Signal

VID1(I / 3.3V)

VID2

VSEN(I / Vcore)

3D3V_S5 (7A)

S5

VID0(I / 3.3V)

VID1

CPUCORE_ON

PGOOD

RT9026

VID Setting

VID0

EN (I / 3.3V)

1D1V_S0 (2A)

1D1V(O)

EN

PM_SLP_S4#

Input Power

5V_S0

NVVDD_PGOOD

GFX_CORE
ISL6263A

VID6(I / 3.3V)

VID4

DCBATOUT_6266A

5V_S5 (6A)

5V_AUX_S5

5V(O)

VID5(I / 3.3V)

Voltage Sense

VSS_SENSE

VIN

VID1(I / 3.3V)

VCC_SENSE

1D5V_S3

1D1V_S0

Output Power

Input Signal
CPUCORE_ON

RT9018A

/x
/

VID0

ISL62392
5V/3D3V

DCBATOUT

VOUT (O)

AD_IN#
JV71-MV DDR3 Madison

EN2

Wistron Corporation
CPUCORE_ON

Input Power

Output Signal

AD_JK

PGOOD1
PGOOD2

5V_AUX_S5

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Output Power

VCC(I)

VCC(O)

AD+

Title

Power Sequence Logic


Size
B

VCC(I)

Document Number

Date: Wednesday, October 28, 2009


5

Rev

JV71-MV DDR3 Madison


Sheet
1

39

of

-1
62

6266A_UGATE2

BOOT2

26

6266A_BOOT2 2

1
10R3F-GP

tp
:

1
2

2
1
L17

VCC_CORE

68.R3610.20C
2nd = 68.R3610.20A
1

5
6
7
8

65

TC4

65

84.07672.037

G53
GAP-CLOSE

2nd = 84.57N03.A37
Id=19.5A
Qg=21.5~33nC,
Rdson=5.5~6.7mohm

U38

4
3
2
1

5
6
7
8
U7

C576
SC1U25V3KX-1-GP

4
3
2
1

C567
SCD1U50V3KX-GP

1
2
IND-D36UH-9-GP

6266A_LGATE2

SCD01U25V2KX-3GP

2
1
1
2

84.07672.037
2nd = 84.57N03.A37

6266A_PHASE2

C557
SCD01U25V2KX-3GP

2
1

5
6
7
8
4
3
2
1

5
6
7
8

6266A_UGATE2
SCD22U10V2KX-1GP

5V_S0

1 R345
2
10R2F-L-GP

C597

Cyntec 10*10*4
DCR=1.05+-5%mohm, Irating=30A
Isat=60A

SCD22U10V2KX-1GP
2

C5941

C574

5
6
7
8

84.08692.037
2nd = 84.11903.C37

4
3
2
1

24

26266A_VO

R351

SCD33U10V3KX-3GP
2

C590

4
3
2
1

5
6
7
8

ISEN1

ISEN2

VDD

6266A_ISEN223

6266A_VDD 22

21

//
m

GND

VSUM

VO

DFB

VIN
6266A_VIN 20

6266A_ISEN1 C5951

Id=35A
Qg=17~26nC
Rdson=11~14mohm

DY C588

G54
GAP-CLOSE

TC5
SE330U2VDM-L-GP

ht

65

C604

SE330U2VDM-L-GP

U39
FDMS8692-GP

S
S
S
G

16266A_BOOT2_R

1R2J-GP

25

D
D
D
D

DCBATOUT_6266A
C544
SCD22U25V3KX-GP

S
S
S
G

SC330P50V2KX-3GP

R339

6266A_PHASE2

27

28

PHASE2

6266A_ISEN2_P1_VCORE

FDMS7672-GP

2 9K09R2F-GP

FDMS7672-GP

2 1R2F-GP

1 R358

D
D
D
D

SC180P50V2JN-1GP

6266A_DFB 17
1KR2F-3-GP
2
1
18
6266A_VO
6266A_VSUM 19

16266A_DROOP
16

RTN

VSEN
6266A_VSEN14

6266A_RTN 15

VDIFF
6266A_VDIFF13

1 R356

6266A_ISEN2

SC4D7U25V5KX-GP

6266A_VO

79.33719.L01
2nd = 77.C3371.051

SC2D2U16V3KX-GP

UGATE2

DCBATOUT

C584

C564
SC330P50V2KX-3GP

2 10KR2F-2-GP

SC4D7U25V5KX-GP

R344

1 R359

29

p.

PGND2

6266A_LGATE2

6266A_ISEN1

79.33719.L01
2nd = 77.C3371.051

6266A_ISEN1_P1_VCORE

30

2 3K65R2F-1-GP

C541

TC3

LGATE2

1 R357

5V_S0

6266A_VSUM

S
S
S
G

3K16R2F-GP

C556

R354

31

su

PVCC

NC#25

R346

1 R353
2
0R0402-PAD

6266A_ LGATE1

TC2

79.33719.L01
2nd = 77.C3371.051

SC4D7U25V5KX-GP

FB2

1
2
1KR2F-3-GP

VSS_SENSE

32

G52
GAP-CLOSE

C535
SCD22U25V3KX-GP

yc

FB

1 R352
2
0R0402-PAD

33

G51
GAP-CLOSE

2
1R2J-GP 6266A_BOOT1_R
1

om

COMP

74.06266.073

VCC_SENSE

PGND1
LGATE1

65

D
D
D
D

C585

/x
/

VID0

VID1

VID2

VID3

VID4

NTC

R341
1KR2F-3-GP
ISL6266AHRZ-GP

1 R343
2 6266A_FB2_R 1
2
100R2F-L1-GP-U
SC2200P50V2KX-2GP

4
3
2
1

R325

R324

2
6266A_D0

37

R322

R323

2
6266A_D1

38

2
6266A_D2

39

R321

2
6266A_D3

40

R320

2
6266A_D4

41

R319

2
6266A_D5

42

VR_TT#

SC270P50V2KX-1GP

VID5

6266A_PHASE1

65

TC1

34

C549

VR_ON

PHASE1

DROOP

11

6266A_FB2 12

H_VID6
1
0R0402-PAD
H_VID5
1
0R0402-PAD
H_VID4
1
0R0402-PAD
H_VID3
1
0R0402-PAD
H_VID2
1
0R0402-PAD
H_VID1
1
0R0402-PAD
H_VID0
1
0R0402-PAD
6266A_D6

43

2
6266A_VR_ON

44

1
R317 0R0402-PAD
2
1
R318
499R2F-2-GP
2
6266A_DPRSLPVR

PMON

6266A_FB

1 R340
2 6266A_COMP_R
97K6R2F-GP

DPRSLPVR

47
CLK_EN#

DPRSTP#

48

49
GND

2
1
2

6266A_UGATE1

6266A_ LGATE1

U36

SE330U2VDM-L-GP

35

U6

VCC_CORE

SE330U2VDM-L-GP

36

UGATE1

RBIAS

C531
SCD1U50V3KX-GP

SE330U2VDM-L-GP

6266A_COMP
10

SC100P50V2JN-3GP

BOOT1

PSI#

PGOOD

C543 1
26266A_SOFT 7
SCD015U50V3KX-GP SOFT
1 R336
26266A_OCSET 8 OCSET
10K5R2F-GP
6266A_VW 9
VW

R337 1
2
10K5R2F-GP

C550

6266A_NTC 6

R327
6266A_BOOT1 1

84.07672.037
2nd = 84.57N03.A37

S
S
S
G

R331 2
1 R311
2 6266A_NTC_R 1
NTC-470K-8-GP
4K02R2F-GP
C540
Close to Phase 1 choke
1
2
6266A_VO
and on the same layer
SCD01U25V2KX-3GP
C545 1
2SC1000P50V3JN-GP-U

Id=19.5A
Qg=21.5~33nC,
Rdson=5.5~6.7mohm

D
D
D
D

H_PSI#

C529

68.R3610.20C
= 68.R3610.20A

L11
2nd
1
2
IND-D36UH-9-GP

6266A_PHASE1

FDMS7672-GP

4 CPU_PROCHOT#_R

84.07672.037
2nd = 84.57N03.A37

S
S
S
G

1 R328
26266A_PSI# 2
0R0402-PAD
C5341
2 6266A_PMON_R 1 R330
2 6266A_PMON
3
4K99R2F-L-GP
SCD1U25V3KX-GP
1
26266A_RBIAS4
R332
147KR2F-GP
5
4

13,33 VGATE_PW RGD

C530

Cyntec 10*10*4
DCR=1.05+-5%mohm, Irating=30A
Isat=60A

6266A_UGATE1

FDMS7672-GP

R329
68R2-GP

Id=35A
Qg=17~26nC
Rdson=11~14mohm

65

U37
R326
1K91R2F-1-GP

1D05V_S0

U35
FDMS8692-GP

D
D
D
D

3D3V_S0

6266A_DPRSTP# 2

79.10712.L02
2ND = 79.10112.3JL

45

C532

GAP-CLOSE-PW R-3-GP

46

R315
2

1
SCD1U10V2KX-4GP
6266A_3V3

GAP-CLOSE-PW R-3-GP

3V3

1
2

SE100U25VM-L1-GP

GAP-CLOSE-PW R-3-GP
G43

DY C528

84.08692.037
2nd = 84.11903.C37

S
S
S
G

SC4D7U25V5KX-GP

GAP-CLOSE-PW R-3-GP
G45
TC11
2
1

H_VID[6..0]

D
D
D
D

GAP-CLOSE-PW R-3-GP
G44

SC4D7U25V5KX-GP

10R3F-GP
1

GAP-CLOSE-PW R-3-GP
G47

SC4D7U25V5KX-GP

Vcc_core
Iomax=38A

33,43,45

R316
0R0402-PAD

1
3D3V_S0

GAP-CLOSE-PW R-3-GP
G46

DCBATOUT_6266A
CPUCORE_ON

VID6

2
GAP-CLOSE-PW R-3-GP
G48

4,7,12 H_DPRSTP#

G49

DCBATOUT

PM_DPRSLPVR 7,13

DCBATOUT_6266A

G50

DCBATOUT

DCBATOUT_6266A

79.33719.L01
2nd = 77.C3371.051
79.33719.L01
2nd = 77.C3371.051

R333

0R0402-PAD

6266A_VSUM

1 R360

2 3K65R2F-1-GP

6266A_ISEN2

1 R361

2 10KR2F-2-GP

6266A_VO

1 R363

2 1R2F-GP

6266A_ISEN1

1 R362

2 10KR2F-2-GP

6266A_ISEN2_P2_VCORE

6266A_VSUM

6266A_ISEN1_P2_VCORE
JV71-MV DDR3 Madison

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
6266A_VSUM_R_VO
R310
NTC-10K-26-GP

20081009

Title

Close to Phase 1 choke


and on the same layer

ISL6266A_CPU_CORE
Size
A3
Date:

R342
11KR2F-L-GP

1
2

R355
2K61R2F-1-GP

6266A_VO

C586
SCD1U25V3KX-GP

SCD22U50V3ZY-1GP
2

C575

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

40

-1
of

62

GAP-CLOSE-PW R-3-GP
G119

GAP-CLOSE-PW R-3-GP
G120

38

3V/5V_EN

G125
2KR2F-3-GP

GAP-CLOSE-PW R-3-GP
G126
2
1

R5451 0R2J-2-GP
2 3V/5V_EN2

GAP-CLOSE-PW R-3-GP
G139

GAP-CLOSE-PW R-3-GP

GAP-CLOSE-PW R-3-GP
G127
2
1

R541
100KR2J-1-GP

GAP-CLOSE-PW R-3-GP
G128
2
1

GAP-CLOSE-PW R-3-GP

GAP-CLOSE-PW R-3-GP
G130
2
1

GAP-CLOSE-PW R-3-GP
G123

DCBATOUT_62392_3D3V

DCBATOUT_62392_3D3V

DCBATOUT_62392_5V
GAP-CLOSE-PW R-3-GP
G131
2
1

11
24
5
3
6
2

1
2

2
5
6
7
8
D
D
D
D
G
S
S
S

4
3
2
1

1
2

Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm

D
D
D
D

SC4700P50V2KX-1GP

84.04812.A37
2nd = 84.06690.E37

TC29

77.C2271.00L
2nd = 77.22271.27L

ISL62392HRTZ-T-GP

C866
SC2200P50V2KX-2GP

74.62392.073

62392_FCCM
62392_FSET1
62392_FSET2

65
G
S
S
S

3V/5V_EN1
3V/5V_EN2

C839

C860
1
2

1 R525
2
36K5R2F-GP

R537
68K1R2F-1-GP

SB 1007
3V/5V_PW RGD 13

1 R542
2
0R2J-2-GP

DY

62392_VCC

SB 1202 1222

C869
SC1U25V3KX-1-GP

62392_FB1_R

PGND

R529

PVCC
VCC

EN1
EN2
LDO3EN
FCCM
FSET1
FSET2

yc

68.3R310.20A
2nd = 68.3R31A.10V

5
6
7
8

p.
62392_FB2

4
3
2
1

VIN

om
28

PGOOD

GND

18
4

su

17

FB2

5V_PW R

L27
1
2
IND-3D3UH-57GP

R536
750R2F-GP

R552
0R0402-PAD

25
26
27

U58

Iomax=7A
OCP>10.5A

Cyntec 7*7*3
DCR=30mohm, Irating=6A
Isat=13.5A

tp
:

ht

C842
SC4D7U10V3KX-GP

1
2

R535
9K09R2F-GP

1
R543
24K3R2F-1-GP

Polymer
220uF,6.3V,25mohm,Iripple=2.236A
OS-CON
220uF,6.3V,10mohm,Iripple=3.9A

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

Polymer
220uF,6.3V,25mohm,Iripple=2.236A
OS-CON
220uF,6.3V,10mohm,Iripple=3.9A

R546
C867
19K6R2F-GP

C868

1 R553
2
0R0402-PAD
1

1
2

20081022

5V_AUX_S5

OCSET2
ISEN2
VOUT2

62392_OCSET2
62392_ISEN2

LDO3

//
m

1
2

1
2

47KR2F-GP

1
2

R538
10KR2F-2-GP

SC4D7U10V3KX-GP

R540
750R2F-GP

62392_LGATE2

36K5R2F-GP

62392_VCC

3D3V_AUX_S5
C845

20

FB1

16

C870
SC2200P50V2KX-2GP

62392_FB2_R

LGATE2

29

8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4

R531
36K5R2F-GP

R539

LGATE1
OCSET1
ISEN1
VOUT1

/x
/

1
2

1
2

62392_FB1

1
2

62392_OCSET1 10
62392_ISEN1
9
8

19

23

GAP-CLOSE-PW R-3-GP

ST220U6D3VDM-15GP

G
S
S
S

Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm

PHASE2

21
22

GAP-CLOSE-PW R-3-GP
G132
2
1

C853

SCD1U10V2KX-4GP

65

84.04812.A37
2nd = 84.06690.E37

PHASE1

BOOT2
UGATE2

U63
SI4800BDY-T1-GP

65

SI4812BDY-T1-E3-GP

1 R528
2
36K5R2F-GP
SC4700P50V2KX-1GP

77.C2271.00L
2nd = 77.22271.27L

62392_LGATE1 15

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

C848
62392_BOOT2 1 R521
262392_BOOT2_R 1
2
62392_UGATE2 2D2R2F-GP
SCD22U25V3KX-GP
62392_PHASE2

BOOT1
UGATE1

U59
SI4812BDY-T1-E3-GP

D
D
D
D

SCD1U10V2KX-4GP

ST220U6D3VDM-15GP

C863
1
2

84.04800.D37
2nd = 84.08884.037

C856

SCD01U50V2KX-1GP

68.3R310.20A
2nd = 68.3R31A.10V

C836

C852
1
262392_BOOT1_R 1 R522
262392_BOOT1 14
2D2R2F-GP 62392_UGATE1 13
SCD22U25V3KX-GP
62392_PHASE1
12

DY

SC4D7U25V5KX-GP

L28
2
1
IND-3D3UH-57GP
TC30

U62

G
S
S
S

3D3V_PW R

84.04800.D37
2nd = 84.08884.037

C857
SC4D7U25V5KX-GP

65

Cyntec 7*7*3
DCR=30mohm, Irating=6A
Isat=13.5A

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

D
D
D
D

U64
SI4800BDY-T1-GP

C847
SCD01U50V2KX-1GP

DY

DY C838
SC10U25V6KX-1GP

C851
SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

Iomax=7A
OCP>10.5A

C850

C854

SCD01U50V2KX-1GP

GAP-CLOSE-PW R-3-GP

GAP-CLOSE-PW R-3-GP
G124

R5321 0R2J-2-GP
2 3V/5V_EN1

34,50 S5_ENABLE

3D3V_S5

GAP-CLOSE-PW R-3-GP
G137

GAP-CLOSE-PW R-3-GP
G140

GAP-CLOSE-PW R-3-GP
G122

3D3V_PW R

R544

GAP-CLOSE-PW R-3-GP
G135

GAP-CLOSE-PW R-3-GP
G121

GAP-CLOSE-PW R-3-GP
G138

GAP-CLOSE-PW R-3-GP
G136

G133

DCBATOUT_62392_5V

G134

DCBATOUT

DCBATOUT_62392_3D3V

5V_S5

G118

DCBATOUT
5V_PW R

JV71-MV DDR3 Madison


A

Wistron Corporation

Vout=0.6*(1+R1/R2)

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL62392 5V/3D3V
Size
Custom
Date:
5

Document Number

Rev

-1

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

41

of

62

1D5V_PW R

G172

GAP-CLOSE-PW R-3-GP
G175

GAP-CLOSE-PW R-3-GP
G178

GAP-CLOSE-PW R-3-GP
G187

GAP-CLOSE-PW R-3-GP
G190

/x
/
p.

om

1
2

DY

1
2

1
2

1
2

51117A_1D5V_VFB

65

C1138
SC33P50V2JN-3GP

4
3
2
1
5
6
7
8

65

84.07672.037

0R2J-2-GP

C1156
SC100P50V2JN-3GP

1
2
5
6
7
8

yc

2
R871
38 1D5V_PW RGD

84.07672.037

10KR2J-3-GP

R888

U76

S
S
S
G

S
S
S
G

R873
9K31R3F-GP

U75

3D3V_S5

R872
30KR2F-GP

R874
30KR2F-GP

TC36

TC35

TPS51117RGYR-GP

68.R5610.10P

1D5V_PW R

TPS51117_1D5V_PGOOD

1D5V_PW R

Vout=1.5
1

3
6
7
8
15

Iomax=22A
OCP>33A

VOUT
PGOOD
GND
PGND
GND

L58
IND-D56UH-27-GP
1
2

5
6
7
8

51117A_1D5V_LL

SE330U2VDM-L-GP

12

GAP-CLOSE-PW R-3-GP

SE330U2VDM-L-GP

EN_PSV
TON
TRIP

LL

GAP-CLOSE-PW R-3-GP

Mag. 0.56uH
DCR=1.6~1.8mohm
Idc=25A, Isat=40A

D
D
D
D

2 R869 51117A_1D5V_EN
1
2 R870 51117A_1D5V__TON 2
51117A_1D5V_TRIP 11

51117A_1D5V_DRVH
51117A_1D5V_DRVL

FDMS7672-GP
4
3
2
1

VFB
VBST

13
9

D
D
D
D

1KR2J-1-GP1
249KR2F-GP
1

13,34,38,44 PM_SLP_S4#

5
14

DRVH
DRVL

51117A_1D5V_VFB
51117A_1D5V_VBST

V5FILT
V5DRV

ht

83.R5003.C8F
2nd = 83.R5003.H8H

65

FDMS7672-GP
4
3
2
1

U74

4
10

tp
:

D35
CH551H-30PT-GP

84.08692.037

//
m

1
SCD1U16V2KX-3GP

51117A_1D5V_LL1
2
C1137

0R3J-0-U-GP

SC1U10V2KX-1GP
1

GAP-CLOSE-PW R-3-GP
G201

C1135
SCD1U50V3KX-GP

S
S
S
G

C1136
SC1U10V2KX-1GP

U73
FDMS8692-GP

SC10U25V6KX-1GP

R868

C1134

GAP-CLOSE-PW R-3-GP
G199

2
C1133

GAP-CLOSE-PW R-3-GP
G200

D
D
D
D

51117A_1D5V_V5FILT

GAP-CLOSE-PW R-3-GP
G197

GAP-CLOSE-PW R-3-GP
G198

DCBATOUT_51117_1D5V

Id=10.5A
Qg=8~11nC,
Rdson=10.5~14mohm

R867
300R3-GP

GAP-CLOSE-PW R-3-GP
G195

GAP-CLOSE-PW R-3-GP
G196

SC10U25V6KX-1GP

5V_S5

GAP-CLOSE-PW R-3-GP
G192

GAP-CLOSE-PW R-3-GP
G194

GAP-CLOSE-PW R-3-GP
G191

su

GAP-CLOSE-PW R-3-GP

5V_S5

GAP-CLOSE-PW R-3-GP
G189

GAP-CLOSE-PW R-3-GP
G193

C1132

GAP-CLOSE-PW R-3-GP
G186

GAP-CLOSE-PW R-3-GP
G183

GAP-CLOSE-PW R-3-GP
G188

ST15U25VDM-1-GP

GAP-CLOSE-PW R-3-GP
G180

GAP-CLOSE-PW R-3-GP
G185

GAP-CLOSE-PW R-3-GP
G182

GAP-CLOSE-PW R-3-GP
G177

GAP-CLOSE-PW R-3-GP
G179

GAP-CLOSE-PW R-3-GP
G184

77.21561.00L
2ND =

2
1
TC34
GAP-CLOSE-PW R-3-GP
G181

1D5V_S3

GAP-CLOSE-PW R-3-GP
G174

GAP-CLOSE-PW R-3-GP
G176

GAP-CLOSE-PW R-3-GP
G173

1D5V_PW R
G171

C1139
SCD1U10V2KX-4GP

1D5V_S3
G170

DCBATOUT_51117_1D5V

DCBATOUT

Id=15A
Qg=15~21nC,
Rdson=5.2~6.9mohm

Panasonic 330uF, 2.5V


ESR:9mohm
Iripple:3A

JV71-MV DDR3 Madison

Vout=0.75V*(R1+R2)/R2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

TPS51117_1D5V

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

42

-1
of

62

DCBATOUT

DCBATOUT_51117_1D05V
G202

1D05V_PW R

GAP-CLOSE-PW R-3-GP
G206

/x
/

ST15U25VDM-1-GP

GAP-CLOSE-PW R-3-GP

5
6
7
8

TPS51117RGYR-GP

om

84.07672.037

1
2

4
3
2
1

TC38

C1147

DY

GAP-CLOSE-PW R-3-GP
G217

GAP-CLOSE-PW R-3-GP

Panasonic 330uF, 2.5V

C1170
ESR:9mohm
SC18P50V2JN-1-GP

Iripple:3A

R882
75KR2F-GP

tp
:
1

DY

65 51117A_1D05V_VFB
S
S
S
G

10KR2J-3-GP

R879

33,40,45 CPUCORE_ON

R878
30KR2F-GP

U79
FDMS7672-GP

R889

R881
7K32R3F-GP

IND-1UH-93-GP

3D3V_S5

GAP-CLOSE-PW R-3-GP
G216

1D05V_PW R

5
6
7
8

51117A_1D05V_PGOOD

68.1R01B.10J
C1146

3
6
7
8
15

GAP-CLOSE-PW R-3-GP
G215

VOUT
PGOOD
GND
PGND
GND

GAP-CLOSE-PW R-3-GP
G214

L59

EN_PSV
TON
TRIP

Mag.1.0uH
DCR=2.9~3.3mohm
Idc=18A, Isat=36A

51117A_1D05V_LL

12

GAP-CLOSE-PW R-3-GP
G213

SE330U2VDM-L-GP

LL

VFB
VBST

GAP-CLOSE-PW R-3-GP
G212

SCD1U10V2KX-4GP

13
9

Iomax=10A
OCP>15A

SC33P50V2JN-3GP

DRVH
DRVL

C1143

1D05V_PW R

D
D
D
D

51117A_1D05V_EN 1
51117A_1D05V_TON2
51117A_1D05V_TRIP
11

V5FILT
V5DRV

4
10

51117A_1D05V_DRVH
51117A_1D05V_DRVL

//
m

51117A_1D05V_V5FILT

C1142

65

yc

U78

1
2

p.

1
2
1
2

SC1U10V2KX-1GP
1

1
2

Id=10.5A
Qg=8~11nC,
Rdson=10.5~14mohm

1
SCD1U16V2KX-3GP

C1141

SCD1U50V3KX-GP

51117A_1D05V_LL1 2
C1145

0R3J-0-U-GP

1KR2J-1-GP 1
2 R877
1
2 R880
249KR2F-GP

S
S
S
G

51117A_1D05V_VFB 5
51117A_1D05V_VBST 14

PM_SLP_S3#

84.08692.037

R876

C1144

D
D
D
D

U77
FDMS8692-GP

SC1U10V2KX-1GP

D36
CH551H-30PT-GP

R875
300R3-GP

SC10U25V6KX-1GP

C1140

GAP-CLOSE-PW R-3-GP
G210

GAP-CLOSE-PW R-3-GP
G211
SC10U25V6KX-1GP

su

5V_S5

GAP-CLOSE-PW R-3-GP
G209

DCBATOUT_51117_1D05V

4
3
2
1

GAP-CLOSE-PW R-3-GP
G208

GAP-CLOSE-PW R-3-GP
G207

,34,38,45,48,51

TC37

5V_S5

GAP-CLOSE-PW R-3-GP
G205

DY

1D05V_S0
G204

GAP-CLOSE-PW R-3-GP
G203

C1157
SC100P50V2JN-3GP

DY
2

ht

0R2J-2-GP

Id=15A
Qg=15~21nC,
Rdson=5.2~6.9mohm

SB 1015

Vout=0.75V*(R1+R2)/R2

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

TPS51117_1D05V

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

43

-1
of

62

/x
/

su
2

C813
SC10U10V5KX-2GP

//
m

RT9026PFP-GP

GAP-CLOSE-PWR

C817
SC10U10V5KX-2GP
B

ht

tp
:

C816
SC1U10V2KX-1GP

GAP-CLOSE-PWR
G116
1
2

1
2
3
4
5

9026_S3

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

R501 1

GAP-CLOSE-PWR
G115
1
2

0R0402-PAD 2
DDR_VREF_S3_1

10
9
8
7
6

GND

9026_S5

yc

R499 1

11

0R0402-PAD 2

DDR_VREF_S3
DDR_VREF_PWR
C806
G114
SCD1U10V2KX-4GP
1
2

om

U54

13,34,38,42 PM_SLP_S4#

DY

p.

C803
SC10U10V5KX-2GP

C808
SC1U10V2KX-1GP

Iomax=1.2A
OCP>2A

1D5V_S3

5V_S5

JV71-MV DDR3 Madison

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Document Number

Size
A4
4

Rev

JV71-MV DDR3
Madison
Sheet
Wednesday, October 28, 2009
44
of

Date:
5

0D75V

-1
62

DCBATOUT_6263A

DCBATOUT

G85
1

G68

0R3J-0-U-GP
2

NO GFX
1

GAP-CLOSE-PWR-3-GP
G69
2

C190
POWER_MONITOR 1
2

1 R157
2
0R0402-PAD

GFXVR_EN

GAP-CLOSE-PWR-3-GP
G70
1

13,27,33,34,38,43,48,51

PM_SLP_S3#

2 R160
0R2J-2-GP

DY

6236A_VID4 1 R166
2
0R0402-PAD
6236A_VID3 1 R174
2
0R0402-PAD
6236A_VID2 1 R176
2
0R0402-PAD
6236A_VID1 1 R184
2
0R0402-PAD
6236A_VID0 1 R180
2
0R0402-PAD

1
TC16

SE100U25VM-L1-GP

GFX
79.10712.L02
2ND = 79.10112.3JL

GAP-CLOSE-PWR-3-GP
G73
2

1D05V_S0

G88
1

GFX

GAP-CLOSE-PWR-3-GP
G72
2

GAP-CLOSE-PWR-3-GP

3D3V_S0

2 R150
0R2J-2-GP

DY

0R3J-0-U-GP
2

VGFXCORE

R154 2
10KR2F-2-GP

GFX

G94
1

GFX_VID4

GFX_VID1

6236A_PMON

NTC-10K-9-GP

1 R169
2
3K57R2F-GP

GFX

2
1

/x
/

1
2

su
1

p.

1
G97
GAP-OPEN-PWR

G98
GAP-OPEN-PWR
2

tp
:

4K53R2F-1-GP
1 R164

6236A_VSUM_R

GFX

7K68R2F-GP

GFX
2GFX

G84
GAP-CLOSE-PWR

TC20

//
m

SCD022U25V2KX-GP
1 R170

GFX

Close to choke
and on the same layer

GFX

R134 2
1
0R0402-PAD

SCD033U25V3KX-GP
C208
1
2
GFX

GAP-CLOSE-PWR-3-GP

Cyntec 7*7*3
DCR=8mohm, Irating=13A
Isat=24A

VGFXCORE

G83
GAP-CLOSE-PWR

yc

DCBATOUT

R175
2

Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm

5V_S5

VGFXCORE Iomax=6A
OCP>9A

10R2F-L-GP

GAP-CLOSE-PWR-3-GP
G99

GFX

om

4
3
2
1

GFX
R186

5
6
7
8

84.06690.E37

5V_S0

GFX

10R2F-L-GP

C214
GFX
SCD01U25V2KX-3GP

C189
1

5
6
7
8
4
3
2
1

1
2

GFX

GFX

2
25

26

VID2

16
6236A_VDD

14
6236A_VIN

15

13

R163
1KR3F-GP

SCD1U25V3KX-GP
2

65

U43
FDS6690AS-GP

GFX

R142
10R3F-GP

GFX

C224
SCD22U16V3KX-2-GP

10R2F-L-GP

GFX

GFX
68.1R01A.20B

R185

GAP-CLOSE-PWR
2

ISL6263ACRZ-T-GP

GFX R171

R158

SC330P50V2KX-3GP
2
1

GAP-CLOSE-PWR
2

GFX

6236A_BOOT
1
2
R181
2D2R3J-2-GP

DY

R143
10R3F-GP

17

DY

GFX

C194
B

6236A_UGATE

GAP-CLOSE-PWR-3-GP
G96
C659
SCD1U50V3KX-GP

SE220U2VDM-8GP

G4
1

VDD

VSS

VIN

VSUM

VO
12

11

6236A_VSUM

6236A_DFB

6263A_VCC_PRM

2
C170
SC1KP50V2KX-1GP

C185

9 VSS_AXG_SENSE

18

SC1U16V3KX-2GP

2K55R2F-GP
1

1
2

GFX

DY

9 VCC_AXG_SENSE

BOOT

L23
1
2
COIL-1UH-34-GP-U

6236A_PHASE

C226
1
2

C157

G3
1

VID3

27
VID4

28
PMON

VR_ON

29

30

31

AF_EN

PGOOD

33
9

10
6236A_DROOP

GFX

SC1KP50V2KX-1GP

SC2D2U10V3KX-1GP

19

S
S
S
G

GFX

C146
SC1KP50V2KX-1GP

6236A_LGATE

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

D
D
D
D

6236A_RTN

SC560P50V2KX-2GP

21

84.08884.037

C232

GFX

6236A_VSEN
1

DFB

VSEN

C143
6236A_FB_R

R137
2

GFX 4K99R2F-L-GP

32

UGATE

6236A_VDIFF

22K21R3F-L-GP

FDE

GND_T

PHASE

VDIFF

6236A_PVCC

C653

20

PGND

FB

22

6236A_BOOT_R

GFX

GFX
1

6236A_FB
7

LGATE

COMP

GFX

PVCC

VW

SC180P50V2JN-1GP

GFX

R1461

OCSET

GFX

23

VID0

DROOP

C130
1
2

6236A_COMP_R

6236A_COMP

24

VID1

SOFT

6236A_VW 4

GFX

SC1KP50V2KX-1GP
1 R133
2
6K98R3F-GP

SC68P50V2JN-1GP
1 R135
2
374KR3-GP

RBIAS

RTN

GFX

DY
SC4D7U25V5KX-GP

C139

GFX

6236A_RBIAS

C1401
2GFX 6236A_SOFT
SCD01U50V2KX-1GP
6236A_OCSET

S
S
S
G

C147
1

1
2
6K65R2F-GP

U44
FDS8884-GP

GFX

C656
SC4D7U25V5KX-GP

R1441
R145
6263A_VCC_PRM

65

GFX

C873

D
D
D
D

150KR2F-L-GPGFX

DY

SC33P50V2JN-3GP

U15

GAP-CLOSE-PWR-3-GP
G95

DCBATOUT_6263A

R187
0R0402-PAD

2
R177
0R2J-2-GP

GAP-CLOSE-PWR-3-GP
G93

5V_S0

6236A_VR_ON

6236A_AF_EN

5V_S5

2 R149
0R2J-2-GP

DY

GAP-CLOSE-PWR-3-GP
G92

6236A_GOOD

CPUCORE_ON

GAP-CLOSE-PWR-3-GP
G90

GFX_VID0

GFX
33,40,43

GAP-CLOSE-PWR-3-GP
G89

GFX_VID2

1 R139
2
1K91R2F-1-GP

3D3V_S0

GAP-CLOSE-PWR-3-GP
G87

0R3J-0-U-GP
2

NO GFX

GFX_VID3

VCC_GFXCORE
G86

VCC_GFXCORE

NO GFX

GAP-CLOSE-PWR-3-GP
G71
2

GFX_VID[4..0]

R165
10KR2J-3-GP

0R3J-0-U-GP
2

NO GFX

G91
1

GFX

SCD01U50V2KX-1GP

6236A_VSUM_R_VCC_PRM

ht

VSS_AXG_SENSE_OUTCAP

Parallel

VCC_AXG_SENSE_OUTCAP

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL6263A_GFX CORE
Size
Document Number
Custom

Rev

-1

JV71-MV DDR3 Madison

Date:
5

Sheet

Wednesday, October 28, 2009


1

45

of

62

84.04407.F37
2nd = 84.04433.A37

84.04407.F37
2nd = 84.04433.A37

AD+

ISL88731_IINP

ICM

VCOMP
NC#5
ICOMP
VREF
NC#7
GND

NC#16

VFB

1
2

1
2

G39
GAP-CLOSE-PWR-2U-GP

G40
GAP-CLOSE-PWR-2U-GP
2
1

GAP-CLOSE-PWR-2U-GP
G41

G42
GAP-CLOSE-PWR-2U-GP
2
1

/x
/

C517

1
2

C521

1
2

D
D
D
D

5
6
7
8

65

C504
SCD22U50V3ZY-1GP

84.04800.D37
2nd = 84.08884.037

C10
SC10U25V6KX-1GP
A
K

10R2F-L-GP

C511
SC10U25V6KX-1GP
2
1

1
2

1
2

D37
SMF18AT1G-GP

83.SMF18.0AH
2nd = 83.SMF18.AAH

SB1016
B

16

tp
:

6
5
4
3
7
12

29

1
2

C518
SC1U10V3KX-3GP

15

PBATT_SENSE_R

R295

2
100R2J-2-GP

BATT_SENSE

47

ISL88731AHRZ-T-GP

DY

ht

C515
SCD015U25V2KX-GP

ISL88731_CCS
ISL88731_VREF

GND

ISL88731_CCV

2
10KR2F-2-GP

C516
SCD01U50V2KX-1GP

1ISL88731_CCV1

R303
1

ISL88731_CSIN

68.1001B.10S
2nd = 68.1001B.10R

U32
SI4800BDY-T1-GP

D01R2512F-4-GP

17

IND-10UH-119-GP

CSON

R293

ISL88731_CSIP_R

18

R302

CSOP

1
2
G36
GAP-CLOSE-PW R-2U-GP

3D3V_AUX_S5

19

R300 1KR2F-3-GP

AD_IA
SCD01U16V2KX-3GP
2
1
C510

34

PGND

ISL88731_DLO

CHG_AGND

20

ISL88731_LX

C508
SC10U25V6KX-1GP

NC#14

LGATE

ISL88731_LX

BT+_R
L10

GAP-CLOSE-PWR-2U-GP
G37
1
2

14

SDA

SC1U10V3KX-4GP

1
2
C506
SCD1U50V3KX-GP

G38
GAP-CLOSE-PWR-2U-GP

23

C505
1
2

PHASE
34,47 BAT_SDA

ISL88731_DHI

G
S
S
S

24

4
3
2
1

UGATE

BAT54PT-GP

84.04800.D37
2nd = 84.08884.037

ISL88731_CSIP

SCL

65

5
6
7
8

ACOK

10

U33
SI4800BDY-T1-GP

4
3
2
1

34,47 BAT_SCL

CHG_AGND

DY

om

13

D15

D
D
D
D

25
21

ISL88731_CSSN_R
ISL88731_VCC
R298
0R3J-0-U-GP
ISL88731_BST 1
2ISL88731_BST1
ISL88731_LDO

G
S
S
S

BOOT
VDDP

su

27
26

CHRG_IN

C509
SC1U10V3KX-4GP

CSSN
VCC

R299
4D7R3F-L-GP
2

//
m

ISL88731_ACOK

CHG_AGND

CHG_AGND

28

1
2

C507
SCD1U10V2KX-4GP

VDDSMB

CSSP

CHG_AGND

yc

11

5V_S5

ACIN

ISL88731_CSSP

2
1
2

C514
SCD01U50V2KX-1GP

1
2

DCIN

8
7
6
5

SCD1U25V3KX-GP

R304
49K9R2F-L-GP

22

C519

SCD047U25V3KX-GP

SC10U25V6KX-1GP

ISL88731_ACIN

CHG_AGND

U31

C513
1
2

D
D
D
D

R308
470KR2J-2-GP

SC10U25V6KX-1GP

R307
215KR3F-1-GP

R305
10R2J-2-GP

C503
SC1U25V5KX-1GP

CH521S-30PT-GP-U

C520
SCD1U25V3KX-GP

NC#1

ISL88731_DCIN

D16

SCD1U25V3KX-GP

R306
10R2J-2-GP
ISL88731_ACOK

p.

R290 1 AD+_G_2
10KR2F-2-GP

U34
S
S
S
G

AO4407A-GP

84.2N702.A3F

1
2
3
4

AD+

Q22
2N7002KDW -GP

D01R2512F-4-GP

G35
GAP-CLOSE-PWR-2U-GP

100KR2J-1-GP

10KR2J-3-GP

1ISL88731_CSSN

R288

G34
GAP-CLOSE-PWR-2U-GP

R289
AD+_G_1

AD+_G

AO4407A-GP

C512

R291
1

C522

BT+

1
2
3
4

1ISL88731_CSSP_R 1

D
D
D
D

DCBATOUT

SCD1U25V3KX-GP

8
7
6
5

AD+_TO_SYS

U30
S
S
S
G

CHG_AGND

R296
10KR2F-2-GP

ISL88731_LDO

AC_IN#

R297
10KR2F-2-GP

34

Q23
2N7002-11-GP

ISL88731_ACOK_L 1 R292
2
0R0402-PAD

ISL88731_ACOK
JV71-MV DDR3 Madison

84.27002.W31
2ND = 84.27002.N31

R294
15K8R3F-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL88731A_Charger
Size
A3
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

46

of

-1
62

Adaptor in to generate DCBATOUT

AD+

AD_JK

DCIN1

1
2
3
4

R287
200KR2F-L-GP

Q21
B

R2

PDTC124EU-1-GP

om

p.

84.00124.H1K
2nd = 84.00124.S1K

R286
100KR2J-1-GP

/x
/

R1

AD_OFF

2nd = 84.04407.F37 84.04433.A37

su

34

C500
SC1U50V5ZY-1-GP

84.00124.K1K
2nd = 84.00124.T1K

PDTA124EU-1-GP
Q20

8
7
6
5

AD_OFF#_JK

2ND =

83.P6SBM.AAG
2nd = 83.P6SMB.AAG

D
D
D
D

AO4407A-GP

83.P6SBM.AAG
2nd = 83.P6SMB.AAG

P6SBMJ24APT-GP

U29
S
S
S
G

AD+_2

D14
P6SBMJ24APT-GP

22.10037.I01

D31

DC-JACK174-GP

NP1

C501
SCD1U50V3ZY-GP

EC28
SCD1U50V3KX-GP

5
6

R1

R2

4
1
2
3

//
m

yc

BATTERY CONNECTOR

BAT1
BATA_SDA_1
BATA_SCL_1
BAT_IN#_1

1
2

DY

1
2

1
2

K
A

46 BATT_SENSE

DY

EC8

SC10P50V2JN-4GP

DY

EC9

EL2

SC10P50V2JN-4GP

DY

EL1

MLVS0402M04-GP

EC10

EL3

MLVS0402M04-GP

DY

SC1000P50V3JN-GP-U

83.5R603.E3F
2nd = 83.5R603.D3F

EC30
SC1000P50V3JN-GP-U

EC32
SCD1U50V3ZY-GP

MM3Z5V6T1G-GP

EC31
SCD1U50V3ZY-GP

D1

MLVS0402M04-GP

BT+

5
6
7
8

ht

4
3
2
1

34,46 BAT_SDA
34,46 BAT_SCL
34 BAT_IN#

tp
:

RN9
SRN33J-7-GP

DY

R301
1
2
0R0402-PAD

3
4
5
6
7

SCL
SDA
BAT_IN#
BT+#6
BT+#7

GND
GND
GND
GND

1
2
8
9

ALP-CON7-2-GP-U

20.81017.007
2nd = 20.81025.007
JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AD/BATT CONN

Size

Document Number

Rev

-1

JV71-MV DDR3 Madison


Date: Wednesday, October 28, 2009
A

Sheet

47

of
E

62

DCBATOUT

G218

DCBATOUT_8202_VGA

GAP-CLOSE-PW R-3-GP
G219

TC17
R426
10R2F-L-GP

74.08202.A73

1
2

1
2

GAP-CLOSE-PW R-3-GP
G225

DIS

TC15

C708

GAP-CLOSE-PW R-3-GP

DIS

5
6
7
8

DIS

TC14

84.07672.037

Panasonic
330uF,2V,9mohm
Iripple=3A

79.33719.L01
2nd = 77.C3371.051

Id=15A
Qg=14~19nC,
Rdson=4.9~6.8mohm

//
m

R429
49K9R2F-L-GP

GAP-CLOSE-PW R-3-GP
G224

RT8202_DL_VGA

79.33719.L01
2nd = 77.C3371.051

JV71-MV8 ENG 1002


Designator

For M96-M2

For Madison

For PARK
B

R428

tp
:

1
2

30k

73.2k

64.30025.6DL

49.9K

64.73225.6DL

64.49925.6DL

R428
73K2R2F-GP

DY

DIS

3D3V_VGA 3D3V_S5

R697
100KR2J-1-GP

NV_VID0_D
NV_VID1_D

R703
100KR2J-1-GP

2N7002-11-GP

DIS
NV_VID0

B
E

2ND = 84.27002.N31

DY

2
NV_VID0_R Q42

84.27002.W31

C740
SCD1U10V2KX-4GP

SB 1019

PW RCNTL_1 53

DIS
2

2ND = 84.27002.N31

DIS

1
R435
10KR2F-2-GP

DY

MMBT2222A-3-GP

84.27002.W31

Q27

DY
NV_VID1

DIS

DY

Q26
2N7002-11-GP

R427
75KR2F-GP

JV71-MV8 ENG 1002

ht

DIS

RT8202_FB_VGA

C1148
SCD1U10V2KX-4GP

RT8202_FB_VGA

DY

DIS
2

R425
10KR2F-2-GP

DIS

Vout=0.75*(1+Rh/Rl)

C709
SC47P50V2JN-3GP

65

FDMS7672-GP

84.07672.037

yc

SB1019

5
6
7
8
4
3
2
1

om

DIS

DIS

GND
GND

PGND
RT8202APQW -GP

DIS

6K34R3F-GP

17
6

Madison-Park 10KR2J-3-GP

RT8202_LX_VGA

U40

DIS

5
6
7
8

VGA_CORE

VOUT

/x
/

NC#5
NC#14

65

FDMS7672-GP

RT8202_OC_VGA_L 1
RT8202_FB_VGA

U17

p.

10
3

su

2
VDD

OC
FB

EN/DEM

DIS

GAP-CLOSE-PW R-3-GP
G223

C649

SE330U2VDM-L-GP

RT8202_BST_VGA_L
1
2
RT8202_DH_VGA
1R3F-GP
RT8202_LX_VGA
DIS
RT8202_DL_VGA
R406

S
S
S
G

5
14

R902
16KR3F-GP

R866
3D3V_VGA

13
12
11
8

S
S
S
G

M96

15

BOOT
UGATE
PHASE
LGATE

RT8202_LX_VGA

4
3
2
1

1
2

RT8202_EN_VGA

TON
PGOOD

SCD1U25V3KX-GP

GAP-CLOSE-PW R-3-GP
G222

VGA_CORE

SE330U2VDM-L-GP

1 R416
2
10KR2F-2-GP

PM_SLP_S3#

16
4

R412

C665

L19
IND-D36UH-9-GP
1
2

SCD1U10V2KX-4GP

13,27,33,34,38,43,45,51

RT8202_DH_VGA
C668
1
2RT8202_LX_VGA

DIS

SB 1019

D
D
D
D

RT8202_PGOOD_VGA

DIS
C

U45

VDDP

DIS

1
0R0402-PAD-1-GP

Mag. 0.56uH
DCR=1.6~1.8mohm
Irating=25A,Isat=40A

D
D
D
D

C710
SC100P50V2JN-3GP

2
1
2

1
2
2

51 VGACORE_PW ROK

84.08692.037

C652

SCD1U50V3KX-GP

C685
SC1U10V3KX-4GP

R420

C655

DIS

SC10U25V6KX-1GP

5V_S5

DIS

C696
SC1KP50V2KX-1GP

U41
FDMS8692-GP

DIS

SC10U25V6KX-1GP

RT8202_TON_VGA

DIS

65

DIS

SC10U25V6KX-1GP

C711
SC1U10V3KX-4GP

DIS

S
S
S
G

R422
10KR2F-2-GP

DIS

CH521S-30-GP-U1

DIS

D
D
D
D

1 R418
2
1MR2F-GP

DCBATOUT_8202_VGA

83.00521.01F
2nd = 83.R2003.F8F

RT8202_BST_VGA

3D3V_S0

DIS

2
1

RT8202_VDD_VGA

D25

Id=23A
Qg=7.2nC,
Rdson=11.1~13.9mohm

5V_S5

4
3
2
1

DIS

GAP-CLOSE-PW R-3-GP
G221

ST15U25VDM-1-GP

DCBATOUT_8202_VGA

5V_S5

GAP-CLOSE-PW R-3-GP
G220

Iomax=22A
OCP>33A

1
R436
10KR2F-2-GP

PW RCNTL_0 53

C741
SCD1U10V2KX-4GP

DIS
JV71-MV DDR3 Madison

JV71-MV8 ENG 1002

M96 Pro
ALTV0
0
1

Vout
1.15V
0.9V

Madison Pro
ALTV0
Vout
0
1.00V
1
0.9V

PARK XT
ALTV0
Vout
0
1.05V
1
0.9V

Wistron Corporation

JV71-MV8 ENG 1002

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:

RT8202A_VGA CORE

Document Number

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

48

Rev

-1
of

62

5V_S0

EC127

EC128

EC116

EC115

EC114

EC113

EC129

DY

DY

1
SCD1U25V2ZY-1GP

DY

1
SCD1U25V2ZY-1GP

DY

1
SCD1U25V2ZY-1GP

DY

1
SCD1U25V2ZY-1GP

1
SCD1U25V2ZY-1GP

1
SCD1U25V2ZY-1GP

1
SCD1U25V2ZY-1GP

DY

DY
D

/x
/

EC96
SCD1U50V3KX-GP

DY

EC95

EC94

SCD1U50V3KX-GP

DY

DY

1
SCD1U25V2ZY-1GP

1
2

DY

EC93

SCD1U50V3KX-GP

DY

DY

SCD1U50V3KX-GP

DY

EC92
SCD1U50V3KX-GP

1
SCD1U50V3KX-GP

DY

EC91

EC90
SCD1U50V3KX-GP

DY

EC89
SCD1U50V3KX-GP

DY

SCD1U50V3KX-GP

1
SCD1U50V3KX-GP

DY

EC88

EC87

SCD1U50V3KX-GP

1
SCD1U50V3KX-GP

EC86

SB 0520

EC85

EC112

DY

1
SCD1U25V2ZY-1GP

DY

DCBATOUT

EC111

EC67

EC65
SCD1U50V3KX-GP

0622

DY

-1

SCD1U50V3KX-GP

DY

EC64
SCD1U50V3KX-GP

EC63
SCD1U50V3KX-GP

DY

1
EC62
SCD1U50V3KX-GP

EC61
SCD1U50V3KX-GP

1D05V_S0

DCBATOUT

DY

SPRING_GND6
SPRING-16-GP

SPRING_GND5
SPRING-16-GP

34.49U26.001

34.43E28.001

34.43E28.001

SPRING_GND19
SPRING-9-GP

SPRING_GND18
SPRING-43-GP-U

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

1
1

HOLE355X355R111-S1-GP

TOP

34.49U26.001

34.49U26.001

34.49U26.001

DIS

SPRING_GND2
SPRING-12-GP-U

SPRING_GND3
SPRING-12-GP-U

SPRING_GND4
SPRING-12-GP-U

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Date:

H57
STF256R89H178-GP

JV71-MV DDR3 Madison

SPRING_GND10
SPRING-7-GP

H50
STF237R113H111-GP

DIS
SPRING_GND11
SPRING-7-GP

H46

DIS

STF237R113H111-GP

H47

STF237R113H111-GP
STF237R125H42-GP

H49

H45

STF237R113H111-GP

STF237R125H42-GP

H48
STF237R113H111-GP

H59
STF237R113H111-GP

H88

SPRING_GND12
SPRING-7-GP

HOLE355X355R111-S1-GP

H27

H62

STF237R125H42-GP

H10

34.43E28.001

H58
HOLE

34.41Y19.001

34.4C322.001

SPRING_GND17
SPRING-16-GP

34.15J03.001

SPRING_GND13
SPRING-7-GP

HOLE355X355R111-S1-GP

H26

H25
HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

SPRING_GND1
SPRING-56-GP

H9
H2
HOLE

JV71-MV8 1005
5

SPRING_GND20
SPRING-9-GP

MINICARD

34.41Y19.001

34.4C322.001

DIS

DY

34.15J03.001

om
1
SCD1U25V2ZY-1GP

1
SCD1U25V2ZY-1GP

DY

yc

1
SCD1U25V2ZY-1GP

1
SCD1U25V2ZY-1GP

tp
:

HOLE355X355R111-S1-GP

ht

HOLE355X355R111-S1-GP

1
HOLE355X355R111-S1-GP

DY

H7

H24

SPRING_GND9
SPRING-56-GP

DY

EC103

DIS

EC102

DIS

EC108

1
SCD1U25V2ZY-1GP

EC101

EC107

1
SCD1U25V2ZY-1GP

p.

EC100

//
m

1
SCD1U25V2ZY-1GP

DY

H6

H35

HOLE355X355R111-S1-GP

H19

HOLE355X355R111-S1-GP

1
1

DY

H5
HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

SPRING_GND8
SPRING-43-GP-U

EC99

DIS

PD 1019

MDC

H4

H11

HOLE355X355R111-S1-GP

DY

VGA

H3

H29

EC98

NB

EC97

1
SCD1U25V2ZY-1GP

DY

1
SCD1U25V2ZY-1GP

DY

1
SCD1U25V2ZY-1GP

DY

CPU
B

EC110

EC120

DIS

EC106

DY

EC119

EC122

1
SCD1U25V2ZY-1GP

DY

EC121

1
SCD1U25V2ZY-1GP

DY

EC124

1
SCD1U25V2ZY-1GP

DY

EC123

1
SCD1U25V2ZY-1GP

DY

EC126

1
SCD1U25V2ZY-1GP

1
SCD1U25V2ZY-1GP

EC125

1
SCD1U25V2ZY-1GP

3D3V_S0

EC105

1
SCD1U25V2ZY-1GP

5V_S5

1
SCD1U25V2ZY-1GP

su

DDR_VREF_S3

1D5V_S3

1
SCD1U25V2ZY-1GP

0622

-1

EC104

1
SCD1U25V2ZY-1GP

VGA_CORE

EMI/Spring/Boss
JV71-MV DDR3 Madison

Document Number

W ednesday, October 28, 2009

Sheet
1

49

of

Rev

-1
62

Check test point


3D3V_S0

TP214 AFTE14P-GP

3D3V_AUX_S5

TP213 AFTE14P-GP

3D3V_S5

TP210 AFTE14P-GP

5V_S5

TP209 AFTE14P-GP

TP142 AFTE14P-GP

TP161 AFTE14P-GP

TP160 AFTE14P-GP

TP112 AFTE14P-GP

13,34 PM_PW RBTN#


4,12 H_PW RGD
34,41 S5_ENABLE
4,6 H_CPURST#

su

/x
/

Test Point
Dimm Door

//
m

yc

om

p.

ht

tp
:

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AFTE_TP
Size
A3
Date:
A

Document Number

Rev

-1

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
E

50

of

62

AO4468, SO-8
Id=11.6A, Qg=9~12nC
Rdson=17.4~22m ohm

DIS

1D5V_VGA

1
2
3
4

DIS

AO4468-GP

84.04468.037

DIS

C885
SCD1U16V2KX-3GP

C884
SC10U6D3V3MX-GP

U69
S
S
S
G

DIS
8 D
7 D
6 D
5 D

RUN_POWER_ON

TC33
ST150U6D3VBM-1-GP

1D5V_S3

1D5V_VGA

77.C1571.09L
2ND = 80.15715.12L
D

RUNON_R_1
Q38
S

1
R16

84.S0610.B31
2ND = 84.00610.C31

2
R758
330KR2J-L1-GP

DIS

SA0928

DIS_EN_1D5_RUN

M96

Q39
2N7002-11-GP

DGPU_PWROK_R

84.27002.W31
2ND = 84.27002.N31

G
S

0R2J-2-GP
1

Madison-Park

DIS

C886

su

DY

APL5930 for 1V_VGA


1D5V_S3

C1151

L60

LX#4

PGOOD

LX#3

FB

GND

10

COMP

SHDN/RT

8015B_LX34

R894
2 8015B_COMP_1
1
2
20KR2F-L-GP
SC330P50V2KX-3GP

DIS

C1163

R891
20KR2F-L-GP

DIS

DIS

8015B_FB
R892
820KR2F-GP

DIS

1
2

DIS
C1154

GAP-CLOSE-PWR
G227
1
2
GAP-CLOSE-PWR
G228
1
2
GAP-CLOSE-PWR
G229
1
2

GAP-CLOSE-PWR

1D8V_VGA

8015B_RT

11

74.08015.A43
DIS

DIS
C1153

G226
2

G153

2
1
IND-3D3UH-57GP

DIS

84.5k

Iomax=2A
1D8V_PWR

R893
16KR2F-GP

C1160

C1161

VDD

20.5k

DIS

68.3R310.20A

C1162

DIS

GAP-CLOSE-PWR-3-GP
G154
1

DIS

8015B_COMP

SC100P50V2JN-3GP

8015B_FB

R887
84K5R2F-GP

SC22U6D3V5MX-2GP

C1159
SC10U10V5KX-LGP

PGND

1
2

DIS

GND

C1158
SC10U10V5KX-LGP

DIS

PVDD

U81
RT8015BGQW-GP
6

8015B_PWRGD

DY

ht

2
10KR2F-2-GP

3D3V_S0

R890
1

SC22U6D3V5MX-2GP

1001 modify

3D3V_S0

DIS

DIS
C1152

DY

SCD1U25V3ZY-1GP

C1155

DIS

DIS
9025_FB

tp
:

0R2J-2-GP

R885
22K6R2F-1-GP

APL5930KAI-TRG-GP

VGACORE_PWROK_EN

5
4
3
2
1

SC10U10V5KX-2GP

1 R886

48 VGACORE_PWROK

22.6k

R887

1V_VGA

SC10U10V5KX-2GP

0R2J-2-GP

VIN#5
VOUT#4
VOUT#3
FB
GND

VCNTL
POK
EN
VIN#9

For Madison

7.87k

1V_VGA_PWR

SC100P50V2JN-3GP

6
7
8
9

DY
2

R884
1

//
m

U80

For M96-M2

R885

Vo=0.8*(1+(R1/R2))

yc

2
1V_VGA_PWRGD

13,27,33,34,38,43,45,48 PM_SLP_S3#

om

1
1

C1150
SC10U10V5KX-2GP

DIS

R883
2K2R2J-2-GP

DIS

C1149
SC1U16V3KX-2GP

Designator

1V_VGA
Iomax=2.5A
Vo(cal.) = 1.013964 V

DIS
SC10U10V5KX-2GP

3D3V_S0

5V_S5

DIS

p.

SCD1U10V2KX-4GP

CO-LAYOUT

1 R759

/x
/

2
0R2J-2-GP

1V_VGA_PWRGD

DIS
2

R864
1

SCD22U25V3KX-GP

R757
100KR2J-1-GP

DIS

C296

DY

DIS_EN_1D5_RUN_R

330KR2J-L1-GP

13,27,33,34,38,43,45,48 PM_SLP_S3#

2
0R2J-2-GP

NDS0610-NL-GP

DIS
R756
1

DIS

RUNON_R

GAP-CLOSE-PWR-3-GP

DIS

C1164
1

SCD1U25V2KX-GP

C1165
SCD1U10V2KX-5GP

Vo=0.8*(1+(R1/R2))

DY

JV71-MV DDR3 Madison

DIS

1 R895
2 1V_VGA_PWRGD_R
0R0402-PAD

Wistron Corporation

Q41
AO7401-GP

DY
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

D
Title

ATI POWER

1V_VGA_PWRGD

Size
Document Number
Custom

Rev

JV71-MV DDR3 Madison

Date:
5

Sheet

Wednesday, October 28, 2009


1

51

of

-1
62

7 PEG_TXP[15..0]
7 PEG_TXN[15..0]

PEG_TXP[15..0]

7 PEG_RXP[15..0]

PEG_TXN[15..0]

7 PEG_RXN[15..0]
PEG_TXP0
PEG_TXN0

AA38
Y37

PCIE_RX0P
PCIE_RX0N

PCIE_TX0P
PCIE_TX0N

PEG_RXP0_1
PEG_RXN0_1

Y33
Y32

C901

1
2
SCD1U16V2KX-3GP
1
C902 SCD1U16V2KX-3GP

DIS

PEG_TXP1
PEG_TXN1

Y35
W36

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

PEG_RXP1_1
PEG_RXN1_1

W33
W32

C903

1
2
SCD1U16V2KX-3GP
1
C904 SCD1U16V2KX-3GP

DIS

PEG_TXP2
PEG_TXN2

W38
V37

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

U33
U32

PEG_RXP2_1
PEG_RXN2_1

C905

PEG_TXP3
PEG_TXN3

V35
U36

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

U30
U29

PEG_RXP3_1
PEG_RXN3_1

C908
1
2
SCD1U16V2KX-3GP
1
C907 SCD1U16V2KX-3GP

1
2
SCD1U16V2KX-3GP
1
C906 SCD1U16V2KX-3GP

DIS
DIS

PEG_TXP4
PEG_TXN4

U38
T37

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

PEG_RXP4_1
PEG_RXN4_1

T33
T32

C910
1
2
SCD1U16V2KX-3GP
1
C909 SCD1U16V2KX-3GP

DIS

PEG_TXP7
PEG_TXN7

P35
N36

PCIE_RX7P
PCIE_RX7N

PEG_TXP8
PEG_TXN8

N38
M37

PCIE_RX8P
PCIE_RX8N

PEG_TXP9
PEG_TXN9

M35
L36

PCIE_RX9P
PCIE_RX9N

PEG_TXP10
PEG_TXN10

L38
K37

PCIE_RX10P
PCIE_RX10N

PEG_TXP11
PEG_TXN11

K35
J36

PCIE_RX11P
PCIE_RX11N

PEG_TXP12
PEG_TXN12

J38
H37

PCIE_RX12P
PCIE_RX12N

PEG_TXP13
PEG_TXN13

H35
G36

PCIE_RX13P
PCIE_RX13N

PEG_TXP14
PEG_TXN14

G38
F37

PCIE_RX14P
PCIE_RX14N

PEG_TXP15
PEG_TXN15

F35
E37

PCIE_RX15P
PCIE_RX15N

tp
:

CLOCK

AB35
AA36

3 CLK_PCIE_PEG
3 CLK_PCIE_PEG#

CO-LAYOUT

PLT_RST1#_M92_1

DIS

Madison-Park

AA30

P33
P32

PEG_RXP6_1
PEG_RXN6_1

C914
1
2
SCD1U16V2KX-3GP
1
C913 SCD1U16V2KX-3GP

PCIE_TX7P
PCIE_TX7N

P30
P29

PEG_RXP7_1
PEG_RXN7_1

C915
1
2
SCD1U16V2KX-3GP
1
C916 SCD1U16V2KX-3GP

PCIE_TX8P
PCIE_TX8N

N33
N32

PEG_RXP8_1
PEG_RXN8_1

C918
1
2
SCD1U16V2KX-3GP
1
C917 SCD1U16V2KX-3GP

PCIE_TX9P
PCIE_TX9N

N30
N29

PEG_RXP9_1
PEG_RXN9_1

PCIE_TX10P
PCIE_TX10N

L33
L32

PEG_RXP10_1
PEG_RXN10_1

DIS
DIS

PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N

C919

C922

NC#AJ21
NC#AK21
PWRGOOD

DIS

1
2
SCD1U16V2KX-3GP
1
C920 SCD1U16V2KX-3GP

DIS

1
2
SCD1U16V2KX-3GP
1
C921 SCD1U16V2KX-3GP

DIS

L30
L29

PEG_RXP11_1
PEG_RXN11_1

C923
1
2
SCD1U16V2KX-3GP
1
C924 SCD1U16V2KX-3GP

K33
K32

PEG_RXP12_1
PEG_RXN12_1

C926
1
2
SCD1U16V2KX-3GP
1
C925 SCD1U16V2KX-3GP

DIS
DIS

J33
J32

PEG_RXP13_1
PEG_RXN13_1

C927
1
2
SCD1U16V2KX-3GP
1
C928 SCD1U16V2KX-3GP

PCIE_TX14P
PCIE_TX14N

K30
K29

PEG_RXP14_1
PEG_RXN14_1

C930
1
2
SCD1U16V2KX-3GP
1
C929 SCD1U16V2KX-3GP

PCIE_TX15P
PCIE_TX15N

H33
H32

PEG_RXP15_1
PEG_RXN15_1

C931
1
2
SCD1U16V2KX-3GP
1
C932 SCD1U16V2KX-3GP

PCIE_TX13P
PCIE_TX13N

DIS
DIS
DIS

PCIE_REFCLKP
PCIE_REFCLKN

ht

PLT_RST1# 1
2
R771 0R2J-2-GP

2
10KR2J-3-GP

PLT_RST1#

AJ21
AK21
AH16

R769

PCIE_TX6P
PCIE_TX6N

//
m

DIS

PEG_RXP[15..0]
PEG_RXN[15..0]

PEG_RXP0
PEG_RXN0

DIS

PEG_RXP1
PEG_RXN1

DIS

PEG_RXP2
PEG_RXN2

DIS

PEG_RXP3
PEG_RXN3

DIS

PEG_RXP4
PEG_RXN4

DIS

PEG_RXP5
PEG_RXN5

DIS

/x
/

PCIE_RX6P
PCIE_RX6N

C911
1
2
SCD1U16V2KX-3GP
1
C912 SCD1U16V2KX-3GP

su

R38
P37

PEG_RXP5_1
PEG_RXN5_1

T30
T29

p.

PEG_TXP6
PEG_TXN6

PCIE_TX5P
PCIE_TX5N

om

PCIE_RX5P
PCIE_RX5N

yc

T35
R36

PCI EXPRESS INTERFACE

PEG_TXP5
PEG_TXN5

7,13,25,31,32,34,35

1 OF 8

VGA1A

PEG_RXP6
PEG_RXN6

DIS

PEG_RXP7
PEG_RXN7

DIS

PEG_RXP8
PEG_RXN8

DIS

PEG_RXP9
PEG_RXN9

DIS

PEG_RXP10
PEG_RXN10

DIS

PEG_RXP11
PEG_RXN11

DIS

PEG_RXP12
PEG_RXN12

DIS

PEG_RXP13
PEG_RXN13

DIS

PEG_RXP14
PEG_RXN14

DIS

PEG_RXP15
PEG_RXN15

DIS

1V_VGA

DIS

CALIBRATION

PCIE_CALRP

Y30

R768
1

PCIE_CALRN

Y29

1K27R2F-L-GP

2
2

R770 2KR2F-3-GP

PERST#

DIS

C933
SC22P50V2JN-4GP

MADISON-PRO-GP

DIS

71.MDSON.M01

DIS

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Madison ( 1 of 5 ) PCIE
Size
A3
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

52

-1
of

62

DIS

1
2

2
R899
10KR2J-3-GP

1
3

TP236

JTAG_TCK

HPD1

AK24

= 0.6V)

A2VSSQ

C958
SCD1U16V2KX-3GP

75mA

DIS

DPLL_PVDD

R2SET

AM32
AN32

DPLL_VDDC

DPLL_PVDD
DPLL_PVSS

ht

VREFG

DDC/AUX

AN31

For M96-M2

VGA_XTALIN
VGA_XTALOUT

For Madison

10K

DY

TP260

DPLL_VDDC

AV33
AU34
VGA_XO_IN

TP265

PLL/CLOCK

DDC2CLK
DDC2DATA

AW34

VGA_XO_IN2

XTALIN
XTALOUT
XO_IN

AW35

AUX2P
AUX2N

XO_IN2

DDCCLK_AUX3P
DDCDATA_AUX3N

GPU_DPLUS
GPU_DMINUS

AF29
AG29

DPLUS
DMINUS

DDCCLK_AUX4P
DDCDATA_AUX4N

THERMAL

DDCCLK_AUX5P
DDCDATA_AUX5N

DPE_VDD18
FAN_PWM

AK32

TS_FDO

AL31
R792
1MR2J-1-GP

DIS

DDC6CLK
DDC6DATA
DDCCLK_AUX7P
DDCDATA_AUX7N

5mA

MADISON-PRO-GP

DIS
3

AC33
AC34

DAC1_VDD1DI

C942
SCD1U16V2KX-3GP

SB 1022

82.30034.461
2ND = 82.30034.701

SC10P50V2JN-4GP

DAC1_AVDD

AVSSQ

DIS

AD30
AD31
AF30
AF31

DAC2_A2VDD

130mA

C949
SCD1U16V2KX-3GP

AC32
AD32
AF32

3D3V_VGA
2 R787

C946

DIS

DIS

C950

DIS

C948

DIS

AVSSQ

BLM15BD121SS1D-GP

DIS
68.00084.F81
2ND = 68.00217.701

1D8V_VGA

L39

45mA

1
0R0402-PAD

C954

C955

DIS

AG33

DAC2_A2VDD
DAC2_A2VDDQ

DAC2_A2VDDQ

BLM15BD121SS1D-GP

DIS
68.00084.F81
2ND = 68.00217.701

1.5mA
C956
SCD1U16V2KX-3GP

BLM15BD121SS1D-GP

DIS

DIS

AF33

1D8V_VGA

L40

3D3V_VGA

68.00084.F81
2ND = 68.00217.701

DIS

R790
1
2
715R2F-GP

AM26
AN26

CRT_DDCCLK 19
CRT_DDCDATA 19

C1063
SCD1U16V2KX-3GP

DIS

AM27
AL27
U67
AM19
AL19

ATI_HDMI_CLK
ATI_HDMI_DAT

20
20

R582 1
R581 1

33,34 SMBC_Therm
33,34 SMBD_Therm

AN20
AM20

DIS

DIS

AL30
AM30

2 0R2J-2-GP
2 0R2J-2-GP

KBC_THERM_G781_CLK 8
KBC_THERM_G781_DAT 7
G781_ALERT# 6
5

SMBCLK
VCC
SMBDATA
DXP
ALERT#
DXN
GND
THERM#

1
2
3
4

GPU_DPLUS
GPU_DMINUS
GPU_THERM#

G781P8F-GP

DIS
AL29
AM29

AJ30
AJ31

DIS
Q40
MMBT3904-4-GP

AK30
AK29

HPD1

DIS

3D3V_VGA

ATI_HDMI_DETECT

20

R585
2K2R2F-GP

R586
2K2R2F-GP

DIS

DIS
A

84.T3904.C11
2ND = 84.03904.L06
JV71-MV DDR3 Madison
R793
10KR2J-3-GP

DIS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DIS
SC10P50V2JN-4GP

Title

SB 1022

Date:
4

C1064
SC2200P50V2KX-2GP

DIS

3D3V_VGA

AN21
AM21

Size
A2
5

C947

DIS

DAC2_VDD2DI

AD33

AA29

DIS

DAC1_VDD1DI

AD29
AC29

AG31
AG32

C945

1D8V_VGA

L38

70mA

1
0R0402-PAD

XTAL-27MHZ-58-GP

DIS

SA0915

R785 2

DIS

AC30
AC31

C960

1
2

1D8V_VGA

50mA

AVSSQ

71.MDSON.M01
C959

AVSSQ

19,56
19,56

DAC2_VDD2DI

DAC1_AVDD

0R2J-2-GP

DIS

499R2F-2-GP

DIS

AD34
AE34

R782

CRT_HSYNC
CRT_VSYNC

VGA_XO_IN2
2
0R2J-2-GP

DIS
1
R11

TSVDD
TSVSS

AC36
AC38

X6
2

SA0915

AJ32
AJ33

DIS

VGA_XO_IN
2
0R2J-2-GP

TS_A

19

CRT_BLUE 19

TP247

DDC1CLK
DDC1DATA
AUX1P
AUX1N

For Thermal sensor

DIS

H2SYNC
V2SYNC

A2VDD

125mA

1
R10

C
Y
COMP

A2VDDQ

AH13

CRT_GREEN

AF37
AE38

tp
:

VREFG VOLTAGE DIVIDER IS


(VREFG = VDDR4,5(1.8V) / 3

DIS

B2
B2#

HPD1

DIS

R789
249R2F-GP

R899

G2
G2#

VDD2DI
VSS2DI

VGA_VREFG

Designator

R2
R2#

1
R788
499R2F-2-GP

RN90
SRN150F-1-GP

SC10U6D3V3MX-GP

1D8V_VGA

CRT_RED

CRT_RED 19

AE36
AD35

DIS

71.MDSON.M01

CRT_GREEN

SCD1U16V2KX-3GP

SB 1008

VGA_CLKREQ
JTAG_TRST#
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE
GENERICF
GENERICG

AD39
AD37

R784
AB34 RSET 1

MADISON-PRO-GP

CRT_BLUE

AT23
AR22

lower even

AN36
AP37

SCD1U16V2KX-3GP

ATI-ES

Back Bias (body bias)


which minimizes
power consumption
in battery modes.
PD = Disable
PU = Enable

1
1
1
1
1
1
1
1

TP239
TP240
TP241
TP242
TP244
TP243
TP245
TP246

1 R696
2
10KR2J-3-GP

3D3V_VGA

M96

TP264

ATI-ES

AU22
AV21

TXOUT_L3P
TXOUT_L3N

GPU_TXAOUT2+ 18
GPU_TXAOUT2- 18

1 R693
2
10KR2J-3-GP

AT21
AR20

GPU_TXAOUT1+ 18
GPU_TXAOUT1- 18

AP35
AR35

GPIO_VGA_21

56 GPIO_VGA_22

AU20
AT19

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

GPU_TXAOUT0+ 18
GPU_TXAOUT0- 18

AR37
AU39

TP234

GPIO_VGA_21

AT17
AR16

GPU_TXACLK+ 18
GPU_TXACLK- 18

AW37
AU35

48 PWRCNTL_1
1

VDD1DI
VSS1DI

upper odd

TP232

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

AP34
AR34

THERMTRIP_VGA

TP233

AVDD
AVSSQ

18

SC10U6D3V3MX-GP

OSC_SPREAD
Thermal_int
1 GPIO_VGA_18

DIS
1

GPIO_VGA_14

18

BLON_IN 34
ATI_LCDVDD_ON

AF35
AG36

SC1U6D3V2KX-GP

TP261

1
TP231

PWRCNTL_0

RSET

GPU_TXBOUT2+ 18
GPU_TXBOUT2- 18

SCD1U16V2KX-3GP

48
1

HSYNC
VSYNC

GPU_TXBOUT1+ 18
GPU_TXBOUT1- 18

AG38
AH37

SCD1U16V2KX-3GP

R898
10KR2J-3-GP

B
B#

AH35
AJ36

56 GPIO_VGA_11
56 GPIO_VGA_12
56 GPIO_VGA_13

G
G#

GPU_TXBOUT0+ 18
GPU_TXBOUT0- 18

56 GPIO_VGA_08
56 GPIO_VGA_09

AU16
AV15

p.

DY

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

Thermal_int
GPIO_VGA_07_BLON

GPIO_VGA_06
GPIO_VGA_07_BLON

TP230

AU14
AV13
AT15
AR14

R
R#

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
DAC1
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCS#
GPIO_23_CLKREQ#
JTAG_TRST#
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
DAC2
GENERICF
GENERICG

GPU_TXBCLK+ 18
GPU_TXBCLK- 18

AJ38
AK37

ATI_BRIGHTNESS

LVTMDP

BLON_IN

TXOUT_U3P
TXOUT_U3N

AT33
AU32

R783
1
2
0R2J-2-GP

34

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

GPIO_VGA_03
GPIO_VGA_04

1
1

TP228
TP229
56 GPIO_VGA_05

AR32
AT31

DIS

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

//
m

2
R781
10KR2J-3-GP

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

AV31
AU30

SCL
SDA
GENERAL PURPOSE I/O

56 GPIO_VGA_00
56 GPIO_VGA_01
56 GPIO_VGA_02

AR30
AT29

AK35
AL36

18 LCD_EDID_CLK
18 LCD_EDID_DAT
3D3V_VGA

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

AK26
AJ26

TX5P_DPD0P
TX5M_DPD0N

HDMI_DATA2+ 7,20
HDMI_DATA2- 7,20

10R2J-2-GP

TX4P_DPD1P
TX4M_DPD1N

RN94
SRN0J-10-GP-U

DPD

I2C

4
3

TX3P_DPD2P
TX3M_DPD2N

DIS1

TXCDP_DPD3P
TXCDM_DPD3N

HDMI_DATA1+ 7,20
HDMI_DATA1- 7,20

HDMI_TX2P
HDMI_TX2M

TX2P_DPC0P
TX2M_DPC0N

RN93
SRN0J-10-GP-U

TX1P_DPC1P
TX1M_DPC1N

4
3

DPC

DIS1

DIS

R561 2

AK27
AJ27

TX0P_DPC2P
TX0M_DPC2N

HDMI_DATA0+ 7,20
HDMI_DATA0- 7,20

HDMI_TX1P
HDMI_TX1M

VARY_BL
DIGON

TXCCP_DPC3P
TXCCM_DPC3N

RN92
SRN0J-10-GP-U

TX5P_DPB0P
TX5M_DPB0N

4
3

TX4P_DPB1P
TX4M_DPB1N

AT27
AR26

DIS1
2

LVDS CONTROL

8
7
6
5

DPB

AU26
AV25

HDMI_CLK+ 7,20
HDMI_CLK- 7,20

1
2
3
4

TX3P_DPB2P
TX3M_DPB2N

HDMI_TX0P
HDMI_TX0M

RN91
SRN0J-10-GP-U

/x
/

TXCBP_DPB3P
TXCBM_DPB3N

AT25
AR24

4
3

su

TX2P_DPA0P
TX2M_DPA0N

DIS1

HYNIX-SAMSUNG-AMD

HYNIX-SAMSUNG-AMD

It's strap for GDDR3-136ball


Need to Clarify

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

HDMI_TXCAP
HDMI_TXCAM

om

2
1

2
R780

DY

R775

10KR2J-3-GP

AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

AU24
AV23

yc

1
1
2

1
2

1
2

DY

10KR2J-3-GP

HYNIX

(800MHz)
(800MHz)

DPA

TX1P_DPA1P
TX1M_DPA1N

R778

SAMSUNG

DVPDATA [3:0]
0100
1GB DDR3 Hynix-H5TQ1G63BFR-12C
1000
1GB DDR3 Samsung-K4W1G1646E-HC12
1100
AMD

R774

10KR2J-3-GP

10KR2J-3-GP

R779

10KR2J-3-GP

DVPDATA [3:2:1:0] for VRAM type


selection H/W strap
Should provide VRAM Table for VBios
request

R777
10KR2J-3-GP

HYNIX-AMD

MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3

10KR2J-3-GP

DIS

SCD1U16V2KX-3GP

DIS

C941

R773
10KR2J-3-GP

SAMSUNG-AMD

C939
SC1U10V2KX-1GP

SC10U6D3V3MX-GP

DIS

68.00084.F81
2ND = 68.00217.701

TX0P_DPA2P
TX0M_DPA2N

MUTI GFX
1D8V_VGA 1D8V_VGA 1D8V_VGA 1D8V_VGA

R776

C940

default brightness

7 OF 8

VGA1G

TXCAP_DPA3P
TXCAM_DPA3N

1
2
BLM15BD121SS1D-GP

DIS

2 OF 8

VGA1B

DIS

DPLL_VDDC

L37

C936

SC10U6D3V3MX-GP

DIS

SCD1U16V2KX-3GP

C935
SC1U10V2KX-1GP

C934

68.00084.F81 DIS
2ND = 68.00217.701

1
2
BLM15BD121SS1D-GP

1D8V_VGA

1V_VGA

DPLL_PVDD

L36

Madison ( 2 of 5 ) IO
JV71-MV DDR3 Madison

Document Number

Wednesday, October 28, 2009


1

Sheet

53

of

Rev

-1
62

1D8V_VGA

400mA

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

/x
/

C1027

DIS

C1026

DIS

C1025

DIS

C1024

DY

C1023

DIS

1
2

1
2

1
2

1
2

1
2

1
2

su

DIS

C1028

DY

C1029

VGA_CORE

DIS
1

DIS
C1036

C1035

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

DIS

C1034

DIS

C1037

VGA_CORE

4A
DIS
1

C1042

C1043

1
2

DIS

DIS

C1041

DIS

C1040

C1039

DIS

C1038

DIS

yc

//
m

tp
:
ht

1
2

1
1

2
1

1
2

p.

1
2

2
1
2

om

1
2

SC1U6D3V2KX-GP

2
1

1
2

1
1

1
2

1
1

1
2

1
1
2

2
1
2

1
2

1
2

1
1

1
2

1
2
1

1
2

2
1

C1022

SC2D2U6D3V2MX-GP

DIS

C1010
SC1U6D3V2KX-GP

DIS

C1009
SC1U6D3V2KX-GP

DIS

SC2D2U6D3V2MX-GP

MADISON-PRO-GP

DIS

C1008
SC1U6D3V2KX-GP

DIS

C1007

SC2D2U6D3V2MX-GP

FB_GND

C992

VGA_CORE

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

ISOLATED
CORE I/O

C1021

SC10U6D3V3MX-GP

M96

DIS

C1006

SC2D2U6D3V2MX-GP

FB_VDDCI

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

DIS

SC1U6D3V2KX-GP

DIS

C1005
SC1U6D3V2KX-GP

SPVSS

R862
0R2J-2-GP

BLM15BD121SS1D-GP

SC1U6D3V2KX-GP

SPV10

FB_VDDC

AH29

DIS

C991

SC10U6D3V3MX-GP

SPV18

C1020

SC2D2U6D3V2MX-GP

FB_GND

DIS

C1004
SC1U6D3V2KX-GP

AG28

SC1U6D3V2KX-GP

AF28

FB_VDDCI

DIS

C1003

SC10U6D3V3MX-GP

FB_VDDC

1
1

MPV18
MPV18

DIS

SC1U6D3V2KX-GP

TP253

C974

SC1U6D3V2KX-GP

TP252

TP254

40mA

VOLTAGE
SENESE

TPAD14-GP

DY

C1002

SC2D2U6D3V2MX-GP

AN9

AN10

DIS

C1001

SC10U6D3V3MX-GP

SPV18

DIS

C1000

SC10U6D3V3MX-GP

H7
H8

AM10

DIS

C999

SCD1U16V2KX-3GP

MPV18

TPAD14-GP

TPAD14-GP

L55

PLL
PCIE_PVDD

DIS

VGA_CORE

SCD1U16V2KX-3GP

CO-LAYOUT

VGA_CORE

AB37

PCIE_PVDD

SPV10

CO-LAYOUT

NC_VDDRHB
NC_VSSRHB

M96

C973

SC1U6D3V2KX-GP

R896
0R2J-2-GP

DIS

SC1U6D3V2KX-GP

M96

DIS

C998

SC2D2U6D3V2MX-GP

68.00084.F81
= 68.00217.611

NC_VDDRHA
NC_VSSRHA

V12
U12

DIS

C997

SC1U6D3V2KX-GP

R897
0R2J-2-GP
2ND

C951

68.00084.F81
DIS
2ND = 68.00217.701

SCD1U16V2KX-3GP

DIS

VDDRHB
VSSRHB

C990

SC1U6D3V2KX-GP

1
2
BLM15BD121SS1D-GP
C1061
SC1U6D3V2KX-GP

DIS

SC1U6D3V2KX-GP

M96

C1062

M20
M21

M96

DIS

C996

SC2D2U6D3V2MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

68.00084.F81
2ND = 68.00217.611

VDDRHA
VSSRHA
L57

1D5V_VGA

PCIE_PVDD

BLM15BD121SS1D-GP

VDDR4
VDDR4
VDDR4
VDDR4

M96 VRAM-CLK

C972

SC1U6D3V2KX-GP

M96

C971

DIS

SC1U6D3V2KX-GP

L56

1
2
BLM15BD121SS1D-GP

DIS

SC2D2U6D3V2MX-GP

1D5V_VGA

DIS

C1033

L47
2

VDDR4
VDDR4
VDDR4
VDDR4

AD12
AF11
AF12
AG11

19A

SC2D2U6D3V2MX-GP

SC1U6D3V2KX-GP

M96

VDDR3
VDDR3
VDDR3
VDDR3

AF13
AF15
AG13
AG15

C1019

C989

SC1U6D3V2KX-GP

I/O
AF23
AF24
AG23
AG24

DIS

SB1026
1D8V_VGA

VDD_CT
VDD_CT
VDD_CT
VDD_CT

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

DIS

SC1U6D3V2KX-GP

DIS

C1032

AF26
AF27
AG26
AG27

C988

DIS

SC1U6D3V2KX-GP

C1031

LEVEL
TRANSLATION

DIS

C1015

POWER

DIS

DIS

C1014

DIS

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC/BIF_VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC/BIF_VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
CORE

C982

1100mA
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

SC1U6D3V2KX-GP

C995

PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC

DIS

C981

1V_VGA

SC1U6D3V2KX-GP

DY

PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

DIS

C994

DIS

C970

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

DIS

C980

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DIS

C969

SCD1U16V2KX-3GP

C1030

C1018

DIS

C1013

SC1U6D3V2KX-GP

DIS

DIS

SC1U6D3V2KX-GP

1D8V_VGA

C986

SCD1U16V2KX-3GP

DY

C978
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DIS

C1017
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

DIS

C1012

SC1U6D3V2KX-GP

60mA

DIS

C1011

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

68.00084.F81
2ND = 68.00217.701

C1016

C977

C968

DIS

VDD_CT

DIS

DIS

DIS

DIS

C985
SC1U6D3V2KX-GP

C976

DIS

SCD1U16V2KX-3GP

DIS

DIS

C967
SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

C987

DIS

C984
SC1U6D3V2KX-GP

DIS

BLM15BD121SS1D-GP

3D3V_VGA

C983
SC1U6D3V2KX-GP

DIS

C975

DY

17mA

L41
1

DIS

C966

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

1D8V_VGA

C964

SC1U6D3V2KX-GP

C965

DY

SC1U6D3V2KX-GP

DIS

SC1U6D3V2KX-GP

C993

C963
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DIS

DIS

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

DY
SC1U6D3V2KX-GP

DY

C962

C979

SC1U6D3V2KX-GP

PCIE
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

DIS

C961
SCD1U16V2KX-3GP

MEM I/O

DY
5 OF 8

VGA1E

1D5V_VGA

DIS

M96

71.MDSON.M01

68.00084.F81
2ND = 68.00217.701

SPV18

L43

Madison-Park50mA

Madison-Park

C1053

C1052

Madison-Park

1
2

C1051

Madison-Park

1
2

Madison-Park

Madison-Park

1
2

Madison-Park

Madison-Park

C1050

C1054
SCD1U16V2KX-3GP

68.00084.F81
2ND = 68.00217.701

SC1U6D3V2KX-GP

C1049

SC1U6D3V2KX-GP

C1048

SC10U6D3V3MX-GP

C1047

SC1U6D3V2KX-GP

68.00084.F81
2ND = 68.00217.701

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

DIS

C1046

SCD1U16V2KX-3GP

DIS

C1045
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

DIS

C1044

SC10U6D3V3MX-GP

Madison-Park

MPV18

L44

150mA
Madison-Park
1
2
BLM15BD121SS1D-GP

BLM15BD121SS1D-GP

68.00084.F81
2ND = 68.00217.701

1D8V_VGA

1
2
BLM15BD121SS1D-GP

1D8V_VGA

SPV10

100mA

L42
1

Madison-Park

1V_VGA

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

Madison ( 3 of 5 ) POWER
Rev
-1
JV71-MV DDR3 Madison

Document Number

Wednesday, October 28, 2009


1

Sheet

54

of

62

6 OF 8

VGA1F

DPD_VDD18
DPD_VDD18

DPB_VDD18
DPB_VDD18

DPD_VDD10
DPD_VDD10

DPB_VDD10
DPB_VDD10

DPD_VSSR
DPD_VSSR
DPD_VSSR
DPD_VSSR
DPD_VSSR

DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR

p.
DPC_PVDD

MADISON-PRO-GP

DIS

Madison-Park
68.00084.F81
2ND = 68.00217.701

C1166

C1167

1D8V_VGA

L61

1
2

BLM15BD121SS1D-GP
C1084

20mA

1D8V_VGA

L54

BLM15BD121SS1D-GP
C1168

C1083

DIS

20mA

SC10U6D3V3MX-GP

DPEF_CALR

C1082

1D8V_VGA
1 R801
2
0R0603-PAD

SC10U6D3V3MX-GP

1 AM39

R802
150R2F-1-GP

DPD_PVDD

DPF_PVDD

SC1U6D3V2KX-GP

DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR

R858
0R2J-2-GP

DIS
2

AL38
AM35

SCD1U16V2KX-3GP

AF39
AH39
AK39
AL34
AM34

AM37
AN38

DPF_VDD10
DPF_VDD10

DPF_PVDD
DPF_PVSS

DIS

1D8V_VGA
1 R800
2
0R0603-PAD

20mA

120mA

1D8V_VGA
1 R799
2
0R0603-PAD

20mA

AV19
AR18

Madison-Park

AK33
AK34

68.00084.F81
2ND = 68.00217.701

DPE_PVDD

DPF_VDD18
DPF_VDD18

DPE_PVDD
DPE_PVSS
DPF_VDD10

DIS

20mA

Madison-Park

AF34
AG34

C1072

SC1U6D3V2KX-GP

DPD_PVDD
DPD_PVSS

DPF_VDD18

1D8V_VGA

L50

1
2
BLM15BD121SS1D-GP

DPD_PVDD

200mA

1DPF_PVSS

1
2
1

C1078

om

AU18
AV17

//
m

AN34
AP39
AR39
AU37

20mA

C1071

DPC_PVDD
DPC_PVSS

DPB_PVDD

C1070

DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR

AV29
AR28

20mA

DIS

yc

DPB_PVDD
DPB_PVSS

DPE_VDD10
DPE_VDD10

DPA_PVDD

AL33
AM33

AU28
AV27

DPE_VDD10

120mA

DPA_PVDD
DPA_PVSS

Madison-Park

200mA

DP PLL POWER

DPE_VDD18
DPE_VDD18

DIS

150R2F-1-GP
DP E/F POWER
AH34
AJ34

2
1

1
2
1
2
1

150R2F-1-GP

DIS
2

SCD1U16V2KX-3GP

AW28 1 R798

Madison-Park

1
2

1
2
1
2
1
2

DPAB_CALR

SC10U6D3V3MX-GP

DPCD_CALR

SC1U6D3V2KX-GP

DIS

1 AW18

DPE_VDD18

C1081
SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

C1079

DIS
C1080

AN29
AP29
AP30
AW30
AW32

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

DIS

R797

DIS

C1077

DIS
68.00214.091
2ND = 68.00206.341

DIS

C1069

SCD1U16V2KX-3GP

L53
1
2
HCB1608KF-1-GP

SC10U6D3V3MX-GP

1V_VGA

DIS
C1075
SCD1U16V2KX-3GP

DIS

DIS
C1074
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

L52

1
2
BLM15BD121SS1D-GP
C1076
DIS

C1068

SC1U6D3V2KX-GP

DIS
C1073

68.00214.091
2ND = 68.00206.341

DIS

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP

C1067

L51

68.00084.F81
2ND = 68.00217.701

DIS
2

1
2
HCB1608KF-1-GP

1D8V_VGA

DIS

ht

DIS

68.00084.F81
2ND = 68.00217.701

DIS

1 R796
2
0R0603-PAD

DPE_VDD18

L49
1
2
BLM15BD121SS1D-GP

1V_VGA

DPB_VDD10

110mA

110mA

Madison-Park

1V_VGA

AN19
AP18
AP19
AW20
AW22

DIS

2
0R2J-2-GP

130mA

AN33
AP33

1D8V_VGA

R861

DPB_VDD18

AP25
AP26

1V_VGA
1 R795
2
0R0603-PAD

1D8V_VGA

68.00214.091
2ND = 68.00206.341

DPD_VDD10

AP14
AP15

DIS

AP22
AP23

C1060

Madison-Park
C

DPD_VDD18

C1057

DIS

2
0R2J-2-GP

C1056

130mA

R859
1

tp
:

1D8V_VGA

110mA
AN27
AP27
AP28
AW24
AW26

/x
/

DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR

1
2
HCB1608KF-1-GP

su

DPC_VSSR
DPC_VSSR
DPC_VSSR
DPC_VSSR
DPC_VSSR

1V_VGA

L46

DIS

AN17
AP16
AP17
AW14
AW16

DIS

68.00084.F81
2ND = 68.00217.701

DIS

110mA

DIS

DPA_VDD10

AP31
AP32

AP13
AT13

DPC_VDD10

1 R794
2
0R0603-PAD

Madison-Park

SC10U6D3V3MX-GP

DPA_VDD10
DPA_VDD10

1V_VGA

SC1U6D3V2KX-GP

DPC_VDD10
DPC_VDD10

AN24
AP24

SCD1U16V2KX-3GP

DPA_VDD18
DPA_VDD18

DP A/B POWER

DPC_VDD18
DPC_VDD18

Madison-Park

DPC_VDD18 AP20
AP21

2
0R2J-2-GP

1D8V_VGA

L45

1
2
BLM15BD121SS1D-GP
C1055
SC10U6D3V3MX-GP

DP C/D POWER

R860
1

C1059
SC1U6D3V2KX-GP

8 OF 8

VGA1H

C1058
SCD1U16V2KX-3GP

130mA

130mA
1D8V_VGA

Madison-Park
Madison-Park

Madison-Park

DPA_VDD18

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

DIS
68.00084.F81
2ND = 68.00217.701

71.MDSON.M01

CO-LAYOUT

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MADISON-PRO-GP

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND/PX_EN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VSS_MECH
VSS_MECH
VSS_MECH

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

A39
AW1
AW39

VSS_MECH1
VSS_MECH2
VSS_MECH3

1
1
1

TP255 TPAD14-GP
TP256 TPAD14-GP
TP257 TPAD14-GP

DIS

71.MDSON.M01
JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Madison ( 4 of 5 ) DP POWER
Size
A2
Date:
5

Document Number

Rev

-1

JV71-MV DDR3 Madison


Wednesday, October 28, 2009
1

Sheet

55

of

62

MAA0_8
MAA1_8

CSA1#_0

K21
J20

57
58

CSA0#_0

57

CSA1#_0

58

DIS

1D5V_VGA

CKEA0
CKEA1

K26
L15

WEA0#
WEA1#

H23
J19

MAA13_R 1 R856

CKEA0
CKEA1

57
58

WEA0#
WEA1#

57
58

DIS

R807
100R2F-L1-GP-U

DIS

R808
40D2R2F-GP

MAA13

57,58

0R2J-2-GP

Madison

R817
100R2F-L1-GP-U

C1090 3D3V_VGA

DIS

DIS

yc
tp
:

(Internal PD)
RESERVED
BIF_VGA_DIS
RESERVED

BIOS_ROM_EN

GPIO8
GPIO9
GPIO21

GPIO22_ROMCSB

Transmitter De-emphasis Enable


0= Tx de-emphasis disabled
1= Tx de-emphasis enabled

RESERVED

VGA ENABLED

RESERVED

W10
AA10

CASB0#
CASB1#

P10
L10

CSB0#_0

AD10
AC10

CSB1#_0

U10
AA11

CKEB0
CKEB1

N10
AB11

WEB0#
WEB1#

T8
W8

MAB13_R

MADISON-PRO-GP

1D5V_VGA

AH11

DIS

need check M9x schematic

HW STRAP PIN
3D3V_VGA

DIS

128MB
256MB
64MB
32MB
512MB
1GB
2GB
4GB

x000
x001
x010
x
x
x
x
x

53 GPIO_VGA_01

R821 1

53 GPIO_VGA_02

R822 1

53 GPIO_VGA_05

R823 1

DIS

ST
Microelectronics

M25P05A
M25P10A
M25P20
M25P40
M25P80

0100
0101
0101
0101
0101

53 GPIO_VGA_08
53 GPIO_VGA_09

Chingis
(formerly PMC)

Pm25LV512A
Pm25LV010A

0100
0101

53 GPIO_VGA_11

53 GPIO_VGA_22

CASB0#
CASB1#

59
60

CSB0#_0

59

CSB1#_0

60

CKEB0
CKEB1

59
60

WDQSB[0..7]

59,60

59
60
2

MAB13

59,60

0R2J-2-GP

M96
1 R863
2
0R2J-2-GP
1 R818
2
680R2F-GP

R819

VRAM_RST

Madison-Park
C1091

57,58,59,60

C81

M96

2 10KR2J-3-GP

Madison-Park

Part Number GPIO[13,12,11]

59
60

59,60

2 10KR2J-3-GP

DIS

If BIOS_ROM_EN (GPIO22) = 1

60
60

RASB0#
RASB1#

RDQSB[0..7]

R81
4K7R2J-2-GP

71.MDSON.M01

R820 1

CLKB1
CLKB1#

59,60

Madison-Park

SB 1008

53 GPIO_VGA_00

59
59

1 R857

M96
M96

59
60

CLKB0
CLKB0#

WEB0#
WEB1#

R82

ENABLE EXTERNAL BIOS ROM

DRAM_RST#

RASB0#
RASB1#

M96

Size of the primary


GPIO[13,12,11] Manufacturer
memory apertures

CLKTESTA
CLKTESTB

CLKB1
CLKB1#

T10
Y10

H2SYNC, GENERICC, GPIO2, GPIO21

ht

GPIO1

M96

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

If BIOS_ROM_EN (GPIO22) = 0

TX_DEEMPH_EN

R616

MAB0_8
MAB1_8

AD8
AD7

ODTB0
ODTB1

DQMB#[0..7]

SC1KP50V2KX-1GP

TESTEN

CLKB0
CLKB0#

Madison-Park

(Internal PD)

Tansmitter Power Savings Enable


0= 50% Tx output swing
1= Full Tx output swing

AD28

ODTB0
ODTB1

L9
L8

SC68P50V2JN-1GP

GPIO0

CKEB0
CKEB1

T7
W7

10KR2F-2-GP

TX_PWRS_ENB

CSB1#_0
CSB1#_1

WDQSB0
WDQSB1
WDQSB2
WDQSB3
WDQSB4
WDQSB5
WDQSB6
WDQSB7

Madison-Park

PCIE FULL TX OUTPUT SWING


B

CSB0#_0
CSB0#_1

MVREFDB
MVREFSB

CLKTESTA AK10
CLKTESTB AL10
R615

AMD RESERVED CONFIGURATION STRAPS

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE

CASB0#
CASB1#

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

4K7R2J-2-GP

DESCRIPTION

R815

ATI-MP-M96

//
m

71.MDSON.M01

TESTEN

10KR2F-2-GP

ATI-ES

Y12
AA12

RASB0#
RASB1#

WEB0#
WEB1#

4K7R2F-GP

PIN

DIS

MVREFDB
MVREFSB

4K7R2F-GP

STRAPS

MADISON-PRO-GP

1 R900

1KR2J-1-GP

CO-LAYOUT
Madison: MEM_CALRP[0,2] signals are used.
Park: MEM_CALRP1 and MEM_CALRN1 are used

C1087

DIS

CLKB1
CLKB1#

RDQSB0
RDQSB1
RDQSB2
RDQSB3
RDQSB4
RDQSB5
RDQSB6
RDQSB7

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

M13
K16

CASA0#
CASA1#

R804
40D2R2F-GP

CLKB0
CLKB0#

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

59,60
59,60
59,60

WEA0#
WEA1#

K24
K27

CSA0#_0

57
58

ADBIB0/ODTB0
ADBIB1/ODTB1

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

CASA0#
CASA1#

58
58

RASA0#
RASA1#

100R

1D5V_VGA

H3
H1
T3
T5
AE4
AF5
AK6
AK5

CKEA0
CKEA1

K20
K17

CLKA1
CLKA1#

40.2R

100R

BB2
BB0
BB1

243R2F-2-GP

MVREFDA
MVREFSA

RASA0#
RASA1#

40.2R

100R

SCD1U16V2KX-3GP

1
Park-M96
243R2F-2-GP Madison
1
243R2F-2-GP Madison
1

MBM_CALRN0 L27
2
2 R809 MBM_CALRN1 N12
2 R810 MBM_CALRN2AG12
R812
MBM_CALRP1 M12
2
2 R813 MBM_CALRP0 M27
2 R814 MBM_CALRP2AH12
R816

CSA1#_0
CSA1#_1

CLKA1
CLKA1#

K23
K19

57
57

40.2R

MVREF TO GND

59,60

SB 0812

BB2
BB0
BB1

1
Madison
Park1
1
Madison

CSA0#_0
CSA0#_1

J14
H14

CLKA0
CLKA0#

MVREF TO PWR
57,58

DDBIB0_0/QSB_0#/WDQSB_0
DDBIB0_1/QSB_1#/WDQSB_1
DDBIB0_2/QSB_2#/WDQSB_2
DDBIB0_3/QSB_3#/WDQSB_3
DDBIB1_0/QSB_4#/WDQSB_4
DDBIB1_1/QSB_5#/WDQSB_5
DDBIB1_2/QSB_6#/WDQSB_6
DDBIB1_3/QSB_7#/WDQSB_7

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

1D5V_VGA
243R2F-2-GP
243R2F-2-GP
243R2F-2-GP

CASA0#
CASA1#

CLKA0
CLKA0#

57
58

DDR3

WCKB0_0/DQMB_0
WCKB0#_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0#_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1#_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1#_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

MAB[0..12]
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

C1089

L18
L20

RASA0#
RASA1#

H27
G27

WDQSA[0..7]
ODTA0
ODTA1

DIS

C1088

2
1

DIS

SCD1U16V2KX-3GP

R811
100R2F-L1-GP-U

SCD01U16V2KX-3GP

DIS

MVREFDA
MVREFSA

CLKA1
CLKA1#

ODTA0
ODTA1

GDDR3

1.8/1.5V 1.5V

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

GDDR5

1
R806
40D2R2F-GP

DIS

DIS

C1086
SCD1U16V2KX-3GP

DIS

SCD01U16V2KX-3GP

R805
100R2F-L1-GP-U

DIS

1D5V_VGA

C1085

DIS

CLKA0
CLKA0#

J21
G19

GDDR5
1.5V

DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63

R803
40D2R2F-GP

ADBIA0/ODTA0
ADBIA1/ODTA1

DIVIDER RESISTORS
MVREF

1D5V_VGA

57,58

100R

RDQSA[0..7]

100R

WDQSA0
WDQSA1
WDQSA2
WDQSA3
WDQSA4
WDQSA5
WDQSA6
WDQSA7

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

/x
/

100R

A34
E30
E26
C20
C16
C12
J11
F8

For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1.


For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1.

MVREF TO GND

DDBIA0_0/QSA_0#/WDQSA_0
DDBIA0_1/QSA_1#/WDQSA_1
DDBIA0_2/QSA_2#/WDQSA_2
DDBIA0_3/QSA_3#/WDQSA_3
DDBIA1_0/QSA_4#/WDQSA_4
DDBIA1_1/QSA_5#/WDQSA_5
DDBIA1_2/QSA_6#/WDQSA_6
DDBIA1_3/QSA_7#/WDQSA_7

40

40.2R

For Madison

100

40.2R

For M96-M2

R804/R808

1.8/1.5V 1.5V

40.2R

57,58

su

1.5V

MVREF TO PWR

Designator
DQMA#[0..7]

MVREF

RDQSA0
RDQSA1
RDQSA2
RDQSA3
RDQSA4
RDQSA5
RDQSA6
RDQSA7

DDR3

C34
D29
D25
E20
E16
E12
J10
D7

GDDR3

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

GDDR5

A32
C32
D23
E22
C14
A14
E10
D9

4 OF 8
DDR2
GDDR5/GDDR3
DDR3

VGA1D
DDR2
GDDR3/GDDR5
DDR3
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

57,58
57,58
57,58

p.

DIVIDER RESISTORS

BA2
BA0
BA1

For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1.


For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1.

BA2
BA0
BA1

59,60 MDB[0..63]

40

57,58

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12

om

For Madison

100

WCKA0_0/DQMA_0
WCKA0#_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0#_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1#_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1#_1/DQMA_7
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

MAA[0..12]
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

For M96-M2

R803/R806

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1

Designator

DQA0_0/DQA_0
DQA0_1/DQA_1
DQA0_2/DQA_2
DQA0_3/DQA_3
DQA0_4/DQA_4
DQA0_5/DQA_5
DQA0_6/DQA_6
DQA0_7/DQA_7
DQA0_8/DQA_8
DQA0_9/DQA_9
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63

GDDR5

C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

SCD1U16V2KX-3GP

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

MEMORY INTERFACE A

57,58 MDA[0..63]

3 OF 8
DDR2
GDDR5/GDDR3
DDR3

MEMORY INTERFACE B

VGA1C
DDR2
GDDR3/GDDR5
DDR3

2 10KR2J-3-GP
2 10KR2J-3-GP

DY

R824

R825

R826

R827

R828

2 10KR2J-3-GP

R829

2 10KR2J-3-GP

DY
DIS

2 10KR2J-3-GP
2 10KR2J-3-GP
2 10KR2J-3-GP

DY

2 10KR2J-3-GP

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

VIP_DEVICE_STRAP_ENA
GPIO[13,12,11]

(Internal PD)

X X X

if BIOS_ROM_EN=1,then Config[3:0]
defines the ROM type
if BIOS_ROM_EN=0,then Config[3:0]
defines the primary memory apeture size

19,53 CRT_VSYNC

RSVD

V2SYNC

RSVD

H2SYNC

AUD[1]
AUD[0]

VGA_HSYNC
VGA_VSYNC

(Internal PD)

19,53 CRT_HSYNC

AUD[1:0]
00:No audio function
01:Audio for DisplayPort and HDMI
( if adapter is detected)
10:Audio for DisplayPort only
11:Audio for both DisplayPort and HDMI

53 GPIO_VGA_12
53 GPIO_VGA_13

DIS

DIS
R830

R831

2 10KR2J-3-GP

DY
2 10KR2J-3-GP

DY

X
X
JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Madison ( 5 of 5 ) MEMORY/ST
Size
A2
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison


Wednesday, October 28, 2009
1

Sheet

56

-1
of

62

DDR3

2
1

2
1

1
2
1

Madison-M96
1
2

Madison-M96

DIS

C1172

C1171

2
1

Madison-M96

Madison-M96

C1066

Madison-M96

2
1
2

Madison-M96
1
2

Madison-M96

C1173

DIS

C1118

1
2

1
2

Madison-M96
1
2
1
2

C1117

C1169

Madison-M96

1
2

Madison-M96
1
2
1
2

Madison-M96
1
2

Madison-M96

1
2

Madison-M96
1
2

Madison-M96
1

1
2
1
2
1
2

1
2

Madison-M96
1
2
1
2

2
1

DIS

DIS

C1111

DIS

CLKA0#

1D5V_VGA

56R2F-1-GP

R836
1K05R2F-GP

Madison-M96

C1123
SCD01U50V2KX-1GP

R837
1K05R2F-GP

Madison-M96

Madison-M96

C1124
SCD01U50V2KX-1GP

MAA_VREF12

Madison-M96
2

Madison-M96
2

Madison-M96

R835

CLKA0
R834
56R2F-1-GP

56,58 RDQSA[0..7]

Madison-M96

/x
/

su

72.41164.H0U

HYUNIX 1ST=72.51G63.C0U
SAMSUNG 2ND=72.41164.H0U
AMD
3RD=VR.1GB0T.002

56,58 DQMA#[0..7]

C1122

C1116

C1110

Madison-M96

ht

72.41164.H0U

DIS

C1121

K4W 1G1646E-HC12-GP

tp
:

Madison-M96

DIS

C1120

WE#
CAS#
RAS#

C1119

Madison-M96

L3
K3
J3

G1
F9
E8
E2
D8
D1
B9
B1
G9

W EA0#
CASA0#
RASA0#

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML

Madison-M96

CKE

D3
E7

K9

DQMA#0
DQMA#1

CK
CK#

DIS

C1115

DIS

C1109

SC10U6D3V3MX-GP

W EA0#
CASA0#
RASA0#

p.

J7
K7

CKEA0

DIS

C1114

C1108

SCD1U10V2KX-5GP

CLKA0
CLKA0#

C1113

DIS

C1107

DIS

SC1U6D3V2KX-GP

BA0
BA1
BA2

C1112

DIS

C1106

DIS

C1101

SCD1U10V2KX-5GP

M2
N8
M3

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

C1105

C1100
SC1U6D3V2KX-GP

K4W 1G1646E-HC12-GP

BA0
BA1
BA2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DIS

C1104

SC10U6D3V3MX-GP

56
56
56

56,58,59,60

C1103

SCD1U10V2KX-5GP

DQMA#0
DQMA#1

VRAM_RST

C1102

SC10U6D3V3MX-GP

56
56

T7
L9
L1
J9
J1

56

DIS

SC1U6D3V2KX-GP

CKEA0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

CSA0#_0

C1099

SCD1U10V2KX-5GP

56

CLKA0
CLKA0#

CSA0#_0

SCD1U10V2KX-5GP

56
56

BA0
BA1
BA2

L2
T2

56

SC1U6D3V2KX-GP

56,58
56,58
56,58

CS#
RESET#

56
56

ODTA0

SC10U6D3V3MX-GP

G1
F9
E8
E2
D8
D1
B9
B1
G9

MAA13

RDQSA1
W DQSA1

SCD1U10V2KX-5GP

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

CKE

56,58

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

ODTA0

SCD1U10V2KX-5GP

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

56,58,59,60

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

K1

C1098

SC1U6D3V2KX-GP

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VRAM_RST

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

ODT

DIS

SC1U6D3V2KX-GP

T7
L9
L1
J9
J1

56

RDQSA1
W DQSA1

DIS

C1097

SCD1U10V2KX-5GP

WE#
CAS#
RAS#

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

CSA0#_0

F3
G3

56
56

C1096

SCD1U10V2KX-5GP

L3
K3
J3

CSA0#_0

Madison-M96

DQSL
DQSL#

RDQSA0
W DQSA0

C1095

SC1U6D3V2KX-GP

W EA0#
CASA0#
RASA0#

L2
T2

56

RDQSA0
W DQSA0

C1094

SC1U6D3V2KX-GP

DMU
DML

CS#
RESET#

ODTA0

1MAA_ZQ1
243R2F-2-GP

C7
B7

C1093

SCD1U10V2KX-5GP

W EA0#
CASA0#
RASA0#

D3
E7

ODTA0

DQSU
DQSU#

C1092

SC1U6D3V2KX-GP

56
56
56

K9

DQMA#3
DQMA#2

K1

56
56

VREFDQ
VREFCA
ZQ

2.16A

1D5V_VGA

MDA0~7

SC1U6D3V2KX-GP

DQMA#3
DQMA#2

CK
CK#

ODT

RDQSA2
W DQSA2

H1
M8
L8

MDA4
MDA0
MDA7
MDA3
MDA5
MDA1
MDA6
MDA2

SC1U6D3V2KX-GP

56
56

J7
K7

CKEA0

RDQSA2
W DQSA2

MAA_VREF12

R833

D7
C3
C8
C2
A7
A2
B8
A3

SCD1U10V2KX-5GP

CKEA0

CLKA0
CLKA0#

F3
G3

56
56

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

SCD1U10V2KX-5GP

56

BA0
BA1
BA2

DQSL
DQSL#

RDQSA3
W DQSA3

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

SCD1U10V2KX-5GP

CLKA0
CLKA0#

M2
N8
M3

RDQSA3
W DQSA3

A8
A1
C1
C9
D2
E9
F1
H9
H2

MDA8~15

SCD1U10V2KX-5GP

56
56

BA0
BA1
BA2

BA0
BA1
BA2

C7
B7

MDA24~31

MDA11
MDA14
MDA8
MDA12
MDA9
MDA13
MDA10
MDA15

SCD1U10V2KX-5GP

56,58
56,58
56,58

MAA13

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

DQSU
DQSU#

1D5V_VGA

E3
F7
F2
F8
H3
H8
G2
H7

SCD1U10V2KX-5GP

56,58

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

MDA27
MDA28
MDA30
MDA24
MDA25
MDA31
MDA26
MDA29

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

SCD1U10V2KX-5GP

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

D7
C3
C8
C2
A7
A2
B8
A3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

SC1U6D3V2KX-GP

Madison-M96

VREFDQ
VREFCA
ZQ

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

MDA16~23

K8
K2
N1
R9
B2
D9
G7
R1
N9

SC1U6D3V2KX-GP

MAA_ZQ0

1
243R2F-2-GP

H1
M8
L8

MDA19
MDA18
MDA23
MDA22
MDA16
MDA20
MDA21
MDA17

SC1U6D3V2KX-GP

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

E3
F7
F2
F8
H3
H8
G2
H7

SC1U6D3V2KX-GP

MAA_VREF12

R832

A8
A1
C1
C9
D2
E9
F1
H9
H2

FBRAM2

1D5V_VGA

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

om

1D5V_VGA

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

yc

K8
K2
N1
R9
B2
D9
G7
R1
N9

SB 0818

FBRAM1

//
m

1D5V_VGA

56,58 W DQSA[0..7]
A

56,58

JV71-MV DDR3 Madison

MAA[0..12]

MAA[0..12]

Wistron Corporation

MDA[0..63]

56,58 MDA[0..63]

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM( 1 of 4 )
Size
A3
Date:
5

Document Number

Rev

-1

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
1

57

of

62

DDR3

56
56

DQMA#4
DQMA#5

56
56
56

W EA1#
CASA1#
RASA1#

J7
K7

CK
CK#

CKEA1

K9

CKE

DQMA#4
DQMA#5

D3
E7

DMU
DML

W EA1#
CASA1#
RASA1#

L3
K3
J3

WE#
CAS#
RAS#

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

CSA1#_0

56

VRAM_RST

56,57,59,60

Madison-M96

56,57

56,57
56,57
56,57

56
56

MAA13

BA0
BA1
BA2

CLKA1
CLKA1#

56

G1
F9
E8
E2
D8
D1
B9
B1
G9

56
56
56
56
56

DQMA#7
DQMA#6
W EA1#
CASA1#
RASA1#

Madison-M96

DQSL
DQSL#

F3
G3

RDQSA6
W DQSA6

ODT

K1

ODTA1

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

CS#
RESET#

L2
T2

CSA1#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKA1
CLKA1#

J7
K7

CK
CK#

CKEA1

K9

CKE
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

DQMA#7
DQMA#6

D3
E7

DMU
DML

W EA1#
CASA1#
RASA1#

L3
K3
J3

WE#
CAS#
RAS#

RDQSA7
W DQSA7

56
56

RDQSA6
W DQSA6

56
56

ODTA1

56

CSA1#_0

56

VRAM_RST

56,57,59,60
C

CLKA1#
CLKA1
R840

Madison-M96

Madison-M96

C1125
SCD01U50V2KX-1GP
B

1D5V_VGA

1
R842
1K05R2F-GP

HYUNIX 1ST=72.51G63.C0U
SAMSUNG 2ND=72.41164.H0U
AMD
3RD=VR.1GB0T.002

MAA_VREF34
R843
1K05R2F-GP

Madison-M96

Madison-M96

C1126
SCD01U50V2KX-1GP

56,57 RDQSA[0..7]

Madison-M96

72.41164.H0U

Madison-M96

56,57 DQMA#[0..7]

R841

Madison-M96

ht

72.41164.H0U

RDQSA7
W DQSA7

K4W 1G1646E-HC12-GP

tp
:

K4W 1G1646E-HC12-GP

CKEA1

C7
B7

CKEA1

CLKA1
CLKA1#

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

CSA1#_0

56

DQSU
DQSU#

56

BA0
BA1
BA2

L2
T2

ODTA1

2 R838
1MAA_ZQ3
243R2F-2-GP

VREFDQ
VREFCA
ZQ

56R2F-1-GP

CLKA1
CLKA1#

M2
N8
M3

CS#
RESET#

ODTA1

56
56

H1
M8
L8

56R2F-1-GP

56
56

BA0
BA1
BA2

K1

RDQSA5
W DQSA5

MAA_VREF34

MDA56~63

BA0
BA1
BA2

ODT

RDQSA5
W DQSA5

56
56

MDA61
MDA62
MDA58
MDA56
MDA60
MDA59
MDA57
MDA63

56,57
56,57
56,57

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

F3
G3

RDQSA4
W DQSA4

D7
C3
C8
C2
A7
A2
B8
A3

56,57

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

DQSL
DQSL#

RDQSA4
W DQSA4

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

MDA48~55

243R2F-2-GP
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA13

C7
B7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

MDA55
MDA51
MDA53
MDA48
MDA52
MDA50
MDA54
MDA49

Madison-M96

DQSU
DQSU#

MDA32~39

A8
A1
C1
C9
D2
E9
F1
H9
H2

E3
F7
F2
F8
H3
H8
G2
H7

1MAA_ZQ2

VREFDQ
VREFCA
ZQ

MDA36
MDA35
MDA39
MDA33
MDA37
MDA32
MDA38
MDA34

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

/x
/

2 R839

H1
M8
L8

D7
C3
C8
C2
A7
A2
B8
A3

1D5V_VGA

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

su

MAA_VREF34

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

MDA40~47

K8
K2
N1
R9
B2
D9
G7
R1
N9

p.

A8
A1
C1
C9
D2
E9
F1
H9
H2

E3
F7
F2
F8
H3
H8
G2
H7

om

1D5V_VGA

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

yc

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

MDA43
MDA44
MDA42
MDA46
MDA40
MDA47
MDA41
MDA45

//
m

K8
K2
N1
R9
B2
D9
G7
R1
N9

FBRAM4

1D5V_VGA

FBRAM3

1D5V_VGA

56,57 W DQSA[0..7]
56,57

MAA[0..12]

MAA[0..12]

JV71-MV DDR3 Madison


56,57 MDA[0..63]

MDA[0..63]

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM( 2 fo 4 )
Size
A3
Date:
5

Document Number

Rev

-1

JV71-MV DDR3 Madison


W ednesday, October 28, 2009

Sheet
1

58

of

62

DDR3

56
56

DQMB#3
DQMB#2

56
56
56

W EB0#
CASB0#
RASB0#

J7
K7

CK
CK#

CKEB0

K9

CKE

DQMB#3
DQMB#2

D3
E7

DMU
DML

W EB0#
CASB0#
RASB0#

L3
K3
J3

WE#
CAS#
RAS#

ODTB0

CS#
RESET#

L2
T2

CSB0#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

RDQSB2
W DQSB2

56
56

ODTB0

56

CSB0#_0

56

VRAM_RST

2 R845
1MAB_ZQ1
243R2F-2-GP

DIS

56,57,58,60

56,60

56,60
56,60
56,60

MAB13

72.41164.H0U

CLKB0
CLKB0#

56

CKEB0

56
56

DQMB#0
DQMB#1

56
56
56

W EB0#
CASB0#
RASB0#

DQSU
DQSU#

C7
B7

RDQSB0
W DQSB0

DQSL
DQSL#

F3
G3

RDQSB1
W DQSB1

ODT

K1

ODTB0

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

CS#
RESET#

L2
T2

CSB0#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

BB0
BB1
BB2

M2
N8
M3

BA0
BA1
BA2

CLKB0
CLKB0#

J7
K7

CK
CK#

CKEB0

K9

CKE
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

DQMB#0
DQMB#1

D3
E7

DMU
DML

W EB0#
CASB0#
RASB0#

L3
K3
J3

WE#
CAS#
RAS#

RDQSB0
W DQSB0

56
56

RDQSB1
W DQSB1

56
56

ODTB0

56

CSB0#_0

56

VRAM_RST

56,57,58,60
C

CLKB0#
CLKB0
R846

DIS

K4W 1G1646E-HC12-GP

C1127
SCD01U50V2KX-1GP

DIS
1D5V_VGA

1
R848
1K05R2F-GP

DIS
1

MAB_VREF12
R849
1K05R2F-GP

56,60 RDQSB[0..7]

DIS

MAB[0..12]

C1128
SCD01U50V2KX-1GP

DIS

56,60 W DQSB[0..7]
56,60

DIS

HYUNIX 1ST=72.51G63.C0U
SAMSUNG 2ND=72.41164.H0U
AMD
3RD=VR.1GB0T.002

56,60 DQMB#[0..7]

R847

DIS

72.41164.H0U

ht

DIS

BB0
BB1
BB2

56
56

tp
:

K4W 1G1646E-HC12-GP

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

VREFDQ
VREFCA
ZQ

MDA0~7

CKEB0

CLKB0
CLKB0#

K1

H1
M8
L8

MDB4
MDB3
MDB7
MDB0
MDB5
MDB1
MDB6
MDB2

56

BA0
BA1
BA2

ODT

MAB_VREF12

D7
C3
C8
C2
A7
A2
B8
A3

56R2F-1-GP

CLKB0
CLKB0#

M2
N8
M3

RDQSB2
W DQSB2

56
56

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

56R2F-1-GP

56
56

BB0
BB1
BB2

DQSL
DQSL#

F3
G3

RDQSB3
W DQSB3

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

BB0
BB1
BB2

RDQSB3
W DQSB3

A8
A1
C1
C9
D2
E9
F1
H9
H2

MDA8~15

56,60
56,60
56,60

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

C7
B7

MDA24~31

MDB11
MDB14
MDB8
MDB10
MDB15
MDB13
MDB9
MDB12

MAB13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

DQSU
DQSU#

1D5V_VGA

E3
F7
F2
F8
H3
H8
G2
H7

56,60

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

MDB30
MDB27
MDB25
MDB28
MDB24
MDB31
MDB29
MDB26

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VREFDQ
VREFCA
ZQ

D7
C3
C8
C2
A7
A2
B8
A3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

/x
/

DIS

H1
M8
L8

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

MDA16~23

K8
K2
N1
R9
B2
D9
G7
R1
N9

su

2 R844
1MAB_ZQ0
243R2F-2-GP

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

MDB21
MDB20
MDB22
MDB16
MDB19
MDB17
MDB23
MDB18

p.

MAB_VREF12

A8
A1
C1
C9
D2
E9
F1
H9
H2

E3
F7
F2
F8
H3
H8
G2
H7

om

1D5V_VGA

FBRAM6

1D5V_VGA

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

yc

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

//
m

K8
K2
N1
R9
B2
D9
G7
R1
N9

FBRAM5

1D5V_VGA

MAB[0..12]
JV71-MV DDR3 Madison

MDB[0..63]

56,60 MDB[0..63]

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM( 3 of 4 )
Size
A3
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

59

-1
of

62

DDR3

56

CKEB1

56
56
56

W EB1#
CASB1#
RASB1#

J7
K7

CK
CK#

CKEB1

K9

DQMB#4
DQMB#5

D3
E7

DMU
DML

W EB1#
CASB1#
RASB1#

L3
K3
J3

WE#
CAS#
RAS#

ODTB1

CS#
RESET#

L2
T2

CSB1#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

CKE

RDQSB5
W DQSB5

56
56

ODTB1

56

CSB1#_0

56

VRAM_RST

56,57,58,59

1MAB_ZQ3
243R2F-2-GP

DIS

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

56,59

MAB13

56,59
56,59
56,59

BB0
BB1
BB2

56
56

CLKB1
CLKB1#

56

CKEB1

56
56

DQMB#7
DQMB#6

56
56
56

W EB1#
CASB1#
RASB1#

C7
B7

RDQSB7
W DQSB7

DQSL
DQSL#

F3
G3

RDQSB6
W DQSB6

K1

ODTB1

CS#
RESET#

L2
T2

CSB1#_0

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

ODT

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

BB0
BB1
BB2

M2
N8
M3

BA0
BA1
BA2

CLKB1
CLKB1#

J7
K7

CK
CK#

CKEB1

K9

CKE

DQMB#7
DQMB#6

D3
E7

DMU
DML

W EB1#
CASB1#
RASB1#

L3
K3
J3

WE#
CAS#
RAS#

RDQSB7
W DQSB7

56
56

RDQSB6
W DQSB6

56
56

ODTB1

56

CSB1#_0

56

VRAM_RST

56,57,58,59
C

CLKB1#
CLKB1
R852

DIS

C1129
SCD01U50V2KX-1GP

DIS

DIS
1D5V_VGA

1
R854
1K05R2F-GP

HYUNIX 1ST=72.51G63.C0U
SAMSUNG 2ND=72.41164.H0U
AMD
3RD=VR.1GB0T.002

DIS
MAB_VREF34

56,59 DQMB#[0..7]

R853

DIS

72.41164.H0U

ht

DIS

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

DQSU
DQSU#

K4W 1G1646E-HC12-GP

tp
:

K4W 1G1646E-HC12-GP

72.41164.H0U

VREFDQ
VREFCA
ZQ

MDA56~63

56R2F-1-GP

DQMB#4
DQMB#5

CLKB1
CLKB1#

K1

H1
M8
L8

MDB61
MDB59
MDB63
MDB56
MDB60
MDB58
MDB62
MDB57

56R2F-1-GP

56
56

BA0
BA1
BA2

ODT

MAB_VREF34

R851

D7
C3
C8
C2
A7
A2
B8
A3

CLKB1
CLKB1#

M2
N8
M3

RDQSB5
W DQSB5

56
56

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

R855
1K05R2F-GP

56,59 RDQSB[0..7]

56
56

BB0
BB1
BB2

DQSL
DQSL#

F3
G3

RDQSB4
W DQSB4

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

BB0
BB1
BB2

RDQSB4
W DQSB4

A8
A1
C1
C9
D2
E9
F1
H9
H2

MDA48~55

56,59
56,59
56,59

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

C7
B7

MDA32~39

MDB52
MDB50
MDB48
MDB49
MDB53
MDB54
MDB51
MDB55

MAB13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

DQSU
DQSU#

1D5V_VGA

E3
F7
F2
F8
H3
H8
G2
H7

56,59

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

MDB37
MDB35
MDB34
MDB39
MDB38
MDB32
MDB36
MDB33

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VREFDQ
VREFCA
ZQ

D7
C3
C8
C2
A7
A2
B8
A3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DIS

H1
M8
L8

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

MDA40~47

K8
K2
N1
R9
B2
D9
G7
R1
N9

su

2 R850
1MAB_ZQ2
243R2F-2-GP

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

MDB42
MDB41
MDB46
MDB43
MDB44
MDB40
MDB47
MDB45

p.

MAB_VREF34

A8
A1
C1
C9
D2
E9
F1
H9
H2

E3
F7
F2
F8
H3
H8
G2
H7

om

1D5V_VGA

FBRAM8

1D5V_VGA

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

yc

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

//
m

K8
K2
N1
R9
B2
D9
G7
R1
N9

/x
/

FBRAM7

1D5V_VGA

DIS

56,59

MAB[0..12]

DIS

56,59 W DQSB[0..7]

C1130
SCD01U50V2KX-1GP

MAB[0..12]
JV71-MV DDR3 Madison

MDB[0..63]

56,59 MDB[0..63]

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM( 4 of 4 )
Size
A3
Date:
5

Document Number

Rev

JV71-MV DDR3 Madison

W ednesday, October 28, 2009

Sheet
1

60

of

-1
62

SA

SB

SC

-1

su

/x
/

//
m

yc

om

p.

ht

tp
:

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HISTORY
Size
A2
Date:
5

Document Number

Rev

-1

JV71-MV DDR3 Madison


Wednesday, October 28, 2009
1

Sheet

61

of

62

DY,ZZ,65

GFX

NOGFX

DIS

M96

Madison

Madison-M96

Madison-Park

Park

Park-M96

UMA

Hynix

Hynix-AMD

Hynix-Samsung-AMD

Samsung

Samsung-AMD

ATI-ES

ATI-MP-M96

SKU C PM45
Park
Hynix

NB

KI.G4501.002

KI.G4501.002

KI.G4501.002

KI.G4501.001

SB1

KI.80101.030

KI.80101.030

KI.80101.030

KI.80101.030

VGA

VGA1

71.M96M2.M03

71.MDSON.M01

71.0PARK.M04

Delete C741 78.10423.5FL

VRAM FBRAM1~4

VR.1GB0B.006

VR.1GB0G.004

Change R429 from 64.75025.6DL to 64.49925.6DL

VRAM FBRAM5~8

VR.1GB0B.006

VR.1GB0G.004

VR.1GB0G.004

R885

64.78715.6DL

R887

64.20525.6DL

VGA_CORE R428

64.30025.6DL

64.73225.6DL

64.49925.6DL

RGB

78.6R874.1FL

C165,151,108

66.75036.08L

CRT

RN30

66.15156.08L

68.HD081.30B

68.HD081.30B

68.HD081.30B

68.HD081.30B

Change U75 from 84.07672.037 to 84.01712.037

R803

64.10005.6DL

Change U76 from 84.07672.037 to 84.01712.037

MVREFSA

R806

64.10005.6DL

MVREFDB

R804

64.10005.6DL

MVREFSB

R808

64.10005.6DL

DCIN1

22.10037.I21

22.10037.I21

65.4FXZZ.024

65.4FXZZ.024

65.4FXZZ.024

65.4FXZZ.032

Change U17 from 84.07672.037 to 84.01712.037

65.4FXZZ.026

65.4FXZZ.026

65.4FXZZ.026

65.4FXZZ.026

Change U40 from 84.07672.037 to 84.01712.037

65.4FXZZ.029

65.4FXZZ.032

65.4FXZZ.033

NOGFX

DIS

M96

Madison

Madison-M96

Madison-Park

Park

Park-M96

UMA

Hynix

Hynix-AMD

Hynix-Samsung-AMD

Samsung

Samsung-AMD

ATI-ES

ATI-MP-M96

Change U41 from 84.08692.037 to 84.01426.037

65.4FXZZ.028

Change TC35 from 79.33719.L01 to 77.C3371.051


Change TC36 from 79.33719.L01 to 77.C3371.051
Change TC38 from 79.33719.L01 to 77.C3371.051

SKU G PM45
Park
Samsung

Change TC14 from 79.33719.L01 to 77.C3371.051


Change TC15 from 79.33719.L01 to 77.C3371.051

NB

NB1

KI.G4501.002

KI.G4501.002

KI.G4501.002

Change L58 from 68.R5610.10P to 68.R5610.10D

SB

SB1

KI.80101.030

KI.80101.030

KI.80101.030

Change L59 from 68.1R01B.10J to 68.1R01A.20A

VGA

VGA1

71.M96M2.M03

71.MDSON.M01

71.0PARK.M04

VR.1GB0G.004

VR.1GB0B.006

VRAM FBRAM1~4
VRAM FBRAM5~8

VR.1GB0G.004

VR.1GB0B.006

VR.1GB0B.006

64.78715.6DL

64.20525.6DL

VGA_CORE R428

64.30025.6DL

64.73225.6DL

64.49925.6DL

TVDAC

RN31

CRT

RN30

1v_VGA/1.1v_VGA
R885
R887

TRANSFORMER XF1~2

68.HD081.30B

68.HD081.30B

68.HD081.30B

MVREFDA

R803

64.10005.6DL

MVREFSA

R806

64.10005.6DL

MVREFDB

R804

64.10005.6DL

MVREFSB

R808

64.10005.6DL

90W/65W

DCIN1

22.10037.I21

22.10037.I21

65.4FXZZ.024

65.4FXZZ.024

65.4FXZZ.024

65.4FXZZ.026

65.4FXZZ.026

65.4FXZZ.026

65BOM

Change U79 from 84.07672.037 to 84.01712.037

yc

Part Name

SKU F PM45
Madison
Samsung

//
m

SKU E PM45
M96
Hynix

Change U77 from 84.08692.037 to 84.01426.037

om

65.4FXZZ.028

GFX

SKU-B change for Power-Team 2nd source


Change U73 from 84.08692.037 to 84.01426.037

MVREFDA

TRANSFORMER XF1~2

65.4FXZZ.027

Delete C741 78.10423.5FL


Change R429 from 64.75025.6DL to 64.37425.6DL

65.4FXZZ.026

84.27002.W31

Delete R436 63.10334.1DL

RN31

65BOM

Delete Q27

TVDAC

90W/65W

DY,ZZ,65

SKU-C
Delete R428 64.15035.6DL

1v_VGA/1.1v_VGA

65 2nd

SKU G

84.27002.W31

SB

65.4FXZZ.025

SKU F

LAB-Stage BOM temporary change list


SKU-A,B
Delete R428 64.15035.6DL

Delete R436 63.10334.1DL

65.4FXZZ.024

SKU E

Delete Q27
NB1

65 Main

Group Name

SKU B PM45
Madison
Hynix

SKU D GM45
UMA

Part Name

SKU A PM45
M96
Samsung

/x
/

SKU D

su

SKU C

p.

SKU B

ht

SKU A

tp
:

Group Name

Change L19 from 68.R5610.10P to 68.R5610.10D

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HISTORY
Size
A2
Date:
5

Document Number

Rev

-1

JV71-MV DDR3 Madison


Thursday, November 05, 2009
1

Sheet

62

of

62

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