Ei-2406 Isd Lab Manual (2013)

DEPARTMENT OF EIE EI2406 - INSTRUMENTATION SYSTEM DESIGN LAB
INDEX
SL.NO Date Name of the Experiments Marks Staff Signature
EI2406 INS!"MEN#ION S$SEM DESI%N L#&
ISO 9001:2008 Page 1 JEPPIAAR ENGINEERING OLLEGE
List of Experiments
1. Design and Implementation of instrumentation amplifier.
2. Design and implementation of active filter.
3. Design and implementation of V/I and I/V converters.
4. Design and implementation of cold junction compensation circuit for
thermocouple.
5. Design and implementation of signal conditioning circuits for !D.
". Design of orifice plate
#. Design of rotameter.
$. Design of control valve %&i'ing and flo( lift characteristics).
*. Design of +ID controller%,sing operational amplifier and microprocessor)
1-.+iping and Instrumentation Diagram .ase stud/.
11.+reparation of documentation of instrumentation project%+rocess flo( sheet0
instrumentation inde1 sheet and instrument specifications sheet)
'in Diagram(
)ir*uit Diagram(
+. INS!"MEN#ION #M'LI,IE!
#im(
!o design an instrumentation amplifier.
ISO 9001:2008 Page ! JEPPIAAR ENGINEERING OLLEGE
#pparatus re-uire.(
&2.34 I!56 &+5.I7I.8!I43 9,83!I!:
1
2
3
4
5
"
I.
esistors
egulated po(er suppl/
Voltmeter
;read <oard
D;
#41
4.#=>0 1=>
%- 15)V
D. voltmeter
??
3
20 4
2
1
1
'ro*e.ure(
1. 7ind @ to get reAuired output voltage.
2. Bive the connections as per circuit diagram.
3. Var/ the input voltage.
4. 4<serve the output voltage and compare them (ith the theoretical values.
,ormu/a(
V
-
C D %
2
/
1
) %1E2/g) Vd
heor0(
In industrial and consumer applications0 the ph/sical Auantities such as temperature0
+ressure0 Fumidit/0 2ight intensit/0 Gater flo( etc are measured (ith the help of
transducers. !he output of transducer has to <e amplified so that it can drive the indicator or
displa/ s/stem. 8n instrumentation amplifier performs this function. !he important features
of an instrumentation amplifier are 1) high accurac/ 2) high .6 3) high gain sta<ilit/
(ith lo( temperature coefficient 4) lo( D. offset 5) lo( impedance.
ISO 9001:2008 Page " JEPPIAAR ENGINEERING OLLEGE
a1u/ar *o/umn(
&2.34 g V
1
V
2
VdC %V
1
DV
2
) V
-
%!heoretical)
V
-
%practical)
1
2
3
4
5
!esu/t(
!hus the instrumentation amplifier (as designed and for various changes in resistance
of g the output (as o<served.

)ir*uit Diagram(
1. 2o( +ass 7ilterH
2. DESI%N O, #)I2E ,ILE!S
#im(
!o stud/ and design an active filter using operational amplifier
circuit.
#pparatus !e-uire.(
1. esistor 1-=0 1.5*=0 5.$"=
ISO 9001:2008 Page # JEPPIAAR ENGINEERING OLLEGE
2. .apacitor -.1I7
3. +&
4. I. #41
5. 7unction Benerator.
'ro*e.ure(
1. .onnect the circuit diagram for 2o( pass and Figh pass filter as sho(n.
2. 3o( input signal %sine (ave) at particular freAuenc/ is applied.
3. !he different freAuencies is applied to the circuit is noted and corresponding
output voltage is noted.
4. Braph is dra(n for freAuenc/ Vs 4utput voltage.
)ir*uit Diagram(
2. Figh +ass 7ilterH
heor0(
2o( pass 7ilterH
V- C
6agnitude of esponse0

ecalling that magnitude of a comple1 num<er is sAuare root of sum of
sAuares of real and imaginar/ parts. !here are also phase shifts associated
(ith the transfer function Vo/Vi throughout. !his is o<viousl/ a lo( pass
i.e lo( freAuenc/ signals are passed and high freAuencies are <locJed. If
(KK 1/. then (.KK 10 then magnitude of gain is appro1imatel/ unit/
and unit/ output eAuals input. If (LL1/. then gain goes to 'ero.
Vo/ViC MFoM (o / %(
2
E(o
2
)
1/2
8t lo( freAuencies (KK1/
1
.0 the circuit (ill act as an amplifier (ith
gain
1
/
2
C Fo.
3igh pass fi/ter(
,sing anal/sis techniAues similar to those used for 2+7 it can <e
sho(n that Vo/ViC MFoM (o / %(
2
E(o
2
)
1/2
Ghich general form for first order 2+7. 8t lo( freAuencies the
capacitor acts as a short so gain of amplifier goes to FoC D
1
/
2
8t lo(
freAuencies %(KK(o) the capacitor is an open and gain of circuit is Fo.
7or this circuit (oC 1/
2
.. !herefore this circuit is a high pass filter.
!a<le 1 2o( pass 7ilter V
i
C
&2.34 759,53.:%F') 4/+ V42!8B5%V
o
) B8I3C2-log%V
o
/V
in
)
!a<le 2 Figh pass filter V
i
C
&2.34 759,53.:%F') 4/+ V42!8B5%V
o
) B8I3C2-log%V
o
/V
in
)
!esu/t(
!hus active filters (ere studied and designed for the given specifications.
DESI%N(
.urrent Voltage
8ssume i2 C 2-m80 f C 25-N.
Vi C i
2
i
C2- m8 1 25- C 5V.
%4 2-) m8 %1 5) V.
Circuit Diagram:
3 a. DESI%N O, )"!!EN O 2OL#%E )ON2E!E!S
#im(
!o design a current to voltage converter.
#pparatus re-uire.(
1. 4perational 8mplifier I. #41
2. esistor 1=0 1-= and 1--=.
3. +&
4. !rim +ot 2-=
5. +ot 1=
". ;read ;oard
#. .onnecting (ires.
'ro*e.ure(
1. Bive the connections as per the circuit diagram.
2. Var/ the input current %4 2-) m8.
3. 4<serve the output voltage %- 5)v
heor0(
.urrent to Voltage converterH
D. currents are converted to voltage </ shunts in such a (a/ that voltage
across the shunt of full ranges in the same for all the current ranges is as lo( as
possi<le. !he current in feed<acJ loop is Vin/1. !he output voltage is

ISO 9001:2008 Page 1! JEPPIAAR ENGINEERING OLLEGE
Vo is limited as function of Vin0 &ince input terminal is virtual ground0 current flo(s
through feed<acJ resistor f0 !hus output voltage is given </
Vo CD Iof
a1u/ar )o/umn(
&2.34 Input .urrent%m8) 4utput Voltage%V)
1
2
3
4
5
"
#
$
*
!esu/t(
!hus the current to Voltage converter (as designed for the given
specifications.
DESI%N(
Voltage .urrent
8ssume V
i
C 5V0
i
C 25-N.
i
2
C C C 2- m8.
ISO 9001:2008 Page 1" JEPPIAAR ENGINEERING OLLEGE
%1 5)V %4 2-) m8.
)ir*uit Diagram(
3<. DESI%N O, 2OL#%E O )"!!EN )ON2E!E!
#im(
!o design voltage to current converter.
#pparatus !e-uire.(
1. 4perational 8mplifier I. #41
2. esistor 1=0 1-= and 4#->.
3. +&
4. !rim +ot 2-=
5. !ransistor &21--
". ;read ;oard
#. .onnecting (ires.
'ro*e.ure(
1. Bive the connections as per the circuit diagram.
2. Var/ the input voltage%- 5)V
3. 4<serve the output current%4 2-) m8.
heor0(
!he inverting input voltage is given </ ViC I
1
1
0 I
1
C V
1
/
1
. !he input voltage is
converted into an output voltage of V
1
/
1
. !he same current flo(s through the signal
source and load.
a1u/ar )o/umn(
&2.34 Input voltage%V) 4utput .urrent%m8)
1 -
2 -.5
3 1
4 1.5
ISO 9001:2008 Page 1# JEPPIAAR ENGINEERING OLLEGE
5 2
" 2.5
# 3
$ 3.5
* 4
1- 4.5
11 5
!esu/t(
!hus the Voltage to .urrent converter (as designed for the given
specifications.
4. DESI%N #ND IM'LEMEN#ION O, )OLD 4 5"N)ION
)OM'ENS#ION )I!)"I ,O! 3E!MO)O"'LE
#im(
!o design a cold junction compensation circuit for thermocouple.
#pparatus re-uire.(
8D5*-0 I. #41
'ro*e.ure(
1. 7irst measure the thermocouple output (ith respect to room temperature
in mV and this is called as V
o
.
2. Gith respect to V
o
design
g
0
1
0
2
.
3. 6easure the output of 8D5*- and reset the gain value such that it meets
the V
o
of the ta<le value.
heor0(
Ghen temperature near am<ient are to <e measured (ith the
thermocouple and it is inconvenient to use a fi1ed reference junction0 therefore
the compensating circuit must <e emplo/ed in the measuring s/stem. 8n
arrangement for automatic compensation is sho(n. 8 temperature sensitive
<ridge is included in a thermocouple circuit0 such that variations in am<ient
temperature are compensated </ the changes in resistance.
Circuit Diagram:
a1u/ar )o/umn(
&2.34 !emperature in
o
. 4utput Voltage%V)
1
2
3
4
5
"
#
$
*
1-
!esu/t(
!hus the linearising circuit and cold junction compensation circuit for
thermocouple is designed and studied.
Circuit Diagram:
DESI%N(
!DH

!
C
o
%1EOP!)
8ssume
-
C 1-->0 O C -.--3*/
o
.0 ! C 1--
o
..

1--
C 1-- %1E-.--3*11--).
C 13*>.
&ri.ge )ir*uit(
8ssume Voltage drop across !D C 15Q1-
D3
114-.
V
!D
C 2.1V.
8ppl/ =V20
V
in
C 5V.
V
in
C V
!D
E V
2
.
5V C 2.1 E V
2
.
5. DESI%N #ND IM'LEMEN#ION O, SI%N#L
)ONDIIONIN% )I!)"I ,O! !D
#im(
!o design signal conditioning circuit using !D.
#pparatus !e-uire.(
1. 4ven and thermometer
2. !D
3. Differential amplifier
4. +&
5. esistors
". 6ultimeter
#. ;read<oard and connecting (ires.
'ro*e.ure(
1. .onnections are made as per circuit diagram.
2. ;alance the <ridge initiall/ so that the output voltage occurs.
3. Increase the temperature of the oven and note do(n the output voltage.
4. .alculate the gain to get the reAuired output voltage.
5. 4<serve the output voltage of the amplifier and compare it (ith
theoretical value.
V
2
C 2.*V.

2
C C C 1*3>.

2
C 2-->.

3
C
2

!D
C
1
7rom the <ridge0
PV C Vin % D ).
C 5 % D ).
C -.3*V.
4p ampR
V
o
C %V
1
V
2
).
C

PV
5 C %-.3*)
C 12.5
2et
11
C 1JN

22
C 12.5=N
heor0(
.old junction compensationH
&ignal conditioning circuits normall/ emplo/ amplifiers0 temperature
compensation devices etc.
!D(
!D stands for resistance temperature detector. !D has a positive
temperature coefficient. !he principle of !D is as there is a change in the
temperature0 the resistance changes0 this change in resistance is measured. 8s
!D has a positive temperature coefficient I.e as temperature increases0
resistance increases0 the resistance at an/ temperature t can <e calculated using
the formula.

!
C
o
S1EO %t t
o
)T
!
is resistance at !
o
is resistance at -
o
.0 room temperature.
O !emperature coefficient of material -.-4.
!hus the value of resistance can <e calculated.

Tabular column:
SL.N
O
Temperature in
o
C
Resistance of RTD
in
Output
Voltage(V)
1
!
4
"
#
$
%
&
1'
Result:
T(us t(e signal con)itioning circuit for RTD is )esigne).
6. DESI%N O, O!I,I)E 'L#E
#im(
!o design an orifice plate using the given specifications.
Spe*ifi*ations(
7lo( rate C 9 C -.1m
3
/sec
Discharge coDefficient C .
d
C -.#
Densit/ C U C 12--=g/m
3
Difference in height C h C -.5m
V C -."
Design(
2et0
+
1
+ressure at section 1.
V
1
Velocit/ at section 1.
a
1
area of pipe at section 1.
+
2
0 V
2
0 a
2
are corresponding values at section 2.
g
P
1
E
g
V
2
2
1
E W
1
C
g
P
2
E
g
V
2
2
2
E W2
%
g
P
1
E W
1
) %
g
P
2
E W
2
) C
g
V
2
2
2
D
g
V
2
2
1
%
g
P
1
E W
1
) %
g
P
2
E W
2
) C h %Differential head)
h C
g
V
2
2
2
D
g
V
2
2
1
%or) 2gh C V
2
2
V
1
2
Diagram*
V
2
C
2
2 1 V gh+

8t vena contracta0 a
2
represents the area of the vena.
If a
-
is the area of the orifice0
.
c
C
-
2
a
a
.
c
C .oDefficient of contraction
a
2
C a
-
1 .
c.
;/ continuit/ eAuation0
a
1
V
1
C a
2
V
2

V
1
C
1
2
a
a
V
2
C
1
-
a
c a c
V
2
&u<stitute V
1
in V
2
0
V2 C
2
2
2 2
2 2
-
V
a
c a
gh
c
+

V2
2
C 2gh E
2
1
-
,
_
a
a
.
c
2
V
2
2
V2
2
S1 D
2
1
-
,
_
a
a
.
c
2
T C 2gh
V2 C
2
2
1
2
1
-
c c
a
a
gh
,
_
Discharge 9 C V
2
1 a
2
C a
-
1 .
c
.
d
C
2
2
1
2
1
1
-
1
-
C
C
C
a
a
a
a
C
,
_
,
_
.
.
C
2
1
2
2
1
1
-
1
-
,
_
,
_
a
a
C
a
a
C C d

9 C a- 1
2
1
2
2
1
1
-
1
-
,
_
,
_
a
a
C
a
a
C C d
1
2
2
1
2
1
-
c c
a
a
gh
,
_
9 C
2
1
2
1
-
-
,
_
a
a
gh a Cd
9 C
2 2
2
- 1
1 -
a a
gh a a Cd
.
d
C .oefficient of discharge.
9 C
4
1
2 -

gh a Cd
ISO 9001:2008 Page !0 JEPPIAAR ENGINEERING OLLEGE
a
-
C
gh C
Q
d 2
4
1
d C
gh Cd
Q
2
4
1 4
d C
5 . - X $ . * X 2 # . - X
4
" . - 1 1 . - X 4
d C -.232m
V C
D
d
D C Diameter of the pipe.
d C diameter of the orifice.
D C
d
C
" . -
232 . - m
C -.3$#m.
esultH
T(us t(e orifice plate +as )esigne) for t(e gi,en
specifications.
#. D5&IB3 47 4!865!5
8imH
!o design a rotameter using the given specifications.
&pecificationsH
7lo( rate C 9 C 1--m
3
/sec
Densit/ of the fluid C U
1
C -.*=g/m
3
Densit/ of the float C U
2
C 2.5=g/m
3
Volume of the float C 55-mm
3
!apering angle C O C 5
o
DesignH
In eAuili<rium condition0
7
d
E U
1
V C U
2
V
7
d
Drag force
U
1
7loat densit/
U
2
7loat densit/
V Volume of the float
7
d
O 8
2
U
1
,
_
g
V
2
2
1

7
d
C .
d
8
2
U
1
,
_
g
V
2
2
1
.
d
Drag coefficient
ISO 9001:2008 Page !! JEPPIAAR ENGINEERING OLLEGE
DI8B86H

8
2
7loat area
V
1
7luid average velocit/
.
d
8
2
U
1
,
_
g
V
2
2
1
E U
1
V C U
2
V
.
d
8
2
U
1
,
_
g
V
2
2
1
C %U
2
D U
1
)

V
V
1
2
C
1 2
1 2 ) % 2

A C
v g
d
V1 C
2
1
1 2 ) %
2
A C
gv
d
,
_

A C V
1
8
a
A C
d
a
C
A

,
_

1
1 2
2
2

A
gv
8
a
8nnular restriction area
d C
1
.ontraction or flo( coefficient
8
a
C
4
D
2
2et d inlet tu<e diameter.
D 4utlet tu<e diameter
Y !u<e tapering angle
ISO 9001:2008 Page !" JEPPIAAR ENGINEERING OLLEGE
h Feight of the ;o< from the inlet end
D C d EOh
8
a
C
4
%d EOh)
2
C
4
%d
2
E O
2
h
2
E 2Ohd)
C
4
O %Oh
2
E 2hd E
2
d
)
A C
d C 4

%Oh
2
E 2hd E
2
d
)

,
_

1
1 2
2
2

A
gv
6ultipl/ </
d
d
2
2
and neglect
2
d
%7or simplification)
A C
,
_
d C
,
_
+
d
h
h
2
2

2
1
1 2
2
2
A
gvd
1
1
]
1
,
_

7or small value of O0 the d value is ver/ large.
3eglect
,
_
d
h
2
2
A C
,
_
d C
h

2
1
1 2
2
2
A
gvd
1
1
]
1
,
_

7or the given specifications0 assume height of the <o< %h) from the inlet
end is 25cm.
1-- C
,
_
1
2
1- X 25 X 5 X

)) % 2 % 2
1
* . -
5 . 2
2
4 X
3
1- X 55- X $ . *
1 r h r
r
+
,
_
1-- C
,
_
1
2
1- X 25 X 5 X

) % 4
1
* . -
5 . 2
2
4 X
3
1- X 55- X $ . *
1 r h r
r
+
,
_
h
1
Feight of the <o<
r adius of the <o<.
25.45 C 3.-*
) %
2
1 r h r
r
+
"#.$ C
) %
2
1 r h r
r
+
r
2
C "#.$SZr %h
1
Er)T
r
2
C "#.$ Zr h
1
E

"#.$ Zr
2
r C212.**h
1
E 212.**r
r 212.**r C 212.**h1
D211.**r C 212.**h
1
r C
** . 211
** . 212
h
1

r C 1.--4#h
1
8ssume0 ;o< height h
1
C 2.5cm
r C 1.--4# X 2.511-
D2
r C -.-251m
d C 2r
d C 2X-.-251m
ISO 9001:2008 Page !# JEPPIAAR ENGINEERING OLLEGE
d C -.-5m
D C d EOh
D C -.-5 E 5X2511-
D2
D C 1.3m

esultH
T(us t(e Rotameter +as )esigne) for t(e gi,en
specifications.
6. DESI%N O, )ON!OL 2#L2E 7SI8IN% #ND ,LO9 4LI,
)3#!#)E!ISI)S:.
8imH
!o design control valve si'ing using the given specifications and dra(
flo(Dlift characteristics.
&pecificationsH
7lo( rate C A C 3".5 Bpm
+ressure across the valve C Pp C 1--psi.
&pecific gravit/ of the fluid C B C 1.
DesignH
.
V
C
p
G
q
.
V
Valve coDefficient.
A 7lo( rate
Pp +ressure across the valve.
B &pecific gravit/ of the fluid.
.
V
C 3".5 1
1--
1
.
V
C 3."
!a<leH
.
V
Valve &i'e
-.3 [\
3 ]\
14 1\
35 1]\
1-$ 2\
1#4 3\
!he suita<le valve si'e for the given specification is ]\
!esu/t(
!hus the control valve si'ing has <een performed for the given specifications .
;. DESI%N O, 'ID )ON!OLLE!
#im(
!o design an analog +ID controller using 4pD8mp %I.#41).
Design(
+ C =
p
e
p
E =
p
=
I
t
epdt
-
E =
p
=
D
dt
dep
E p
i
%-)
Ghere
+ .ontroller output.
e
p
+rocess error
=
p
+roportional gain
=
I
Integral gain
=
D
Derivative gain
p
i
%-) Initial controller output.
8nal/sis of the circuitH
DV
out
C
1
2
R
R
V
e
E
1
2
R
R
1 1
1
C R

t
dt Ve
-
E
1
2
R
R
D
.
D
dt
dVe
E V
out
%-)
Ghere 3 can <e chosen from 2Zf
ma1
3
.
D
C -.1 for
&ta<ilit/.
=
p
C
1
2
R
R
%+roportional gain)
=
D
C
D
.
D
%Derivative gain)
=
I
C
1 1
1
C R
%Integral gain)
)I!)"I DI#%!#M(
Biven =
+
C 50 =
I
C -.10 =
D
C 1.
=
p
C
1
2
R
R

5 C
1
2
R
R
0 8ssume
1
C 1=N.
2 C 5 1 1=N C 5 =N.
=
D
C
D
.
D
8ssume .
D
C -.1I7
1 C
D
.
D
8ssume .
D
C -.1I7

D
C
F 1 . -
1

D
C 5 =N.
=
I
C
1 1
1
C R
-.1C
1 1
1
C R
1
.
1
C 1-
8ssume .1 C 1--I7
1 C 1-- =N.
2Zf
ma1
3
.
D
C -.1
3 C 15* =N.
esultH
!hus the +ID controller (as designed.
+0. 'I'IN% #ND INS!"MEN#ION DI#%!#M 4 )#SE
S"D$
#im(
!o dra( the +I diagram for the flo(0 pressure and temperature process.
S0m1o/s "se.(
+rocess signal lines
Instrument air suppl/
Instrument electric po(er suppl/
,n defined signal
+neumatic signal
5lectric signal
F/draulic signal
7illed thermal element capillar/ tu<e
Buided 56 signal
7i<er optic ca<le guided same signal
,nguided 56 signal
,nguided sonic signal
8lternative radio communication linJ
&/stem (ith soft(are linJ
7ield is locall/ mounted
3ormall/ accessi<le to an operator
&ignal connector
.entral or mail control room
.entral or main control room and not
&econdar/ or local control room.
11. +5+88!I43 47 D4.,653!8!I43 47 I3&!,653!8!I43
+4^5.! %+4.5&& 724G &F55!0 I3&!,653!8!I43 I3D5Q
&F55! 83D I3&!,653! &+5.I7I.8!I43& &F55!) .8&5 &!,D:

Ei-2406 Isd Lab Manual (2013)

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DEPARTMENT OF EIE EI2406 - INSTRUMENTATION SYSTEM DESIGN LAB

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