Lecture20

ANNOUNCEMENTS
HW#11 is due in 2 weeks on 11/20 HW#11isduein2weeks,on11/20.
Reviewsession:Fri.11/9,35PMin306Soda(HPAuditorium)
Midterm#2(Thursday11/15inSibleyAuditorium):
MaterialofLectures1118(HW#710;Chapters6,9,11)
4pgsofnotes(doublesided,8.511),calculatorallowed
OUTLINE
ReviewofMOSFETAmplifiers
MOSFETCascodeStage
MOSFETCurrentMirror
EE105Fall2007 Lecture20,Slide1 Prof.Liu,UCBerkeley
Reading:Chapter9
Review:MOSFETAmplifierDesign
AMOSFETamplifiercircuitshouldbedesignedto
1. ensurethattheMOSFEToperatesinthesaturationregion, p g ,
2. allow thedesiredlevelofDCcurrenttoflow,and
3. coupletoasmallsignalinputsourceandtoanoutputload.
ProperDCbiasingisrequired!
(DCanalysisusinglargesignalMOSFETmodel)
Keyamplifierparameters:
(ACanalysisusingsmallsignalMOSFETmodel)
Voltage gain A v /v VoltagegainA
v
v
out
/v
in
InputresistanceR
in
resistanceseenbetweentheinputnode
andground(withoutputterminalfloating)
O t t i t R i t b t th t t
EE105Fall2007 Lecture20,Slide2 Prof.Liu,UCBerkeley
OutputresistanceR
out
resistanceseenbetweentheoutput
nodeandground(withinputterminalgrounded)
MOSFETModels
ThelargesignalmodelisusedtodeterminetheDC
operatingpoint(V
GS
,V
DS
,I
D
)oftheMOSFET. p g p (
GS
,
DS
,
D
)
Thesmallsignalmodelisusedtodeterminehowthe
outputrespondstoaninputsignal.
EE105Fall2007 Lecture20,Slide3 Prof.Liu,UCBerkeley
ComparisonofAmplifierTopologies
CommonSource
L A 0
CommonGate
L A 0
SourceFollower
0 A 1 LargeA
v
<0
degradedbyR
S
Large R
i
LargeA
v
>0
degradedbyR
S
Small R
i
0<A
v
1
LargeR
in
determined by
LargeR
in
determinedbybiasing
circuitry
SmallR
in
decreasedbyR
S
R
out
R
D
determinedby
biasingcircuitry
SmallR
out
R
out
R
D
r
o
decreasesA
v
&R
out
r
o
decreasesA
v
&R
out
butimpedanceseen
looking into the drain
decreasedbyR
S
r
o
decreasesA
v
&
R
butimpedanceseen
lookingintothedrain
canbeboostedby
d ti
lookingintothedrain
canbeboostedby
sourcedegeneration
R
out
EE105Fall2007 Lecture20,Slide4 Prof.Liu,UCBerkeley
sourcedegeneration
CommonSourceStage
R R R ||
0 =
S
D
G
v
R
g
R
R R R
R R
A
+

+
=
2 1
2 1
1
||
||
0
in
m
R R
R R R
g
=
2 1
||
0
( ) R r g r R R +
EE105Fall2007 Lecture20,Slide5 Prof.Liu,UCBerkeley
D out
R R =
( )
S O m O D out
R r g r R R +
CommonGateStage
0 =
( )
m S
R g
g R
A =
/ 1 ||
( )
D m
G m S
v
R g
R g R
A
+
=
/ 1 ||
R R
1
0
S
m
in
R
g
R
R R
( ) R r g r R R +
0
EE105Fall2007 Lecture20,Slide6 Prof.Liu,UCBerkeley
D out
R R =
( )
S O m O D out
R r g r R R +
SourceFollower
0 =
0
S
v
R
A =
1
S O
v
R r
A
1
||
=
S
m
v
R
g
+
1
R R
S O
m
v
R r
g
||
1
+
G in
R R =
G in
R r R
R R
|| ||
1
=
=
S
R R ||
1
=
EE105Fall2007 Lecture20,Slide7 Prof.Liu,UCBerkeley
S o
m
out
R r
g
R || || =
S
m
out
R
g
R ||
CSStageExample1
M
1
istheamplifyingdevice;M
2
andM
3
serveastheload.
Equivalent circuit for small-signal analysis, q g y ,
showing resistances connected to the drain
|| || ||
1
A

1 2 3
3
1
|| || ||
1
|| || ||
O O O
m
m v
r r r R
r r r
g
g A

=
EE105Fall2007 Lecture20,Slide8 Prof.Liu,UCBerkeley
1 2 3
3
|| || ||
O O O
m
out
r r r
g
R =
CSStageExample2
M
1
istheamplifyingdevice;M
3
servesasasource(degeneration)
resistance;M
2
servesastheload. ;
2
Equivalent circuit for small-signal analysis
0
1
=
3
3 1
2
||
1 1
O
O
v
r
g g
r
A
+
=
EE105Fall2007 Lecture20,Slide9 Prof.Liu,UCBerkeley
3 1 m m
g g
CSStagevs.CGStage
Withtheinputsignalappliedatdifferentlocations,thesecircuits
behavedifferently,althoughtheyareidenticalinotheraspects.
Common source amplifier Common gate amplifier
0
0
0
1

0
2
=
O
v
R
r
A
+
=
1
1
[ ] { }
1 2 2 2 1
|| ) 1 (
O O S O m m v
r r R r g g A + + =
EE105Fall2007 Lecture20,Slide10 Prof.Liu,UCBerkeley
S
m
R
g
+
2
CompositeStageExample1
ByreplacingM
1
andthecurrentsourcewithaThevenin
equivalentcircuit,andrecognizingtherightsideasaCGstage, q , g g g g ,
thevoltagegaincanbeeasilyobtained.
0 0
1 1
D
v
R
A
+
=
0
1
= 0
2
=
EE105Fall2007 Lecture20,Slide11 Prof.Liu,UCBerkeley
1 2 m m
g g
CompositeStageExample2
Thisexampleshowsthatbyprobingdifferentnodesinacircuit,
differentoutputsignalscanbeobtained.
V
out1
isaresultofM
1
actingasasourcefollower,whereasV
out2
isaresultofM
1
actingasaCSstagewithdegeneration.
1
2
2 1
||
1 1
||
1
O
m
in
out
r
r
g
v
v
+
=
1
0
1
=
2
2 1
||
O
m m
r
g g
+
2
4 3
3 2
||
1 1
|| ||
1
O
O O
m
in
out
r
r r
g
v
v
+
=
1
EE105Fall2007 Lecture20,Slide12 Prof.Liu,UCBerkeley
2
2 1
||
O
m m
r
g g
+
NMOSCascodeStage
( )
1 2 1 1
1
O O O t
r r r g R + + = ( )
2 1 1
1 2 1 1
1
O O m out
O O O m out
r r g R
r r r g R

+ +
EE105Fall2007 Lecture20,Slide13 Prof.Liu,UCBerkeley
UnlikeaBJTcascode,theoutputimpedanceisnotlimitedby.
PMOSCascodeStage
( )
2 1 1
1 2 1 1
1
O O
O O O m out
r r g R
r r r g R

+ + =
EE105Fall2007 Lecture20,Slide14 Prof.Liu,UCBerkeley
2 1 1 O O m out
r r g R
ShortCircuitTransconductance
Theshortcircuittransconductanceisameasureofthe
strengthofacircuitinconvertinganinputvoltagesignalinto g g p g g
anoutputcurrentsignal:
i
0 =

v
in
out
m
v
i
G
0 =
out
v
Thevoltagegainofalinearcircuitis
out m v
R G A =
EE105Fall2007 Lecture20,Slide15 Prof.Liu,UCBerkeley
(R
out
istheoutputresistanceofthecircuit)
out m v
TransconductanceExample
1 m m
g G =
EE105Fall2007 Lecture20,Slide16 Prof.Liu,UCBerkeley
1 m m
g
MOSCascodeAmplifier
[ ]
out m v
R G A =
[ ]
2 2 1 1
2 1 2 2 1
) 1 (
O m O m v
O O O m m v
r g r g A
r r r g g A

+ +
EE105Fall2007 Lecture20,Slide17 Prof.Liu,UCBerkeley
PMOSCascodeCurrentSourceasLoad
AlargeloadimpedancecanbeachievedbyusingaPMOS
cascodecurrentsource.
O O m oN
R
r r g R
1 2 2

oP oN out
O O m oP
R R R
r r g R
||
4 3 3
=

EE105Fall2007 Lecture20,Slide18 Prof.Liu,UCBerkeley

MOSCurrentMirror
Themotivationbehindacurrentmirroristoduplicatea
(scaledversionofthe)goldencurrenttootherlocations.
Current mirror concept Generation of required V
GS
Current Mirror Circuitry
( )
2
2
1
TH X ox n REF
V V
L
W
C I

= ( )
2
1
2
1
TH X ox n copy
V V
L
W
C I

=
( )
( )
REF
I
L W
I
/
1
1
=
( )
1
1
/
2
TH
REF
X
V
L W C
I
V + =

2
REF
L

1
2
py
L

EE105Fall2007 Lecture20,Slide19 Prof.Liu,UCBerkeley
( )
REF
REF
copy
I
L W
I
/
1
( )
1
/
ox n
L W C
MOSCurrentMirror NOT!
Thisisnotacurrentmirror,becausetherelationshipbetween
V
X
andI
REF
isnotclearlydefined.
TheonlywaytoclearlydefineV
X
withI
REF
istouseadiode
EE105Fall2007 Lecture20,Slide20 Prof.Liu,UCBerkeley
y y y
X REF
connectedMOSsinceitprovidessquarelawIV relationship.
Example:CurrentScaling
MOScurrentmirrorscanbeusedtoscaleI
REF
upordown
I = 0 2mA; I = 0 5mA I
1
=0.2mA;I
2
=0.5mA
: 0 =
EE105Fall2007 Lecture20,Slide21 Prof.Liu,UCBerkeley
ImpactofChannelLengthModulation
0
( ) ( ) [ ]
sat D DS TH X ox n copy
V V V V
L
W
C I +

=
, 1
2
1
1
1
2
1

( ) ( ) [ ]
TH GS DS TH X ox n
V V V V V
L
W
C + +

=
1
2
1
1
2
1

( ) ( ) [ ]
sat D GS TH X
REF
ox n REF
V V V V
L
W
C I +

= 1
2
1
,
2
( ) [ ]
TH TH X
REF
ox n
V V V
L
W
C +

= 1
2
1

2
( )
( )
( ) ( )
( )
( )

+

+ =
+
+ +
=
GS DS
REF
TH GS DS
REF copy
V
V V
I
L W
L W
V
V V V
I
L W
L W
I

1
1
/
/
1
1
/
/
1 1 1 1
1
EE105Fall2007 Lecture20,Slide22 Prof.Liu,UCBerkeley
( ) ( )

+ +
TH REF TH REF
V L W V L W 1 / 1 /
CMOSCurrentMirror
EE105Fall2007 Lecture20,Slide23 Prof.Liu,UCBerkeley