Topstar Digital Motherboard Schematic

5
Topstar Digital technologies Co.,LTD
Board name: MotherBoard Schematic
02. System block & Index
Project name: C46
03. PWR Block & Description
Version: VerA
04. Notes & Annotations
Initial Date: MAY.9, 2008
05. Schematic Modify and History

59. CLOCK Distribution
60. Power on & off Sequence
60. Power On Sequence & Reset Map
61. ACPI Mode Switch Timings
Topstar Confidential
C
Hardware drawing by:
Hardware check by:
Power drawing by:
Power check by:
EMI Check by:
Manager Sign by:
TOPSTAR TECHNOLOGY
bent
Page Name
Title
Size
C
C46
Project Name
Rev
A
Date:
Sheet
Friday, November 27, 2009
1
59
of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5
Topstar Confidential
ShenZhen Topstar Industry Co.,LTD
D
C46 SYSTEM BLOCK Ver:A

Backlight
Connector
+VDC
CK505M
Clocking
Only for PM
TFT
SLG8SP585
LVDS switch
+V3.3S
+V3.3S
64M*16Bit*4 GDDRIII
+V1.5GDDR
Memory
interface
LVDS
VGA
Nvidia
NB11
R/G/B
TMDS
+V5S
+VGA_CORE,
+V1.05GPU
+V1.8GDDR,
+V3.3GPU
+V1.5GPU
DDR3 SODIMM0
800/1066
DDR3 800/1066
Arrandule/clarsfield
989rPGA
PEGX16 /eDP
+V0.75S,+V1.5,+V3.3S
DDR3 SODIMM1
800/1066
DDR3 800/1066
+VCC_CORE,+VccGFX
+V1.5S, +V1.8S,
+V1.1S_VTT
+V0.75S,+V1.5,+V3.3S
HDMI
LVDS
+V0.75S,+V1.5,+V3.3S
DMI*4 100MHz
FDI
RJ45
PCIE 1X
SPI
BIOS
8Mbit
RTL8102E
+V3.3S,+V3.3AL
RJ45
Ibex_peak
+V3.3AL
PCI-Express X16
1071 BGA
SATA ODD
PCIE mini Card
+V5S
+V3.3A,+V3.3S,+V1.5S,
+V1.05S,+V1.8S,
+V5A,+V5S
PCIE mini Half-Card
S-ATA
2.5" HDD
+V5S,+V3.3S
USB1.1/2.0
PCIE 1X
SD/MMC/MS CARD
Card Reader
ITE 1337
+V3.3S,+V3.3AL
LPC
AZALIA
USB1.1/2.0
BLUE
TOOTH(V1.2)
B
BTM-203/CCOM
NEW CARD(Type II)
+V3.3AL
Camera
1.3M/2.0M
MODULE
USB PORT1
KB Controller/EC
+V5AL
ENE 3926
+V3.3AL,+V3.3S,+V5AL
+V3.3S
TCM
MiC
AZALIA
ALC662
+V5S,+V3.3S
LED/TouchPAD/Button/
DAUGHTER BOARD
Q-key/LID
DAUGHTER BOARD
KB Matrix
TOPSTAR TECHNOLOGY
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Page Name
Sys block
Size
C
C46
Project Name
Rev
A
Date:
Sheet
2
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5
C46 POWER BLOCK Ver:A

Platform
Logic
VR_ON
VCC_SENCE
VSS_SENCE
IMON
VR_TT#
Vcc_core
VIN
V_5
IMVP-6.5
V_3
VID[6...0]
PSI#
CLK_ENABLE#
IMVP6_PWRGD
DPRSLPVR
PSI# PROCHOT#
PCH
CPU_PWRGD
CPU-M
CLK
CHIP
:
Charge
ISL6251
Battery
Adapter
Power
Switch
51A
+VCC_CORE
65/90W
VCC_CORE
ISL62882
+VDC
5A
+V1.8S
MOSFET
+V1.8GPU
KIA1117
ISL62872
ISL62881
TPS51218
TPS51218
+V1.05S
+V1.1S_VTT
18A
8A
+VGA_CORE
10A
+VGFX
MOSFET
Always_On
Power
TPS51125
DDR Power
TPS51218
+APL5331
+V5S
+V3.3S
+V1.5
+V0.75S
+V3.3AL
+V5AL
12A/2.5A
5A/5A
MOSFET
MOSFET
MOSFET
+V1.5S
14A
+V1.05GPU
+V3.3GPU
2.5A
<0.5A
3A
+V1.5GPU
3A
System Power
+V_S
TOPSTAR TECHNOLOG
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Page Name
PWR Block
Size
C
C46
Project Name
Rev
A
Date:
Sheet
3
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5
Voltage Rails
+VDC
Primary DC system power supply(9V-19V)
+VCC_CORE
Core voltage for processor
+V1.1S_VTT
1.1V for CPU
+V1.05S
1.05V for PCH core
+V0.75S
0.75V DDR3 Termination voltage
+V1.5
1.5V power rail for DDR3
+V3.3AL
3.3V always on power rail
+V3.3S
3.3V main power rail
+V5AL
5V for USB Device
I2C SMB Address
+V5S
5V main power rail
+VGA_CORE
0.8--1.03V for GPU NB8M core voltage
+V1.5S
1.5S for PCIE Device
+V1.8S
1.8V for display votage
+V3.3GPU
3.3V for external GPU
+V1.05GPU
+V1.8GPU
+V1.5GPU
Device
Address
Clock Generator
1101 001x
1010 000x
1010 010x
Variable
Variable
D2
A0
A4
Variable
Variable
SMB_PCH
SMB_PCH
SMB_PCH
SMB_PCH
SMB_PCH
PCH
PCH
PCH
PCH
PCH
Variable
Variable
SMB1_PCH
ENE3926
SO-DIMM0
SO-DIMM1
NEW CARD
PCIE Mini CARD
PCH
Smart Battery
Hex
0001 011x
16
Bus
I2C
Master
ENE3926
Power States/AC mode

Signal
Board stack up description

PCB Layers
TOP
GND
IN1
IN2
+V*AL
+V*
SLP_S3#
SLP_S4#
SLP_S5#
+V*S
Clock
S0(Full On)
HIGH
HIGH
HIGH
ON
ON
ON
ON
S3(STM)
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4(STD)
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5(SoftOff)
LOW
LOW
LOW
ON
OFF
OFF
OFF
Trace Impedence:50ohm +/-15%(Default)
VCC
IN3
B
GND
Bottom
Wake up Events
USB Table
USB Port#
LID switch from EC
Function Description
Express Card
minicard1
reserved
camera
USB port1
Bluetooth
Power switch from EC
Reserved
Reserved
CARD Reader
minicard2
Page Name
Notes
USB port2
Size
C
C46
TOPSTAR TECHNOLOG
bent
10
11
USB port3
Project Name
Rev
A

4
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Date:
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4
VerA to VerB Changelist

1.VBIOS ROM srrap 15K
2. 27M clock0ohm33ohm
3.PCH 100MCLK-REQ#
4. PCH GPIO16 follow CHECK LIST
5.Switch ICfootprint
6. RGBESD
7. HDMIEC detect
8. SYS_RST#0hm
9.SIM //connecterfootprint
10.GPU_RST#
11.HD connecter TP
12.BT connect ECN
VerB to VerC Changelist

1. N11M
2.USBP/N
3.ECIMVP_ON1K0ohm
VerC to VerD Changelist

1.N11MHDMID2+/-D1+/-
2. 3.3AL/5ALcolay 220uf poscap
TOPSTAR TECHNOLOG
bent
Page Name
history
Size
A
C46
Project Name
Rev
A
of
5
59
Date:
Sheet
5
+V3.3S
FB102
+V3.3S
{8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57}
+V3.3AL
{23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56}
+V3.3S_CK_VDD
1 100ohm@100MHz,3A
FB0805
C226
C223
C234
C220
C227
10UF/6.3V,X5R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
C0805
C0402
C0402
C0402
C0402
Layout Note:
Cap Close to CK505 PWR pin
+V3.3S
SMBUS ADD:1101 001X

R247
10K
R0402
U12
CPU_STOP#
+V3.3S_CK_VDD
+VDDIO_CLK
C231
+V3.3S
FB9 1
+VDDIO_CLK
2 100ohm@100MHz,3A
FB0805
C230
C216
C217
C229
No more than 500 mil

27pF/50V,NPO
Y1
C0402
3
4
C222
XTAL_IN
XTAL_OUT
C233
VDD_DOT
VDD_27
VDD_SRC
VDD_REF
24
18
15
G1
G2
G3
G4
28
VDD_CPU
VDD_CPU_IO
VDD_SRC_IO
GND1
GND2
GND3
GND4
XTAL_IN
27
G5
XTAL_OUT
GND5
1
2
8
9
12
21
26
14.318MHz
10UF/6.3V,X5R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
10UF/6.3V,X5R
0.1UF/25V,Y5V
C0805
C0402
C0805
C0402
C0402
1
5
17
29
27pF/50V,NPO XS4_5032_0D8
C0402
R275
R276
0
0
R0402
R0402
0
0
R0402
R0402
SMB_DATA
SMB_CLK
31
32
CPU_STOP#
16
CPU0
CPU0#
23
22
BCLK
BCLK#
CPU1
CPU1#
20
19
Integrated resistors on differentail clk
SMB_DATA_S
SMB_CLK_S
DOT96
DOT96#
R264
R261
CLK_BUF_BCLK_P
CLK_BUF_BCLK_N
R262
R260
0
0
R0402
R0402
SRC0/SATA
SRC0#/SATA
10
11
R243
R242
0
0
R0402
R0402
SRC1
SRC1#
13
14
R241
R240
0
0
R0402
R0402
R278
33
R0402
CLK_PWRGD
DOT96
DOT96#
VSS_DOT
VSS_27
27M_NSS
VSS_SATA
27M_SS
VSS_SRC
VSS_CPU
REF/FS
VSS_REF CK_PWRGD/PWRDWN#
3
4
{23}
{23}
CLK_BUF_DOT96_P
CLK_BUF_DOT96_N
{23}
{23}
CLK_BUF_SATA_P {23}
CLK_BUF_SATA_N {23}
CLK_BUF_EXP_P {23}
CLK_BUF_EXP_N {23}
6
7
30
25
{15,16,23,40,41}
{15,16,23,40,41}
CPU_STOP#
27M_nonSSC {20}
27M_SSC
{20}
BCLK_FS
CLK_BUF_REF14
{23}
CK505QFN32
update Y1 footprint
+V3.3S
Frequence Select
High:100Mhz
Low:133Mhz(Default)
B
R277
10K
R0402
ns
CLK_BUF_REF14
C232
10PF/50V,NPO
ns
C0402
B
BCLK_FS
R306
ns
+V3.3S
+V3.3AL
R317
1K
R0402
1
C249
ns
VCC
4
C0402
0.1UF/25V,Y5V
GND
3
PQ32
2N7002
SOT23
2
{55} CK505_CLK_EN#
C236
0.1UF/10V,X7R
R307
10K
R0402
R314
10K
R0402
3
ns
CLK_PWRGD
SOT23_5
SN74AHC1G08DBV
U15
C244
C0402
0.1UF/25V,Y5V
TOPSTAR TECHNOLOG
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Page Name
CK505M
Size
C
M21
Project Name
Rev
B

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59
Date:
Sheet
of
5
PEG_IRCOMP_R
R560
U2A
{24}
{24}
{24}
{24}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
{24}
{24}
{24}
{24}
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
{24}
{24}
{24}
{24}
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
{24} FDI_TXN[7:0]
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
B24
D23
B23
A22
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
D24
G24
F23
H23
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
D25
F24
E23
G23
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
E22
D21
D19
D18
G21
E19
F21
G18
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
D22
C21
D20
C18
G22
E20
F20
G19
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
{24} FDI_FSYNC0
{24} FDI_FSYNC1
F17
E17
FDI_FSYNC[0]
FDI_FSYNC[1]
{24}
FDI_INT
C17
FDI_INT
{24} FDI_LSYNC0
{24} FDI_LSYNC1
F18
D17
FDI_LSYNC[0]
FDI_LSYNC[1]
{24} FDI_TXP[7:0]
Intel(R) FDI
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
A24
C23
B22
A21
DMI
{24}
{24}
{24}
{24}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
PCI EXPRESS -- GRAPHICS
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
B26
A26
B27
A25
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
R552
EXP_RBIAS
49.9,1%
R0402
750 OHM
R0402
PEG_RXN[15:0] {17}
PEG_RXP[15:0] {17}
PEG_NV_RXN[15:0] {17}
0.1UF/10V,X7RGC132
0.1UF/10V,X7R GC185
0.1UF/10V,X7R GC127
0.1UF/10V,X7R GC183
0.1UF/10V,X7R GC123
0.1UF/10V,X7RGC178
0.1UF/10V,X7RGC118
0.1UF/10V,X7RGC173
0.1UF/10V,X7R GC112
0.1UF/10V,X7RGC169
0.1UF/10V,X7R GC107
0.1UF/10V,X7RGC164
0.1UF/10V,X7RGC103
0.1UF/10V,X7RGC159
0.1UF/10V,X7R GC96
0.1UF/10V,X7R GC155
GC130 0.1UF/10V,X7R
GC184 0.1UF/10V,X7R
GC126 0.1UF/10V,X7R
GC181 0.1UF/10V,X7R
GC121 0.1UF/10V,X7R
GC177 0.1UF/10V,X7R
GC117 0.1UF/10V,X7R
GC172 0.1UF/10V,X7R
GC1110.1UF/10V,X7R
GC167 0.1UF/10V,X7R
GC1060.1UF/10V,X7R
GC1620.1UF/10V,X7R
GC101 0.1UF/10V,X7R
GC158 0.1UF/10V,X7R
GC94 0.1UF/10V,X7R
GC1540.1UF/10V,X7R
PEG_NV_RXN0
PEG_NV_RXN1
PEG_NV_RXN2
PEG_NV_RXN3
PEG_NV_RXN4
PEG_NV_RXN5
PEG_NV_RXN6
PEG_NV_RXN7
PEG_NV_RXN8
PEG_NV_RXN9
PEG_NV_RXN10
PEG_NV_RXN11
PEG_NV_RXN12
PEG_NV_RXN13
PEG_NV_RXN14
PEG_NV_RXN15
PEG_NV_RXP[15:0] {17}
PEG_NV_RXP0
PEG_NV_RXP1
PEG_NV_RXP2
PEG_NV_RXP3
PEG_NV_RXP4
PEG_NV_RXP5
PEG_NV_RXP6
PEG_NV_RXP7
PEG_NV_RXP8
PEG_NV_RXP9
PEG_NV_RXP10
PEG_NV_RXP11
PEG_NV_RXP12
PEG_NV_RXP13
PEG_NV_RXP14
PEG_NV_RXP15
TOPSTAR TECHNOLOGY
bent
IC,AUB_CFD_rPGA,R1P0
Page Name
Arrandule
Size
B
C46
Project Name
Rev
A
Date:
Sheet
of
7
59
5
+V1.1S_VTT {10,11,27,28,29,38,50,51,55}
+V3.3S
{6,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.5
{11,15,16,49,56,57}
+V1.1S_VTT
Layout Note:
Place close to CPU
+V1.1S_VTT
+V3.3S
R139
1K,1%
R0402
ns
U2B
R187
49.9,1%
R0402
AT26
AH24
COMP0
H_CATERR#
H_PECI
R548
68
R0402
H_PECI_R
VR_PROCHOT#
R0402
ns
AT15
AN26
AK15
{27,38} THERMTRIP#
CATERR#
THERMAL
{27}
+V1.1S_VTT
R433
AK14
SKTOCC#
PECI
PROCHOT#
THERMTRIP#
H_CPURST#_R
R0402
AP26
ns
R182
{24} H_PM_SYNC
R0402
H_PM_SYNC_R AL15
RESET_OBS#
PM_SYNC
+V1.1S_VTT
R180
{27} VCCPWRGD_0
ns
R212
1K,1%
R0402
R0402 VCCPWRGOOD_1_R AN14
R0402 VCCPWRGD_0_R
R213
PM_DRAM_PWRGD
{24} PM_DRAM_PWRGD
{43} CPU_VTT_PWG
H_PWRGD_XDP_R
{17,26,38,39,40,41,43,44}
BUF_PLT_RST#
1.5K,1%
R181
PLT_RST#_R
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
R0402
R0402
E16 CLK_EXP_P_R
D16 CLK_EXP_N_R
R528
R524
0
0
R0402
R0402
A18 CLK_DP_P_R
A17 CLK_DP_N_R
R539 0
R531 0
ns
ns
R0402
R0402
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
BCLK_CPU_P
BCLK_CPU_N
T59
T58
F6
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
AN15
AP15
PM_EXT_TS#0
PM_EXT_TS#1
R133
10K
R0402
{23}
{23}
{16}
+V1.1S_VTT
{15,16}
Voltage Level?
R129
1K,1%
R0402
ns
+V1.1S_VTT
R123
10K
R0402
PM_EXT_TS#1
+V1.1S_VTT
49.9,1%
R0402
R566
ns
PRDY#
PREQ#
AT28
AP27
TCK
TMS
TRST#
AN28
AP28
AT27
TCK
TMS
TRST#
TDO
TDI
TDO
TDI_M
TDO_M
AT29
AR27
AR29
AP29
TDI
TDO
TDI_M
TDO_M
TMS
DBR#
AN25
XDP_REQ
R118
10K
R0402
ns
Q8
3
2
SOT23MMBT3904-F
ns
DIM_EXTTS#1
{15}
R559
49.9,1%
R0402
ns
T24
TCK
R216
49.9,1%
R0402
49.9,1%
R0402
R218
ns
ns
49.9,1%
R568
R0402
ns
49.9,1%
R214
XDP_REQ
R0402
ns
+V3.3S
TDI
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
T18
T20
T23
T25
T26
T19
T22
T21
TDI_M
ns
ns
ns
ns
ns
ns
ns
ns
EC_PROCHOT#
+V1.1S_VTT
Q30
MMBT3904-F
SOT23
R636
1K
R0402
Q31
R635
MMBT3904-F 1K
SOT23
R0402
1
VR_PROCHOT#
R185
750 OHM
R0402
Processor Compensation
Signals
{43}
+V1.1S_VTT
ns
R632
10K
R0402
R634
1K
R0402
R217
0
R0402
TDO_M
R105
1.21K,1%
DIM_EXTTS#0
+V3.3S
R0402
+V1.5
R130
10K
R0402
ns
Q9
3
2
SOT23MMBT3904-F
ns
PM_EXT_TS#0
CLK_EXP_P
CLK_EXP_N
DDR3_DRAMRST#
AL1
AM1
AN1
{27}
{27}
ns
ns
0
0
PEG_CLK
PEG_CLK#
SM_DRAMRST#
JTAG & BPM
68
PWR MANAGEMENT
R549
R520
R522
AR30 BCLK_ITP_P
AT30 BCLK_ITP_N
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
+V1.1S_VTT
A16 BCLK_CPU_P_R
B16 BCLK_CPU_N_R
H_COMP0
+V1.1S_VTT
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
COMP1
+V1.1S_VTT
COMP2
G16
AT24
H_COMP1
H_COMP2
CLOCKS
COMP3
DDR3
MISC
AT23
MISC
H_COMP3
Voltage Level?
VR_PROCHOT#
{55}
DDR3 Compensation Signals

SM_RCOMP_2
H_COMP1
H_COMP3
SM_RCOMP_1
H_COMP0
H_COMP2
SM_RCOMP_0
PM_DRAM_PWRGD
R198
49.9,1%
R0402
R544
49.9,1%
R0402
R543
20,1%
r0402
R542
20,1%
r0402
R439
100,1%
R0402
R438
R437
24.9,1% 130,1%
R0402
R0402
R101
3.3K
CPU_VTT_PWG
R344
750 OHM
R0402
TOPSTAR TECHNOLOGY
bent
Page Name
Arrandule
Size
C
C46
Project Name
Rev
A
Date:
Sheet
8
59
of
5
U2D
U2C
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
{16}
{16}
{16}
MA_A_BS0
MA_A_BS1
MA_A_BS2
AC3
AB2
U7
SA_BS[0]
SA_BS[1]
SA_BS[2]
{16}
{16}
{16}
MA_A_CAS#
MA_A_RAS#
MA_A_WE#
AE1
AB3
AE9
SA_CAS#
SA_RAS#
SA_WE#
AA6
AA7
P7
M_CLK_DDR0 {16}
M_CLK_DDR#0 {16}
M_CKE0
{16}
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
Y6
Y5
P6
M_CLK_DDR1 {16}
M_CLK_DDR#1 {16}
M_CKE1
{16}
SA_CS#[0]
SA_CS#[1]
AE2
AE8
SA_ODT[0]
SA_ODT[1]
AD8
AF9
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
DDR SYSTEM MEMORY A
{16} MA_DATA[63:0]
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
B9
D7
H7
M7
AG6
AM7
AN10
AN13
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
C9
F8
J9
N9
AH7
AK9
AP11
AT13
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
C8
F9
H9
M9
AH8
AK10
AN11
AR13
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_CS#0
M_CS#1
M_ODT0
M_ODT1
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_A_A0
MA_A_A1
MA_A_A2
MA_A_A3
MA_A_A4
MA_A_A5
MA_A_A6
MA_A_A7
MA_A_A8
MA_A_A9
MA_A_A10
MA_A_A11
MA_A_A12
MA_A_A13
MA_A_A14
MA_A_A15
{16}
{16}
{16}
{16}
MA_DM[7:0] {16}
MA_DQS#[7:0]
{16}
MA_DQS[7:0]
{16}
MA_A_A[15:0] {16}
S_Bot
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
{15}
{15}
{15}
MB_B_BS0
MB_B_BS1
MB_B_BS2
AB1
W5
R7
SB_BS[0]
SB_BS[1]
SB_BS[2]
{15}
{15}
{15}
MB_B_CAS#
MB_B_RAS#
MB_B_WE#
AC5
Y7
AC6
SB_CAS#
SB_RAS#
SB_WE#
DDR SYSTEM MEMORY - B
{15} MB_DATA[63:0]
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
W8
W9
M3
M_CLK_DDR2 {15}
M_CLK_DDR#2 {15}
M_CKE2
{15}
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
V7
V6
M2
M_CLK_DDR3 {15}
M_CLK_DDR#3 {15}
M_CKE3
{15}
SB_CS#[0]
SB_CS#[1]
AB8
AD6
M_CS#2
M_CS#3
{15}
{15}
SB_ODT[0]
SB_ODT[1]
AC7
AD1
M_ODT2
M_ODT3
{15}
{15}
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
D4
E1
H3
K1
AH1
AL2
AR4
AT8
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D5
F4
J4
L4
AH2
AL4
AR5
AR8
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C5
E3
H4
M5
AG2
AL5
AP5
AR7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
MB_DM[7:0]
{15}
MB_DQS#[7:0]
{15}
MB_DQS[7:0]
MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
{15}
MB_B_A[15:0] {15}
MB_B_A0
MB_B_A1
MB_B_A2
MB_B_A3
MB_B_A4
MB_B_A5
MB_B_A6
MB_B_A7
MB_B_A8
MB_B_A9
MB_B_A10
MB_B_A11
MB_B_A12
MB_B_A13
MB_B_A14
MB_B_A15
S_Bot
TOPSTAR TECHNOLOGY
bent
Page Name
Arrandule
Size
C
C46
Project Name
Rev
A
Date:
Sheet
9
59
of
5
+VCC_CORE
{55}
+V1.1S_VTT {8,11,27,28,29,38,50,51,55}
U2F
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
PSI#
AN33
PM_PSI#
{55}
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR
{55}
{55}
{55}
{55}
{55}
{55}
{55}
{55}
+V1.1S_VTT
C362
C363
C364
C365
C380
C171
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
ns
+V1.1S_VTT
R575
1K
R0402
R221
1K
R0402
PM_PSI#
PM_DPRSLPVR
R576
1K
R0402
C186
C388
C145
C146
C147
C368
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
0.22uF/10V,X7R
0.01uF/25V,X7R
R220
1K
R0402
ns
+V1.1S_VTT
POWER
CPU VIDS
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
CPU CORE SUPPLY
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
VTT_SELECT
G15
C360
C361
10uF/6.3V,X5R
10uF/6.3V,X5R
+VCC_CORE
Clarksfield 1.1v
Arrandale 1.05v
VTT_SELECT_R
R193
0
C379
C174
C175
C189
C209
C378
C169
C190
C191
C188
C187
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
VTT_SELECT {50}
B
+VCC_CORE
ISENSE
SENSE LINES
+V1.1S_VTT
1.1V RAIL POWER
+VCC_CORE
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
AN35 Vcore_IMON_R R580

0
Vcore_IMON {55}
AJ34
AJ35
VCCSENSE_R
VSSSENSE_R
B15
A15
TP_VTT_SENSE
ns
TP_VSS_SENSE_VTT
ns
C384
C192
C172
C173
C176
C375
C374
C387
C386
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R 10uF/6.3V,X5R
C383
C382
10uF/6.3V,X5R
10uF/6.3V,X5R
R589
100,1%
R0402
R581
R582
0
0
ICTP
T15
ICTP
T14
C170
VCCSENSE
VSSSENSE
R590
100,1%
R0402
{55}
{55}
C373
C381
C385
C377
C376
C199
C198
C197
C196
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
0.22uF/10V,X7R
0.22uF/10V,X7R 0.01uF/25V,X7R
C212
C210
C211
0.01uF/25V,X7R
10uF/6.3V,X5R
TOPSTAR TECHNOLOGY
bent
Page Name
Arrandule
Size
C
C46
Project Name
Rev
A
Date:
Sheet
10
59
of
5
+VGFX
{51}
+V1.1S_VTT {8,10,27,28,29,38,50,51,55}
+V1.5
{8,15,16,49,56,57}
+V1.8S
{26,28,29,31,49,56,57}
+VGFX
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
C160
C371
C161
C183
0.22uF/10V,X7R
0.01uF/25V,X7R
10uF/6.3V,X5R
10uF/6.3V,X5R
J24
J23
H25
VTT1_45
VTT1_46
VTT1_47
GRAPHICS
10uF/6.3V,X5R
10uF/6.3V,X5R
FDI
C150
VGFXVCCSEN {51}
VGFXVSSSEN {51}
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
AM22
AP22
AN22
AP23
AM23
AP24
AN24
GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
AR25
AT25
AM24
GFXVR_DPRSLPVR {51}
VGFX_IMON
{51}
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
C148
C154
C152
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
1.1V
1.8V
C151
10uF/6.3V,X5R
PEG & DMI
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58
GFXVR_EN
{51}
R545
4.7K
R0402
VTT0_59
VTT0_60
VTT0_61
VTT0_62
P10
N10
L10
K10
C106
C110
C108
C107
C111
C109
10uF/6.3V,X5R
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
+V1.1S_VTT
+V1.1S_VTT
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
{51}
{51}
{51}
{51}
{51}
{51}
{51}
+V1.5
+V1.1S_VTT
C149
AR22
AT22
- 1.5V RAILS
C372
VAXG_SENSE
VSSAXG_SENSE
DDR3
C184
GRAPHICS VIDs
C162
POWER
C181
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
SENSE
LINES
U2G
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
J22
J20
J18
H21
H20
H19
VCCPLL1
VCCPLL2
VCCPLL3
L26
L27
M26
C358
C359
10uF/6.3V,X5R
10uF/6.3V,X5R
+V1.1S_VTT
B
C185
C153
10uF/6.3V,X5R
10uF/6.3V,X5R
VCCPLL
+V1.8S
VCCPLL
FB8 1
2 FB0805
300ohm@100MHz,1.5A
C200
C201
C195
C193
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
10uF/6.3V,X5R
TOPSTAR TECHNOLOGY
bent
Page Name
Arrandule
Size
C
C46
Project Name
Rev
A

11
59
Date:
Sheet
of
5
U2I
U2H
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
VSS
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
TOPSTAR TECHNOLOGY
bent
S_Bot
S_Bot
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
NCTF
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
Page Name
Arrandule
Size
B
C46
Project Name
Rev
A
Date:
Sheet
of
12
59
4
U2E
R570
R0402
3.01K,1%
R573
3.01K,1%
R0402
R572
R0402
3.01K,1%
ns
CFG0
CFG3
CFG4
ns
C
never pull down for switchable graphic
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
B19
A19
RSVD15
RSVD16
A20
B20
RSVD17
RSVD18
U9
T9
RSVD19
RSVD20
AC9
AB9
RSVD21
RSVD22
C1
A3
RSVD_NCTF_23
RSVD_NCTF_24
J29
J28
RSVD26
RSVD27
A34
A33
RSVD_NCTF_28
RSVD_NCTF_29
C35
B35
RSVD_NCTF_30
RSVD_NCTF_31
H12
AP1
AT2
RSVD_NCTF_42
RSVD_NCTF_43
AT3
AR1
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65
E15
F15
A2
D15
C15
AJ15
AH15
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
VSS
AP34
H14
D
CPU_HOLE
ns
CPU_HOLE
ns
CPU_HOLE
ns
1
2
3
4
5
6
7
8
9
CPU_HOLE
ns
1
2
3
4
5
6
7
8
9
RSVD_NCTF_40
RSVD_NCTF_41
H13
1
2
3
4
5
6
7
8
9
RSVD38
RSVD39
AJ26
AJ27
H11
1
2
3
4
5
6
7
8
9
RSVD36
RSVD_NCTF_37
AL26
AR2
1
2
3
4
5
6
7
8
9
VREF_CH_A_DIMM
VREF_CH_B_DIMM
AH25
AK26
1
2
3
4
5
6
7
8
9
0
0
ns
RSVD34
RSVD35
1
2
3
4
5
6
7
8
9
R209
R204
{16} VREFA_DDR3
{15} VREFB_DDR3
AJ13
AJ12
1
2
3
4
5
6
7
8
9
ns
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14
RESERVED
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
RSVD32
RSVD33
BRACKET
BRACKET1_Mylar
CPU_BRACKET
R579 0
Mylar
R0402
TOPSTAR TECHNOLOGY
bent
Page Name
Arrandule
Size
B
C46
Project Name
Rev
A
Date:
Sheet
of
13
59
5
PCH Strapping
Name
Description
Reboot option
at power-up
SPKR
GNT2#/
GPIO53
Intel Anti-Theft
Technology
Intel Anti-Theft
Technology
NV_ALE
DMI termination voltage
Flash Descriptor
Security
HDA_DOCK_EN
#/GPIO33
C
HDA_SDO
Default Mode
Processor Strapping
Integrated VRM Mode

Disabled
Enabled
Default(SPI): Leave both GNT0#and GNT1# floating. Boot:
From PCI: Connect GNT1# to ground with 1k resistor,leave GNT0# Floating
From LPC:Connect both GNT0# and GNT1#to ground with 1k resistor
Configures DMI
Default Mode
for ESI
SPI_MOSI
NV_CLE
Top Block Swap

Mode
GNT3#/GPIO55
GNT0#
GNT1#
1
No Reboot Mode
with TCO Disabled
Internal pull-up.
Leave as "No Connect"
INIT3_3V#
INTVRMEN
0
Default Mode
Weak internal pull-down
Disabled
Enabled
Disabled
Enabled
Weak internal pull-up

Default: floating
GPIO27
Name
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
Pin Attr
+V3.3S I/O
+V3.3S I/O
+V3.3S I/OD
+V3.3S I/OD
+V3.3S I/OD
+V3.3S I/OD
+V3.3S I/O
+V3.3S I/O
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V3.3S
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
+V3.3S
+V3.3S
+V3.3S
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3S
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
+V3.3A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
CFG[4]
Embedded
DisplayPort
Presence
An external Display
Port device is
connected to the
Embedded Display Port
CFG[3]
PCI-E Static
Lane Reversal
Lane Numbers
Resersed 15->0.14->1,
...
CFG[0]
Weak internal pull-up
PIC-Express
Configuration Select
Bifurcation enable
1
No Physical Display
Port attached to
Embedded Displayport
Normal Operation
Single PCIE Graphics
Note: Default value for each bit is 1 unless specified otherless
1.Security measure
Security measure Overridden
2.Sampled on the rising
enabled
edge of PWROK,disables
Intel ME& its freatures
Weak internal
/
pull-down
Weak internal
/
pull-down
HDA_SYNC Weak internal pull-down

Intel ME Crypto
GPIO15
TLS cipher suite With No confidentiality
GPIO8
Pin
Confidentiality
Weak internal
pull-up
Disables the
internal VccVRM
Description
Name
GPIO46
10Kohm pull up to V3.3S
EXTSMI# Reserve for EC,10k to V3.3S
GPIO47
GPIO48
8.2Kohm pull up to V3.3S
GPIO49
GPIO50
As LVDS_DDC_SEL for DDC select
GPIO51
GPIO52
As EC_RUNTIME_SCI# link to EC,10K to V3.3S GPIO53
GPIO54
10Kohm pull up to V3.3AL
GPIO55
As USB_OC#5 for USB board
GPIO56
GPIO57
GPIO58
GPIO59
NC
GPIO60
GPIO61
10K to GND,reserve 10K to V3.3S for debug GPIO62
GPIO63
GPIO64
MiniPCIE_REQ# Reserve,10k to V3.3S
GPIO65
GPIO66
minicard_CLKREQ# Reserve,10k to V3.3S
GPIO67
GPIO72
Reserve 10Kohm pull up to V3.3S for debug GPIO73
GPIO74
10Kohm pull up to V3.3AL and 10K to GND
GPIO75
EXPCARD_CLKREQ# Reserve,100k to V3.3AL
8.2Kohm pull up to V3.3AL
Reserve 10Kohm pull down to GND for debug
NC
As ALW_ACK link to EC and 10K to V3.3AL
As AC_IN_PCH link to EC
4.7Kohm pull down to GND
10Kohm pull down to GND
10Kohm pull down to GND for BIOS ver
As USB_OC#2 for USB board
As TP(test point)
/
Enables the
internal VccVRM
Pin Attr
+V3.3A I/O
+V3.3A I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3S I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
+V3.3A I/O
Description
As TP(test point)
As PCIE_CLKREQ for N10,10K to GND and 10K to V3.3GPU
Reserve 1K pull down to GND
As LVDS_BLT_SEL for BLT select
Reserve 1K pull down to GND
As SML1CLK and 2.2K to V3.3AL
As PM_SUS_STAT# link to EC and 1k to V3.3AL
As TP
As TP
NC
NC
NC
As CLK_CR_48M for IT1337E output 48M clock
As BAT_LOW# link to EC and 10K to V3.3AL
10Kohm pull down to GND
As SML1DATA and 2.2K to V3.3AL
TOPSTAR TECHNOLOGY
bent
Page Name
black
Size
C
C46
Project Name
Rev
A
Date:
Sheet
14
59
of
5
+V3.3S
+V1.5
+V0.75S
{6,8,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{8,11,16,49,56,57}
{16,49,56}
+V0.75S +V1.5
BA0
BA1
BA2
114
121
CS0
CS1
11
28
46
63
136
153
170
187
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
113
115
110
WE
CAS
RAS
M_CKE2
M_CKE3
73
74
CKE0
CKE1
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR3
M_CLK_DDR#3
101
103
102
104
CK0
CK0
CK1
CK1
116
120
ODT0
ODT1
12
29
47
64
137
154
171
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
200
202
SDA
SCL
197
201
SA0
SA1
199
VDDSPD
1
126
VREF_DQ
VREF_CA
C29
198
30
EVENT#
RESET#
2.2UF/10V,X7R
C0805
77
122
125
NC1
NC2
NCTEST
C47
C78
C27
C77
C75
C44
C76
C34
C45
ns
ns
C0805
C0805
C0402
C0805
C0805
C0402
C0805
C0805
C0402
2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
2.2UF/10V,X7R
10UF/6.3V,X5R
0.1UF/25V,Y5V
2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
+V1.5
C46
10uF/6.3V,X5R
C0805
C48
10uF/6.3V,X5R
C0805
{9}
{9}
{9}
+V1.5
MB_B_BS0
MB_B_BS1
MB_B_BS2
{9}
{9}
C25
C21
C40
M_CS#2
M_CS#3
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
C20
C19
C38
C35
C39
ns
ns
ns
C0402
C0805
C0805
C0402
C0805
C0402
C0805
C0805
0.1UF/25V,Y5V2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
2.2UF/10V,X7R
ns 0.1UF/25V,Y5V
2.2UF/10V,X7R
2.2UF/10V,X7R
C
Layout note:DDR slot VDD PIN
{9}
MB_DM[7:0]
{9}
{9}
{9}
MB_B_WE#
MB_B_CAS#
MB_B_RAS#
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
M_ODT2
M_ODT3
MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
{9} MB_DQS[7:0]
{6,16,23,40,41}
{6,16,23,40,41}
+V3.3S
SMB_DATA_S
SMB_CLK_S
R46
R49
Note:
SO-DIMM1 SPD Address is 0xA4
10K R0402
10K R0402
VREFB_DDR3
VREFB_CA
B
C31
C30
0.1UF/25V,Y5V
C0402
C28
0.1UF/25V,Y5V
C0402
2.2UF/10V,X7R
C0805
close to DDR pin1
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
close to DDR
pin199
DDR3_SODIMM204_0
{8} DIM_EXTTS#1
MB_DATA[63:0] {9}
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
10
27
45
62
135
152
169
186
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7
MB_DQS#[7:0]
GND1
GND2
109
108
79
+V1.5
DIMM2
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
{9}
205
206
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
MB_B_A0
MB_B_A1
MB_B_A2
MB_B_A3
MB_B_A4
MB_B_A5
MB_B_A6
MB_B_A7
MB_B_A8
MB_B_A9
MB_B_A10
MB_B_A11
MB_B_A12
MB_B_A13
MB_B_A14
MB_B_A15
VTT2
VTT1
MB_B_A[15:0]
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
{9}
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
204
203
{8,16} DDR3_DRAMRST#
+V1.5
+V1.5
R48
1K,1%
R0402
R50
1K,1%
R0402
VREFB_DDR3
VREFB_DDR3
VREFB_CA
{13}
R47
1K,1%
R0402
R51
C53
1K,1%
R04020.1UF/25V,Y5V
C0402
C43
2.2UF/10V,X7R
C0805
TOPSTAR TECHNOLOGY
bent
Page Name
DDR3 SODIMM1
Size
C
C46
Project Name
Rev
A
Date:
Sheet
15
59
of
5
+V3.3S
+V1.5
+V0.75S
{6,8,15,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{8,11,15,49,56,57}
{15,49,56}
+V0.75S +V1.5
114
121
CS0
CS1
11
28
46
63
136
153
170
187
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
113
115
110
WE
CAS
RAS
M_CKE0
M_CKE1
73
74
CKE0
CKE1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
101
103
102
104
CK0
CK0
CK1
CK1
116
120
ODT0
ODT1
12
29
47
64
137
154
171
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
200
202
SDA
SCL
197
201
SA0
SA1
199
VDDSPD
1
126
VREF_DQ
VREF_CA
C50
2.2UF/10V,X7R
198
30
EVENT#
RESET#
C0805
77
122
125
NC1
NC2
NCTEST
{9}
{9}
M_CS#0
M_CS#1
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
MA_A_WE#
MA_A_CAS#
MA_A_RAS#
M_ODT0
M_ODT1
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
{9} MA_DQS[7:0]
{6,15,23,40,41}
{6,15,23,40,41}
SMB_DATA_S
SMB_CLK_S
R65
R64
+V3.3S
VREFA_DDR3R54
0.1UF/25V,Y5V
C42
C0402
10K R0402
10K R0402
0
VREFA_CA
C41
C52
0.1UF/25V,Y5V
C0402
2.2UF/10V,X7R
C0805
close to DDR pin
C96
C37
C33
C417
C26
C22
C36
C49
+
ns
ns
ns
ns
C0402
C0805
C0805
C0402
C0805
C0402
C0805
CT7343_19
0.1UF/25V,Y5V
2.2UF/10V,X7R
2.2UF/10V,X7R
2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
220uF/2.5V,POSCAP
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
10
27
45
62
135
152
169
186
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
DDR3_SODIMM204_0
{8} DIM_EXTTS#0
MA_DATA[63:0] {9}
1, A minimum of 9 high frequency

capacitors are recommended to be
placed near each SO-DIMM of DDR2.
2, 2.2F*5 per DIMM,0.1F*4 per
DIMM,330F*1 per DIMM
+V1.5
C208
C23
10uF/6.3V,X5R
C0402
C419
C418
C0805
2.2UF/10V,X7R
0.1UF/25V,Y5V
C213
C24
10uF/6.3V,X5R
C0805
C0402
2.2UF/10V,X7R
0.1UF/25V,Y5V
Layout note:DDR slot VDD PIN

+V0.75S
C51
C72
C32
C18
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
C
MA_DQS#[7:0]
GND1
GND2
BA0
BA1
BA2
MA_A_BS0
MA_A_BS1
MA_A_BS2
DIMM1
{9}
205
206
109
108
79
{9}
{9}
{9}
{9} MA_DM[7:0]
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
MA_A_A0
MA_A_A1
MA_A_A2
MA_A_A3
MA_A_A4
MA_A_A5
MA_A_A6
MA_A_A7
MA_A_A8
MA_A_A9
MA_A_A10
MA_A_A11
MA_A_A12
MA_A_A13
MA_A_A14
MA_A_A15
VTT2
VTT1
{9} MA_A_A[15:0]
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
204
203
+V1.5
{8,15} DDR3_DRAMRST#
+V1.5
+V1.5
R52
1K,1%
R0402
VREFA_DDR3
R53
1K,1%
R0402
R435
1K,1%
R0402
VREFA_DDR3
VREFA_CA
{13}
R436
C328
1K,1%
R04020.1UF/25V,Y5V
C0402
C327
2.2UF/10V,X7R
C0805
TOPSTAR TECHNOLOGY
bent
Page Name
DDR3 SODIMM0
Size
C
C46
Project Name
Rev
A
Date:
Sheet
16
59
of
5
+V3.3GPU
{20,21,33,34,52,57}
+VGA_CORE {52}
+V1.05GPU {18,19,20,57}
+V3.3GPU
+V3.3GPU
GR53
10K
PM
PM
GR16
0
+V3.3GPU
S_Top
GR41
10K
PM
S_Bot
S_Top
ns GC3
0.1uF/10V,X7R
PCIE_CLKREQ
GPU_RST#
{43} EC_GPU_RST#
BUF_PLT_RST#
ns
+V1.05GPU
S_Top
4
2
GPU_RST#
GR2 is used for test only, so it

can be unstuff for cost saving.
SN74AHC1G08DBV
SOT23_5
S_Top
GR42
100K
S_Bot
PCIE_CLKREQ
GR20 200,1%
{23} PCIE_CLKREQ
{23} CLK_PCIE_N11M
{23} CLK_PCIE_N11M#
PEG_RXP15
PEG_RXN15
PEG_NV_RXP15
PEG_NV_RXN15
{7} PEG_NV_RXP[15:0]
{7} PEG_NV_RXN[15:0]
PEG_RXP14
PEG_RXN14
{7} PEG_RXP[15:0]
PEG_NV_RXP14
PEG_NV_RXN14
{7} PEG_RXN[15:0]
PEG_RXP13
PEG_RXN13
PEG_NV_RXP13
PEG_NV_RXN13
PEG_RXP12
PEG_RXN12
PEG_NV_RXP12
PEG_NV_RXN12
PEG_RXP11
PEG_RXN11
PEG_NV_RXP11
PEG_NV_RXN11
PEG_RXP10
PEG_RXN10
PEG_NV_RXP10
PEG_NV_RXN10
PEG_RXP9
PEG_RXN9
PEG_NV_RXP9
PEG_NV_RXN9
PEG_RXP8
PEG_RXN8
PEG_NV_RXP8
PEG_NV_RXN8
PEG_RXP7
PEG_RXN7
PEG_NV_RXP7
PEG_NV_RXN7
PEG_RXP6
PEG_RXN6
PEG_NV_RXP6
PEG_NV_RXN6
PEG_RXP5
PEG_RXN5
PEG_NV_RXP5
PEG_NV_RXN5
PEG_RXP4
PEG_RXN4
PEG_NV_RXP4
PEG_NV_RXN4
PEG_RXP3
PEG_RXN3
PEG_NV_RXP3
PEG_NV_RXN3
PEG_RXP2
PEG_RXN2
PEG_NV_RXP2
PEG_NV_RXN2
PEG_RXP1
PEG_RXN1
PEG_NV_RXP1
PEG_NV_RXN1
PEG_RXP0
PEG_RXN0
PEG_NV_RXP0
PEG_NV_RXN0
Under GPU
AM16
AR13
R0402 AJ17
ns
AJ18
S_Top
PEX_RST#
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK#
GC149 0.1UF/10V,X7R
GC150 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP15
PEG_NV_TXN15
AL17
AM17
PEX_TX0
PEX_TX0#
AP17
AN17
PEX_RX0
PEX_RX0#
GC97 0.1UF/10V,X7R
GC100 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP14
PEG_NV_TXN14
AM18
AM19
PEX_TX1
PEX_TX1#
AN19
AP19
PEX_RX1
PEX_RX1#
GC152 0.1UF/10V,X7R
GC153 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP13
PEG_NV_TXN13
AL19
AK19
PEX_TX2
PEX_TX2#
AR19
AR20
PEX_RX2
PEX_RX2#
GC104 0.1UF/10V,X7R
GC105 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP12
PEG_NV_TXN12
AL20
AM20
PEX_TX3
PEX_TX3#
AP20
AN20
PEX_RX3
PEX_RX3#
GC156 0.1UF/10V,X7R
GC157 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP11
PEG_NV_TXN11
AM21
AM22
PEX_TX4
PEX_TX4#
AN22
AP22
PEX_RX4
PEX_RX4#
GC108 0.1UF/10V,X7R
GC110 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP10
PEG_NV_TXN10
GC161 0.1UF/10V,X7R
GC160 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP9
PEG_NV_TXN9
GC113 0.1UF/10V,X7R
GC116 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP8
PEG_NV_TXN8
GC165 0.1UF/10V,X7R
GC166 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP7
PEG_NV_TXN7
GC119 0.1UF/10V,X7R
GC120 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP6
PEG_NV_TXN6
AP26
AN26
PEX_RX9
PEX_RX9#
GC170 0.1UF/10V,X7R
GC171 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP5
PEG_NV_TXN5
AM27
AM28
PEX_TX10
PEX_TX10#
AN28
AP28
PEX_RX10
PEX_RX10#
GC124 0.1UF/10V,X7R
GC125 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP4
PEG_NV_TXN4
AL28
AK28
PEX_TX11
PEX_TX11#
AR28
AR29
PEX_RX11
PEX_RX11#
GC176 0.1UF/10V,X7R
GC174 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
PEG_NV_TXP3
PEG_NV_TXN3
AK29
AL29
PEX_TX12
PEX_TX12#
AP29
AN29
PEX_RX12
PEX_RX12#
GC128 0.1UF/10V,X7R
GC129 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP2
PEG_NV_TXN2
AM29
AM30
PEX_TX13
PEX_TX13#
GC179 0.1UF/10V,X7R
GC180 0.1UF/10V,X7R
S_Bot
PM
S_Bot
PM
GC134 0.1UF/10V,X7R
GC133 0.1UF/10V,X7R
S_Top
PM
S_Top
PM
PEG_NV_TXP1
PEG_NV_TXN1
AL22
AK22
PEX_TX5
PEX_TX5#
AR22
AR23
PEX_RX5
PEX_RX5#
AL23
AM23
PEX_TX6
PEX_TX6#
AP23
AN23
PEX_RX6
PEX_RX6#
AM24
AM25
PEX_TX7
PEX_TX7#
AN25
AP25
PEX_RX7
PEX_RX7#
AL25
AK25
PEX_TX8
PEX_TX8#
AR25
AR26
PEX_RX8
PEX_RX8#
AL26
AM26
PEX_TX9
PEX_TX9#
AN31
AP31
PEX_RX13
PEX_RX13#
AM31
AM32
PEX_TX14
PEX_TX14#
AR31
AR32
PEX_RX14
PEX_RX14#
AN32
AP32
PEX_TX15
PEX_TX15#
AR34
AP34
PEX_RX15
PEX_RX15#
PEG_NV_TXP0
PEG_NV_TXN0
PCI_EXPRESS
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
AR16
AR17
VerA: all PCIE singala lane reversal
PEX_IOVDD_01
PEX_IOVDD_02
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05
AK16
AK17
AK21
AK24
AK27
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24
PEX_IOVDDQ_25
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
GC71
GC73
GC69
0.1uF/10V,X7R
+VGA_CORE
S_Top
PM
+VGA_CORE
MAX:19.6A
Under GPU
Near GPU
GC26
GC35
GC66
GC39
GC50
C0402
C0603
0.047uF/16V,X7R
0.22uF/10V,X7R
1uF/10V,X5R
0.047uF/16V,X7R
0.22uF/10V,X7R
S_Top
S_Top
S_Top
PM
PM
PM
S_Top
S_Top
PM
PM
A2
AA4
AB4
AB7
AC5
AD6
AF6
AG6
AJ5
AK15
AL7
E7
H32
M7
P6
U7
V6
Y4
GC51
GC62
GC31
C0805
4.7uF/10V,X5R
PM S_Top
GC60
C0402
C0402
0.022uF/16V,X7R
0.022uF/16V,X7R
0.022uF/16V,X7R
S_Top
PM
PMS_Top
PMS_Top
GC70
GC59
GC49
C0402
0.01uF/25V,X7R C0402
0.01uF/25V,X7R
0.01uF/25V,X7R
0.01uF/25V,X7R
S_Top
S_Top
PM
PM
S_Top
S_Top
PM
PM
GC64
GC72
U3F
GC55
C0402
4700pF/25V,X7R C0402
0.01uF/25V,X7R
4700pF/25V,X7R
S_Top
PM
S_Top
PM
PMS_Top
VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056
GND
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
VDD_073
VDD_074
VDD_075
VDD_076
VDD_077
VDD_078
VDD_079
VDD_080
VDD_081
VDD_082
VDD_083
VDD_084
VDD_085
VDD_086
VDD_087
VDD_088
VDD_089
VDD_090
VDD_091
VDD_092
VDD_093
VDD_094
VDD_095
VDD_096
VDD_097
VDD_098
VDD_099
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
+V3.3GPU
MAX:120mA
Under GPU
Near GPU
S_Top
PM
NB10_G128
S_Bot
PM
GC23
GC11
C0603
C0805
1uF/10V,X7R 4.7uF/10V,X5R
0.1uF/10V,X7R
F7
AG19
PM S_Top
PM S_Top
MAX:180mA
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD_SENSE1
VDD_SENSE2
VDD_SENSE3
GND_SENSE1
GND_SENSE2
GND_SENSE3
PEX_PLLVDD
J10
J11
J12
J13
J9
D35
P7
AD20
AD19
R7
E35
AG14
PEX_CAL_PU_GND/NC
AG20
PEX_TERMP
AG21
TESTMODE
AP35
GC13
GC18
0.1uF/10V,X7R
0.1uF/10V,X7R
S_Top
S_Top
PM
PM
PM
S_Bot
Near GPU
MAX:120mA
T16
+V1.05GPU
R0402
GR19 2.49K,1% R0402

PM
GR29 10K R0402S_Top
S_Top
ns
PM
S_Top
GFB1
1
2 FB0603
120ohm@100MHz,500mA
PM
GC8
GC6
C0805
1uF/10V,X7R
4.7uF/10V,X5RS_Top
C0603
PM
S_Top
PMS_Top
ns
+V3.3GPU
S_Top
GR28 10K
R0402
S46 VerA:Add reserved pull up resistor

on TESTMODE follewed nvidia suggest
S_Bot
PM
S46 VerA:Delete some caps

followed N10M DG 090327
NVVDD_SENSE {52}
R505 0
U3G
+VGA_CORE
NVVDD
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
GC91
GC82
GC98
GC65
GC90
GC102
C0805
C0805
C0805
0.1uF/10V,X7R C0402
C0402
4.7uF/10V,X5R 4.7uF/10V,X5R10uF/6.3V,X5R
1uF/10V,X5R 1uF/10V,X5R
S_Top
PM S_Top
PM S_Top
PM S_Top
PM
S_Top
S_Top
PM
PM
GC32
PEX_SVDD_3V3_1
PEX_SVDD_3V3_2
PM S_Top
+V1.05GPU
PEX_IOVDD+PEX_IOVDDQ:MAX:2200mA
Under GPU
Near GPU
GC75
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_14
NC_16
NC_17
NC_18
NC_21
NC_22
NC_23
GC87
C0805
10uF/6.3V,X5R
GC93
C0805
4.7uF/10V,X5R
C0402
0.1uF/10V,X7R C0402
1uF/10V,X5R 1uF/10V,X5R
S_Top
PM S_Top
PM
S_Top
S_Top
PM
PM
GC78
GC56
C0402
0.047uF/16V,X7R
0.022uF/16V,X7R
S_Top
PM
S_Top
PM
NB10_G128
CLOSE
TO N10
Near GPU
GC84
U3A
GND
{8,26,38,39,40,41,43,44}
GU2
VCC
Layout Notice
Under GPU:
The total trace length measured from GPU ball to cap is no more than 150 mil
Near GPU:
The total trace length measured from GPU ball to cap is no more than 750 mil
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B3
B30
B33
B6
B9
C2
C34
E12
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
NB10_G128
S_Bot
PM
llh0523
TOPSTAR TECHNOLOGY
bent
Page Name
N10M PCIE&PWR&GND
Size
D
C46
Project Name
Rev
A

17
59
of
Date:
Sheet
5
MAX:5700mA
L32
N33
L33
N34
N35
P35
P33
P34
K35
K33
K34
H33
G34
G33
E34
E33
G31
F30
G30
G32
K30
K32
H30
K31
L31
L30
M32
N30
M30
P31
R32
R30
AG30
AG32
AH31
AF31
AF30
AE30
AC32
AD30
AN33
AL31
AM33
AL33
AK30
AK32
AJ30
AH30
AH33
AH35
AH34
AH32
AJ33
AL35
AM34
AM35
AF33
AE32
AF34
AE35
AE34
AE33
AB32
AC35
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
P32
H34
J30
P30
AF32
AL32
AL34
AF35
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBADQS_0
FBADQS_1
FBADQS_2
FBADQS_3
FBADQS_4
FBADQS_5
FBADQS_6
FBADQS_7
L34
H35
J32
N31
AE31
AJ32
AJ34
AC33
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBADQS_0#
L35
FBADQS_1# G35
FBADQS_2# H31
FBADQS_3# N32
FBADQS_4# AD32
FBADQS_5# AJ31
FBADQS_6# AJ35
FBADQS_7# AC34
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
FBVDDQ0
FBVDDQ1
FBVDDQ2
FBVDDQ3
FBVDDQ4
FBVDDQ5
FBVDDQ6
FBVDDQ7
FBVDDQ8
FBVDDQ9
FBVDDQ10
FBVDDQ11
FBVDDQ12
FBVDDQ13
FBVDDQ14
FBVDDQ15
FBVDDQ16
FBVDDQ17
FBVDDQ18
FBVDDQ19
FBVDDQ20
FBVDDQ21
FBVDDQ22
FBVDDQ23
FBVDDQ24
FBVDDQ25
FBVDDQ26
FPA
V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29/NC
FBA_CMD30/NC
Under GPU
Near GPU
+V1.5GPU
PM
PM
GC83
GC77
GC68
4.7uF/10V,X5R
0.1uF/10V,X7R
GC48
0.1uF/10V,X7R
PM
PM
FBA_A4
FBA_RAS#
FBA_A5
FBA_BA1
FBB_A2
FBB_A4
FBB_A3
FBB_CKE
FBB_CS#
FBA_A11
FBA_CAS#
FBA_WE#
FBA_BA0
FBB_A5
FBA_A12
FBA_RST
FBA_A7
FBA_A10
FBA_CKE
FBA_A0
FBA_A9
FBA_A6
FBA_A2
FBA_A8
FBA_A3
FBA_A1
FBA_A13
FBA_BA2
FBB_ODT0
FBA_CS0#
FBA_ODT0
FBB_VREF1
FBA_CLK0
T32
FBA_CLK0#
T31
AC31 FBA_CLK1
AC30 FBA_CLK1#
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
ODT0
ODT1
K1
J1
FBA_ODT0
CS0#
CS1#
L2
L1
FBA_CS0#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
D3
E7
FBADQM_0
FBADQM_3
CK
CK#
J7
K7
FBA_CLK0
FBA_CLK0#
CKE0
CKE1
K9
J9
FBA_CKE
ZQ0
ZQ1
L8
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
DMU
DML
U26
A1
C1
F1
D2
H2
A8
C9
E9
H9
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
+V1.5GPU
FBB_CKE
PM
FBA_CKE
FBA_RST
GR46
1K,1%
GR38
10K
PM
GR31
10K
PM
GR33
10K
FBB_VREF2
PM
GR47
1K,1%
GC163
0.01uF/16V,X7R
PM
PM
+V1.5GPU
GR26
1K,1%
FBAD_25
FBAD_27
FBAD_28
FBAD_29
FBAD_26
FBAD_30
FBAD_24
FBAD_31
FBADQS_3#
FBADQS_3
GR48
243,1%
FBB_VREF2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
ODT0
ODT1
K1
J1
FBA_ODT0
CS0#
CS1#
L2
L1
FBA_CS0#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
FBADQM_1
FBADQM_2
CK
CK#
J7
K7
FBA_CLK0
FBA_CLK0#
CKE0
CKE1
K9
J9
FBA_CKE
ZQ0
ZQ1
L8
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
PM
FBAD_13
FBAD_11
FBAD_14
FBAD_8
FBAD_12
FBAD_10
FBAD_15
FBAD_9
FBADQS_1#
FBADQS_1
FBB_VREF1
PM
GR25
1K,1%
GC89
0.01uF/16V,X7R
PM
PM
FBAD_23
FBAD_19
FBAD_20
FBAD_16
FBAD_22
FBAD_17
FBAD_21
FBAD_18
FBADQS_2#
FBADQS_2
GR27
243,1%
PM
PM
T17
T30
FBA_DEBUG
ns
MAX:100mA
Near GPU
GC85
GC86
PM
4.7uF/10V,X5R
C0805
1uF/10V,X5R
FB_DLLAVDD0
AG27
FB_PLLAVDD0
AF27
+V1.05GPU
GFB8
120ohm@100MHz,500mA
1
2
FB0603
PM
PM
FBB_VREF3
GC139
0.1uF/10V,X7R
0.1uF/10V,X7R
PM
GC135
GC81
0.01uF/16V,X7R
PM
0.1uF/10V,X7R
PM
GC92
GC168
GC88
0.1uF/10V,X7R
0.1uF/10V,X7R
0.01uF/16V,X7R
0.1uF/10V,X7R
PM
PM
GC190
C0603
1uF/10V,X7R
PM
GC189
PM
+V1.5GPU
U29
FB_VREF
GC80
PM
+V1.5GPU
+V1.5GPU
PM
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
FBAD_6
FBAD_1
FBAD_7
FBAD_4
FBAD_3
FBAD_0
FBAD_5
FBAD_2
FBADQS_0#
FBADQS_0
PM
PM
+V1.5GPU
A1
C1
F1
D2
H2
A8
C9
E9
H9
PM
PM
0.01uF/16V,X7R
0.047uF/16V,X7R
PM
U11
GC53
0.047uF/16V,X7R
0.01uF/16V,X7R
NB10_G128
GC44
0.01uF/16V,X7R
ns
{19,57}
+V1.5GPU
GC76
GC74
FBA_WDS0/NC
FBA_WDS0#/NC
FBA_WDS1/NC
FBA_WDS1#/NC
FBA_WDS2/NC
FBA_WDS2#/NC
FBA_WDS3/NC
FBA_WDS3#/NC
J27
GR8
2.49K,1%
ns
+V1.5GPU
DDR3
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
P29
R29
L29
M29
AG29
AH29
AD29
AE29
GR11
1K,1%
ns
{17,19,20,57}
DDR3
FBADQM_0
FBADQM_1
FBADQM_2
FBADQM_3
FBADQM_4
FBADQM_5
FBADQM_6
FBADQM_7
+V1.5GPU
+V1.05GPU
+V1.5GPU
U3B
FBAD_0
FBAD_1
FBAD_2
FBAD_3
FBAD_4
FBAD_5
FBAD_6
FBAD_7
FBAD_8
FBAD_9
FBAD_10
FBAD_11
FBAD_12
FBAD_13
FBAD_14
FBAD_15
FBAD_16
FBAD_17
FBAD_18
FBAD_19
FBAD_20
FBAD_21
FBAD_22
FBAD_23
FBAD_24
FBAD_25
FBAD_26
FBAD_27
FBAD_28
FBAD_29
FBAD_30
FBAD_31
FBAD_32
FBAD_33
FBAD_34
FBAD_35
FBAD_36
FBAD_37
FBAD_38
FBAD_39
FBAD_40
FBAD_41
FBAD_42
FBAD_43
FBAD_44
FBAD_45
FBAD_46
FBAD_47
FBAD_48
FBAD_49
FBAD_50
FBAD_51
FBAD_52
FBAD_53
FBAD_54
FBAD_55
FBAD_56
FBAD_57
FBAD_58
FBAD_59
FBAD_60
FBAD_61
FBAD_62
FBAD_63
GC144
C0603
1uF/10V,X7R
PM
GC182
C0603
1uF/10V,X7R
PM
GC79
C0805
4.7uF/10V,X5R
PM
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
FBA_A0
FBA_A1
FBB_A2
FBB_A3
FBB_A4
FBB_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
ODT0
ODT1
K1
J1
FBB_ODT0
CS0#
CS1#
L2
L1
FBB_CS#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
FBADQM_7
FBADQM_4
CK
CK#
J7
K7
FBA_CLK1
FBA_CLK1#
CKE0
CKE1
K9
J9
FBB_CKE
ZQ0
ZQ1
L8
L9
U13
+V1.5GPU
PM
+V1.5GPU
GR51
1K,1%
GR34
1K,1%
PM
FBB_VREF3
GR50
1K,1%
GR36
1K,1%
GC136
0.01uF/16V,X7R
PM
PM
GC131
C0805
4.7uF/10V,X5R
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
FBAD_32
FBAD_36
FBAD_33
FBAD_37
FBAD_35
FBAD_39
FBAD_34
FBAD_38
FBADQS_4#
FBADQS_4
PM
PM
GR39
243,1%
PM
FBAD_48
FBAD_52
FBAD_50
FBAD_54
FBAD_51
FBAD_55
FBAD_49
FBAD_53
FBADQS_6#
FBADQS_6
DDR3
PM
A1
C1
F1
D2
H2
A8
C9
E9
H9
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
FBB_VREF4
GC188
0.01uF/16V,X7R
FBB_VREF4
FBAD_60
FBAD_59
FBAD_61
FBAD_56
FBAD_63
FBAD_58
FBAD_62
FBAD_57
FBADQS_7#
FBADQS_7
PM
GC140
C0603
1uF/10V,X7R
A1
C1
F1
D2
H2
A8
C9
E9
H9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_A0
FBA_A1
FBB_A2
FBB_A3
FBB_A4
FBB_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
ODT0
ODT1
K1
J1
FBB_ODT0
CS0#
CS1#
L2
L1
FBB_CS#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
CK
CK#
J7
K7
FBA_CLK1
FBA_CLK1#
CKE0
CKE1
K9
J9
FBB_CKE
ZQ0
ZQ1
L8
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
FBADQM_6
FBADQM_5
FBAD_47
FBAD_43
FBAD_46
FBAD_41
FBAD_45
FBAD_42
FBAD_44
FBAD_40
FBADQS_5#
FBADQS_5
GR49
243,1%
PM
DDR3
PM
+V1.5GPU
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
PM
GC115
GC147
0.1uF/10V,X7R
PM
FBA_ODT0
PM
GC148
GC175
GC122
GC99
0.1uF/10V,X7R
1uF/10V,X7R
C0603
1uF/10V,X7R
C0603
4.7uF/10V,X5R
C0805
PM
PM
FBB_ODT0
GR30
10K
PM
GC151
0.01uF/16V,X7R
0.1uF/10V,X7R
PM
GR37
10K
PM
PM
+V1.5GPU
PM
FBA_CLK0
A
+
FBA_CLK1
R558
243,1%
PM
R616
243,1%
PM
GC138
150UF/2.5V
CT7343_28
ns
GC142
0.1uF/10V,X7R
PM
GC141
GC187
GC186
0.01uF/16V,X7R
0.1uF/10V,X7R
PM
PM
PM
GC137
0.1uF/10V,X7R
PM
GC95
1uF/10V,X7R
C0603
PM
GC114
4.7uF/10V,X5R
C0805
1uF/10V,X7R
C0603
PM
FBA_CLK1#
FBA_CLK0#
TOPSTAR TECHNOLOGY
bent
Page Name
N10M memory1
Size
D
C46
Project Name
Rev
A

18
59
of
Date:
Sheet
5
Under GPU
B13
D13
A13
A14
C16
B16
A17
D16
C13
B11
C11
A11
C10
C8
B8
A8
E8
F8
F10
F9
F12
D8
D11
E11
D12
E13
F13
F14
F15
E16
F16
F17
D29
F27
F28
E28
D26
F25
D24
E25
E32
F32
D33
E31
C33
F29
D30
E29
B29
C31
C29
B31
C32
B32
B35
B34
A29
B28
A28
C28
C26
D25
B25
A25
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
A16
D10
F11
D15
D27
D34
A34
D28
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
C14
A10
E10
D14
E26
D32
A32
B26
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
B14
B10
D9
E14
F26
D31
A31
A26
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
G14
G15
G11
G12
G27
G28
G24
G25
+V1.5GPU
U3C
FPC
FBVDDQ27
FBVDDQ28
FBVDDQ29
FBVDDQ30
FBVDDQ31
FBVDDQ32
FBVDDQ33
FBVDDQ34
FBVDDQ35
FBVDDQ36
FBVDDQ37
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
GC109
GC45
0.01uF/25V,X7R
S_Top
PM
S_Top
PM
{17,18,20,57}
+V1.5GPU
{18,57}
0.1uF/10V,X7R
S_Top
PM
GC38
4.7uF/10V,X5R
S_Top
PM
D
S_Top
PM
GC28
0.047uF/16V,X7R
S_Top
PM
GC143
0.1uF/10V,X7R
S_Top
PM
GC22
4.7uF/10V,X5R
S_Top
PM
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29/NC
FBC_CMD30/NC
C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20
FBC_CLK0
FBC_CLK0#
FBC_CLK1
FBC_CLK1#
E17
D17
D23
E23
+V1.5GPU
MAX:35mA
GC19
FBC_DEBUG
G19 GR6
60.4,1%
R0402
ns
S_Top
0.1uF/10V,X7R
ns
S_Top
GC25
0.1uF/10V,X7R
ns
S_Top
+V1.05GPU
GFB5
120ohm@100MHz,500mA
1
2
FB0603
GC12 S_Top
ns
C0805
10UF/6.3V,X5R
ns
S_Top
FB_DLLAVDD1
FB_PLLAVDD1
J19
J18
+V1.5GPU
PM
FBCAL_PD_VDDQ
K27 GR13
FBCAL_PU_GND
PM
L27 GR14
FBCAL_TERM_GND
PM
M27 GR15
Place close to balls

40.2,1%
R0402
S_Top
40.2,1%
R0402
S_Top
40.2,1%
R0402
40.2 in DG
TOPSTAR TECHNOLOGY
S_Top
bent
Page Name
N10M memory2
Size
A3
C46
Project Name
Rev
A
Date:
Sheet
19
59
of
NB10_G128
S_Bot
PM
5
+V1.05GPU
GC57
0.047uF/16V,X7R
GC16
0.01uF/25V,X7R
FBC_WDS0/NC
FBC_WDS0#/NC
FBC_WDS1/NC
FBC_WDS1#/NC
FBC_WDS2/NC
FBC_WDS2#/NC
FBC_WDS3/NC
FBC_WDS3#/NC
Near GPU
+V3.3GPU
+V1.05GPU
+V1.8GPU
{17,21,33,34,52,57}
{17,18,19,57}
{57}
+V3.3GPU
ADD 1K pull low by bent 091022

R44
2.2K
R0402
ns
S_Top
S_Top
GU1
+V3.3GPU
ROM_SI_GPU
ROM_SCLK_GPU
GR1
ROM_SO_GPU
10K
PM
GR2
R40
10K,1%
PM S_Top
R43
15K,1%
R0402
R45
15K,1%
R0402
S_Top
ns
S_Top
PM
PM
ROM_SI_GPU
ROM_SCLK_GPU
ROM_CS#_GPU
S_Top
HOLD
10K
S_Top
GR3
10K
ns
S_Top
Rom_SI: -Hynix 32Mx32 (pull-down 15K)

-Samsung 32MX32 (pull-down 20K)
VCC
U3D
ROM_SO_GPU
1K is not-stuffed in DG V02
ns
+V3.3GPU ns
R481
VSS
PM
R137
10K
PM25LV010A
GC1
0.1UF/10V,X7RS_Top
PM
C46P change 35K to 15k to support internal

VBIOS ROM 091022 BENT
R657
2.2K
R0402
PM
J26
J25
10K R0402
S_Bot
ns
R0402
S_Top
+V3.3GPU
ns
S_Top
T52
T50
PM
R157 40.2K,1%
R0402
R152 40.2K,1%
R0402 S_Top
PM
S_Top
ROM_CS#_GPU
R658 ROM_SI_GPU
2.2K
ROM_SO_GPU
R0402 ROM_SCLK_GPU
PM
+V1.05GPU
FB5
1
120ohm@100MHz,500mA
MAX:60+45 mA
PLLVDD
2
FB0603
S_Top
PM
PM
PM
PM
PM
GC4
GC10
GC14
GC42
C0805
1uF/10V,X5R 0.1UF/10V,X7R 0.1UF/10V,X7R
4.7uF/10V,X5R C0402
S_Top
S_Top
Near
GPU S_Top
Under GPU
S_Top
S_Top
S_Bot
{6} 27M_nonSSC
PM
33
AL8
AM8
GPU_LVDS_YAM0 {31}
GPU_LVDS_YAP0 {31}
IFPA_TXD1#
IFPA_TXD1
AM9
AM10
GPU_LVDS_YAM1 {31}
GPU_LVDS_YAP1 {31}
IFPA_TXD2#
IFPA_TXD2
AL10
AK10
GPU_LVDS_YAM2 {31}
GPU_LVDS_YAP2 {31}
IFPA_TXD3#
IFPA_TXD3
AL11
AK11
ROM_CS#
ROM_SI
ROM_SO
ROM_SCLK
IFPB_TXC#
IFPB_TXC
AN13
AP13
IFPB_TXD4#
IFPB_TXD4
AP8
AN8
IFPB_TXD5#
IFPB_TXD5
AN10
AP10
MISC
IFPAB
MULTI_STRAP_REF1_GND
27M_nonSSC_GPU
S_Top
GR52
10K
C3
D3
C4
D4
F6
I2CH_SCL
G6
I2CH_SDA
IFPB_TXD6#
IFPB_TXD6
AR10
AR11
SPDIF
IFPB_TXD7#
IFPB_TXD7
AP11
AN11
T45
ns
T47
A4
S_Bot
C5
S_Bot
AK14
S_Bot
K9
AE9
AD9
AF9
D2
2
+V1.05GPU
PM GFB7
FB0603
120ohm@100MHz,500mA
PM
GC61
GC40
PM 1uF/10V,X5R C0805
C0402
4.7uF/10V,X5R
S_Top
S_Top
S_Top
IFPAB_IOVDD
PM GC27
2
1 GFB3
FB0603
PM
PM
120ohm@100MHz,500mA GC5
GC52
GC15
C0805
0.1uF/10V,X7R
1uF/10V,X5R C0805
PM 4.7uF/10V,X5R
S_Top
C0402
4.7uF/10V,X5R
C0402
PM GC41
0.1uF/10V,X7R
C0402
100,1%ns
UnderS_Top
GPU
S_Top
+V1.8GPU
PM
MAX:220 mA
NearS_Top
GPU
S_Top
S_Top
RFU
GND_192
GND_193
IFPC_PLLVDD
IFPC_RSET
IFPC_IOVDD
IFPD_IOVDD
IFPD_PLLVDD
IFPD_RSET
AJ9
AK7
AJ8
AK8
AC6
AB6
IFPC_AUX#
IFPC_AUX
AN3
AP2
PLLVDD
VID_PLLVDD
SP_PLLVDD
XTAL_SSIN
R210
GC24
0.1uF/10V,X7R
C0402
PM/HDMI
S_Top
100,1%ns
S_Top
IFPCD_IOVDD
XTAL_IN
XTAL_OUTBUFF
B2
XTAL_OUT
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA
S_Bot
DACA_RED
DACA_GREEN
DACA_BLUE
ADD pull low by bent 091022
GC47
0.1uF/10V,X7R
C0402
PM/HDMI
S_Top
Under GPU
IFPC_L2#
IFPC_L2
AM4
AM3
IFPC_L1#
IFPC_L1
AM5
AL5
IFPC_L0#
IFPC_L0
AM6
AM7
IFPD_AUX#
IFPD_AUX
AN4
AP4
IFPD_L3#
IFPD_L3
AR4
AR5
IFPD_L2#
IFPD_L2
AP5
AN5
IFPD_L1#
IFPD_L1
AN7
AP7
IFPD_L0#
IFPD_L0
AR7
AR8
DACB_VDD
DACB_VREF
DACB_RSET
AG7
AK6
AH7
R490
I2CB_SCL
DACC
I2CB_SDA
DACB_HSYNC
DACB_VSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
G3
G2
AM1
AM2
AK4
AL4
AJ4
R459
R457
PM
PM
Near GPU
HDMI_DDC_DATA {33}
HDMI_DDC_CLK {33}
S_Bot
S_Bot
PM/HDMI
C182 0.1uF/10V,X7R
PM/HDMI
C180 0.1uF/10V,X7R
S_Top
S_Top
PM/HDMI
C177 0.1uF/10V,X7R
PM/HDMI
C167 0.1uF/10V,X7R
S_Top
S_Top
PM/HDMI
C163 0.1uF/10V,X7R
PM/HDMI
C158 0.1uF/10V,X7R
S_Top
S_Top
PM/HDMI
C157 0.1uF/10V,X7R
PM/HDMI
C144 0.1uF/10V,X7R
S_Top
S_Top
AR2
AP1
IFPCD
DACA_VDD
DACA_VREF
DACA_RSET
IFPCD_PLLVDD
R503
1K,1%
PM/HDMI
IFPCD_IOVDD S_Bot
IFPCD_PLLVDD
R484
1K,1%
PM/HDMI
S_Bot
R525 33 R0402 PM/HDMI
R526 33 R0402 PM/HDMI
IFPC_L3#
IFPC_L3
XTAL_PLL
D1
AM15
AM14
AL14
+V3.3GPU
GFB2
2
120ohm@100MHz,500mA
FB0603
PM/HDMI
GC20
GC67
GC29
GC7
S_Top
0.1uF/10V,X7R 0.1uF/10V,X7R 1uF/10V,X5R C0805
C0402
C0402
C0402
4.7uF/10V,X5R
C
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
S_Top
S_Top
S_Top
+V1.05GPU
S_Top
MAX:285 mA
1
2 GFB6
FB0603
120ohm@100MHz,500mA
GC34
GC43
GC54
C0805
PM/HDMI
0.1uF/10V,X7R
1uF/10V,X5R
4.7uF/10V,X5R
S_Top
C0402
C0402
PM/HDMI
PM/HDMI
PM/HDMI
S_Top
S_Top
S_Top
MAX:220 mA
IFPCD_PLLVDD
BUFRST#
B1
S_Top
4.7UF/10V,X5R 1uF/10V,X5R 0.1UF/10V,X7RPM
PM GC37
S_Bot
GC21
GC33
GC30
GC58
470pF/25V,X7R
S_Bot
PM
C0805
PM
C0402
PMS_Top
4700PF/25V,X7R
PM
AJ12
S_Top
S_Top
S_Top
GC63
0.1UF/10V,X7R
AK12
S_Top
R208
AK13
Under GPU
S_Top
R0402
PM124,1%
Near GPU
R449 33 R0402
G1
{34} CRT_DDC_CLK
R454 33 R0402
G4
{34} CRT_DDC_DATA
S_Top
PM
S_Bot
PM
S_Bot
AM13
{34} CRT_HSYNC
AL13
{34} CRT_VSYNC
{34}
CRT_RED
{34} CRT_GREEN
{34}
CRT_BLUE
R206
MAX:220 mA
S_Top
ns
120ohm@100MHz,500mA MAX:45mA
SP_PLLVDD
2
FB0603
S_Top
PM
GC9
PM
GC46
PM
C0805
1uF/10V,X5R
XTALOUTBUFF_T12
PM
4.7uF/10V,X5R C0402
+V3.3GPU
GC17 27M_nonSSC_GPU
S_Top
0.1UF/10V,X7R
Near
GPU
S_Top
ns
S_Top
GFB4
T43
PM
120ohm@100MHz,500mA
T41
ns
MAX:120mA
FB0603
GR40
10K
GR35
IFPA_TXD0#
IFPA_TXD0
RFU1
RFU2
RFU3
RFU4
RFU5
PM/SSC
GPU_LVDS_CLKAM {31}
GPU_LVDS_CLKAP {31}
IFPAB_PLLVDD
IFPC_TXC#
IFPC_TXC
{33}
{33}
IFPC_TXD2N
IFPC_TXD2P
{33}
{33}
IFPC_TXD1N
IFPC_TXD1P
{33}
{33}
IFPC_TXD0N
IFPC_TXD0P
{33}
{33}
y
l
g
n
o
r
6
w
2
6
s9
0
i
0
Ak
T
Ai
n
D
l
dt
n
a
c
e
Kr
r
L
Cc
o
_
C
D
o
D
t
_
I
m
M
e
Dt
h
H
:
B
p
r
a
e
w
V
s
,
Pn
k
6
4
i
S
l
27M_SSC
AM12
AM11
CEC
S_Top
FB4
1
{6}
IFPA_TXC#
IFPA_TXC
NC_19
NC_20
MULTI_STRAP_REFO_GND
A5
PLLVDD
GR32
XTALOUTBUFF_T12
XTALOUTBUFF_T12
IFPA_IOVDD
IFPB_IOVDD
AG9
AG10
N9
T46
R145
0
R0402
ns
AK9
AJ11
M9
ns
+V1.05GPU
33
AB5
S_Bot
S_Bot
D7
D6
C7
B7
A7
IFPAB_PLLVDD
R191
1K,1%
R0402
IFPAB_IOVDD
S_Top
IFPAB_PLLVDD
IFPAB_RSET
IFPC_TXC#
IFPC_TXC
IFPC_TXD0N
IFPC_TXD0P
IFPC_TXD1N
IFPC_TXD1P
IFPC_TXD2N
IFPC_TXD2P
PM
R211
R207
R203
R200
R194
R189
R186
R184
499,1%
499,1%
S_Top
499,1%
S_Top
499,1%
S_Top
499,1%
S_Top
499,1%
S_Top
499,1%
S_Top
499,1%
S_Top
S_Top
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
R41
15K,1%
R0402
Q12
BSS138
SOT23
PM/HDMI
S_Top
+V3.3GPU
R197
PM/HDMI 10K
R42
4.99K,1%
R0402
ns
S_Top
S_Top
10K R0402
S_Bot
+V3.3GPU
TBD
150,1%
S_Top
150,1%
S_Top
150,1%
S_Top
GR24
PM
GR23
PM
GR22
PM
CRT_RED
CRT_GREEN
CRT_BLUE
Place close to balls

A
2.2K R0402
2.2K R0402
S_Bot
S_Bot
NB10_G128
A
S_Bot
PM
TOPSTAR TECHNOLOGY
bent
Page Name
N10M IO_1
Size Project Name

Custom
C46
Rev
A

20
59
of
Date:
Sheet
5
+V3.3GPU
U3E
PM
R500 10K R0402
R488 10K R0402
PM
D
AJ6
AL1
AE7
AD7
IFPEF_PLLVDD
IFPEF_RSET
IFPE_IOVDD
IFPF_IOVDD
AD4
AE4
IFPE_AUX#
IFPE_AUX
AE5
AE6
IFPE_L3#
IFPE_L3
AF5
AF4
IFPE_L2#
IFPE_L2
AG4
AH4
IFPE_L1#
IFPE_L1
AH5
AH6
IFPE_L0#
IFPE_L0
AF2
AF3
IFPF_AUX#
IFPF_AUX
AH3
AH2
AH1
AJ1
AJ2
AJ3
AL3
AL2
+V3.3GPU
C138
0.1uF/10V,X5R
C0402
ns T13
PM
ns
R164
34.8K,1%
R0402
ns
AA9
AB9
W9
Y9
MIOB_VDDQ1
MIOB_VDDQ2
MIOB_VDDQ3
MIOB_VDDQ4
AA7
MIOB_CAL_PD_VDDQ
MIOB_VREF
Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
W5
W7
V7
MIOB_D0
MIOB_D1
MIOB_D2
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D6
MIOB_D7
MIOB_D8
MIOB_D9
MIOB_D10
MIOB_D11
MIOB_D12/NC
MIOB_D13/NC
MIOB_D14/NC
STRAP0
STRAP1
STRAP2
W3
W1
W2
Y5
MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
V4
W4
MIOB_CLKOUT
MIOB_CLKOUT#
10K
R0402
AE1
MIOA_CLKOUT
MIOA_CLKOUT#
R4
T4
MIOA_CLKIN
N4
THERMDN
B4
THERMDP
B5
S46P VerB:Ns R579,stuff

R562 and change R562 to 35k
followed nvidia PUN 090619
C141
PM
0.1uF/10V,X5R
C0402
P9
R9
T9
U9
FUNC
Action
GPIO0
GPIO
no using , PD 10K
GPIO1
HPD-C
connect to HDMI conn with level shifter
GPIO2
Panel backlight brightness
reserved associated with EC PWM , then connect to LVDS conn
GPIO3
Panel Power enable , active high
connect LCDVDD_ON
GPIO4
Panel backlight On , active high
connect LCDVDD backlight on
GPIO5
GPU vid0
Reserved routing to GPU power controller
GPIO6
GPU vid1
Reserved routing to GPU power controller
GPIO7
GPU vid2
no using , reserved 10K PU V3.3S
GPIO8
Thermal trip of GPU , active low
Connect to Hardware shut down circuit , parallel with CPU thermaltrip , 10K PU V3.3S
GPIO9
Thermal alert input
connect to thermal sensor IC alert with 10K PU V3.3S
GPIO10
Memory Vref switch
no using , NC
GPIO11
SLI_SYNC , host GPU output , slave input
No using , PD 10K followed DEMO
GPIO12
PWR_LEVEL
no using , 10K PU V3.3S followed DEMO
GPIO13
Dynamic NVVDD control 0
no using , NC
GPIO14
Dynamic NVVDD control 0
no using , NC
GPIO15
HPD-E
no using , PD 10K
GPIO16
FAN_PWM
no using , PD 10K
GPIO17
Reserved
no using , PD 10K
GPIO18
Reserved
no using , PD 10K
GPIO19
HPD_D
no using , PD 10K
GPIO20
Reserved
no using , PD 10K
GPIO21
HPD-F
no using , PD 10K
GPIO22
SWAPRDY
10K PU V3.3S
GPIO23
GPIO
no using , NC
10K
R0402
DDR3
AP14
AR14
AN14
AN16
AP16
ns
ns
ns
R541
R540
R533
10K R0402
10K R0402
10K R0402
ns
R546
1K
+V3.3GPU
T53
R0402
ns
+V3.3GPU
MISC1
PM R445
PM R448
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
RFU_1
RFU_2
RFU_3
RFU_4
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
MIOB_CLKIN
MIOA_VDDQ1
MIOA_VDDQ2
MIOA_VDDQ3
MIOA_VDDQ4
ns
ns
T11
T8
U5
T5
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
ns
T48
N5
MIOA_VREF
E2
E1
E3
E4
F4
G5
D5
E5
K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6
PM R450
PM R126
2.2K
2.2K
R0402
R0402
33 R0402
33 R0402
I2CD_SCL_GPU
I2CD_SDA_GPU
G_SMB_CLK
{31}
G_SMB_DATA {31}
+V3.3GPU
GPIO0_GPU
GPU_LVDS_BKLTCTL
GPU_LVDS_BKLTEN_R
GPU_VID2
GPU_OVT#
THER_ALERT#
SLI_SYNC
PWR_LEVEL ns
GPU_HDMI_HPD {33,43}
GPU_LVDS_BKLTCTL {32}
GPU_LVDS_VDDEN {31}
GPU_VID0
GPU_VID1
33
R30
R28
R128
R131
R132
R148
R155
2.2K
2.2K
2.2K
2.2K
10K
10K
10K
R0402
R0402
R0402
R0402
R0402
R0402
R0402
PWR_LEVEL
R142
10K
R0402 ns
PM
PM
PM
PM
ns
PM
ns
{52}
{52}
GPU_OVT#
R140
G_SMB_CLK
G_SMB_DATA
I2CD_SCL_GPU
I2CD_SDA_GPU
GPU_VID2
GPU_OVT#
SLI_SWAPRDY
{38}
R0402
AC_IN
{43,46}
HPD_E_GPU
GPU_FAN_PWM
GPU_GPIO17
GPU_GPIO18
HPD_D_GPU
GPU_GPIO20
HPD_F_GPU
SLI_SWAPRDY
GPU_HDMI_HPD
GPIO0_GPU
GPU_LVDS_BKLTCTL
SLI_SYNC
GPU_LVDS_VDDEN
HPD_E_GPU
GPU_FAN_PWM
GPU_GPIO17
GPU_GPIO18
HPD_D_GPU
GPU_GPIO20
HPD_F_GPU
R458
R463
R455
R460
R135
R465
R462
R466
R468
R150
R472
R451
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
ns
PM
ns
PM
ns
ns
ns
ns
ns
ns
ns
NB10_G128
NOTE:
1, XCLK_277 set 0 using 27MHz clock
2FB_0_BAR_SIZE 0 system frame buffer 256M
3PCI_DEVID[4:0] N10M-GS set 0x0A74 PCI_DEVID[4:0] set 10100
4, USER[3:0] set 1111 , using EDID method to detect panel
5, 3GIO_PADCFG[3:0] set 0001 , using NOTEBOOK configuration
6, RAMCFG[3:0] need follow latest PUN
7, PEX_PLL_EN_TERM100 set 0 , using PEX PLL termination disable configuration
8, SLOT_CLK_CFG set 1 , GPU MCH using the same clk chip
9, SUB_VENDOR set 0 , no VIDEO BIOS ROM
10.SMBUS_ALT_ADDR Set 0
11.0 3D Device 1VGA Device(default)
Nvidia advise:
For used GPIO1,2,3,4,5,6: please use 10K pull-down for initial value.
For used GPIO8,12: please use 10K pull-up for initial value.
For the unused GPIO, no need external HW pull-up/down.
PM
+V3.3GPU
THER_ALERT#
GR54
0
R0402
GR4
10K
R0402
PM
GC191
0.1UF/10V,X7R
C0402
GU5
+V3.3GPU
VCC
4
GPU_LVDS_BKLTEN_R
2
SN74AHC1G08DBV
SOT23_5
GPU_LVDS_BKLTEN
{31}
GND
TOPSTAR TECHNOLOGY
, reserved PD 10K
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
+V3.3GPU
B
R470
MIOB
MIOB_CAL_PU_GND
PM R486
P5
N3
L3
N2
IFPF_L0#
IFPF_L0
AF1
ns
MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE
ITEM
IFPF_L1#
IFPF_L1
AA6
R477
15K,1%
R0402
N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6
PM
T51
R480
45.3K,1%
R0402
PM
MIOA_D0
MIOA_D1
MIOA_D2
MIOA_D3
MIOA_D4
MIOA_D5
MIOA
MIOA_D6
MIOA_D7
MIOA_D8
MIOA_D9
MIOA_D10
MIOA_D11
MIOA_D12/NC
MIOA_D13/NC
MIOA_D14/NC
IFPF_L2#
IFPF_L2
T49
STRAP0_GPU
STRAP1_GPU
STRAP2_GPU
R475
30.1K,1%
R0402
PM
IFPF_L3#
IFPF_L3
ns
+V3.3GPU
R167
34.8K,1%
R0402
PM
IFPEF
ns
N10M-GS:0xA74(strap2 pull-down 25K, rom_sclk pull-up 15K)

N10M-GE:0xA68(strap2 pull-up 5K, rom_sclk pull-down 15K)
R473
4.99K,1%
R0402
{17,20,33,34,52,57}
bent
R663
10K
R0402
Page Name
N10M IO_2
Size Project Name

Custom
C46
Rev
A
Date:
Sheet
21
59
of
5
+V1.05S
{23,24,28,29,50,56,57,58}
+V3.3S
{6,8,15,16,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
EC_RTC
{48}
PCH_EC_RTC {29}
SPONGE_RTC1
RTCBAT GLUE
assembly
Voltage Swing on RTCX1 pin

should not exceed 1.0V.
EC_RTC
RTC_BAT1
D4
BAT54C
SOT23
+
-
PCH_EC_RTC
RTCBAT with Cable

assembly
3
C329
1uF/10V,X7R
C0603
R121
1K
R0402
20K
CMOS Settings J1
Clear CMOS Short
Keep CMOS
Open
R0402
+V3.3S
R447
C98
C331
1uF/10V,X7R
C0603
1uF/10V,X7R
C0603
U4A
+V3.3S
32XCLK0
32XCLK1
B13
D13
RTCX1
RTCX2
RTC_RST#
C14
RTCRST#
SRTC_RST#
D17
SRTCRST#
SM_INTRUDER#
A16
INTRUDER#
A14
INTVRMEN
R0402 HDA_BCLK
A30
HDA_BCLK
HDA_SYNC
D29
HDA_SYNC
R453
1M
R0402
J4
JOPEN
RESISTOR_1
ns
ICH_INTVRMEN
R467
{37} AZALIA_CODEC_BITCLK
R464
{37} AZALIA_CODEC_SYNC
{37}
33
R0402
P1
SPKR
R469
{37} AZALIA_CODEC_RST#
C
33
33
HDA_RST#
R0402
{37} AZALIA_SDATAIN0
R461
{37} AZALIA_CODEC_SDOUT
33
R0402 HDA_SDO
LPC
20K R0402
RTC
R110
RTCBAT1
CONN2_R
CNS2_R
1 1
2 2
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
IHDA
Cable
HDA_DOCK_RST# / GPIO13
T35
M3
JTAG_TCK
T32
K3
JTAG_TMS
T36
K1
JTAG_TDI
T33
J2
JTAG_TDO
T34
J4
TRST#
ns
ns
ICTP
ns
ICTP
ns
ICTP
ns
ICTP
ns
ICTP
4.7K
R0402
FWH4 / LFRAME#
C34
LPC_FRAME# {38,40,43}
LDRQ0#
LDRQ1# / GPIO23
A34
F34
SERIRQ
AB9
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AK7
AK6
AK11 SATA_TXN0_C
AK9 SATA_TXP0_C
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AH6
AH5
AH9 SATA_TXN1_C
AH8 SATA_TXP1_C
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF11
AF9
AF7
AF6
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AH3
AH1
AF3
AF1
R416
R415
1K
1K
R0402 ns
R0402 ns
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD9
AD8
AD6
AD5
R62
R63
1K
1K
R0402 ns
R0402 ns
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AD3
AD1
AB3
AB1
R418
R417
1K
1K
R0402 ns
R0402 ns
AF16
SATAICOMPI
AF15
R113
37.4,1%
R0402
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
SATALED#
T3
SATA0GP / GPIO21
Y9
R76
10K
R0402
SATA1GP / GPIO19
V1
R421
10K
R0402
SPI_MISO R413
SPI_MISO_R
AV1
SPI_MISO
ns
{35}
{35}
{35}
{35}
+V3.3S
R423
10K
R0402
SPI
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
{35}
{35}
{35}
{35}
OD output
need pullup
BA2
SPI_MOSI
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
+V1.05S
SATAICOMPO
SPI_CS0#_R
AY1
INT_SERIRQ
HM55 don't support SATA port 2and3
SPI_CLK_R
SPI_MOSI_R
{38,43}
C63
0.01uF/25V,X7R
C64
C0402
C0402 0.01uF/25V,X7R
1K R0402 ns
1K R0402 ns
R95
R88
R136
10K
R0402
ns
R78
10K
R0402
C66
0.01uF/25V,X7R
C65
C0402
C0402 0.01uF/25V,X7R
{38,40,43}
{38,40,43}
{38,40,43}
{38,40,43}
INT_SERIRQ
SPI_MOSI R412
R399
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SPI_CS0#R400
R398
10K
D33
B33
C32
A32
SPI_CLK R411
+V3.3S
JTAG
For ME
J30
SATA
R134
R471
10K
R0402
ns
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
SATA_LED#
{45}
+V3.3S
IbexPeak-M_Rev1_0
R0402
U8
8
VDD
R397
3.3K
WP#
R396
3.3K
SI
SO
CE#
SCK
5
2
1
6
VSS
HOLD#
SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK
8M
C333
PCH_EC_RTC
332K 1% PULL
HIGH TO
VBAT_RTC FOR
ICH8M INTRNAL
VR ENABLE(PULL
LOW DISABLE)
R102
R441
C0402
R0402
R440
10M
R0402
Y4
32.768KHz
xd3_2X6
3
ASSY
15pF/50V,NPO
332K,1%
R0402
32XCLK0
SOIC8_50_208
C332
ICH_INTVRMEN
32XCLK1
C0402
15pF/50V,NPO
R99
0
ns
R0402
A
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
Thursday, December 17, 2009
22
59
of
5
+V3.3AL
{6,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V1.05S
{22,24,28,29,50,56,57,58}
+V3.3S
{6,8,15,16,22,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V5S
{25,29,32,33,34,35,36,37,38,43,51,52,55,56}
+V3.3AL
SMBCLK
D
SMBDATA
GPIO11
GPIO60
SML0CLK
U4B
SML0DATA
C351
BF33
BH33
BG32
BJ32
PERN5
PERP5
PETN5
PETP5
BA34
C0402
AW34
PCIE_TXN4_WLAN_CBC34
C347
PCIE_TXP4_WLAN_CBD34
C0402
0.1UF/10V,X7R0.1UF/10V,X7R
AT34
AU34
AU36
AV36
PERN6
PERP6
PETN6
PETP6
BG34
BJ34
BG36
BJ36
PERN8
PERP8
PETN8
PETP8
{39}
{39}
{39}
{39}
PCIE_RXN4_WLAN
PCIE_RXP4_WLAN
PCIE_TXN4_WLAN
PCIE_TXP4_WLAN
C346
+V3.3AL
HM55 doesn't contain port7 and port8
R402
10K
R0402
AK48
AK47
{44} PCIE_GLAN_CLKN
{44} PCIE_GLAN_CLKP
R425
+V3.3AL
R422
10K
R0402
MiniPCIE_REQ#
R0402
P9
{40} CLK_PCIE_3G#
{40} CLK_PCIE_3G
AM43
AM45
{40} MiniPCIE_REQ#
U4
AM47
AM48
{39} CLK_PCIE_MINICARD#
{39} CLK_PCIE_MINICARD
N4
{39} minicard_CLKREQ#
+V3.3AL
AH42
AH41
{41} CLK_PCIE_EXPCARD#
{41} CLK_PCIE_EXPCARD
A8
{41} EXPCARD_CLKREQ#
R424
10K
R0402
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
SMBDATA
SML1CLK
R97
2.2K
J14
GPIO60
SML1DATA
R100
R0402
2.2K
SML0CLK
C6
SML0CLK
SML0DATA
G8
SML0DATA
SML1ALERT# / GPIO74
M14
GPIO74
SML1CLK / GPIO58
E10
R652
R0402
SML1DATA / GPIO75
G12
R653
R0402
CL_CLK1
T13
CL_CLK1
{39}
CL_DATA1
T11
CL_DATA1
{39}
CL_RST1#
T9
CL_RST1#
PEG_A_CLKRQ# / GPIO47
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
R0402
Add 0 ohm
SML1CLK
{43}
SML1DATA
{43}
R426
PERN7
PERP7
PETN7
PETP7
CLKOUT_PCIE0N
CLKOUT_PCIE0P
GPIO74
SMBCLK
SML0ALERT# / GPIO60
SMBus
C348
GPIO11
H14
SMBDATA
PERN2
PERP2
PETN2
PETP2
B9
2.2K
C8
SMBCLK
Link
{41} PCIE_RXN3_EXP
{41} PCIE_RXP3_EXP
{41} PCIE_TXN3_EXP
{41} PCIE_TXP3_EXP
SMBALERT# / GPIO11
PCI-E*
PCIE_RXN2_3G
PCIE_RXP2_3G
PCIE_TXN2_3G
PCIE_TXP2_3G
PERN1
PERP1
PETN1
PETP1
Controller
{40}
{40}
{40}
{40}
C343
BG30
C0402
BJ30
PCIE_TXN1_LAN_C BF29
C340
PCIE_TXP1_LAN_C BH29
C0402
0.1UF/10V,X7R 0.1UF/10V,X7R
AW30
C0402
BA30
PCIE_TXN2_3G_C BC30
C349
PCIE_TXP2_3G_C
C0402
BD30
0.1UF/10V,X7R 0.1UF/10V,X7R
AU30
C0402
AT30
PCIE_TXN3_EXP_C AU32
C350
PCIE_TXP3_EXP_C AV32
C0402
0.1UF/10V,X7R 0.1UF/10V,X7R
BA32
BB32
BD32
BE32
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLKOUT_PEG#
R174
CLKOUT_PEGR173
0
0
R427
10K
R0402
{39}
R0402
ns
R0402
R0402
PCIE_CLKREQ
AN4
AN2
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
R414
AW24
BA24
CLK_BUF_SATA_N {6}
CLK_BUF_SATA_P {6}
CLKIN_BCLK_N
CLKIN_BCLK_P
AP3
AP1
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
F18
E18
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
AH13
AH12
CLK_BUF_EXP_N {6}
CLK_BUF_EXP_P {6}
REFCLK14IN
P41
CLK_BUF_REF14
CLKIN_PCILOOPBACK
J42
CLKIN_DMI_N
CLKIN_DMI_P
{17}
CLK_PCIE_N11M# {17}
CLK_PCIE_N11M {17}
AT1
AT3
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
PEG_A_CLKRQ#
H1
AD43
AD45
PEG_A_CLKRQ#
CLKOUT_DMI_N
CLKOUT_DMI_P
PEG
PCIE_RXN1_LAN
PCIE_RXP1_LAN
PCIE_TXN1_LAN
PCIE_TXP1_LAN
From CLK BUFFER
{44}
{44}
{44}
{44}
R124
R430 2.2K
10K
R0402 R431
10K
R0402
R103
10K
R0402
R429
10K
R89
R0402
10K
R428
R0402
CLK_EXP_N {8}
CLK_EXP_P {8}
0
R0402
{6}
{6}
{6}
{6}
{6}
B
PCI_CLKFB
{26}
+V3.3AL
AM51
AM53
minicard_CLKREQ#
R83
8.2K
R0402
M9
CLKOUT_PCIE4N
CLKOUT_PCIE4P
XTAL25_IN
XTAL25_OUT
AH51
AH53
XCLK_RCOMP
AF38
+V1.05S
+V3.3AL
R84
8.2K
R0402
R57
8.2K
R0402
H6
+V3.3AL
AK53
AK51
P13
CLKOUT_PCIE5N
CLKOUT_PCIE5P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
Clock Flex
AJ50
AJ52
0
10M
R0402
R144
CLKOUTFLEX0 / GPIO64
T45
P43
T42
N50
Y51
XS2_3d3
2
25MHz
90.9,1%
R0402
33
R195
R196
C164
27pF/50V,NPO
C0402
R515
C168
27pF/50V,NPO
C0402
CLK_CR_48M {42}
IbexPeak-M_Rev1_0
+V3.3S
Change to pull up follow intel design guide
R311
R305
2.2K
R0402
ns
Q18
2N7002E-T1
SMBCLK
SMB_CLK_S
{6,15,16,40,41}
+V3.3S
+V5S
R301
R297
2.2K
R0402
ns
TOPSTAR TECHNOLOGY
bent
2N7002E-T1
3
Q23
SMBDATA
SMB_DATA_S {6,15,16,40,41}
Page Name
PCH
Size
C
C46
Project Name
Rev
A

23
59
Date:
Sheet
of
+V5S
+V3.3AL
+V3.3S
+V1.05S
R456
49.9,1%
R0402
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
{7}
{7}
{7}
{7}
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
{7}
{7}
{7}
{7}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
{7}
{7}
{7}
{7}
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
BC24
BJ22
AW20
BJ20
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
BD24
BG22
BA20
BG20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
BE22
BF21
BD20
BE18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
BD22
BH21
BC20
BD18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
BH25
DMI_COMP_R
BF25
DMI_ZCOMP
FDI
+V1.05S
{7}
{7}
{7}
{7}
DMI
U4C
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
{7}
FDI_TXP[7:0]
{7}
FDI_INT
BJ14
FDI_FSYNC0
BF13
FDI_FSYNC0
FDI_FSYNC1
BH13
FDI_FSYNC1
{7}
FDI_LSYNC0
BJ12
FDI_LSYNC0
{7}
FDI_LSYNC1
BG14
FDI_LSYNC1
{7}
PCIE_WAKE#
{39,40,41,43,44}
DMI_IRCOMP
+V3.3S
FDI_TXN[7:0]
FDI_INT
{6,23,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{6,8,15,16,22,23,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{22,23,28,29,50,56,57,58}
{7}
{7}
R60
10K
R0402
T6
SYS_RESET#
WAKE#
R0402 SYS_PWROK_R
M6
SYS_PWROK
CLKRUN# / GPIO32
Y1
J12
PWROK_R
B17
SUS_STAT# / GPIO61
P8
SUSCLK / GPIO62
F3
SLP_S5# / GPIO63
E4
SLP_S5# R81
SLP_S4#
H7
SLP_S4#
R86
R0402
SLP_S3#
P12 SLP_S3#
R67
R0402
R70
SYS_PWROK
R446
R69
R0402
R0402
This is suspend power pin
{8} PM_DRAM_PWRGD
R434
10K R0402
R432
R0402
ME_PWRGD_R K5
LAN_RST#
DRAM_PWRGD_R
A10
D9
C16
{43,53} PM_RSMRST#
{43} ALW_ACK
R444
10K
R0402
{43} PM_PWRBTN#
+V3.3AL
M3
R71
R0402
U19
{43}
RSMRST#
PWRBTN#
ACPRESENT / GPIO31
PM_SUS_STAT# {43}
SUSCLK
T39 ICTPns
+V3.3AL
P5
A6
BAT_LOW#
DRAMPWROK
CLKRUN#
BATLOW# / GPIO72
SLP_M#
K8
TP23
N2
PMSYNCH
BJ10
R0402
T1
ns
PM_SLP_S4# {41,43,56}
PM_SLP_S3# {41,43,53}
R82
10K
ns
SLP_M#
T37
ns
MS
H_PM_SYNC
{8}
0.1UF/25V,Y5V
LAN_RST#
SUS_PWR_DN_ACK / GPIO30
C282
ns
MEPWROK
M1
P7
{43} AC_IN_PCH
PWROK
System Power Management
{43} EC_IMVP_PWRGD
74AHCT1G08GV
SOT23_5
4
VCC
RI#
SYS_PWROK
+V3.3AL
GND
3
{43,53} Main_PWROK
R401
ns
ALW_ACK
R346
10K
R0402
F14
RI#
SLP_LAN# / GPIO29
F6
IbexPeak-M_Rev1_0
10K
B
R0402
R347
0
+V3.3AL
+V3.3S
R119
R405
10K
RI#
CLKRUN#
R0402
R56
10K
10K
R0402
PM_PWRBTN#
R0402
R111
1K
PCIE_WAKE#
R0402
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
24
59
of
5
+V3.3S
+V5S
{6,8,15,16,22,23,24,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{23,29,32,33,34,35,36,37,38,43,51,52,55,56}
{31} PCH_LVDS_BKLTEN
+V3.3S
R166
100K
R178
10K
R175
10K
LCTL_DATA
LCTL_CLK
+V3.3S
U4D
PCH_DDC_DATA
PCH_DDC_CLK
L_BKLTEN
L_VDD_EN
Y48
L_BKLTCTL
PCH_DDC_CLK
PCH_DDC_DATA
AB48
Y45
L_DDC_CLK
L_DDC_DATA
LCTL_CLK
LCTL_DATA
AB46
V48
L_CTRL_CLK
L_CTRL_DATA
AP39
AP41
LVD_IBG
LVD_VBG
AT43
AT42
LVD_VREFH
LVD_VREFL
AV53
AV51
LVDSA_CLK#
LVDSA_CLK
T10
BB47
BA52
AY48
AV47
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
T12
BB48
BA50
AY49
AV48
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AP48
AP47
LVDSB_CLK#
LVDSB_CLK
AY53
AT49
AU52
AT53
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
AY51
AT48
AU50
AT51
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
AA52
AB53
AD53
CRT_BLUE
CRT_GREEN
CRT_RED
{31}
{31}
T7
R147
2.37K,1%
ns
{31} PCH_LVDS_CLKAM
{31} PCH_LVDS_CLKAP
{31} PCH_LVDS_YAM0
{31} PCH_LVDS_YAM1
{31} PCH_LVDS_YAM2
ns
{31} PCH_LVDS_YAP0
{31} PCH_LVDS_YAP1
{31} PCH_LVDS_YAP2
ns
{34} CRT_BLUE_R
{34} CRT_GREEN_R
{34} CRT_RED_R
CRT_BLUE_R
CRT_GREEN_R
CRT_RED_R
CRT_DDC_CLK_R
CRT_DDC_DATA_R
{34} CRT_DDC_CLK_R
{34} CRT_DDC_DATA_R
CRT_HSYNC_R
CRT_VSYNC_R
{34} CRT_HSYNC_R
{34} CRT_VSYNC_R
CRT_BLUE_R
R507
150,1%
GM
CRT_GREEN_R
R506
GM 150,1%
CRT_RED_R
C435
5.6pF/50V,NPO
ns
R179
1K,1%
BJ48
BG48
SDVO_INTN
SDVO_INTP
BF45
BH45
Y53
Y51
CRT_HSYNC
CRT_VSYNC
T51
T53
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
BG44
BJ44
AU38
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
DDPC_CTRLCLK
DDPC_CTRLDATA
Y49
AB49
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
BE44
BD44
AV40
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT_DDC_CLK
CRT_DDC_DATA
DAC_IREF
CRT_IRTN
BJ46
BG46
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
V51
V53
AD48
AB51
R508
150,1%
GM
SDVO_TVCLKINN
SDVO_TVCLKINP
+V5S
GM_HDMI_DDC_CLK {33}
GM_HDMI_DDC_DATA {33}
1
{32} LVDS_BKLTCTL
T48
T47
Digital Display Interface
{31} PCH_LVDS_VDDEN
LVDS
R176
2.2K
CRT
R177
2.2K
R532GM
0
R0402
IN_D2{33}
IN_D2+
{33}
IN_D1{33}
IN_D1+
{33}
IN_D0{33}
IN_D0+
{33}
MCH_CLK_D4- {33}
MCH_CLK_D4+ {33}
2N7002
GM
MCH_HDMI_HPD
{33}
R662ns
0
Q29
R0402
R527
100K
GM
U50
U52
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
BC46
BD46
AT38
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
IbexPeak-M_Rev1_0
C436
5.6pF/50V,NPO
ns
C437
5.6pF/50V,NPO
ns
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
25
59
of
5
+V3.3AL
{6,23,24,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V3.3S
{6,8,15,16,22,23,24,25,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.8S
{11,28,29,31,49,56,57}
+V3.3S
+V3.3AL
J50
G42
H47
G34
C/BE0#
C/BE1#
C/BE2#
C/BE3#
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
G38
H51
B37
A44
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI_REQ#0
LVDS_SEL_PCH
PCI_REQ#3
F51
A46
B45
M53
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
PCI_GNT#0
PCI_GNT#1
GNT2#
PCI_GNT#3
F48
K45
F36
H53
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
B41
K53
A36
A48
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
0.1UF/25V,Y5V
C0402
C313
VCC
{8,17,38,39,40,41,43,44}
PLT_RST#
BUF_PLT_RST#
GND
R389
100K
R0402
U22
74AHCT1G08GV
SOT23_5
R66
10K
R0402
PCI_GNT#0
PCI_GNT1# PCI_GNT0# Boot BIOS

PCI_GNT#1
Default high(SPI)
R159
1K
R0402
ns
R170
1K
R0402
ns
SPI
PCI
LPC
PCI_GNT#3
{31} LVDS_BLT_SEL
PCI_GNT#3
Low=A16 swap override/
Top Block Swap Mode Topblock Swap Override enable
Strap
High=Default
B
R517
1K
R0402
ns
4.7K in checklist
{31} LVDS_DDC_SEL
PCI_RST#
PCI pullup
+V3.3S
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_REQ#0
LVDS_SEL_PCH
LVDS_BLT_SEL
PCI_REQ#3
LVDS_DDC_SEL
GNT2#
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
R501
R482
R504
R478
R162
R165
R171
R168
R519
R491
R487
R514
R25
R141
R143
R518
R156
R485
R476
R516
R474
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
PCI_RST#
R55
8.2K
R0402
T9
ICTP
ns
T2
ICTP
47
47
22
{43} CLK_591PCI
{38} CLK_TCMPCI
{23} PCI_CLKFB
{40} PCI_CLK_DEBUG
47
K6
E44
E50
SERR#
PERR#
PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#
A42
H44
F46
C46
IRDY#
PAR
DEVSEL#
FRAME#
PCI_LOCK#
D49
PLOCK#
PCI_STOP#
PCI_TRDY#
D41
C48
STOP#
TRDY#
PCI_PME
M7
PME#
PLT_RST#
D5
PLTRST#
ns
R513
R512
R161
R511
PCIRST#
PCI_SERR#
PCI_PERR#
CLK_591PCI_R
CLK_TCMPCI_R
PCI_CLKFB_R
PCI_CLK_DEBUG_R
N52
P53
P46
P51
P48
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
AY9
BD1
AP15
BD8
NV_DQS0
NV_DQS1
AV9
BG8
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
NV_ALE
NV_CLE
BD3
AY6
NV_RCOMP
AU2
NV_RB#
AV7
NV_WR#0_RE#
NV_WR#1_RE#
AY8
AY5
NV_WE#_CK0
NV_WE#_CK1
AV11
BF5
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USB
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
R387
0
R0402
PCI
R388
0
R0402
ns
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
NVRAM
U4E
PLTRST buffer
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
USBRBIAS#
B25
USBRBIAS
D25
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
N16
J16
F16
L16
E14
G16
F12
T15
EXPCARD_USB_PN0 {41}
EXPRESS Card
EXPCARD_USB_PP0 {41}
MINICARD_USB_PN1 {39}
MINICARD_USB_PP1 {39}
BT_USB_PN2 {38}
BT
BT_USB_PP2 {38}
CAM_USB_PN3 {32} CAMERA
Change port5 to port2 by bent 091022
CAM_USB_PP3 {32}
USB_PN4
{36}
IOUSB PORT
USB_PP4
{36}
USB_PN5
{36}
USB_PP5
{36}
USB_CR_PN8 {42}
CARD READER
USB_CR_PP8 {42}
MINICARD_USB_PN2 {40}
MINICARD_USB_PP2 {40}
USB_PN10
{36}
IOUSB PORT
USB_PP10
{36}
USB_PN11
{36}
USB_PP11
{36}
T4 ns
T3 ns
T44 ns
T42 ns
MINICARD
Attribution
TBD
USB_BIAS
R452
22.6,1%
R0402
OC0#
OC1#
OC3#
OC4#
OC6#
OC7#
USB_OC#2
{36}
USB_OC#5
{36}
+V3.3AL
+V1.8S
+V1.8S
ns
IbexPeak-M_Rev1_0
R32
1K,1%
R0402
R33
10K
R0402
PM
OC0#
R0402 10K R120
OC1#
R0402 10K R106
OC3#
R0402 10K R114
OC4#
R0402 10K R116
OC6#
R0402 10K R104
Page Name
PCH
OC7#
R0402 10K R58
Size
C
C46
TOPSTAR TECHNOLOGY
bent
PM
{26} LVDS_SEL_PCH
LVDS_SEL_PCH
Q7
2
3
MMBT3904-FSOT23
PM
LVDS_SEL {31}
Project Name
Rev
A
Date:
Sheet
26
59
of
3
+V1.1S_VTT {8,10,11,28,29,38,50,51,55}
+V3.3AL
{6,23,24,26,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V3.3S
{6,8,15,16,22,23,24,25,26,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V3.3S
R151
10K
{43}
EXTSMI#
GPIO6
EC_RUNTIME_SCI#
R138
SATA2GP
R77
10K
{43} EC_RUNTIME_SCI#
R0402
ns R419
GPIO17
R160
R75
10K
R80
10K
SATA5GP
R403
GPIO48
10K
R61
R0402
10K
R408
T7
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AM3
BCLK_CPU_N
{8}
TACH0 / GPIO17
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
AM1
BCLK_CPU_P
{8}
GPIO22
Y7
GPIO24
H10
GPIO24
GPIO27
AB12
GPIO27
GPIO28
V13
GPIO28
STP_PCI#
M11
STP_PCI# / GPIO34
V6
GPIO15
R72
GPIO24
T38
ICTP
T40
ICTP
1K
R94
10K
R59
10K
R92
BD10
TP1
BA22
SATA3GP / GPIO37
TP2
AW22
V3
SLOAD / GPIO38
TP3
BB22
GPIO39
P3
SDATAOUT0 / GPIO39
TP4
AY45
GPIO45
H3
TP5
AY46
GPIO46
F1
TP6
AV43
ns
ns
GPIO48
AB6
SDATAOUT1 / GPIO48
TP7
AV45
SATA5GP
AA4
SATA5GP / GPIO49
TP8
AF13
GPIO57
TP9
M18
TP10
N18
TP11
AJ24
TP12
AK41
TP13
AK42
TP14
M32
TP15
N32
TP16
M30
TP17
N30
TP18
H12
TP19
AA23
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
F8
A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
R73
10K
ns
GPIO37
GPIO38
GPIO39
R407R409
10K 10K
H_PECI
{8}
H_RCIN#
{43}
VCCPWRGD_0
THERMTRIP_R#
R96
10K
R0402
SATA_CLKREQ#
R74
GPIO27
R79
10K
R0402 ns
10K
R0402
ns
R190
56
R0402
internal pull up. default to use internal VccVRM
{8}
54.9,1%R0402
THERMTRIP# {8,38}
SATACLKREQ# / GPIO35
SATA2GP / GPIO36
R117
10K
THRMTRIP#
AB13
+V3.3S
R406
10K
ns
BE10
GPIO38
10K
R112
10K
ns
T1
PROCPWRGD
AB7
GPIO57
GPIO57
RCIN#
BG10
GPIO37
ns
GPIO28
PECI
R404
ns
GPIO15
SATA4GP / GPIO16
10K
+V1.1S_VTT
{43}
F38
10K
10K
H_A20GATE
AA2
SCLOCK / GPIO22
R93
ns
SATA4GP
U2
GPIO17
10K
R85
GPIO24
SATA4GP
+V3.3AL
LAN_PHY
A20GATE
GPIO8
GPIO15
SATA2GP
R87
LAN_PHY_PWR_CTRL / GPIO12
TACH3 / GPIO7
K9
SATA_CLKREQ#
GPIO8
AF48
AF47
F10
LAN_PHY
H_RCIN#
CLKOUT_PCIE7N
CLKOUT_PCIE7P
TACH2 / GPIO6
J32
10K
STP_PCI#
AH45
AH46
TACH1 / GPIO1
D37
10K
GPIO22
CLKOUT_PCIE6N
CLKOUT_PCIE6P
BMBUSY# / GPIO0
C38
10K
GPIO8
SATA4GP
Y3
CPU
GPIO6
GPIO0
GPIO
10K
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
NCTF
10K
R149
RSVD
R420
EXTSMI#
MISC
U4F
GPIO0
NC_5
INIT3_3V#
TP24
T39
P6
C10
IbexPeak-M_Rev1_0
For differentiate BIOS version
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
27
59
of
5
+V1.1S_VTT
+V1.05S
+V3.3S
+V1.8S
{8,10,11,27,29,38,50,51,55}
{22,23,24,29,50,56,57,58}
{6,8,15,16,22,23,24,25,26,27,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{11,26,29,31,49,56,57}
+V3.3S
+V1.05S
C122
1uF/10V,X7R
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
AK24
VCCIO[24]
BJ24
VCCAPLLEXP
POWER
CRT
C134
10uF/6.3V,X5R
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
VCC CORE
U4G
1629mA
C345
C339
C337
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
C128
C341
1uF/10V,X7R
1uF/10V,X7R
+V3.3S
+V1.8S
+V1.05S
FB191
2 FB0603
120ohm@100MHz,500mA
VCCFDIPLL
VCCIO[54]
VCCIO[55]
AN35
VCC3_3[1]
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
AM23
C335
ns
AN30
AN31
VCCIO[1]
1uF/10V,X7R
ns
LVDS
HVCMOS
3251mA
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
AE52
VSSA_DAC[1]
AF53
VSSA_DAC[2]
AF51
VCCADAC
C366
FB221
C367
2 FB0603
120ohm@100MHz,500mA
C357
1uF/10V,X7R
0.01uF/16V,X7R 0.1UF/10V,X7R
VCCALVDS
AH38
VSSA_LVDS
AH39
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
AP43
AP45
AT46
AT45
VCC3_3[2]
AB34
VCC3_3[3]
AB35
VCC3_3[4]
AD35
+V1.8S
VCCTX_LVDS FB7 1
C137
2 FB0603
120ohm@100MHz,500mA
C135
C139
0.01uF/16V,X7R 0.1UF/10V,X7R
1uF/10V,X7R
+V3.3S
C130
0.1UF/10V,X7R
+V1.8S
DMI
+V1.05S
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
VCCVRM[2]
AT24
VCCDMI[1]
AT16
VCCDMI[2]
AU16
+V1.1S_VTT
C102
1uF/10V,X7R
C93
1uF/10V,X7R
PCI E*
ns 1uF/10V,X7R
+V1.8S
NAND / SPI
C336
ns
VCCAPLL
2 FB0603
FDI
FB181
AE50
VCCADAC[2]
+V3.3S
+V1.05S
120ohm@100MHz,500mA
VCCADAC[1]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
AM8
AM9
AP11
AP9
156mA
C87
1uF/10V,X7R
+V3.3S
86mA
C79
IbexPeak-M_Rev1_0
0.1UF/10V,X7R
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
28
59
of
5
+V1.1S_VTT {8,10,11,27,28,38,50,51,55}
+V1.05S
{22,23,24,28,50,56,57,58}
+V5AL
{32,36,48,49,50,53,56}
+V3.3AL
{6,23,24,26,27,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V5S
{23,25,32,33,34,35,36,37,38,43,51,52,55,56}
+V3.3S
{6,8,15,16,22,23,24,25,26,27,28,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
PCH_EC_RTC {22}
+V1.8S
{11,26,28,31,49,56,57}
ns
VCCACLK[1]
C370
C356
AP53
VCCACLK[2]
10uF/6.3V,X5R
1uF/10V,X7R
ns
AF23
VCCLAN[1]
AF24
VCCLAN[2]
C95
R98
R0402
0.1UF/10V,X7R
+V1.05S
Y20
DCPSUSBYP
C112
1uF/10V,X7R
AD41
VCCME[3]
AF43
VCCME[4]
AF41
VCCME[5]
AF42
VCCME[6]
V39
VCCME[7]
V41
VCCME[8]
V42
VCCME[9]
Y39
VCCME[10]
Y41
VCCME[11]
Y42
VCCME[12]
V9
C81
0.1UF/10V,X7R
75mA
C105
VCCADPLLA
1uF/10V,X7R
+V1.05S
75mA
VCCADPLLB
+V1.05S
C369
C355
10uF/6.3V,X5R
1uF/10V,X7R
AU24
VCCVRM[3]
BB51
BB53
VCCADPLLA[1]
VCCADPLLA[2]
BD51
BD53
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
C124
C113
C123
AH23
AJ35
AH35
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
AF34
VCCADPLLA
FB23 1
2 FB0603
120ohm@100MHz,500mA
DCPRTC
+V1.8S
AH34
VCCIO[3]
AF32
VCCIO[4]
V12
DCPSST
Y22
DCPSUS
P18
VCCSUS3_3[29]
U19
VCCSUS3_3[30]
U20
VCCSUS3_3[31]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
V24
V26
Y24
Y26
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
VCCSUS3_3[28]
U23
VCCIO[56]
V23
V5REF_SUS
F24
C114
1uF/10V,X7R
+V3.3AL
168mA
C119
C116
C117
0.1UF/10V,X7R
0.1UF/10V,X7R
0.1UF/10V,X7R
+V3.3AL
+V1.05S
D5
1N4148WS
SOD323
R127
C
+V3.3S
10
R0603
C104
V5REF
K49
VCC3_3[8]
J38
C140
VCC3_3[9]
L38
1uF/10V,X7R
VCC3_3[10]
M36
VCC3_3[11]
N36
VCC3_3[12]
P36
VCC3_3[13]
U35
VCC3_3[14]
AD13
1uF/10V,X7R
D7
0.1UF/10V,X7R C100
+V5S
1N4148WS
SOD323
R172
+V3.3S
375mA
10
R0603
C131
C129
0.1UF/10V,X7R
0.1UF/10V,X7R
VCCSATAPLL[1]
VCCSATAPLL[2]
+V1.05S
VCCSATAPLL
AK3
AK1
FB17 1
2 FB0603
120ohm@100MHz,500mA
ns
C88
+V1.05S
+V5AL
C127
1uF/10V,X7R
VCCME[2]
Clock and Miscellaneous
C132
10uF/6.3V,X5R
VCCME[1]
AD39
PCI/GPIO/LPC
C352
10uF/6.3V,X5R
AD38
USB
If internal LAN is not used connect to GND directly
2222mA
+V1.05S
POWER
ns
AP51
U4J
VCCACLK
FB24 1
2 FB0603
120ohm@100MHz,500mA
+V1.05S
D
VCCIO[9]
AH22
VCCVRM[4]
AT20
VCCIO[10]
AH19
VCCIO[11]
AD20
VCCIO[12]
AF22
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
AD19
AF20
AF19
AH20
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
AB19
AB20
AB22
AD22
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
AA34
Y34
Y35
AA35
C320
C321
10uF/6.3V,X5R
1uF/10V,X7R
ns
ns
+V3.3AL
C353
C354
10uF/6.3V,X5R
1uF/10V,X7R
U22
VCCSUS3_3[32]
V15
VCC3_3[5]
V16
VCC3_3[6]
Y16
VCC3_3[7]
C118
+V3.3S
0.1UF/10V,X7R
C89
SATA
VCCADPLLB
FB21 1
2 FB0603
120ohm@100MHz,500mA
B
PCI/GPIO/LPC
+V1.8S
0.1UF/10V,X7R
AT18
C90
C0805
V_CPU_IO[1]
C94
AU18
V_CPU_IO[2]
CPU
+V1.1S_VTT
0.1UF/10V,X7R
A12
C325
VCCRTC
IbexPeak-M_Rev1_0
HDA
PCH_EC_RTC
RTC
4.7UF/10V,Y5V
0.1UF/10V,X7R
VCCSUSHDA
+V1.05S
B
C101
1uF/10V,X7R
+V1.05S
+V3.3AL
L30
C338
1uF/10V,X7R
0.1UF/10V,X7R
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
29
59
of
5
U4I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
U4H
AB16
VSS[0]
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
IbexPeak-M_Rev1_0
S_Bot
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
IbexPeak-M_Rev1_0
S_Bot
TOPSTAR TECHNOLOGY
bent
Page Name
PCH
Size
C
C46
Project Name
Rev
A
Date:
Sheet
30
59
of
5
+V3.3S
+V1.8S
{6,8,15,16,22,23,24,25,26,27,28,29,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{11,26,28,29,49,56,57}
+V1.8S
+V1.8S
U10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
{32} LVDS_CLKAP
{32} LVDS_CLKAM
{32} LVDS_YAP2
{32} LVDS_YAM2
{26} LVDS_SEL
{32} LVDS_YAP1
{32} LVDS_YAM1
{32} LVDS_YAP0
{32} LVDS_YAM0
GND
VSS
VDD7
VDD
VSS8
TMDS2+
VDD6
TMDS2VSS7
VSS1
ATMDS2+
TMDS1+
ATMDS2TMDS1ATMDS1+
VDD1
ATMDS1SEL
ATMDS0+
VSS2
ATMDS0TMDS0+ ATMDSCLK+
TMDS0ATMDSCLKVSS3
VDD5
TMDSCLK+ BTMDS2+
TMDSCLKBTMDS2VDD2
BTMDS1+
VSS4
BTMDS1VDD3
BTMDS0+
VSS5
BTMDS0VDD4
BTMDSCLK+
VSS6
BTMDSCLK-
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
PCH_LVDS_CLKAP {25}
PCH_LVDS_CLKAM {25}
PCH_LVDS_YAP2 {25}
PCH_LVDS_YAM2 {25}
PCH_LVDS_YAP1 {25}
PCH_LVDS_YAM1 {25}
PCH_LVDS_YAP0 {25}
PCH_LVDS_YAM0 {25}
GPU_LVDS_CLKAP {20}
GPU_LVDS_CLKAM {20}
GPU_LVDS_YAP2 {20}
GPU_LVDS_YAM2 {20}
GPU_LVDS_YAP1 {20}
GPU_LVDS_YAM1 {20}
GPU_LVDS_YAP0 {20}
GPU_LVDS_YAM0 {20}
TS3DV421
+V3.3S
+V3.3S
PM
C
U6
{26} LVDS_DDC_SEL
IN1
{21} G_SMB_CLK
NO1
GND
NO2
IN2
{21} G_SMB_DATA
10
EDID_CLK
NC1
PCH_DDC_CLK
V+
NC2
COM2
COM1
{32}
{25}
PCH_DDC_DATA
EDID_DATA
U5
{21} GPU_LVDS_BKLTEN
{25}
NO
IN
GND V+
NC COM
LVDS_BLT_SEL {26}
LVDS_BKLTEN {32}
ts5a3157
{32}
TS5A23157
PM
PM
footprint need to change
+V3.3S
U1
{21} GPU_LVDS_VDDEN
{25} PCH_LVDS_VDDEN
NO
IN
GND V+
NC COM
LVDS_SEL_PCH
LVDS_VDDEN
{26}
{32}
ts5a3157
PM
{25} PCH_LVDS_CLKAP
{25} PCH_LVDS_CLKAM
{25} PCH_LVDS_YAP2
{25} PCH_LVDS_YAM2
{25} PCH_LVDS_YAP1
{25} PCH_LVDS_YAM1
{25} PCH_LVDS_YAP0
{25} PCH_LVDS_YAM0
RN4 0
RA0402_4 GM
RN5 0 1
2
RA0402_4 3
4
1
2
RN6
RA0402_4 0
3
4
GM
1
2
RN7
3
4 GM
RA0402_41
2
GM 0 3
4
R24
R0402
LVDS_CLKAP
LVDS_CLKAM
LVDS_YAP2
LVDS_YAM2
LVDS_YAP1
LVDS_YAM1
LVDS_YAP0
LVDS_YAM0
{32}
{32}
{32}
{32}
{32}
{32}
{32}
{32}
{32}
EDID_CLK
R29
R0402
PCH_DDC_CLK
{25}
GM
{32} EDID_DATA
R27
R0402
PCH_DDC_DATA
{25}
GM
LVDS_BKLTEN {32}
GM
R23
{25} PCH_LVDS_VDDEN
R0402
LVDS_VDDEN
{32}
GM
TOPSTAR TECHNOLOGY
bent
Page Name
LVDS Switch
Size
C
C46
Project Name
Rev
A
Date:
Sheet
31
59
of
5
+V3.3S
D1
2
SOD323
LIDR#
1 1N4148WS
R15
1K
R0402
D2
{31} LVDS_BKLTEN
{43} HW_OFF_BKLT#
BKLT_ON
LCDCON1
LCDCON2X20P_2
CNS40_LCDB
{43}
LCDVDD
C8
BAT54A
1000pF/50V,X7R
C0402
LCDVDD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
{31} LVDS_YAM0
{31} LVDS_YAP0
{31} LVDS_YAM2
{31} LVDS_YAP2
LCDVDD
F1
AO6409
+V3.3S
+V3.3AL
6
5
4 S
1
2
3
ns 1.5A T-Fuse
R0603
FB1
0 R0805
Q6
C9
C0402
C4
0 R0402
{31}
{31}
LVDS_CLKAP {31}
LVDS_CLKAM {31}
EDID PWR
LVDS_CAM_USB_PN3
LVDS_CAM_USB_PP3
BKLT_ON
C306
0.1uF/25V,X7R
C0603
BKLT_PWM
R382
10K
R0402
+V5AL
VerB:Reverse Camera PWR control Circuit 071026

C6
+V5S
R9
100K
R6
0
R0805
ns
C305
R7
0
R0805
100pF/50V,NPO
C0402
R2
0 R0805
+5VAL_Camera
+V3.3S
+V3.3AL
R10
R0603 ns
R11
R0603
R3
10K
R0402
ns
EDID PWR
R384
R0603 0
C2
0.1uF/10V,X5R
C0402
E1
EMI
ns
C1
10uF/6.3V,X5R
C0805
ns
Add +5S to CAM POWER
081111
1
R4
100K
R0402
ns
{43} Camera_ON
R0603 0
Q1
SOT23
AO3415
ns
500mA
R1
10K
R0402
C7
0.1UF/10V,X7R
C0402
R383
0 R0402
FB15
ns
LVDS_YAM1
LVDS_YAP1
3
4
R0402
FB14
ns
41
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
S46P VerB:LVDS CONN40pin 090710
{25} LVDS_BKLTCTL
INVT_VDD
C307
C0603
0.1uF/25V,X7R
ns
R8
100K
{21} GPU_LVDS_BKLTCTL
2
FB16
+5VAL_Camera
BKLT_PWM
41
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
+VDC
R14
100
R0603
LVDS_VDDEN
2
2N7002DW
0
ns
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
LCDVDD
R381
1.5A T-Fuse
R0603
FB0805
Q4
SC70_6
{43} EC_BKLT_PWM
F2
+VDC
100ohm@100MHz,3A
R19
100K
R0402
{31}
EDID_CLK
{31} EDID_DATA
R5
2.2K
R0402
ns
0.047uF/16V,X7R
0.01uF/16V,X7R
LVDS_VDDGON#
R18
100K
R0402
Q3
2N7002
SOT23
C5
C0402 10uF/6.3V,X5R C0805

0.1UF/25V,Y5V C0805 10UF/6.3V,X5R
ns
100pF/50V,NPO
3LCDVDD_EN#
C10
C0402
ns
{31} LVDS_VDDEN
R17
100K
R0402
ns
LCDVDD
C3
G
R16
10K
{6,8,15,16,22,23,24,25,26,27,28,29,31,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{40,46,48,49,50,51,52,55,56,57}
{6,23,24,26,27,29,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{29,36,48,49,50,53,56}
{23,25,29,33,34,35,36,37,38,43,51,52,55,56}
{36,43}
+V3.3S
+VDC
+V3.3AL
+V5AL
+V5S
Q2
2N7002E-T1
SOT23
ns
CHK2
LVDS_CAM_USB_PN3
LVDS_CAM_USB_PP3
2
3
D15
D16
L4_0805 90ohm@100MHz,0.5A
ns
EGA10603V05A1-B
ESDPAD_R0603
ns
1
4
{26} CAM_USB_PN3
{26} CAM_USB_PP3
EGA10603V05A1-B
ESDPAD_R0603
ns
TOPSTAR TECHNOLOGY
bent
Page Name
Size
C
Project Name
LVDS&Inverter CONN
C46
Rev
A
Date:
Sheet
32
59
of
5
+V3.3S
+V3.3S
+V3.3S
R494
4.7K
R493
4.7K
CFG
DDCBUF_EN
R492
4.7K
ns
{36,46,48}
{23,25,29,32,34,35,36,37,38,43,51,52,55,56}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{6,23,24,26,27,29,32,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{17,20,21,34,52,57}
R498
4.7K
ns
DDC_EN GM/HDMI
TMS_EN
R495
0
ns
GM/HDMI
AD+
+V5S
+V3.3S
+V3.3AL
+V3.3GPU
R499
0
GM/HDMI
GND
GND
+V3.3S
C179
0.01uF/25V,X7R
GM/HDMI
C156
0.01uF/25V,X7R
GM/HDMI
+V5_HDMI
+V5_HDMI
5VDDCCK_HDMI
5VDDCDA_HDMI
0.01uF/25V,X7R C166
0.01uF/25V,X7R
C165
GM/HDMI
GM/HDMI
G7
G6
36
35
34
33
32
31
30
29
28
27
26
25
G5
G4
GM/HDMI
{25} IN_D1+
{25} IN_D1{25} IN_D2+
{25} IN_D2{25} MCH_CLK_D4+
{25} MCH_CLK_D4-
g7
g6
GND7
FUNCTION4
FUNCTION3
VCC3V5
DDC_EN
GND6
HPD_SINK
SDA_SINK
SCL_SINK
GND5
VCC3V4
TMDS_EN
g5
g4
GND
VCC3V
FUNCTION1
FUNCTION2
GND1
ANALOG1(REXT)
HPD_SOURCE
SDA_SOURCE
SCL_SOURCE
ANALOG2
VCC3V1
GND2
gnd18
{25} IN_D0+
{25} IN_D0-
GND
g1
gnd10
GND4
OUT_D1OUT_D1+
VCC3V3
OUT_D2OUT_D2+
GND3
OUT_D3OUT_D3+
VCC3V2
OUT_D4OUT_D4+
g2
g3
GND8
IN_D1IN_D1+
VCC3V6
IN_D2IN_D2+
GND9
IN_D3IN_D3+
VCC3V7
IN_D4IN_D4+
CH7318
GND
1
2
3
4
5
6
7
GM_HDMI_DDC_DATA 8
GM_HDMI_DDC_CLK
9
10
11
12
G8
37
38
39
40
41
42
43
44
45
46
47
48
GM/HDMI
G1
49
24
23
22
21
20
19
18
17
16
15
14
13
G2
G3
IFPC_TXD2P
IFPC_TXD2N
C178
0.01uF/25V,X7R
C155
0.01uF/25V,X7R
IFPC_TXD1P
IFPC_TXD1N
GM/HDMI
GM/HDMI
IFPC_TXD0P
IFPC_TXD0N
IFPC_TXC
IFPC_TXC#
+V3.3S
C
Note:The ESD protection devices should be placed as

close to the HDMI connector as
possible so that when ESD strikes occur, the
discharges can be quickly absorbed or
diverted to the ground/power plane before it is
coupled to another signal path nearby.
GND
PC0
PC1
U25
GND
C142
0.01uF/25V,X7R
GM/HDMI
+V3.3S GND
HDMI
R483
R479
HDMI
intel demo 499 and chro demo 1.2k by homy 1029
GM/HDMI
+V3.3S
499,1%
PS8101
GND
GND
7318
by xiezx
MCH_HDMI_HPD
R201
1.2K
CH7318
{25}
R202
Colay 8101 and
{20} IFPC_TXD2P
{20} IFPC_TXD2N
CHK4
4
1
{20} IFPC_TXD1P
{20} IFPC_TXD1N
CHK5 4
1
CHK6
{20} IFPC_TXD0P
{20} IFPC_TXD0N
{20}
{20}
Colay 8101 and
7318
+V3.3S
by xiezx
R497
2.2K
R496
2.2K
TMS_EN
HDMIHP_C
5VDDCDA_HDMI
5VDDCCK_HDMI
+V3.3S
DDC_EN
CFG
DDCBUF_EN
GND
CHK7
IFPC_TXC
IFPC_TXC#
0 R0603
0 R0603
IFPC_TXD6P_esd
IFPC_TXD6N_esd
GC145 0.1uF/10V,X7R
IFPC_TXD5P_esd C0402
IFPC_TXD5N_esd
HDMI
1
2
3
4
5
LINE_1 NC4
LINE_2 NC3
VDD
GND
LINE_3 NC2
LINE_4 NC1
+V3.3S
IFPC_TXD6P_esd
IFPC_TXD6N_esd
IFPC_TXD4P_esd
HDMI_CON1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
IFPC_TXD4N_esd
IFPC_TXD5P_esd
IFPC_TXD5N_esd
IFPC_TXC_esd
IFPC_TXC#_esd
GU4
IFPC_TXD4P_esd
IFPC_TXD4N_esd
GND_HDMI GC146 0.1uF/10V,X7R
IFPC_TXC_esd
C0402
IFPC_TXC#_esd HDMI
3100M0.33A
ns
2
1
2
3
4
5
LINE_1 NC4
LINE_2 NC3
VDD
GND
LINE_3 NC2
LINE_4 NC1
l4_0805
R538 0
R0603
R529 0
R0603
HDMI
HDMI
+V5S
10
9
8
7
6
AZ1045
HDMI
R523HDMI0 R0603
R521
0 R0603
HDMI
l4_0805
4
3 100M0.33A
ns
1
2
4
1
+V5_HDMI
GU3
l4_0805
ns
3 100M0.33A
2
GND_HDMI
3
ns
2
100M0.33A
l4_0805
R502 0 R0603
R489 0 R0603
10
9
8
7
6
5VDDCCK_HDMI
+V5_HDMI 5VDDCDA_HDMI
HDMIHP_C
AZ1045
HDMI
R536
2.2K
GM/HDMI
PC0
R537
2.2K
GM/HDMI
R0402
R0402
GM_HDMI_DDC_CLK
{25}
+V3.3GPU
D8
BAT54A
PM/HDMI
+V3.3GPU
hads
R530
4.7K
7318
GR18
4.7K
R0402
PM/HDMI
{20} HDMI_DDC_CLK
R205
GND_HDMI
D23
ns/HDMI
DIODE_SCHTK MLSEP
IFPC_TXD6P_esd
OUT4
IN4
IFPC_TXD6N_esd
OUT3
IFPC_TXD6P_esd
IFPC_TXD6N_esd
IN3
GND1 GND
IFPC_TXD5P_esd
OUT2
IN2
IFPC_TXD5P_esd
IFPC_TXD5N_esd
10
OUT1
IN1
IFPC_TXD5N_esd
GND_HDMI
D24
GNDGND_HDMI,
5VDDCCK_HDMI
IFPC_TXD4P_esd
10
OUT1
IN1
IFPC_TXD4P_esd
IFPC_TXD4N_esd
OUT2
IN2
IFPC_TXD4N_esd
GND1 GND
IFPC_TXC_esd
OUT3
IN3
IFPC_TXC_esd
IFPC_TXC#_esd
OUT4
IN4
IFPC_TXC#_esd
DIODE_SCHTK MLSEP ns/HDMI
C159
10pF/50V,NPO
C0402
PM/HDMI
R0402
ns
HDMI
GND_HDMI
GND_HDMI
R199
0
R0402
PM/HDMI
3
PM/HDMI
BSS138
GQ4
GND
R154
100K
R0402
HDMI
GND_HDMI
R192
4.7K
PM/HDMI
change 4.7k to 2.2k 080508
R188
0
R0402
PM/HDMI
{25}
C136
0.1UF/25V,Y5V
C0402
HDMI
+V5_HDMI
GM_HDMI_DDC_DATA
PC1
FB0603
22
23
R535
4.7K
8101
2120ohm@100MHz,500mA
HDMI
20
21
HDMI
R534
4.7K
1N5819HW-F
SOD123
HDMI_D_1A
<Part Number>
GND_HDMI
Colay COMCHK with 0ohm
ns
D2+
D2 SHTELD
D2D1+
D1 SHTELD
D1D0+
GND1
D0 SHTELD
GND2
D0CK+
CK SHTELD GND3
CKGND4
CEC
RESERVED
SCL
SDA
DCC/CEC_GND
+5V
HP_DET
FB6
D6
1
+V3.3GPU
GND_HDMI
GND_HDMI
+V3.3GPU
GR7
10K
R0402
PM/HDMI
+V3.3GPU
+V3.3AL
GPU_HDMI_HPD
5VDDCDA_HDMI
3
PM/HDMI
BSS138
GQ3
R169
C143
10pF/50V,NPO
C0402
PM/HDMI
R0402
ns
GND_HDMI
HDMIHP_C
PM/HDMI
GR5
100K
R0402
GND_HDMI
{21,43}
GR12
1K
R0402
PM/HDMI
1
PM/HDMI PM/HDMI
100pF/50V,NPO
GQ1
2N7002
SOT23
{20} HDMI_DDC_DATA
GQ2
2N7002
SOT23
R183
4.7K
PM/HDMI
GR9
4.7K
R0402
PM/HDMI
GC36
C0402
PM/HDMI
GND_HDMI
GR10
10K
R0402
PM/HDMI
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A2
HDMI CONN
Project Name
C46
Rev
A

33
59
Date:
Sheet
of
5
CRT
1
+V3.3S
+V5S
+V3.3GPU
INTERFACE
Cross moat place
Place close to VGA port
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57
{23,25,29,32,33,35,36,37,38,43,51,52,55,56}
{17,20,21,33,52,57}
Change the ESD diode connection by bent 091022

Cross moat place
+V5S
VGA CONNECTOR
+V5_VGA
3
ID8
BAT54SPT
SOT23
IC18
IC17
5.6pF/50V,NPO
ns
5.6pF/50V,NPO
5.6pF/50V,NPO
1
R660
IFB3
47ohm/100MHz,500mA
1FB0603 2
0
NV suggest:22pf
PM
GND_VGA
IR7
150,1%
IC23
5.6pF/50V,NPO
ns
GOUT
IC16
IC15
5.6pF/50V,NPO
5.6pF/50V,NPO
{20}
CRT_BLUE
ID7
BAT54SPT
SOT23
IR6
150,1%
{25} CRT_BLUE_R
IC24 R0603
IC13
IC14
5.6pF/50V,NPO
ns
12
5VDDCDA
13
HSYNC
NC
NC VSYNC
GND
GND
CLK
14
VSYNC
15
5VDDCCK
shell
C10518-11505-L
IC11
15PF/50V,NPO
IC7
15PF/50V,NPO
IC4
15PF/50V,NPO
ns
ID6
BAT54SPT
SOT23
5.6pF/50V,NPO
5.6pF/50V,NPO
GM
GND_VGA
GND_VGA +V5_VGA
150ohm50ohm
(From GPU to CONN)
11
IC9
15PF/50V,NPO
BOUT
R553 0
GND_VGA+V5_VGA
2 IFB2 FB0603
47ohm/100MHz,500mA
NC
SDA
G
GND
HSYNC
B
R
GND
shell
GND_VGA
0
PM
VGA1
VGADMF
GND
R661
GR43
6
1
7
2
8
3
9
4
10
5
GND_VGA+V5_VGA
R569
GM
0
GND_VGA
NV suggest:2pf
R0603
{25} CRT_GREEN_R
GND_VGA
GND_VGA
CONNECTOR
TOP VIEW
GR44
{20} CRT_GREEN
2
120ohm@100MHz,500mA
IR5
FB0603
100K
IC12
0.1UF/25V,Y5V
16
GM
IC22
IFB1
2 1
1N5819
SOD123
{25} CRT_RED_R
ID5
1
ROUT
R0603
IR8
150,1%
IFB4
47ohm/100MHz,500mA
1FB0603 2
R571
GR45
CRT_RED
17
R659
PM
{20}
ESD:
NV suggest use +3.3V
Layout note:
1. +3.3V and GND Route >15mils trace width
2. No more than 75mils
3. ESD diode should no more than 10pf cap.
ns
Assy
GND_VGA
GND_VGA
S46/M21VGA ConnLJ081223
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V3.3S
+V5_VGA
IC19
0.1UF/25V,Y5V
IC10
0.1UF/25V,Y5V
IC2
0.1UF/25V,Y5V
GND_VGA
IC1
0.1UF/25V,Y5V
IC20
0.1UF/25V,Y5V
IC21
0.1UF/25V,Y5V
+V3.3GPU +V3.3S
Cross moat place

GND_VGA
+V5_VGA
R509
R599
8.2K
R0402
PM
GM
{25} CRT_DDC_DATA_R
R259
8.2K
R0402
GM
0
reserved ciucuit possibility to Cost down 1G125 follow design guide--0929
+V5_VGA
R600
R219
{20} CRT_DDC_DATA
GR17
{20} CRT_HSYNC
IU2
74AHCT1G125
SOT23_5
GM
PM
OE#
GND
VCC
IC3
IC6
0.1UF/25V,Y5V
0.1UF/25V,Y5V
GND_VGA
CRT_H_SYNC
{20} CRT_VSYNC
{25} CRT_VSYNC_R
GR21
R215
PM
GM
OE#
GND
VCC
GM
0 VerC: Change to bat54s
IR2
39
HSYNC
IR1
39
VSYNC
{20} CRT_DDC_CLK
R595
0
2
5VDDCDA
VerC: Change to bat54s
R596
8.2K
R0402
PM
R244
8.2K
R0402
GM
BAT54SPT
SOT23
GND_VGA
VerB:BAV99DIODESPHILIPS
for cost down
+V5_VGA071016
Q14
BSS138
SOT23
ID3
2
5VDDCCK
PM
CRT_V_SYNC
BAT54SPT
GND_VGA
SOT23
R598
+V3.3S
R0402
GND_VGA
GM
+V5_VGA
0
0 R597
2
VSYNC
IC8
0.1UF/25V,Y5V
3
ID1
GND_VGA
SOT23
Demo has no voltage lever shifter
+V5_VGA
ID2
2
HSYNC
+V3.3GPU
0
R0402
PM
BAT54SPT
TOPSTAR TECHNOLOGY
IC5
0.1UF/25V,Y5V
bent
Page Name
1
BAT54SPT
Size Project Name

Custom
GND_VGA
CRT Interface
C46
Rev
A

34
59
Date:
Sheet
of
SOT23
+V3.3GPU +V3.3S
{25} CRT_DDC_CLK_R
Near U5/U6 ASAP
+V5_VGA
ID4
PM
R510
IU1
74AHCT1G125
SOT23_5
IR3
2.2K
Gate_vga 1
Gate_vga1
{25} CRT_HSYNC_R
IR4
2.2K
Q16
BSS138
SOT23
VerC: Del VR7
+V5S
+V3.3S
{23,25,29,32,33,34,36,37,38,43,51,52,55,56}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
SATAHDD_B1
SATAHDD_B2
+V3.3S
FB27
R0805
ns
CT5
V3.3_SATA
4.7uF/10V,Y5V
C0805
ns
C405
0.1UF/25V,Y5V
ns
C406
0.1UF/25V,Y5V
ns
Screw 2*5mm
ASSY
+V5S
Screw 2*5mm
ASSY
Average 1A,Peak 1.5A

FB26
0 R0805
CT4
V_HDD
4.7uF/10V,Y5V
C0805
C396
0.1UF/25V,Y5V
C397
0.1UF/25V,Y5V
Close to connector as possible

the same distance to connector
{22}
{22}
{22}
V3.3_SATA
{22}
SATA_TXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
C414
C413
V_HDD
+V5S
FB20
Average 1A,Peak 1.5A
R0805
CT3
4.7uF/10V,Y5V
C0805
C330
0.1UF/25V,Y5V
V_ODD
C334
0.1UF/25V,Y5V
2
0.01uF/25V,X7R 3
C0402
5
C0402
6
0.01uF/25V,X7R
8
9
10
SATA_HDD1
TX
TX#
RX#
RX
GND0
GND1
GND2
1
4
7
VCC3_0
VCC3_1
VCC3_2
GND3
GND4
GND5
11
12
13
14
15
16
18
VCC5_0
VCC5_1
VCC5_2
REEVE
GND6
17
GND7
19
20
21
22
VCC12_0
VCC12_1
VCC12_2
GND23
GND24
23
24
SATA_HDD CONN
SATA_D_50B
SATA_CON1
{22} SATA_TXP1
{22} SATA_TXN1
{22} SATA_RXN1
{22} SATA_RXP1
C344
C342
S1
S2
S3
S4
0.01uF/25V,X7R S5
0.01uF/25V,X7R S6
S7
GND1
A+
A- GND6
GND2
BB+
GND3
P1
P2
P3
P4
P5
P6
DP
+5V_1
+5V_2
MD GND7
GND4
GND5
14
V_ODD
15
B
SATA_ODD CONN
SATA_S_50G
VerB:change the footprint the same as S46P
TOPSTAR TECHNOLOGY
bent
Page Name
SATA HDD&ODD
Size
C
C46
Project Name
Rev
A
Date:
Sheet
35
59
of
5
USB Board CONN
+V5S
+V3.3AL
+V5AL
+VDC
AD+
{23,25,29,32,33,34,35,37,38,43,51,52,55,56}
{6,23,24,26,27,29,32,33,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{29,32,48,49,50,53,56}
{32,40,46,48,49,50,51,52,55,56,57}
{46,48}
24pin 0.5mm bot FFC
+V5S
{26}
{26}
USB_OC#5
USB_OC#2
{26}
{26}
USB_PN11
USB_PP11
{26}
{26}
USB_PN10
USB_PP10
{26}
{26}
USB_PN4
USB_PP4
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C401
0.01uF/25V,X7R
C0402
26
25
+V5S
C395
0.01uF/25V,X7R
C0402
26
25
USB_CONN1
+V5AL
{43}
TPCLK
TPCLK
2
TR2
Q11
2N7002E-T1
ns
3
+V5S
+V3.3AL
R163
10K
R0402
ns
TP_TPCLK_R
+V3.3AL
{43}
TPDAT
TPDAT
0 R0402
TR1
+V5S
R153
10K
R0402
ns
TP_TPDAT_R
Q10
2N7002E-T1
ns
3
power button Conn
0 R0402
Ns pull up hear to avoid a leak of current.
PWRCONN1
AD+
R358 LEFT
1K
R0402
{46,54} Isense_SYSP
{39,43,48} PWR_SW_VCC2
3
C283
D14
100pF/50V,NPO
1
2
3
4
5
6
1
2
3
4
5
6
+V5S
TP_TPDAT_R
TP_TPCLK_R
BAT54SPT
1
3
5
7
9
11
13
15
17
19
21
2
4
6
8
10
12
14
16
18
20
22
21
2
4
6
8
10
12
14
16
18
20
22
AD+
B
LIDR#
+V3.3AL
{32,43}
88242_2001
2
TLSW1
TMG-534-V
BUTTON4_S
1
3
5
7
9
11
13
15
17
19
CNS2x10_1_R
620902010002
+V5S
LEFT
RIGHT
CNS6_1_R1
Conn 6Pin
TP_CON1
R0402
R352
1K
RIGHT
+V3.3AL
VerB:converse the connection of TP_CON1
4
3
3
C281
C120
C125
R146
R158
47K
47K
R0402
R0402
ns
ns
Add pull res
C0603
0.1UF/25V,Y5V
1UF/10V,Y5V
C0402
TPDAT
TPCLK
C126
C0402
0.1UF/25V,Y5V
D13
2
TRSW1
TMG-534-V
BUTTON4_S
BAT54SPT
TOPSTAR TECHNOLOGY
100pF/50V,NPO
+V5S
bent
+V5S
Page Name
Size
A3
Project Name
USB2.0&&LED CONN&Qkey CONN

C46
Rev
A
Date:
Sheet
36
59
of
0.1UF/25V,Y5V
0.1UF/25V,Y5V
GPIO1
FRONT-OUT-R
36
LINE1-VREFO-R
37
11
{22} AZALIA_CODEC_RST#
{22} AZALIA_CODEC_BITCLK
{22} AZALIA_CODEC_SDOUT
R348
{22} AZALIA_SDATAIN0
75K
R0402
1uF/10V,X7R
R341
4.7K
C279
100pF/50V,NPO
R337
4.7K
R378
5.11K,1% R0402 ns
R354
5.11K,1% R0402
HP_DET
R353
20K,1%
MIC1_JD
JACK_DET_B
R379
JD1
14
LINE2-L
15
LINE2-R
DCVOL
33
ALC662
JD2
34
CEN-OUT
43
LFE-OUT
44
45
R0402 C284
4.7uF/10V,X5R
C0805 16
MIC2-L
SIDESURR-OUT-L
MIC2_R
R364
75
R0402 C289
4.7uF/10V,X5R
C0805 17
MIC2-R
SIDESURR-OUT-R
46
SPDIFI/EAPD
47
SPDIFO
48
SURR-OUT-L
39
ICTPT30
ns
ICTPT29
ns
C297
1uF/10V,Y5V C0603
1uF/10V,Y5V C0603
VerA:follow the DEMO design in MIC1&MIC2 071108

ns
13
31
32
75
C296
JACK_DET_A
PC-BEEP
LINE2-VREFO
MIC1-VREFO-R
R359
INT_MIC_L
JACK_DET_B
R370
MIC2_L
All of JD resistors should be

placed as close as possible to
the sense pin of codec.
SDIN
12
18
CD-L
20
CD-R
21
MIC1-L
22
MIC1-R
23
LINE1-L
24
LINE1-R
20K,1%
QFPS48_0D5_1D6
AGND1
AGND2
C276
C0603
JACK_DET_A
R333
30
JDREF
40
SURR-OUT-R
41
FB28
1
SURR_OUT_R
FB30
1
2300ohm@100MHz,1.5A
FB0805
2300ohm@100MHz,1.5A
FB0805
HP_DET
D39
ESDPAD_R0603
EGA1-0603-V05
ns
C428
0.1uF/10V,X7R
C423
C422
100pF/50V,NPO100pF/50V,NPO
C0402
C0402
ns
ns
change to ns for esd
By Johan 071228
GND_AUD
INT_MIC_L_R
GND_AUD
GND_AUD
GND_AUD
1
4
2
5
6
3
7
8
L
R
D
AZALIAJACK
AUDIO8B
GND_AUD
Headphone Jack
MIC2_REF
R371
R372
10K ns
INPUT:HEADPHONE/LINE-OUT
OUTPUT:FRONT L/R
INT_MIC_L_R
4.7K R0402
ns
D35
1N4148WS
2
SOD323
D37
1N4148WS
1
2
SOD323
VCC5CDC
JACK_DET_B
GND_AUD
R646
4.7K
R0402
EAPD R360
ns
D32
ESDPAD_R0603
EGA1-0603-V05
ns
MIC2_L
FB29
1
MIC2_R
FB31
1
2300ohm@100MHz,1.5A
FB0805
2300ohm@100MHz,1.5A
FB0805
GND_AUD
Solve audio curve cut issue

By Johan 071224
D36
ESDPAD_R0603
EGA1-0603-V05
ns
MIC_IN1
AMP_OUT_L
R363
R638
4.7K
R0402
R0402 SHUTDOWN#
used for enhancing Audio

quality and ESD ability.
MIC2_REF 1
20K,1%
1
4
2
5
6
3
7
8
MIC1_JD
GND_AUD
AMP_OUT_R
D38
ESDPAD_R0603
EGA1-0603-V05
ns
ALC662
26
42
1uF/10V,X7R
SDOUT
CD-GND
SPKR
C275
C0603
GND1
GND2
{22}
R0402
29
MIC2-VREFO
C0805
10UF/6.3V,X5R
4.7K R0402
VREFOUT
SURR_OUT_L
GND_AUD
4
7
BTL_BEEP
51K
LINE1-VREFO-L
C300
SYNC
19
{43}
R343
33
27
28
BITCLK
10
{22} AZALIA_CODEC_SYNC
VREF
MIC1-VREFO-L
REST#
4.7uF/10V,X5R
C0805
R375 75 R0402 SURR_OUT_L
100uF/10V
R376 75 R0402 SURR_OUT_R
100uF/10V
4.7uF/10V,X5R
C0805
C299
0.1UF/25V,Y5V
A_GPIO1
LINE_OUT1
CT1
ns
ct6032
CT2
ns
ct6032
C304
ICTP
35
ns
T28
FRONT-OUT-L
GPIO0
A_GPIO0
C302
ns
AVDD1
AVDD2
VDD1
VDD2
ICTP
C288
0.1UF/25V,Y5V
Cross moat place
U20
GND_AUD
T27
2FB0805
C301
10UF/6.3V,X5R
C0805
C298
0.1UF/25V,Y5V
C291
25
38
0.1UF/25V,Y5V
C274
10UF/6.3V,X5R
C0805
1
9
C278
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{23,25,29,32,33,34,35,36,38,43,51,52,55,56}
GND_AUD
GND_AUD
GND_AUD GND_AUD
Change to cap for esd
Solve audio curve cut issue
By Johan 071228
By Johan 071224
D34
D33
R0402
R0402
ESDPAD_R0603
ESDPAD_R0603
100pF/50V,NPO
100pF/50V,NPO
EGA1-0603-V05
EGA1-0603-V05
R637
R639
ns
ns
1
FB12
600ohm@100MHz,1.5A
1
C280
+V3.3S
+V5S
+V5S
VCC5CDC
+V3.3S
C430
GND_AUD
connecr mic1_jd to senseB
and reserved route to senseA
By Johan 071224
C420
0.1uF/10V,X7R
C424
100pF/50V,NPO
C0402
ns
100pF/50V,NPO
C0402
ns
GND_AUD GND_AUD
GND_AUD
L
R
C
AZALIAJACK
AUDIO8B
GND_AUD
change to ns for esd

By Johan 071228
Stereo Microphone Jack

INPUT:STEREO MIC-IN
OUTPUT:CENT/LFE
T31 GND_AUD
ICTP
MIC2_L
ns
MIC2_R
add cap for esd
By Johan 071228
INT_MIC_L_R
FB25 FB0805
R368
10K
R373
10K
GND_AUD GND_AUD
C303
ns
ns
2FB0805
300ohm@100MHz,1.5A
PQ71
2N7002
SOT23
SURR_OUT_R
PQ70
2N7002
SOT23
GND_AUD
AMP_SHDW1
GND_AUD
VCC5CDC
U21
TPA6017A2
sop20_0d65_4d4g
AMP_OUT_R
C286
FB13 1
AMP_SHDW1
GND_AUD
INPUT:STEREO MIC-IN
OUTPUT:CENT/LFE
onboard stereo
microphone
GAIN0
GAIN1
PQ76
2N7002
SOT23
ns
SURR_OUT_L
PQ75
2N7002
SOT23
ASSY
ns
100pF/50V,NPO
C0402
C0603
0.22uF/10V,X7R
GND_AUD
0.1UF/25V,Y5V
AMP_OUT_L
C290
C0603
0.22uF/10V,X7R
R362
C292
R365 10K
0.47uF/25V,Y5V
C0603
C287
0.22uF/10V,X7R
C0603
R366
20K
SHUTDOWN#
GND_AUD
20K
17
RIN-
RIN+
R640
10K
ROUT+
18
+INTSPR
ROUT-
14
-INTSPR
+INTSPL
-INTSPL
LOUT+
10
BYPASS LOUT-
5
12
LINNC
16
6
15
1
11
13
20
21
19
GAIN0
GAIN1
LIN+
VDD
PVDD1
PVDD2
SHDWN# GND1
GND2
GAIN0
GND3
GND4
GAIN1
GND5
SHUTDOWN#
3
R374
10K
GND_AUD
Q32
2N7002
VCC5CDC
{43} AMP_SHDW
15.6dB
21.6dB
R367
10K
GND_AUD
MIC1
Microphone
BZ_D6027
Av(inv)
6dB
10dB
C421
100pF/50V,NPO
C0402
C391
VCC5CDC VCC5CDC
GAIN0 GAIN1
0
0
0
1
1
0
1
2
1
2
300ohm@100MHz,1.5A
D27
ESDPAD_R0603
EGA1-0603-V05
ns
1K
INT_MIC_L R574
C429
100pF/50V,NPO
C0402
R643
10K
C293
0.1UF/10V,X7R
R644
100K
SOT23
C294 4.7uF/10V,Y5V
C0805
C295
0.1UF/10V,X7R
GND
GND_AUD
GND_AUD
IO_INTSPK1
CNS4_V
GND_AUD
1
2
3
4
1
2
3
4
+INTSPR
-INTSPR
+INTSPL
-INTSPL
TOPSTAR TECHNOLOGY
bent
AZALIA(ALC883)
Size
C
C46
Project Name
Rev
A

37
59
Date:
Sheet
of
GND_AUD
Page Name
FAN Controller Circuit
+V3.3S
BT
Q13
H2
+V3.3S
+V5S
+V3.3AL
+V1.1S_VTT
+V1.5S
AO3415
0 R0805
BT
BT
11
BT_ON#
ns
R256
BT 1K
12
{43} BT_PWRON
BT 1K
Q15
2N7002E-T1-E3
SOT23
BT
1
2
11 3
4
12 5
6
7
8
9
10
R267
100K
BT
ns
TH_230_132_118_6
1
2
3
4
5
6
7
8
9
10
R228
R229
R655
R656
BT 0 R0402
BT 0 R0402
BT 0 R0402
BT 0 R0402
+V3.3S_BT
BT_CON
R233
M46 VERB:CHANGE BT_CON THE SAME AS X01--XIEZX
BT
R654
ns
100K
BT_ON
BT_USB_PP2
BT_USB_PN2
USB_PP5
{36}
USB_PN5
{36}
HW_RATIO_OFF#
{26}
{26}
HOLE
TH_200_132_118
+V3.3AL +V3.3S
{43}
+V5S
R13
10K
ns
R12
10K
R22
10K
{32}
FAN_BACK
ns
R266
H1
0.1UF/10V,X7R
TPCON_USB
CNS10_0D8_R
R245
100K
BT
R265
C218
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{23,25,29,32,33,34,35,36,37,43,51,52,55,56}
{6,23,24,26,27,29,32,33,36,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{8,10,11,27,28,29,50,51,55}
{39,40,41,56}
FAN
C215
1000pF/50V,X7R
BT
+V3.3S_BT
{43}
BT_PWRON {43}
BT
ns
R230
1
2
3
4
5
6
7
R224
2
BT
1
2
3
4
5
6
7
BT 0 R0805
R227
R21
C214
0.22uF/10V,X7R
BT
1K
FAN_TACH_ON
ns
C11
+V5S
1000pF/50V,X7R
+V5S
Q5
MMBT3904-F
SOT23
ns
R20
0
ns
Q28
Vfan
CPUFAN1
D22
2
R624
10K
TCM
PM_CLKRUN#
LPCPD#
LPCPD#
LPCPP
PM_CLKRUN#
LPCPP
R618
10K
TCM
R622
10K
TCM
9
3
BA0
BA1
PP
14
C404
1uF/10V,X7R
C0603
TCM
10
19
24
GND1
GND2
GND3
GND4
4
11
18
25
NC
NC1
NC2
NC3
NC4
NC5
NC6
1
2
5
6
8
12
13
R615
R0805
0
TCM
0.1UF/25V,Y5V
1
C409
10uF/6.3V,X5R
TCM
C411
0.1UF/25V,Y5V
TCM
CONN3_V
CNS3_V
FAN_FB
U7A
LM358
so8_50_150
3
Shut-Down
+V3.3S
1
VDD1
VDD2
VDD3
R34
1K
LFRAME#
LRESET#
LCLK
LAD0
LAD1
LAD2
LAD3
SERIRQ
CLKRUN#
LPCPD#
22
16
21
26
23
20
17
27
15
28
C407
0.1UF/25V,Y5V
TCM
C13
2
R36
R39
4.7K
R0402
10K,1%
2
R610R620
10K 10K
TCM ns
{22,40,43} LPC_FRAME#
{8,17,26,39,40,41,43,44} BUF_PLT_RST#
{26} CLK_TCMPCI
{22,40,43} LPC_AD0
{22,40,43} LPC_AD1
{22,40,43} LPC_AD2
{22,40,43} LPC_AD3
{22,43} INT_SERIRQ
10uF/6.3V,X5R
1
2
3
5.11K,1%
U30
1N4148WS
SOD323
R37
VCC_358
C12
+V3.3S
+V3.3S
0.1UF/25V,Y5V
R26
10
R0603
C14
, ECN BOM
TCM
C16
R31
1K
1
2
3
BCP69-16
SOT223 4
2
0.1UF/25V,Y5V
R35
100K 2
1
R38
200K
R0402
FAN1_V
Throttling/
Un-throttling
High-5V
{43}
Middle-4V
Low-3V
FAN1_V=3.30V,Vfan=5V
NC-P
TCM
SOP28_0D65_6D1
C15
C17
4.7UF/10V,Y5V
C0805
0.1uF/25V,Y5V
C0402
50
55
60
65
70
75
80
85
90
95
100
+V1.1S_VTT
+V1.1S_VTT
R356
1K,1%
R0402
R361
10K
SHDN_LOCK#
3
Q25
MMBT3904-F
SOT23
5
C285
1000pF/50V,X7R
SHDN_LOCK# {53}
2
Q26
MMDT3904
SC70_6
Del OVP CIRCUIT
R357
100K
{8,27} THERMTRIP#
10K
R355
{21} GPU_OVT#
Q27
{43}
2N7002E-T1
ALT_ON
Use for temperature alarm driver.

R369
100K
VerA:Delete GMCH_TEMP signal and components 071026
CPU
Shut Down
PCB1
R20 MB
Throttling on
THRMTRIP#
AND
PCB
SHDN#
PCBA1
R20 PCBA
8VCC_358
VIN
PCBA
CPU Temperature
THERM_ALERT#
VDC
85
90
95
100
(Degree)
TOPSTAR TECHNOLOGY
bent
U7B
LM358
so8_50_150
7
Page Name
MDC&BT/FAN/OTP
Size
C
C46
Project Name
Rev
A
Tuesday, January 05, 2010

38
59
Date:
Sheet
of
Thermal
sensor
Throttling Off
0
+V3.3S
+V3.3AL
+V1.5S
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{6,23,24,26,27,29,32,33,36,38,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{40,41,56}
+DATA4
-DATA4
1
2
D26
ESDPAD_R0603
EGA1-0603-V05
ns
+V3.3S
D25
ESDPAD_R0603
EGA1-0603-V05
ns
+V3.3AL
R567
0
R0603
R561
0
R0603
R557
0
R0603
ns
-DATA4
+DATA4
36
38
48
28
6
24
+1.5V0
+1.5V1
+1.5V2
+3.3VAUX
R0402
R0402
CHK8
90ohm@100M0.33A
l4_0805
ns
3
4
2
1
{26} MINICARD_USB_PN1
{26} MINICARD_USB_PP1
+3.3V0
+3.3V1
Keep USB2.0 Signal stub short

R550 0
R551 0
R556
0 +V1.5S
R0603
ns
+V3.3AL_PCIE
2
52
+V3.3S_PCIE
MPCIE2
MINIPCIE_half_r6
+V3.3S
USB_DUSB_D+
+V3.3AL +V3.3S
LED_WPAN#
LED_WLAN#
LED_WWAN#
46
44
42
11
13
REFCLKREFCLK+
{23} PCIE_TXN4_WLAN
{23} PCIE_TXP4_WLAN
31
33
PETN0
PETP0
{23} PCIE_RXN4_WLAN
{23} PCIE_RXP4_WLAN
23
25
PERN0
PERP0
17
19
RESERVED0
RESERVED1
37
39
41
43
45
47
49
51
RESERVED_PCIE0
RESERVED_PCIE1
RESERVED_PCIE2
RESERVED_PCIE3
RESERVED_PCIE4
RESERVED_PCIE5
RESERVED_PCIE6
RESERVED_PCIE7
{23} CLK_PCIE_MINICARD#
{23} CLK_PCIE_MINICARD
ns
ns
ICTP
ICTP
T60
T61
+V3.3AL
+V3.3S
R588 0
R0603
Wireless_LED# {45}
ICTP
ns
T54
PERST#
WAKE#
CLKREQ#
22
1
7
minicard_Wake#
R592 0
minicard_CLKREQ#_R R584 0
SMB_DATA
SMB_CLK
32
30
R555 0
R554 0
CHANNEL_CLK
CHANNEL_DATA
RESERVED_DISABLE
5
3
R591
10K
R0402
ns
T57
ns
ns
R547
ns
R562
R0402
R0402
R0402
0
ns
ns
R0402
R0402
R0402
ns
ns
CL_RST1#
CL_DATA1
CL_CLK1
+V3.3AL
T62
ICTP
T63
ICTP
R585
10K
R0402
C
minicard_Wake#
minicard_CLKREQ#_R
ns
{23}
{23}
R0402
10K
R578
R577 0
20
{23}
BUF_PLT_RST# {8,17,26,38,40,41,43,44}
PCIE_WAKE# {24,40,41,43,44}
minicard_CLKREQ# {23}
R0402
HW_RATIO_OFF#
{43}
ICTP
RESERVED_SIM0
RESERVED_SIM1
RESERVED_SIM2
RESERVED_SIM3
RESERVED_SIM4
16
14
12
10
8
ns
ns
T56
R565 0
R564 0
R563 0
R0402
R0402
R0402
ns
ns
ns
PWR_SW_VCC2 {36,43,48}
EC_DEBG_UTXD {43}
EC_DEBG_URXD {43}
T55
ICTP
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
R586 0 R0603
R587 0
ns
R0603
PCIE mini Card
ICTP
ns
+V3.3S_PCIE
C390
10UF/6.3V,X5R
C0805
9
15
21
27
29
35
4
18
26
34
40
50
53
54
56
57
58
59
60
61
55
PCIE MINI CARD
+V3.3AL_PCIE
C393
0.1UF/25V,Y5V
C0402
C389
10UF/6.3V,X5R
C0805
C392
0.1UF/25V,Y5V
C0402
ns R284,R295,R337,R341, Install R283

For chang PCIE SPEC to 1.1
Swain 081104
+V1.5S
C207
10UF/6.3V,X5R
C0805
C203
0.1UF/25V,Y5V
C0402
C206
0.1UF/25V,Y5V
C0402
C205
0.1UF/25V,Y5V
C0402
C204
0.1UF/25V,Y5V
C0402
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
PCIE MINI SLOT 1

Rev
A
C46
Date:
Sheet
39
59
of
5
+V3.3S
+V1.5S
+V3.3AL
+VDC
PCIE_NUT1
Hole+Dowel
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
{39,41,56}
{6,23,24,26,27,29,32,33,36,38,39,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
{32,46,48,49,50,51,52,55,56,57}
3G
+DATA8
-DATA8
+V3.3S
R285
0
R0603
3G
11
13
REFCLKREFCLK+
{23} PCIE_TXN2_3G
{23} PCIE_TXP2_3G
31
33
PETN0
PETP0
{23} PCIE_RXN2_3G
{23} PCIE_RXP2_3G
23
25
PERN0
PERP0
{23} CLK_PCIE_3G#
{23} CLK_PCIE_3G
{8,17,26,38,39,41,43,44}
+VDC
BUF_PLT_RST#
{26} PCI_CLK_DEBUG
R0402
R0402
R300 0
R296 0
R0402 ns
R0402
PICE_39
R0402 ns
R0402
R0402
Debug
R0402
Debug
R0402
Debug
R0402
Debug
R316
R321
R324
R326
R332
R336
{22,38,43} LPC_FRAME#
{22,38,43} LPC_AD0
{22,38,43} LPC_AD1
{22,38,43} LPC_AD2
{22,38,43} LPC_AD3
R271 0
R280 0
0
0
0
0
0
0
ns
Debug
17
19
37
39
41
43
45
47
49
51
48
28
6
USB_DUSB_D+
RESERVED0
RESERVED1
RESERVED_PCIE0
RESERVED_PCIE1
RESERVED_PCIE2
RESERVED_PCIE3
RESERVED_PCIE4
RESERVED_PCIE5
RESERVED_PCIE6
RESERVED_PCIE7
LED_WPAN#
LED_WLAN#
LED_WWAN#
46
44
42
PERST#
WAKE#
CLKREQ#
22
1
7
SMB_DATA
SMB_CLK
32
30
CHANNEL_CLK
CHANNEL_DATA
R628 0
R626 0
R625 0
ns
ns
ns
WAKE#
R231 0
ns
MiniPCIE_REQ1#_R
R246 0
R619 0
R617 0
3G_LED#
{43,45}
BUF_PLT_RST# {8,17,26,38,39,41,43,44}
PCIE_WAKE# {24,39,41,43,44}
MiniPCIE_REQ# {23}
ns
ns
ns
SMB_DATA_S {6,15,16,23,41}
SMB_CLK_S {6,15,16,23,41}
SIM_PWR
D17
ESDPAD_R0603
EGA1-0603-V05
ns
5
3
20
RESERVED_SIM0
RESERVED_SIM1
RESERVED_SIM2
RESERVED_SIM3
RESERVED_SIM4
16
14
12
10
8
R614
R605
SIM_REST
SIM_CLK
SIM_DATA
SIM_PWR
0
0
3G
HW_RATIO_OFF_3G#
SIMCARD1
SIM_PWR
SIM_REST
3G
SIM_CLK
D18
C310
0.1UF/25V,Y5V
C0402
D20
ns
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
R0603PICE_39
R0603 ns
C0603
{43}
R613 R612
10K
10K
ns
PCIE MINI CARD
ns
9
15
21
27
29
35
4
18
26
34
40
50
53
54
56
57
58
59
60
61
55
ns
R304 0
R313 0
C312
100pF/50V,NPO
C0402
D21
ns
ns
SIM_VPP
+V3.3AL
+V3.3AL
+V3.3S
SIM_DATA
8.2K
C308
1uF/10V,X7R
ns
RESERVED_DISABLE
+V3.3S
DEBUG 3G
R385
R0402
C309
0.1UF/25V,Y5V
C0402
ns
-DATA8 36
+DATA8 38
WAKE#
CHK9
4
1
ns
90ohm@100M0.33A
l4_0805
+3.3VAUX
3G
3G
R594
10K
ns
PCIE mini Card
3
2
{26} MINICARD_USB_PN2
{26} MINICARD_USB_PP2
0
0
+3.3V0
+3.3V1
R621
R623
2
52
MPCIE1
MINIPCIE_R6
3G
Keep USB2.0 Signal stub short
+V1.5S
3.3ALPCIE2
24
3.3PCIE2
SIM_VPP
SIM_DATA
ns
R629
0
R0603
3G
C311
47pF/50V,NPO
C0402
R386
56
R0402
ns
R627
0
R0603
ns
ESDPAD_R0603
ns
2
D28
EGA10603V05A1-B
ESDPAD_R0603
ns
D
+V3.3AL
+V3.3AL +V3.3AL
+1.5V0
+1.5V1
+1.5V2
1
D29
EGA10603V05A1-B
D19
ns
C1
C2
C3
C4
C5
C6
C7
C8
VCC1
RESET
CLK
GND
VPP
IO
GND1
GND2
HOLE0
HOLE1
G1
G2
SIMCARD
SIMCARD
3G
Add SIM card
Swain 081111
ns SIM card periphery current

081222
+V1.5S
3.3PCIE2
C254
1uF/10V,X7R
C0603
3G
C221
0.1UF/25V,Y5V
C0402
3G
3.3ALPCIE2
C416
10UF/6.3V,X5R
C0805
C257
C410
0.1UF/25V,Y5V
0.1UF/25V,Y5V
C0402
C0402
3G
3G
C394
0.1UF/25V,Y5V
C0402
3G
3G
C238
1uF/10V,X7R
C0603
3G
Add Option for 3G card

Swain 080820
C239
0.1UF/25V,Y5V
C0402
3G
+V3.3AL
R377
10K
R0402
3G
VerB:the SW1 controll the 3G_LED

{43}
3G_OFF
1
3
2
3G
R380
3GVDD_ON
1
3
2
3G_SW1
LSS-12M-V-B
SW_W_S7A
7
7
3
3G
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A2
USB Port
Project Name
C46
Rev
A
Wednesday, January 20, 2010

40
59
Date:
Sheet
of
5
+V3.3S
+V3.3S
+V1.5S
+V3.3AL
+V1.5S
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,42,43,44,45,49,50,51,52,53,55,56,57,58}
{39,40,56}
{6,23,24,26,27,29,32,33,36,38,39,40,42,43,44,45,46,47,48,49,50,52,53,56,57}
EP_MYLAR1
U17
P2231
QFNS20_0D5_0D85G
C272
0.1uF/10V,X5R
C263
0.1uF/10V,X5R
12
14
2
4
+V3.3AL
17
C256
PM_SLP_S3#
0.1uF/10V,X5RPM_SLP_S4#
Newcard_RST#
RCLKEN
add power
1.5Vin1
1.5Vin2
EXP_AUX_3.3V
3.3Vauxout
15
3.3Vauxin
1.5Vout1
1.5Vout2
11
13
STBY#
PERST#
EXP_RST#
CPPE#
10
EXP_CPPE#
CPUSB#
GND2
GND3
GND1
9
G1
G2
7
CP_USB#
3.3Vin1
3.3Vin2
20
SHDN#
6
16
18
19
SYSRST#
NC
RCLKEN
OC#
PVC
EXP_3.3V
3
5
3.3Vout1
3.3Vout2
Change mylar type follow ME advised

By Johan 071228
ASSY
D
EXP_1.5V
EP_CON1
Shield
ASSY
621000000002
{8,17,26,38,39,40,43,44}
sw
R349
BUF_PLT_RST#
Newcard_RST#
EP_B1
PM_SLP_S3#
PM_SLP_S4#
{24,43,53} PM_SLP_S3#
{24,43,56} PM_SLP_S4#
EP_B2
ASSY
ASSY
Screw 2*5mm
Screw 2*5mm
R322
100K
+V3.3AL
PM_SLP_S4# ns
+V3.3AL
D11
BAT54S
SOT23
ns
ns
24
PETn0
{23} PCIE_RXP3_EXP
22
PERp0
{23} PCIE_RXN3_EXP
21
19
{23} CLK_PCIE_EXPCARD
18
{23} CLK_PCIE_EXPCARD#
EXP_CPPE#
EXP_RST#
{6,15,16,23,40} SMB_DATA_S
{6,15,16,23,40} SMB_CLK_S
D30
15
+3.3VS_1
14
GND0
26
+3.3VAUX
12
REFCLK+
REFCLKCPPE#
13
PERST#
WAKE#
SMB_DATA
SMB_CLK
CPUSB#
USB_D+
USB_D-
RCLKEN
B
C248
C252
0.1uF/10V,X5R
10uF/6.3V,X5R
EXP_AUX_3.3V
ns
C267
C260
0.1uF/10V,X5R
10uF/6.3V,X5R
GND1
23
+1.5V_1
+1.5V_2
10
9
GND2
20
C273
GND3
0.1uF/10V,X5R
GND4
GND5
27
28
G2
G1
EGA1-0603-V05 EGA1-0603-V05
ESDPAD_R0603 ESDPAD_R0603
ns
ns
EXP_3.3V
+3.3VS_2
EXPCARD_CLKREQ# {23}
+V3.3AL
EXP_1.5V
ns
R351 R350
100K 100K
R320
10K
CP_USB#
C277
EXP_CPPE#
10uF/6.3V,X5R
EXPCARD_CLKREQ#
Chang the
ns CAP type from X7R to X5R
PECA00-000LBS4Z4N0
NEW_CARD3
G2
D31
PERn0
CP_USB#
{26} EXPCARD_USB_PP0
{26} EXPCARD_USB_PN0
R631 0
R0402
L4_0805
CHK102
1
3
4
ns
90ohm@100MHz,0.5A
R633 0
R0402
RESV2
17
11
{24,39,40,43,44} PCIE_WAKE#
RESV1
{23} PCIE_TXN3_EXP
CLKREQ#
ns
16
3
PETp0
G1
25
Q22
2N7002E-T1-E3
SOT23
2
3
J3
{23} PCIE_TXP3_EXP
R310
TOPSTAR TECHNOLOGY
bent
Page Name
EXPRESS CARD
Size
A3
C46
Project Name
Rev
A
Date:
Sheet
41
59
of
5
+V3.3S
+V3.3AL
REG18V
D3.3V
All of by-pass capacitors must be closed to IC

{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,43,44,45,49,50,51,52,5
{6,23,24,26,27,29,32,33,36,38,39,40,41,43,44,45,46,47,48,49,50,52,53,56,57}
D3.3V
REG18V
+V3.3AL
VDD18
D3.3V
+V3.3AL
R330
30K
R0402
DGND
REG18V
C240
0.1UF/25V,Y5V
C0402
DGND
R309 0
R331 0
RST
C269
4.7uF/10V,X5R
C0805
REG5Vin
GPIO0/LED
SM/SD/MS D4
RST
GPIO3
ClkSel
SM/SD/MS D3
SM_CD
SM_ALE
PWR_SW
VDD33
VSS
IT1337E-48
XTALI
IT1337E-48
QFPS48_0D5_1D6
SM_D2
VDD18
{26} USB_CR_PP8
{26} USB_CR_PN8
PWR_SW2
PWR_SW2
GPIO7
Clk12M_out
SM_CE/SD_WP
SM_WP/SD_CLK/MS_CLK
VSS
SM_WR
EE_SDA
SD/MS/xD
EE_CLK
AVDD33
DP
DM
AVSS
CLK_CR_48M
SM_WPSW
SM_RD
SM_RNB
SM_D0
SM_D1
+V3.3AL
XTALO
XTALI
xD_CD
Clk48M
SM_WP_SW/SD_CMD/MS_BS
SM_RD/MS_INS
SM_RNB/SD_CD
SM/SD/MS D0
SM/SD/MS D1
SM_CLE
SM/SD/MS D2
VDD18
D3.3V
IT1337E-48 PIN MUX
C251
0.1UF/25V,Y5V
C0402
24
23
22
21
20
19
18
17
16
15
14
13
C253
2.2uF/10V,X7R
C0805
RST
ClkSel
SM_D3
C268
1uF/10V,X7R
C0603
C264
0.1UF/25V,Y5V
C0402
PWR_SW2
D3.3V
DGND
C266
0.1UF/25V,Y5V
C0402
SM_WP
R283 0
R0402
PINs
05
SM/xD
SM_WPSW
06
SM_RD
07
SM_RNB
SD/MMC
SD_CMD
MS
MS_BS
MS_INS
SD_CD
08
SM_D0
SD_D0
MS_D0
09
SM_D1
SD_D1
MS_D1
11
SM_D2
SD_D2
MS_D2
18
SM_D3
SD_D3
MS_D3
22
SM_D4
SD_D4
MS_D4
29
SM_D5
SD_D5
MS_D5
32
SM_D6
SD_D6
MS_D6
34
SM_D7
SD_D7
MS_D7
39
SM_CE
SD_WP
40
SM_WP
SD_CLK
MS_CLK
SD_CLK
+V3.3S
1
2
3
4
5
6
7
8
9
10
11
12
37
Clk12M-out 38
SM_CE
39
SM_WP
40
DGND
41
42
EE_SDA
43
EE_SCL
44
D3.3V
45
46
47
DGND
48
ns
C243
2.2uF/10V,X7R
C0805
C265
4.7uF/10V,X5R
C0805
REG33Vin
REG18Vout
SM/SD/MS D7
GPIO6
SM/SD/MS D6
GPIO5
TC
SM/SD/MS D5
GPIO1
GPIO4
VSS
REG33Vout
36
35
34
33
32
31
30
29
28
27
26
25
U16
R0402
R0402
3IN1 CONN
C237
0.01uF/25V,X7R
C0402
VDD18
J2A
use 48Mhz crystal

ClkSel
R329
0
R0402
CLK_CR_48M {23}
SM_D2
SM_D3
SM_WPSW
2
3
4
DAT2_SD
DAT3_SD
CMD_SD
SD_CLK
CLK_SD
SM_D0
SM_D1
SM_RNB
SM_CE
9
10
1
11
use 12Mhz crystal
D3.3V
DAT0_SD
DAT1_SD
CD_SD#
WP_SD#
PWR_SW2
VDD_SD
6
C255
1uF/10V,X7R
C250
C0603
0.1uF/10V,X7R
SD+MMC
VSS_SD2
VSS_SD1
VCC_MS
13
3IN1
PWR_SW2
R293
C235
0.1UF/25V,Y5V
C0402
ns
EEprom Setting
U18
1
2
3
4
A0
A1
A2
VSS
VCC
WP
SCL
SDA
8
7
6
5
0
Clk12M-out
R0402
J2B
Int-12MHz
XTALI
EE_SCL
EE_SDA
S-24CS02AFJ-TB-G
SO8_50_150
ns
R327
0
R0402
R328
0
R0402
ns
SD_CLK
14
CLK_MS
SM_D3
SM_RD
SM_D2
SM_D0
SM_D1
SM_WPSW
15
16
17
18
19
20
DAT3_MS
INS_MS
DTA2_MS
DTA0_MS
DTA1_MS
BS_MS
MS
VSS_MS1
VSS_MS2
GND1
GND2
C258
1uF/10V,X7R
C262
0.1uF/10V,X7RC0603
12
21
22
23
3IN1
S0=P12=EEP_SDA
S1=P13=EEP_SCK
TOPSTAR TECHNOLOGY
bent
Page Name
Size Project Name
Custom
Cardreader(ITE1337)
Rev
A
C46

42
59
of
Date:
Sheet
5
+V3.3S
+V5S
EC_V3.3AL
C415
10UF/6.3V,X5R
C0805
R0402
FB11
120ohm/100MHz,500mA
1
2FB0603
EC Output Signal!
C246
C399
C398
C408
C412
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
Should have a 0.1uF capacitor close to every GND-VCC pair + one

larger cap on the supply.
C400
0.1UF/25V,Y5V
C0402
C402
1uF/10V,X7R
C0603
V18R
Vin>=1.5V turn on the cup FAN.
HDD_ZOUT
HDD_YOUT
HDD_XOUT
PM_STATE
V18R
EC Output Signal!
{27} EC_RUNTIME_SCI#
1
2
20
EC_RESET#37
GA20/GPIO00
KBRST#/GPIO01
SCI#/GPIO0E
ECRST#
EC Input Signal!
AD0/GPI38
AD1/GPI39
AD2/GPI3A
AD3/GPI3B
63
64
65
66
PWM
A20GATE
RCIN#
ADC
1N4148WS
SOD323
PWM0/GPIO0F
PWM1/GPIO10
PWM2/GPIO11
PWM3/GPIO19
21
23
25
34
FANFB0/GPIO14
FANFB1/GPIO15
FANPWM0/GPIO12
FANPWM1/GPIO13
28
29
26
27
MSIC
D10 1
SYS_I_Sense
HDD_ZOUT
HDD_YOUT
HDD_XOUT
SYS_I_Sense
change to DG
By Johan 071224
RN1
1
3
5
7
4.7K
2
4
6
8
ns
4.7K
2
4
6
8
RN2
1
3
5
7
SCANIN4
SCANIN5
SCANIN6
SCANIN7
{57} V1.8G_1.5G_ON
{24} AC_IN_PCH
ns
Double confirmed
By Johan 0711081231
pin+V3.3AL.
EC_IMVP_ON
EC_IR_IN
10K ns
10K
+V3.3AL
10K
ns
BT_PWRON
0
R284
SCANOUT15
SCANOUT14
SCANOUT13
SCANOUT12
SCANOUT11
SCANOUT10
SCANOUT9
SCANOUT8
SCANOUT7
SCANOUT6
SCANOUT5
SCANOUT4
SCANOUT3
SCANOUT2
SCANOUT1
SCANOUT0
82
81
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
KSO17/GPIO49
KSO16/GPIO48
KSO15/GPIO2F/E51_RXD(ISP)
KSO14/GPIO2E
KSO13/GPIO2D
KSO12/GPIO2C
KSO11/GPIO2B
KSO10/GPIO2A
KSO9/GPIO29
KSO8/GPIO28
KSO7/GPIO27
KSO6/GPIO26
KSO5/GPIO25
KSO4/GPIO24
KSO3/GPIO23/TP_ISP
KSO2/GPIO22/TP_ANA_TEST
KSO1/GPIO21/TP_PLL
KSO0/GPIO20/TP_TEST
R279
1K
+V3.3AL
R286
PCIE_WAKE#
76
75
{55} IMVP_PWRGD
{24,53} MAIN_PWROK
+V3.3AL
PSCLK1/GPIO4A/P80CLK
PSDAT1/GPIO4B/P80DAT
PSCLK2/GPIO4C
PSDAT2/GPIO4D
PSCLK3/GPIO4E
PSDAT3/GPIO4F
R651
R263
GPI43
GPI42
BAT_LOW#
E51CS#/GPIO52
E51TXD/GPIO16
E51RXD/GPIO17/E51CLK
E51TMR0/GPIO54/WDT_LED#
E51INT0/GPIO55/SCROLED#
E51TMR1/GPIO53/CAPSLED#
E51INT1/GPIO56
EXTSMI#
SDA1/GPIO47
SCL1//GPIO46
SDA0/GPIO45
SCL0/GPIO44
SML1DATA
SML1CLK
80
79
78
77
GPXIOA00/SDICS#
GPXIOA01/SDICLK
GPXIOA02/SDIMOSI
GPXIOA03
GPXIOA04
GPXIOA05
GPXIOA06
GPXIOA07
GPXIOA08
GPXIOA09
GPXIOA10
GPXIOA11
GPXIOD0/SDIMISO
GPXIOD1
GPXIOD2
GPXIOD3
GPXIOD4
GPXIOD5
GPXIOD6
GPXIOD7
109
110
112
114
115
116
117
118
MISO
MOSI
SPICLK/GPIO58
SPICS#
change to DG
By Johan 071224
119
120
126
128
XCLK32K/GPIO57
XCLKI
XCLKO
121
122
123
113
94
35
24
11
69
add 0 OHM
SML1DATA
SML1CLK
SM_BAT_SDA2
SM_BAT_SCL2
R650
4.7K
R0402
3G_OFF
ALW_PWROK
PCB_Mark0
PCB_Mark1
PCB_Mark2
R250
10K
{32}
10K
PCIE_WAKE#_EC
R282
10K
PM_STATE
R665
10K
PM
ALT_ON
R270
10K ns
C
R235
10K
ns
R236
10K
Fuction P.M2 P.M1 P.M0
R251
10K
VerA
VerB
0
0
Verc
EC_32XCLK1
EC_32XCLK0
R602
BATT_IN#
BKLT_ON
VTT_PWG
4.7K
R611
4.7K
R252
10K
ns
4.7K
R0402
SPI_CS#
1
EC_SPI_MISO 2
WP#1
3
VSS
4
CS#
Q
W#
VSS
VCC_SPI
R603 0
HOLD#1
R601
R0603
4.7K
SPI_SCK
R0402
EC_SPI_MOSI
EC_V3.3AL
EC_V3.3AL
LABEL1
Topstar Soft
BIOS Ver: X.XX
EC Ver: X.XX
XXXXXXXX
EC/BIOS Label
W25X80A
{47}
{32}
ASSY
SOIC8_50_208
VCC_SPI
VDD
WP#1
WP#
HOLD#1
{50,53}
SI
SO
CE#
SCK
5
2
1
6
VSS
HOLD#
EC_SPI_MOSI
EC_SPI_MISO
SPI_CS#
SPI_SCK
VSS
W25X40
ns
SO8_50_150
B
R325
10K
R0402
R0402
VerB Colay tow roms
EC_RESET#
Q24
MMBT3904-F
C261
R338
0
R0402
0.01uF/16V,Y5V
C0402
ns
R345
10K
R0402
R0402
C225
EC_PCI_RST#
EC_32XCLK0
R606
10K
R0402
ns
R269
121K,1%
C241
8
7
6
5
VCC
HOLD#
CLK
D
EC_V3.3AL
ns
0 R607
EC_BUF_PLT_RST#
U27
100
R0402
R609
change vera to verb hads
EC_SPI_MISO
EC_SPI_MOSI
SPI_SCK
SPI_CS#
R258
10M
R0402
1
2N7002E-T1C0402
1000pF/50V,X7R
C0402
Y2
32.768KHz
xd3_2X6
3
ASSY
15pF/50V,NPO
C224
R319
R257
BIU configuration should match flash speed used
{40}
{48}
EC_V3.3AL
EC_BUF_PLT_RST#
R0402
ns
{36,39,48} PWR_SW_VCC2
10K
BAT_LOW#
PCB_Mark0
PCB_Mark1
PCB_Mark2
R604
5.6K
R288
10K
R234
10K
ns
BT_ON
+V3.3AL
PWRSW#
Q21
R255
CHG_LED#
{45}
BTL_LED#
{45}
PM_PWRBTN# {24}
AMP_SHDW
{37}
R0603
C242
5.6K
R289
LIDR#
CHG_ON
{54}
3G_LED#
{40,45}
HW_RATIO_OFF_3G# {40}
HW_OFF_BKLT# {32}
AC_OFF
{46}
EC_GPU_RST# {17}
HW_OFF_BKLT#
ns
100pF/50V,NPO
R287
SM_BAT_SCL2
GPXIOA00
+V3.3AL
R295
10K
R0402
{27}
C270
4.7UF/10V,Y5V
C0805
PM_SLP_S4#
C247
GPXIOA00
R340
+V3.3AL
SM_BAT_SDA2
+V3.3AL
+V3.3S
R299
0
10K
10K
10K
10K
{38}
ALW_ACK {24}
KB3926
The 0ohm RES will across the isolate

island of anolog GND and digital GND
100pF/50V,NPO
R274
0
{23}
{23}
{47}
{47}
{24} EC_IMVP_PWRGD
PM_SLP_S3#
FAN_BACK
SOD323
GND
GND
GND
GND
GND
AGND
R308
100K
TPCLK
{36}
TPDAT
{36}
BT_PWRON {38}
HW_RATIO_OFF# {39}
VGPU_ON
{52}
PM_STATE
97
98
99
100
101
102
103
104
105
106
107
108
CLK
{24}
90
30
31
92
93
91
95
PM
83
84
85
86
87
88
1 D12
1N4148WS
V3G_1.05G_ON {57}
FAN1_V
{38}
Camera_ON
{32}
R593
R248
R249ns
R583ns
ns
ns
U28
8051
PROCHOT#
{39} EC_DEBG_UTXD
{39} EC_DEBG_URXD
{21,33} GPU_HDMI_HPD
{52} VGACORE_PWRGD
AMP_SHDW
R0402
SPI_CS#
EC_SPI_MOSI
EC_SPI_MISO
SPI_SCK
ns
SPI
ns
1K
R273
0
R254
10K
swap for DG
By Johan 071224
EC_FAN_BACK
R303
ns
GPXIOD
{24} PM_SUS_STAT#
KSI7/GPIO37
KSI6/GPIO36
KSI5/GPIO35
KSI4/GPIO34
KSI3/GPIO33
KSI2/GPIO32
KSI1/GPIO31
KSI0/GPIO30/E51_TXD(ISP)
EC_PMSUSStat#
6 GPIO04
0
ns PCIE_WAKE#_EC
14 GPIO07/i_clk_8051
15 GPIO08/i_clk_peri
{21,46}
AC_IN
16 GPIO0A/CIR_RX2
{24,53} PM_RSMRST#
R290
1K
17 GPIO0B/ESB_CLK
{32,36}
LIDR#
PWRSW# R294 1K
18 GPIO0C/ESB_DAT_O/ESB_DAT_I
19 GPIO0D
{24,41,53} PM_SLP_S3#
32 GPIO18
{24,41,56} PM_SLP_S4#
R3351.5K,1% R0402
36 GPIO1A/NUMLED#
{8} CPU_VTT_PWG
EC_IR_IN
73
EC_IMVP_ON 74 GPIO40/CIR_RX
R291 0
{55}
IMVP_ON
GPIO41/CIR_RLC_TX
89 GPIO50
{38}
ALT_ON
127 GPIO59/TEST_CLKSPICLKI
{49} V1_5_ON
EC_PMSUSStat#
R272
68
{48} ALWAYS_ON
GPO3C
70 GPO3D
{56}
MAIN_ON
71 GPO3E
{50} V1_1S_VTT_ON
72 GPO3F
{49} V0_75S_ON
{24,39,40,41,44}
R281
62
61
60
59
58
57
56
55
GPXIOA
R292
R298
SCANIN0
SCANIN1
SCANIN2
SCANIN3
SCANIN7
SCANIN6
SCANIN5
SCANIN4
SCANIN3
SCANIN2
SCANIN1
SCANIN0
SET_I
3300pF/50V,X7R
C0402
+V3.3AL
SMBUS
+V3.3AL
EC_PCI_RST#
CLKREQ
CLKREQ
{37}
POWERLED# {45}
{54}
EC_BKLT_PWM {32}
R339
4.7K R0402
SCANOUT15
SCANOUT10
SCANOUT11
SCANOUT14
SCANOUT13
SCANOUT12
SCANOUT3
SCANOUT6
SCANOUT8
SCANOUT7
SCANOUT4
SCANOUT2
SCANIN7
SCANOUT1
SCANOUT5
SCANIN4
SCANIN5
SCANOUT0
SCANIN2
SCANIN3
SCANOUT9
SCANIN1
SCANIN0
SCANIN6
BTL_BEEP
+V3.3AL
PS2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+V3.3AL
C271
FAN
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
28 6
27 5
4
3
2
1
PCICLK
SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCIRST#/GPIO05
CLKRUN#/GPIO1D
GPIO
KBCON1
ACES 85201-2602
CNS26_1_R_2D5
12
3
4
10
8
7
5
13
38
KB3926
{26} CLK_591PCI
{22,38} INT_SERIRQ
{22,38,40} LPC_FRAME#
{22,38,40} LPC_AD0
{22,38,40} LPC_AD1
{22,38,40} LPC_AD2
{22,38,40} LPC_AD3
LPC
EC_BUF_PLT_RST#
R0402
KB
R608
BUF_PLT_RST#
10K
10K
10K
10K
GM
{54}
SYS_I_Sense
{8,17,26,38,39,40,41,44}
R334
R315
R312
R664
CHG_ON R253
10K
ALW_PWROK need move to other
place.pin110&111 follow the
sequence of R18EC
U14
VCC
VCC
VCC
VCC
VCC
VCC
RCIN#
111
96
33
22
9
125
ns
H_RCIN#
C403
0.1UF/25V,Y5V
V18R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
124
{27}
C245
Q20
2N7002E-T1
R318
10K
EC_V3.3AL
+V3.3AL
1N4148WS
SOD323
+V5S
67
D9
+V3.3S
R630
0
R0805
A20GATE
3
ns
AVCC
{27} H_A20GATE
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,44,45,49,50,51,52,53,55,56,57,58}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,44,45,46,47,48,49,50,52,53,56,57}
{23,25,29,32,33,34,35,36,37,38,51,52,55,56}
Q19
2N7002E-T1
R342
8.2K
+V3.3S
+V3.3AL
+V5S
1M
EC_32XCLK1
C0402
R0402
15pF/50V,NPO
+V5S
Q17
2N7002E-T1
EC Input Signal!
A
{8} EC_PROCHOT#
R268
R302
3
0
PROCHOT#
ns
R0603
TOPSTAR TECHNOLOGY
bent
Page Name
KBC(PC87541L)
Size Project Name

Custom
C46
Rev
A

43
59
Date:
Sheet
of
5
100M Lan(RTL8101E/8102E)
RTL8101E
VerD:LAN Delete Caps and change

some options followed demo
board and colay 8102E
By K' 080522
BUF_PLT_RST#
C57
C0402
{24,39,40,41,43}
C326
PCIE_WAKE#
+V3.3S
R442
1K
R0402
8101E
R443
8101E
15K
R0402
R410
R68
8101E
R0805
EVDD18
C70
C0402
0.1UF/25V,Y5V
C74
C0402
0.1UF/25V,Y5V
C62
C0805
1uF/25V,Y5V
8101E
8102E
R395
Layout Note:
Place close to
EVDD18 PINS.
(PIN22,PIN28)
C69
C0603
1uF/10V,Y5V
8101E
DVDD15
2.49K,1% R0402
8102E
2K,1%
R0402
8101E
RSET
C67
C0402
0.1UF/25V,Y5V
8101E
CS
SK
DI
DO
8
7
6
5
VCC
NC1
NC2
GND
C92
C0402
0.1UF/10V,X7R
48
47
45
44
28
22
AVDD18_04
AVDD18_03
AVDD18_02
AVDD18_01
14
11
8
5
FB12
VCTRL15
VCTRL18
63
1
DVDD15
CTRL18
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
3
4
6
7
9
10
12
13
LAN_TX0+
LAN_TX0LAN_TX1+
LAN_TX1-
CKTAL2
CKTAL1
61
60
LAN_XTALOUT
LAN_XTALIN
PERSTB
LANWAKEB
36
ISOLATEB
54
55
56
57
LED3
LED2
LED1
LED0
64
RSET
62
GVDD
RTL8101E-GR
EESK
EEDI
EEDO
EECS
58
33
52
49
43
41
38
32
21
15
VDD15_08
VDD15_07
VDD15_06
VDD15_05
VDD15_04
VDD15_03
VDD15_02
VDD15_01
EVDD18_02
EVDD18_01
HSIP
HSIN
HSOP
HSON
19
0.1UF/25V,Y5V
8101E
REFCLK_P
REFCLK_N
EVDD18
AVDD18
C59
C0402
0.01uF/25V,X7R
Layout note:
0.01uf caps need to be
placed close to PIN5
VerC:Add 0.01uF followed demo

for better EMI performance
by Robin 080417
Y3
25MHz
1
2
XS2_3d3
C323
C0402
27pF/50V,NPO
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
{8,17,26,38,39,40,41,43}
23
24
C324
C0402
29
C0402
0.1UF/10V,X7R 30
0.1UF/10V,X7R
20
51
50
42
40
39
35
34
18
17
26
27
PCIE_TXP1_LAN
PCIE_TXN1_LAN
PCIE_RXP1_LAN
PCIE_RXN1_LAN
RTL8111B/RTL8101E1.8V
RTL8111C1.2V
U23
59
2
1.2V
VDD15_10
VDD15_09
1.5V
AVDD33_02
AVDD33_01
DVDD15
1
EESK 2
EEDI/AUX 3
4
U24
AT93C46-10SU-2.7
SO8_50_150
53
46
37
16
1.2V
{23}
{23}
{23}
{23}
0 R0805
C58
C0402
0.1UF/25V,Y5V
1.2V
1.8V
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
AVDD18
C54
C55
C0805
C0402
0.1UF/25V,Y5V
10UF/6.3V,X5R
1.8V
EVDD18
{23} PCIE_GLAN_CLKP
{23} PCIE_GLAN_CLKN
FB12
CTRL18
FB2
AVDD18
G1
G2
G3
G4
G5
G6
G7
G8
G9
VerC:Delete Caps followed

demo board by Robin 080418
DVDD15
EECS
Layout Note:
Place close to AVDD33 PINS.
(PIN2)
Layout Note:
Place close to AVDD18 PINS.
(PIN5,PIN8)
C91
0.1UF/25V,Y5V
C0402
VDD3D3_LAN AVDD33
3.3V
EEDO
AVDD33
RTL8102E
3.3V
AVDD33
VDD33_04
VDD33_03
VDD33_02
VDD33_01
C61
C56
C73
C84
C0402
C0402
C0402
C0402
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
Power domain chart
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,45,46,47,48,49,50,52,53,56,57}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,45,49,50,51,52,53,55,56,57,58}
R109 3.6K R0402
VDD3D3_LAN
VDD3D3_LAN
VDD3D3_LAN
FB3
120ohm/100MHz,500mA
1
2FB0603
10K is used only
R108 10K
R0402
when 93C56 is
used.
ns
EGND1
EGND2
VDD3D3_LAN
+V3.3AL
+V3.3S
+V3.3AL
Layout Note:
Place close to VDD33_LAN PINS.
(PIN16,PIN37,PIN46 and PIN53)
25
31
C322
C0402
27pF/50V,NPO
DVDD15
C68
0.1UF/25V,Y5V
C0402
C83
0.1UF/25V,Y5V
C0402
C71
0.1UF/25V,Y5V
C0402
Layout Note:
place close to IC
TP1
ns
ns
Layout Note:
place close to transformer
LAN_TX0-
LAN_TX0+
Layout Note:
Place close to DVDD15 PINS
(PIN15,PIN21,PIN43,PIN49 and PIN58)
LAN_TX1+
8101E
C97
330PF/50V,X7R
C0603
4.7uF/10V,Y5V
C0805
330PF/50V,X7R
C0603
330PF/50V,X7R
C0603
DVDD15
R394
49.9,1%
R0402
8101E
C80
0.1UF/25V,Y5V
C0402
R393
49.9,1%
R0402
8101E
C103
C319
C314
C317
C0402
0.01UF/25V,Y5V
8101E
IO_CASE_GND
VDAC
R390
R0402
8101E
U9
1
3
5
7
TRAN16_50_272
13
12
IH1
HOLE
TH_315_118
ns
C315
C0402
0.01UF/25V,Y5V
LAN_TX0-
N2
N1
TD-
TX-
11
TDC
CMT
MCT5
TD+
TX+
TX0+
RD-
RX-
TX1MCT6
TX1+
10
LAN_TX1-
15
IO_CASE_GND
B
14
RDC
RXC
16
RD+
RX+
4
3
2
1
RJ45_TX1RJ45_TX1+
RJ45_TX0RJ45_TX0+
5
6
7
8
ns
90ohm@100MHz
CMC8
L2+
L2L1+
L1-
RJ1
RJ45
RJ45_S
RJ45
CHK3
TX1TX1+
TX0TX0+
C316
0.01UF/25V,Y5V
C0402
8101E
RN3
0x4
RA0603_8
2
4
6
8
5
4
TX0-
LAN_TX0+
LAN_TX1+
C318
C0402
0.01UF/25V,Y5V
N4
N3
1CT:1CT
VDAC
1CT:1CT
IO_GND
R391
49.9,1%
R0402
8101E
L3+
L3L4+
L4-
RJ45_TX0+
RJ45_TX0RJ45_TX1+
RJ45_TX2+
RJ45_TX2RJ45_TX1RJ45_TX3+
RJ45_TX3-
1
2
3
4
5
6
7
8
TX0+
TX0TX1+
TX2+
TX0+
TX0TX1+
TX2+
TX2TX1TX3+
TX3-
TX2TX1TX3+
TX3-
10
GND
R392
49.9,1%
R0402
8101E
AVDD18
B
LAN_TX1-
C82
0.1UF/25V,Y5V
C0402
ICTP
C60
0.1UF/25V,Y5V
C0402
ICTP
TP2
C85
10UF/6.3V,X5R
C0805
Layout Note:
Colay CHOCK AND RN
IO_CASE_GND
IO_CASE_GND
D3
AZC099-04S
SOT23_6
ns
RJ45_TX1-
RJ45_TX0+
MCT5
MCT6
RJ45_TX2+
RJ45_TX2RJ45_TX3+
RJ45_TX3-
R125
R122 R115 R107 R91
R90
75
75
75
75
75
75
R0402 R0402 R0402 R0402 R0402 R0402
RJ45_TX0-
C86
C1206
1000pF/2000V
RJ45_TX1+
IO_CASE_GND
IO_CASE_GND
Topstardigital
bent
Page Name
PWR/Lan/USB/RJ45 Board
Size
C
C46
Project Name
Rev
A

44
59
Date:
Sheet
of
to others or used for any purpose other than that for which it was obtained with the
expressed written consent of TOPSTAR
5
+V3.3S
{39} WIRELESS_LED#
WIRELS1
2
{40,43} 3G_LED#
3G_LED1
2
{22} SATA_LED#
HDD1
2
BL-HGB35A-TRB
1
LED2_0805
R648
+V3.3S
+V3.3AL
220
R0402
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,49,50,51,52,53,55,56,57,58}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,46,47,48,49,50,52,53,56,57}
Blue color
D
BL-HGB35A-TRB
1
LED2_0805
3G+
BL-HGB35A-TRB
1
LED2_0805
IDE+
C434
1000pF/50V,X7R
C0402
C433
1000pF/50V,X7R
C0402
R649 220
3G R0402
SATA_LED#
ESD4 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
R647
WIRELESS_LED#
ESD5 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
CHARGE_LED
ESD1 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
BAT_STATE_LED
ESD2 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
PWR_LED
ESD3 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
150
R0402
1000pF/50V,X7R
C432
C0402
+V3.3AL
S46/LED
CHARGE1
G
{43} CHG_LED#
{43}
BTL_LED#
220 R0603
R642
220 R0603 BAT_STATE_LED 4
Blue Color
C431
0.1UF/10V,X7R
C0402
R
3
Red color
{43} POWERLED#
CHARGE_LED 2
R641
R645
220 R0603
BAT_STATE_LED
C426
1000pF/50V,X7R
C0402
CHARGE_LED
C425
1000pF/50V,X7R
C0402
PWR_LED
C427
1000pF/50V,X7R
C0402
HA1GE33B AMB/GREEN
LED4_1210A
POWER1
PWR_LED
2
1
BL-HGB35A-TRB
LED2_0805
S46/LED4LEDLEDBlue
TOPSTAR TECHNOLOGY
bent
Page Name
LED&Touch PAD&QuickButton
Size
C
C46
Project Name
Rev
A
Date:
Sheet
45
59
of
5
+VDC
+V3.3AL
AD+
BATT+
{32,40,48,49,50,51,52,55,56,57}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,47,48,49,50,52,53,56
{36,48}
{47,54}
AD++
PD28
SSM34PT
SMA
S_Bot
1
{54} Isense_SYSN
Co-lay.
PQ41
AO4419
SO8_50_150
1S_Bot
2
3
S
D
G
8
7
6
5
0.025,1%
R2512
S_Bot
PQ40
D
AO4419
SO8_50_150
S_Bot
1
1N4148WS
SOD323
S_Top
AD+
PR222
4A
1
2
3
PR11
51K
R0402
S_Top
PD3
PC9
0.01UF/25V,X7R
C0402
ns
S_Top
PC139
0.1UF/25V,X7R
C0603
S_Bot
PC11
1000pF/50V,X7R
C0402
S_Top
8
7
6
5
PR15
51K
R0402
S_Top
PD2
{36,54} Isense_SYSP
PD29 SBM54PT
SMB
1
ns
S_Bot
18.5-19V/4A
4A
AD+
1N4148WS
SOD323
S_Top
PR12
51K
R0402
S_Top
VCC393
AC_OFF#
PQ1
2N7002
SOT23
S_Top
PU1A
LM393
SO8_50_150
S_Top
PR14
51K
R0402
S_Top
4A
2
8
3
C-
C+
PR13
51K
R0402
S_Top
PR10
10
R0402
S_Top
PC10
C0402
1000pF/50V,X7R
S_Top
+V3.3AL
PR18
AC_OFF#
PD1
BAT54C
SOT23
S_Top
PR9
10K
R0402
ns
S_Top
PR35
0
R0402
PC8
0.01uF/25V,X7R
C0402
S_Top
AD++ S_Top
ns
0 R0402
ns
PR37
51K
R0402
S_Top
PR22
2K,1%
R0402
S_Top
49.9k,1%
R0402
S_Top
AC_OFF
1battery learning
2S0EC
ECAC_OFF
PR25
10K
S_Top
PQ2
2N7002
SOT23
S_Top
{43}
AD+
PR23
15K,1%
R0402
S_Top
BATT+
PC16
0.01UF/25V,X7R
C0402
ns
S_Top
PR17
49.9k,1%
R0402
S_Top
PR16
15K,1%
R0402
S_Top
VB:Add PC212.
C+
C-
PR21
S_Top
PC12
0.1uF/10V,X7R
C0402
S_Top
PQ3
2N7002
SOT23
S_Top
PU1B
LM393
SO8_50_150
S_Top
{53}
PR40
51K
R0402
S_Top
300K
R0402
S_Top
PR29
300K
R0402
ns
S_Top
PR44
10K
R0402
S_Top
PR46
51K
R0402
S_Top
PR31
PR36
100K
R0402
S_Top
PQ4
MMBT3904-F
SOT23
S_Top
PQ6
2N7002
SOT23
S_Top
SHDN#
PR33
100K
R0402
S_Top
BATT+
+VDC
9V-19V/6A
VCC393
8
7
6
5
VDC1
TestP
ns
TPC60
S_Bot
PR32
51K
R0402
S_Top
PR30
10
R0402
S_Top
2
3
PR45
51K
R0402
S_Top
AD+
PQ43
D
AP4407
SO8_50_150
S_Bot
PR28
1K
R0402
S_Top
PR7
2K
R0402
S_Top
1
2
3
BATT+
{21,43}
6A
PC20
1000pF/50V,X7R
C0402
S_Top
9-12.6V/6A
AC_IN
PR27
20K
R0402
S_Top
8
7
6
5
PQ44
AP4407
SO8_50_150
1S_Bot
2
3
S
D
G
PQ5
2N7002
SOT23
S_Top
1
PR39
51K
R0402
S_Top
PD4
SSM34PT
SMA
S_Top
1
PR42
75K
R0402
S_Top
AD+
PR49
51K
R0402
S_Top
PC212
0.22uF/10V,X7R
C0603
S_Top
PC29
1000pF/50V,X7R
C0402
S_Top
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
ADAPTER IN
M12
Rev
B
Date:
Sheet
46
59
of
6A
BATT+
PC14
{43} SM_BAT_SDA2
{43} SM_BAT_SCL2
PC6
0.1uF/25V,X7R
PFB1
100ohm@100MHz,3A C0603
S_Top
1
2
S_Top
FB0805
PFB2 100ohm@100MHz,3A
1
2
S_Top
PC7
PF1
FB0805
0.1uF/25V,X7R
8A
PFB3
C0603
ns
FUSE1206
S_Top 2
1
2
1
S_Top
100ohm@100MHz,3A
1000pF/50V,X7R
FB0805
C0402
S_Top
S_Top SM_BAT_SDA2
PR4
100
SM_BAT_SDA
R0402
S_Top
SM_BAT_SCL2
100
SM_BAT_SCL
PR3
R0402
S_Top
PC5
0.1uF/25V,X7R
C0603
ns
S_Top
BATCON1
6A
BATT+
SDAT
SCLK
BATT+
AD+
+V3.3AL
KEY
TEMP
BAT_IN#
GND
GND
+V3.3AL
+V3.3AL
BAT54SPT
S_Top
6A
9
PC3
0.1uF/25V,Y5V
C0402
S_Top
SM_BAT_SCL2
GND_BAT
PR2
300K
R0402
S_Top
PR1
R0402
1K
SK-C103A3-100A
+V3.3AL
PC2
5.6pF/50V,NPO
C0402
S_Top
BAT54SPT
S_Top
SM_BAT_SDA2
PC4
5.6pF/50V,NPO
C0402
S_Top
{46,54}
{36,46,48}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,48,49,50,52,53,56,57}
BATT_IN#
3
1
PZD2
SM_BAT_SDA
PC1
0.1uF/25V,Y5V
C0402
S_Top
SM_BAT_SCL
1
PZD1
{43}
S_Top
,240mils.
PR6
0 R0402
PR5
S_Top
0 R0402
PR8
0 R0402
GND_BAT
S_Top
S_Top
GND_BAT
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
BATTERY IN
M12
Rev
B
Date:
Sheet
47
59
of
+V3.3AL
+VDC
AD+
+V5AL
EC_RTC
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,49,50,5
{32,40,46,49,50,51,52,55,56,57}
{36,46}
{29,32,36,49,50,53,56}
{22}
1.MOSFET
+V3.3AL
D
PR210
10K
R0402
S_Top
GND_TPS51125
2.MOSIC
3.Thermal
GND5,
4.
+VDC
{43} ALW_PWROK
+VDC
2A
2A
VCLK
GND1
G1
PR308
0
R0402
S_Bot
1K
ns
S_Top
EN0_AL
PR213
100K
R0402
ns
S_Top
S_Top
GND_TPS51125
VREG5
PR211
30K
R0402
ns
S_Top
PQ37
2N7002
SOT23
S_Top
PR214
30K
R0402
S_Top
PC122
0.1uF/10V,X7R
C0402
ns
1
S_Top
PR216
4.7K
R0402
S_Top
S_Top
PR212
10K
R0402
S_Top
PC129
1000pF/50V,X7R
C0402
S_Top
PZ4
BZT52C5V6S-F/5.6
SOD323
S_Top
PC216
CT7343_19
S_Top
220UF/2.5V,POSCAP
PC208
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
PC132
1000pF/50V,X7R
C0402
S_Top
B
PR205
1K
R0402
S_Top
PR217
1K R0402
ns
VB:Always
PC127
10uF/6.3V,X5R
C0805
S_Top
PD31
1N5819
SOD123
S_Bot
PD30
Co-lay. SSM34PT
SMA
ns
S_Bot
5A
ns
PC126
0.022uF/16V,X7R
C0402
ns
GND_TPS51125
PD25
BAT54C
SOT23
S_Top
5A
VREG5
PC128
4.7uF/10V,X5R
C0805
S_Top
VREF
PR215
R0402
PD26
1N4148WS
SOD323
S_Top
+VDC
5
6
7
8
PQ72
AO4468
SO8_50_150
S_Bot
GND_TPS51125
5A
PR220
2.2
R0805
S_Top
5
6
7
8
4
18
VREG5
17
VIN
16
15
GND_TPS51125
14
GND2
GND
SKIPSEL
D
S
1
2
3
G2
PR310
0
R0402
S_Bot
+V5AL
S_Bot
LL2
PC121
0.22uF/10V,X7R
C0603
S_Top
19
PR219
10K
R0402
S_Top
PR206
15K
R0402
S_Top
DRVL1
S_Top
DRVL2
20
V5AL1
TestP
ns
TPC60
S_Bot
PC131
4.7uF/25V,X7R
C1206
S_Top
12
LL1
PL12
5.2uH/5.5A
LS2_1051
S_Bot
LL2
21
PR218
2.2 R0402
11
DRVH1
PC125
0.1uF/25V,X7R
C0603
S_Top
PU9
TPS51125
S_Top
DRVH2
PQ73
AO4468
SO8_50_150
S_Bot
4
1
PR207
100K
R0402
S_Top
22
PR309
3
AD+
ENTRIP1
VBST1
S_Bot
R0402
PQ74
AO4468
SO8_50_150
S_Bot
VBST2
{43} ALWAYS_ON
VREF
23
PC130
1000pF/50V,X7R
C0402
S_Top
{36,39,43} PWR_SW_VCC2
PGOOD
3
2
1
D
G
S
1
2
3
VREG3
24
PC209
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
4
1
PC215
CT7343_19
S_Top
220UF/2.5V,POSCAP
VO1
3
2
1
8
7
6
5
ns
PR221
2.2
R0805 PD27
S_Top
1N5819
SOD123
S_Top
GND_TPS51125
8
7
6
5
PZ5
BZT52C3V6S-F/3.6 PC133
SOD323
1000pF/50V,X7R
S_Top
C0402
S_Top
PR311
10K
R0402
S_Bot
PC155
10uF/ 25V,X7R
C1210
ns
S_Bot
PR204
200K
R0402
S_Top
PC134
4.7uF/25V,X7R
C1206
S_Top
5A
PL11
3.3uH/4.8A
LS2_8836
S_Bot
PC206
4.7uF/25V,X7R
C1206
S_Bot
+V3.3AL
PC124
0.1uF/25V,X7R
C0603
9
S_Top
PR312
2.2
R0402 10
VFB1
VREF
VO2
PC204
0.1uF/25V,X7R
C0603
S_Bot
PQ77
AO4468
SO8_50_150
4 S_Bot
ENTRIP1
EC_RTC
VFB2
S_Top
10uF/6.3V,X5R
C0805
S_Top
ENTRIP1
PC205
1000pF/50V,X7R
C0402
S_Bot
PR208
15K,1%
R0402
S_Top
PR203
R0402
200K
PC120
PR296
0
R0402
S_Bot
ENTRIP2
GND_TPS51125
PR202
10K,1%
R0402
S_Top
PC200
0.22uF/16V,X7R
C0603
S_Bot
PR209
5.11K,1%
R0402
S_Top
TONSEL
PC211
1000pF/50V,X7R
C0402
S_Bot
EN0
PC210
0.1uF/25V,X7R
C0603
S_Bot
PR201
7.68K,1%
R0402
S_Top
13
PC207
4.7uF/25V,X7R
C1206
S_Bot
V3R3AL1
TestP
ns
TPC60
S_Top
ENTRIP1
PC118
0.1uF/25V,Y5V
C0402
ns
S_Top
PR295
0
R0402
S_Bot
GND_TPS51125
PQ38
MMBT3904-F
SOT23
S_Top
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
+V3.3AL/+V5AL
Rev
B
C46
Date:
Sheet
48
59
of
5
+V0.75S
+V5AL
+V3.3AL
+VDC
+V1.5
+V1.8S
+V3.3S
{15,16,56}
{29,32,36,48,50,53,56}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,50,52,53,56,57}
{32,40,46,48,50,51,52,55,56,57}
{8,11,15,16,56,57}
{11,26,28,29,31,56,57}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,50,51,52,53
+V5AL
+V3.3AL
+VDC
SW
V5IN
DRVL
C0402
ns
S_Top
RF
PR95
470K
R0402
S_Top
Set
Fsw 290K
PR96
10K,1%
R0402
S_Top
5
6
7
8
9
4
PC52
4.7uF/10V,X5R
C0805
S_Top
PQ50
AO4706
SO8_50_150_PPAK
S_Bot
V1R5
TestP
TPC60
ns
S_Top
12A
PC55
0.1uF/10V,X7R
C0402
S_Top
+V1.5
12A
PC156
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
PC58
1000pF/50V,X7R
C0402
S_Top
PD11
SSM34PT
SMA
S_Top
8.2m ohm@4.5V/AO4706
4.3m ohm@4.5V/AOL1718
PR91
11.5K,1%
PL5
1.0uH/11A
LS2_6530
S_Bot
PC160
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
+
PR119
2.2
R0805
S_Top
PC37
0.022uF/16V,X7R
VFB
GND
R0402
S_Top
11
PR314
100K
PR231
0
R0402
S_Bot
PQ49
SI4892DY
SO8_50_150_PPAK
S_Bot
EN
0.7V
PR230
10K
S_Bot
4
PR229
2.2
R0402
S_Bot
2A
PC43
10uF/ 25V,X7R
C1210
S_Top
DRVH
TRIP
PC49
4.7uF/25V,X7R
C1206
S_Top
PC41
1000pF/50V,X7R
C0402
S_Top
10
VBST
PGOOD
PC53
0.1uF/25V,X7R
C0603
S_Top
V1_5_ON
3
2
1
PR97
147K,1%
R0402
S_Top
PC50
0.1uF/25V,X7R
C0603
S_Top
5
6
7
8
9
1
2
PJ2
JOPEN
RESISTOR_1
ns
S_Top
TPS51218
{43}
DDR_PWG
PR90
2K
R0402
S_Top
{53}
PR98
4.7K
R0402
S_Top
PR103
0
R0402
S_Top
3
2
1
PU4
tps51218
QFN10_0D5_0D8G
S_Top
PZ2
BZT52C2V0S-F/2.0V
SOD323
ns
S_Top
OCP>14A
+/-3.3% DC
5% DC+ AC Switcher
R0402
S_Top
PC38
0.022uF/16V,X7R
ns
C0402
PR92
20K
R0402
S_Top
S_Top
ns
PU10
APL5331
SOP8_1D27_4G
S_Bot
PC149
4.7uF/10V,X5R
C0805
S_Bot
GND
NC2
REFEN
VOUT
PR57
10K
R0402
S_Top
PC32
0.022uF/16V,X7R
C0402
ns
S_Top
PQ17
2N7002
SOT23
S_Top
3
2
PQ18
MMBT3904-F
S_Top
NC1
PC142
4.7uF/10V,X5R
C0805
S_Bot
+V3.3S
VIN
PC74
10uF/6.3V,X5R
C0805
S_Top
TPC60
TestP
V0_75S1
ns
S_Bot
VCNTL
+V3.3AL
1N4148WS
SOD323
1 ns
S_Top
VOUT
Vo
1A Max
2
4
PU6
APE1117C
SOT223
S_Top
V1R8S1
TestP
TPC60
ns
S_Top
+V1.8S
1A
PR140
220
R0402
S_Top
PC57
10uF/6.3V,X5R
C0805
S_Top
PC60
10uF/6.3V,X5R
C0805
S_Top
PC71
10uF/6.3V,X5R
C0805
S_Top
PR141
100,1%
R0402
S_Top
PR142
1K
R0402
ns
S_Top
PR55
4.7K
R0402
S_Top
PR56
30K
R0402
ns
S_Top
PR53
2K,1%
R0402
S_Top
PC148
0.1UF/10V,X7R
C0402
+V3.3AL S_Bot
{43} V0_75S_ON
NC3
PR54
2K,1%
R0402
S_Top
VIN
ADJ/GND
PD15
PGND
PC147
0.1UF/10V,X7R
C0402
S_Bot
1A-2A
+V1.5
+V0.75S
PC150
10uF/6.3V,X5R
C0805
S_Bot
PC151
10uF/6.3V,X5R
C0805
S_Bot
1A-2A
2A Max
+/-15mV DC
+/-65mV DC+AC Linear
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
+V1.8/+V0.9S DDR
M12
Rev
B
Date:
Sheet
49
59
of
+VDC
+V3.3S
+V5S
+V1.05S
+V1.5S
+V3.3AL
+V5AL
+V1.1S_VTT
+V5AL
+V3.3S
{32,40,46,48,49,51,52,55,56,57}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,51,52,53,55,56,57,58}
{23,25,29,32,33,34,35,36,37,38,43,51,52,55,56}
{22,23,24,28,29,56,57,58}
{39,40,41,56}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,52,53,56,57}
{29,32,36,48,49,53,56}
{8,10,11,27,28,29,38,51,55}
+VDC
18-20A
2
PC166
C0402
0.1uF/10V,X7R
S_Bot
+
PC157
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
+V1.1S_VTT
5
6
7
8
9
3
2
1
11
5
6
7
8
9
8.2m ohm@4.5V/AO4706
4.3m ohm@4.5V/AOL1718
V1_1SVTT1
TestP
TPC60
ns
S_Bot
PZ7
BZT52C2V0S-F/2.0V
SOD323
ns
S_Bot
ICCmax=23A
+/-2% DC,
3% AC+ripple Switcher
PC158
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
4.99K,1%
S_Top
PQ7
2N7002
SOT23
S_Top
PD8
SBM54PT
SMB
ns
S_Top
20A
PD7
SSM34PT
SMA
S_Top
PR59
R0402
PR58
71.5K,1%
R0402
S_Top
PQ47
AO4706
SO8_50_150_PPAK
S_Bot
PR88
0
R0603
S_Top
S_Top
0.7V
PR76
R0402
47K
S_Top +V3.3S
PR77
R0402
PR82
10K,1%
R0402
S_Top
PR60
20K
R0402
ns
S_Top
PR89
2.2
R0805
+
S_Top
PC36
1000pF/50V,X7R
C0402
S_Top
PC34
0.022uF/16V,X7R
C0402
ns
PQ46
AO4706
SO8_50_150_PPAK
S_Bot
PR81
470K
R0402
S_Top
Set Fsw 290K
PC145
4.7uF/10V,X5R
C0805
S_Bot
DRVL
1.0uH/18A
LS2_1040
S_Bot
Co-lay.
3A
PC152
10uF/ 25V,X7R
C1210
S_Bot
PC161
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
PL4
RF
PQ45
AOL1426
SO8_50_150_PPAK
S_Bot
S_Top
PC146
10uF/ 25V,X7R
C1210
S_Bot
PR93
0
R0603
S_Top
V5IN
PR87
10K
S_Top
PC144
1000pF/50V,X7R
C0402
S_Bot
VFB
PR86
2.2
R0603
S_Top
R0402
S_Top
SW
EN
PC33
0.022uF/16V,X7R
ns
C0402
DRVH
3
2
1
TRIP
PR315
100K
10
PC143
0.1uF/25V,X7R
C0603
S_Bot
5
6
7
8
9
{43} V1_1S_VTT_ON
VBST
PGOOD
GND
PR83
147K,1%
R0402
S_Top
PJ1
JOPEN
RESISTOR_1
ns
S_Top
PR61
2K
R0402
S_Top
PC35
0.1uF/25V,X7R
C0603
S_Top
3
2
1
TPS51218
VTT_PWG
PR84
4.7K
R0402
S_Top
PR85
0
R0402
S_Top
{43,53}
PU3
tps51218
QFN10_0D5_0D8G
S_Top
10K
1
2
PQ19
MMBT3904-F
S_Top
S_Top
VTT_SELECT {10}
1.05V/1.1V.
VTT_SELECT
High
Low
Arrandale:
Clarksfield:
Vo
1.05V
1.1V
PR78
100K
R0402
S_Top
ns
+V5AL
+V3.3AL
+VDC
Co-lay.
EN
SW
PR233
2.2
R0603
S_Bot
0.7V
VFB
V5IN
GND
PC73
4.7uF/10V,X5R
C0805
S_Top
11
PR136
200K
R0402
S_Top
Set Fsw
4
PQ26
AO4468
SO8_50_150
S_Top
5
6
7
8
22m ohm@4.5V/AO4468
340K
8A
+V1.05S
8A
+/-5% Switcher
Co-lay.
C0402
ns
PR134
10K,1%
R0402
S_Top
DRVL
PC64
0.022uF/16V,X7R
RF
R0402
S_Top
V1_05S1
TestP
TPC60
ns
S_Top
PD12
1N5819
SOD123
S_Top
PD13
SSM34PT
SMA
ns
S_Top
PR135
2.2
R0805
S_Top
PC63
1000pF/50V,X7R
C0402
S_Top
PR138
0
R0603
S_Top
S_Top
PL6
1.0uH/11A
LS2_6530 S_Bot
PR316
100K
PR232
10K
S_Bot
PC163
C0402
0.1uF/10V,X7R
S_Bot
PC162
220UF/6.3V,OSCON
CAP6_6x7_3
S_Bot
DRVH
PC70
10uF/ 25V,X7R
C1210
S_Top
TRIP
PC69
4.7uF/25V,X7R
C1206
ns
S_Top
10
PC62
1000pF/50V,X7R
C0402
S_Top
VBST
3
2
1
PGOOD
{43} V1_1S_VTT_ON
5
6
7
8
PR132
270K
R0402
S_Top
PC66
0.1uF/25V,X7R
C0603
S_Top
PJ3
JOPEN
RESISTOR_1
ns
PQ51
AO4468
SO8_50_150
S_Bot
4
2A
PR124
2K
R0402
S_Top
PC72
0.1uF/25V,X7R
C0603
S_Top
3
2
1
TPS51218
V1.05S_PWG
PR131
4.7K
R0402
S_Top
PR139
0
R0402
S_Top
{53}
PU7
tps51218
QFN10_0D5_0D8G
S_Top
PZ6
BZT52C2V0S-F/2.0V
SOD323
ns
S_Bot
TOPSTAR TECHNOLOGY
S_Top
bent
PR128
4.99K,1%
Page Name
R0402
Size
A3
S_Top
PC67
0.022uF/16V,X7R
ns
C0402
PR129
20K
R0402
S_Top
S_Top
ns
Project Name
+V1.5S/+V1.05S CHIPSET
M12
Rev
B
Date:
Sheet
50
59
of
PR243
2.2K
R0402
S_Bot
PR241 +V1.1S_VTT
2.2K
R0402
ns
S_Bot
PR240
2.2K
R0402
ns
S_Bot
PR246
2.2K
R0402
ns
S_Bot
{11} GFXVR_VID_0
+V1.1S_VTT
+V5S
+V3.3S
+VGFX
+VDC
+V3.3AL
{8,10,11,27,28,29,38,50,55}
{23,25,29,32,33,34,35,36,37,38,43,52,55,56}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,52,53,55,5
{11}
{32,40,46,48,49,50,52,55,56,57}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,49,50,52,53,56,57}
{11} GFXVR_VID_1
{11} GFXVR_VID_2
{11} GFXVR_VID_3
{11} GFXVR_VID_4
{11} GFXVR_VID_5
{11} VGFXVCCSEN
FB
PHASE
16
VSEN
UGATE
15
GND2
GND1
G2
G1
BOOT
IMON
13
VIN
12
ISUM+
VDD
11
10
ISUM9
PR153
0
R0402
S_Top
GND_ISL62881
PR161
R0402
100
PR239
R0402
PR163
R0402
1
S_Top
S_Top
GND_ISL62881
PR169
82.5,1%
R0402
S_Top
PC92
0.047uF/50V,X7R
C0603
S_Top
PC176
0.01uF/25V,X7R
C0402
S_Bot
PC96
PC91
0.01uF/25V,X7R
0.1uF/25V,X7R
C0402
S_Top
C0603
S_Top
PR180
4.02K,1%
R0402
S_Top
PR174
PC99
470pF/25V,X7R
100
C0402
R0402
ns
ns
S_Top
S_Top
PR249
10K,1%
R0402
S_Bot
PC175
0.1uF/10V,X7R
C0402
S_Bot
GND_ISL62881
VGFX_IMON1
TestP
TPC60
ns
S_Top
VGFX_IMON
+VGFX
S_Bot
1
PC164
PC165
PZ3
220UF/6.3V,OSCON 220UF/6.3V,OSCON BZT52C2V0S-F/2.0V
CAP6_6x7_3
CAP6_6x7_3
SOD323
S_Bot
S_Bot
ns
S_Top
{11}
+VDC
S_Bot
PC173
0.1uF/25V,X7R
C0603
S_Bot
GND_ISL62881
+V5S
GND_ISL62881
S_Bot
S_Bot
PD16
SSM34PT
SMA
S_Top
PC77
1000pF/50V,X7R
C0402
S_Top
VGFXVSSSEN {11}
PC213
0.22uF/10V,X7R
C0603
S_Top
ns
S_Top
PC89
0.22uF/10V,X7R
C0603
S_Top
PC174
1000pF/50V,X7R
C0402
S_Bot
PR159
22.1K,1%
R0402
S_Top
ns
Co-lay.
PD17
SSM54PT
SMA
ns
S_Top
PC87
0.22uF/16V,X7R
C0603
S_Top
PC88
0.22uF/10V,X7R
C0603
S_Top
14A
LL=7 mOhm
PC167
C0402
0.1uF/10V,X7R
3
2
1
PQ52
AOL1718
SO8_50_150_PPAK
S_Bot
VGFX2
TestP
TPC60
ns
S_Bot
PC172
1uF/10V,X7R
C0603
S_Bot
14A
PL7
1.0uH/11A
LS2_6530
17
VSSP
PR145
2.2
R0805
S_Top
1
18
5
6
7
8
9
LGATE
PR234
2.2
R0402
S_Bot
+V5S
PL8
Co-lay.
1.0uH/18A
LS2_1040 S_Bot
+VGFX
1
22
24
23
VID3
VID2
19
PR235
10K
S_Bot
PC95
10
VCCP
COMP
PC177
270pF/25V,X7R
C0402
S_Bot
GND_ISL62881
PR175
R0402
20
PR179
6.98K,1%
R0402
S_Top
PR252
10
R0402
S_Bot
PR253
0
R0402
S_Bot
PR251
R0402
VID4
25
VID5
26
VID6
VR_ON
S_Top
QFNS28_0D4_1G
VW
270pF/25V,X7R
C0402
S_Top
{11} VGFXVSSSEN
VID0
PU8
ISL62881
PR236
2.2
R0402
S_Bot
PC168
10uF/ 25V,X7R
C1210
S_Bot
+VGFX
21
PC100
100pF/50V,NPO
C0402
S_Top
PR178
75K
R0402
S_Top
GND_ISL62881
PR176
470K
R0402
ns
S_Top
PGOOD
R0402
3 RBIAS
S_Top
1000pF/50V,X7R
C0402
S_Top
R0402
250KHz
10K,1%
S_Top
PC94
3300pF/50V,X7R
C0402
S_Top
PR173
2.37K,1%
R0402
S_Top
2
47K
VID1
PQ53
AOL1426
SO8_50_150_PPAK
S_Bot
PR177
CLK_EN#
PC93
27
5
6
7
8
9
PR172
PC79
0.022uF/16V,X7R
C0402
ns
S_Top
PC170
10uF/ 25V,X7R
C1210
S_Bot
3
2
1
{53} GFXVR_PWRGD
10K R0402
S_Bot
28
PR170
2K
R0402
ns
S_Top
+VDC
2A
PR151
30K
R0402
ns
S_Top
PR250
ns
PR171
2K
R0402
S_Top
PC80
1000pF/50V,X7R
C0402
S_Top
0 R0402
DPRSLPVR
PQ29
MMBT3904-F
SOT23
S_Top
PR166
S_Top
1.05V/1.1V.
PQ30
2N7002
SOT23
S_Top
1
3
S_Top
VGFX_ON
PC90
0.022uF/16V,X7R
C0402
{11} GFXVR_DPRSLPVR
ns
S_Top
+V3.3S
PC78
0.1uF/25V,X7R
C0603
S_Top
GFXVR_EN
PJ4 JOPEN
RESISTOR_1
ns
1
2
PR237
0
R0402
ns
S_Bot
R0402
ns
S_Top
{11}
PR152
10K
R0402
S_Top
PR157
47K
R0402
S_Top
PR160
0
{11} GFXVR_VID_6
+V3.3AL
RTN
PR248
4.7K
R0402
S_Bot
14
+V3.3S
PR247
2.49K,1%
R0402
S_Bot
PR244
R0402
3.57K,1%
S_Bot
PR143
10K,1%
R0603
S_Top
NTC thermistor
2510K
603.05K
801.71K
TOPSTAR TECHNOLOGY
Page Name
Size
A3
Project Name
+V1.5AL
C46
Rev
B
Date:
Sheet
51
59
of
+VGA_CORE
+VDC
+V3.3S
+V3.3AL
+V5S
+V3.3GPU
PC42
0.1uF/10V,X7R
C0402
PM
S_Top
+V5S
+VDC
PC44
PHASE
16
14
SET0
VO
13
SET1
FB
12
10
SET2
PGOOD
11
PR114
220K
R0402
PM
S_Top
GND_62872
PR109
R0402
PM
GND_62872
PR100
0 R0402
PM
PD9
SSM54PT
SMA
ns
S_Top
PC56
3300pF/50V,X7R
C0402
PM
S_Top
100,1%
+VGA_CORE
PC47
1000pF/50V,X7R
C0402
PM
S_Top
+VGA_CORE
PC51
0.047uF/50V,X7R
C0603
PM
S_Top
9.31K,1%
PR107 R0402
PM
S_Top
PC159
220uF/2.5V,POSCAP
CT7343_19
PM
S_Bot
PZ1
BZT52C2V0S-F/2.0V
SOD323
ns
S_Top
VGA_CORE1
TestP
TPC60
ns
S_Top
GC2
220uF/2.5V,POSCAP
CT7343_19
PM
S_Top
S_Top
PR115
10K
R0402
PM
S_Top
+V3.3S
PQ48
AOL1718
SO8_50_150_PPAK
PM
S_Bot
OCSET
PD10
SSM34PT
SMA
PM
S_Top
13A
13A
PR105
9.31K,1%
R0402
PM
S_Top
SREF
15
S_Top
PM
PR113
45.3K,1%
R0402
PM
S_Top
NC
VID0
PR228
2.2
R0402
LGATE
PM
500mA S_Bot
500mA
NVVDD_SENSE {17}
PR117
10
R0402
PM
S_Top
VID1
PC39
1000pF/50V,X7R
C0402
PM
S_Top
500mA
S_Top
PC154
10uF/ 25V
C1210
PM
S_Bot
17
PR94
2.2
R0402
PM
S_Top
PC153
10uF/ 25V
C1210
PM
S_Bot
PL2
1.0uH/11A
LS2_6530
Co-lay.
ns 1
S_Bot
PL3
1.0uH/18A
LS2_1040
PM
1
S_Bot
PQ20
AOL1426
SO8_50_150_PPAK
PM
S_Top
PR102
2.2
R0805
Co-lay.
PM
S_Top
UGATE
PC46
0.1uF/25V,X7R
C0603
PM
3
2
1
EN
PR112
10K,1%
R0402
18
5
6
7
8
9
VID0
S_Top
PR110
4.99K,1%
R0402
PM
S_Top
PC54
0.1uF/10V,X7R
C0402
PM
S_Top
BOOT
J1
JOPEN
RESISTOR_1
ns
19
PC45
1uF/10V,X7R
C0603
PM
S_Top
GND
VCC
PR99
2.2
R0402
PM
S_Top
3
2
1
PGND
20
VID1
+V3.3AL
PVCC
VGPU_ON
LGATE
{43}
PC48
0.1uF/10V,X7R
C0402
GND_62872
ns
S_Top
PR104
30K
R0402
PM
S_Top
PR101
2K
R0402
PM
S_Top
5
6
7
8
9
500mA LGATE
PC40
0.1uF/25V,X7R
C0603
PM
S_Top
PU5
ISL62872
QFNR20_0D4_0D5
PM
S_Top
2A
1uF/10V,X7R
C0603
PM
S_Top
{17}
{32,40,46,48,49,50,51,55,56,57}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,53,55,56,57,58}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,53,56,57}
{23,25,29,32,33,34,35,36,37,38,43,51,55,56}
{17,20,21,33,34,57}
PR111
R0402
2.49K,1%
PM
S_Top
S_Top
GND_62872
{43} VGACORE_PWRGD
PR116
4.02K,1%
R0402
PM
S_Top
B
GND_62872
+V3.3S
+V3.3S
+VGA_CORE
+V3.3GPU
PD14
S_Top
R0402
PM
PR122
10K
R0402
S_Top
PM
3
PR127
1K
GPU_VID0
PC59
0.1uF/10V,X7R
C0402
ns
S_Top
1N5819
SOD123
ns
S_Top
VID1
PR154
10K
R0402
{21}
S_Top
R0402
S_Top
PM
PQ21
2N7002
SOT23
PM
S_Top
GPU_VID1
PM
PR123
1K
{21}
S_Top
VID0
S_Top
PM
PQ22
2N7002
SOT23
PM
S_Top
PR106
PM
10K
R0402
PR108
10K
R0402
PR137
10
R0402
ns
S_Top
PR130
10K
R0402
PM
S_Top
PC65
0.1uF/10V,X7R
C0402
ns
S_Top
PR155
10K
R0402
S_Top
PM
VID1
0
0
1
VID0
0
1
1
Vo
1.03V
0.85V
0.8V
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
+VGA_CORE
Rev
B
S46
Date:
Sheet
52
59
of
5
{46}
+V3.3S
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,5
+V5AL
{29,32,36,48,49,50,56}
+V3.3AL
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,56,57}
+V1.05S
{22,23,24,28,29,50,56,57,58}
+V1.5S
{39,40,41,56}
+VCC_CORE {10,55}
AD+
{36,46,48}
SHDN#
PQ69
MMBT2907
SOT23
10K S_Bot
R0402 1
S_Bot
+V3.3AL
PZ9
BZT52C5V6S-F/5.6
SOD323
S_Bot
PR307
PQ66
MMBT3904-F
SOT23
S_Bot
{38} SHDN_LOCK#
+V5AL
PZ8
BZT52C3V6S-F/3.6
SOD323
S_Bot
1
PR304
100
R0402
S_Bot
PC203
1uF/10V,X7R
C0603
S_Bot
+V3.3S
PR194
10K
R0402
S_Top
Power Good Logic CIRCUIT
{43,50} VTT_PWG
{50} V1.05S_PWG
{51} GFXVR_PWRGD
PR195
R0402
0
S_Top GM
MAIN_PWROK {24,43}
SOT23
PD33
1
1N5819
SOD123 GM
PD32
1N5819
SOD123
{49} DDR_PWG
{24,43} PM_RSMRST#
R323
{24,41,43} PM_SLP_S3#
3
PD21
BAT54A
S_Top
1K
R0402 S_Top
2
C259
0.1UF/10V,X7R
C0402
S_Top
PD23
BAT54A
S_Top
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A4
Project Name
Power Good Logic/OVP

M12
Rev
B
Date: Tuesday, January 05, 2010

Sheet
53
59
of
BATT+
PR50
{36,46} Isense_SYSP
PC25
0.1uF/25V,X7R
C0603
S_Top
PR47
{46} Isense_SYSN
PC26
1000pF/25V,X7R
S_Top C0402
R0402
CHG_GND
{43}
{43}
SET_I
VDD
19
CSIP
20
CSIN
PC27
5600pF/50V,Y5V
C0603
S_Top
0.01uF/25V,X7R
SYS_I_Sense
500mV
1.5V
1.67V
SYS_CURRENT
>3.6A
<3A
10K
DCIN
24
UGATE
17
PC30
0.1uF/25V,X7R
C0603
S_Top
PR224
R0402
BOOT
ISL6251HAZ
16
11
3
SET_I
PR226
0A
0.4A
1.2A
2A
10K
S_Bot
PR225
15.4K,1%
R0402
ns
S_Bot
2.39V_Vref
1uF/10V,X7R
C0603
S_Bot
PR41
10.5K,1%
R0402
S_Top
0.643Vref
18
LGATE
14
PGND
13
D1
VDDP
PR223
10K
R0402
S_Bot
D1
8
G1
PL1
PR19
0
R0402
S_Top
CSOP
21
CSON
22
CELLS
3
G2
S2
ACLIM
23
ACPRN
15uH/3.6A
PR26 LS2_1040
2.2
S_Bot
R0805
ns
S_Top
PC15
0.01uF/25V,X7R
C0402
ns
S_Top
PR48
PC17
0.1uF/25V,X7R
C0603
S_Top
2A
PC13
10uF/ 25V
C1210
S_Top
PC19
10uF/ 25V
C1210
S_Top
BATT+
12.63V
2A Max
PC18
1uF/25V,Y5V
C0805
S_Top
S_Top
1uF/10V,X7R
C0603
S_Top
PR227
phase
2.2 R0402
PC28
10
PR24
50mOHM,1%
R2512
S_Top
S1
D2
VREF
PQ42
AO4932
SO8_50_150
S_Bot
EN
CHLIM
Co-lay.
10uF/ 25V
C1210
ns
S_Bot
S_Top
VADJ
R0402
S_Bot
CHG_GND
PR43
82mV/25m ohm=3.28A.
ICM
PR38
20K,1%
R0402
S_Top
SYS_CURRENT
1A
3A
3.33A
SYS_I_Sense
>1.8V
<1.5V
PC140
PHASE
PC135
PC136
4.7uF/25V
C1206
S_Bot
S_Bot
PC141 1N5819
SOD123
S_Top
0.1uF/25V,X7R
C0603
S_Bot
phase
VCOMP
PC138
0.1uF/25V,X7R
C0603
S_Bot
2.2
PD5
PU2
ICOMP
PC137
1000pF/50V,X7R
C0402
S_Bot
PD6
SOD323
1N4148WS
ns
S_Top
PR51
R0402
S_Top
S_Top
3.3V
CHG_ON
0V
0.4V
1.2V
2V
PC23
C0402
{46}
R0402
S_Top
SSOP24_25_150
PC24
Isense_SYSN
S_Top CHG_GND
R0402
S_Top
1.5A
10
ACSET
PC31
1uF/10V,X7R
C0603
S_Top
CHG_GND
VDDP
PR52
5V_internal_LDO
4.7
R0402
S_Top
15
VDDP
PC21
1uF/10V,X7R
C0603
S_Top
{46,47}
SYS_I_Sense
100
GND
PR34
CHG_GND
12
R0402
S_Top
PC22
3300pF/50V,X7R
C0402
S_Top
{43}
Layout note:
Far away from critical signal trace
0
R0402
S_Top
CHG_GND
CHG_GND
SYS_I_Trip
High
Low
Cells
status
Float
GND
VDD
Battery Pak
2S
3S
4S
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
CHARGER
M12
Rev
B
Date:
Sheet
54
59
of
R0402
PR275
1K
R0402
ns
S_Bot
S_BotR0402
PR278 1K
PR287
{10}
PM_DPRSLPVR
S_Bot
470
R0402
S_Bot
PR284 10K
R0402
ns
COMP
31
32
VID1
33
VID2
34
VID3
36
35
VID4
VID0
LGATE1b
24
50A
+
PC85
220UF/2.5V,POSCAP
CT7343_19
S_Top
+V5S
BOOT1
IMON
VIN
VDD
ISUM+
ISUM-
PHASE1
21
UG1
PQ61
AOL1426
SO8_50_150_PPAK
S_Bot
+V5S
S_Bot
PC188 1uF/10V,X7R
C0603
5
6
7
8
9
5
6
7
8
9
PR264
10K
R0402
4S_Bot
3
2
1
PR265
0
R0603
S_Bot
SO8_50_150_PPAK
AOL1718
PQ59
S_Bot
PC187
0.1uF/25V,X7R
C0603
S_Bot
5
6
7
8
9
19
18
17
16
15
14
13
ISEN1
CPU_GND
PC105
0.22uF/16V,X7R
C0603
S_Top
PR277 10 R0402
PC202
1000pF/50V,X7R
C0402
S_Bot
PC117
1000pF/50V,X7R
C0402
S_Top
PR266
100
R0402
S_Bot
S_Top
PR168
2.2
R0805
ns
S_Top
PC116 0.22uF/16V,X7R
C0603
S_Top
PR303
10
R0402
S_Bot
Phase1
PR261
10K
R0402
S_Bot
PC104
0.01uF/25V,X7R
PR257
C0402
S_Top
3.57K,1%
R0402
S_Bot
PC81
220UF/2.5V,POSCAP
CT7343_19
ns
S_Top
PL10
0.36uH/30A
LS2_1040
S_Bot
PR259
10
R0402
S_Bot
PC97
0.01uF/25V,X7R
C0402 ns
S_Bot
SO8_50_150_PPAK
AOL1718
PQ58
S_Bot
LG1a
4
PC84
220UF/2.5V,POSCAP
CT7343_19
ns
S_Top
ISEN1
PR255
3
2
1
22
PD20
SBM54PT
SMB
S_Top
VSEN
VSSP1
S_Top
0 R0603
RTN
ISEN2
12
10
PC112
0.22uF/16V,X7R
C0603
CPU_GND
S_Top
23
3
2
1
FB2
LGATE1a
UGATE1
G4
G5
G6
G1
G2
G3
ISEN1
ISEN2
FB
PC107
1uF/10V,X7R
C0603
S_Top
R0603
S_Bot
PR302
75K
R0402
S_Bot
PC198 C0402
100pF/50V,NPO
LG1b
PR182
PC199
3300pF/50V,X7R
C0402
S_Bot
25A
PR260
3.57K,1%
R0402
S_Bot
S_Bot
PC185 0.1uF/25V,X7RC0603
ISUM-
PR198
10
R0402
S_Top PC114
0.1UF/10V,X7R
C0402
S_Top
PR196
0
R0402
S_Top
25
VSSSENSE
VCCP
+VCC_CORE
S_Bot
QFNS40_0D4_1G
PR267
10K,1%
R0402
S_Bot
CPU_GND
{10}
VID5
37
VID6
38
VR_ON
39
40
CLK_EN#
VW
VCORE1
TestP
TPC60
ns
S_Top
C0603
S_Top
S_Bot
PC82
220UF/2.5V,POSCAP
CT7343_19
S_Top
PC106
1uF/10V,X7R
R0603
PU11
ISL62882HRTZ
0.36uH/30A
LS2_1040
S_Bot
PR256
10K
PR258
PC169
R0402
S_Bot
1uF/10V,X7R
10
R0402 S_Bot C0603
S_Bot
S_Top
LG2
PR262
PR167
2.2
R0805
ns
S_Top
PC98
0.01uF/25V,X7R
C0402
ns
S_Top
PC86
220UF/2.5V,POSCAP
PC83
220UF/2.5V,POSCAP CT7343_19
S_Top
CT7343_19
S_Top
NTC
PQ57
AOL1718
SO8_50_150_PPAK
S_Bot
25A
PL9
26
NTC
PD19
SBM54PT
SMB
S_Top
LGATE2
PR185
470K,1% R0603
PR263
0
R0603
S_Bot
27
PC103
0.01uF/25V,X7R
C0402
S_Top
PC102
0.1uF/25V,X7R
C0603
S_Top
VSSP2
VR_TT#
PQ56
AOL1718
SO8_50_150_PPAK
S_Bot
PC115
1uF/10V,X7R
C0603
ns
S_Top
28
PR245
10K
R0402
S_Bot
VCCSENSE
PHASE2
PR294
10
R0402
S_Bot
{10}
29
RBIAS
PR293
3.01K,1%
R0402
S_Bot
UGATE2
S_Bot
PC201
100pF/50V,NPO
C0402
S_Bot
PSI#
PR292
147K,1%
R0402
S_Bot
{8} VR_PROCHOT#
PC101
0.22uF/16V,X7R
C0603
S_Top Phase2
G9
G8
G7
30
PC196 C0402
1000pF/50V,X7R
PR300
S_Bot 4.02K,1%
CPU_GND
R0402
S_Bot
NTC thermistor
PR301
R0402
6.98K,1%
PC197
S_Bot
C0402
1000pF/50V,X7R
PGOOD
PM_PSI#
CPU_GND
R0402
ns
PR289 10K
R0402
S_Bot
S_Bot
G1
G2
G3
11
PR291 10K
G9
G8
G7
BOOT2
PR242
0
R0603
S_Bot
{10}
S_Bot
{43} IMVP_PWRGD
UG2
PC181
10uF/ 25V
C1210
S_Bot
S_Bot
PR286
2K R0402
+V3.3S
+V1.1S_VTT
CPU_GND
PC180
10uF/ 25V
C1210
S_Bot
{6} CK505_CLK_EN#
S_Bot
PR282
2K R0402
DPRSLPVR
+V1.1S_VTT
PQ55
AOL1426
SO8_50_150_PPAK
S_Bot
20
G4
G5
G6
PR279 2K
IMVP_ON
PC182
0.01uF/25V,X7R
C0402
S_Bot
{43}
3A
+VDC
+V1.1S_VTT
PR270
1K
R0402
S_Bot
+V1.1S_VTT {8,10,11,27,28,29,38,50,51}
H_VID6
ns
H_VID5
{10}
ns
1K R0402
S_Bot
PR276
1K R0402
S_Bot
S_Bot
PR150
1K
R0402
PR268 S_Top
1K
R0402
S_Bot
{10}
S_Top
1K
R0402
PR273
H_VID4
S_Top
1K
R0402
PR269
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,56,57,58}
{23,25,29,32,33,34,35,36,37,38,43,51,52,56}
{32,40,46,48,49,50,51,52,56,57}
{10}
{10}
PR149
+V3.3S
+V5S
+VDC
+VCC_CORE
H_VID3
ISEN2
H_VID2
{10}
S_Top
1K
R0402
5
6
7
8
9
{10}
PR148
3
2
1
H_VID1
R0402
5
6
7
8
9
H_VID0
{10}
1K
5
6
7
8
9
{10}
PR147
3
2
1
3
2
1
PC113
1000pF/50V,X7R
C0402
S_Top
CPU_GND
PC183
0.22uF/10V,X7R
C0603
S_Bot
PC191
PR280
0.1uF/25V,X7R
82.5,1%
C0603
R0402
S_Bot
S_Bot
PC193
0.01uF/25V,X7R
C0402
S_Bot
PR288
1.58K,1%
R0402
S_Bot
PR290
PC194
470pF/25V,X7R
100
C0402
R0402
ns
ns
S_Bot
S_Bot
PR193
0
R0603
S_Top
CPU_GND
A
PC110
10uF/ 25V
C1210
S_Top
S_Bot CPU_GND
PR274
+VDC
10
Vcore_IMON
{10}
R0402
S_Bot
Vcore_IMON1
TestP TPC60
ns
PC109
10uF/ 25V
C1210
S_Top
PC184
0.01uF/25V,X7R
C0402
S_Bot
3A
+VDC
ISUM+
PC192
0.01uF/25V,X7R
C0402
S_Bot
PR283
10K,1%
R0402
S_Bot
PC190
0.1uF/25V,X7R
C0603
S_Bot
PC195
0.1uF/10V,X7R
C0402
S_Bot
PR281
2.49K,1%
R0402
S_Bot
PR238
10K,1%
R0603
S_Bot
ISUMA
NTC thermistor
2510K
603.05K
801.71K
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
GND_ISL62881
Project Name
+VCC_CORE
Rev
B
C46
Date:
Sheet
55
59
of
5
+VDC
+V5S
+V3.3S
+V5AL
+V3.3AL
+V1.05S
+V1.5
+V1.8S
+V0.75S
AD+
BATT+
+V1.5S
{32,40,46,48,49,50,51,52,55,57}
{23,25,29,32,33,34,35,36,37,38,43,51,52,55}
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,5
{29,32,36,48,49,50,53}
{6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,57}
{22,23,24,28,29,50,57,58}
{8,11,15,16,49,57}
{11,26,28,29,31,49,57}
{15,16,49}
{36,46,48}
{46,47,54}
{39,40,41}
+V3.3AL
5
6
7
8
PD24
1N4148WS
SOD323
S_Top
1
+VDC
PC108
0.01uF/25V,X7R
C0402
S_Top
+V5AL
PR200
33K
R0402
S_Top
D
G
V5S1
TestP
TPC60
ns
S_Bot
3
2
1
MAIN_OFF
PQ31
2N7002
+V1.5
+V5S
S_Top
PC119
0.01uF/25V,X7R
C0402
S_Top
SOT23
PC189
1uF/10V,X7R
C0603
S_Bot
PD18
1N4148WS
SOD323
S_Top
1
PQ28
AO4468
SO8_50_150
S_Top
PR181
510K
R0402
S_Top
PC123
1uF/10V,X7R
C0603
S_Top
PQ27
AO4468
SO8_50_150
ns
S_Top
5
6
7
8
PR183
1K
R0402
S_Top
+V3.3S
5
6
7
8
MAIN_ON
{43}
PR197
51K
R0402
S_Top
PC111
0.01uF/25V,X7R
C0402
S_Top
PQ65
AO4468
SO8_50_150
S_Bot
5
6
7
8
PR187
10K
R0402
S_Top
PR184
1K
R0402
S_Top
PR199
20K
R0402
S_Top
3
2
1
PQ33
DTB114EK
SOT23
S_Top
PR186
100K
R0402
S_Top
PQ39
AO4468
SO8_50_150
S_Top
V3_3S1
TestP
TPC60
ns
S_Top
3
2
1
3
2
1
PR144
100K
R0402
S_Top
PR20
PC75
100K
0.01uF/25V,X7R
R0402
S_Top
C0402
S_Top
+V0.75S
dri1.5 4
+V1.05S
+V5S
dri1.5 4
PR146
10K
R0402
S_Top
+V1.5S
PC76
1uF/10V,X7R
C0603
S_Top
+V1.8S
+V3.3S
+V1.5
+VDC
2
1
PR297
100
R0402
ns
S_Bot
PR305
510K
R0402
S_Bot
PQ67
2N7002
SOT23
S_Bot
1 V1_8DISCHG
PR299
10K
R0402
S_Bot
PR306
PQ68
2N7002
SOT23
S_Bot
1
{24,41,43} PM_SLP_S4#
PQ14
2N7002
SOT23
S_Top
1
PQ16
2N7002
SOT23
S_Top
1
PQ15
2N7002
SOT23
ns
S_Top
PQ35
2N7002
SOT23
S_Top
V1_8DISCHG
PR298
100
R0402
S_Bot
PR75
100
R0402
S_Top
PR80
100
R0402
S_Top
PR79
100
R0402
ns
S_Top
PR191
100
R0402
S_Top
2
1
PQ34
2N7002
SOT23
ns1
S_Top
PR190
100
R0402
S_Top
PQ36
2N7002
SOT23
S_Top
PR189
100
R0402
ns
S_Top
PR188
100
R0402
ns
S_Top
PR192
100
R0402
S_Top
+V1.5S
200K
R0402
S_Bot
MAIN_OFF
TOPSTAR TECHNOLOGY
bent
Page Name
Size
A3
Project Name
SYSTEM/DISCHARGE
Rev
B
M12
Date:
Sheet
56
59
of
5
+V3.3S
+V1.05S
+V1.5
+V1.8S
+V3.3GPU
+V1.05GPU
+V1.8GPU
+V1.5GPU
+VDC
+V5S
+V3.3S
+VDC
{43}
V1.8G_1.5G_ON
PR70
1K
R0402
<0.5A
PR125
20K
R0402
ns
S_Top
PM
S_Top
PR69
510K
R0402
PM
S_Top
+V1.05S
3
2
1
3
2
1
PC178
1uF/10V,X7R
C0603
PM
S_Bot
PM
S_Bot
PR74
100
R0402
PM
S_Top
PC186
0.01uF/25V,X7R
C0402
PM
S_Bot
0.53A
2.5A
PQ13
2N7002
SOT23
PM 1
S_Top
TOPSTAR TECHNOLOGY
PQ10
2N7002
SOT23
PM 1
S_Top
PR66
100
R0402
PM
S_Top
3A
2
5
6
7
8
5
6
7
8
3
2
1
PC171
1uF/10V,X7R
C0603
PM
S_Bot
PQ64
2N7002
SOT23
+V1.5GPU
PR271
200K
R0402
S_Bot
PM
PQ62
AO4468
SO8_50_150
PM
S_Bot
V1_5GPU1
TestP
TPC60
ns
S_Bot
+V1.05GPU
PC179
0.01uF/25V,X7R
C0402
PM
S_Bot
PR126
200K
R0402
PM
S_Top
V1_05GPU1
TestP
TPC60 ns
S_Top
4
S
S_Bot
PM
S_Bot
PR272
10
R0402 PM
G
PQ60
AO4468
SO8_50_150
PM
S_Bot
1
PQ24
2N7002
SOT23
PM
S_Top
PQ54
AO4468
SO8_50_150
ns
S_Bot
PM
S_Bot
PQ63
+V1.5
AO4468
SO8_50_150
PM
S_Bot
PR285
51K
R0402
PM
S_Top
PR254
10
R0402
PQ12
2N7002
SOT23
PM
S_Top
+VDC
PR73
100
R0402
PM
S_Top
PR156
51K
R0402
PM
S_Top
+VDC
PR121
51K
R0402
PQ25
AO3415
PC68
SOT23
1uF/10V,X7R
PM
S_Top
C0603
PM
S_Top
PQ11
2N7002
SOT23
PM
S_Top
+V1.8GPU
5
6
7
8
V3GPU_OFF
PR72
10
R0402 PM
S_Top
3 1
PQ8
2N7002
SOT23
PM
S_Top
PR120
0
R0402
ns
S_Top
PR68
220
R0402
PM
S_Top
PR158
51K
R0402
PM
S_Top
PR67
220
R0402
PM
S_Top
PC61
1uF/10V,X7R
C0603
PM
S_Bot
3.5A
PC214
0.01uF/25V,X7R
C0402
PM
S_Bot
+V3.3S
3
2
1
PM
S_Top
1
PQ79
2N7002
SOT23
PM
S_Top
PR71
51K
R0402
PM
S_Top
+V3.3GPU
PR63
510K
R0402
PM
S_Top
1
V3G_1.05G_ON
PR62
{43}
1K
R0402
PR319
510K
R0402
PM
S_Top
S_Top
3
PQ9
2N7002
SOT23
PM
S_Top
PR65
10
R0402 PM
3
2
1
PR64
51K
R0402
PM
S_Top
S_Top
PM
+V1.8S
+VDC
V1_8GPU1
TestP
TPC60
ns
S_Bot
V3_3GPU1
TestP
TPC60
ns
S_Top
PR133
0
R0402
PM
S_Bot
PQ78
AO4468
SO8_50_150
PM
S_Bot
+VDC
PR318
10
R0402
PM
S_Top
5
6
7
8
PR317
51K
R0402
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,4
{22,23,24,28,29,50,56}
{8,11,15,16,49,56}
{11,26,28,29,31,49,56}
{17,20,21,33,34}
{17,18,19,20}
{20}
{18,19}
{32,36,40,46,48,49,50,51,52,55,56}
{23,29,32,33,34,35,36,37,38,43,51,52,55,56}
5
6
7
8
bent
Page Name
Size
B
Project Name
SYSTEM/DISCHARGE
Rev
B
M12

57
59
Date:
Sheet
of
5
+V3.3S
{6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57}
+V1.05S
{22,23,24,28,29,50,56,57}
H19
GND
GND
GND
GND
GND
GND
H25
HOLE
TH_315_118_P
ns
S_Top
HOLE
TH_315_118_P
ns
S_Top
GND
H24
HOLE
HOLE
TH_315_118_PTH_197_118
ns
ns
S_Top
S_Top
1
HOLE
TH_315_118_P
ns
S_Top
H17
HOLE
TH_315_118_P
ns
S_Top
H21
HOLE
TH_315_118_P
ns
S_Top
H16
HOLE
TH_315_118_P
ns
S_Top
H20
GND_AUD
HOLE
TH_315_118_P
ns
S_Top
H23
GND
HOLE
TH_315_118_P
ns
S_Top
H18
HOLE
TH_315_118_P
ns
S_Top
H15
H22
GND
GND
+V3.3S
+V1.05S
+V3.3S
C219
0.1UF/10V,X7R
C0402
S_Top
C228
0.1UF/10V,X7R
C0402
S_Top
+V1.05S
C133
0.1UF/10V,X7R
C0402
S_Top
+V1.05S
C115
0.1UF/10V,X7R
C0402
S_Top
+V1.05S
C99
0.1UF/10V,X7R
C0402
S_Top
C121
0.1UF/10V,X7R
C0402
S_Top
+V3.3S
+V3.3S
+V3.3S
+V3.3S
C194
0.1UF/10V,X7R
C0402
S_Top
C202
0.1UF/10V,X7R
C0402
S_Top
E10
EMI
ns
S_Bot
EMI
ns
S_Bot
EMI
ns
S_Top
E9
1
EMI
ns
S_Top
E6
1
EMI
ns
S_Top
EMI
ns
S_Top
E5
E2
E7
1
E4
1
EMI
ns
S_Top
Add for EMI

By Johan 071228
GND
FD7
FD8
FD1
FD4
FD6
FD5
FD3
FD2
1 1
1 1
1 1
1 1
1 1
1 1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS
ns
ns
ns
ns
ns
ns
ns
ns
FD9
FD10
1
FD11
1
FD12
1
FD13
1
FD14
1
FD15
1
FD16
1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS

ns
ns
ns
ns
ns
ns
ns
ns
TOPSTAR TECHNOLOGY
bent
Page Name
Size
C
Project Name
SYSTEM/DISCHARGE
C46
Rev
A
Date:
Sheet
of
58
59
5
SODIMM0
CLOCK Distribution:
MEM_CHA_CLK0
MEM_CHA_CLK#0
MEM_CHA_CLK2
MEM_CHA_CLK#2
CPU_0#
CPU_0
Pin22
Pin23
133MHz
133MHz
DOT96#
DOT96
Pin4
Pin3
100MHz
Pin11
Pin10
100MHz
Pin14
Pin13
100MHz
SRC0#/SATA
SRC0/SATA
SRC1#
SRC1
MEM_CHA_CLK1
MEM_CHA_CLK#1
BCLK_CPU
DP 120MHz
14.318MHz
DMI 100 MHz
BCLK 133MHz
BCLK_CPU
BCLK_CPU
Auburndale
SODIMM1
MEM_CHA_CLK3
MEM_CHA_CLK#3
100MHz
EXPRESS CARD
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
100MHz
Mini PCIE
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
100MHz
IBEX_PEAK
100MHz
PCIE LAN
25MHz
CLK_BUF_SATA_N
CLK_BUF_SATA_P
100MHz
CLK_BUF_EXP_N
CLK_BUF_EXP_P
100MHz
33MHz
EC(KB3926)
32.768KHz
CLKOUT_PEG_A_P
XTAL_IN
N11
27SS
Pin7
27MHz
25MHz
XTAL_SSIN
FBA_CLK0
FBA_CLK0#
200MHz
FBA_CLK1
FBA_CLK1#
GDDR3 1
27MHz
Audio Codec
ALC662
24MHz
64Mb*16bit*4
GDDR3 2
Pin6
100MHz
32.768KHz
27NSS
Card Reader
(IT1337E)
CLK_BUF_REF14
CLKOUT_PEG_A_N
14.318MHz
48MHz
100MHz
REF/FS
Pin30
TOPSTAR TECHNOLOGY
bent
Page Name
N10M PCIE&PWR&GND
Size
C
C46
Project Name
Rev
A
Date:
Sheet
59
59
of
5

Topstar Digital Motherboard Schematic

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Topstar Digital Motherboard Schematic

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5

Topstar Digital technologies Co.,LTD

Board name: MotherBoard Schematic

02. System block & Index

Project name: C46

03. PWR Block & Description

04. Notes & Annotations

Initial Date: MAY.9, 2008

05. Schematic Modify and History

Hardware drawing by:

Hardware check by:

Power drawing by:

Power check by:

EMI Check by:

Manager Sign by:

C46 SYSTEM BLOCK Ver:A

PCIE mini Half-Card

C46 POWER BLOCK Ver:A

Primary DC system power supply(9V-19V)

Core voltage for processor

1.1V for CPU

1.05V for PCH core

0.75V DDR3 Termination voltage

1.5V power rail for DDR3

3.3V always on power rail

3.3V main power rail

5V for USB Device

I2C SMB Address

5V main power rail

0.8--1.03V for GPU NB8M core voltage

1.5S for PCIE Device

1.8V for display votage

3.3V for external GPU

1.05V for external GPU

1.8V for external GPU

1.5V for external GPU

Power States/AC mode

Board stack up description

Trace Impedence:50ohm +/-15%(Default)

LID switch from EC

Power switch from EC

Friday, November 27, 2009

VerA to VerB Changelist

VerB to VerC Changelist

VerC to VerD Changelist

SMBUS ADD:1101 001X

No more than 500 mil

Integrated resistors on differentail clk

Friday, November 27, 2009

PCI EXPRESS -- GRAPHICS

R0402 VCCPWRGOOD_1_R AN14

JTAG & BPM

DDR3 Compensation Signals

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY - B

CPU CORE SUPPLY

1.1V RAIL POWER

AN35 Vcore_IMON_R R580

PEG & DMI

Friday, November 27, 2009

never pull down for switchable graphic

DMI termination voltage