Eal30 La-2691

A
Compal Confidential
Fan Control
Model Name : EAL30

File Name : LA-2691
Intel Dothan CPU
page 4
uFCPGA-478 CPU
Thermal Sensor
ADI ADM1032AR
page 4,5
page 4
H_A#(3..31)
FSB
Clock Generator
ICS954226
page 12
H_D#(0..63)
400 / 533 Mhz
LCD Conn.
page 20
CRT Conn.
page 21
16X PCI-E
200pin DDR-SO-DIMM X2
page 10,11
BANK 0, 1, 2, 3
2.5V DDR200/266/333
PCBGA 1257
with 32/64/128MB
On Board VRAM
TV-OUT Conn.
Memory BUS(DDR)
Intel Alviso GM(PM)
ATI M24/M22
Ver A23
page 6,7,8,9
page 13,14,15,16,17,18
page 21
Port 2,3
USB conn
x2
page
DMI
35
page 19
Port 4
3.3V 33 MHz
IDSEL:AD18
(PIRQ[G..H]#,
GNT#3/4,
REQ#3/4)
IDSEL:AD17
(PIRQB#,
GNT#1,
REQ#1)
IDSEL:AD20
(PIRQA#,B#,C#,D#,
GNT#2, REQ#2)
page 30
TI Controller
page 26
RJ45/RJ11
page 26
PCI7411
3.3V 48MHz
3.3V 24.576MHz
page 22,23,24
Slot 0
page 24
page 26
IDE
CDROM
Conn. page
5in1 CardReader
page 25
Slot
SATA
LPC BUS
AC97 Codec
HDD Conn.
AMP
TPA0232
page
EAL30 Sub Board

LED/SW Board
Conn
LS-2462 page 36
32
Audio Board
Conn
LS-2691
page 33
page 34,34
page 31
page 31
page 25
SMsC LPC47N217
Super I/O
MDC Conn
ALC250 Ver.D
25
SATA to PATA
88SA8040
3.3V 33MHz
ENE KB910
ENE KB910L
RTC CKT.
AC-LINK
3.3V ATA-100
page 23,24
13 94
Conn.
35
USB 2.0
Intel ICH6-M
mBGA-609
LAN
RTL8100CL
Mini PCI
socket
USB conn
x1
page
PCI BUS
page 32
page 24
Power On/Off CKT.
Touch Pad
PARALLEL
Int.KBD
page 36
page 37
FIR
page 33
T/P Board
Conn
LS-2461
page 36
WL-KSW Board
page 33
LS-2692
1MB BIOS
DC/DC Interface CKT.
page 35
page 38
Power Circuit DC/DC

page 38,39,40,41
42,43,44,45
2005/03/01
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/03/01
Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size Document Number

Custom
Date:
Rev
1.0
EAL30 LA-2691
|, 03, 2005
Sheet
E
of
52
Compal Confidential
Fortworth Alviso
EAL30 LA-2691 Schematic
uFC-PGA Dothan / 915 PM/GM/910GML

ATI M24/M24C/M22 Ver A23 with 64M/128M VRAM / ICH6-M
2005-03-01
REV:1.0
2005/03/01
Issued Date
Compal Secret Data
Deciphered Date
2006/03/01
Cover Sheet
A
Title

Custom
Date:
R ev
1.0
EAL30 LA-2691
, 04, 2005
Sheet
E
of
52
Symbol note:
Voltage Rails
:means digital ground.
Power Plane
Description
VIN
Adapter power supply (19V)
S0-S1
S3
S5
N/A
N/A
N/A
B+
AC or battery power rail for power circuit
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+1.05VS
1.05V rail for Processor I/O
ON
OFF
OFF
+1.25VS
1.25V switched power rail for DDR Vtt
ON
OFF
OFF
+VGA_CORE
1.2V/1.0V switched power rail for VGA core power
ON
OFF
OFF
+1.2VS
1.2V for VGA PCIE power
ON
OFF
OFF
:means analog ground.

@ :means reserved.
Fortworth Alviso Comparison Table
Item
+1.5VALW
1.5V always on power rail
ON
ON
ON*
+1.5VS
1.5V switched power rail
ON
OFF
OFF
+1.8VS
1.8V switched power rail for VGA frame buffer
ON
OFF
OFF
+2.5V
2.5V power rail for system DDR
ON
ON
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3V
ON
ON
OFF
OFF
VGA
VRAM
+3VS
ON
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+12VALW
12V always on power rail
ON
ON
ON*
RTCVCC
RTC power
ON
ON
ON*
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Vcc
Ra
ICH6-M I2C / SMBUS ADDRESSING
BID/PID
DEVICE
HEX
ADDRESS
A0
1010000X
DDR SO-DIMM 1
A2
1010001X
CLOCK GENERATOR (EXT.)
D2
1101001X
UMA
Page
ATi M22P/24P
UMA
15 ~ 18
N/A
19 ~ 20
128MB/64MB
Board ID Table for AD channel
DDR SO-DIMM 0
* Descrite
0
1
2
3
4
5
3.3V +/- 5%
10K +/- 5%
Rb/Rc
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
NC
V AD_BID min
0 V
1.412 V
2.015 V
2.406 V
2.660 V
3.135 V
V AD_BID typ
0 V
1.486 V
2.121 V
2.533 V
2.800 V
3.300 V
V AD_BID max
0.1 V
1.560 V
2.227 V
2.659 V
2.940 V
3.465 V
KB910 I2C / SMBUS ADDRESSING

DEVICE
HEX
ADDRESS
SM1 24C16
A 0H
1010000Xb
SM1 SMART BATTERY
16H
0001011Xb
SM2 ADM0132
CPU THERMAL MONITOR
98H
1001100Xb
SM2 ALC250 codec
00H
0000000Xb
Board ID
* 0
1
2
3
4
5
6
7
External PCI Devices

DEVICE
PCI Device ID
IDSEL #
REQ/GNT #
PIRQ
1394
D0
AD20
A,B,C,D
LAN
D1
AD17
CARD BUS
D4
AD20
A,B,C,D
5IN1
D4
AD20
A,B,C,D
Mini-PCI
D2
AD18
G,H
PCB Revision
0.1
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/01
A
Title
Notes List
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
of
52
+1.05VS
H_D#[0..63]
H_D#[0..63] 6
ITP_TDI
R426
ITP_TDO
R423
1 @ 54.9_0402_1%
H_CPURST#
R424
1 @ 54.9_0402_1%
ITP_TMS
R427
PRO_CHOT#
R23
56_0402_5%
H_PW RGOOD
R422
200_0402_5%
H_IERR#
R418
56_0402_5%
U7A
6
6
6
H_RS#[0..2]
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_CPURST#
H_RS#[0..2]
H_IERR#
H_CPURST#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
A16
A15
ITP_CLK0
ITP_CLK1
B15
B14
BCLK0
BCLK1
N2
L1
J3
N4
L4
H2
K3
K4
A4
J2
B11
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
H1
K1
L2
M3
6
24
24
6
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
24 H_PWRGOOD
6,24 H_CPUSLP#
ITP_DBRRESET# A7
M2
B7
G1
C19
A10
B10
PRO_CHOT#
B17
H_PW RGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
THERMDA
THERMDC
6,24 H_THERMTRIP#
E4
A6
A13
C12
A12
C5
F23
C11
B13
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
C23
K24
W25
AE24
C22
L24
W24
AE25
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
RS0#
RS1#
RS2#
TRDY#
BPM0#
BPM1#
BPM2#
BPM3#
680_0402_5%
ITP_TCK
R21
27.4_0402_1%
TEST1
R421
1 @ 1K_0402_5%
TEST2
R414
1 @ 1K_0402_5%
Reserve For Testability

H_FERR#
C44
2@ 100P_0402_50V8J
H_CPUSLP#
C32
2@ 100P_0402_50V8J
H_DPSLP#
C46
2@ 100P_0402_50V8J
H_STPCLK#
C41
2@ 100P_0402_50V8J
H_INIT#
C34
2@ 100P_0402_50V8J
H_SMI#
C33
2@ 100P_0402_50V8J
H_IGNNE#
C29
2@ 100P_0402_50V8J
H_NMI
C49
2@ 100P_0402_50V8J
Thermal Sensor ADI ADM1032AR

+3VS
U31
W =15mil
C457
6
6
6
6
VDD
SCLK
EC_SMC_2 36,39
THERMDA
D+
SDATA
EC_SMD_2 36,39
THERMDC
2
2200P_0402_25V7K
D-
ALERT#
GND
R18 @
1
C20
THERM#
ADM1032AR_SOP8
Address:1001_100X
2
Fan Control circuit
MISC
6
6
6
6
6
6
6
6
39
EN_DFAN1
1
2
R45
10K_0402_5%
PU5B
LM358A_SO8
7 FAN1_ON 1
R47
P@
C
2
100_0402_5%
0
-
2
B
THERMDA DIODE
THERMDC
THERMTRIP#
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
C2
D3
A3
B5
D1
D4
STPCLK#
SMI#
C6
B4
LEGACY CPU
1
R46
H_A20M# 24
H_FERR# 24
H_IGNNE# 24
H_INIT# 24
H_INTR
24
H_NMI
24
D8
1N4148_SOD80
2
8.2K_0402_5%
+3VS
H_STPCLK# 24
H_SMI#
24
39
FANSPEED1
TYCO_1612365-1_Dothan
JP7
FAN1_VOUT
1
R362
2
10K_0402_5%
@
C444
1000P_0402_50V7K
1
2
3
ACES_85205-0300
1
1
@
C448
1000P_0402_50V7K
1
Close to Fan Conn.
THERMDA & THERMDC Trace / Space = 10 / 10 mil
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
B
1
C43
D7
Q3
10U_0805_10V4Z
2
FMMT619_SOT23 1SS355_SOD323
1
C64
0.1U_0402_16V4Z
2
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
+5VS
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
THERMAL
B18
A18
C17
D25
J26
T24
AD20
CONTROL GROUP
C8
B8
A9
C9
DINV0#
DINV1#
DINV2#
DINV3#
HOST CLK
1 @ 150_0402_5%
6
6
6
6
6
6
6
6
ADSTB0#
ADSTB1#
R22
14 CLK_CPU_BCLK
14 CLK_CPU_BCLK#
U3
AE5
R415
H_ADSTB#0
H_ADSTB#1
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ITP_DBRRESET#
ITP_TRST#
6
6
DATA GROUP
+3VS
R2
P3
T2
P1
T1
ADDR GROUP
40.2_0402_1%
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
Dothan
6 H_REQ#[0..4]
H_REQ#[0..4]
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
10K_0402_5%
H_A#[3..31]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
0.1U_0402_16V4Z
H_A#[3..31]
150_0402_5%
Title
INTEL Dothan(1/2)
Size
Document Number
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
of
52
+CPU_CORE
+CPU_CORE
U7B
1
1
@ 54.9_0402_1%
@ 54.9_0402_1%
2
2
VCCSENSE
VSSSENSE
VCCA0
VCCA1
VCCA2
VCCA3
P23
W4
VCCQ0
VCCQ1
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
PSI#
E1
PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
E2
F2
F3
G3
G4
H4
1.8V FOR DOTHAN-A

1
R301
+1.05VS
2
@ 0_1206_5%
1.5V FOR DOTHAN-B

+1.5VS
1
R302
0_1206_5%
1
C30
0.01U_0402_16V7K
1
C24
2
10U_0805_6.3V6M
+CPU_CORE
50
+1.05VS 50
50
50
50
R62
50
1K_0402_1%
50
R59
GTL_REF0
2
2K_0402_1%
14
14
CPU_BSEL0
CPU_BSEL1
COMP0
COMP1
COMP2
COMP3
AD26
U7C
VCCSENSE
VSSSENSE
F26
B1
N1
AC26
+VCCA
+1.8VS
AE7
AF6
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
R83
R82
VID0
VID1
VID2
VID3
VID4
VID5
GTLREF
C16
C14
BSEL0
BSEL1
P25
P26
AB2
AB1
COMP0
COMP1
COMP2
COMP3
B2
C3
E26
AF7
AC1
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
+ C475
2
10U_0805_6.3V6M
27.4_0402_1%
COMP0
54.9_0402_1%
COMP1
R81
27.4_0402_1%
COMP2
R80
54.9_0402_1%
COMP3
2
330U_D_2VM
10U_0805_6.3V6M 10U_0805_6.3V6M
1
1
1
C38
C40
C37
2
10U_0805_6.3V6M
C39
2
10U_0805_6.3V6M
C47
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C65
C52
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C53
C48
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C71
C66
2
10U_0805_6.3V6M
C72
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C74
C73
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C76
C75
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C543
C544
2
2
10U_0805_6.3V6M
C542
2
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C540
C541
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C564
C539
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C586
C570
2
2
10U_0805_6.3V6M
C563
2
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C585
C569
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C611
C612
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C609
C610
2
2
10U_0805_6.3V6M
C,uF
ESR, mohm
ESL,nH
3X330uF
9m ohm/3
3.5nH/4
MLCC 0805 X5R
35X10uF
5m ohm/35
0.6nH/35
+1.05VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C104
1
C520
1
C519
1
C518
0.1U_0402_16V4Z
1
C517
1
C554
0.1U_0402_16V4Z
1
C575
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Dothan
POWER, GROUND
C608
2
2
10U_0805_6.3V6M
Vcc-core
Decoupling
SPCAP,Polymer
150U_D2_6.3VM
10U_0805_6.3V6M
1
C36
C35
+ C473
+CPU_CORE
R42
+ C474
@
2
330U_D_2VM
R44
330U_D_2VM
1
1
C591
0.1U_0402_16V4Z
1
C560
1
C584
0.1U_0402_16V4Z
C602
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
2
0.1U_0402_16V4Z
TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils
2006/03/01
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
A
Title
INTEL Dothan(2/2)
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
of
52
H_RS#[0..2]
4
H_A#[3..31]
H_REQ#[0..4]
+1.5VS
H_RS#[0..2] 4
H_A#[3..31]
H_REQ#[0..4]
H_D#[0..63]
H_D#[0..63] 4
CLK_DREF_SSC
R158 1
2 PM@ 0_0402_5%
CLK_DREF_SSC#
R157 1
2 PM@ 0_0402_5%
U44A
HCLKN
HCLKP
4
4
4
4
4
4
4
4
4
4
4
4
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
G4
K1
R3
V3
G5
K2
R2
W4
H8
K3
T7
U5
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
HDINV#0
HDINV#1
HDINV#2
HDINV#3
H_CPURST#
H10
HCPURST#
4
4
4
4
4
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
F8
B5
G6
F7
E6
F6
D6
D4
B3
E7
A5
D5
C6
G8
A4
C5
B4
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HEDRDY#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#
4
H_HITM#
4
H_HIT#
4
H_LOCK#
4
H_BR0#
4
H_BNR#
4
H_BPRI#
4
H_DBSY#
4,24 H_CPUSLP#
H_RS#0
H_RS#1
H_RS#2
H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_XSWING
H_YSWING
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
25
25
25
25
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
25
25
25
25
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
Y31
AA35
AB31
AC35
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
AA33
AB37
AC33
AD37
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
Y33
AA37
AB33
AC37
DMITXP0
DMITXP1
DMITXP2
DMITXP3
AM33
AL1
AE11
AJ34
AF6
AC10
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
AN33
AK1
AE10
AJ33
AF5
AD10
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
AP21
AM21
AH21
AK21
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
DDRA_SCS#0
DDRA_SCS#1
DDRB_SCS#0
DDRB_SCS#1
AN16
AM14
AH15
AG16
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_OCDCOMP0
M_OCDCOMP1
AF22
AF16
AP14
AL15
AM11
AN10
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
11 DDRA_CLK1
11 DDRA_CLK2
12 DDRB_CLK1
12 DDRB_CLK2
11 DDRA_CLK1#
11 DDRA_CLK2#
12 DDRB_CLK1#
12 DDRB_CLK2#
11
11
12
12
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
11
11
12
12
DDRA_SCS#0
DDRA_SCS#1
DDRB_SCS#0
DDRB_SCS#1
R135 1
R120 1
2 @ 40.2_0402_1%
2 @ 40.2_0402_1%
Intel new update

R106 1
R105 1
+2.5V
2 80.6_0402_1%
2 80.6_0402_1%
M_RCOMPN
M_RCOMPP
SMVREF
M_XSLEW
M_YSELW
+1.05VS
R4732
R4741
R4802
R4841
24.9_0402_1%
54.9_0402_1%
24.9_0402_1%
54.9_0402_1%
1
2
1
2
(10mil:20mil)
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil
915PM@ ALVISO_BGA1257
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN
DREF_CLKP
DREF_SSCLKP
DREF_SSCLKN
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
R466
SMVREF
0.1U_0402_16V4Z
C236
1K_0402_1%
C691
0.1U_0402_16V4Z
2
2
CFG0
R121 1
2 10K_0402_5%
CFG12
CFG13
CFG5
R115 1
2 @ 1K_0402_5%
CFG16
CFG6
R117 1
2 @ 1K_0402_5%
CFG18
CFG19
CFG7
R122 1
2 @ 1K_0402_5%
CFG9
R113 1
2 @ 1K_0402_5%
CFG12 R114 1
2 @ 1K_0402_5%
CFG13 R107 1
2 @ 1K_0402_5%
CFG16 R116 1
2 @ 1K_0402_5%
CFG[17:3]: internal pull-up
(12mil:10mil)
2 @ 1K_0402_5%
CFG19 R137 1
2 @ 1K_0402_5%
J23
J21
H22
F5
AD30
AE29
A24
A23
D37
C37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
PM_BMBUSY# 25
EXT_TS#0
EXT_TS#1
H_THERMTRIP#
H_THERMTRIP# 4,24
VGATE
14,25,50
PLT_RST# 15,23,25,27,28,31,35,39
CLK_DREF_96M#
CLK_DREF_96M
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M# 14
CLK_DREF_96M 14
CLK_DREF_SSC 14
CLK_DREF_SSC# 14
+2.5VS
EXT_TS#0 R134 1
2 10K_0402_5%
EXT_TS#1 R139 1
2 10K_0402_5%
CFG5
Refer to sheet 6 for FSB

frequency select
Low = DMI x 2
High = DMI x 4
CFG6
Low = DDR-II
High = DDR-I
CFG7
Low = DT/Transportable CPU

High = Mobile CPU
CFG9
Low = Reverse Lane

High = Normal Operation
CFG[13:12]
00
01
10
11
CFG16
(FSB Dynamic
ODT)
Low = Disabled
High = Enabled
CFG[2:0]
*
*
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation (Default)
CFG18
(VCC Select)
Low = 1.05V (Default)

High = 1.5V
CFG19
(VTT Select)
Low = 1.05V (Default)

High = 1.2V
*
A
1
R462
0.1U_0402_16V4Z
100_0603_1%
C694
0.1U_0402_16V4Z
R483
100_0603_1%
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
CFG18 R140 1
200_0603_1%
C686
0.1U_0402_16V4Z
CFG9
CFG[19:18]: internal pull-down
H_YSWING
1
R111
C148
+1.05VS
R467
221_0603_1%
H_XSWING
1
CFG5
CFG6
CFG7
1
+1.05VS
1
H_VREF
A
MCH_CLKSEL1 14
MCH_CLKSEL0 14
+2.5VS
R475
R470
221_0603_1%
(12mil:10mil)
(5mil:15mil)
CFG0
MCH_CLKSEL1
MCH_CLKSEL0
1K_0402_1%
+1.05VS
R108
100_0603_1%
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
+2.5V
82915PM-C0
(R3:SA009150180)
(R1:SA009150160)
+1.05VS
AA31
AB35
AC31
AD35
CFG/RSVD
HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
J11
C1
C2
T1
L1
D1
P1
25
25
25
25
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
NC
AB1
AB2
14 CLK_MCH_BCLK#
14 CLK_MCH_BCLK
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
DDR MUXING
H_ADSTB#0
H_ADSTB#1
HPCREQ#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HADSTB#0
HADSTB#1
25
25
25
25
CLK PM
4
4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
A11
A7
D7
B8
C7
A8
B9
E13
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2
Alviso
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HOST
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
DMI
U44B
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
Title
INTEL Alviso HOST(1/5)

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
of
52
PCIE_MTX_C_GRX_N[0..15]
15 PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
15 PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
15 PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
15 PCIE_GTX_C_MRX_P[0..15]
U44G
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
22 GMCH_TV_LUMA
22 GMCH_TV_CRMA
2
R125
1
4.99K_0402_1%
TV_REFSET
2
R527
1
0_0402_5%
GMCH_CRT_CLK
GMCH_CRT_DATA
22 GMCH_CRT_CLK
22 GMCH_CRT_DATA
22 GMCH_CRT_B
2
R124
2
R127
2
R119
22 GMCH_CRT_G
22 GMCH_CRT_R
22 GMCH_CRT_VSYNC
22 GMCH_CRT_HSYNC
1
150_0402_1%
1
150_0402_1%
1
150_0402_1%
1
R131
2 REFSET
255_0402_1%
A15
C16
A17
J18
B15
B16
B17
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
R130 1
4.7K_0402_5%
GMCH_CRT_CLK
R126 1
4.7K_0402_5%
GMCH_CRT_DATA
R133 1 GM@
2.2K_0402_5%
LCTLB_DATA
R141 1 GM@
2.2K_0402_5%
LCTLA_CLK
21 GMCH_ENVDD
21
21
21
21
Intel Recommand
R146 1
100K_0402_5%
LBKLT_EN
R152 1
1.5K_0402_1%
LIBG
R529 1
75_0402_1%
GMCH_TV_COMPS
R531 1
150_0402_1%
GMCH_TV_LUMA
R532 1
150_0402_1%
GMCH_TV_CRMA
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+
21 GMCH_TXOUT021 GMCH_TXOUT121 GMCH_TXOUT2-
B30
B29
C25
C24
LACLKN
LACLKP
LBCLKN
LBCLKP
GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-
B34
B33
B32
LADATAN0
LADATAN1
LADATAN2
GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-
21 GMCH_TZOUT021 GMCH_TZOUT121 GMCH_TZOUT2-
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+
21 GMCH_TXOUT0+
21 GMCH_TXOUT1+
21 GMCH_TXOUT2+
GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+
21 GMCH_TZOUT0+
21 GMCH_TZOUT1+
21 GMCH_TZOUT2+
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
A34
A33
B31
C29
D28
C27
C28
D27
C26
LVDS
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG
+2.5VS
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
EXP_COMPI
EXP_ICOMPO
MISC
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TV
H24
H25
AB29
AC29
VGA
2 @ 3K_0402_1%
2 @ 3K_0402_1%
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
PCI - EXPRESS GRAPHICS
R142 1
R143 1
14 CLK_MCH_3GPLL#
14 CLK_MCH_3GPLL
+2.5VS
D36
D34
PEG_COMP
1
R156
EXP_RXN0/SDVO_TVCLKIN#
EXP_RXN1/SDVO_INT#
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
24.9_0402_1%
+1.5VS
D
C132 1
C134 1
C136 1
C138 1
C140 1
C142 1
C144 1
C146 1
C131 1
C133 1
C135 1
C137 1
C139 1
C141 1
C143 1
C145 1
C153
2 PM@ 0.1U_0402_16V4Z
C155
2 PM@ 0.1U_0402_16V4Z
C157
2 PM@ 0.1U_0402_16V4Z
C159
PM@
0.1U_0402_16V4Z
2
C161
2 PM@ 0.1U_0402_16V4Z
C163
2 PM@ 0.1U_0402_16V4Z
C165
PM@
0.1U_0402_16V4Z
2
C167
2 PM@ 0.1U_0402_16V4Z
C152
2 PM@ 0.1U_0402_16V4Z
C154
2 PM@ 0.1U_0402_16V4Z
C156
2 PM@ 0.1U_0402_16V4Z
C158
PM@
0.1U_0402_16V4Z
2
C160
2 PM@ 0.1U_0402_16V4Z
C162
2 PM@ 0.1U_0402_16V4Z
C164
PM@
0.1U_0402_16V4Z
2
C166
2 PM@ 0.1U_0402_16V4Z
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PM@
0.1U_0402_16V4Z
2
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PM@
0.1U_0402_16V4Z
2
PCIE_MTX_C_GRX_N15
2 PM@ 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P15
+2.5VS
+3VS
GMCH_LCD_CLK
+3VS
+2.5VS
GMCH_LCD_CLK 21
Q10
GM@ 2N7002_SOT23
1
D
ENBKL
LBKLT_EN
A
Q8
GM@ BSS138_SOT23
R150
GM@ 4.7K_0402_5%
GMCH_LCD_DATA
R153
GM@ 4.7K_0402_5%
LDDC_DATA
15,39
+3VS
A
2
G
R144
GM@ 2.2K_0402_5%
+2.5VS
LDDC_CLK
R154
GM@ 4.7K_0402_5%
R155
GM@ 4.7K_0402_5%
GMCH_LCD_DATA 21
2005/03/01
Issued Date
Compal Secret Data
Q9
GM@ 2N7002_SOT23
2006/03/01
Deciphered Date
5
Title
INTEL Alviso PCI-E(2/5)

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
of
52
11 DDRA_SDQ[0..63]
11 DDRA_SDM[0..7]
11 DDRA_SDQS[0..7]
11 DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQS[0..7]
DDRA_SMA[0..13]
12 DDRB_SMA[0..13]
DDRB_SMA[0..13]
U44C
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
AN15
AP16
AF29
AF28
AP15
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
11 DDRA_SCAS#
11 DDRA_SRAS#
11 DDRA_SWE#
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
U44D
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
12 DDRB_SBS0
12 DDRB_SBS1
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
12 DDRB_SCAS#
12 DDRB_SRAS#
12 DDRB_SWE#
AJ15
AG17
AG21
SB_BS0#
SB_BS1#
SB_BS2#
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
AH14
AK14
AF15
AF14
AH16
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
DDR SYSTEM MEMORY B
SA_BS0#
SA_BS1#
SA_BS2#
DDR MEMORY SYSTEM A
AK15
AK16
AL21
11 DDRA_SBS0
11 DDRA_SBS1
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
INTEL Alviso DDR(3/5)

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
of
52
+1.05VS
U44F
U44E
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
+1.05VS
3900mA
D
+1.5VS
180mA
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
AC1
AC2
B23
C35
AA1
AA2
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
F17
E17
D18
C18
F18
E18
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
H18
G18
VCCD_TVDAC
VCCDQ_TVDAC
D19
H17
24mA
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
B26
B25
A25
60mA
VCCA_LVDS
A35
VCCHV0
VCCHV1
VCCHV2
B22
B21
A21
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
B28
A28
A27
+1.5VS
20mA
+2.5VS
10mA
60mA
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
AF20
AP19
AF19
AF18
+1.5VS_DDRDLL
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
AE37
W37
U37
R37
N37
L37
J37
+1.5VS_PEG
1000mA
C715 1
0.47U_0603_16V4Z
Y29
Y28
Y27
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
810mA
120mA
VCCA_TVBG
VSSA_TVBG
POWER
VCCA_3GBG
VSSA_3GBG
F37
G37
VCC_SYNC
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
+1.05VS
+3VS_DAC
+1.5VS_3GPLL
15mA
+2.5VS_3GBG
1
F19
E19
G19
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
70mA
+2.5VS
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
POWER
C682
0.47U_0603_16V4Z 2
1
C693
0.22U_0402_10V4Z 2
915PM@
ALVISO_BGA1257
1
C688
0.22U_0402_10V4Z 2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
C238
0.1U_0402_16V4Z
V1.8_DDR_CAP1
2
1
V1.8_DDR_CAP2
4000mA
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AM37
AH37
1
1
1
1
1
1
V1.8_DDR_CAP5
C212
C126
C224
AP29
AD28
+2.5V
C129
C214
C179
AD27
2
2
2
2
2
2
AC27
2200mA
22U_1206_16V4Z_V1
AP26
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
AN26
AM26
+2.5V
AL26
2200mA
AK26
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AJ26
AH26
1
AG26
1
1
1
1
1
1
1
1
+
C128
C204
C222
C217
AF26
AE26
C745
C168
C213
C180
C147
AP25
2
2
2
2
2
2
2
2
330U_D2E_2.5VM 2
AN25
AM25
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AL25
AK25
AJ25
AH25
AG25
+2.5VS
AF25
VCCHV(Ball A21,B21,B22)
AE25
AE24
AE23
AE22
1
1
1
1
1
1
C231
C232
C202
C206
C225
C223
AE21
AE20
AE19
2 0.1U_0402_16V4Z 2 0.01U_0402_16V7K 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z
AE18
AE17
AE16
AE15
AE14
VCCTX_LVDS(Ball A27,A28,B28)
VCCA_LVDS (Ball A35)
AP13
AN13
+2.5VS
AM13
VCCA_CRTDAC(Ball F19,E19)
AL13
AK13
AJ13
AH13
1
1
1
1
C189
C194
C200
C205
AG13
AF13
AE13
2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.022U_0402_16V7K
AP12
AN12
AM12
AL12
AK12
VCC_SYNC(Ball H20)
AJ12
AH12
AG12
VCCD_TVDAC (Ball D19)
+1.5VS
AF12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AE12
AD11
AC11
AB11
1
1
1
1
1
1
C127
C220
C218
C184
C185
C178
C181
AB10
0.1U_0402_16V4Z C120
AB9
0.1U_0402_16V4Z
1
AP8 V1.8_DDR_CAP6 2
2
2
2
2
2
4.7U_0805_10V4Z 2
2
1
AM1 V1.8_DDR_CAP4
2
1
AE1 V1.8_DDR_CAP3
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.022U_0402_16V7K
C689
0.1U_0402_16V4Z
C237
0.1U_0402_16V4Z
2
1
2
1
C227
0.1U_0402_16V4Z
915PM@
ALVISO_BGA1257
VCCD_LVDS(Ball A25,B25,B26)
VCCDQ_TVDAC (Ball H17)
+1.05VS
950mA
+1.5VS_DPLLA
L11
0_0603_5%
1
2
60mA
+1.5VS_DPLLB
+1.5VS_DDRDLL
L14
0_0603_5%
1
2
60mA
+1.5VS
+1.5VS_PEG
R129
0_0603_5%
1
2
+1.5VS
R160
0_0805_5%
1
2
+1.5VS
+1.5VS
2 2.2U_0603_6.3V6K
1
1
C208
C209
2 22U_1206_16V4Z_V12 0.1U_0402_16V4Z
+1.5VS_HPLL
L27
0_0603_5%
1
2
60mA
1
C690
C692
C235
C233
2 22U_1206_16V4Z_V12 0.1U_0402_16V4Z
+1.5VS_MPLL
60mA
1
C112
2 22U_1206_16V4Z_V1
+1.5VS_3GPLL
L7
0_0603_5%
1
2
+1.5VS
C190
C114
C221
2 0.1U_0402_16V4Z
R145
0.5_0603_1%
1
2+3GPLL
+1.5VS
1
C196
C243
2 22U_1206_16V4Z_V1
2 4.7U_0805_10V4Z
2 22U_1206_16V4Z_V12 0.1U_0402_16V4Z
2 22U_1206_16V4Z_V12 0.1U_0402_16V4Z
C244
2 4.7U_0805_10V4Z
+2.5VS_3GBG
L13
0_0603_5%
1
2
C170
2 2.2U_0603_6.3V6K
C198
2 2.2U_0603_6.3V6K
C173
2 2.2U_0603_6.3V6K
C234
470U_D2_2.5VM
L38
CHB1608U301_0603
1
2
+3VS
VCCA_TVDAC
+3VS_DAC
VCCA_TVBG (Ball H18)
1
1
R159
+1.5VS
2
0_0603_5%
+2.5VS
1
C226
C242
C130
2 10U_1206_16V4Z 2 0.1U_0402_16V4Z
C855 +
150U_D2_6.3VM
2
C241
0.1U_0402_16V4Z
1
1
C856 C857
C177
2
2
4.7U_0805_10V4Z
22U_1206_16V4Z_V1
C188
C187
2 0.022U_0402_16V7K 2
0.1U_0402_16V4Z
C195
2 0.022U_0402_16V7K
0.1U_0402_16V4Z
120mA
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
INTEL Alviso POWER(4/5)

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
of
52
U44H
U44I
+1.05VS
L12
M12
N12
P12
R12
T12
U12
V12
W12
L13
M13
N13
P13
R13
T13
U13
V13
W13
VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0
Y12
AA12
Y13
AA13
L14
M14
N14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AB15
L16
M16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AB16
R17
Y17
AA17
AB17
AA18
AB18
AA19
AB19
AA20
AB20
R21
Y21
AA21
AB21
Y22
AA22
AB22
Y23
AA23
AB23
Y24
AA24
AB24
Y25
AA25
AB25
Y26
AA26
AB26
VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0
V25
W25
L26
M26
N26
P26
R26
T26
U26
V26
W26
VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0
VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10
VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0
NCTF
+1.05VS
VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70
VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11
AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26
+2.5V
L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25
+1.05VS
Y1
D2
G2
J2
L2
P2
T2
V2
AD2
AE2
AH2
AL2
AN2
A3
C3
AA3
AB3
AC3
AJ3
C4
H4
L4
P4
U4
Y4
AF4
AN4
E5
W5
AL5
AP5
B6
J6
L6
P6
T6
AA6
AC6
AE6
AJ6
G7
V7
AA7
AG7
AK7
AN7
C8
E8
L8
P8
Y8
AL8
A9
H9
K9
T9
V9
AA9
AC9
AE9
AH9
AN9
D10
L10
Y10
AA10
F11
H11
Y11
VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
U44J
VSSALVDS
VSS
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
AL24
AN24
A26
E26
G26
J26
B27
E27
G27
W27
AA27
AB27
AF27
AG27
AJ27
AL27
AN27
E28
W28
AA28
AB28
AC28
A29
D29
E29
F29
G29
H29
L29
P29
U29
V29
W29
AA29
AD29
AG29
AJ29
AM29
C30
Y30
AA30
AB30
AC30
AE30
AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32
AA32
AB32
B36
AA11
AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0
AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37
Issued Date
Compal Secret Data

Title
Deciphered Date
5
INTEL Alviso POWER(5/5)

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
10
of
52
+2.5V
+2.5V
+DIMM_VREF
+2.5V
RP35
DDRA_SDQ0
DDRA_SDQ4
DDRA_DQ3
DDRA_DQ13
DDRA_DQ9
DDRA_DQS1
DDRA_DQ15
DDRA_DQ11
6 DDRA_CLK1
6 DDRA_CLK1#
DDRA_DQ16
DDRA_DQ20
DDRA_DQS2
DDRA_DQ18
DDRA_DQ22
DDRA_DQ25
DDRA_DQ29
DDRA_DQS3
DDRA_DQ27
DDRA_DQ30
DDRA_CKE1
6 DDRA_CKE1
DDRA_SMA12
DDRA_SMA9
DDRA_SMA7
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
DDRA_SCS#0
DDRA_SMA13
8 DDRA_SBS0
8 DDRA_SWE#
6 DDRA_SCS#0
DDRA_DQ36
DDRA_DQ33
B
DDRA_DQS4
DDRA_DQ38
DDRA_DQ35
DDRA_DQ41
DDRA_DQ44
DDRA_DQS5
DDRA_DQ46
DDRA_DQ47
DDRA_DQ52
DDRA_DQ53
DDRA_DQS6
DDRA_DQ54
DDRA_DQ50
DDRA_DQ60
DDRA_DQ56
DDRA_DQS7
DDRA_DQ57
DDRA_DQ62
A
D_CK_SDATA
D_CK_SCLK
12,14 D_CK_SDATA
12,14 D_CK_SCLK
+3VS
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRA_DQ0
DDRA_DQ4
1K_0402_1%
DDRA_DM0
DDRA_DQ6
DDRA_DQ2
DDRA_DQ8
DDRA_DQ12
DDRA_DM1
DDRA_DQ14
DDRA_DQ10
R170
1K_0402_1%
RP118
1
2
DDRA_SDQS0
DDRA_SDQ7
10_0404_4P2R_5%
RP115
1
4 DDRA_DQS0
2
3 DDRA_DQ7
DDRA_DQ2
DDRA_DQ8
DDRA_SDQ3
DDRA_SDQ13
10_0404_4P2R_5%
RP112
1
4 DDRA_DQ3
2
3 DDRA_DQ13
10_0404_4P2R_5%
RP32
4
1
3
2
DDRA_DQ12
DDRA_DM1
DDRA_SDQ9
DDRA_SDQS1
1
2
10_0404_4P2R_5%
RP31
4
1
3
2
DDRA_DQ14
DDRA_DQ10
DDRA_SDQ15
DDRA_SDQ11
4
3
1
2
10_0404_4P2R_5%
RP34
DDRA_SDM0
4
1
DDRA_SDQ6
3
2
10_0404_4P2R_5%
RP33
DDRA_SDQ2
4
1
DDRA_SDQ8
3
2
DDRA_SDQ12
DDRA_SDM1
C250
0.1U_0402_16V4Z
DDRA_SDQ14
DDRA_SDQ10
DDRA_DQ17
DDRA_DQ21
DDRA_DQ23
DDRA_DQ24
DDRA_DQ26
DDRA_DQ31
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1
DDRA_SRAS#
DDRA_SCAS#
DDRA_SCS#1
DDRA_DQ37
DDRA_DQ32
DDRA_DM4
DDRA_DQ39
DDRA_DQ42
DDRA_DQ43
DDRA_CLK2# 6
DDRA_CLK2 6
DDRA_DQ49
DDRA_DQ48
DDRA_DM6
DDRA_DQ55
DDRA_DQ51
DDRA_DQ61
DDRA_SMA6
DDRA_SMA4
1
2
56_0404_4P2R_5%
RP86
4
3
1
2
10_0404_4P2R_5%
RP106
4 DDRA_DQ15
3 DDRA_DQ11
DDRA_SMA2
DDRA_SMA0
1
2
56_0404_4P2R_5%
RP84
4
3
56_0404_4P2R_5%
RP82
4
3
10_0404_4P2R_5%
RP29
4
1
3
2
DDRA_DM2
DDRA_DQ19
DDRA_SDQS2
DDRA_SDQ18
1
2
10_0404_4P2R_5%
RP99
4 DDRA_DQS2
3 DDRA_DQ18
DDRA_SCAS#
DDRA_SCS#1
1
2
56_0404_4P2R_5%
RP80
4
3
10_0404_4P2R_5%
RP28
4
1
3
2
DDRA_DQ23
DDRA_DQ24
DDRA_SDQ22
DDRA_SDQ25
1
2
10_0404_4P2R_5%
RP97
4 DDRA_DQ22
3 DDRA_DQ25
DDRA_SMA12
DDRA_SMA9
DDRA_SDQ29
DDRA_SDQS3
10_0404_4P2R_5%
RP94
1
4 DDRA_DQ29
2
3 DDRA_DQS3
2
1
DDRA_SMA7
DDRA_SMA5
56_0404_4P2R_5%
RP22
2
3
1
4
DDRA_SMA3
DDRA_SMA1
2
1
56_0404_4P2R_5%
RP20
3
4
DDRA_SMA10
DDRA_SBS0
2
1
56_0404_4P2R_5%
RP18
3
4
DDRA_SWE#
DDRA_SCS#0
2
1
56_0404_4P2R_5%
RP16
3
4
DDRA_SMA13
1
R112
1
R138
1
R544
DDRA_DQ28
DDRA_DM3
DDRA_DQ26
DDRA_DQ31
DDRA_SDQ27
DDRA_SDQ30
10_0404_4P2R_5%
RP91
1
4 DDRA_DQ27
2
3 DDRA_DQ30
10_0404_4P2R_5%
RP15
4
1
3
2
DDRA_DQ37
DDRA_DQ32
DDRA_SDQ36
DDRA_SDQ33
1
2
10_0404_4P2R_5%
RP77
4 DDRA_DQ36
3 DDRA_DQ33
10_0404_4P2R_5%
RP14
4
1
3
2
DDRA_DM4
DDRA_DQ39
DDRA_SDQS4
DDRA_SDQ38
1
2
10_0404_4P2R_5%
RP74
4 DDRA_DQS4
3 DDRA_DQ38
10_0404_4P2R_5%
RP13
4
1
3
2
DDRA_DQ34
DDRA_DQ45
DDRA_SDQ35
DDRA_SDQ41
1
2
10_0404_4P2R_5%
RP72
4 DDRA_DQ35
3 DDRA_DQ41
DDRA_SDQ37
DDRA_SDQ32
DDRA_SDQ34
DDRA_SDQ45
10_0404_4P2R_5%
RP12
DDRA_SDQ40
4
1
DDRA_SDM5
3
2
DDRA_DQ40
DDRA_DM5
DDRA_SDQ44
DDRA_SDQS5
10_0404_4P2R_5%
RP69
1
4 DDRA_DQ44
2
3 DDRA_DQS5
10_0404_4P2R_5%
RP11
4
1
3
2
DDRA_DQ42
DDRA_DQ43
DDRA_SDQ46
DDRA_SDQ47
1
2
DDRA_SDQ52
DDRA_SDQ53
10_0404_4P2R_5%
RP62
1
4 DDRA_DQ52
2
3 DDRA_DQ53
DDRA_DQ49
DDRA_DQ48
DDRA_DM6
DDRA_DQ55
DDRA_SDQS6
DDRA_SDQ54
10_0404_4P2R_5%
RP60
1
4 DDRA_DQS6
2
3 DDRA_DQ54
10_0404_4P2R_5%
RP8
DDRA_SDQ51
4
1
DDRA_SDQ61
3
2
DDRA_DQ51
DDRA_DQ61
DDRA_SDQ50
DDRA_SDQ60
1
2
10_0404_4P2R_5%
RP57
4 DDRA_DQ50
3 DDRA_DQ60
10_0404_4P2R_5%
RP7
DDRA_SDQ58
4
1
DDRA_SDM7
3
2
DDRA_DQ58
DDRA_DM7
DDRA_SDQ56
DDRA_SDQS7
10_0404_4P2R_5%
RP54
1
4 DDRA_DQ56
2
3 DDRA_DQS7
10_0404_4P2R_5%
RP6
4
1
3
2
DDRA_DQ63
DDRA_DQ59
DDRA_SDQ57
DDRA_SDQ62
1
2
DDRA_SDQ63
DDRA_SDQ59
10_0404_4P2R_5%
56_0404_4P2R_5%
RP24
DDRA_CKE1
DDRA_CKE0
DDRA_DQ[0..63] 12
DDRA_DM[0..7]
DDRA_DM[0..7] 12
DDRA_DQS[0..7]
DDRA_DQS[0..7] 12
DDRA_SDQ[0..63]
8 DDRA_SDQ[0..63]
DDRA_SDM[0..7]
8 DDRA_SDM[0..7]
DDRA_SDQS[0..7]
8 DDRA_SDQS[0..7]
DDRA_SMA[0..13]
8 DDRA_SMA[0..13]
10_0404_4P2R_5%
RP51
4 DDRA_DQ57
3 DDRA_DQ62
10_0404_4P2R_5%
Compal Secret Data
2005/03/01
2006/03/01
Deciphered Date
4
2
56_0402_5%
2
56_0402_5%
2
56_0402_5%
Issued Date
DDRA_DQ[0..63]
AMP_1565917-1
DIMM0
3
4
56_0404_4P2R_5%
10_0404_4P2R_5%
RP66
4 DDRA_DQ46
3 DDRA_DQ47
10_0404_4P2R_5%
RP9
DDRA_SDM6
4
1
DDRA_SDQ55
3
2
DDRA_DQ58
DDRA_DM7
DDRA_DQ63
DDRA_DQ59
10_0404_4P2R_5%
RP109
4 DDRA_DQ9
3 DDRA_DQS1
1
2
10_0404_4P2R_5%
RP10
DDRA_SDQ49
4
1
DDRA_SDQ48
3
2
DDRA_DQ40
DDRA_DM5
4
3
DDRA_SBS1
DDRA_SRAS#
DDRA_SDQ42
DDRA_SDQ43
DDRA_DQ34
DDRA_DQ45
1
2
10_0404_4P2R_5%
RP102
4 DDRA_DQ16
3 DDRA_DQ20
DDRA_SDM4
DDRA_SDQ39
DDRA_SBS1 8
DDRA_SRAS# 8
DDRA_SCAS# 8
DDRA_SCS#1 6
RP87
DDRA_SMA11
DDRA_SMA8
10_0404_4P2R_5%
RP26
DDRA_SDQ26
4
1
DDRA_SDQ31
3
2
DDRA_SMA11
DDRA_SMA8
+1.25VS
1
2
DDRA_SDQ23
DDRA_SDQ24
DDRA_CKE0 6
DDRA_DQ1
DDRA_DQ5
DDRA_SDQ16
DDRA_SDQ20
10_0404_4P2R_5%
RP27
DDRA_SDQ28
4
1
DDRA_SDM3
3
2
DDRA_CKE0
DDRA_DM0
DDRA_DQ6
4
3
DDRA_DQ17
DDRA_DQ21
DDRA_SDM2
DDRA_SDQ19
DDRA_DQ28
DDRA_DM3
DDRA_DQ0
DDRA_DQ4
10_0404_4P2R_5%
RP30
4
1
3
2
DDRA_SDQ17
DDRA_SDQ21
DDRA_DM2
DDRA_DQ19
DDRA_SDQ1
DDRA_SDQ5
R168
DDRA_DQS0
DDRA_DQ7
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DDRA_DQ1
DDRA_DQ5
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
JP25
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Title
DDR-SODIMM0
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
11
of
52
+2.5V
+2.5V
+DIMM_VREF
JP12
+1.25VS
DDRA_DQ0
DDRA_DQ4
1
2
56_0404_4P2R_5%
RP114
1
4
2
3
RP116
56_0404_4P2R_5%
DDRA_DM0
DDRA_DQ6
1
2
56_0404_4P2R_5%
RP111
4
3
RP113
56_0404_4P2R_5%
DDRA_DQ2
DDRA_DQ8
RP110
56_0404_4P2R_5%
DDRA_DQ12
DDRA_DM1
56_0404_4P2R_5%
RP108
1
4
2
3
56_0404_4P2R_5%
RP105
1
4
2
3
RP107
56_0404_4P2R_5%
RP104
56_0404_4P2R_5%
DDRA_DQ17
DDRA_DQ21
56_0404_4P2R_5%
RP101
1
4
2
3
RP103
56_0404_4P2R_5%
DDRA_DM2
DDRA_DQ19
56_0404_4P2R_5%
RP98
1
4
2
3
1
2
56_0404_4P2R_5%
RP95
4
3
RP100
56_0404_4P2R_5%
DDRA_DQ23
DDRA_DQ24
RP96
56_0404_4P2R_5%
DDRA_DQ28
DDRA_DM3
56_0404_4P2R_5%
RP92
1
4
2
3
RP93
56_0404_4P2R_5%
DDRA_DQ26
DDRA_DQ31
56_0404_4P2R_5%
RP89
1
4
2
3
1
2
56_0404_4P2R_5%
RP25
4
3
RP90
56_0404_4P2R_5%
DDRB_SMA11
DDRB_SMA8
RP88
56_0404_4P2R_5%
DDRB_SMA6
DDRB_SMA4
56_0404_4P2R_5%
RP23
1
4
2
3
RP85
56_0404_4P2R_5%
DDRB_SMA2
DDRB_SMA0
56_0404_4P2R_5%
RP21
1
4
2
3
RP83
56_0404_4P2R_5%
DDRB_SBS1
DDRB_SRAS#
56_0404_4P2R_5%
RP19
1
4
2
3
RP81
56_0404_4P2R_5%
DDRB_SCAS#
DDRB_SCS#1
56_0404_4P2R_5%
RP17
1
4
2
3
RP79
56_0404_4P2R_5%
DDRA_DQ37
DDRA_DQ32
56_0404_4P2R_5%
RP76
1
4
2
3
56_0404_4P2R_5%
RP73
4
3
RP78
56_0404_4P2R_5%
DDRA_DQ14
DDRA_DQ10
4
3
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
4
3
1
2
DDRA_DM4
DDRA_DQ39
1
2
1
2
4
3
1
2
4
3
1
2
DDRA_DQ34
DDRA_DQ45
1
2
56_0404_4P2R_5%
RP70
4
3
RP75
56_0404_4P2R_5%
RP71
56_0404_4P2R_5%
DDRA_DQ40
DDRA_DM5
56_0404_4P2R_5%
RP67
1
4
2
3
4
3
1
2
4
3
1
2
1
2
56_0404_4P2R_5%
RP64
4
3
RP68
56_0404_4P2R_5%
DDRA_DQ42
DDRA_DQ43
1
2
56_0404_4P2R_5%
RP61
4
3
RP65
56_0404_4P2R_5%
DDRA_DQ49
DDRA_DQ48
56_0404_4P2R_5%
4
3
1
2
4
3
1
2
DDRA_DQS0
DDRA_DQ7
DDRA_DQS[0..7]
11 DDRA_DQS[0..7]
8 DDRB_SMA[0..13]
DDRA_DQ3
DDRA_DQ13
DDRB_SMA[0..13]
DDRA_DQS0
DDRA_DQ7
DDRA_DQ9
DDRA_DQS1
DDRA_DQ15
DDRA_DQ11
DDRA_DQ3
DDRA_DQ13
6 DDRB_CLK1
6 DDRB_CLK1#
DDRA_DQ9
DDRA_DQS1
DDRA_DQ16
DDRA_DQ20
DDRA_DQS2
DDRA_DQ18
DDRA_DQ15
DDRA_DQ11
DDRA_DQ22
DDRA_DQ25
DDRA_DQ16
DDRA_DQ20
DDRA_DQ29
DDRA_DQS3
DDRA_DQ27
DDRA_DQ30
DDRA_DQS2
DDRA_DQ18
DDRA_DQ22
DDRA_DQ25
DDRA_DQ29
DDRA_DQS3
DDRA_DQ27
DDRA_DQ30
+1.25VS
DDRB_SMA10
1
R294
DDRB_CKE1
1
R545
DDRB_CKE0
1
R136
2
56_0402_5%
2
56_0402_5%
2
56_0402_5%
6 DDRB_CKE1
1
2
DDRA_DM6
DDRA_DQ55
56_0404_4P2R_5%
RP55
4
1
3
2
DDRB_SMA7
DDRB_SMA5
DDRA_DQ51
DDRA_DQ61
56_0404_4P2R_5%
RP52
4
1
3
2
DDRB_SMA3
DDRB_SMA1
DDRA_DQ58
DDRA_DM7
DDRB_SBS0
DDRB_SWE#
56_0404_4P2R_5%
RP49
4
1
3
2
DDRB_SMA7
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
8 DDRB_SBS0
8 DDRB_SWE#
6 DDRB_SCS#0
4
3
1
2
DDRA_DQS4
DDRA_DQ38
DDRA_DQ63
DDRA_DQ59
DDRA_DQ35
DDRA_DQ41
DDRA_DQ44
DDRA_DQS5
DDRA_DQS6
DDRA_DQ54
DDRA_DQ46
DDRA_DQ47
RP59
56_0404_4P2R_5%
4
3
DDRA_DQ36
DDRA_DQ33
1
2
DDRA_DQ50
DDRA_DQ60
RP56
56_0404_4P2R_5%
4
3
DDRA_DQS4
DDRA_DQ38
1
2
DDRA_DQ52
DDRA_DQ53
DDRA_DQ56
DDRA_DQS7
DDRA_DQS6
DDRA_DQ54
RP53
56_0404_4P2R_5%
4
3
DDRA_DQ35
DDRA_DQ41
1
2
DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCS#0
DDRB_SMA13
DDRA_DQ36
DDRA_DQ33
56_0404_4P2R_5%
56_0404_4P2R_5%
DDRB_SCS#0
DDRB_SMA13
DDRB_CKE1
DDRB_SMA12
DDRB_SMA9
RP58
4
3
DDRB_SMA12
DDRB_SMA9
4
3
DDRA_DM[0..7]
11 DDRA_DM[0..7]
DDRA_DQ1
DDRA_DQ5
DDRA_DQ1
DDRA_DQ5
DDRA_DQ[0..63]
11 DDRA_DQ[0..63]
56_0404_4P2R_5%
RP117
DDRA_DQ50
DDRA_DQ60
DDRA_DQ57
DDRA_DQ62
DDRA_DQ56
DDRA_DQS7
RP50
DDRA_DQ57
DDRA_DQ62
DDRA_DQ44
DDRA_DQS5
11,14 D_CK_SDATA
11,14 D_CK_SCLK
D_CK_SDATA
D_CK_SCLK
+3VS
DDRA_DQ46
DDRA_DQ47
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDRA_DQ0
DDRA_DQ4
DDRA_DM0
DDRA_DQ6
0.1U_0402_16V4Z
DDRA_DQ2
DDRA_DQ8
D
DDRA_DQ12
DDRA_DM1
DDRA_DQ14
DDRA_DQ10
DDRA_DQ17
DDRA_DQ21
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRA_DM2
DDRA_DQ19
DDRA_DQ23
DDRA_DQ24
DDRA_DQ28
DDRA_DM3
DDRA_DQ26
DDRA_DQ31
DDRB_CKE0
DDRB_CKE0 6
DDRB_SMA11
DDRB_SMA8
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1
DDRB_SRAS#
DDRB_SCAS#
DDRB_SCS#1
DDRB_SBS1 8
DDRB_SRAS# 8
DDRB_SCAS# 8
DDRB_SCS#1 6
DDRA_DQ37
DDRA_DQ32
DDRA_DM4
DDRA_DQ39
DDRA_DQ34
DDRA_DQ45
B
DDRA_DQ40
DDRA_DM5
DDRA_DQ42
DDRA_DQ43
DDRB_CLK2# 6
DDRB_CLK2 6
DDRA_DQ49
DDRA_DQ48
DDRA_DM6
DDRA_DQ55
DDRA_DQ51
DDRA_DQ61
DDRA_DQ58
DDRA_DM7
DDRA_DQ63
DDRA_DQ59
+3VS
AMP_1565917-1
DDRA_DQ52
DDRA_DQ53
RP63
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
C263
Title
DDR-SODIMM1
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
12
of
52
Layout note :
Distribute as close as possible
to DDR-SODIMM.
1
+2.5V
1
C110
0.1U_0402_16V4Z
1
C119
0.1U_0402_16V4Z
1
C123
0.1U_0402_16V4Z
1
C216
0.1U_0402_16V4Z
+2.5V
1
C230
0.1U_0402_16V4Z
1
C248
0.1U_0402_16V4Z
1
C324
0.1U_0402_16V4Z
1
C680
0.1U_0402_16V4Z
C683
0.1U_0402_16V4Z
+2.5V
1
C705
0.1U_0402_16V4Z
1
C762
0.1U_0402_16V4Z
1
C783
0.1U_0402_16V4Z
1
C795
0.1U_0402_16V4Z
+
2
C684
150U_D2_6.3VM
C799
150U_D2_6.3VM
Layout note :
Place one cap close to every 2 pull up resistors termination to

+1.25V
+1.25VS
1
C737
0.1U_0402_16V4Z
1
C695
0.1U_0402_16V4Z
1
C697
0.1U_0402_16V4Z
1
C183
0.1U_0402_16V4Z
1
C191
0.1U_0402_16V4Z
1
C700
0.1U_0402_16V4Z
1
C703
0.1U_0402_16V4Z
C711
0.1U_0402_16V4Z
+1.25VS
1
C717
0.1U_0402_16V4Z
1
C721
0.1U_0402_16V4Z
1
C724
0.1U_0402_16V4Z
1
C734
0.1U_0402_16V4Z
1
C741
0.1U_0402_16V4Z
1
C746
0.1U_0402_16V4Z
1
C203
0.1U_0402_16V4Z
C763
0.1U_0402_16V4Z
+1.25VS
1
C767
0.1U_0402_16V4Z
1
C771
0.1U_0402_16V4Z
1
C780
0.1U_0402_16V4Z
1
C768
0.1U_0402_16V4Z
1
C798
0.1U_0402_16V4Z
1
C811
0.1U_0402_16V4Z
1
C816
0.1U_0402_16V4Z
C823
0.1U_0402_16V4Z
+1.25VS
+1.25VS
1
1
1
C701
0.1U_0402_16V4Z
1
C720
0.1U_0402_16V4Z
1
C723
0.1U_0402_16V4Z
1
C725
0.1U_0402_16V4Z
1
C731
0.1U_0402_16V4Z
1
C712
0.1U_0402_16V4Z
1
C744
0.1U_0402_16V4Z
C772
0.1U_0402_16V4Z
1
C199
0.1U_0402_16V4Z
1
C685
0.1U_0402_16V4Z
1
C696
0.1U_0402_16V4Z
C698
0.1U_0402_16V4Z
+1.25VS
1
C782
0.1U_0402_16V4Z
1
C797
0.1U_0402_16V4Z
1
C808
0.1U_0402_16V4Z
1
C814
0.1U_0402_16V4Z
1
C818
0.1U_0402_16V4Z
1
C169
0.1U_0402_16V4Z
1
C174
0.1U_0402_16V4Z
C150
0.1U_0402_16V4Z
Compal Secret Data
2005/03/01
Issued Date
2006/03/01
Deciphered Date
A

Title
DDR SODIMM Decoupling

Size
Document Number
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
13
of
52
change 0 ohm
+CLK_VDD48
FSC
FSB
FSA
CLKSEL0
CLKSEL1
CLKSEL2
CPU SRC PCI

MHz MHz MHz
C117
2 2.2U_0603_6.3V6K
100
100
33.3
133
100
33.3
166
100
33.3
200
100
33.3
+CLK_VDDREF
L6
KC FBM-L11-201209-221LMAT_0805
1
2
1
+3VS
C115
2 0.047U_0402_16V7K
C118
0.047U_0402_16V7K
C107
2.2U_0603_6.3V6K
Clock Generator
+CLK_VDD1
40mil
1
1
C116
0.047U_0402_16V7K
1
C109
0.047U_0402_16V7K
1
C105
0.047U_0402_16V7K
C106
0.047U_0402_16V7K
+CLK_VCCA
+CLK_VDD1
U40
+CLK_VDD2
21
28
34
+3VS
R508
CLKSEL2
2
10K_0402_5%
CLK_PCI0
2
10K_0402_5%
C716
Y6
33P_0402_50V8J 14.318MHZ_16PF_DSX840GA
1
2
CLK_PCI2
2
10K_0402_5%
C713
33P_0402_50V8J
1
2
CLK_ICH_48M R498 1
1
R100
42
2 +CLK_VDDREF
48
1_0402_5%
15mil
VDDCPU
VDDREF
1
R99
2 +CLK_VDD48
11
2.2_0402_5%
15mil
VDD48
R502
CLK_PCI1
2
10K_0402_5%
25 CLK_ICH_48M
2
CLK_SD_48M
31 CLK_SD_48M
36 CLK_14M_CODEC
29 CLK_PCI_LAN
34 CLK_PCI_MINI
35 CLK_PCI_SIO
31 CLK_PCI_PCM
39 CLK_PCI_LPC
23 CLK_PCI_ICH
11,12 D_CK_SCLK
11,12 D_CK_SDATA
CLK_PCI_LAN
CLK_PCI_MINI
CLK_PCI_SIO
CLK_PCI_PCM
CLK_PCI_LPC
CLK_PCI_ICH
CLK_X1
50
CLK_X2
49
X2
CLKSEL2
CLKSEL0
12
53
FS_A/USB_48MHz
REF1/FSLC/TEST_SEL
CLKSEL1
16
FSLB/TEST_MODE
2 12_0402_5%
R497 1 5IN1@ 2 12_0402_5%

R800 1
2 33_0402_5%
55
STP_PCI#
CPU_STOP#
54
STP_CPU#
R479 1
2 33_0402_5%
CLK_MCH_BCLK
CLK_CPU1# R472 1
2 33_0402_5%
CLK_MCH_BCLK#
2
G
S
3
S
2
G
CK_SDATA
25
C122
2 2.2U_0603_6.3V6K
C124
C125
2 0.047U_0402_16V7K 2 0.047U_0402_16V7K
CPUCLKT0
44
CLK_CPU0
R493 1
2 33_0402_5%
CLK_CPU_BCLK
CPUCLKC0
43
CLK_CPU0# R489 1
2 33_0402_5%
CLK_CPU_BCLK#
CPUCLKT2_ITP/PCIEXT6
36
CPUCLKC2_ITP/PCIEXC6
35
CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
PCICLK4
PEREQ1#/PCIEXT5
33
PCICLK3
PEREQ2#/PCIEXC5
32
CLK_PCI2
56
CLK_PCI1
1
R507
2
33_0402_5%
CLK_PCI0
D_CK_SCLK
46
D_CK_SDATA
47
2 CLKIREF
39
475_0402_1% 15mil
13
PCICLK2/REQ_SEL
PCIEXT4
31
PCIEXC4
30
SELPCIEX_LCDCLK#/PCICLK_F1
CLK_PCIE_SATA
ITP_EN/PCICLK_F0
SATACLKT
26
CLK_SRC4
R443 1
2 33_0402_5%
CLK_PCIE_SATA
SCLK
SATACLKC
27
CLK_SRC4# R440 1
2 33_0402_5%
CLK_PCIE_SATA#
PCIEXT3
24
CLK_SRC3
R453 1
2 33_0402_5%
CLK_MCH_3GPLL
PCIEXC3
25
CLK_SRC3# R445 1
2 33_0402_5%
CLK_MCH_3GPLL#
PCIEXT2
22
CLK_SRC2
R463 1
2 33_0402_5%
CLK_PCIE_VGA
PCIEXC2
23
CLK_SRC2# R457 1
2 33_0402_5%
CLK_PCIE_VGA#
PCIEXT1
19
CLK_SRC1
R476 1
2 33_0402_5%
CLK_PCIE_ICH
PCIEXC1
20
CLK_SRC1# R468 1
2 33_0402_5%
CLK_PCIE_ICH#
R486 1
2 33_0402_5%
CLK_DREF_SSC
SDATA
CLK_PCIE_SATA 24
CLK_PCIE_SATA# 24
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
IREF
CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
CLK_PCIE_ICH 25
CLK_PCIE_ICH# 25
GND_0
29
GND_1
LCDCLK_SS/PCIEX0T
17
CLK_SRC0
GND_2
LCDCLK_SS/PCIEX0C
18
CLK_SRC0# R481 1
2 33_0402_5%
CLK_DREF_SSC#
45
GND_3
DOTT_96MHz
DOTC_96MHz
14
15
CLK_DOT
CLK_DOT#
2 33_0402_5%
2 33_0402_5%
CLK_DREF_96M
CLK_DREF_96M#
51
GND_4
GND_5
R495 1
R490 1
+3VS
1
R444
CLK_PCIE_SATA# 1
R441
CLK_MCH_3GPLL 1
R454
CLK_MCH_3GPLL# 1
R446
CLK_PCIE_VGA
1
R464
CLK_PCIE_VGA# 1
R458
CLK_PCIE_ICH
1
R477
CLK_PCIE_ICH#
1
R469
CLK_DREF_SSC 1
R487
CLK_DREF_SSC# 1
R482
CLK_DREF_96M
1
R496
CLK_DREF_96M# 1
R491
delete pci E clock for Lan
D_CK_SDATA
delete ITP clock
1
R98
CLK_DREF_SSC 6
CLK_DREF_SSC# 6
CLK_DREF_96M 6
CLK_DREF_96M# 6
2
10K_0402_5%
VGATE
10
REF0
52
VTT_POWERGD#
CLK_REF
ICS954226AGT_TSSOP56
R91
@ 1K_0402_5%
1
R500
CLK_14M_SIO
2
12_0402_5%
CLK_14M_SIO 35
1
R505
CLK_ICH_14M
2
12_0402_5%
CLK_ICH_14M 25
3
S
VTT_PWRGD#/PD
Q7
2N7002_SOT23
R92
@ 1K_0402_5%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
delete pci E clock for Lan
CLK_PCI3
+1.05VS
CLK_MCH_BCLK 1
R478
CLK_MCH_BCLK# 1
R471
CLK_CPU_BCLK
1
R492
CLK_CPU_BCLK# 1
R488
delete ITP clock
CLK_PCI4
+1.05VS
CLK_MCH_BCLK 6
X1
PCICLK5
R103
4.7K_0402_5%
1
2
+3VS
40mil
PM_STP_CPU# 25,50
CLK_CPU1
+3VS
+CLK_VDD2
L28
KC FBM-L11-201209-221LMAT_0805
1
2
PM_STP_PCI# 25
41
CLK_PCI5
Q5
2N7002_SOT23
C108
2 0.047U_0402_16V7K
40
R97
4.7K_0402_5%
1
2
+3VS
CK_SCLK
change 0 ohm
+3VS
CPUCLKT1
+3VS
25
+CLK_VDD1
CPUCLKC1
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
D_CK_SCLK
1
2
R88
2.2_0402_5%
C111
2 2.2U_0603_6.3V6K
PCI/SRC_STOP#
37
38
1
R520
1
R521
1
R522
1
R515
1
R501
1
R461
VDDA
GNDA
VDDPCI_0
VDDPCI_1
+CLK_VDD1
R101
VDDPCIEX_0
VDDPCIEX_1
VDDPCIEX_2
40mil
6,25,50
2
G
R499
1
7
Q6
2N7002_SOT23
1
R90
@ 0_0402_5%
R85
0_0402_5%
1
2
2
R86
0_0402_5%
MCH_CLKSEL0 6
CPU_BSEL0 5
R93
4.7K_0402_5%
CLKSEL1 1
2
1
R96
@ 0_0402_5%
R94
4.7K_0402_5%
CLKSEL0 1
2
R95
0_0402_5%
1
2
2
R89
0_0402_5%
MCH_CLKSEL1 6
CPU_BSEL1 5
Issued Date
Compal Secret Data
2005/03/01
2006/03/01
Deciphered Date
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS1.0
SHEET NOR THE INFORMATION IT CONTAINS
A
Title
Clock Generator
Size
Document Number
R ev
EAL30 LA-2691
, 03, 2005
Date:
G
Sheet
14
H
of
52
U6A
1
1
1
1
1
1
1
1
1
1
1
+1.2VS
R272
8,31,35,39 PLT_RST#
2
0_0402_5%
2
G
+3VS
2N7002_SOT23
PM@
S
22 VGA_TV_LUMA
22 VGA_TV_CRMA
2N7002_SOT23
PM@
150_0402_1%2
2
150_0402_1%
R258 1 PM@
R259 1 PM@
R262 2 PM@
2 150_0402_1%
2 100_0402_1%
1 10K_0402_1%
R263 1
2 10K_0402_5%
@
R_PLTRST_VGA#
PM@ 2
1
R264
1K_0402_5%
PM@ 1
2
R266
715_0402_1%
VGA_TV_LUMA
VGA_TV_CRMA
VGA_COMPS
PM@ 2
1
R269 75_0402_5%
2
G
3
R268
1
2
PM@ 0_0402_5%
25 PLTRST_VGA#
Q30
R261
100K_0402_5%
PM@
2
Q29
PM@
R260
100K_0402_5%
CLK_PCIE_VGA
CLK_PCIE_VGA#
14 CLK_PCIE_VGA
14 CLK_PCIE_VGA#
+3VS
PM@ 1 R273
1
PM@
R274
VGA_TV_LUMA
VGA_TV_CRMA
2
1
10K_0402_5%
R79
PM@
XTALIN
1
2
121_0603_1%
PM@
OSC_IN
R277
PM@ 1
2
R280
1K_0402_5%
PCIE_REFCLKP
PCIE_REFCLKN
AC23
AB24
AB23
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
AE25
PCIE_TESTIN
AD25
AD24
PWRGD
PWRGD_MASK
AH21
R2SET
AK21
AJ22
AK22
Y_G
C_R_PR
COMP_B_PB
AJ24
AK24
H2SYNC
V2SYNC
AG22
AG23
DDC3CLK
DDC3DATA
AJ23
AH24
SSIN
SSOUT
AH28
AJ29
XTALIN
XTALOUT
AH27
E8
B6
AF25
TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST
R71
PM@
71.5_0402_1%
AF27
AE27
2
1
R282PM@ 10K_0402_5%
AH25
STEREOSYNC
M24P_BGA708 M24@
1
R20
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
AJ10
AK10
AJ11
AH11
MEM_ID0
MEM_ID1
MEM_ID2
R250 1
R251 1
R252 1
DEFAULT : 0
GPIO(3:2)
DEFAULT : 00
00: PCI Express 1.0A mode
01: Kyrene-compatible mode
10: PCI Express 1.0 mode
11: PCI Express 1.0A mode and short-circuit internal
loopback mode (Rx connected directly to Tx of PHY)
GPIO4
Transmitter Extra Current

PCI-E Lane Reversal Enable
DEFAULT : 0
2 @ 10K_0402_5%
2 @ 10K_0402_5%
2 @ 10K_0402_5%
GPIO5
Force chip to go to compliance state quickly

for test purposes
DEFAULT : 0
+3VS
GPIO6
Reduced PLL bandwidth
DEFAULT : 0
Vedio Memory Config.

MEM_ID0
R2531 PM@
2 4.7K_0402_5%
+3VS
VGA_LCD_DATA 21
VGA_LCD_CLK 21
R2541 PM@
R2551
2 4.7K_0402_5%
+3VS
2@ 10K_0402_5%
RESRRVED FOR M24 TEST
8
+3VS
7
6
5
10K_0804_8P4R_5%
PM@
+VREFG
AG4
AH15
AH16
AJ16
AJ17
AJ18
AK18
AJ20
AJ21
AK19
AJ19
AG16
AG17
AF16
AF17
AE18
AE19
AF19
AF20
AG19
AG20
AE12
AG12
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
DDC2CLK
DDC2DATA
HPD1
AE13
AE14
AF12
R
G
B
HSYNC
VSYNC
AK27
AJ27
AJ26
AJ25
AK25
VGA_TXOUT0VGA_TXOUT0+
21
21
21
21
21
21
PM@
64MB
4Mx32 Samsung
x4
32MB
4Mx32 Hynix
x2
64MB
4Mx32 Hynix
x4
AH26 DAC_RSET
AG25
AF24
AG24
21
7,39
PM@
PM@
C361
2
AF11
AE11
PM@
x2
128MB
8Mx32 Hynix
x4
32MB
4Mx32 Samsung
x2
+3VS
B
Spread spectrum
0.1U_0402_16V4ZL19
CHB1608U301_0603
PM@
PM@
C865
U22
2
1
7 VDD
REF
OSC_IN
XIN MODOUT
XOUT
NC
VSS
PD#
PM@ 2 OSC_SPREAD
1
R275
22_0402_5%
2
1
R276
@ 10K_0402_5%
2
1
R278
@ 10K_0402_5%
ASM3P1819N-SR_SO8
PM@
2 499_0402_1%
VGA_DDC_DATA 22
VGA_DDC_CLK 22
R2812
x4
8Mx32 Hynix
64MB
R257
C360
PM@
VGA_CRT_R 22
VGA_CRT_G 22
VGA_CRT_B 22
VGA_CRT_HSYNC 22
VGA_CRT_VSYNC 22
R279 1 PM@
8Mx32 Samsung
Default 128MB
ATI suggest 100 ohm

Current Value same as EAT10
PM@
10U_0805_10V4Z
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
64MB
x2
1 PM@
2
R267
150_0402_1%
1 PM@
2
R270
150_0402_1%
1 PM@
2
R271
150_0402_1%
VGA_CRT_B
Vendor Chips
8Mx32 Samsung
+VREFG
ENVDD
ENBKL
VGA_CRT_G
Size
10K_0402_5%
VGA_CRT_R
(VGA Internal PD) 1.8V only
MEM_ID2
1 R256
+3VS
1K_0402_1%
VGA_TZCLK- 21
VGA_TZCLK+ 21
ENVDD
MEM_ID1
Place +VREFG divider Res

and decoupling Cap close
to Ball AG4
VGA_TXCLK- 21
VGA_TXCLK+ 21
VGA_TZOUT0- 21
VGA_TZOUT0+ 21
VGA_TZOUT1- 21
VGA_TZOUT1+ 21
VGA_TZOUT2- 21
VGA_TZOUT2+ 21
R265 1
M22 Core speed MAX 300MHz

M24 Core speed MAX 400MHz
(15mils)
AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12
DPLUS
DMINUS
Transmitter De-emphasis Enable
POWER_SEL 47
1
2
3
4
RP36
DIGON
BLON
RSET
DDC1DATA
DDC1CLK
GPIO_AUXWIN
2
PM@ 10K_0402_5%
OSC_SPREAD
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
DEFAULT : 1
GPIO1
AE10
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DPVDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
VREFG
Full Transmitter Output Swing Power
POWER_SEL(High 3.3V):VDDC=1.05V
(Low 0V ):VDDC=1.20V
POWER_SEL
0:Disable, 1:Enable
GPIO0
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
General Straping (VGA Internal PD)
+3VS
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
AF26
AE26
AC25
AB25
AC27
AB27
AC26
AB26
Y25
W25
Y27
W27
Y26
W26
U25
T25
U27
T27
U26
T26
P25
N25
P27
N27
P26
N26
L25
K25
L27
K27
L26
K26
2
2
2
2
2
2
2
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
PCIE_GTX_MRX_P4
PCIE_GTX_MRX_N4
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N5
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N13
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N15
PM@
@
@
@
@
@
@
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
2 0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
1
1
1
1
1
R243
R244
R245
R246
R247
R248
R249
1K_0402_1%
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
PM@ 1
2 PM@
DVOMODE
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
VGA_GPIO3
VGA_GPIO4
VGA_GPIO5
VGA_GPIO6
AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2
0.1U_0402_16V4Z
C666
C665
C644
C643
C664
C663
C642
C641
C662
C661
C640
C639
C660
C659
C638
C637
C658
C657
C636
C635
C656
C655
C634
C633
C654
C653
C646
C645
C652
C651
C632
C631
DVO / EXT TMDS / GPIO
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
PCI EXPRESS
7 PCIE_MTX_C_GRX_P[0:15]
LVDS
7 PCIE_MTX_C_GRX_N[0:15]
TMDS
7 PCIE_GTX_C_MRX_P[0..15]
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO_PWRCNTL
GPIO_MEMSSIN
Part 1 of 5
DAC2
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
CLK SS
7 PCIE_GTX_C_MRX_N[0..15]
AH30
AG30
AG29
AF29
AE29
AE30
AD30
AD29
AC29
AB29
AB30
AA30
AA29
Y29
W29
W30
V30
V29
U29
T29
T30
R30
R29
P29
N29
N30
M30
M29
L29
K29
K30
J30
THERM DAC1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
1 10K_0402_5%
Y1
If GPIO_AUXWIN not used,

pulled it to GND.
Voltage divider
Reduce Voltage from 3.3V to 1.2V
4.7K_0402_5% 2
PM@ 1 R805
VGA_DDC_DATA
+3VS
4.7K_0402_5% 2
PM@ 1 R806
VGA_DDC_CLK
GND
OUT
IN
GND
27MHz_16PF_6P27000126
C385
16P_0603_50V8J
PM@
C383
16P_0603_50V8J
PM@
Keep away from other signal at last 25mils
+3VS
PM@
Reserve for M26 test

+3VS
VGA_CRT_VSYNC
2
R283
1
@ 10K_0402_5%
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
M22P/24P PCIE,LVDS,GPIO,CLK
5
Title

Custom
EAL30
Date:
R ev
1.0
LA-2691
, 03, 2005
Sheet
1
15
of
52
MDA[0..63]
D
MDA[0..63] 19
DQSA[0..7]
DQSA[0..7] 19
DQMA#[0..7]
DQMA#[0..7] 19
MAA[0..13]
MAA[0..13] 19
MDB[0..63]
+1.8VS
MDB[0..63] 20
DQSB[0..7]
MEMVMODE0
MEMVMODE1
D
DQSB[0..7] 20
DQMB#[0..7]
DQMB#[0..7] 20
MAB[0..13]
M22/24(1.8V VRAM) Pull-low
Memory speed MAX200MHz
MAB[0..13] 20
M26(1.8V VRAM)
Default
Pull-high
MEMVMODE1
NC
NC
MEMVMODE0
R405
PM@ 1
2
4.7K_0402_5%
R403
PM@ 2
1
4.7K_0402_5%
U6B
Part 2 of 5
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
J25
F29
E25
A27
F15
C15
C11
E11
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
J27
F30
F24
B27
E16
B16
B11
F10
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
RASA#
A19
MRASA#
CASA#
E18
MCASA#
WEA#
E19
MWEA#
CSA0#
E20
MCSA0#
CSA1#
F20
CKEA
B19
U6C
B21
C20
MCLKA0
MCLKA0#
CLKA1
CLKA1#
C18
A18
MCLKA1
MCLKA1#
19
MCSA0#
MCKEA
19
19
19
MCLKA0 19
MCLKA0# 19
MCLKA1 19
MCLKA1# 19
MVREFD
B7
+MVREFD
(15mils)
MVREFS
B8
+MVREFS
(15mils)
DIMA_0
DIMA_1
19
MCASA#
MWEA#
MCKEA
CLKA0
CLKA0#
MRASA#
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
D30
B13
+1.8VS
+1.8VS
M24P_BGA708
M24@
PM@
+MVREFS
(15mils)
N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
E6
B2
J5
G3
W6
W2
AC6
AD2
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
F6
B3
K6
G1
V5
W1
AC5
AD1
DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
DQSB6
DQSB7
RASB#
R2
MRASB#
CASB#
T5
MCASB#
WEB#
T6
MWEB#
CSB0#
R5
MCSB0#
CSB1#
R6
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
CKEB
R3
MCKEB
CLKB0
CLKB0#
N1
N2
MCLKB0
MCLKB0#
CLKB1
CLKB1#
T2
T3
MCLKB1
MCLKB1#
DIMB_0
DIMB_1
E3
AA3
ROMCS#
AF5
MEMVMODE_0
MEMVMODE_1
C6
C7
MEMTEST
C8
MRASB#
20
MCASB#
20
MWEB#
20
MCSB0#
20
MCKEB
20
MCLKB0 20
MCLKB0# 20
B
MCLKB1 20
MCLKB1# 20
MEMVMODE0
MEMVMODE1
MEMTEST
(15mil)
PM@
R409 1
47_0402_1%
M24P_BGA708
M24@
change to 240 ohm when use M26
R408
100_0402_1%
+MVREFD
(15mils)
1
PM@
2
PM@ C528
0.1U_0402_16V4Z
Part 3 of 5
PM@ C500
R413
0.1U_0402_16V4Z
2
100_0402_1%
R404
100_0402_1%
PM@
2
DQB0
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63
PM@
R410
100_0402_1%
D7
F7
E7
G6
G5
F5
E5
C4
B5
C5
A4
B4
C2
D3
D1
D2
G4
H6
H5
J6
K5
K4
L6
L5
G2
F3
H2
E2
F2
J3
F1
H3
U6
U5
U3
V6
W5
W4
Y6
Y5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3
MEMORY INTERFACE B
DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63
H28
H29
J28
J29
J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10
C9
B9
B10
E13
E12
E10
F12
F11
E9
F9
F8
MEMORY INTERFACE A
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
M22P/24P Memory Interface
Custom
DEPARTMENT
EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
Title
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
16
of
52
+1.8VS
PM@ C838
1
2
ATi suggestion:
Using filter is acceptable (Default)
Using liner regulator is optimal. (Reserve)
+VDD_PNLIO2.5
U24
+3VS
1
C317
@ 470P_0402_50V7K
VIN
PG
EN
400mA
0.1U_0402_16V4Z
C362
1
2PM@
1000P_0402_50V7K
C363
PM@1
2
22U_1206_10V4Z
PM@ C834
1
2
0.1U_0402_16V4Z
C597
1
2PM@
1000P_0402_50V7K
C508
PM@1
2
0.1U_0402_16V4Z
C502
1
2PM@
1000P_0402_50V7K
C496
PM@1
2
22U_1206_10V4Z
C843
2
1
0.1U_0402_16V4Z
C601
1
2PM@
1000P_0402_50V7K
C593
PM@1
2
10U_0805_10V4Z
C847
PM@
2
1
0.1U_0402_16V4Z
C600
1
2PM@
1000P_0402_50V7K
C604
PM@1
2
10U_0805_10V4Z
C848
PM@ 2
1
0.1U_0402_16V4Z
C605
1
2PM@
1000P_0402_50V7K
C613
PM@1
2
220U_D2_4VM_R12 0.1U_0402_16V4Z
C505
1
2PM@
1000P_0402_50V7K
C497
PM@1
2
0.1U_0402_16V4Z
C547
1
2PM@
1000P_0402_50V7K
C555
PM@1
2
0.1U_0402_16V4Z
C592
1
2PM@
1000P_0402_50V7K
C577
PM@1
2
0.1U_0402_16V4Z
C507
1
2PM@
1000P_0402_50V7K
C495
PM@1
2
GND
PM@
SA052050010(MIC5205-2.8BM5), max:150mA
C598
PM@1
2
22U_1206_10V4Z
PM@ C313
1
2
VOUT
@ MIC5205-2.8BM5_SOT23-5~D
+1.8VS
C599
1
2PM@
22U_1206_10V4Z
PM@ C467
1
2
+VDD_PNLIO2.5
0.1U_0402_16V4Z
R296 2
0_0603_5%
PM@
2
1
1
C835
C837
C839
PM@
PM@
PM@
10U_0805_10V4Z
1
2
2
0.1U_0402_16V4Z
+2.5VS
1000P_0402_50V7K 1000P_0402_50V7K
C565
C490
PM@1
1
2PM@
2
+VDD_DAC2.5
1
C845
PM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
1
C486
2
1000P_0402_50V7K 1000P_0402_50V7K
C552
C620
PM@1
1
2PM@
2
0.1U_0402_16V4Z
R600 2
0_0603_5%
PM@
1
C841
PM@
1000P_0402_50V7K 1000P_0402_50V7K
C619
C615
PM@1
1
2PM@
2
1000P_0402_50V7K 1000P_0402_50V7K
1
C504
2
PM@
1
C527
+1.8VS
+VDD_PLL2_1.8
PM@
PM@
0.1U_0402_16V4Z
+1.8VS
+AVDD1.8
C487
PM@
C844
PM@
60mA
0.1U_0402_16V4Z
1
C489
PM@
400mA
AE16
AE17
AF15
AE15
+AVDD1.8
70mA
VDDR1_0
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_44
VDDR1_45
VDDR1_46
VDDR1_47
VDDR1_48
VDDR1_49
VDDR1_50
VDDR1_51
VDDR1_52
VDDR1_53
LPVDD
TPVDD
AF13
AF14
TXVDDR_0
TXVDDR_1
F18
N6
Part 4 of 5
LVDDR_25_0
LVDDR_25_1
LVDDR_18_0
LVDDR_18_1
AH13
120mA AF21
5mA AE20
+VDD_DAC2.5
2
0_0603_5%
PM@
C28
PM@
0.1U_0402_16V4Z
C31
PM@
0.1U_0402_16V4Z
+1.8VS
+1.8VS
R29
+VDD_PLL2_1.8
+VDD_PLL1.8
+VGA_CORE
C557
7500mA
1
2PM@
AC13
AD13
22U_1206_10V4Z
AD15
C314
AC15
1
2PM@
AC17
P17
22U_1206_10V4Z
P18
C562
P19
1
2PM@
U12
U13
0.1U_0402_16V4Z
U14
C545
U17
1
2PM@
U18
U19
0.1U_0402_16V4Z
V19
C533
V18
1
2PM@
V17
V14
0.1U_0402_16V4Z
V13
C521
V12
1
2PM@
N18
N17
0.1U_0402_16V4Z
N14
C532
W17
1
2PM@
W18
W12
0.1U_0402_16V4Z
W13
C590
W14
1
2PM@
N13
N19
0.1U_0402_16V4Z
M19
C580
M18
1
2PM@
M12
N12
0.1U_0402_16V4Z
M13
C579
M14
1
2PM@
P12
P13
0.1U_0402_16V4Z
P14
C556
M17
1
2PM@
W19
0.1U_0402_16V4Z
VDDC1_0
VDDC1_1
VDDC1_2
VDDC1_3
W16
M15
R19
T12
VDD15_0
VDD15_1
VDD15_2
VDD15_3
VDD15_4
VDD15_5
VDD15_6
VDD15_7
P8
Y8
AC11
AC20
H20
H11
M23
Y23
VDDR3_0
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
AD7
AD19
AD21
AC22
AC8
AC21
AC19
VDDR4_0
VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
AG7
AD9
AC9
AC10
AD10
VDDRH0
VDDRH1
A2VDD_0
A2VDD_1
AF23
A2VDDQ
AH23
AVDD
+VDD_PLL1.8
10mA
VDDC_0
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDC_40
U6D
T7
R4
R1
N8
N7
M4
L8
K23
K24
N4
J8
J7
J4
J1
H10
H13
H15
H17
T8
V4
V7
V8
AA1
AA4
AA7
AA8
A3
A9
A15
A21
A28
B1
B30
D26
D23
D20
D17
D14
D11
D8
D5
E27
F4
G7
G10
G13
G15
G19
G22
G27
H22
H19
AD4
L23
15mA AH19
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R601 2
0_0603_5%
PM@
1
C840
PM@
0.1U_0402_16V4Z
2
+1.8VS
200mA
+VDD_PNLIO2.5
0.1U_0402_16V4Z
POWER
AE23
AE22
30mA
AK28
10mA
A7
PVDD
R841 2
2.2_0603_5%
PM@
2
22U_1206_10V4Z
1
PM@
C864
1
1
C549
PM@
2
10U_0805_10V4Z
0.1U_0402_16V4Z
C622
PM@
22U_1206_10V4Z
C566
1
2PM@
1000P_0402_50V7K
C538
1
2 PM@
0.1U_0402_16V4Z
C550
1
2PM@
1000P_0402_50V7K
C531
1
2 PM@
0.1U_0402_16V4Z
C536
1
2PM@
1000P_0402_50V7K
C574
1
2 PM@
0.1U_0402_16V4Z
C537
1
2PM@
1000P_0402_50V7K
1
C836
330U_D_2VM
PM@
+
2
1
+
2
C456
470U_D2_2.5VM
@
Reserve
0.1U_0402_16V4Z
C573
1
2PM@
0.1U_0402_16V4Z
C589
1
2PM@
0.1U_0402_16V4Z
C588
1
2PM@
0.1U_0402_16V4Z
C587
1
2PM@
0.1U_0402_16V4Z
C561
1
2PM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
1
1
1
2
C511
C606
C576
C842
PM@
PM@
PM@
PM@
PM@
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2
2
2
1
0.1U_0402_16V4Z
50mA
1
1000P_0402_50V7K
0.1U_0402_16V4Z
1
1
1
C509
C525
C498
PM@
PM@
PM@
C501
PM@
2
2
2
1000P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C571
C572
PM@
PM@
+3VS
2
C846
PM@
10U_0805_10V4Z
1
C568
PM@
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+1.2VS
AG26
AK29
AJ30
AG28
AG27
PCIE_PVDD_12_0
PCIE_PVDD_12_1
PCIE_PVDD_12_2
N24
N23
P23
PCIE_PVDD_18_0
PCIE_PVDD_18_1
PCIE_PVDD_18_2
PCIE_PVDD_18_3
U23
T23
V23
W23
1100mA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
2
C596
C614
C629
C647
C648
PM@
PM@
PM@
PM@
PM@
2
0.1U_0402_16V4Z
1
10U_0805_10V4Z
C630 PM@
22U_1206_10V4Z
1000P_0402_50V7K
100mA
C650
PM@
0.1U_0402_16V4Z
1
1
C92
C98
PM@
PM@
2
2
1000P_0402_50V7K
2
PM@
2
0.1U_0402_16V4Z
C99
10U_0805_10V4Z
MPVDD
500mA
0.1U_0402_16V4Z
(20 mil)
0.1U_0402_16V4Z
1
1
C548
C546
PM@
PM@
PM@
2
2
0.1U_0402_16V4Z
+1.8VS
2
C559
PM@
22U_1206_10V4Z
C863
PM@
0.1U_0402_16V4Z
Compal Secret Data
2005/03/01
Issued Date
2006/03/01
Deciphered Date
5
+VGA_CORE
0.1U_0402_16V4Z
1
2
C859
PM@
1000P_0402_50V7K
C315
1
2 PM@
1
C535
M24P_BGA708
M24@
+VDD_PLL2_1.8
1
22U_1206_10V4Z
C312
1
2PM@
0.1U_0402_16V4Z 10U_0805_10V4Z
1
1
1
1
2
2
C530
C553
C516
C529
C567
C522
PM@
PM@
PM@
PM@
PM@
PM@
0.1U_0402_16V4Z
2
2
2
2
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
50mA
C526
+1.8VS
+VGA_CORE
C558
C534
1
2PM@
1
2 PM@
500mA
PCIE_VDDR_12_0
PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
VDD1DI
VDD2DI
Title
M22P/24PWR
Custom
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
17
of
52
U6E
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
Part 5 of 5
GND
A2
A10
A16
A22
A29
C1
C3
C28
C30
D27
D24
D21
D18
D15
D12
D10
D6
D4
F27
G9
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
H9
H8
H4
J23
J24
AD12
AG5
AG9
AG11
R7
P4
M7
M8
L4
K1
K7
K8
R8
T1
U4
U8
W7
W8
Y4
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD18
AK2
AJ1
M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16
PCIE_VSS_0
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29
D9
D13
D19
D25
E4
T4
AB4
AVSSQ
AD22
LVSSR_0
LVSSR_1
LVSSR_2
LVSSR_3
AF18
AH17
AG15
AG18
LPVSS
TPVSS
AH18
AH12
TXVSSR_0
TXVSSR_1
TXVSSR_2
AH14
AG13
AG14
VSSRH0
VSSRH1
F19
M6
A2VSSN_0
A2VSSN_1
AH20
AG21
A2VSSQ
AF22
AVSSN
AH22
VSS1DI
VSS2DI
AE24
AE21
PVSS
AJ28
MPVSS
A6
M24P_BGA708
A
M24@
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
M22P/24P GND
Custom
Date:
R ev
1.0
EAL30 LA-2691
, 03, 2005
Sheet
1
18
of
52
VR_VREF_1
N13
M13
L9
M10
VREF
MCL
RFU1
RFU2
16
16
16
16
MRASA#
MCASA#
MWEA#
MCSA0#
16
MCKEA
16
16
C578
MRASA#
MCASA#
MWEA#
MCSA0#
MCKEA
MCLKA0
MCLKA0#
1
470P_0402_50V7K
@
1
R428 @
1
R425 @
2
56_0402_1%
2
56_0402_1%
RAS#
CAS#
WE#
CS#
N12
CKE
M11
M12
CK
CK#
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
E7
E8
E10
K6
K7
K8
K9
L5
L10
E5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D7
D8
E4
E11
L4
L7
L8
L11
R25
PM@
10U_0805_10V4Z
1
1
C621
PM@
10U_0805_10V4Z
0.1U_0402_16V4Z
1
C594
PM@
1
C581
PM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C582
PM@
C22
PM@
2
1
C583
PM@
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
DQMA#4
DQMA#6
DQMA#5
DQMA#7
B3
H12
H3
B12
DM0
DM1
DM2
DM3
DQSA4
DQSA6
DQSA5
DQSA7
B2
H13
H2
B13
DQS0
DQS1
DQS2
DQS3
VR_VREF_2
N13
M13
L9
M10
VREF
MCL
RFU1
RFU2
M2
L2
L3
N2
RAS#
CAS#
WE#
CS#
MCKEA
16
16
MCLKA1
MCLKA1#
1
R400 @
2
1
1
C485
R396 @
470P_0402_50V7K
2
56_0402_1%
2
56_0402_1%
@
+1.8VS
N12
CKE
M11
M12
CK
CK#
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
E7
E8
E10
K6
K7
K8
K9
L5
L10
E5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
0.1U_0402_16V4Z
1
C607
PM@
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
1
C618
PM@
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D7
D8
E4
E11
L4
L7
L8
L11
MDA39
MDA38
MDA37
MDA36
MDA35
MDA34
MDA33
MDA32
MDA51
MDA49
MDA50
MDA48
MDA54
MDA55
MDA53
MDA52
MDA44
MDA46
MDA43
MDA45
MDA42
MDA47
MDA41
MDA40
MDA63
MDA61
MDA62
MDA58
MDA57
MDA60
MDA56
MDA59
+1.8VS
K4D55323QF-GC33_FBGA144
@
+1.8VS
0.1U_0402_16V4Z
1
C595
PM@
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5
MRASA#
MCASA#
MWEA#
MCSA0#
As close as possible to relatived pin
+1.8VS
(25mil)
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
@
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
M2
L2
L3
N2
DQS0
DQS1
DQS2
DQS3
R28
PM@
2
B2
H13
H2
B13
+1.8VS
1K_0402_1%
DQSA1
DQSA2
DQSA3
DQSA0
MDA9
MDA10
MDA12
MDA11
MDA15
MDA8
MDA13
MDA14
MDA22
MDA23
MDA21
MDA20
MDA18
MDA17
MDA19
MDA16
MDA29
MDA26
MDA30
MDA31
MDA27
MDA28
MDA24
MDA25
MDA0
MDA1
MDA2
MDA3
MDA5
MDA4
MDA6
MDA7
DM0
DM1
DM2
DM3
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B3
H12
H3
B12
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
PM@
2
DQMA#1
DQMA#2
DQMA#3
DQMA#0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
0.1U_0402_16V4Z
C51
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
R36
PM@
0.1U_0402_16V4Z
1K_0402_1%
(25mil)
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5
1K_0402_1%
R34
PM@
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
1K_0402_1%
+1.8VS
U5
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
U8
DQSA[0..7]
16 DQSA[0..7]
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
MDA[0..63]
16 MDA[0..63]
MAA[0..13]
16 MAA[0..13]
DQMA#[0..7]
16 DQMA#[0..7]
1
C617
PM@
0.1U_0402_16V4Z
1
C616
PM@
1
C603
PM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C472
PM@
10U_0805_10V4Z
1
C491
PM@
0.1U_0402_16V4Z
1
C477
PM@
0.1U_0402_16V4Z
1
C478
PM@
1
C479
PM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C480
PM@
0.1U_0402_16V4Z
1
C492
PM@
0.1U_0402_16V4Z
1
C499
PM@
1
C514
PM@
1
C513
PM@
0.1U_0402_16V4Z
C512
PM@
0.1U_0402_16V4Z
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
VGA DDR CHANNEL A
5
Title

Custom
EAL30
Date:
R ev
1.0
LA-2691
, 03, 2005
Sheet
1
19
of
52
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
DQMB#0
DQMB#3
DQMB#1
DQMB#2
B3
H12
H3
B12
DM0
DM1
DM2
DM3
DQSB0
DQSB3
DQSB1
DQSB2
B2
H13
H2
B13
DQS0
DQS1
DQS2
DQS3
VR_VREF_3
N13
M13
L9
M10
VREF
MCL
RFU1
RFU2
M2
L2
L3
N2
RAS#
CAS#
WE#
CS#
N12
CKE
16
16
16
16
MRASB#
MCASB#
MWEB#
MCSB0#
16
MCKEB
16
16
2
MRASB#
MCASB#
MWEB#
MCSB0#
MCKEB
MCLKB0
MCLKB0#
1
C415
470P_0402_50V7K
1
R349 @
1
R350 @
2
56_0402_1%
2
56_0402_1%
M11
M12
CK
CK#
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
E7
E8
E10
K6
K7
K8
K9
L5
L10
E5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
0.1U_0402_16V4Z
10U_0805_10V4Z
1
1
C436
NON32M@
1
C422
NON32M@
10U_0805_10V4Z
1
C435
NON32M@
0.1U_0402_16V4Z
C8
0.1U_0402_16V4Z
1
2
NON32M@
(25mil)
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
DQMB#4
DQMB#7
DQMB#5
DQMB#6
B3
H12
H3
B12
DM0
DM1
DM2
DM3
DQSB4
DQSB7
DQSB5
DQSB6
B2
H13
H2
B13
DQS0
DQS1
DQS2
DQS3
VR_VREF_4
N13
M13
L9
M10
VREF
MCL
RFU1
RFU2
M2
L2
L3
N2
RAS#
CAS#
WE#
CS#
MRASB#
MCASB#
MWEB#
MCSB0#
MCKEB
16
16
MCLKB1
MCLKB1#
C412
470P_0402_50V7K
1
R351 @
1
R352 @
2
56_0402_1%
2
56_0402_1%
+1.8VS
0.1U_0402_16V4Z
1
C428
NON32M@
1
C446
NON32M@
0.1U_0402_16V4Z
CKE
CK
CK#
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
E7
E8
E10
K6
K7
K8
K9
L5
L10
E5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
C452
NON32M@
0.1U_0402_16V4Z
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D7
D8
E4
E11
L4
L7
L8
L11
MDB38
MDB39
MDB37
MDB36
MDB34
MDB35
MDB33
MDB32
MDB63
MDB62
MDB60
MDB61
MDB56
MDB58
MDB59
MDB57
MDB47
MDB45
MDB46
MDB44
MDB40
MDB43
MDB41
MDB42
MDB52
MDB54
MDB55
MDB53
MDB51
MDB50
MDB48
MDB49
+1.8VS
@
+1.8VS
0.1U_0402_16V4Z
1
C454
NON32M@
N12
M11
M12
@
As close as possible to relatived pin
+1.8VS
R13
NON32M@
1K_0402_1%
D7
D8
E4
E11
L4
L7
L8
L11
R12
NON32M@
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
+1.8VS
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MDB7
MDB4
MDB6
MDB5
MDB0
MDB1
MDB2
MDB3
MDB24
MDB26
MDB29
MDB31
MDB30
MDB28
MDB25
MDB27
MDB14
MDB15
MDB13
MDB12
MDB9
MDB11
MDB8
MDB10
MDB21
MDB23
MDB22
MDB20
MDB16
MDB18
MDB17
MDB19
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
1K_0402_1%
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
C9
0.1U_0402_16V4Z
1
2
1
NON32M@
(25mil)
1K_0402_1%
1K_0402_1%
+1.8VS
NON32M@
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
U1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
U2
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
MAB[0..13]
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
16 MAB[0..13]
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
DQMB#[0..7]
16 DQMB#[0..7]
R14
MDB[0..63]
16 MDB[0..63]
R11
DQSB[0..7]
16 DQSB[0..7]
NON32M@
0.1U_0402_16V4Z
1
C442
NON32M@
1
C438
NON32M@
0.1U_0402_16V4Z
C433
NON32M@
0.1U_0402_16V4Z
10U_0805_10V4Z
1
1
C453
NON32M@
0.1U_0402_16V4Z
1
C427
NON32M@
1
C447
NON32M@
10U_0805_10V4Z
1
C432
NON32M@
0.1U_0402_16V4Z
1
C437
NON32M@
0.1U_0402_16V4Z
1
C429
NON32M@
0.1U_0402_16V4Z
1
C451
NON32M@
0.1U_0402_16V4Z
1
C450
NON32M@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C449
NON32M@
1
C434
NON32M@
1
C441
NON32M@
0.1U_0402_16V4Z
C417
NON32M@
0.1U_0402_16V4Z
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
VGA DDR CHANNEL B

Size
Custom
Date:
Document Number
R ev
1.0
EAL30 LA-2691
, 03, 2005
Sheet
1
20
of
52
LCD CONN.
LCD POWER CIRCUIT
Width: 40mils
reserved for GMCH
GM@
1
R192
7 GMCH_ENVDD
+3VS
39
39
2
0_0402_5%
ENVDD
C18
0.1U_0402_16V4Z
+3VALW
TZCLKTZCLK+
TZOUT1TZOUT1+
TZOUT2+
TZOUT2TZOUT0+
TZOUT0-
U4 SN74AHCT1G125GW_SOT353-5
Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DISPOFF#
+LCDVDD_LCD
INVPWR_B+
1
2
R358 0_1206_5%
+LCDVDD
LCD_DATA
TXCLK+
TXCLKTXOUT2+
TXOUT2TXOUT1TXOUT1+
TXOUT0TXOUT0+
ACES_87216-3002
2
C26
1U_0402_6.3V4Z
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
R24
100_0402_5%
1
+LCDVDD
P
OE#
5
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
DAC_BRIG
INVT_PWM
+3VS_LCD
LCD_CLK
DAC_BRIG
INVT_PWM
1
2
R19 0_0805_5%
1
15
JP6
INVPWR_B+
+3VS
1 2
R26
300_0402_5%
D
2
G
Q1
SI2301DS_SOT23
R27
100K_0402_5%
+LCDVDD
C23
2 0.047U_0402_16V7K
Q2
2N7002_SOT23
C21
4.7U_0805_10V4Z
For ATI M24
C19
0.1U_0402_16V4Z
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
R328
R329
R326
R327
R325
R324
R323
R322
R370
R369
R365
R366
R368
R367
R364
R363
VGA_TXCLKVGA_TXCLK+
VGA_TZOUT0VGA_TZOUT0+
VGA_TZCLKVGA_TZCLK+
15 VGA_LCD_DATA
15 VGA_LCD_CLK
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R335 1 PM@
R360 1 PM@
2 0_0402_5%
2 0_0402_5%
R343
R344
R341
R342
R340
R339
R338
R337
R382
R381
R377
R378
R380
R379
R376
R375
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZCLKTZCLK+
LCD_DATA
LCD_CLK
width = 60mil
INVPWR_B+
+3VS
L4
FBM-L11-201209-121LMT_0805
2
B+
1
1
R10
4.7K_0402_5%
B
From EC
39
1
D4
BKOFF#
C14
0.1U_0603_25V7K
2
DISPOFF#
2
RB751V_SOD323
L5
2
FBM-L11-201209-121LMT_0805
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
C15
68P_0402_50V8K
GMCH_TXOUT0GMCH_TXOUT0+
GMCH_TZOUT0GMCH_TZOUT0+
7 GMCH_LCD_DATA
7 GMCH_LCD_CLK
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
GM@
R359 1 GM@
R371 1 GM@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2 0_0402_5%
2 0_0402_5%
TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZCLKTZCLK+
LCD_DATA
LCD_CLK
For GMCH
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
LCD CONN
Custom
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
21
of
52
+5VS
+R_CRT_VCC
POLYSWITCH_1A
1
D3
@ DAN217_SC59
C1
0.1U_0402_16V4Z
+3VS
W=40mils
F1
RB411D_SOT23
+CRT_VCC
W=40mils
D23
D1
D2
@ DAN217_SC59 @ DAN217_SC59
CRT Connector
2
1
JP1
FOX_DZ11A91-L7
1
1
0_0402_5%
CRT_R
0_0402_5%
0_0402_5%
CRT_G
0_0402_5%
0_0402_5%
1
2 CRT_R_L
L2
FCM2012C-800_0805
1
2 CRT_G_L
L1
FCM2012C-800_0805
1
2 CRT_B_L
L3
FCM2012C-800_0805
CRT_B
0_0402_5%
150_0402_1%
R9
R8
R7
150_0402_1%
C7
C6
C2
@ C3
8P_0402_50V8K
150_0402_1% 2 8P_0402_50V8K 2 8P_0402_50V8K 2
1
@ C4
DDC_MD2
1
@ C5
+CRT_VCC
2
R316
7 GMCH_CRT_HSYNC
CRT_HSYNC 2
P
OE#
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
1
R315
1
R317
1
L20
2
FCM1608C-121T_0603
HSYNC_L
1
L21
2
FCM1608C-121T_0603
VSYNC_L
D_CRT_HSYNC
2
100P_0402_50V8J
DSUB_12
1
10K_0402_5%
5
1
2
0.1U_0402_16V4Z
15 VGA_CRT_HSYNC
2
C390
8P_0402_50V8K
8P_0402_50V8K 8P_0402_50V8K
1
C396
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
C392
10P_0402_50V8J
U27
SN74AHCT1G125GW_SOT353-5
1
1
C391
C393 2
68P_0402_50V8K
10P_0402_50V8J
+CRT_VCC
5
1
Y
D_CRT_VSYNC
U26
SN74AHCT1G125GW_SOT353-5
+CRT_VCC
R312 1
2 PM@ 0_0402_5%
+3VS
R311 1
2 GM@ 0_0402_5%
+2.5VS
R310
4.7K_0402_5%
R303 GM@ 0_0402_5%

2
1
R309
4.7K_0402_5%
1
2
R318
CRMA_1
150_0402_1%
C401
100P_0402_50V8J
GMCH_CRT_CLK 7
1
2
3
4
R320
C402
100P_0402_50V8J
VGA_DDC_CLK 15
JP3
1
2
FBM-11-160808-121-T_0603
LUMA_1
R321
GM@ 0_0402_5%
1
+3VS
L23 1
2
FBM-11-160808-121-T_0603
L22
VGA_DDC_DATA 15
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
1
R331
1
R330
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
7 GMCH_TV_CRMA
1
R332
1
R333
1
15 VGA_TV_CRMA
R804 PM@ 0_0402_5%

1
2
D21
D20
@ DAN217_SC59 @ DAN217_SC59
7 GMCH_TV_LUMA
Q32
BSS138_SOT23
TV-Out Connector
15 VGA_TV_LUMA
DSUB_15
Q31
BSS138_SOT23
3
R803 PM@ 0_0402_5%

1
2
DSUB_12
GMCH_CRT_DATA 7
2
G
CRT_VSYNC 2
C389
68P_0402_50V8K
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
P
OE#
1
R314
1
R313
7 GMCH_CRT_VSYNC
15 VGA_CRT_VSYNC
2
0.1U_0402_16V4Z
1
C395
DSUB_15
1
2
G
R3
1
1
2 PM@
2
GM@
2 PM@
2
GM@
2 PM@
2
GM@
R6
R2
1
1
15 VGA_CRT_B
7 GMCH_CRT_B
R5
R1
15 VGA_CRT_G
7 GMCH_CRT_G
R4
15 VGA_CRT_R
7 GMCH_CRT_R
1
2
3
4
GND
GND
1.
2.
3.
4.
5
6
Y
C
Y
C
ground
ground
(luminance+sync)
(crominance)
SUYIN_030336FR004T115ZU
C398
C397
100P_0402_50V8J 100P_0402_50V8J
150_0402_1%
TV-OUT Conn.
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
A
Title
CRT & TV-OUT Connector

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
22
of
52
RP2
U36B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
RP46
1
2
3
4
+3VS
8
7
6
5
PCI_PLOCK#
PCI _IRDY#
PCI_PERR#
PCI_DEVSEL#
8.2K_0804_8P4R_5%
2
RP45
1
2
3
4
+3VS
8
7
6
5
PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQA#
8.2K_0804_8P4R_5%
RP1
1
2
3
4
+3VS
8
7
6
5
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_REQ#6
8.2K_0804_8P4R_5%
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
AD[0]
AD[1]
AD[2]
AD[3]
AD[4]
AD[5]
AD[6]
AD[7]
AD[8]
AD[9]
AD[10]
AD[11]
AD[12]
AD[13]
AD[14]
AD[15]
AD[16]
AD[17]
AD[18]
AD[19]
AD[20]
AD[21]
AD[22]
AD[23]
AD[24]
AD[25]
AD[26]
AD[27]
AD[28]
AD[29]
AD[30]
AD[31]
REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8
PCI_REQ#0
C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#
J6
H6
G4
G2
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
A3
E1
R2
C3
E3
C5
G5
J1
J2
PCI _IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PLTRST#
PCICLK
PME#
R5
G6
P6
PLT_RST#
CLK_ICH_PCI
PCI
RP47
1
2
3
4
+3VS
8
7
6
5
PCI_REQ#5
PCI_REQ#3
PCI_REQ#1
PCI_REQ#4
8.2K_0804_8P4R_5%
PCI_FRAME#
29,31,34 PCI_FRAME#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
31 PCI_PIRQA#
31 PCI_PIRQB#
31 PCI_PIRQC#
31 PCI_PIRQD#
RP3
3
1
2
3
4
+3VS
8
7
6
5
J3
Interrupt
N2
L2
M1
L3
AC5
AD5
AF4
AG4
AC9
AD9
AF8
AG8
U3
PCI_REQ#0
PCI_REQ#2
PCI_PIRQH#
8.2K_0804_8P4R_5%
FRAME#
PIRQ[A]#
PIRQ[B]#
PIRQ[C]#
PIRQ[D]#
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
34
34
31
31
29
29
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
29,31,34
29,31,34
29,31,34
29,31,34
Internal Pull-up.
Sample high destination is LPC.
PCI_GNT#5
R38
@ 0_0402_5%
PCI_REQ#5
PCI_GNT#5
PCI_REQ#6
PCI_IRDY# 29,31,34
PCI_PAR 29,31,34
PCI_RST# 28,29,31,34,35,39
PCI_DEVSEL# 29,31,34
PCI_PERR# 29,31,34
PCI_SERR# 29,31,34
PCI_STOP# 29,31,34
PCI_TRDY# 29,31,34
PLT_RST# 6,15,25,27,28,31,35,39
CLK_PCI_ICH 14
CLK_PCI_ICH
add PIRQF for PCI LAN
I/F
PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4
29,31,34 PCI_AD[0..31]
8.2K_0804_8P4R_5%
PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
D9
C7
C6
M3
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
8
7
6
5
R43
@ 10_0402_5%
PCI_PIRQF# 29
PCI_PIRQG# 34
PCI_PIRQH# 34
1
2
3
4
+3VS
RESERVED
SATA[1]RXN/RSVD[1]
SATA[1]RXP/RSVD[2]
SATA[1]TXN/RSVD[3]
SATA[1]TXP/RSVD[4]
SATA[3]RXN/RSVD[5]
SATA[3]RXP/RSVD[6]
SATA[3]TXN/RSVD[7]
SATA[3]TXP/RSVD[8]
TP[3]/RSVD[9]
C67
@ 10P_0402_50V8J
3
ICH6_BGA609
ICH6-M
(R3:SA828010890)
(R1:SA8280108B0)
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
A
Title
ICH6(1/4)_HUB,PCI,HOST
Size
Document Number
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
D
23
of
52
NC
IN
2
INTRUDER#
INTRUDER#
INTVRMEN
+3VS
1
J1
close to RAM door
+1.05VS
ICH_RTCX2
ICH_RTCRST#
1
2
R74
20K_0402_5%
+RTCVCC
U36A
Y1
Y2
1
JOPEN
@
R75
2
PHDD_LED#
AA2
RTCRST#
AA3
AA5
INTRUDER#
INTVRMEN
D12
B12
D11
F13
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
F12
LAN_CLK
B11
LAN_RSTSYNC
E12
E11
C13
C54
@ 10P_0402_50V8J
1
2
R32
36 AC97_RST#
R30
36
36
36 AC97_SDOUT
AC97_BITCLK
AC97_SYNC_R
2
1
33_0402_5%
AC97_RST_R#
1
2
33_0402_5%
AC_SDIN0
AC97_SDIN0
AC97_SDIN1
2
R35
R33
@ 10_0402_5%
2
1
AC97_SDOUT_R
33_0402_5%
PHDD_LED#
39 PHDD_LED#
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
27 SATA_DTX_C_IRX_N0
27 SATA_DTX_C_IRX_P0
0.01U_0402_16V7K
27 SATA_ITX_C_DRX_P0
0.01U_0402_16V7K
14 CLK_PCIE_SATA#
14 CLK_PCIE_SATA
R450
3
+3VS
R451 1
2 4.7K_0402_5%
IDE_ DIORDY
R76
2 8.2K_0402_5%
IDE_IRQ
R834 1
2 1K_0402_5%
SATA2_RXN
R835 1
2 1K_0402_5%
SATA2_RXP
2 24.9_0402_1%
28 IDE_DIORDY
28
IDE_IRQ
28 IDE_DDACK#
28 IDE_DIOW#
28 IDE_DIOR#
ACZ_SDO
EC_GA20
H_A20M#
CPUSLP#
AE27
R437 1
2 @ 0_0402_5%
H_CPUSLP#
DPRSLP#/TP[4]
DPSLP#/TP[2]
AE24
AD27
R431 1
0_0402_5%
H_DPRSTP#
H_DPRSTP# 4
H_FERR#
H_FERR# 4
SATA_CLKN
SATA_CLKP
35,39
35,39
35,39
35,39
H_FERR#
R435
H_DPRSTP#
R432
LPC_DRQ#1 35
R442 1
EC_GA20 39
H_A20M# 4
2
56_0402_5%
2
@ 56_0402_5%
Intel Recommand
LPC_FRAME# 35,39
2 10K_0402_5%
+3VS
H_CPUSLP# 4,6
H_DPSLP# 4
1
R434
H_PW RGOOD
H_PWRGOOD 4
AG26
AE22
AF27
AG24
H_IGNNE#
H_IGNNE# 4
H_INIT#
H_INTR
2
56_0402_5%
H_INIT#
H_INTR
MAINPWON 43,44,46
+1.05VS
4
4
R460
10K_0402_5%
1
2
EC_KBRST# 39
AD23
NMI
SMI#
AF25
AG27
H_NMI
H_SMI#
H_NMI
H_SMI#
STPCLK#
AE26
H_STPCLK#
H_STPCLK# 4
THRMTRIP#
AE23
THRMTRIP#
DA[0]
DA[1]
DA[2]
AC16
AB17
AC17
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
AD16
AE17
IDE_DCS1#
IDE_DCS3#
DD[0]
DD[1]
DD[2]
DD[3]
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]
DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DDREQ
AB14
IDE_DDREQ
RCIN#
SATARBIAS#
SATARBIAS
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
KB_RST#
SATALED#
CLK_PCIE_SATA# AC2
CLK_PCIE_SATA AC1
AF16
AB16
AB15
AC14
AE16
A20GATE
A20M#
AF22
AF23
IGNNE#
INIT3_3V#
INIT#
INTR
ACZ_SDIN[0]
ACZ_SDIN[1]
ACZ_SDIN[2]
SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP
IDE_ DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#
LPC_FRAME#
AG25
F11
F10
B10
AG11
SATARBIAS AF11
P3
AF24
ACZ_RST#
AD7
AC7
AF6
AG6
Place near ICH6 side.
LFRAME#/FWH[4]
FERR#
A10
SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP
SATA2_RXN
SATA2_RXP
C668
LPC_DRQ#1
LANTXD[0]
LANTXD[1]
LANTXD[2]
AE3
AD3
AG2
AF2
C669
N6
P4
SATA
27 SATA_ITX_C_DRX_N0
LDRQ[0]#
LDRQ[1]#/GPI[41]
CPUPWRGD/GPO[49]
ACZ_BIT_CLK
ACZ_SYNC
AC19
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LANRXD[0]
LANRXD[1]
LANRXD[2]
C10
B9
C9
P2
N3
N5
N4
AC-97/AZALIA
36 AC97_BITCLK
36 AC97_SYNC
C12
C11
E13
LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]
LAN
C649
1U_0402_6.3V4Z
1
2
10K_0402_5%
RTCX1
RTCX2
RTC
C627
18P_0402_50V8J
2
1
1M_0402_1%
4
4
R465
@ 330_0402_5%
1
2
Q36
@ 2SC2411K_SC59
2
B
OUT
LPC
32.768KHZ_12.5P_1TJS125DJ2A073
R73
NC
CPU
ICH_RTCX1
Y5
PIDE
R438
10M_0402_5%
2
1
C628
18P_0402_50V8J
2
1
+RTCVCC
+3VS
+1.05VS
1
R459
2
75_0402_1%
THRMTRIP#
1
R452
56_0402_5%
H_THERMTRIP#
H_THERMTRIP# 4,6
IDE_DA0 28
IDE_DA1 28
IDE_DA2 28
IDE_DCS1# 28
IDE_DCS3# 28
IDE_DD[0..15] 28
IDE_DDREQ 28
ICH6@ ICH6_BGA609
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
A
Title
ICH6(2/4)_CPU,AC97,IDE,LPC
Size
Document Number
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
D
24
of
52
+3VALW
U36C
SB_SPKR
ICH_GPI7
2
10K_0402_5%
PM_CLKRUN#
2
38,39,43
8.2K_0402_5%
ICH_VGATE
2
10K_0402_5%
MCH_SYNC#
2
10K_0402_5%
SERIRQ
2
10K_0402_5%
R439 1
2 0_0402_5%
PM_BMBUSY#
39
EC_SMI#
2 @
ACIN
RB751V_SOD323
2
1
+3VALW
39 EC_LID_OUT#
100K_0402_5% R218@
39
EC_SCI#
14
SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR
PM_STP_PCI#
15 PLTRST_VGA#
ICH_GPI7
EC_SMI#
AE19
R1
GPI[7]
GPI[8]
W6
SMBALERT#/GPI[11]
EC_LID_OUT#
EC_SCI#
M2
R6
GPI[12]
GPI[13]
PM_STP_PCI#
AC21
GPO[19]
PM_STP_CPU#
AD22
STP_CPU#/GPO[20]
PLTRST_VGA#
AD20
AD21
GPO[21]
GPO[23]
V3
GPIO[24]
P5
R3
T3
AF19
AF20
AC18
EC_FLASH#
PM_CLKRUN#
WAKE#
PM_DPRSLPVR
2
100K_0402_5%
31,35,39 SERIRQ
39
Intel new update
EC_THERM#
6,14,50
VGATE
U5
PM_SLP_S3#
38 SYS_PWROK
50 PM_DPRSLPVR
39
PBTN_OUT#
6,15,23,27,28,31,35,39 PLT_RST#
39
EC_RSMRST#
GPIO[25]
GPIO[27]
GPIO[28]
CLKRUN#/GPIO[32]
GPIO[33]
GPIO[34]
WAKE#
SERIRQ
AB20
SERIRQ
EC_THERM#
AC20
THRM#
AF21
VRMPWRGD
2
1 ICH_VGATE
R456
0_0402_5%
CLK_14M_ICH
CLK_48M_ICH
39
STP_PCI#/GPO[18]
AB21
100_1206_8P4R_5%
1
R288
SYS_RESET#
BM_BUSY#/GPI[6]
39 IDE_ODDRST#
40
EC_FLASH#
29,34,35 PM_CLKRUN#
SUS_STAT#/LPCPD#
U2
AD19
27 IDE_HDDRST#
GPI29
GPI28
GPI27
GPI26
W3
PM_BMBUSY#
40 SB_INT_FLASH_SEL#
RP48
5
6
7
8
Y4
W5
Y5
W4
U6
AG21
F8
1
D25
SYS_PWROK
2
10K_0402_5%
EC_RSMRST#
2
10K_0402_5%
4
3
2
1
CK_SCLK
CK_SDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SB_SPKR
SUS_STAT#
14,50 PM_STP_CPU#
1
R77
1
R65
SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]
SYSRST#
6
RI#
AF17
AE18
AF18
AG18
SLP_S3#
SLP_S4#
SLP_S5#
SYS_PWROK
E10
CLK14
A27
CLK48
V6
SUSCLK
T4
T5
T6
SLP_S3#
SLP_S4#
SLP_S5#
AA1
PM_DPRSLPVR
AE20
PCI-EXPRESS
36
T2
GPI26
GPI27
GPI28
GPI29
DIRECT MEDIA INTERFACE
CK_SCLK
CK_SDATA
EC_SWI#
GPIO
14
14
40
+3VS
1
R455
1
R447
1
R448
1
R449
1
R69
EC_SWI#
PWROK
DPRSLPVR/TP[1]
PM_BATLOW#
V2
BATLOW#/TP[0]
PBTN_OUT#
U1
PWRBTN#
PLT_RST#
V5
EC_RSMRST#
Y3
PERn[1]
PERp[1]
PETn[1]
PETp[1]
H25
H24
G27
G26
PERn[2]
PERp[2]
PETn[2]
PETp[2]
K25
K24
J27
J26
PERn[3]
PERp[3]
PETn[3]
PETp[3]
M25
M24
L27
L26
PERn[4]
PERp[4]
PETn[4]
PETp[4]
P24
P23
N27
N26
DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP
T25
T24
R27
R26
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP
V25
V24
U27
U26
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP
Y25
Y24
W27
W26
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP
AB24
AB23
AA27
AA26
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
AD25
AC25
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_CLKN
DMI_CLKP
+3VALW
DMI_ZCOMP
F24
F23
DMI_IRCOMP
OC[4]#/GPI[9]
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]
C23
D23
C25
C24
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
OC[0]#
OC[1]#
OC[2]#
OC[3]#
C27
B27
B26
C26
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
USB20_N0
USB20_P0
USBRBIAS#
USBRBIAS
A22
B22
LAN_RST#
RSMRST#
DMI_IRCOMP
USB
39
CLOCK
ICH_SMLINK0
2
10K_0402_5%
ICH_SMLINK1
2
10K_0402_5%
CK_SCLK
2
2.2K_0402_5%
CK_SDATA
2
2.2K_0402_5%
LINKALERT#
2
10K_0402_5%
EC_LID_OUT#
2
10K_0402_5%
EC_SWI#
2
10K_0402_5%
PM_BATLOW#
2
8.2K_0402_5%
WAKE#
2
1K_0402_1%
SYSRST#
2
10K_0402_5%
POWER MGT
1
R60
1
R54
1
R63
1
R64
1
R70
1
R49 @
1
R55
1
R66
1
R240
1
R61
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
6
6
6
6
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
6
6
6
6
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
6
6
6
6
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
6
6
6
6
RP4
USB_OC#5
USB_OC#7
USB_OC#6
USB_OC#3
4
3
2
1
5
6
7
8
10K_0804_8P4R_5%
USB_OC#1
1
R411
2
10K_0402_5%
CLK_PCIE_ICH# 14
CLK_PCIE_ICH 14
R39
2 24.9_0402_1%
+1.5VS
USB_OC#4 41
USB_OC#0 41
USB_OC#2 41
USB20_N0 41
USB20_P0 41
USB20_N2
USB20_P2
USB20_N2 41
USB20_P2 41
USB20_N4
USB20_P4
USB20_N4 41
USB20_P4 41
3
USBRBIAS
R31
2
21.5_0402_1%
ICH6_BGA609
+3VALW
U13B
CLK_14M_ICH
39
PM_SLP_S5#
RTC Battery
+RTCPWR
SLP_S4#
SLP_S5#
0.1U_0402_16V4Z
BAS40-04_SOT23
D26
+RTCVCC
C68
@ 10P_0402_50V8J
ML1220T13RE
2
2
C506
@ 10P_0402_50V8J
C679
1
1
SN74LVC08APW_TSSOP14
R412
@ 10_0402_5%
R41
@ 10_0402_5%
BATT1 45@
14 CLK_ICH_14M
CLK_48M_ICH
14 CLK_ICH_48M
C623
0.1U_0402_16V4Z
2
14
+CHGRTC
Issued Date
Compal Secret Data
2005/03/01
2006/03/01
Deciphered Date
A
Title
ICH6(3/4)_USB,PM,LAN,GPIO
Size
Document Number
Rev
1.0
EAL30 LA-2691
, 03, 2005
Date:
G
Sheet
25
H
of
52
+1.5VS
Near PIN AG5

1
VCC1_5[56]
VCC1_5[57]
VCC1_5[58]
VCC1_5[59]
VCC1_5[60]
VCC1_5[61]
VCC1_5[62]
VCC1_5[63]
VCC1_5[64]
VCC1_5[65]
AC27
E26
VCCDMIPLL
VCC3_3[1]
+1.5VS
+3VS
AE1
AG10
VCCSATAPLL
VCC3_3[22]
+3VS
A13
F14
G13
G14
C674
0.1U_0402_16V4Z
+1.5VS
2
+5VALWP+3VALW
Near PIN AG9
R406
D24
ICH6_VCCPLL
RB751V_SOD323
1
10_0402_5%
B
C675
0.1U_0402_16V4Z
+3VS
ICH_V5REF_SUS
2
C515
1U_0603_10V4Z
C60
0.1U_0402_16V4Z
C50
0.1U_0402_16V4Z 1
Near PIN
E26, E27
+3VALW
ICH6_VCCPLL
2
C624
0.1U_0402_16V4Z 1
C45
0.1U_0402_16V4Z
+1.5VS
L26
R436
CHB1608U301_0603
0.5_0603_1%
1
2 ICH6_VCCDMIPLL1
2
C42
0.1U_0402_16V4Z
+3VALW
change 0 ohm
A11
U4
V1
V7
W2
Y7
A17
B17
C17
F18
G17
G18
VCCSUS1_5[1]
G19
VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]
G20
F20
E24
E23
E22
E21
E20
D27
D26
D25
D24
VCC1_5[67]
G8
CORE
VCCSUS1_5[3]
VCCSUS1_5[2]
U7
R7
PCI/IDE RBP
C667
0.1U_0402_16V4Z
1
2
C677
1
Near PIN
AG13, AG16
C6761
C79
0.1U_0402_16V4Z
1
2
+3VS
C524
0.01U_0402_16V7K
1
2
Near PIN
A2-A6, D1-H1
Near PIN A25

C93
0.01U_0402_16V7K
1
2
+1.5VALW
2
Near PIN AA19
+3VALW
C61
0.1U_0402_16V4Z
1
2
+1.5VS
C89
0.1U_0402_16V4Z
1
2
+2.5VS
V5REF[2]
V5REF[1]
AA18
A8
ICH_V5REF_RUN
F21
ICH_V5REF_SUS
A25
A24
+1.5VS
+3VALW
AB3
+RTCVCC
G11
G10
+1.5VS
AG23
AD26
AB22
G16
G15
F16
F15
E16
D16
C16
C86
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
VCC2_5[4]
VCC2_5[2]
VCCUSBPLL
VCCLAN3_3/VCCSUS3_3[1]
VCCSUS3_3[20]
VCCRTC
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
V_CPU_IO[3]
VCCSUS3_3[4]
V_CPU_IO[2]
VCCSUS3_3[5]
V_CPU_IO[1]
VCCSUS3_3[6]
VCCSUS3_3[19]
VCCSUS3_3[7]
VCCSUS3_3[18]
VCCSUS3_3[8]
VCCSUS3_3[17]
VCCSUS3_3[9]
VCCSUS3_3[16]
VCCSUS3_3[10]
VCCSUS3_3[15]
VCCSUS3_3[11]
VCCSUS3_3[14]
VCCSUS3_3[12]
VCCSUS3_3[13]
C85
0.1U_0402_16V4Z
1
2
AB18
P7
V5REF_SUS
C94
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z +3VS
C84
0.1U_0402_16V4Z
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
P1
M7
L7
L4
J7
H7
H1
E4
B1
A6
C78
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
VCC1_5[46]
VCC1_5[47]
VCC1_5[48]
VCC1_5[49]
VCC1_5[50]
VCC1_5[51]
VCC1_5[52]
VCC1_5[53]
VCC1_5[54]
VCC1_5[55]
SATA
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AF5
AG5
+1.5VS
VCC3_3[11]
VCC3_3[10]
VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]
C90
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C523
0.1U_0402_16V4Z
1
2
Near PIN A24
Near PIN AB18
+3VS
+1.05VS
2
C91
0.1U_0402_16V4Z
1
2
C62
0.1U_0402_16V4Z
1
2
Near PIN AG23
VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]
GROUND
C681
0.1U_0402_16V4Z
C83
0.1U_0402_16V4Z
1
2
C87
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
C80
0.1U_0402_16V4Z
C678
AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12
U36D
E27
Y6
Y27
Y26
Y23
W7
W25
W24
W23
W1
V4
V27
V26
V23
U25
U24
U23
U15
U13
T7
T27
T26
T23
T16
T15
T14
T13
T12
T1
R4
R25
R24
R23
R17
R16
R15
R14
R13
R12
R11
P22
P16
P15
P14
P13
P12
N7
N17
N16
N15
N14
N13
N12
N11
N1
M4
M27
M26
M23
M16
M15
M14
M13
M12
L25
L24
L23
L15
L13
K7
K27
K26
K23
K1
J4
J25
J24
J23
H27
H26
H23
G9
G7
G21
G12
G1
C77
0.1U_0402_16V4Z
1
2
C63
0.1U_0402_16V4Z
2
C687
1U_0603_10V4Z
VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]
C672
C6731
C55
0.1U_0402_16V4Z
C96
0.1U_0402_16V4Z
ICH_V5REF_RUN
2
C58
2
RB751V_SOD323
1
10_0402_5%
D27
@ 1K_0402_5%
1
R485
PCIE
R815
0.1U_0402_16V4Z
C670
0.1U_0402_16V4Z
+3VS
VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]
IDE
+5VS
+5VCD
FOR SW DJ FUNCTION
VCC1_5[1]
VCC1_5[2]
VCC1_5[3]
VCC1_5[4]
VCC1_5[5]
VCC1_5[6]
VCC1_5[7]
VCC1_5[8]
VCC1_5[9]
VCC1_5[10]
VCC1_5[11]
VCC1_5[12]
VCC1_5[13]
VCC1_5[14]
VCC1_5[15]
VCC1_5[16]
VCC1_5[17]
VCC1_5[18]
VCC1_5[19]
VCC1_5[20]
VCC1_5[21]
VCC1_5[22]
VCC1_5[23]
VCC1_5[24]
VCC1_5[25]
VCC1_5[26]
VCC1_5[27]
VCC1_5[28]
VCC1_5[29]
VCC1_5[30]
VCC1_5[31]
VCC1_5[32]
VCC1_5[33]
VCC1_5[34]
VCC1_5[35]
VCC1_5[36]
VCC1_5[37]
VCC1_5[38]
VCC1_5[39]
VCC1_5[40]
VCC1_5[41]
VCC1_5[42]
VCC1_5[43]
VCC1_5[44]
VCC1_5[45]
F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19
PCI
U36E
AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22
C69
0.1U_0402_16V4Z
1
2
+RTCVCC
USB
+1.5VS
USB CORE
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C81
0.1U_0402_16V4Z
C56
C510
C95
+1.5VS
220U_D2_4VM_R12
Near PIN F27(C155),

P27(C154), AB27(C157)
VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]
F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1
ICH6_BGA609
C671
0.1U_0402_16V4Z
1
2
ICH6_BGA609
Near PIN AG10
Near PIN A17

C625 2
0.01U_0402_16V7K
Near PIN
AC27
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
ICH6(4/4)_POWER&GND
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
26
of
52
+3VS
SATA Module
+1.8VS
+5VS
0.1U_0402_16V4Z
1
1
C102
C100
2
1000P_0402_50V7K
0.1U_0402_16V4Z
1
1
C97
C103
2
1U_0603_10V4Z
C25
2
4.7U_0805_10V4Z
C551
C488
2
0.1U_0402_16V4Z
Pleace near U178
Pleace near HD CONN
ATAIOSEL
2
10K_0402_5%
P IDE_HIORDY
2
4.7K_0402_5%
PIDE_HIOCS16#
2
10K_0402_5%
T0
2
@ 10K_0402_5%
T2
2
@ 10K_0402_5%
T3
2
10K_0402_5%
T6
2
10K_0402_5%
1
R389
1
R420
1
R419
1
R391
1
R394
1
R398
1
R401
0.1U_0402_16V4Z
1
R393
T1
2
10K_0402_5%
2
R417
PIDE_HDREQ
1
5.6K_0402_5%
2
R416
PIDE_HINTRQ
1
10K_0402_5%
Sets maximum transfer rate and UDMA mode

CNFG2 CNFG1 CNFG0
INT PD
INT PD
*
U35
PIDE_HRESET# 1
R392
PIDE_HDA0
PIDE_HDA1
PIDE_HDA2
PIDE_HCS0#
PIDE_HCS1#
50
51
49
48
47
PIDE_HIOCS16#
PIDE_HINTRQ
PIDE_HDMACK#
P IDE_HIORDY
PIDE_HDIOR#
PIDE_HDIOW#
PIDE_HDREQ
2 PIDE_R_HRESET#
33_0402_5%
52
53
54
55
58
59
60
16
46
45
43
HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15
HDA0
HDA1
HDA2
HCS0#
HCS1#
32
31
27
28
SATA_DTX_IRX_P0
SATA_DTX_IRX_N0
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
RST#
T0
T1
T2
T3
T4
T5
T6
T7
CNFG2
CNFG1
CNFG0
ATAIOSEL
17
33
34
35
36
37
38
39
40
20
19
18
21
SATA_RST#
T0
T1
T2
T3
XTLIN/OSC
XTLOUT
22
23
IDE_XTLIN
IDE_XTLOUT
ISET
VDDIO_0
VDDIO_1
VDD_0
VDD_1
VDD_2
VAA1
VAA2
26
44
4
9
41
56
24
29
VSS1
VSS2
GND_0
GND_1
GND_2
25
30
8
42
57
C465 2
1 0.01U_0402_16V7K
C466 2
1 0.01U_0402_16V7K
Power
UART
SATA_DTX_C_IRX_P0 24
SATA_DTX_C_IRX_N0 24
SATA_ITX_C_DRX_P0 24
SATA_ITX_C_DRX_N0 24
Device Mode 133MB/s
1
1
0
0
0
1
Device Mode 150MB/s

Host Mode 100MB/s
Host Mode 150MB/s
Reserved
Reserved
Host Mode 133MB/s
SUYIN_200055FB044GX03ZX
T5
T6
1
R397
2
10K_0402_5%
CNFG1
1
R390
2
10K_0402_5%
PIDE_HRESET#
PIDE_HDD7
PIDE_HDD6
PIDE_HDD5
PIDE_HDD4
PIDE_HDD3
PIDE_HDD2
PIDE_HDD1
PIDE_HDD0
ATAIOSEL
2
R373
P-ATA HDD Conn.
+3VS
HIOCS16#
HINTRQ
HDMACK#
HIORDY
HDIOR#
HDIOW#
HDMARQ
HRESET#
HPDIAG#
UAO
UAI
TXP
TXM
RXP
RXM
SATA
Config & Debug
62
64
2
5
7
11
13
15
14
12
10
6
3
1
63
61
Parallel ATA
PIDE_HDD0
PIDE_HDD1
PIDE_HDD2
PIDE_HDD3
PIDE_HDD4
PIDE_HDD5
PIDE_HDD6
PIDE_HDD7
PIDE_HDD8
PIDE_HDD9
PIDE_HDD10
PIDE_HDD11
PIDE_HDD12
PIDE_HDD13
PIDE_HDD14
PIDE_HDD15
NOTE
Device Mode 100MB/s
+1.8VS
0.1U_0402_16V4Z
L25
1
1
C459
2
C468
PIDE_HDREQ
PIDE_HDIOW#
PIDE_HDIOR#
P IDE_HIORDY
PIDE_HDMACK#
PIDE_HINTRQ
PIDE_HDA1
PIDE_HDA0
PIDE_HCS0#
2 @ 10K_0402_5%
+3VS
1
12.1K_0603_1%
2
C460
R78
2
CHB1608U800_0603
+5VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
C461
2.2U_0603_6.3V6K
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
PIDE_HDD8
PIDE_HDD9
PIDE_HDD10
PIDE_HDD11
PIDE_HDD12
PIDE_HDD13
PIDE_HDD14
PIDE_HDD15
SEC_CSEL
PIDE_HDA2
PIDE_HCS1#
R429 1
2 470_0402_5%
R430 1
R433 1
2 10K_0402_5%
2 10K_0402_5%
+5VS
JP8
R407
10K_0402_5%
0.01U_0402_16V7K
1000P_0402_50V7K
88SA8040_TQFP64
R384
0_0603_5%
2
+3VS
+3VALW
+3VALW
Y3
IDE_XTLOUT
Place near connector side.
R374
@ 0_0402_5%
25 IDE_HDDRST#
PLT_RST#
12
13
R372
@ 1M_0402_5%
U13D
O
6,15,23,25,28,31,35,39 PLT_RST#
R833 @ 0_0402_5%
1
2
U13A
+3VALW
R832
10K_0402_5%
14
14
@ 25MHZ_12PF_1BG25000CK1B
C710
2 0.1U_0402_16V4Z
SATA_RST#
11
IDE_XTLIN
36,39 EC_IDERST
C493
0.1U_0402_16V4Z
1
C503
0.1U_0402_16V4Z
1
C27
4.7U_0805_10V4Z
C470
@ 12P_0402_50V8J
2
C439
@ 12P_0402_50V8J
2
+3VS
1
25MHz reference clock T[4:3] = 01

R840
0_0402_5%
X5
2
C370
2
1
U25
C321
GM@
+1.8VS
VOUT
GND
VIN
+3VS
1
1U_0603_10V4Z
2
VDD
OUT
CONT VSS
IDE_XTLIN
1U_0603_10V4Z
BP
1
GM@
2
0.1U_0402_16V4Z
SHDN#
C369 APL5301-18BC-TR_SOT23-5
GM@
GM@
SUSP#
OSC 25MHZ SG645PCG

C862
0.1U_0402_16V4Z
33,39,40,42,47,49
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
SATA/PATA-HDD, PATA ODD Connector
5
Title
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
27
of
52
Reserve for SWDJ

Q58
@ AOS 3401_SOT23
3
+5VCD
PJ20
+5VALW
+5VS
@ JUMP_43X118
R816
+5VALW
1
2
@ 240K_0402_5%
C851
1
2
R817 @ 10K_0402_5%
2
1
1
@ 1U_0603_10V4Z
CD_PLAY
CD_PLAY 39
Q59
@ DTC124EK_SC59
+5VCD
Placea caps. near CDROM

CONN.
Reserve for SWDJ
C769
1U_0603_10V4Z
2
C779
10U_1206_16V4Z
G_PCI_RST#
@ 0.1U_0402_16V4Z
0.1U_0402_16V4Z
IDE_DCS3#
IDE_DCS3#
R818
@ 10K_0402_5%
U50A
O
SW_SD_CS#3
24
+5VCD
C766
C852
1
14
C764
1000P_0402_50V7K 2
OE#
+3VALW
1
@ SN74LVC125APWLE_TSSOP14
R830 0_0402_5%
2
Reserve for SWDJ
CDROM CONN
+5VCD
CD_AGND
G_PCI_RST#
CD_AGND 36
4
JP13
INT_CD_L
INT_CD_L
39 ODD_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
24 IDE_DIOW#
24 IDE_DIORDY
24
IDE_IRQ
24
IDE_DA1
24
IDE_DA0
+5VCD
1
R553
SW_SD_CS#1
2
100K_0402_5%
+5VCD
39
SHDD_LED#
SD_CSEL
ALLTOP_C12431-1-5001
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
24
INT_CD_R
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DCS1#
IDE_DCS1#
SW_SD_CS#1
INT_CD_R 36
1
R102
2
@ 0_0603_5%
R831
0_0402_5%
2
1
IDE_DDREQ 24
IDE_DIOR# 24
PDIAG#
1 R551
SW_SD_CS#3
W=80mils
IDE_DDACK# 24
100K_0402_5%
2
+5VCD
IDE_DA2 24
Reserve for SWDJ
+5VCD
+3VALW
1
2
+5VCD
R564 @ 100K_0402_5%
R820
@ 10K_0402_5%
2
R557
470_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
36
R819
@ 10K_0402_5%
U50B
2
10U_0805_10V4Z
OE#
C149
G_PCI_RST#
IDE_DD[0..15]
23,29,31,34,35,39 PCI_RST#
6,15,23,25,27,31,35,39 PLT_RST#
R821 @ 0_0402_5%
R_PCIRST#
1
2
2
G
1
IDE_DD[0..15]
24
@ 2N7002_SOT23
Q60
2
R822 @ 0_0402_5%
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
CDROM Connector & Direct CD

Size
Document Number
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
28
of
52
U28
27
RST#
CLK_PCI_LAN 28
PM_CLKRUN# 65
4
17
128
21
38
51
66
81
91
101
119
Y4
LAN_X1
LAN_X2
25MHZ_20P_1BX25000CK1A
C455
27P_0402_50V8J
C445
27P_0402_50V8J
35
52
80
100
88
10
120
NC/HSDAC+
NC/HG
NC/LG2
NC/LV2
11
123
124
126
9
13
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
22
48
62
73
112
118
R353
75_0402_1%
1
RJ45_GND
C464
C463
0.01U_0402_25V7Z
0.1U_0402_16V4Z
2
2
+LAN_DVDD
C
RTT3/CRTL18
125
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
26
41
56
71
84
94
107
CLK
CLKRUN#
1
C469
0.01U_0402_25V7Z
1
R354
75_0402_1%
LF-H80P_16P
R386
49.9_0402_1%
+3V
NC/VSS
NC/VSS
CTRL25
GND/VSS
GND/VSS
GND/VSS
GND
GND
GND
GND
10mil
RJ45_TX+
RJ45_TX-
2
NC/M66EN
NC/AVDDH
NC/HV
INTA#
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
2 1K_0402_5% +3VS
2 15K_0402_5%
2 5.6K_0603_1%
RJ45_RX+
RJ45_RX-
16
15
14
13
12
11
10
9
AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
3
7
20
16
32
54
78
99
40mil
+2.5V_LAN
C421
10U_0805_10V4Z
+3V
C423
0.1U_0402_16V4Z
Q33
DTA114YKA_SOT23
1 1
2
R336
300_0402_5%
JP4
10mil
12
Amber LED+
11
Amber LED-
CTRL25
PR4+
PR2-
PR3-
PR3+
RJ45_RX+
PR2+
RJ45_TX-
PR1-
RJ45_TX+
PR1+
RJ45_RX+3V
+LAN_AVDDL
1
L24
40mil
1
C419
2
0_0805_5%
+3V
1
1
0.1U_0402_16V4Z C426
C425
2
0.1U_0402_16V4Z
2
+3V
0.1U_0402_16V4Z
2
1 1
+LAN_DVDD
1
R347
40mil
24
45
64
110
116
2
0_0805_5%
Q35
DTA114YKA_SOT23
LINK10_100#
+2.5V_LAN
1
1
0.1U_0402_16V4Z
C471
2
0.1U_0402_16V4Z
2
R334
300_0402_5%
10
Green LED-
Green LED+
10mil
16
SHLD3
15
SHLD2
14
SHLD1
13
AMP RJ45/RJ11 with LED

R346
R345
75_0402_1% 75_0402_1%
RJ45_GND
C482
C4580.1U_0402_16V4Z
2
2
SHLD4
PR4-
ACTIVITY#
1
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
Q34
2SB1197K_SOT23
2
B
CTRL25
PME#
R356 1
R357 1
R361 1
LAN_TD+
LAN_TDR388
49.9_0402_1%
R385
49.9_0402_1%
RX+
RXCT
NC
NC
CT
TX+
TX-
20mil
31
10mil
LAN_ISOLATE#
LOAN_RTSET
R387
49.9_0402_1%
RD+
RDCT
NC
NC
CT
TD+
TD-
34,39 ONBD_LAN_PME#
14 CLK_PCI_LAN
25,34,35 PM_CLKRUN#
105
23
127
72
74
LAN_X1
LAN_X2
1
2
3
4
5
6
7
8
PCI_PIRQF#
23,28,31,34,35,39 PCI_RST#
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
REQ#
GNT#
25
23
121
122
10K
30
29
PCI_REQ#3
PCI_GNT#3
LAN_RD+
LAN_RD-
14
15
18
19
X1
X2
U30
23
23
PERR#
SERR#
H=1.98mm
10K
70
75
AT93C46-10SI-2.7_SO8
C494
0.1U_0402_16V4Z
23,31,34 PCI_PERR#
23,31,34 PCI_SERR#
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
8
7
6
5
76
61
63
67
68
69
VCC
NC
NC
GND
47K
23,31,34 PCI_PAR
23,31,34 PCI_FRAME#
23,31,34 PCI_IRDY#
23,31,34 PCI_TRDY#
23,31,34 PCI_DEVSEL#
23,31,34 PCI_STOP#
2 LAN_IDSEL
100_0402_5%
CS
SK
DI
DO
IDSEL
1
R383
1
2
3
4
46
PCI_AD17
LAN_TD+
LAN_TDLAN_RD+
LAN_RD-
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
C/BE#0
C/BE#1
C/BE#2
C/BE#3
1
2
5
6
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO
+3V
47K
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
ACTIVITY#
LINK10_100#
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
92
77
60
44
23,31,34
23,31,34
23,31,34
23,31,34
117
115
114
113
2
R402
3.6K_0402_5%
LED0
LED1
LED2
NC/LED3
LAN RTL8100C(L)
U32
1
LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS
@
C416
15P_0402_50V8J
108
109
111
106
@
R355
10_0402_5%
+3V
EEDO
AUX/EEDI
EESK
EECS
CLK_PCI_LAN
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
LAN I/F
104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33
Power
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI I/F
PCI_AD[0..31]
23,31,34 PCI_AD[0..31]
LANGND
C403
1000P_1206_2KV7K
1
C404
C409
4.7U_0805_10V4Z
+3V
AVDD25/HSDACRTL8100C_QFP128
12
+2.5V_LAN_VDD
1
20mil
C424
0.1U_0402_16V4Z
1
R348
2
0_0805_5%
0.1U_0402_16V4Z
+2.5V_LAN
0.1U_0402_16V4Z
1
1
C420
10U_0805_10V4Z
C462
C440
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C484
C481
2
2
0.1U_0402_16V4Z
1
C483
2
2
0.1U_0402_16V4Z
C418
0.1U_0402_16V4Z
Termination plane should be closed

to chassis ground and also depends
on safety concern
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
LAN RTL8100CL
Custom
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
29
of
52
+S1_VCC
+3VS
33
S1_IOWR#
33
S1_IORD#
33
33
S1_OE#
S1_CE2#
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
33
S1_REG#
33
S1_CE1#
33
S1_WAIT#
33 S1_INPACK#
33
S1_WE#
33
S1_BVD1
33
S1_WP
S1_A16
2
R534
3
33
33
S1_RDY#
S1_RST
33
S1_BVD2
33
33
33
33
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
R504
R503
S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
A16_CLK
1
33_0402_5%
S1_RDY#
S1_RST
S1_BVD2
2
2
A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
A_CAD12/A_A11
A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3
C5
F9
B10
G12
A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CC/BE0#/A_CE1#
G10
C8
A8
B8
A9
C9
E10
F10
B3
E7
B9
B2
C3
E9
C4
A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSEL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CSTSCHG/A_BVD1(STSCHG/RI)
A_CCLKRUN#/A_WP(IOIS16)
A_CCLK/A_A16
A_CINT#/A_READY(IREQ)
A_CRST#/A_RESET
A2
A_CAUDIO/A_BVD2(SPKR#)
C15
E5
A3
E8
A_CCD1#/A_CD1#
A_CCD2#/A_CD2#
A_CVS1/A_VS1#
A_CVS2/A_VS2#
S1_D14
S1_D2
S1_A18
B13
D2
C10
A_CRSVD/A_D14
A_CRSVD/A_D2
A_CRSVD/A_A18
E2
E1
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
PCI 7411
A6
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
1
@ 10K_0402_5%
1
@ 10K_0402_5%
DATA
CLOCK
LATCH
A_USB_EN#
B_USB_EN#
N1
L6
N2
DATA_CB 33
CLOCK_CB 33
LATCH_CB 33
B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19
F15
G18
K14
M18
K13
G19
H17
J13
J17
H19
J19
J18
B18
E18
J15
F14
A18
H18
B19
F17
C17
N13
B17
C18
F19
N17
A15
K15
+3VS
1U_0603_10V4Z
0.1U_0402_16V4Z
1
G7
G8
G13
H13
J9
J10
J11
K9
K10
K11
L8
L9
L10
L11
L12
M8
0.1U_0402_16V4Z
1
1
C708
C740
2
0.1U_0402_16V4Z
C707
2
C729
C722
1
0.1U_0402_16V4Z
+3VS
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1
1
C172
C754
2
0.1U_0402_16V4Z
C759
2
1
C757
C714
2
0.1U_0402_16V4Z
10U_0805_10V4Z
+S1_VCC
1
C726
0.1U_0402_16V4Z
1
C728
0.1U_0402_16V4Z
1
C735
0.1U_0402_16V4Z
C736
0.1U_0402_16V4Z
4510_2 2
R542
1K_0402_5%
(44+1)10@
Reserve for TI PCI4510
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+3VS
S1_REG#
S1_A12
S1_A8
S1_CE1#
D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14
For Cardbus TI7411 & TI6411
D19
K19
U43A
RSVD
RSVD
S1_D[0..15]
H8
H9
H10
H11
H12
J8
M7
J12
M9
M10
M12
K8
K12
N7
S1_D[0..15]
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
33
S1_A[0..25]
A5
A11
S1_A[0..25]
VCCA
VCCA
33
7411@ PCI7411GHK_PBGA288
PCI4510 =one Slot

PCI1510 =one Slot
PCI6411 =one Slot
PCI7411 =one Slot
Cardbus + 1394
Cardbus
Cardbus + 5 in 1
Cardbus + 5 in 1 + 1394
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
A
Title
PCI7411-1
Custom
EAL30
Date:
R ev
1.0
LA-2691
, 03, 2005
Sheet
E
30
of
52
+3VS
change 0 ohm
+VDPLL_33
L10
CHB1608U301_0603
1
2
C210
0.01U_0402_16V7K
C211
10U_0805_10V4Z
0.1U_0402_16V4Z
1
C207
2
C219
2
0.01U_0402_16V7K
C854 (44+1)10@
Place C854 near T18 and T19
FILTER1
2
0.1U_0402_16V4Z
1
C215
C755
2
0.1U_0402_16V4Z
7411@
Place C755 near T17 and T18
2
0.1U_0402_16V4Z
2 C704
C322
L2
K5
K3
K7
L1
L3
L5
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
R293
@ 15P_0402_50V8J
CLK_SD_48M
@ 10_0402_5%
2
R109
+3VS
33
VCCD1#
1
R118
Reserve for TI PCI4510

1
1K_0402_5%
1394@
56.2_0603_1%
R539
1394@
56.2_0603_1%
R535
2
56.2_0603_1% 1394@
R536
Connect To
Shielding
GND
JP20
R550
1
1394@
1394@
56.2_0603_1%
R541
FOX_UV31413-4R1-TR
4 4
6 6
3 3
5 5
2 2
1 1
1
1394@
C730
220P_0402_50V7K
+AVDD_7411
2
R128
4.7K_0402_5%
2
6.34K_0402_1%
1394@
2
P12
W17
T19
M1
R17
U18
U19
TPBIAS0
U15
TPA0+
V15
TPA0W15
TPB0+
V14
TPB0W14
U17
2
1
C371
1394@ 1U_0603_10V4Z V18
1
2
R543
1394@ 1K_0402_5%
W18
V16
1
2
R540
1394@ 1K_0402_5%
W16
M11
1
2
R123
1394@ 1K_0402_5%
P15
1
1394@ 4.7K_0402_5%
R19
R18
R12
U13
V13
18P_0402_50V8J
C761
W4
W7
W9
W11
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#
P9
V7
R8
U7
W8
N8
W5
V8
U8
U1
T2
PCI_PAR 23,29,34
PCI_FRAME# 23,29,34
PCI_TRDY# 23,29,34
PCI_IRDY# 23,29,34
PCI_STOP# 23,29,34
PCICLK
PCIRST#
GRST#
RI_OUT#/PME#
P5
R3
T1
T3
SUSPEND#
R2
SPKROUT
L7
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
N3
M5
P1
P2
P3
N5
R1
SCL
SDA
M3
M2
VR_EN#
H2
PCI7411
TEST0
NC
RSVD
CLK_48
PHY_TEST_MA
R0
R1
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
TPBIAS1
TPA1P
TPA1N
TPB1P
TPB1N
CPS
CNA
XO
XI
PC0(TEST1)
PC1(TEST2)
PC2(TEST3)
P14
T17
N12
U14
U16
1394@
X3
24.576MHz_16P_3XG-24576-43E1
C/BE3#
C/BE2#
C/BE1#
C/BE0#
1
2 2
5IN1 LED
Side View
D9
10K
5IN1_LED
Q4
5IN1@ 47K
DTC114YKA_SC59
1
R523
PCI_AD20
PCI_PERR# 23,29,34
PCI_SERR# 23,29,34
PCI_REQ#2 23
PCI_GNT#2 23
R292
1
@
C323
2 1
@
10_0402_5% 15P_0402_50V8J
CLK_PCI_PCM
R512 2
R513 2
1
R516
2
4.7K_0402_5%
0_0402_5%
1
1 @ 0_0402_5%
CLK_PCI_PCM 14
PCI_RST# 23,28,29,34,35,39
PLT_RST# 6,15,23,25,27,28,35,39
+3VS
PCM_SPK#
PCM_SPK# 36
7411_PIRQA#
7411_PIRQB#
7411_PIRQC#
7411_PIRQD#
5IN1_LED
1
1 R510
R518
PCI_PIRQA# 23
PCI_PIRQB# 23
PCI_PIRQC# 23
SERIRQ 25,35,39
PCI_PIRQD# 23
5IN1_LED 32
2
2 300_0402_5%
300_0402_5%
R110
33K_0603_1%
2
R517
1
@ 10K_0402_5%
2
R509
1
10K_0402_5%
+3VS
7411@ PCI7411GHK_PBGA288
R511
1K_0402_5%
C758
C706
0.1U_0402_16V4Z
1394@
2005/03/01
Issued Date
Compal Secret Data
PCI1510 & PCI6411 UNMOUNT THOSE PARTS
2006/03/01
Deciphered Date
A
23,29,34
23,29,34
23,29,34
23,29,34
18P_0402_50V8J
D29
HT-110UYG-CT_YEL/GRN
5IN1@
PCM_ID 2
100_0402_5%
R587
120_0402_5%
5IN1@
1394@
5.11K_0603_1%
R533
R552
1
+3VS
1394@
C750
1U_0603_10V4Z
EAL20 CONN
2
1K_0402_5%
FILTER1
2
R287(44+1)10@
CLK_SD_48M
14 CLK_SD_48M
1
10K_0402_5%
+3VS
SM_CLE/SC_GPIO0
SM_R/B
SM_PHYS_WP#/SC_FCB
PCI_AD[0..31] 23,29,34
J7
K1
K2
SD_CLK/SM_RE#/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6
SD_WP/SM_CE#
PCI_AD[0..31]
V-PORT-0603-220 M-V05_0603
SMCLE
SMRB#
SM_PHYS_WP#
32
SMCLE
32
SMRB#
32 SM_PHYS_WP#
U2
V1
V2
U3
W2
V3
U4
V4
V5
U5
R6
P6
W6
V6
U6
R7
V9
U9
R9
N9
V10
U10
R10
N10
V11
U11
R11
W12
V12
U12
N11
W13
J5
J3
H3
J6
J1
J2
H7
C719
2
0.01U_0402_16V7K
R514 5IN1@
1
2 33_0402_5%
SMRE#
SMALE
32
SMALE
SMD4
32
SMD4
SMD5
32
SMD5
SMD6
32
SMD6
SMD7
32
SMD7
SDWP_SMCE#
32 SDWP_SMCE#
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C182
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_SDIO(DATA0)/SD_DAT0/SM_D0
AGND
AGND
AGND
32
SD_CD#
MS_CD#
SM_CD#
R284 1 5IN1@ 2 33_0402_5%

R104 1 5IN1@ 2 33_0402_5%G5
MSBS_SDCMD_SMWE2
F3
MSDATA3_SDDAT3_SMD3 H5
MSDATA2_SDDAT2_SMD2 G3
32 MSCLK_SDCLK
32 SMELWP#
32 MSBS_SDCMD_SMWE2
32 MSDATA3_SDDAT3_SMD3
32 MSDATA1_SDDATA1_SMD1
E3
F5
F6
2
0.1U_0402_16V4Z
1U_0603_10V4Z
2
C151
SDCD#
MSCD#
SMCD#
MC_PWR_CTRL_0
MC_PWR_CTRL_1
C733
32
32
32
F1
F2
0.01U_0402_16V7K
1
C175
MC_PWR_CTRL_0
1
2
R519 @ 0_0402_5%
SDCD#
MSCD#
SMCD#
32 MC_PWR_CTRL_0
VDPLL_33
VDPLL_15
AVDD
AVDD
AVDD
U43B
1U_0603_10V4Z
2
10U_0805_10V4Z
0.1U_0402_16V4Z
1
W10
W3
+3VS
VCCP
VCCP
C171
M19
H1
2
0.01U_0402_16V7K
1
C186
VR_PORT
VR_PORT
1
C201
V19
T18
2
0.1U_0402_16V4Z
C176
R13
R14
V17
C197
0.01U_0402_16V7K
VSSPLL
VSSPLL
+AVDD_7411
CHB1608U301_0603
0.1U_0402_16V4Z
2
1
L8
1
1
change 0 ohm
+3VS
Title
PCI7411-2
Custom
EAL30 LA-2691
Date:
Rev
1.0
, 03, 2005
Sheet
E
31
of
52
**
R524
10K_0402_5%
@
1
JP15
31 MSDATA1_SDDATA1_SMD1
31
SMD4
31
SMD5
31
SMD6
31
SMD7
+3VS
R555
10K_0402_5%
@
1
R528
10K_0402_5%
@
2
R285
2.2K_0402_5%
5IN1@
+3VS
+3VS
+VCC_5IN1
SDCD#
@ R298 0_0402_5%
1
2
31 MSBS_SDCMD_SMWE2
31
SMALE
31 SM_PHYS_WP#
MSCD#
MSDATA0_SDDAT0_SMD0
MSDATA1_SDDAT1_SMD1
MSDATA2_SDDAT2_SMD2
MSDATA3_SDDAT3_SMD3
SMD4
SMD5
SMD6
SMD7
34
33
32
31
21
22
23
24
SM_WP-IN
SM_PHYS_WPS#
MSBS_SDCMD_SMWE2
SMALE
35
43
36
37
SMCD#
31
SMCD#
+VCC_5IN1
31
SMRB#
31
SMRE#
31 SDWP_SMCE#
SMRB#
R836
1
5IN1@
SM_WP-IN
SM_PHYS_WPS#
2
0_0402_5%
31
SMCLE
25
3
29
26
27
28
30
2
38
SMCD#
SMRB#
SMRE#
SDWP_SMCE#
SMCD#
2
@ 0_0402_5%
SMCLE
1
R537
SM-D0 / XD-D0
SM-D1 / XD-D1
SM-D2 / XD-D2
SM-D3 / XD-D3
SM-D4 / XD-D4
SM-D5 / XD-D5
SM-D6 / XD-D6
SM-D7 / XD-D7
SD-DAT3
SD-DAT2
SD-DAT1
5 IN 1 CONN SD-DAT0
SD-WP-SW
SD-CMD
SD_CLK
SD-VCC
N/C
SM_WP-IN / XD_WP-IN
SD-CD-SW
SM-WP-SW
SD-CD-COM
#SM_-WE / XD_-WE
#SM-ALE / XD-ALE
MS-DATA0
MS-DATA1
SM-LVD
MS-DATA2
SM-CD-SW
MS-DATA3
SM_-VCC / XD_-VCC
MS-SCLK
#SM_R/-B / XD_R/-B
MS-INS
#SM_-RE / XD_-RE
MS-BS
#SM_-CE / XD_-CE
MS-VCC
#SM_-CD
SM-CD-COM
XD-VCC
SM-CLE / XD-CLE
XD-CD
GND
GND
TAITW_R007-010-N3
+3VS
R286
10K_0402_5%
SMELWP#
U21
MSCLK_SDCLK 31
+VCC_5IN1
SDCD#
SDCD#
MSCD#
31
31
+VCC_5IN1
40
39
1
44
SMCD#
5IN1@
Y
A
SD/XD/MS/SM PWR SWITCH
MSDATA0_SDDAT0_SMD0
MSDATA1_SDDAT1_SMD1
MSDATA2_SDDAT2_SMD2
MSDATA3_SDDAT3_SMD3
MSCLK_SDCLK
MSCD#
MSBS_SDCMD_SMWE2
4SM_WP-IN
SM_PHYS_WPS#
SMELWP#
15
14
16
18
19
17
13
20
2.2K_0402_5%
5IN1@
R295
1
C316
@
0.1U_0402_16V4Z
@
1
31
MSDATA3_SDDAT3_SMD3
MSDATA2_SDDAT2_SMD2
MSDATA1_SDDAT1_SMD1
MSDATA0_SDDAT0_SMD0
SDWP_SMCE#
MSBS_SDCMD_SMWE2
MSCLK_SDCLK
***
+3VS
11
12
6
7
5
10
8
9
4
42
41
TC7SH08FU_SSOP5
+3VS
R837 0_0402_5%
1
2
5IN1@
2
+VCC_5IN1
+VCC_5IN1
R526
10K_0402_5%
5IN1@
1
1
R506
10K_0402_5%
2
G
Q37
S
2N7002_SOT23
3
5IN1_LED
2
31
5IN1@
0_0603_5%
5IN1@
C718
2
1U_0603_10V6K
OUT
OUT
OUT
FLG
G528_SO8 5IN1@
8
7
6
5
1 2
MC_PWR_CTRL_1
GND
IN
IN
EN#
0.1U_0402_16V4Z
1
1U_0603_10V4Z
C743
5IN1@
C742
5IN1@
1
4.7U_0805_10V4Z
5IN1@
C739
2
1
2
3
4
5IN1@
1 R530
2
31 MC_PWR_CTRL_0
R538
470_0402_5%
5IN1@
U41
SMCD#
2
1
R838 @ 0_0402_5%
MC_PWR_CTRL_0
2
2
1
R839 5IN1@ 0_0402_5%
G
Q57
2N7002_SOT23
5IN1@
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
5IN 1 CON
Custom
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
32
of
52
Power Switch for PCMCIA

Power Switch for PCMCIA (PCI7411 & PCI6411 only)
U17
30
30
VPPD1
VCCD0#
VPPD0
DATA_CB
CLOCK_CB
2
1
R176 10K_0402_5%
7464@
+3VS
20mil
+S1_VPP
1
R177
47K_0402_5%
7464@
30
LATCH_CB
27,39,40,42,47,49 SUSP#
0.01U_0402_16V7K
C262
2
DATA
CLOCK
LATCH
RESET#
OC#
SHDN#
8
19
AVPP
NC0
12V
12V
+S1_VCC
7464@
1U_0603_10V4Z 2
40mil
C247
7464@
1 C261
3
4
5
12
15
21
7464@
10U_0805_10V4Z2
20
7
+3VS
NC3
3.3V
14
13
2
1
R161 @ 0_1206_5%
NC4
5V
5V
24
2
1
2
1
R180 @ 0_1206_5%
9
10
AVCC
AVCC
GND
11
17
18
NC1
NC2
NC5
NC6
NC7
NC8
23
22
16
6
C245
C246
+5VS
C289
C269
JP14
CardBus Socket
7464@
0.1U_0402_16V4Z
7464@
4.7U_0805_10V4Z
7464@
0.1U_0402_16V4Z
7464@
4.7U_0805_10V4Z
30
S1_CE1#
30
S1_OE#
30
30
S1_WE#
S1_RDY#
+S1_VCC
+S1_VPP
TPS2220ADBR_SSOP24
7464@
30
30
30
S1_WP
S1_A[0..25]
S1_D[0..15]
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
S1_A[0..25]
S1_D[0..15]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
GND
GND
D3 / CAD0
CD1# / CCD1#
D4 / CAD1
D11 / CAD2
D5 / CAD3
D12 / CAD4
D6 / CAD5
D13/ CAD6
D7 / CAD7
D14/ RFU
CE1# / CCBE0#
D15 / CAD8
A10 / CAD9
CE2# / CAD10
OE# / CAD11
VS1# / CVS1
A11 / CAD12
IORD# / CAD13
A9 / CAD14
IOWR# /CAD15
A8 / CCBE1#
A17 / CAD16
A13 / CPAR
A18 / RFU
A14 / CPERR#
A19 / CBLOCK#
WE# / CGNT#
A20 / CSTOP#
IREQ# / CINT#
A21 / CDEVSEL#
VCC
VCC
VPP1
VPP2
A16 / CCLK
A22 / CTRDY#
A15 / CIRDY#
A23 / CFRAME#
A12 / CCBE2#
A24 / CAD17
A7 / CAD18
A25 / CAD19
A6 / CAD20
VS2# / CVS2
A5 / CAD21
RESET / CRST#
A4 / CAD22
WAIT# / CSERR#
A3 / CAD23
INPACK# / CREQ#
A2 / CAD24
REG# / CCBE3#
A1 / CAD25
SPKR# / CAUDIO
A0 / CAD26
STSCHG# / CSTSCHG
D0 / CAD27
D8 / CAD28
D1 / CAD29
D9 / CAD30
D2 / RFU
D10 / CAD31
IOIS16# / CCLKRUN#
CD2# / CCD2#
GND
GND
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
71
73
75
77
79
81
83
85
87
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
70
72
74
76
78
80
82
84
86
88
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_CD1# 30
S1_CE2# 30
S1_VS1
30
S1_IORD# 30
S1_IOWR# 30
+S1_VCC
+S1_VPP
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#
S1_VS2
30
S1_RST
30
S1_WAIT# 30
S1_INPACK# 30
S1_REG# 30
S1_BVD2 30
S1_BVD1 30
S1_CD2# 30
FOX_WZ21131-G2-P4_RT
Power Switch for PCMCIA (PCI1510 & PCI4510 only)

+S1_VCC
U18
B
12V
13
12
11
40mil
+S1_VPP
+5VS
15PWS@
0.1U_0402_16V4Z C304
5
6
4.7U_0805_10V4Z C307
15PWS@
SHDN
GND
7
3.3V
3.3V
16
15PWS@
VCCD0
VCCD1
VPPD0
VPPD1
1
2
15
14
C756
10U_0805_10V4Z
+S1_VCC
1
C753
0.1U_0402_16V4Z
1
C752
0.1U_0402_16V4Z
OC
VCCD0#
VPPD0
VPPD1
VCCD1#
+S1_VPP
31
1
C751
4.7U_0805_10V4Z
C747
TPS2211AIDBR_SSOP16
15PWS@
R182
10K_0402_5%
3
4
2
4.7U_0805_10V4Z C292
15PWS@
10
Close to
CardBus Conn.
5V
5V
+3VS
15PWS@
0.1U_0402_16V4Z C294
VPP
20mil
1
2 15PWS@
C296 0.1U_0402_16V4Z
15PWS@
C297 0.1U_0402_16V4Z
1
2 15PWS@
C298 10U_0805_10V4Z
1
2 15PWS@
C302 0.01U_0402_25V4Z
1
2 15PWS@
C305 1U_0603_10V4Z
0.01U_0402_16V7K
VCC
VCC
VCC
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
PCMCIA Socket
Custom
EAL30
Date:
R ev
1.0
LA-2691
, 03, 2005
Sheet
1
33
of
52
+3V
0.1U_0402_16V4Z
1
C760
KS@
1
0.1U_0402_16V4Z
1
C784
KS@
+3VS
+3VS
+5VS
C776
KS@
10U_0805_10V4Z
2
C732
KS@
1000P_0402_50V7K
1
C749
KS@
0.1U_0402_16V4Z
1
C727
KS@
4.7U_0805_10V4Z
2
2
C748
KS@
1000P_0402_50V7K
0.1U_0402_16V4Z
1
C738
KS@
1
C121
1
KS@
C702
KS@
2
4.7U_0805_10V4Z
1
C240
KS@
1
C239
KS@
2
4.7U_0805_10V4Z
1
1000P_0402_50V7K
1000P_0402_50V7K
+3VALW
PCI_AD[0..31]
U51
TC7SH08FU_SSOP5
JP11
TIP
KILL_SW#
37,39
WL_OFF#
D10
KS@ 1
RB751V_SOD323
23
PCI_PIRQH#
+3VS
14 CLK_PCI_MINI
23
PCI_REQ#1
W=40mils
CLK_PCI_MINI
PCI_REQ#1
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25
23,29,31 PCI_CBE#3
CLK_PCI_MINI
PCI_AD23
PCI_AD21
PCI_AD19
R494
@ 10_0402_5%
23,29,31 PCI_CBE#2
23,29,31 PCI_IRDY#
2
1
C699
@ 10P_0402_50V8K
2
PCI_AD[0..31] 23,29,31
0.1U_0402_16V4Z
KS@
KS@
39
C709
PCI_AD17
PCI_CBE#2
PCI_IRDY#
25,29,35 PM_CLKRUN#
23,29,31 PCI_SERR#
PCI_SERR#
23,29,31 PCI_PERR#
23,29,31 PCI_CBE#1
PCI_PERR#
PCI_CBE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
+5VS
W=40mils
PCI_AD1
W=30mils
+5VS
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
RING
W=40mils
+5VS
W=40mils
+3V
PCI_RST# 23,28,29,31,35,39
+3VS
PCI_GNT#1 23
R842 @ 0_0402_5%
PCI_PIRQG# 23
W=40mils
PCI_GNT#1
MINI_PME# 29,39
PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL
2 R525 PCI_AD18
KS@ 100_0402_5%
PCI_AD22
PCI_AD20
PCI_PAR 23,29,31
PCI_AD18
PCI_AD16
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_FRAME# 23,29,31
PCI_TRDY# 23,29,31
PCI_STOP# 23,29,31
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_CBE#0
PCI_CBE#0 23,29,31
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
W=40mils
+3V
KS@ AMP_1318644-1
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
A
Title
Mini PCI Slot

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
E
34
of
52
10
SUPER I/O SMsC LPC47N217

C70
SIO@
C57
H
FIR_DET#
1
2
FIR@ R546 0_0402_5%
+3VS
2
RP5
DCD#1 8
RI#1 7
DSR#1 6
CTS#1 5
SIO@
4.7K_1206_8P4R_5%
1
2
3
4
+3VS
+IR_ANODE
1
RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#
62
63
64
1
2
3
4
5
SIO@ 1K_0402_5%
RXD1
R40 1
2
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
IRRX2
IRTX2
IRMODE/IRRX3
37
38
39
IRRX
IRTXOUT
IRMODE
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#
41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61
LPTINIT#
LPTSLCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#
1
2
R37 SIO@ 10K_0402_5%
+3VS
14 CLK_14M_SIO
R67
+3VS
15
16
LFRAME#
LDRQ#
SIO_PD#
17
18
PCI_RESET#
LPCPD#
PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#
19
20
21
6
CLK_14M_SIO
100K_0402_5% NOT-FIR@
2
1
FIR_DET#
LPT_DET#
R193 100K_0402_5% NOT-PIO@
2
1
SIO_GPIO11
SIO_SMI#
2 10K_0402_5%
SIO_IRQ
10K_0402_5%
2
+3VS
1 1K_0402_5%
R51 1 SIO@
+3VS
R50 1 SIO@
R53 2
SIO@
23
24
25
27
28
29
30
31
32
33
34
35
36
40
8
22
43
52
CLK_PCI_SIO
VSS
VSS
VSS
VSS
1
2
R48 SIO@
10K_0402_5%
C88
15P_0402_50V8J
W=40mil
C387
FIR@
0.1U_0402_16V4Z
1
3
5
7
IRED_A
TXD
SD/MODE
MODE
IRED_C
RXD
VCC
GND
TFDU6102-TR3_8P
T = 12mil
T = 12mil
VTR
VCC
VCC
VCC
VCC
POWER
7
11
26
45
54
FIR@
Parallel Port
+5V_PRN
D19
+5VS
2
PIO@
W=20mil
RB420D_SOT23
R308
PIO@
2.2K_0402_5%
PIO@
C394
0.1U_0402_16V4Z
RP40
LPD3
LPD2
LPD1
LPD0
W=20mil
+3VS
1
2
3
4
LPTSTB# 1
+5V_PRN_R
2
PIO@ R307 33_0402_5%
8
7
6
5
F D3
F D2
F D1
F D0
PIO@ 33_1206_8P4R_5%
JP2
RP43
LPTAFD# 1
2
PIO@ R304 33_0402_5%
AFD/3M#
F D0
LPTERR#
F D1
LPT_INIT#
F D2
SLCTIN#
F D3
F D4
C101
22P_0402_50V8J
F D5
F D6
F D7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
LPD7
LPD6
LPD5
LPD4
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
F D7
F D6
F D5
F D4
LPTSLCTIN# 1
SLCTIN#
2
PIO@
R305 33_0402_5%
+5V_PRN
RP41
8 F D0
7 F D1
6 F D2
5 F D3
1
2
3
4
PIO@ 2.7K_1206_8P4R_5%
1
2
3
4
8
7
6
5
F D7
F D6
F D5
F D4
PIO@ 2.7K_1206_8P4R_5%
L: R POP; PIO Enable

H: R De-POP PIO Disable
LPT_DET#
1
PIO@ R68
8
7
6
5
PIO@ 33_1206_8P4R_5%
RP42
Place on the TOP side(Under MDC conn.)
1
2
3
4
LPTINIT#
LPT_INIT#
1
2
PIO@ R306 33_0402_5%
PIO@ FOX_DZ11391-H7
IRTXOUT
IRMODE
2
4
6
8
IRRX
+IR_3VS
1
FIR@ R549
47_1206_5%
1
C388
FIR@
10U_0805_10V4Z
2
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23
+IR_3VS
+3VS
2
@
CLOCK
W=60mil
G
Base I/O Address

* 0 = 02Eh
1 = 04Eh
R72
33_0402_5%
R52
10_0402_5%
@
CLK14
2
4.7_1206_5% FIR@
2
4.7_1206_5% FIR@
U11
LPC47N217_STQFP64 SIO@
2
CLK_14M_SIO
CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#
FIR
1
R299
1
R300
LPC_FRAME#
LPC_DRQ#1
PARALLEL I/F
25,29,34 PM_CLKRUN#
14 CLK_PCI_SIO
25,31,39 SERIRQ
LAD0
LAD1
LAD2
LAD3
LPC I/F
+3VS
24,39 LPC_FRAME#
24 LPC_DRQ#1
10_0402_5%2
1
2@ 0_0402_5%
R56 1 SIO@ 2 10K_0402_5%
10
12
13
14
GPIO
R57
R58
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SERIAL I/F
U10
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
3,28,29,31,34,39 PCI_RST#
3,25,27,28,31,39 PLT_RST#
L: R POP; FIR Enable

H: R De-POPFIR Disable
FIR@ C853
22U_1206_16V4Z_V1
24,39
24,39
24,39
24,39
1
C626 SIO@
SIO@
0.1U_0402_16V4Z
SIO@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
C59
FIR Module
+3VS
CP2
AFD/3M#
1
8
LPTERR#
2
7
LPT_INIT# 3
6
SLCTIN#
4
5
PIO@
220P_1206_8P4C_50V8K
CP4
LPTACK#
1
8
LPTBUSY
2
7
LPTPE
3
6
LPTSLCT
4
5
PIO@
220P_1206_8P4C_50V8K
RP39
1
2
3
4
2
0_0402_5%
8
7
6
5
SLCTIN#
LPT_INIT#
LPTERR#
AFD/3M#
CP3
1
8
2
7
3
6
4
5
PIO@
220P_1206_8P4C_50V8K
F D0
F D1
F D2
F D3
PIO@ 2.7K_1206_8P4R_5%
+5VS
RP44
1
2
3
4
JP10
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
CP1
1
8
2
7
3
6
4
5
PIO@
220P_1206_8P4C_50V8K
F D4
F D5
F D6
F D7
PIO@ 2.7K_1206_8P4R_5%
Issued Date
2005/03/01
Deciphered Date
2006/03/01
Title
For SW debug use when no seial port

9
Compal Secret Data
@ E&T_96212-1011S
10
8
7
6
5
SMsC LAP47N217 SIO,PIO,FIR

Custom
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
35
of
52
+AVDD_AC97
AC97 Codec
1
1
+5VAMP
2
0_0805_5%
L29
CD_R
1
1U_0402_6.3V4Z
24
AC97_RST#
24
AC97_SYNC
AC97_RST#
1
R576
2
R575
AC97_SDOUT 2
R569
AC97_SYNC
AC97_SDOUT
2
22_0402_5%
1
22_0402_5%
1
22_0402_5%
EC_SM_D2
EC_SM_D2
EAPD
R562
0_0402_5%
16
JD2
MONO_OUT/VREFOUT3
37
17
JD1
HP_OUT_L
39
23
LINE_IN_L
HP_OUT_R
41
24
LINE_IN_R
18
CD_L
20
CD_GND
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
RESET#
10
SYNC
5
45
46
SDA
XTLSEL
SPDIFI/EAPD
48
SPDIFO
1
D
1
R829
XTL_OUT
AFILT2
30
VREFOUT
28
VREF
27
DCVOL
32
NC
VREFOUT2
VAUX
DISABLE#
SCK
31
33
34
43
44
NC
AVSS1
AVSS2
40
26
42
2
22_0402_5%
2
22_0402_5%
1
C791
1
C789
+VREFOUT 1
R573
AC97_BITCLK 24
AC97_SDIN0 24
R801
2 0_0402_5%
+AVDD_AC97
2
1000P_0402_50V7K
2
1000P_0402_50V7K
2
+AUD_VREF
0_0603_5%
@
R574
1M_0402_5%
C785
R567
EC_SM_C2
AGND
@
C787
2
C786
C793
C794
ALC250-VD_LQFP48
2
@ 0_0402_5%
1
R566
1
R563
2
10K_0402_5%
1
R828
+3VS
2
0_0402_5%
EC_IDERST 27,39
2
@ 1M_0402_5%
X4
XTL_IN 2
22P_0402_50V8J
CLK_14M_CODEC 14
AGND
AMP_RIGHT 37
Place these components

close to Codec
UnPoped:Clock source from X'tal

Poped: Clock source from Clock Gen
EC_SM_C2
XTL_IN
1
R570
1
R572
XTL_IN
DVSS1
DVSS2
U45
DGND
29
AMP_LEFT 37
AMP_RIGHT
SDATA_OUT
47
4
7
AFILT1
AMP_LEFT
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
C788 @ 47P_0402_50V8J
2
1
BIT_CLK
XTL_OUT
11
1
C777
1
C775
SDATA_IN
CD_R
19
Ra
Q62
@ 2N7002_SOT23
4,39 EC_SMC_2
2
@ 0_0402_5%
2
G
+AC97_DVDD
1
R825
2
1
R826@ 10K_0402_5%
2
1
R827@ 1K_0402_5%
LINER
37,39
DVDD1
LINEL
36
1U_0402_6.3V4Z
2
C806
MONO_IN
35
LINE_OUT_R
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1 CD_LIN
1U_0402_6.3V4Z
1 CD_R IN
1U_0402_6.3V4Z
1 CD_GNA1
1U_0402_6.3V4Z
1 C_MIC
1U_0402_6.3V4Z
LINE_OUT_L
AUX_R
MIC
1
C812
1
C809
1
C810
CD_L
2
C800
CD_R
2
C802
CD_GNA
2
C801
MIC
2
C803
DVDD2
38
25
SPEAKER_ID
NBA_PLUG
AUX_L
15
2
@ 1000P_0402_50V7K
2
@ 1000P_0402_50V7K
0.1U_0402_16V4Z
NBA_PLUG
C792
10U_0805_10V4Z
1U_0402_6.3V4Z
37
24
+3V
0.01U_0402_16V7K
SPEAKER_ID
2
G
Q61
@ 2N7002_SOT23
1
C778
1
C774
14
Use to isolate +5VALW and +AC97_DVDD
4,39 EC_SMD_2
+3VS
1U_0402_6.3V4Z
39
AVDD2
R584
37
+AC97_DVDD
1
R582 R580
2
1
R823@ 10K_0402_5%
2
1
R824@ 1K_0402_5%
C770
0.1U_0402_16V4Z
bypass EQ when NBA_PLUG = High
C807
10U_0805_10V4Z
L30
2
@ L31 0_0805_5%
2
0_0805_5%
1
XTL_OUT
24.576MHz_16P_3XG-24576-43E1
@
1
1
C773
C781
2
22P_0402_50V8J
0_0402_5%
AVDD1
R589
6.8K_0402_5%
C765
0.1U_0402_16V4Z
CD_GNA
6.8K_0402_5%
2
CD_AGND
INT_CD_R
28
28
CD_L
1
20K_0402_5%
1
20K_0402_5%
1
20K_0402_5%
INT_CD_L 2
R579
INT_CD_R2
R583
2
R581
INT_CD_L
6.8K_0402_5%
28
+AC97_DVDD
0_0402_5%
2
1
C796 4.7U_0805_10V4Z
1
2
+AUD_VREF
C790 0.1U_0402_16V4Z
3
+AVDD_AC97
MDC Connector
System Sound
R577
10K_0402_5%
2
+3V
BEEP#
R188
1
560_0402_5%
2
1U_0402_6.3V4Z
R588
10K_0402_5%
MONO_IN_O
C821
10U_0805_10V4Z
2
C805
2
1
+3VS
MONO_IN
25
C192
10U_0805_10V4Z
C327
1
2
SB_SPKR
1U_0402_6.3V4Z
R190
1
R548
2 0_0402_5%
2 0_0402_5%
L12
MONO_OUT/PC_BEEP
AUDIO_PWRDN/DETECH
GND
MONO_PHONE
AUXA_RIGHT
RESERVED/BT_ON#
AUXA_LEFT
GND
CD_GND
+5Vmain
CD_RIGHT
RESERVED/USB+
CD_LEFT
RESERVED/USBGND
RESERVED/PRIMARY_DN
+3.3Vaux/BT_VCC
RESERVED/+5VD/WAKEUP
GND
RESERVED/GND
+3.3Vmain
AC97_SYNC
AC97_SDATA_OUT
AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK
+5VS_MDC
2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
2
0_0603_5%
+5VS
C228 1U_0603_10V4Z
1
R149
1
2
10K_0402_5%
+3VS_MDC_R
+3VS
R554 1
2 0_0402_5%
2
1
1
2
R148
0_0402_5% R151 22_0402_5%
R147 1
AC97_SYNC
AC97_SDIN1 24
AC97_BITCLK
2 22_0402_5%
ACES_88018-3010
4
Issued Date
2005/03/01
2006/03/01
Deciphered Date
Custom
2
C
Compal Secret Data
D17
RB751V_SOD323
2
B
1
1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
560_0402_5%
R191
10K_0402_5%
560_0402_5%
C866
0.01U_0402_16V7K
AC97_SDOUT
AC97_RST#
R586
2
B
2.4K_0402_5%
MONO_IN_I
0_0603_5%
1
2+3VS_MDC
L9
2
JP16
R547
1U_0402_6.3V4Z
2
4
Q42
2SC2411K_SC59
PCM_SPK#
31
R189
1
R132 2
C193
10U_0805_10V4Z
1U_0402_6.3V4Z
C326
1
2
2
0_0805_5%
+3V_MDC
39
C325
1
2
Title
AC97 CODEC ALC250 Ver.C

Size
Document Number
Rev
1.0
EAL30 LA-2691
, 03, 2005
Date:
G
Sheet
36
H
of
52
+5VAMP
Audio Board Connector
R592
100K_0402_5%
2
Audio AMP
SHUTDOWN#
2N7002_SOT23
+5VAMP
W=40Mil
Q41
1
JP22
+5VAMP
2
G
EC_MUTE 39
S
2
C826
4.7U_0805_10V4Z
D
Q24
fo=1/(2*3.14*R*C)=260Hz
R=1.5K / C=0.47U
HIGH
PIN 10,4 ACTIVE
LOW
PIN 9,5 ACTIVE
NBA_PLUG
AMP_RIGHT
AMP_LEFT
1
C270
1
C824
1
C271
1
C829
AMP_RIGHT
AMP_LEFT
AMP_RIGHT
NBA_PLUG
VOL_AMP
INTSPK_L1
INTSPK_R1
AMP_L
2
1
2
0.47U_0603_16V4Z C266
0.47U_0603_16V4Z
AMP_R
2
1
2
0.47U_0603_16V4Z C828
0.47U_0603_16V4Z
HP_L
2
0.47U_0603_16V4Z
HP_R
2
0.47U_0603_16V4Z
2
3
4
21
5
23
6
20
1
0.1U_0402_16V4Z
1.5K_0402_5% 2
1 R178
AMP_L
1.5K_0402_5% 2
1 R591
AMP_R
PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
HP/LINE#
LOUTVOLUME
ROUTLOUT+
LIN
ROUT+
RIN
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK
AMP_LIN
AMP_RIN
17
WL_LED#
KILL_SW#
13
14
15
16
17
18
19
20
21
22
23
24
ACES_85203-1202
1
12
13
24
C301
C328
0.047U_0402_16V4Z
MIC
INTSPK_R1
INTSPK_L1
13
14
15
16
17
18
19
20
21
22
23
24
1
2
C268
0.1U_0402_16V4Z
INTSPK_L2
INTSPK_R2
TPA0232PWP_TSSOP24
MIC
36,39
1
2
3
4
5
6
7
8
9
10
11
12
NBA_PLUG
0.47U_0603_16V4Z
AMP_LEFT
36
EAPD
39
34,39
22
15
14
11
9
16
10
8
0.47U_0603_16V4Z
36
7
18
19
0.47U_0603_16V4Z
36
36
2
G
@ 2N7002_SOT23
U16
Pin 22
2
C265
+AUD_VREF
C293
0.1U_0402_16V4Z
1
2
3
4
5
6
7
8
9
10
11
12
NBA_PLUG
VOL_AMP
C299
C300
Speaker Connector
(0.47U~1U)
change 0 ohm
JP21
INTSPK_R1
INTSPK_R2
INTSPK_L1
INTSPK_L2
5
6
7
8
+5VALW_LDO
D
D
D
D
+12VALW
U15
SI4800DY_SO8
G
S
S
S
R171
1
2
3
4
ACES_85204-0400
C306
@
1
C295
2
C291
C290
3
Moat Bridge
(4.5V)
4
3
2
1
1K_0402_5%
1U_0603_10V4Z
1U_0603_10V4Z
AOS 3401_SOT23
22U_1206_16V4Z_V1
Q12
C303
1U_0603_10V4Z
22U_1206_16V4Z_V1
2
1
+5VLDO DECOUPLING
FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603
R184 10K_0402_5%
1
2
10K_0402_5%
2
2
2
2
D39
@ SM05_SOT23
+5VALWP
1
1
1
1
D38
SM05_SOT23
+5VALWP
R183
+5VALW DECOUPLING
+5VALW TO +5VLDO
+5VALWP
Regulator for AMP
L37
L36
L35
L34
+5VLDO
C264
(4.5V)
C804
1
C822
2
C813
1
C825
2
1
C827
2
0.1U_0402_10V6K
3
1
R
D12
0.1U_0402_16V4Z
1U_0603_10V4Z
3.9K_0603_1%
K
1
1U_0603_10V4Z
R590
LM431SB_SOT23
4.7U_0805_10V4Z
4.7U_0805_10V4Z
22U_1206_16V4Z_V1
3
1
2
G
Q14
2N7002_SOT23
38,39,42,49 SYSON
S 2N7002_SOT23
1
R179
1
R561
1
R571
Q13
2
G
1U_0805_25V4Z
+5VLDO
D
C819
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
C820
R593
4.99K_0603_1%
4
+5VAMP TO +5VLDO
L32
+5VLDO
2
0_0805_5%
L33
2
0_0805_5%
+5VAMP
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
C
Title
AMP & Audio Jack

Custom
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
37
of
52
+3VALW
for ON/OFF switch
ON/OFF BUTTON
KSI[0..7]
INT_KBD CONN.
+3VALW
R319
1
2
ON /OFF
2
1
4
4
6
5
SW2
@ SMT1-05_4P
EC_ON
3
D
Q16
39
39
39
39
39
MUL_KEY_ESD#
ON /OFF
2 MUL_KEY#
MODE_LED#
HDD_LED#
C249
PWR_SUSP_LED
0.1U_0402_16V4Z
EC_STOPBTN#
EC_PLAYBTN#
ACES_85203-1202
EC_FRDBTN#
TP_CLK
39
TP_DATA 39
+5VS
+5V
+5VALW
ACIN
25,39,43
POWER_LED# 39
SUSP_LED 39
BATT_CHGI_LED# 39
BATT_LOW_LED# 39
PWR_LED#
PWR_SUSP_LED
EC_REVBTN#
EC_UTXD/KSO17
MUL_KEY_ESD#
ON /OFF
+5V
1
2
G
RTCVREF
42
KSO8
24
KSO13
22
KSO3
20
KSO12
18
KSI6
16
KSO6
14
KSI3
17
KSO5
15
KSI0
13
12
KSO0
10
KSI1
11
KSI2
KSO4
1 R174
300_0402_5%
+3VS
3
2
1
35
36
0.1U_0402_16V4Z
NUM_LED# 1
C288
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
CAPS_LED# 1
C286
KSO15 1
C285
KSO10 1
C283
KSO8 1
C260
KSO13 1
C259
KSO3 1
C258
KSO12 1
C257
KSI6
1
C256
KSO6 1
C255
KSI3
1
C254
KSO0 1
C253
KSI1
1
C252
KSO2 1
C251
C858
220P_0402_50V7K
KSO2
D34
PSOT24C_SOT23
Power OK Circuit
+3VS
1
2
3
4
5
6
7
RTCVREF
C365
1U_0805_25V4Z
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
14
13
12
11
10
09
08
C364
1U_0603_10V6K
14
I
SYS_PWROK 25
1
14
P
1
RTCVREF
0.1U_0402_16V4Z
1
2
C333
0.1U_0402_16V4Z
SN74LVC14APWLE_TSSOP14
R222
100K_0402_5%
@
2
Pull Low
at SB
1
R201
10K_0402_5%
U47
U48B
R221
1
2
10K_0402_5%
1
2
C366 1U_0603_10V4Z
U48A
1
2
R200
10K_0402_5%
C332
1
2
R199
330K_0402_5%
2
RTCVREF
+3VALW
+3VALW
Q45
2N7002_SOT23
S4_LATCH
2
G
37,39,42,49 SYSON
39
C372 1U_0603_10V6K
Q44
2N7002_SOT23
Q43
2N7002_SOT23
3
2
G
1
2
Y
R198
10K_0402_5%
NC7SZ14M5X_SOT23-5
4
SUSON
C330
ON /OFF
2
G
0.1U_0402_16V4Z
2
U19
2
1
S4_LID_SW#
C331
1
100K_0402_5%
100K_0402_5%
19
1PADS_LED#
C287
1 KSO14
C284
1 KSO11
C282
1 KSO9
C281
KSI7
1
C280
1 KSO7
C279
KSI4
1
C278
KSI5
1
C277
1 KSO5
C272
KSI0
1
C276
1 KSO1
C275
KSI2
1
C274
1 KSO4
C273
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
1
2
@ R297 0_0805_5%
+5VALW
D18
1N4148_SOD80
KSO10
26
CAPS_LED# 39
JP19
RTCVREF
R197
21
KSI4
R173
2
1
300_0402_5%
+3VS
RTCVREF
R196
28
NUM_LED# 39
Battery mode Hibernation
R195
KSO7
KSO1
AO3402_SOT23
Q17
680K_0402_5%
KSO15
23
12
11
10
9
8
7
6
5
4
3
2
1
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
12
11
10
9
8
7
6
5
4
3
2
1
JP18
30
5
1
C867
1
C868
1
C869
1
C870
1
C871
1
C872
1
C873
1
C874
1
C875
1
C876
1
C877
1
C878
+5V
MUL_KEY# 39
PWR_LED#
24
23
22
21
20
19
18
17
16
15
14
13
CAPS_LED#
25
KSI7
WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
NUM_LED#
32
DAN202U_SC70
Touch Pad Connector
KSO9
KSI5
38
34
29
3 51_ON#
+5VS
27
D11
KSO11
2
G
@ 2N7002_SOT23
ACES_85203-1402
24
23
22
21
20
19
18
17
16
15
14
13
1 R220
2 2
0_0402_5%
+5V
MODE_LED# 39
HDD_LED# 39
KSI1
KSI0
KSI3
KSI2
KSO17
+3VS
31
D13
RLZ20A_LL34
C329
2 0.01U_0402_16V7K
Q15
0.1U_0402_16V4Z
2
PWR_LED#
PWR_SUSP_LED
EC_STOPBTN#
EC_PLAYBTN#
EC_FRDBTN#
EC_REVBTN#
EC_UTXD/KSO17
43
2 R181
1
300_0402_5%
KSO14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PADS_LED#
33
PADS_LED#
SW3
@ SMT1-05_4P
2
JP17
39
C229
1
51_ON#
39
+3VALW DAN202U_SC70
R219
4.7K_0402_5%
SW/LED Connector
ON/OFFBTN# 39
ON/OFFBTN#
51_ON#
ESE11MV9_4P
1
3
ACES_88172-3400
37
D28
DTC124EK_SC59
D5
V-PORT-0603-220 M-V05_0603
@
TOP
BTN
S4_LID_SW#
LID_SW#
R194
100K_0402_5%
6
5
2
39
SW1
1
39
KSO[0..15] 39
KEYBOARD CONN.
DAN202U_SC70
D22
100K_0402_5%
KSI[0..7]
KSO[0..15]
LID Switch
74LCX74MTC_TSSOP14
220P_0402_50V7K
39
S4_DATA
Q18
D15
2
RB751V_SOD323
D_SET_S4
2
G
2N7002_SOT23
1
1
1
2
R202
10K_0402_5%
C341
2
+3VALW
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
Title
S4R,LID,PIO,SYS CONN
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
38
of
52
+3VALW
1
R236
1
R237
1
R596
1
R203
1
R241
FSEL#
2
10K_0402_5%
MUL_KEY#
2
10K_0402_5%
FREAD#
2
10K_0402_5%
EC_SMI#
2
10K_0402_5%
SELIO#
2
10K_0402_5%
1
R811
1
R812
1
R813
1
R814
EC_SMD_2
2
10K_0402_5%
EC_SMC_2
2
10K_0402_5%
EC_SMC_1
2
10K_0402_5%
EC_SMD_1
2
10K_0402_5%
+3VALW
R595 2
38
38
+5VALWP
40,44
40,44
4,36
4,36
TP_CLK
TP_DATA
EC_SMC_1
EC_SMD_1
EC_SMC_2
EC_SMD_2
25
EC_SCI#
36 SPEAKER_ID
7,15
ENBKL
21
BKOFF#
45
FSTCHG
25
EC_SMI#
28
ODD_RST#
34
WL_OFF#
25 EC_SWI#
38
S4_LATCH
38
S4_DATA
38
LID_SW#
38
MUL_KEY#
37,38,42,49 SYSON
27,33,40,42,47,49 SUSP#
50
VR_ON
+3VALW
1
R205
1 10K_0402_5%
LID_SW#
2
20K_0402_5%
110
111
114
115
116
117
PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3
EC_SMC_1
EC_SMD_1
EC_SMC_2
EC_SMD_2
163
164
169
170
SCL1
SDA1
SCL2
SDA2
8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168
GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D
SPEAKER_ID
ENBKL
EC_SMI#
LID_SW#
MUL_KEY#
CLK_PCI_LPC
PSCLK1
PSDATA1
PSCLK2
PSDATA2
TP_CLK
TP_DATA
EC_TINIT#
25 PBTN_OUT#
R399
@ 10_0402_5%
1
C476
+3VALW
10P_0402_50V8K
R172
1
2
47K_0402_5%
2
1
C335
0.1U_0402_16V4Z
24
24
EC_GA20
EC_KBRST#
PADS_LED#
CAPS_LED#
NUM_LED#
PHDD_LED#
EC_RST#
55
54
23
41
19
5
6
31
Pulse
159
Wake Up
GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
Analog To Digital
SMBus
Digital To Analog
GPIO
FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#
KSI[0..7]
ADB[0..7]
KSO17
2
26
29
30
44
76
172
176
81
82
83
84
87
88
89
90
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
99
100
101
102
1
42
47
174
171
12
11
Timer Pin TOUT2/GPIO2F
175
E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
3
4
106
107
XCLKI
XCLKO
158
160
38
SKU_ID1
INVT_PWM 21
BEEP#
36
SUSP_LED 38
ACOFF
45
ECAGND
0.01U_0402_16V7K
2
10K_0402_5%
2
10K_0402_5%
ACIN
D16
R238
2
10K_0402_5%
25,38,43
ADP_I
45
C374
0.22U_0603_16V7K
DAC_BRIG 21
CD_PLAY
Board ID
IREF
45
EN_DFAN1 4
CD_PLAY 28
+3VALW
CD_PLAY
EC_IDERST 27,36
D40
@ SM05_SOT23
POWER_LED# 38
WL_LED# 37
HDD_LED# 38
BATT_LOW_LED# 38
BATT_CHGI_LED# 38
MODE_LED# 38
R594
10K_0402_5%
Ra
AD_BID0
* Rb
FANSPEED1 4
1K_0402_5% 1
1K_0402_5% 1
2 R169
2 R175
R204
0_0402_5%
+3VALW
EC_THERM# 25
E51_RXD
E51_TXD
CRY1
CRY2
R84
100K_0402_5%
EC_RSMRST# 25
SHDD_LED# 28
1
2
R242
0_0402_5%
R165 2
EAPD
1
@ 20M_0603_5%
2
1
C336
2
36,37
29,34 MINI_PME#
C337
Y2
29,34 ONBD_LAN_PME#
PCI_PME#
Compal Secret Data

2006/03/01
Deciphered Date
B
1
R230
1
R232
LI/NIMH# 44
32.768KHZ_12.5P_1TJS125DJ2A073
ADP_IR
AD_BID0
ADP_IR
KB910Q B4_LQFP176
2005/03/01
2
@ 10K_0402_5%
2
@ 10K_0402_5%
10K_0402_5%
1
+3VALW
2
RB751V_SOD323
BATT_OVP 45
Issued Date
ACIN_D
KILL_SW# 34,37
PM_SLP_S3# 25
PM_SLP_S5# 25
IDE_ODDRST# 25
PCI_PME# 29,34
BATT_TEMP 44
1
SKU_ID0 C334
1
R228
1
R229
R239
ON/OFFBTN# 38
PCI_PME#
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
EC dont use this function
EC_ON
38
EC_LID_OUT# 25
EC_MUTE 37
1 R163
0_0402_5%
KBA1
KBA[0..19] 40
SKU_ID0
85
86
91
92
93
94
97
98
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM
1
R225
1
R226
1
R227
KBA4
ADB[0..7] 40
KBA[0..19]
KSO17
KBA5
38
GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7
* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
* GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#
17
35
46
122
137
167
38
PADS_LED#
38
CAPS_LED#
38
NUM_LED#
24 PHDD_LED#
Interface
32
33
36
37
38
39
40
43
KSI[0..7]
GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7
KSO[0..15] 38
LRST#
+3VALW
KSO[0..15]
0_0402_5%
@ E&T_96212-1011S
5,23,25,27,28,31,35 PLT_RST#
2 @ 0_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
E51_RXD
R235 1
GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7
71
72
73
74
77
78
79
80
+3VALW
E51_TXD
R234 1
RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
23,28,29,31,34,35 PCI_RST#
150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105
FREAD#
FW R#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
X-BUS Interface
2 PSCLK1
10K_0402_5%
2 PSDATA1
10K_0402_5%
2 TP_DATA
10K_0402_5%
2 TP_CLK
10K_0402_5%
2 PSDATA2
10K_0402_5%
2 PSCLK2
10K_0402_5%
1
R807
1
R808
1
R809
1
R810
1
R231
1
R233
FREAD#
FWR#
FSEL#
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17
40
40
40
+5VS
SKU_ID1
@ ACES_85205-0400
10P_0402_50V8K
14 CLK_PCI_LPC
25,31,35 SERIRQ
+3VALW
E51_RXD
E51_TXD
0.1U_0402_16V4Z
1
2
ECAGND
1
2
1000P_0402_50V7K
FBM-L11-160808-800LMT_0603
L16
LRST#
CLK_PCI_LPC
1
2
3
4
1
2
3
4
+EC_AVCC
C345
For ENE KB910 Rev.B4
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
JP26
IN
LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *
For EC Tools
JP24
+RTCVCC
OUT
1
2
+3VALW
FBM-L11-160808-800LMT_0603 2
C348
15
14
13
10
9
165
18
7
25
24
C373
1U_0603_10V4Z
+3VALW
NC
24,35 LPC_AD0
24,35 LPC_AD1
24,35 LPC_AD2
24,35 LPC_AD3
24,35 LPC_FRAME#
VCC
VCC
VCC
VCC
VCC
VCC
VCC
L15
BATGND
U33
Internal Keyboard
1
2
R223
0_0402_5%
1
2
R224 @ 0_0402_5%
ECAGND
2
4.7U_0805_10V4Z
161
VCCBAT
2
0.1U_0402_16V4Z
C347
95
C344 C368
96
2
4.7U_0805_10V4Z
C343
0.1U_0402_16V4Z
1
VCCA
C342
AGND
C367
1000P_0402_50V7K
1
ENE-KB910-B4
0.1U_0402_16V4Z
1
1
GND
GND
GND
GND
GND
GND
16
34
45
123
136
157
166
+3VALW
+EC_RTCVCC
+EC_AVCC
NC
+3VALW
10P_0402_50V8K
Title
EC KB910(LPC)
Custom
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
39
of
52
U48C
14
U13C
10 SN74LVC14APWLE_TSSOP14
SB_INT_FLASH_SEL# 25
INT_FLASH_SEL 8
14
SUS_STAT# 25
39
FREAD#
10
11
12
29
38
C113
0.1U_0402_16V4Z
+3VALW
+3VALW
CE#
OE#
WE#
GND0
GND1
R87
100K_0402_5%
R207
+3VALW
U23A
FWE#
23
39
14
RESET#
SUSP#
2
G
RP#
NC
READY/BUSY#
NC0
NC1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
27,33,39,42,47,49
Q19
2N7002_SOT23
3
S
25
26
27
28
32
33
34
35
D0
D1
D2
D3
D4
D5
D6
D7
2
1
20K_0402_5%
31
30
+3VALW
22
24
9
VCC0
VCC1
39
2
1 R289
100K_0402_5%
2
1 C318
INT_FSEL#
FREAD#
FWE#
FSEL#
INT_FLASH_EN#
EC_FLASH# 25
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
0.1U_0402_16V4Z
1MBU38Flash ROM
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
KBA[0..19]
ADB[0..7]
KBA[0..19]
ADB[0..7]
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
39
39
P
6
U23B
INT_FSEL#
14
+3VALW
FWR#
39
SST39VF080-70_TSOP40
+3VALW
1MB ROM Socket
+3VALW
2 C311
0.1U_0402_16V4Z
39,44 EC_SMC_1
39,44 EC_SMD_1
U20
8
7
6
5
JP9
KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
R186
100K_0402_5%
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
AT24C16N-10SI-2.7_SO8
R185
100K_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
KBA17
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
FREAD#
FSEL#
KBA0
@ SUYIN_80065AR-040G2T
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
BIOS/WL-SW/Screw Hole/USB
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
1
40
of
52
+USB_VCCC
+3VALW
1
+3VALW
1
+USB_VCCA
R17
C443
4.7U_0805_10V4Z
100K_0402_5%
8
7
6
5
R16
1
@ 0_0402_5%
G528_SO8
+5VALWP
R15
1
1
2
3
4
USB_OC#2 25
USB_OC#0 25
SYSON#
1
47K_0402_5%
1
2
2
C13
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
R597
1
R599
@ 0_0402_5%
C830 G528_SO8
4.7U_0805_10V4Z
0.1U_0402_16V4Z
Close to JP21
C831
+3VALW
0.1U_0402_16V4Z
U48D
Close to JP20
USB_OC#4 25
47K_0402_5%
14
SYSON#
SYSON#
OUT
OUT
OUT
FLG
+5VALWP
42
R598
100K_0402_5%
U46
GND
IN
IN
EN#
U29
1
2
3
4
USB CONN. 1
USB CONN. 3
+USB_VCCA
USB CONN. 2
+USB_VCCA
W=40mils
+USB_VCCC
+3VALW
W=40mils
14
W=40mils
1
0.1U_0402_16V4Z
2
1000P_0402_50V7K
1000P_0402_50V7K
C410
0.1U_0402_16V4Z
2
U23C
1
C309 +
150U_D2_6.3VM
C430
150U_D2_6.3VM
2
C308
0.1U_0402_16V4Z
2
C310
1000P_0402_50V7K
10
14
U23D
12
SUYIN_2569A-04G3T
13
11
1 C833 1 C832
D37
@ SM05_SOT23
+3VALW
1
2
3
4
10
D36
@ SM05_SOT23
10P_0402_50V8K
1 C414
USB20_N4
USB20_P4
10P_0402_50V8K
SUYIN_020122MR008S540ZU
1 C413
10
12
G2
G4
25
25
G1
G3
USB20_N2 25
USB20_P2 25
9
11
1
2
3
4
10P_0402_50V8K
10P_0402_50V8K
1 C407
10P_0402_50V8K
C408
1
D35
@ SM05_SOT23
JP23
VCC VCC
D1- D0D1+ D0+
VSS VSS
10P_0402_50V8K
5
6
7
8
USB20_N0
USB20_P0
JP5
25
25
1
C405
C411
1
C406
1
C431 +
150U_D2_6.3VM
O
G
U50C
OE#
13
U50D
OE#
12
11
H13
H12
H_S315D126 H_S315D126
CF13
1
@
CF8
1
@
H23
H25
H_S315D126 H_S315D126
H5
H8
H2
H_S315D161 H_S315D161 H_S315D161
@
CF5
1
@
CF22
1
@
CF3
1
@
CF16
1
@
H4
H_O126X157D126X157N
H9
H22
H10
H_C126D126N H_C126D126N H_O157X126D157X126N
H26
H27
H28
H29
H_C315D157 H_C315D157 H_C315D161
H_C315D161
H3
H7
H_T256D161 H_T256D161
1
@
@
1
@
1
@
1
@
1
CF7
1
@
H16
H17
H18
H19
H_C394D122 H_C394D122 H_C394D122 H_C394D122
@
H15
H_O79X126D40X87
H14
H_O79X126D40X87
Compal Secret Data
Issued Date
H6
H1
H_S276D118 H_S276D118
@
1
1
@
CF2
1
@
CF10
1
@
CF14
1
@
CF12
1
@
CF17
1
@
CF6
1
@
CF19
CF9
@
1
1
@
1
@
H11
H21
H20
H24
H_S315D126 H_S315D126 H_S315D126 H_S315D126
CF1
1
1
@
CF20
CF18
1
@
CF11
FD6
CF4
1
@
FD5
@
1
CF15
1
@
FD2
CF21
1
@
@
1
@
1
FD1
FD3
FD4
2005/03/01
Deciphered Date
2006/03/01
Title
BIOS/WL-SW/Screw Hole/USB
Size
Document Number
Rev
1.0
EAL30 LA-2691
Date:
, 03, 2005
Sheet
41
of
52
+5VALW to +5VS Transfer
+3VALW to +3V Transfer
+5VALW
C384
SI4800DY_SO8
2 10U_0805_10V4Z
C377
C353
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
2 SYSON#
G
Q21
2N7002_SOT23
SUSP
D
Q25
2N7002_SOT23
2
G
0.01U_0402_16V7K
R209
470_0402_5%
5VS_ON
1
2
3
4
R208
100K_0402_5%
S
S
S
G
C355
2 SUSP
G
+5VALW
R212
100K_0402_5%
0.01U_0402_16V7K
Q20
2N7002_SOT23
S 2N7002_SOT23
C356
R211
470_0402_5%
2
G
3
SYSON#
D Q26
C378
SUSON
SUSON
1
38
C354
D
D
D
D
1 2
1
1
SI4800DY_SO8
2 10U_0805_10V4Z
8
7
6
5
1
2
3
4
1 2
S
S
S
G
C376
D
D
D
D
10U_0805_10V4Z
R210
100K_0402_5%
8
7
6
5
0.1U_0402_16V4Z
U14
+12VALW
U42
+12VALW
+5VS
+3V
+3VALW
+3VALW
37,38,39,49 SYSON
+1.5VALW to +1.5VS Transfer
1
2
3
4
1 2
D
Q11
2N7002_SOT23
S
C358
+1.5VS
R215
100K_0402_5%
U3
8
7
6
5
2 SUSP
G
Q28
2N7002_SOT23
0.1U_0402_16V4Z
C10
D
D
D
D
S
S
S
G
1
2
3
4
SI4800DY_SO8
C12
C17
C16
22U_1206_16V4Z_V1
2
2
0.1U_0402_16V4Z
C11
10U_0805_10V4Z
10U_0805_10V4Z
R216
@ 470_0402_5%
SUSP
SUSP
Q40
2N7002_SOT23
2
G
Q22
SUSP
2
G @ 2N7002_SOT23
RUNON
10U_0805_10V4Z
48
27,33,39,40,47,49 SUSP#
0.1U_0402_16V4Z
2
G
+1.5VALW
RUNON
SUSP
+5VALW
R214
470_0402_5%
C357
C380
10U_0805_10V4Z
2
2
SI4800DY_SO8
2 10U_0805_10V4Z
S
S
S
G
C379
D
D
D
D
1
R213
100K_0402_5%
Q27
2N7002_SOT23
8
7
6
5
2
G
+3VS
U39
+12VALW
SYSON
+3VALW to +3VS Transfer
SYSON#
SYSON#
41
+2.5V to +2.5VS Transfer

+2.5V
+2.5VS
1
C381
2
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
U49
R217
C382
10U_0805_10V4Z
2
@ 470_0402_5%
1 2
2
10U_0805_10V4Z
1
C359
SI4800DY_SO8
RUNON
D
0.1U_0402_16V4Z
2 SUSP
G Q23
@ 2N7002_SOT23
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
A
Title
DC/DC Interface
Size
Document Number
EAL30 LA-2691
Date:
, 03, 2005
Sheet
E
Rev
1.0
42
of
52
VS
1
PR1
7A_24VDC_429007
5.6K_0402_5%
LM393M_SO8
PD1
PC6
0.1U_0402_16V7K
ACIN
25,38,39
PACIN
45,46
PR7
10K_0402_5%
2
PR8
2
10K_0402_5%
Vin Detector
RTCVREF
3.3V
High 18.384 17.901 17.430

Low 17.728 17.257 16.976
VIN
RLZ4.3B_LL34
20K_0402_1%
PACIN
O
4
PR6
PC5
1000P_0402_50V7K
SINGA_2DC-G213-B20
2
3
22K_0402_1%
2
1
PR5
PU1A
PC4
100P_0402_50V8J
1
2
PR4
1K_0402_5%
84.5K_0402_1%
1
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
1
G
G
G
G
PR2
PR3
FBM-L18-453215-900LMA90T_1812
1
6
5
4
3
2
1M_0402_1%
VS
PJP1
DC_IN_S2
DC_IN_S1
VIN
PL1
VIN
PF1
PD2
1N4148_SOD80
PD3
1
BATT+
PR9
1N4148_SOD80
PQ1
TP0610K_SOT23
VIN
PC8
0.1U_0603_25V7K
N3
1N4148_SOD80
1
2
PR12
1K_1206_5%
B+
2
2
22K_0402_5%
1
2
PR15
1K_1206_5%
1
1
PR14
51_ON#
2
1
PC7
0.22U_1206_25V7M
100K_0402_5%
38
1
2
PR10
1K_1206_5%
PD4
PR13
1
2
PR11
200_0603_5%
N1
1
CHGRTCP
VS
47_1206_5%
RTCVREF
+3VALWP
PC13
1000P_0402_50V7K
2
@
+3VALW
+1.8VSP
JUMP_43X118
+1.8VS
@ JUMP_43X118
1
D
1
+12VALW
PACIN
1
47K_0402_5%
PQ2
2
2
PR26
2N7002_SOT23
G
Precharge detector
15.97V/14.84V FOR
ADAPTOR
PQ3
DTC115EUA_SC70
PJ6
JUMP_43X39
+1.25VSP
+1.25VS
+5VALWP
@ JUMP_43X118
PJ7
2
+1.5VALW
@ JUMP_43X118
(120mA,40mils ,Via NO.= 2)

+2.5VP
(2A,80mils ,Via NO.= 4)

1
+2.5V
(3.5A,140mils ,Via NO.= 7)
PJ5
+1.5VALWP
JUMP_43X118
PJ4
+5VALW

+12VALWP
PC11
1000P_0402_50V7K
PR23
499K_0402_1%
PR25
191K_0402_1%
PJ3
2
PR24
66.5K_0402_1%
PJ2
1

+5VALWP
1 VL
34K_0402_1%
2 PR22
JUMP_43X118
PJ1
PC12
1000P_0402_50V7K
PJ21
LM393M_SO8
RB715F_SOT323
ACON
45
PU1B
PD6
24,44,46 MAINPWON
PD5
RLZ16B_LL34
PC9
1U_0805_25V4Z
PR19
499K_0402_1%
GND
PC10
10U_0805_10V4Z
1
2.2M_0402_5%
N2
2
PR18
IN
2
100K_0402_5%
200_0603_5%
OUT
1
PR17
2
3
200_0603_5%
VL
200_0603_5%
+CHGRTC
3.3V
PR21
PR20
PR16
PU2
S-812C33AUA-C2N-T2_SOT89
PJ8
@ JUMP_43X118
+1.2VSP
+1.2VS
@ JUMP_43X118

PJ11
+1.05VSP
PJ9
+1.05VS
@JUMP_43X118
(3.5A,140mils ,Via NO.= 7)
+VGA_COREP
+VGA_CORE
@ JUMP_43X118
PJ10
2
@ JUMP_43X118
(11A,440mils ,Via NO.= 22)

Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
A
Title
DCIN & DETECTOR

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
D
43
of
52
PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C
VMB
VL
VS
VL
1
1
PR32
1
2
16.9K_0402_1%
TM_REF1
MAINPWON 24,43,46
PR34
100_0402_5%
PQ4
DTC115EUA_SC70
PU3A
O
PD7
2
1SS355_SOD323
LM393M_SO8
3
PR33
100_0402_5%
SUYIN_200275MR007G170ZR
47K_0402_1%
1
1
10KB_0603_1%_TH11-3H103FT
PC16
0.01U_0402_25V7Z
PC14
0.1U_0603_25V7K
PR30
1
2
47K_0402_1%
PC15
1000P_0402_50V7K
PR27
PH1
PR31
1K_0402_5%
BATT+
+3VALWP
PR29 2
1
47K_0402_5%
1K_0402_5%
1 PR28
2
ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA
GND
GND
1
2
3
4
5
6
7
8
9
BATT+
ID
B/I
TS
SMD
SMC
GND-
PL2 2
FBM-L18-453215-900LMA90T_1812
BATT_S1
PF2
12A_65VDC_451012
1
2
PJP2
PR35
3.32K_0402_1%
0.22U_0805_16V7K_V2
PR37
2
1
VL
100K_0402_1%
+3VALWP
PC18
1000P_0402_50V7K
6.49K_0402_1%
PR38
PC17
PR36
2
LI/NIMH# 39
1K_0402_5%
2
PR39
100K_0402_1%
2
BATT_TEMP 39
EC_SMD_1 39,40
EC_SMC_1 39,40
PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C
VL
VL
PH2
PR40
47K_0402_1%
PR43
PU3B
PD8
O
1
1SS355_SOD323
LM393M_SO8
3.48K_0402_1%
2
0.22U_0805_16V7K_V2
PC19
TM_REF1
PR41
1
2
47K_0402_1%
PR42
14.7K_0402_1%
1
2
10KB_0603_1%_TH11-3H103FT
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
A
Title
BATTERY CONN / OTP

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
D
44
of
52
Iadp=0~3.52A
P2
PQ7
AO4407_SO8
B+
PQ5
AO4407_SO8
PR44
1
PL3 2
FBM-L18-453215-900LMA90T_1812
4
1
PC20
4.7U_1206_25V6K
8
7
6
5
B++
4
0.02_2512_1%
PC21
4.7U_1206_25V6K
8
7
6
5
1
2
3
1
2
3
1
2
3
8
7
6
5
P3
PQ6
AO4407_SO8
VIN
PC22
4.7U_1206_25V6K
200K_0402_1%
-INE2 VCC(o)
21
FB2
20
205K_0402_1%
1
2
PR56
39
3
2
G
IREF
PQ13
2N7002_SOT23
0.1U_0603_25V7K
OUT
VH
19
VCC
18
-INE1
RT
17
+INE1
-INE3
16
VREF
FB1
8
9
S
PR61
ACON
2
PR59
1
10
10K_0402_5%
100K_0402_1%
11
12
FB3
15
OUTD
CTL
14
-INC1
+INC1
13
OUTC1
0.1U_0402_16V7K
IREF=1.31*Icharge
IREF=0.73~3.3V
ACOFF
39
PQ11
LXCHRG
1
2
PC28
0.1U_0603_25V7K
1
PR55
68K_0402_5%
1
2
PC31
0.1U_0603_25V7K
2
DTC115EUA_SC70
CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)
2
PL4
PR58
1
2
1
2
16UH_D104C-919AS-160M_3.7A_20%
0.02_2512_1%
PC32
1
2
1
2
47K_0402_5%
1500P_0402_50V7K
ACON
BATT+
4.7U_1206_25V6K
PC33
PC25
1
2
PR60
1
PACIN 1
2
PR57
3K_0402_1%
1
2
ACON
CS
PD13
PC34
EC31QS04
22
PC35
4.7U_1206_25V6K
PC36
4.7U_1206_25V6K
2
PC30
PR54
2 1
2
1K_0402_5%
1000P_0402_50V7K
1
PC29
0.1U_0402_16V7K
1SS355_SOD323
PACIN
2
CS
6
PD12
43
+INE2
PQ9
AO4407_SO8
ACOFF#
PC27
PR52
1
2 1
2
10K_0402_5%
4700P_0402_25V7K
43,46
N18
PC24
0.022U_0402_16V7K
1
2
PR51
25.5K_0402_1%
10K_0402_1%
PC26
PR53
150K_0402_1%
ACOFF#1
23
PR50
1
3
D
PQ12
2N7002_SOT23
GND
DTC115EUA_SC70
0.1U_0402_16V7K
2
G
OUTC2
PQ10
2
VIN
PR48
10K_0402_5%
1
100K_0402_5%
24
2
PR49
+INC2
3
2
1
ADP_I
PR47
1
2
47K_0402_5%
5
6
7
8
39
PU4
1 -INC2
PC23
0.1U_0603_25V7K
47K
PQ8
DTA144EUA_SC70
47K
PR46
47K_0402_5%
PR45
MB3887_SSOP24
+3VALWP
CS
1
PR62
2
PR64
47K_0402_5%
PQ14
DTC115EUA_SC70
95.3K_0603_0.1%
2
1
65W UMA
75W M22/M24
Iadp=2.87A
Iadp=3.52A
PR50=33.2K
PR50=25.5K
VMB
FSTCHG
143K_0603_0.1%
95.3K_0603_0.1%
PQ15
DTC115EUA_SC70
39
PR63
2
PR65
2
4.2V
PR66
340K_0402_1%
OVP voltage : LI
4S2P : 17.4V--> BATT_OVP= 1.935V
+12VALWP
PR67
499K_0402_1%
8
P
PR68
PU5A
LM358A_SO8
1 0
39 BATT_OVP
(BAT_OVP=0.1111 *VMB)
105K_0402_1%
PC37
0.01U_0402_25V7Z
PR69
2.2K_0402_5%
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
A
Title
CHARGER
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
D
45
of
52
PC38
N4
2
PC39
470P_0805_100V7K
B+++
1
4
3
2
1
2
1
5
6
7
8
4
3
2
1
PR79
1.82K_0402_1%
2
PC55
4.7U_0805_6.3V6K
+5VALWP
PR82
1
470U_6.3V_M
PC58 +
PC57
100P_0402_50V8J
PD18
10.2K_0402_1%
MAX1902EAI_SSOP28
SKUL30-02AT_SMA
2
2
1
PC59
@ 0.047U_0402_16V4Z
PC52
0.47U_0603_16V7K
PR84
2
1
PR85
220K_0402_5%
VL
2
10K_0402_1%
1
+2.5VREF
47K_0402_5%
D
D
D
D
21
22
RUN/ON3
PC56
1000P_0402_50V7K
2
2
TIME/ON5
CSH5
VS
PR83
7
28
2M_0402_1%
PDL5
CSH3
CSL3
FB3
SKIP#
SHDN#
PC50
47P_0402_50V8J
PR74
PLX5
1
2
3
10
23
1
1
1.27K_0402_1%
LX3
DL3
26
24
PQ19
SI4810DY_SO8
4
5
18
16
17
19
20
14
13
12
15
9
6
11
DH3
VL
27
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
GND
1
2
PR78
10K_0402_5%
PACIN
PC54
100P_0402_50V8J
PR81
PR71
1
2
BST3
1
2
3.32K_0402_1%
43,45
SKUL30-02AT_SMA
25
V+
PU6
0.47U_0603_16V7K
0_0402_5%
PR80
PC53
1
1
2
1
PC51
CSH3
PR77
CSL3
2 1.24K_0402_1%
1
PD17
PC48
4.7U_1206_25V6K
PDH5
2
1
PR75
PC44
PC45
4.7U_1206_25V6K 4.7U_1206_25V6K
G
S
S
S
2
2
2
PR73
3.74K_0402_1%
1M_0402_1%
PC46
4.7U_0805_6.3V6K
SI4800DY-T1_SO8
2
1
1.87K_0402_1%
PR76
470U_6.3V_M
1
S
S
S
G
1
2
3
4
PDL3
PR72
+3VALWP
PC47
0.1U_0603_25V7K
PDH3
PC49
47P_0402_50V8J
PQ17
D
D
D
D
+12VALWP
8
7
6
5
D
D
D
D
PQ18
SI4810DY_SO8
G
S
S
S
VL
1SS355_SOD323
5
6
7
8
PD16
10uH_SDT-1205P-100-118_5A_20%
2 PC43
0.1U_0603_25V7K
1
2
3
4
S
S
S
G
DAP202U_SOT323
PLX3
PL6
10UH_D104C-919AS-100M_4.5A_20%
PD15
VS
PQ16
SI4800DY-T1_SO8
4.7U_1206_25V6K
PC42
PT1
PC41
4.7U_1206_25V6K
EC11FS2_SOD106
1 FLYBACK
22_1206_5%
SNB 2
PR70
8
7
6
5
JUMP_43X118
BST51
4.7U_1206_25V6K
D
D
D
D
B+
2 PC40 BST31
0.1U_0603_25V7K
1
1
B+++
PJ17
2
PD14
10K_0402_1%
MAINPWON 24,43,44
PC60
0.47U_0603_16V7K
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
3V / 5V / 12V
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
1
46
of
52
PJ18
14
28
2
2
PC65
1@ 2.2U_0805_10V6K
23
UGATE2
PHASE1
PHASE2
25
PR91
2
1@ 2K_0402_1%
ISEN1
ISEN2
22
LGATE1
LGATE2
27
PGND1
PGND2
26
9
10
8
15
VOUT1
VSEN1
EN1
PG1
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
11
OCSET1
OCSET2
18
PR92
1@ 2K_0402_1%
1
2
+1.2V/+1.0V
2
G
S
S
S
PR145
1@ 0_0402_5%
4
3
2
1
1
2
DDR
SUSP#
2
PR95
1@ 10K_0402_1%
PC75
@ 0.1U_0402_16V7K
PR93
1@ 2.21K_0402_1%
PC72
1@ 470U_6.3V_M
1@ ISL6227CA-T_SSOP28
PR99
1@ 100K_0402_1%
PR147
@ 0_0402_5%
1
@ 0.1U_0402_16V7K
PR98
1@ 71.5K_0402_1%
PR146
@ 0_0402_5%
1@ 0.01U_0402_25V7Z
PC73
N12
1@ 10K_0402_1%
GND
PC74
13
1@
2
PR94
0_0402_5%
PR97
SUSP#
27,33,39,40,42,49 SUSP#
+VGA_COREP
PL9
1@ 1.8UH_D104C-919AS-1R8N_9.5A_20%
VGA_PHASE 1
2
PQ23
1@ SI4810DY_SO8
N10
PC69
1@ 0.1U_0402_16V7K
N11
PR144
1@ 0_0402_5%
PQ21
1@ SI4800DY-T1_SO8
UGATE1
24
1
PR89
1@ 0_0603_5%
S
S
S
G
PC68
1@ 0_0603_5%
1@ 0.1U_0402_16V7K
N9
BOOT1
G
S
S
S
4
3
2
1
5
6
7
8
D
D
D
D
D
D
D
D
8
7
6
5
PR90
1@ 10K_0402_1%
5
6
7
8
BOOT2
D
D
D
D
PC67
1
17 2
1@ 0.01U_0402_25V7Z
1
2
3
4
PC71
SOFT2
PR88
PQ22
1@SI4810DY_SO8
VIN
1.8V_PHASE
+
1@ 0.01U_0402_25V7Z
VCC
1@ 2.2_0603_5%
PR87
PC64
1@ 0.1U_0603_25V7K
PC66
PU7
2
1
12
1@ 0.01U_0402_25V7Z SOFT1
1
2
3
4
PC70
8
7
6
5
S
S
S
G
PQ20
1@SI4800DY-T1_SO8
PL8
1@1.8UH_D104C-919AS-1R8N_9.5A_20%
+1.8VSP
1@ 470U_6.3V_M
PC63
1@ 4.7U_1206_25V6K
D
D
D
D
+1.8V
B+
2
1
+5VALWP
PC142
1@ 4.7U_0805_6.3V6K
PD19
1@ DAP202U_SOT323
PC62
1@ 4.7U_1206_25V6K
1
PR86
@ JUMP_43X118
1@ 0_1206_5%
PC141
1@ 4.7U_1206_25V6K
PC61
1@ 4.7U_1206_25V6K
PR105
@ 10K_0402_1%
PR96
without selector
fix 1.2V
with selector
1@ 6.49K_0402_1%
15 POWER_SEL
PQ43
@ 2N7002_SOT23
2
G
2
Low:1.2V
High:1.0V
VL
PR102
@ 100K_0402_5%
2
1
@ 2N7002_SOT23
PQ28
2
G
PR96=6.49K
PR143
@ 100K_0402_5%
2
1
PR96=20K
unpop PR105
PR105=10K
@ 0.1U_0402_16V7K
PC144
PC83
@ 0.01U_0402_16V7K
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
A
Title
1.8V / VGA_CORE
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
D
47
of
52
PR100
10_0603_5%
PC78
4.7U_1206_25V6K
2
+5VALWP
JUMP_43X118
1
+
PC77
470U_6.3V_M
D
D
D
D
5
6
7
8
PC79
470P_0402_50V8J
PU8
PD20
1N4148_SOD80
1U_0603_6.3V6M
0.1U_0402_16V7K
PC80
1
UGATE
N20
PHASE
1.5V_PHASE
LGATE
G
S
S
S
OCSET
PL10
1.8UH_D104C-919AS-1R8N_9.5A_20%
2
1
GND
+
PQ26
SI4810DY_SO8
G
S
S
S
+1.5VALWP
5
6
7
8
FB
D
D
D
D
PQ24
SI4800DY-T1_SO8
4
3
2
1
BOOT
VCC
6.81K_0402_1%
D
2
PR101
PJ12
2
PC76
4
3
2
1
APW7057KC-TR_SOP8
PC81
470U_6.3V_M
N21
PR104
9.53K_0402_1%
1
2
PC84
1
2
PR106
10.7K_0402_1%
1
0.1U_0402_16V7K
+2.5V
PJ15
@ JUMP_43X118
NC
VREF
NC
VOUT
NC
TP
+3VALWP
1
VCNTL
GND
PR114
1@ 1.07K_0402_1%
2
PC96
1@ 10U_1206_6.3V7K
VIN
2
1
PU11
1
PC97
1@ 1U_0603_6.3V6M
1@ APL5331KAC-TR_SO8
1
PR115
PC99
1@ 10U_1206_6.3V7K
B
PJ16
@ JUMP_43X118
PC100
@ 0.1U_0402_16V7K
+1.2VSP
+2.5V
PQ33
D
PC98
1@ 2N7002_SOT23
1@ 0.1U_0402_16V7K
2
PR116
G
1@
1K_0402_1%
S
1
1@ 0_0402_5%
1
2
1
SUSP
NC
VREF
NC
VOUT
NC
TP
+3VALWP
1
VCNTL
GND
PR117
1K_0402_1%
2
PC101
10U_1206_6.3V7K
VIN
2
1
PU12
1
PC102
1U_0603_6.3V6M
APL5331KAC-TR_SO8
PQ34
2N7002_SOT23
PR119
PC103
1K_0402_1% 0.1U_0402_16V7K
+1.25VSP
PC104
10U_1206_6.3V7K
2
G
PC105
@ 0.1U_0402_16V7K
SUSP
42
0_0402_5%
1
2
PR118
SUSP
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
1.5V / 1.25V / 1.2V

Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
1
48
of
52
PJ19
PC126
4.7U_1206_25V6K
PC127
4.7U_1206_25V6K
1
PR148
PC130
PR149
PC129
0.1U_0603_25V7K
2
2.2_0603_5%
2.2U_0805_10V6K
PHASE1
PHASE2
25
PR154
2
2K_0402_1%
ISEN1
ISEN2
22
LGATE2
27
LGATE1
5
6
7
8
D
D
D
D
PR155
2K_0402_1%
1
2
0.01U_0402_25V7Z
PC138
PQ47
SI4810DY_SO8
PR156
0_0402_5%
4
3
2
1
PGND2
26
9
10
8
15
VOUT1
VSEN1
EN1
PG1
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
OCSET2
18
N16
1
+
PC137
220U_6.3VM_R15
2
PR157
17.8K_0402_1%
1
1
13
SYSON 37,38,39,42
PR160
10K_0402_1%
PR163
@ 0_0402_5%
PR164
100K_0402_1%
PR165
100K_0402_1%
ISL6227CA-T_SSOP28
10K_0402_1%
PC140
@ 0.1U_0402_16V7K
@ 0.1U_0402_16V7K
1 PR159
OCSET1
10K_0402_1%
PC139
PR162
@ 0_0402_5%
11
0_0402_5%
PR161
DDR
PR158
SUSP#
27,33,39,40,42,47 SUSP#
GND
PGND1
+2.5VP
PL17
1.8UH_D104C-919AS-1R8N_9.5A_20%
2.5V_PHASE 1
2
G
S
S
S
N14
+2.5V
N15
24
PQ45
SI4800DY-T1_SO8
UGATE2
PC134
0.1U_0402_16V7K
UGATE1
1
PR151
0_0603_5%
G
S
S
S
28
23
4
3
2
1
D
D
D
D
2
2
PR153
0_0402_5%
BOOT2
1
2
3
4
PC136
BOOT1
PC132
2
1
0.01U_0402_25V7Z
5
6
7
8
S
S
S
G
1
PR152
1.65K_0402_1%
PR150
1
2
0_0603_5%
17
D
D
D
D
8
7
6
5
SOFT2
PC133
0.1U_0402_16V7K
PQ46
SI4810DY_SO8
0.01U_0402_25V7Z
14
1.05V_PHASE
220U_6.3VM_R15
2
VCC
PC131
PU14
2
1
12
0.01U_0402_25V7Z SOFT1
N13
VIN
1
2
3
4
1
1
1
2
PC143
4.7U_0805_6.3V6K
8
7
6
5
S
S
S
G
PQ44
SI4800DY-T1_SO8
PL16
1.8UH_D104C-919AS-1R8N_9.5A_20%
+1.05VSP
PC135
B+
D
D
D
D
+1.05V
+5VALWP
PD26
DAP202U_SOT323
PC128
4.7U_1206_25V6K
0_1206_5%
2
PC125
4.7U_1206_25V6K
@ JUMP_43X118
1
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
2.5V / 1.05V
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
1
49
of
52
CPU_B+
+5VS
B+
PL12
1
PR120
10_0402_5%
28
CPU_VID3
21
D3
LXM
27
CPU_VID4
20
D4
DLM
29
CPU_VID5
19
D5
PGND
31
25
VROK
CMP
37
S0
CMN
38
S1
OAIN+
17
SHDN#
OAIN-
16
FB
15
PC111
2PR121
1
2.2_0603_5%
N5
+CPU_CORE
PL13
CPUPHASE1
N6
CPU VCC SENSE
PD23
@ EC31QS04
4
PQ36
AO4410_SO8
REF
DHS
ILIM
LXS
34
CSN
39
GNDS
13
MAX1532AETL_TQFN40
PC123
2
1
PQ39
AO4408_SO8
PR139
10K_0402_1%
5
6
7
8
D
PQ40
PD25
@ EC31QS04
AO4410_SO8
S
N8
PR141
PQ42
HMBT2222A_SOT23
3
2
1
PL14
1
2
0.56UH_ETQP4LR56WFC_21A_20%
CPUPHASE2
RHU002N06_SOT323
3
PQ41
2
G
N7
2
PR134
0_0402_5%
CPU_B+
5
6
7
8
2
GND
2
PD24
EP10QY03
PR138
20K_0402_1%
909_0402_1%
2
1
SKIP
2
1
PC122
4.7U_1206_25V6K
18
PC118
2200P_0402_50V7K
2
1
PC121
4.7U_1206_25V6K
40
11
2 PR131
2.7K_0402_1%
2
1
1
PSI#
32
CSP
2
B
3
DLS
SUS
PR140
100K_0402_1%
OFS
PR126
2.7K_0402_1%
+5VS
+5VS
2
470P_0402_50V8J
909_0402_1%
2
RHU002N06_SOT323
S
1
PC116
PC114
1
2
0.47U_0603_16V7K
3
2
1
PR137
0_0402_5%
1
2
25 PM_DPRSLPVR
35
0.22U_0603_16V7K
27P_0402_50V8J
PQ38
2
G
14
BSTS
33
CCI
TON
1
2
PR135
RHU002N06_SOT323
3
14,25 PM_STP_CPU#
PQ37
2
G
CCV
PR133 100K_0402_1%
PC119
100P_0402_50V8J
1
PC117
10.7K_0402_1%
1
2
FB
PR130 200K_0402_1%
12
PR129
1
PR136
PR132
78.7K_0402_1%
1
2
270P_0402_50V7K
TIME
FB
PC1151
1
2.2_0603_5%
39
30.1K_0402_1%
1
0.22U_0603_16V7K
PR128
2
1 1
VR_ON
PC120
1
2
PR123
3
2
1
V CC
1
2
1
0.56UH_ETQP4LR56WFC_21A_20%
0.001_2512_5%
6,14,25 VGATE
PR127
0_0402_5%
PR122
2
DHM
D2
1000P_0402_50V7K
PC113
22
CPU_VID2
26
499_0402_1%
2
1
BSTM
PR125
V+
D1
499_0402_1%
2
1
D0
23
PR124
24
CPU_VID1
CPU_VID0
909_0402_1%
2
1
36
PC106
220U_25V_M
3
2
1
30
5
6
7
8
VDD
PC112
2
1
VCC
+
2
PQ35
AO4408_SO8
0.22U_0603_16V7K
10
0.01U_0402_25V7Z
V CC
2
1
2.2U_0603_6.3V6K
2
FBM-L18-453215-900LMA90T_1812
5
6
7
8
PC109
PC110
1U_0603_6.3V6M
PU13
2
1
PC108
4.7U_1206_25V6K
2
1
PC107
4.7U_1206_25V6K
1
PD22
EP10QY03
PC124
0.47U_0603_16V7K
909_0402_1%
2
PR142
Issued Date
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/01
Title
CPU_CORE
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
50
of
52
REV 0.2
Date
Page
Location
Description
for ESD protection
12/06
P.38
Add ESD diode D34
12/06
P.37
Delete C267
For sound volume change slow issue
12/06
P.32
ADD C854
To solve PCI 4510 1394 issue
12/06
P.21
Change L4,L5 to FBM-L11-201209-121LMT
To solve EMI issue
12/26
P.22
Change C398,C397 from 270P to 100P

C401,C402 from 330P to 100P
For customer request
12/26
P.22
Change R320,R321,R7,R8,R9 from 150_0402_5%

to 150_0402_1%
12/26
P.07
Change R124,R127,R119,R531,R532
from 150_0402_5% to 150_0402_1%
12/26
P.15
Change R273,R274,R267,R270,R271
from 150_0402_5% to 150_0402_1%
12/26
P.32
Change 5in1 SMWP design ,Add R836,R837
follow EAT10 design
Location
Description
REV 0.3
Date
Page
2/06
P.09
Change R160 size to 0805 0 ohm
Add rating current
2/06
P.24
Add C859,C864 change R841 to 2.2 ohm
For TV-out wave issue
2/06
P.32
Add R838,R839
Change 5in1 card reader discharge control from card detect to card power enable .
2/06
P.27
Reserve R840,C862,X5
Reserve for chip issue
Location
Description
REV 1.0
Date
Page
2/14
P.34
ADD R842
Reserve for CyberTan issue
2/26
P.36
Add C866
Add for solve modem card noise
2/26
P.24
Add C865
Add for solve 3Dmark low performace issue
2/26
P.24
Add R842
Reserve for New Wireless Lan Card
Issued Date
Compal Secret Data

Title
Deciphered Date
HW PIR
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
51
of
52
A
Description
Page
Location
45
PR50
Change from 33.2K_0402_1% to 25.5K_0402_1%
For ATI M22/M24 sku, update to 75W
47
PR96
Change from 20K_0402_1% to 6.49K_0402_1%

Unpop PR105,PQ28,PR143,PQ43,PR102,PC83,PC144
Fix POWER_SEL at 1.2V
47
PR98
Change from 90.9K_0402_1% to 71.5K_0402_1%
Enlarge VGA_CORE OCP point
Reason
43
PD3
Change from RB751 to 1N4148
For common design
43
PR9
Change from 33_1206_5% to 47_1206_5%
For common design

For UMA SKU, delete 1.2VS
PR104
PR106
Delete PC96,PR114,PU11,PC97,PR115,PQ33,PR116,
PC98,PC99
Change PR104 from 9.09K_0402_1% to 9.53K_0402_1%
Change PR106 from 10.5K_0402_1% to 10.7K_0402_1%
48
48
For HW requirement to raise 1.5V voltage
2005/03/01
Issued Date
Compal Secret Data
2006/03/01
Deciphered Date
5
Title
POWER PIR
Size
Document Number
R ev
1.0
EAL30 LA-2691
Date:
, 04, 2005
Sheet
1
52
of
52

Eal30 La-2691

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A

Model Name : EAL30

Intel Dothan CPU

400 / 533 Mhz

Intel Alviso GM(PM)

EAL30 Sub Board

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

Compal Electronics, Inc.

Compal Secret Data

Size Document Number

uFC-PGA Dothan / 915 PM/GM/910GML

Compal Electronics, Inc.

Compal Secret Data

Size Document Number

Adapter power supply (19V)

AC or battery power rail for power circuit

Core voltage for CPU

1.05V rail for Processor I/O

1.25V switched power rail for DDR Vtt

1.2V/1.0V switched power rail for VGA core power

1.2V for VGA PCIE power

:means analog ground.

1.5V always on power rail

1.5V switched power rail

1.8V switched power rail for VGA frame buffer

2.5V power rail for system DDR

3.3V always on power rail

3.3V switched power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

12V always on power rail

ICH6-M I2C / SMBUS ADDRESSING

CLOCK GENERATOR (EXT.)

Board ID Table for AD channel

KB910 I2C / SMBUS ADDRESSING

SM1 SMART BATTERY

SM2 ALC250 codec

External PCI Devices

Compal Electronics, Inc.

Compal Secret Data

Reserve For Testability

Thermal Sensor ADI ADM1032AR

Fan Control circuit

Close to Fan Conn.

THERMDA & THERMDC Trace / Space = 10 / 10 mil

Compal Electronics, Inc.

Compal Secret Data

1.8V FOR DOTHAN-A

1.5V FOR DOTHAN-B

MLCC 0805 X5R

TRACE CLOSELY CPU < 0.5'

Compal Electronics, Inc.

Compal Secret Data

Intel new update

H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil

CFG[17:3]: internal pull-up

Refer to sheet 6 for FSB

Low = DT/Transportable CPU

Low = Reverse Lane