Documente Academic
Documente Profesional
Documente Cultură
October 9, 2014
Michelle Acosta
Executive Summary:
The purpose of Lab 1 was to
analyze the BJT Differential Amplifier.
The differential amplifier is unique in
that it requires two input signals and
two outputs. Named appropriately,
the differential amplifier amplifies the
difference between the two input
signals. In this case, the circuit
analyzed also has a current mirror as
a load. The idea of the current
mirror is to ideally produce the
same amount of current as the
differential amplifier by using two
more transistors.
The lab consisted of hand calculations, simulation, and physical circuit analysis.
All three stages of the lab analyzed the circuit in DC, Differential-Output Mode, and
Single-Ended Output Mode. Results are listed in the Summary Table. Ideally the circuit
would produce a differential gain of 20V/V in Differential-Output Mode and a gain of
around 80V/V in Single-Ended Output Mode.
Lab Procedure and Measurement Discussion:
The lab was completed over the course of four weeks. Hand calculations and
simulation were completed the first week in order to have a basis for the non-ideal case
of circuit simulation. The building and testing of the circuit was conducted for three class
periods. This gave ample time to test the circuit in DC, DOM, and SEOM.
Beginning with the PSPICE simulation, shown in Figure 2, quick results were
obtained in order to set the basis for the analysis of the amplifier. The DC analysis was
simplest in that once the circuit was on, the DC values were calculated.
(a)
(b)
Figure 2(a) shows the differential amplifier in DOM differential mode. This mode is used to
calculate the differential gain (Ad), differential input resistance (Rid), and differential output
resistance (Rod). Figure 2(b) shows the differential amplifier in DOM common mode. This
mode is used to calculate the common mode gain (Acm), common input resistance (Ricm),
PSPICE was used to calculate the differential gain (Ad), differential input resistance (Rid),
and differential output resistance (Rod). In addition to differential mode, common mode
was also analyzed.
In Common Mode DOM, both Q1 and Q2 are connected to the AC source.
PSPICE was used again to calculate the common mode gain (Acm), common input
resistance (Ricm), common output resistance (Rocm), and Common Mode Rejection Ratio
(CMRR). All values for DOM are noted in the Summary Table.
Because DOM has no reference to ground, the difference is measured on the
two input voltages vb1 and vb2. It was observed that the circuit was very sensitive making
the DOM mode attractive. There was no need to take measurements in common mode
because the common mode gain (Acm) was zero, making the CMRR undefined.
(a)
(b)
Figure 4(a) shows the differential amplifier in SEOM differential mode. This mode is used to
calculate the differential gain (Ad), differential input resistance (Rid), and differential output
resistance (Rod). Figure 4(b) shows the differential amplifier in SEOM common mode. This
mode is used to calculate the common mode gain (Acm), common input resistance (Ricm),
common output resistance (Rocm), and CMRR.
SEOM was analyzed in a very similar way except that RL1 was made infinite
instead of RL2. Again, SEOM was analyzed in both Common Mode and Differential
Mode. All values for SEOM are noted in the Summary Table.
Hand calculations were also done in order to further analyze the circuit and give
another set of values to compare with.
Finally, measurements were done in lab. The circuit was built without RL1 and RL2.
In order to have all necessary transistors, part LM3046 was used. Procedures for DC
were the same as those of the hand calculations and simulation. During the AC analysis,
a 10 to 1 attenuator was used at the input. In DOM, measurements were conducted for
Ad, Rid, and Rod. For SEOM, measurements for Ad, Rod, Acm, and CMMR were found. All
values for lab measurements are noted in the Summary Table.
The difference measured in SEOM is between the wire and ground. This allowed
for easier analysis with the oscilloscope. Although this was true, CMRR could now be
defined because there was a reference to ground, giving a common mode gain. The
CMRR is used to reject the unwanted signals. This is very important in a differential
amplifier and it requires a high CMRR. This was true in the circuit analyzed. The
differential gain was large and the common mode gain was small, giving a large
rejection ratio, indicating that the unwanted signals were rejected.
The amplifiers studied previous to this lab all took an input signal and amplified it
to obtain a certain gain. What happened in this lab was that two input signals were
taken and the difference between the two signals was amplified. In addition to the
amplifier, there was also a current mirror. The ideal current mirror will do exactly as the
name implies, create a current identical to that of the rest of the circuit. The current
outputted by the current mirror, IREF, will ideally be equal to Io even with a load.
In comparison to the
In order to further understand the capabilities of the Differential Amplifier and the
Current Mirror, the amplifier was analyzed in DC, Differential-Output mode, and SingleEnded-Output mode.
During the DC analysis, all of the transistors were matched. Because Q1 and Q2
were matched and there was no load resistance, it made sense that the current I o would
be split evenly between the two sides. Q3 and Q4 were matched as well and created a
current that was identical to the one going through the other two transistors. It can be
seen in Figure 1 that the current through Q1 and Q2 are matched and that the current in
the current mirror is equal to the current at the emitter.
In AC the Differential-Output mode and the Single-Ended-Output mode were
analyzed in both differential and common modes. For both circuits, an input attenuator
was used to bring the voltage down before it was amplified again. The attenuator
consisted of several resistors. For DOM in differential mode, vb2 was grounded in order
to shut Q2 off and a large voltage was applied to vb1 in order to keep Q1 on. In common
mode, both Q1 and Q2 were connected to the source.
Comparing the measured values with the hand calculations and simulation
values, all made sense. The reason Rod and Rocm were so large for the hand
calculations was because the load resistance was initially neglected. If it had been
included, Rod would have been much closer to that of the measured value.
In SEOM, the same attenuator was used to bring down the voltage without
distortion at vb1. In differential mode, vb2 was grounded and in common mode, both Q1
and Q2 were both connected to the source.
There were no major discrepancies with the values in the summary table except
for the differential gain. The reason the value was so low was not because of an error
with the circuit, but instead, an error with calculation. Once correctly calculated, the
measured differential gain was much closer to the expected value.
Conclusion:
Both the BJT Differential Amplifier and the current mirror were analyzed during
the lab. The circuit was analyzed in both DC and AC to further understand the behaviors
of the circuits under different conditions. In AC, the circuit was analyzed in both
Differential-Output mode and Single-Ended-Output mode. The difference between the
two depended on where the load resistances were connected and made infinite.
Changing the modes in AC allowed for different differential and common mode gains.
Lab 2
Common Emitter Amplifier
Frequency Response
November 6, 2014
Michelle Acosta
Executive Summary:
The Common Emitter Amplifier is a single-stage amplifier that is most often used
as a voltage amplifier. The Bipolar Junction Transistor (BJT) is configured with the input
at the base, the output at the collector, and the emitter common to both or, in this case,
grounded.
In
order
to
study
the
CE
Parameter
Requirement
Midband Gain
AM 125V/V
Low-Frequency Response
High-Frequency Response
DC Power
PDC 35mW
lab
consisted
of
hand
basis for
connecting
lecture
Being that the most difficult part of the lab was finding a starting point, the lab TA
gave vital hints. The initial current that was used to calculate values by hand was
IC=1mA. However, the specifications of the frequency responses were not met with this
current so another had to be chosen.
The next value attempted was IC=1.8mA and the specifications were met.
However, although the specifications were met, there may have been a better design
that would produce a higher gain. Deciding that reworking hand calculations would be
too time consuming, a Matlab code was written in order to efficiently calculate the
specified values. In the end, it was decided that I C=1.5mA would be best fit for the
design.
As stated previously, the main focus of the lab was to study the frequency
response of the CE amplifier. The frequency response of the CE amplifier would ideally
look like that of the plot in Figure 2(a). The area where the plot is generally flat is the
midband gain (AM) and it is in this area that the gain is unaffected by all capacitances.
The area to the left of the midband gain is where the gain is affected by the base and
emitter capacitances, Cb and Ce. The area to the right of the midband gain is where the
gain is affected by the internal capacitances C and CThe points at which the
frequency response intersects the 3dB frequency are the areas of interest as these
correspond to two of the specifications wL and wH.
(a)
(b)
Figure 2: Figure 2(a) depicts the ideal frequency response of the CE amplifier designed
in the lab. Figure 2(b) depicts the measured frequency response of the CE amplifier.
The values for the frequency response were obtained by varying the frequency and
measuring the voltage.
Summary Table
10
Hand Calculations
11
12