5

Signal Snubbers

C1

RP1A
1

4FSC

RESET
AVR_PB2
AVR_PB1
VCC
AVR_RXD
AVR_TXD
AVR_INT0
MOSI
MISO
SCK
SPI_CS3
SPI_CS2
SPI_CS1
SPI_CS0

RP1B
CSYNC

PAD_DATA1

15

SYNC

14

PSX_DAT

13

PSX_CMD

44
43
42
41
40
39
38
37
36
35
34
PB4
PB3
PB2
PB1
PB0
GND
VCC
PA0
PA1
PA2
PA3

PB5/mosi
PB6/miso
PB7/sck
RESET
VCC
ATmega644
GND
XTAL2
XTAL1
PD0/RXD
PD1/TXD
PD2/INT0

4
RP1E

PA4
PA5
PA6
PA7
AREF
GND
AVCC
PC7
PC6
PC5
PC4

PD3
PD4
PD5
PD6
PD7
VCC
GND
PC0/SCL
PC1/SDA
PC2
PC3

1
2
3
4
5
6
7
8
9
10
11

12
13
14
15
16
17
18
19
20
21
22

MOSI
MISO
SCK
RESET
VCC
GND
XTAL2
XTAL1
AVR_RXD
AVR_TXD
AVR_INT0

RP1D
PAD_DATA2
33
32
31
30
29
28
27
26
25
24
23

PAD_LATCH

PAD_ACK
AVR_PA5
AVR_PA6
AVR_PA7
AVCC
GND
AVCC
VIDEO_B2
VIDEO_B1
VIDEO_G2
VIDEO_G1

12

PSX_SEL

RP1F
PAD_CLK

PAD_ACK

SCK

AUDIO
C17
0.1uF

JP2
16

1
2
3
4
5
6
7
8
9
10
11
12
13
14

40
39
38
37
36
35
34
33
32
31
30
29
28
27
25
24
23

11

PSX_CLK

10

PSX_ACK

16
17
18

SD_SCK

HEADER 20X2

CV
AUDIO
GND

RP1G

PSX_CLK
AVR_PB4
ENCODER_CLK
PSX_ACK
PSX_SEL
CSYNC
VBLU
VGRN
VRED
PSX_CMD
PSX_DAT
AVR_PA5
AVR_PA6
AVR_PA7

+ C18

microSD/input level protection

.047
GND

J1
MISO

R20
301
MOSI

MOSI_3V
SD_SCK_3V

3
5

R23
560

Y
C
VCC

DAT0/DOUT
DAT1
DAT2
DAT3/CS
CMD/DI
CLK

ALPS_MICRO_SD_SCHA

VDD
VSS
CARD

VCC3

GND

13

GND
GND

RP1H
R21
301
SD_SCK_3V

SD_SCK

PortA supports either:

Two NES or SNES Controllers
One Atari/Commodore Joystick
One Sega Genesis Controller
One Playstation 1/2 Controller
General Purpose ADC inputs
General Purpose I/O (5V, CMOS Logic Levels)

ATmega644

SPI_CS3
SPI_CS2
SPI_CS1
SPI_CS0
AUD_RAW

SPI_CS0_3V

7
8
1
2

GND
9
10

ENCODER_CLK

SHIELD SHIELD
SHIELD SHIELD

GND
VCC

AUD_RAW

47 ohm
PAD_DATA1
PAD_DATA2
PAD_LATCH
PAD_CLK

RP1C
U1

R26 3.16K

0.1uF
CSYNC
AVR_PB1
AVR_PB2
ENCODER_CLK
AVR_PB4

40 Pin DIP Package

11
12

MCU

VIDEO_G0
VIDEO_R2
VIDEO_R1
VIDEO_R0
VCC

Pins 4, 36, 37 and 40 are reserved

for expansion. The PCB is mounted
'upside down and backwards' for use
with a baseboard , so refer to the
pinout in the lower left when
designing baseboards.

R24
560

GND
R22
301
SPI_CS0

SPI_CS0_3V
R25
560

C4
0.1uF
GND

GND

RGB Outputs

ADC Power Filtering

3.3V Power Supply (for micro/SD/MMC)

NTSC Encoder

R1 806
VIDEO_R2

L1
VCC

R18
301

D1

AVCC
ferrite

GND

U2
R2 1.58K

LED_1

VCC

VIDEO_R1

C7 0.1uF
VRED

R3 3.16K
C2
10uF

C3
.1uF

LED

1
2

GND

1
2
3

XT1

GND

GND

XT2

Vout
BYPASS

VCC3

R5 806

LP2985-3.3V regulator

C16
10uF

R6 1.58K
VIDEO_G1

3
4

RED

GREEN

BLUE

GND

C8 0.1uF
VGRN

R7 3.16K
GND

XTAL2

28.63636MHz

ENC_CE
GND

GND

GND

R8
C6
18pF

VIDEO_G2

VIDEO_G0
3

GND
R4 75ohm

Vin
GND
ON/OFF

Clock

Y1
XTAL1

VCC
GND
VCC

GND

U3

GND

C5
18pF

VIDEO_R0

VCC

75ohm

R27
0
VCC

9
VCC3

10
R12 806

R28
0

GND
AVR_PB4

VIDEO_B2
ENC_CE

C10 0.1uF
VBLU

11

R16 1.58K

R29
0

GND

12

VCC

13

GND

14

GND

VIDEO_B1
R17

75ohm

VCC

STND

AGND

SA

YSET

CE

TERM
RIN

AVDD1
CSET

GIN

BIN

AVDD

AGND

YTRAP

RT

CV

GT

CVSET

BT

TVDET

TGND

4FSC

DVDD

VSYNC

DGND

HSYNC

28

GND

27

YSET

26

25

AVDD

24

CSET

23

22

AVDD

21

YTRAP

20

CV

19

CVSET

L2

68uH

C9 18pF
GND

18
17

R9
374

R10
374

R11
374

R13
301

R14
301

R15
301

4FSC

16

VCC

15

SYNC

GND

AD723

L3

SW1
GND

RESET

VCC

VCC

Manual Reset

AVDD
ferrite

ITT_KSS2_RA_SMT
+

C11
10uF

C12
.1uF

C13
10uF

C14
.1uF

GND

C15
.1uF
GND

Rev. 1.2 Notes:

1) connected VSYNC (pin16, U2) to VCC
2) Signal dividers on all SD Card inputs for 3.3V compatibility.
3) Added RGB outputs for expansion options.
4) Added R27 to allow for 3.3V only power supply.
5) Added R26 and C18 for optional simple LPF for Audio.

Embedded Engineering, LLC

3601 SE 175th Ave
Vancouver, WA 98683
clay@embeddedengineeringllc.com

Title
UZEBOX(tm) AVCore(tm)
Based on the work found at: http://belogic.com/uzebox/
UZEBOX is a registered trademark and is used by
permission.
5

Size
A

Document Number
CNC082908

Date:

Friday, October 17, 2008

2

Rev
1.2
Sheet

of
1