Recall Design Example

L16. CS Amplifier and Effect of DC Biasing

Review

Consider the following common source Amp

15V

CS Amplifier small signal analysis

SPICE simulation example
Amplifier DC biasing

NMOS Parameter
RD
+
VO

V SS

Reading
Chapter 4 (MOS Field-Effect Transistors)

k n' 25

_
0.2mA

mA
V 2

V T 1V

0
L 2 m
W Variable

-15v

Design for AVO = 10 (V/V) and 5V p-p output

PSPICE Simulation of CS Example

1.

DC Operation Point (VG = 0V, ID = 0.2mA)

For Saturation, VGS > VT , VGD < VT
Set VD = 2.5V so VD > 0

Effect of DC operating point on Amp performance

RD such that vGD < VT for 5V p-p output
vGD = (VG + vg) (VD + vd) < VT
vGD = (0V + small) (2.5V + 2.5Vsin (t+)) < VT

2. Small-signal Parameter

3. Solve small-signal circuit/determine equivalent

amplifier

PSPICE Simulation of CS Example

PSPICE Simulation of CS Example

Case 1: vgs = 0.1Vsin t

Case 2: vgs = 0.5Vsin t

Amplifier DC Biasing Options

Why is the output waveform distorted?

Consider the instantaneous vGD voltage of the CS amplifier
vGD = (VG + vg) (VD + vd) < VT
vGD = (0V + small) (2.5V + |Av| A*sin (t)) < VT

Goal: Set ID(VGS,,VDS)

(a)

VDD

ID
(b) VDD

(c)

1 W
2
kn ' VGS VT
2
L
(d)

VDD

VDD

Since the amplifier should be operated in Saturation,

vGD<VT at all times
Case 2 violates this condition driving the amplifier into
Linear Region, hence the distortion

Amplifier Biasing determines transistor region of

operation and overall amplifier performance

- VSS

Amplifier DC Biasing Design

(1) bias in saturation region:
VGS > VT, VGD < VT

PSPICE Simulation

VDD

(2) Require sufficient output swing

Rule of thumb: 1/3 voltage drop across RD,
1/3 drop across transistor, 1/3 drop across RS

EX: Given: VT=1V, kn=kn(W/L)=1mA/V2

Design for ID = 0.5mA for VDD=15V
RS=RD=(Vdd/3)/ID=5V/0.5mA=10k
0.5mA=(1/2)(1mA/V2)(VGS-VT)2
VGS=1V+VT=2V
VG=VS+2V=5V+2V=7V
7V=15V*RG2/(RG2+RG1)

Amplifier DC Biasing Design Example

What is maximum output swing?
VDD

vG, vD

= 15V

Summary
CS Amplifier
Effect of DC operating point on Amplifier
performance
DC bias solution defines operating point for
MOSFET amplifier
Bias in saturation region: VGS > VT, VGD < VT
Require sufficient output swing