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1) Design a CMOS inverter circuit of following parameters: VT0n= 0.

6V, nCox= 60A/V2, (W/L)n= 8,


VT0p = -0.7V, pCox = 25A/V2, (W/L)p=12.Supply voltage = 3.3 volt. Channel length of both
transistor is 0.8m. Determine (Wn/Wp) ratio so that switching threshold voltage of inverter circuit
Vth=1.4 volt.
2) A company has access to a CMOS fabrication process with the following device parameters listed
below:
nCox=120 A/V2, pCox=60 A/V2, L=0.6m for both NMOS and PMOS, VT0n=0.8V, VT0p= -1.0V,
Combined load capacitance value= 300fF and Wmin= 1.2m.Design a CMOS inverter by determining
channel width Wn and Wp of NMOS and PMOS transistors such that propagation delay times t PHL
0.2ns and tPLH 0.15ns.
3) Find the region of operation for the transistor M4 and M5 in the given configuration. All the
transistors have identical sizes. Assume VDD = 2.5 V, and VTn = 0.4 V,
W = 1m, L = 0.25 m,
kn = 115 A/V2.

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