Documente Academic
Documente Profesional
Documente Cultură
1
2
3
4
5
7
8
9
(M42)
10
M42
11
M1
12
M1
13
14
M1
15
M1
16
M1
17
M1
18
19
M1
20
21
22
23
24
25
26
27
28
29
30
M1
31
M42
33
34
JD
JD
JD
RT
JD
JD
RT
(M42)
MS
(M42)
MS
38
41
42
43
44
45
46
(M42)
DRI
47
MS
MS
MS
PS
PS
PS
PS
PS
PS
PS
PS
PS
JD
JD
JD
JD
JD
JD
JD
PS
PS
PS
RT
JD
JD
JD
JD
JD
JD
JD
JD
JD
JD
1
JD
2
RT
3
JD
4
JD
5
RT
6
JD
7
JD
8
JD
9
JD
10
JD
11
JH
12
JH
13
JH
14
JH
15
JH
16
JH
17
JH
18
JH
19
JH
20
JD
21
JD
22
JD
23
JD
24
JD
25
JD
26
JD
27
JD
28
JD
29
JD
30
RT
31
JD
32
JD
33
JD
34
JD
35
JD
36
JD
37
JD
38
JD
39
JD
40
JD
41
CIRCUIT
PAGE
TABLE OF CONTENTS
SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
TABLE ITEMS & REVISION HISTORY
FUNC TEST
POWER CONNECTOR / POWER ALIAS
CPU - BUS INTERFACE
CPU - PWR & GND
CPU - DECAPS
CPU - THERMAL SENSOR
CPU - ITP CONN
NB - CPU INTERFACE
NB - VIDEO INTERFACE
NB - MISC INTERFACES
NB - DDR2 INTERFACE
NB - POWER 1
NB - POWER 2
NB - GROUNDS
NB - DECAPS
NB - CONFIG STRAPS
SB - RTC,LAN,AUDIO,ATA,CPU,LPC
SB - PCIE,SPI,USB,DMI,PCI
SB - SMB,GPIO,PM,CLKS
SB - POWERS AND GROUNDS
SB - DECAPS
SB - MISC
SB - SMB BUS CONNECTIONS
DDR2 - SO-DIMM CONN A
DDR2 - SO-DIMM CONN B (REVERSED)
DDR2 - TERMINATION
DDR2 - VTT SUPPLY
CLOCKS - GENERATOR
CLOCKS - TERMINATIONS
ATA (SATA AND IDE) CONNS
LAN - YUKONS PCIE INTERFACE
LAN - YUKONS PWR, MISC
LAN - CONN
FIREWIRE - FW323-06
FIREWIRE - DECAPS
FIREWIRE - CONNS
USB - CONNS
RX
SO
SO
SO
SO
RP
RP
RP
RP
RP
RP
RP
RP
JH
M1
M1
M1
M1
M1
M1
M1
M1
M1
JH
JH
JH
JH
53
54
58
59
60
61
63
65
66
67
68
72
73
74
75
76
77
78
79
80
81
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
DRI
JD
JD
JD
MS
MS
MS
JH
MS
MS
MS
JD
PT
PT
PT
PT
RT
RT
RT
RT
RT
RT
RT
RT
JH
JH
JH
JH
JH
JH
JH
JH
JH
JH
JH
JH
JH
JH
43
JD
44
MS
45
MS
46
MS
47
JH
48
JD
49
MS
50
MS
51
JD
52
JD
53
JD
54
JD
55
JD
56
RT
57
RT
58
RT
59
RT
60
RT
61
RT
62
RT
63
RT
64
JH
65
JH
66
JH
67
JH
68
JH
69
JH
70
JH
71
JH
72
JH
73
JH
74
JH
75
JH
76
JH
77
JH
78
1
CK
APPD
M38A
DVT
06/22/06
PAGE
REV
ZONE
ECN
13
ENG
APPD
DESCRIPTION OF CHANGE
445818
ENGINEERING RELEASED
DATE
DATE
06/22/06
06/22/04
CIRCUIT
D
METRIC
XX
X.XX
DRAFTER
DESIGN CK
X.XXX
ENG APPD
MFG APPD
QA APPD
DESIGNER
RELEASE
SCALE
ANGLES
TITLE
SCH,MLB,M38A
NONE
SIZE
MATERIAL/FINISH
NOTED AS
APPLICABLE
DRAWING NUMBER
051-7148
SHT
REV.
13
OF
110
J0700
CPU
ITP
CONN
PAGE 11
PAGE 7
J9402
MINI-DVI
LVDS
(TMDS - VGA)
J1101
(1.83/2.17GHZ)
CORE (~1.2V)
PAGE 8
J9700
(INTERNAL)
PAGE 97
64-BIT
FSB
667MHZ
PAGE 94
D
J2800
J2900
GPU
U8400
U1200
PCIE
PCIE X16
2.5GHZ
NB
CORE (1.05V)
PAGE 16-17
PAGE
13
PAGE 89
PAGE 15
FRAME
BUFFER A
PAGE
93
PAGE 84
PAGE
93
MAIN MEMORY
PAGE 12
GDDR3
64-BIT
1.8V/700MHZ(?)
PAGES 87
U8900, U8950
DIMM
PARALLEL
TERM
PAGES 30
PAGES 87
PAGE 28-29
MISC
PAGE 14
GDDR3
64-BIT
1.8V/700MHZ(?)
U3301
DMI
CK410
PAGE 14
4-BIT
DMI
1.2V/800MHZ
PAGE 34
FRAME
BUFFER B
TERMS
PAGE 33
CONTROL = 2.5V
U9000, U9050
CLOCKS
J6601 HD TSENS
PAGE 90
U6300/01
SPI
BOOTROM
PAGE 63
FAN
U6700
SMC
J6000
TPM
PAGE 58
LPC+ CONN
PAGE 67
USB
CONNECTORS
PAGE 21
PAGE 47
1 0,2,4
PAGE 48
NOT USED
GPIOS
PAGE 23
PCI
PAGE 22
SMB
CORE
PAGE 24
PORT
#0
X1 - 1.5GHZ
BT
CONN
PAGE 47
3,7
SB
CORE (1.05V)
PCI-E
PAGE 22
PORT
#1
X1 - 1.5GHZ
4-BIT (3.3V/33MHZ)
J4700
BNDI
INTERFACE
CAMERA
LPC
U2100
PORT
#2-5
PAGE 22
USB
3.3V/133MHZ
OPTICAL
PAGE 38
PAGE 22
PAGE 22
UATA/133
SPI
JE350
AZALIA
PAGE 23
UATA
CONNECTOR
UATA
JC901
SATA
1.2V/1.5GHZ
PAGE 21
HARD DRIVE
PAGE 38
DMI
PAGE 21
SATA2
SATA0
SATA
CONNECTOR
JE310/JE320/JE330
PAGE 60
JC900
IR
RMT MLB
U5800
PAGE 21
J2800
J2900
DIMMS
U3301
CK410M
J5300
AIRPORT
33MHZ
32-BIT
U6800
U4101
MINI-PCIE
AIRPORT
YUKON
GIG ETHERNET
PAGE 53
FIREWIRE A
PAGE 44
0
1
PAGE 41
4 Diff pairs
PORT F
PAGE 153
LINE OUT
PORT B
J7301
2 Diff pairs
JD600
OPTICAL OUT
J7303
COMBO OUT
CONNECTOR
PAGE 68
PORT A
PORT C
FW323-06
S/PDIF
J5300
S/PDIF
AUDIO CODEC
STA9221
JE000, JE001
J7300
ETHERNET
CONNECTOR
FIREWIRE A
CONNECTORS
LINE IN
PAGE 43
PAGE 46
SPEAKER
AMP
PAGE 72
SPEAKER
CONNECTOR
PAGE 73
PAGE 73
JE350
MIC IN
BNDI
INTERFACE
OPTICAL IN
DRAWING NUMBER
SHT
NONE
REV.
051-7148
D
SCALE
CONNECTOR
OF
13
110
DC/DC BOARD
D
12V, 12A
12V_S5
5V, 4A
12V_S0
PPVCORE_CPU_S0
1.3V @ 36A
PAGE 75
PP1V05_S0
1.05V @ 8.9A
PAGE 81
PP1V8_S3
1.8V @ 10A
PAGE 79
C
PP1V5_S0
1.5V @ 8A
PAGE 80
PP1V0R1V2_S0_GPU
1.2V @ 15A
PAGE 85
PP1V8_S0
1.8V @ 8A
PAGE 78
CPU_CORE
3.3V, 4A
5V_S5
5V_S0
FANS
HARD DRIVE
LCD
SPEAKER AMP
CPU_FSB
NB_CORE
NB_FSB
SB_CORE
PP4V5_AUDIO_ANALOG
4.5V @ ?A
PAGE 68
PP3V3_S3
FET
PAGE 83
PP1V2_S3
1.2V @ 2.5A
PAGE 77
PP1V2_S0
FET
PAGE 77
PP0V9_S0
0.9V @ 1A
PAGE 31
CPU_AVDD
NB_PCIE
SB_IO
AUDIO
OPTICAL
HARD DRIVE
PP5V_S3
FET
PAGE 83
NB_DRAM
DRAM_CORE
DRAM_IO
3_3V_S5
3_3V_S0
ENET
NB_GPIO
GPU_GPIO
PP2V5_S0
2.5V @ 0.9A
PAGE 77
ENET_CORE
GPU_PCIE
USB
GPU_CORE
GPU_DRAM
GDDR_IO
PANEL INVERTER
FIREWIRE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
OF
13
110
COMMON
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
TABLE_5_HEAD
BOM OPTION
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
511S0025
IC,CPU-SKT,479BGA
J0700
TABLE_5_ITEM
CRITICAL
051-7148
PCB,SCHEM,MLB,M38A
SCH1
17_INCH_LCD
820-2052
PCB,FAB,MLB,M38A
MLB1
17_INCH_LCD
341T0040
EFI ROM,M38A
U6301
114S0264
3.01K,1%,1/16W,402,MF-LF
R8522
TABLE_5_ITEM
338S0328
IC,945PM,NORTHBRIDGE
U1200
TABLE_5_ITEM
343S0385
IC,SB,652BGA
U2100
TABLE_5_ITEM
CRITICAL
CRITICAL
(341S1908 - DEVEL)
(341S1909 - FINAL)
(335S0384 - BLNK)
TABLE_5_ITEM
CRITICAL
338S0344
IC,ATI,M56P,GRAFIXCTLR,880BGA,LF
U8400
CRITICAL
TABLE_5_ITEM
359S0101
U3301
CRITICAL
338S0270
U4101
CRITICAL
341S1797
U4102
CRITICAL
TABLE_5_ITEM
GPU_VCORE_1P2V
(341S1907 - PROG)
(338S0274 - BLNK) 341T0039
IC,SMC,M38A
U5800
CRITICAL
17_INCH_LCD
338S0315
IC,ATI,M56LP,GRAFIX CTLR,880BGA,LF
U8400
CRITICAL
GPU_B26_LP
114S0287
5.11K,1%,1/16W,402,MF-LF
R8522
GPU_VCORE_0P953V
114S0281
4.53K,1%,1/16W,402,MF-LF
R8522
GPU_VCORE_1P0V
337S3299
2.00GHZ MEROM
CPU
CRITICAL
2P00_CPU
337S3293
2.16GHZ MEROM
CPU
CRITICAL
2P16_CPU
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
(335S0382)
TABLE_5_ITEM
TABLE_5_ITEM
338S0279
IC,FW32306,1394A LINK,TQFP
U4400
CRITICAL
17_INCH_LCD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
341S1789
UNSCREENED P/N
353S1235
IC,TPM,TSSOP,28P
U6700
CRITICAL
LEMENU
TABLE_5_ITEM
TABLE_5_ITEM
353S1465
128S0078
CAP,EL,AL,330UF,20%,16V,10X12.7MM,SMD,LF
825-6447
MLB LABEL,48.0X4.8
U7500
CRITICAL
C7517,C7518,C7910
CRITICAL
X14
CRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
126S0096
126S0076
126S0086
126S0078
128S0080
128S0078
124-0338
124-0333
138S0580
138S0552
353S1321
353S1105
378S0141
378S0140
353S1461
353S1465
C7801
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
C699,C940,C1900,C1901,C1968
SANYO W6CE330FS 330UF 6.3V LF
TABLE_ALT_ITEM
C7517,C7518,C7910
SANYO
TABLE_5_ITEM
333S0354
IC,SGRAM,GDDR3,8MX32,700MHZ,136FBGA
U8900,U8950,U9000,U9050
CRITICAL
ATI_FB_128M_SAMSUNG
333S0358
IC,SGRAM,GDDR3,8MX32,700MHZ,136FBGA
U8900,U8950,U9000,U9050
CRITICAL
ATI_FB_128M_HYNIX
333S0376
IC,SGRAM,GDDR3,8MX32,700MHZ,136FBGA
U8900,U8950,U9000,U9050
CRITICAL
ATI_FB_128M_INFINEON
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
C7501,C8014
CAP,AL,EL,680UF,16V,RAD,10X12.5MM
TABLE_5_ITEM
TABLE_ALT_ITEM
22UF 0805
TABLE_ALT_ITEM
U7910
LM339
LED601,LED602,LED603
LED
TABLE_ALT_ITEM
TABLE_ALT_ITEM
U7500
PART#
QTY
DESCRIPTION
TABLE_5_ITEM
333S0350
IC,SGRAM,GDDR3,16MX32,700MHZ,136FBGA
U8900,U8950,U9000,U9050
CRITICAL
ATI_FB_256M_SAMSUNG
333S0351
IC,SGRAM,GDDR3,16MX32,700MHZ,136FBGA
U8900,U8950,U9000,U9050
CRITICAL
ATI_FB_256M_HYNIX
333S0377
IC,SGRAM,GDDR3,16MX32,700MHZ,136FBGA
U8900,U8950,U9000,U9050
CRITICAL
ATI_FB_256M_INFINEON
TABLE_5_ITEM
TABLE_5_ITEM
Table Items
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
OF
13
110
8
LAYOUT NOTE: PLACE NEAR J0700
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 11 7
21 7
21 7
21 7
21 7
21 7
21 7
21 7
34 7
34 7
FSB_A_L<6>
FSB_ADSTB_L<0>
FSB_A_L<27>
FSB_ADSTB_L<1>
FSB_D_L<0>
FSB_DSTBN_L<0>
FSB_DSTBP_L<0>
FSB_DINV_L<0>
FSB_D_L<16>
FSB_DSTBN_L<1>
FSB_DSTBP_L<1>
FSB_DINV_L<1>
FSB_D_L<41>
FSB_DSTBN_L<2>
FSB_DSTBP_L<2>
FSB_DINV_L<2>
FSB_D_L<59>
FSB_DSTBN_L<3>
FSB_DSTBP_L<3>
FSB_DINV_L<3>
FSB_LOCK_L
FSB_CPURST_L
PP600
PP601
PP602
PP603
PP604
PP605
PP606
PP607
PP608
PP609
PP610
PP611
PP612
PP613
PP614
PP615
PP616
PP617
PP618
PP619
PP620
PP621
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
1
SM
PP
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
1
SM
PP
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7 5
12 7
12 7
CPU_INIT_L
CPU_A20M_L
CPU_IGNNE_L
CPU_STPCLK_L
CPU_INTR
CPU_NMI
CPU_SMI_L
PP622
PP623
PP624
PP625
PP626
PP627
PP628
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
FSB_CLK_CPU_P
FSB_CLK_CPU_N
PP629
PP630
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
1
SM
PP
1
SM
PP
P4MM
P4MM
12 7
12 7
12 7
12 7
12 7
12 7
12 7
12 7
12 7
34 12
34 12
75 26 14
SB_CLK100M_SATA_P
SB_CLK100M_SATA_N
PP6C4
PP6C5
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
PP6C6
PP6C7
PP6C8
1
SM
PP
1
SM
PP
38 21
IDE_PDIOR_L
IDE_PDIORDY
IDE_PDD<9>
1
SM
PP
OMIT
P4MM
OMIT
P4MM
OMIT
34 22
PCI_CLK_SB
PP6D0
1
SM
PP
OMIT
PCIE_A_D2R_P
PCIE_A_D2R_N
PP6D1
PP6D2
1
SM
OMIT
P4MM
OMIT
34 21
34 21
38 21
38 21
P4MM
14
34 14
34 14
41 22
53 22
53 22
22 14
22 14
34 22
34 22
58 26 23
58 44 23
67 60
34 23
34 23
PCIE_B_D2R_P
PCIE_B_D2R_N
PP5E1
PP5E2
PP
1
SM
PP
1
SM
PP
1
SM
PP
P4MM
P4MM
OMIT
P4MM
OMIT
P4MM
PP6D3
PP6D4
1
SM
PP
1
SM
PP
SB_CLK100M_DMI_P
SB_CLK100M_DMI_N
PP6D5
PP6D6
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
PP6D7
PP6D8
1
SM
OMIT
P4MM
OMIT
SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR
PP6D9
PP6E0
PP
1
SM
PP
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
P4MM
P4MM
22 14
19 14
19 14
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
P4MM
28 15
OMIT
P4MM
OMIT
28 15
P4MM
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
28 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
FSB_CLK_NB_P
FSB_CLK_NB_N
PP663
PP664
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
VR_PWRGOOD_DELAY
NB_RST_IN_L_R
PP665
PP666
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
NB_CLK100M_GCLKIN_P
NB_CLK100M_GCLKIN_N
PP667
PP668
1
SM
PP
1
SM
PP
OMIT
P4MM
OMIT
PP
1
SM
PP
1
SM
PP
1
SM
1
SM
PP
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
1
SM
PP
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
P4MM
P4MM
P4MM
90 87 5
90 87 5
90 87 5
90 87 5
90 87 5
90 87 5
90 87 5
90 87 5
90 87 5
90 87
90 87
90 87
90 87
90 87
90 87
90 87
90 87
84 34
84 34
FB_A_DQ<0>
FB_A_DQ<8>
FB_A_DQ<16>
FB_A_DQ<24>
FB_A_DQ<32>
FB_A_DQ<40>
FB_A_DQ<48>
FB_A_DQ<56>
FB_A_MA<3>
FB_A_RDQS<0>
FB_A_RDQS<1>
FB_A_RDQS<2>
FB_A_RDQS<3>
FB_A_RDQS<4>
FB_A_RDQS<5>
FB_A_RDQS<6>
FB_A_RDQS<7>
1
PP8700 SM
1
PP8701 SM
1
PP8702 SM
1
PP8703 SM
1
PP8704 SM
1
PP8705 SM
1
PP8706 SM
1
PP8707 SM
SM
PP8708 1
1
PP8709 SM
1
PP8710 SM
1
PP8711 SM
1
PP8712 SM
1
PP8713 SM
1
PP8714 SM
SM
PP8715 1
1
PP8716 SM
FB_B_DQ<0>
FB_B_DQ<8>
FB_B_DQ<16>
FB_B_DQ<24>
FB_B_DQ<32>
FB_B_DQ<40>
FB_B_DQ<48>
FB_B_DQ<56>
FB_B_MA<3>
FB_B_RDQS<0>
FB_B_RDQS<1>
FB_B_RDQS<2>
FB_B_RDQS<3>
FB_B_RDQS<4>
FB_B_RDQS<5>
FB_B_RDQS<6>
FB_B_RDQS<7>
1
PP8720 SM
1
PP8721 SM
1
PP8722 SM
1
PP8723 SM
SM
PP8724 1
1
PP8725 SM
1
PP8726 SM
1
PP8727 SM
1
PP8728 SM
1
PP8729 SM
1
PP8730 SM
1
PP8731 SM
1
PP8732 SM
1
PP8733 SM
1
PP8734 SM
1
PP8735 SM
1
PP8736 SM
GPU_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
PP8400
PP8401
1
SM
1
SM
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
41 34
41 34
ENET_CLK100M_PCIE_P
ENET_CLK100M_PCIE_N
1
PP4100 SM
PP
1
PP4101 SM
PP
OMIT
P4MM
OMIT
SM-TP50-TOP
P4MM
19 12 6
79 6
IN
76 75 6
IN
26 25 24 21
IN
PP3V3_S5_SB_RTC
IN
83 81 80 79 59 6
IN
88 83 81 80 79 78 77 11 6
IN
PP1201
1
=PP1V05_S0_FSB_NB
PP3V3_S5
PP5V_S5
PP12V_S5
PP1V8_S3
PPVCORE_CPU
77 76 66 65 59 26 11 6
83 81 80 79
PP1200
1
NB_FSB_VREF
SM-TP50-TOP
PP1202
1
A
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
IN
60 59 58
IN
60 59 58
IN
60 59 58
IN
60 58
IN
60 59 58
IN
60 59 58
IN
FUNC_TEST=TRUE
8 TESTPOINTS
FUNC_TEST=TRUE
IN
60 59 58
PP
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
29 15
SMC_TX_L
SMC_RX_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
11 7
IN
SMC_MANUAL_RST_L
FUNC_TEST=TRUE
IN
11 7
IN
PP701
1
11 7
IN
SM-TP50-TOP
59
IN
POWER_BUTTON_L
FUNC_TEST=TRUE
PP702
1
26
IN
SW_RST_BTN_L
FUNC_TEST=TRUE
CPU_GTLREF
IN
11 7
PP700
1
=PP1V05_S0_CPU
IN
SM-TP50-TOP
59
11 7
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
SM-TP50-TOP
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
PP2800
1
=PP1V8_S3_MEM
SM-TP50-TOP
29 28
PP2801
1
MEM_VREF
SM-TP50-TOP
PP2802
1
A
SM-TP50-TOP
ZH500
HOLE-VIA
1
ZH510
HOLE-VIA
1
ZH520
HOLE-VIA
1
ZH511
ZH501
P4MM
HOLE-VIA
1
ZH521
HOLE-VIA
1
OMIT
P4MM
OMIT
P4MM
ZH512
ZH502
P4MM
DMI_S2N_N<0>
DMI_S2N_P<0>
MEM_VREF_NB_0
MEM_VREF_NB_1
MEM_A_DQ<7>
MEM_A_DQ<14>
MEM_A_DQ<16>
MEM_A_DQ<25>
MEM_A_DQ<39>
MEM_A_DQ<47>
MEM_A_DQ<54>
MEM_A_DQ<59>
MEM_A_DQS_P<0>
MEM_A_DQS_N<0>
MEM_A_DQS_P<1>
MEM_A_DQS_N<1>
MEM_A_DQS_P<2>
MEM_A_DQS_N<2>
MEM_A_DQS_P<3>
MEM_A_DQS_N<3>
MEM_A_DQS_P<4>
MEM_A_DQS_N<4>
MEM_A_DQS_P<5>
MEM_A_DQS_N<5>
MEM_A_DQS_P<6>
MEM_A_DQS_N<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<7>
MEM_B_DQ<6>
MEM_B_DQ<8>
MEM_B_DQ<23>
MEM_B_DQ<25>
MEM_B_DQ<38>
MEM_B_DQ<44>
MEM_B_DQ<48>
MEM_B_DQ<62>
MEM_B_DQS_P<0>
MEM_B_DQS_N<0>
MEM_B_DQS_P<1>
MEM_B_DQS_N<1>
MEM_B_DQS_P<2>
MEM_B_DQS_N<2>
MEM_B_DQS_P<3>
MEM_B_DQS_N<3>
MEM_B_DQS_P<4>
MEM_B_DQS_N<4>
MEM_B_DQS_P<5>
MEM_B_DQS_N<5>
MEM_B_DQS_P<6>
MEM_B_DQS_N<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<7>
PP673
PP674
1
SM
PP6E1
PP675
PP676
PP677
PP678
PP679
PP680
PP681
PP682
PP683
PP684
PP685
PP686
PP687
PP688
PP689
PP690
PP691
PP692
PP693
PP694
PP695
PP696
PP697
PP698
PP699
1
SM
PP6A0
PP6A1
PP6A2
PP6A3
PP6A4
PP6A5
PP6A6
PP6A7
PP6A8
PP6A9
PP6B0
PP6B1
PP6B2
PP6B3
PP6B4
PP6B5
PP6B6
PP6B7
PP6B8
PP6B9
PP6C0
PP6C1
PP6C2
PP6C3
PP
1
SM
PP
HOLE-VIA
1
ZH522
HOLE-VIA
1
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
1
SM
PP
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
1
SM
PP
ZH513
ZH503
OMIT
P4MM
OMIT
HOLE-VIA
ZH523
HOLE-VIA
1
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
ZH514
ZH504
HOLE-VIA
HOLE-VIA
1
ZH524
HOLE-VIA
1
ZH515
ZH505
HOLE-VIA
HOLE-VIA
1
ZH525
HOLE-VIA
1
FB_A_CKE<0>
FB_A_CLK_P<0>
FB_A_CLK_N<0>
FB_A_CS_L<0>
FB_A_WE_L<0>
FB_A_CAS_L<0>
FB_A_MA<3>
FB_A_RAS_L<0>
DRAM_RST
FB_A_WDQS<0>
FB_A_WDQS<1>
FB_A_WDQS<3>
FB_A_WDQS<2>
FB_A_DQ<0>
FB_A_DQ<8>
FB_A_DQ<16>
FB_A_DQ<24>
1
PP8900 SM
1
PP8901 SM
SM
PP8902 1
1
PP8903 SM
1
PP8904 SM
1
PP8905 SM
1
PP8906 SM
1
PP8907 SM
1
PP8908 SM
1
PP8909 SM
1
PP8910 SM
1
PP8911 SM
1
PP8912 SM
1
PP8913 SM
1
PP8914 SM
1
PP8915 SM
1
PP8916 SM
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
90 87
90 87
90 87
90 87
90 87
90 87
90 87
90 87 5
90 89 88 5
90 87
90 87
90 87
90 87
90 87 5
90 87 5
90 87 5
90 87 5
P4MM
FB_A_CKE<1>
FB_A_CLK_P<1>
FB_A_CLK_N<1>
FB_A_CS_L<1>
FB_A_WE_L<1>
FB_A_CAS_L<1>
FB_A_RAS_L<1>
FB_A_MA<3>
DRAM_RST
FB_A_WDQS<5>
FB_A_WDQS<6>
FB_A_WDQS<4>
FB_A_WDQS<7>
FB_A_DQ<32>
FB_A_DQ<40>
FB_A_DQ<48>
FB_A_DQ<56>
1
PP8920 SM
1
PP8921 SM
1
PP8922 SM
1
PP8923 SM
1
PP8924 SM
1
PP8925 SM
1
PP8926 SM
1
PP8927 SM
1
PP8928 SM
SM
PP8929 1
1
PP8930 SM
1
PP8931 SM
1
PP8932 SM
1
PP8933 SM
1
PP8934 SM
1
PP8935 SM
SM
PP8936 1
FB_B_CKE<0>
FB_B_CLK_P<0>
FB_B_CLK_N<0>
FB_B_CS_L<0>
FB_B_WE_L<0>
FB_B_CAS_L<0>
FB_B_RAS_L<0>
FB_B_MA<3>
DRAM_RST
FB_B_WDQS<0>
FB_B_WDQS<1>
FB_B_WDQS<3>
FB_B_WDQS<2>
FB_B_DQ<0>
FB_B_DQ<8>
FB_B_DQ<16>
FB_B_DQ<24>
ZH516
ZH506
1
PP9000 SM
PP
1
PP9001 SM
PP
1
SM
PP9002 PP
1
PP9003 SM
PP
1
PP9004 SM
PP
1
PP9005 SM
PP
1
PP9006 SM
PP
1
PP9007 SM
PP
1
PP9008 SM
PP
1
PP9009 SM
PP
1
PP9010 SM
PP
1
PP9011 SM
PP
1
PP9012 SM
PP
1
PP9013 SM
PP
1
PP9014 SM
PP
1
PP9015 SM
PP
1
PP9016 SM
PP
HOLE-VIA
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
34
IN
TP_PCI_CLK_SPARE
29
IN
TP_MEM_B_A<14>
ZH526
HOLE-VIA
1
29
IN
TP_MEM_B_A<15>
43
IN
ENET_MDI_R_N<0>
43
IN
ENET_MDI_R_N<1>
43
IN
ENET_MDI_R_N<2>
43
NO_TEST=TRUE
ENET_MDI_R_N<3>
IN
ENET_MDI_R_P<0>
43
IN
ENET_MDI_R_P<1>
43
IN
ENET_MDI_R_P<2>
IN
ENET_MDI_R_P<3>
HOLE-VIA
1
ZH527
HOLE-VIA
1
NO_TEST=TRUE
NO_TEST=TRUE
IN
ZH517
ZH507
HOLE-VIA
NO_TEST=TRUE
43
43
NO_TEST=TRUE
ZH518
ZH508
HOLE-VIA
NO_TEST=TRUE
HOLE-VIA
1
ZH528
HOLE-VIA
1
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
ZH519
ZH509
NO_TEST=TRUE
HOLE-VIA
NO_TEST=TRUE
HOLE-VIA
1
ZH529
HOLE-VIA
1
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
90 87
90 87
90 87
90 87
90 87
90 87
90 87
90 87 5
90 89 88 5
90 87
90 87
90 87
90 87
90 87 5
90 87 5
90 87 5
90 87 5
P4MM
FB_B_CKE<1>
FB_B_CLK_P<1>
FB_B_CLK_N<1>
FB_B_CS_L<1>
FB_B_WE_L<1>
FB_B_CAS_L<1>
FB_B_RAS_L<1>
FB_B_MA<3>
DRAM_RST
FB_B_WDQS<5>
FB_B_WDQS<6>
FB_B_WDQS<7>
FB_B_WDQS<4>
FB_B_DQ<32>
FB_B_DQ<40>
FB_B_DQ<48>
FB_B_DQ<56>
1
PP9020 SM
PP
1
PP9021 SM
PP
1
PP9022 SM
PP
1
PP9023 SM
PP
1
PP9024 SM
PP
1
PP9025 SM
PP
1
PP9026 SM
PP
1
PP9027 SM
PP
1
PP9028 SM
PP
1
SM
PP9029 PP
1
PP9030 SM
PP
1
PP9031 SM
PP
1
PP9032 SM
PP
1
PP9033 SM
PP
1
PP9034 SM
PP
1
PP9035 SM
PP
1
SM
PP9036 PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
FUNC TEST 1 OF 2
P4MM
DRAWING NUMBER
REV.
051-7148
13
5
110
SHT
NONE
HOLE-VIA
SCALE
HOLE-VIA
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
SM-TP50-TOP
HOLE-VIA
PP
SMC_TCK
SMC_TDI
SMC_TDO
SMC_TMS
SMC_TRST_L
28 15
1
SM
P4MM
DMI_N2S_P<0>
DMI_N2S_N<0>
PM_SYSRST_L
PM_CLKRUN_L
PP631
PP632
PP633
PP634
PP635
PP636
PP637
PP638
PP639
PP640
PP641
PP642
PP643
PP644
PP645
PP646
PP647
PP648
PP649
PP650
PP651
PP652
PP653
PP654
PP655
PP656
PP657
PP658
PP659
PP660
PP661
PP662
FSB_A_L<6>
FSB_ADSTB_L<0>
FSB_A_L<27>
FSB_ADSTB_L<1>
FSB_D_L<0>
FSB_DSTBN_L<0>
FSB_DSTBP_L<0>
FSB_DINV_L<0>
FSB_D_L<16>
FSB_DSTBN_L<1>
FSB_DSTBP_L<1>
FSB_DINV_L<1>
FSB_D_L<41>
FSB_DSTBN_L<2>
FSB_DSTBP_L<2>
FSB_DINV_L<2>
FSB_D_L<59>
FSB_DSTBN_L<3>
FSB_DSTBP_L<3>
FSB_DINV_L<3>
FSB_LOCK_L
FSB_HIT_L
FSB_HITM_L
FSB_BNR_L
FSB_BREQ0_L
FSB_DBSY_L
FSB_DPWR_L
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
HOLE-VIA
22 14
41 22
OF
8
88 76 61 59 41 26 11 10 6
97 88 75 6
88 6
PP3V3_S0
88 83 81 80 79 78 77 11 6 5
PP5V_S0
83 81 80 79 59 6 5
PP12V_S0
"S0" RAILS
PP12V_S5
"S3" RAILS
ONLY ON IN RUN
PP5V_S5
1
"S5" RAILS
PP3V3_S5
77 76 66 65 59 26 11 6 5
83 81 80 79
79
CRITICAL
330UF
J600
20%
2 6.3V
ELEC
CASE-C1
HM9606E-P2
NOSTUFF
M-RT-TH
R601
10
11
12
10K
PU ON PAGE 76 IS USED
5%
1/16W
MF-LF
2 402
SYS_POWERFAIL_L
76
PP0V9_S0
MAKE_BASE=TRUE
VOLTAGE=0.9V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.15MM
C699
76 75 5
PPVCORE_CPU
81 34
PP1V05_S0
MAKE_BASE=TRUE
VOLTAGE=1.05V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.15MM
P/N 518-0189
PP3V3_S5
79 77 76 66 65 59 26 11 6 5
83 81 80
88 79 77 58 23
IN
PM_SLP_S3_L
20%
CERM 402
80 11
PP1V5_S0
MAKE_BASE=TRUE
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
SYS_PWRUP_L
4
SOT23-5
C600
0.1UF
C
CRITICAL
U600
22
IN
68
94
GPU_PWM_RST_L
OUT
5% 1/16W
402 MF-LF
14 74LC125
3
U600_3
PLT_RST_L
R618
1
R619
125
1 TSSOP
=PP1V2_S3_LAN
=PPVCORE_S0_NB
=PP1V05_S0_CPU
=PP1V05_S0_FSB_NB
=PP1V05_S0_NB_VTT
=PP1V05_S0_NB
=PP1V05_S0_SB_CPU_IO
=PPVCORE_S0_SB
=PP1V5_S0_CPU
=PP1V5_S0_NB_PCIE
=PP1V5_S0_NB_VCCAUX
=PP1V5_S0_NB_VCCD_HMPLL
68
58
SMC_LRESET_L
OUT
42
79 77 76 66 65 59 26 11 6 5
83 81 80
PP3V3_S5
=PP3V3_S5_SB
=PP3V3_S5_SB_USB
=PP3V3_S5_SB_PM
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA
=PP3V3_S5_SB_IO
=PP3V3_S5_FW
=PP3V3_S5_SMC
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
8 9
PP1V8_S3
=PP1V8_S3_MEM_NB
=PP1V8_S3_MEM_NB
=PP1V8_S3_MEM
=PP1V8_S0_MEMVTT
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
=PP1V5_S0_NB_VCCAUX
=PP1V5_S0_NB_PLL
=PP1V5_S0_NB
=PP1V5_S0_NB_TVDAC
=PP1V5_S0_NB_3GPLL
=PP1V5_S0_SB_VCC1_5_A_ARX
=PP1V5_S0_SB_VCCSATAPLL
=PP1V5_S0_SB_VCC1_5_A_ATX
=PP1V5_S0_SB_VCCUSBPLL
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
=PP1V5_S0_SB_VCC1_5_A
=PP1V5_S0_SB
=PP1V5_S0_AIRPORT
PP3V3_S5
79 77 76 66 65 59 26 11 6 5
83 81 80
20%
10V
2 CERM
402
PP1V2_S3
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
79 5
77
30
6 14 16 19
6 14 16 19
=PP3V3_S5_DEBUG
=PP3V3_S5_ROM
5 7 8 9 11
5 12 19
83 59 53 6
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
19
=PP3V3_S3_ENET
=PP3V3_S3_TPM
=PP3V3_S3_1V2REG
=PP3V3_S3_BT
=PP3V3_S3_USB
=PP3V3_S3_VGASYNC
21 24 25
24 25
41 42
83 81 80 79 59 6 5
11 23
24 25
24 25
24
22 27
44 45 46
58 59
60
63
77
PP5V_S3
=PP5V_S3_USB
=PP5V_S3_BNDI
=PP5V_S0_MEMVTT
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
17 19
=PP5V_S5_SB
25
47
88 83 81 80 79 78 77 11 6 5
6 16 17 19
PP5V_S5
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
67
PP12V_S5
=PP12V_S5_FW
=PP12V_S5_CPU
MAKE_BASE=TRUE
VOLTAGE=12V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
83 60
22
PP3V3_S3
17 19
13 19
23 25 26
5 28 29
31
16 19
C610
0.1UF
10V
U601
74LVC1G04DBVG4
=PPVCORE_S0_CPU
31
MAKE_BASE=TRUE
VOLTAGE=1.25V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
0
=PP0V9_S0_MEMVTT_LDO
=PP0V9_S0_MEM_TERM
47
46
76
47
31
6 16 17 19
19
19
19
19
GND RAILS
24 25
24 25
XW601
SM
NOSTUFF
24 25
24 25
24 25
74
GND_AUDIO
XW602
SM
NOSTUFF
24 25
25
53
74 72
GND_AUDIO_SPKRAMP
5% 1/16W
402 MF-LF
R611
CRITICAL
U600
5
68
14
NB_RST_IN_L
84
PEG_RESET_L
OUT
5% 1/16W
402 MF-LF
14 74LC125
6
U600_6
88 77 11
R612
125
4 TSSOP
68
PP2V5_S0
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
OUT
5% 1/16W
402 MF-LF
CHASSIS GND
=PP2V5_S0_NB_VCCA_3GBG
U600
14 74LC125
8
7
68
42
ENET_RST_L
GND_CHASSIS_IO_LEFT
MAKE_BASE=TRUE
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
OUT
5% 1/16W
402 MF-LF
U600_8
R615
125
10 TSSOP
68
67
TPM_LRESET_L
88 76 61 59 41 26 11 10 6
R616
CRITICAL
U600
14 74LC125
11 U600_11
7
PP3V3_S0
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
OUT
5% 1/16W
402 MF-LF
12
68
53
AIRPORT_RST_L
OUT
5% 1/16W
402 MF-LF
R617
125
13 TSSOP
68
60
DEBUG_RST_L
OUT
5% 1/16W
402 MF-LF
97 93 91 88
=PP3V3_S0_GPU
1
C650
0.1UF
20%
10V
2 CERM
402
U650
5 74AHC1G32
94 91
GPU_DIGON
SM-LF
4
2
U650_4
97 88 75 6
R605
PP3V3_S5
83 59 53 6
R602
1K
5%
1/16W
MF-LF
2 402
ITS_PLUGGED_IN
820
PP3V3_S3
1
R600
1K
5%
1/16W
MF-LF
2 402
LED602
GREEN-3.6MCD
2.0X1.25MM-SM
GREEN-3.6MCD
2.0X1.25MM-SM
SILKSCREEN:1
17 19
GND_CHASSIS_AUDIO_EXTERNAL
47
GND_CHASSIS_USB
19
22 25 27
21 23
24 25
24 25
43
GND_CHASSIS_FIREWIRE
GND_CHASSIS_VGA
GND_CHASSIS_RJ45
73
GND_CHASSIS_AUDIO_INTERNAL
46
24 25
97
26
OMIT
26
GND_CHASSIS_IO_RIGHT
MAKE_BASE=TRUE
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
ZH604
38
4P25R3P5
59 65 66
ZH704P1
66
66
OMIT
24 25
OMIT
ZH606
ZH601
67
160R138
4P25R3P5
28 29
ZH701P1
47
NOSTUFF
33 34
75
C604
0.01UF
68 72 73 74
20%
2 16V
CERM
402
44
24 25
OMIT
NOSTUFF
1
ZH602
C601
0.01UF
20%
16V
2 CERM
402
53
77
GND_CHASSIS_BNDI
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0
MAKE_BASE=TRUE
4P25R3P5
ZH702P1
OMIT
ZH603
4P25R3P5
C602 ZH703P1
1
NOSTUFF
14 19 20
20%
2 16V
CERM
402
25
38
XW604
SM OMIT
NOSTUFF
1
C603
0.01UF
=PP5V_S0_AUDIO
20%
2 16V
CERM
402
68
60
88 6
LED603
GREEN-3.6MCD
2.0X1.25MM-SM
PP12V_S0
MAKE_BASE=TRUE
VOLTAGE=12V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
=PP12V_S0_FAN
XW605
SM OMIT
1
SILKSCREEN:3
PP12V_S0_AUDIO_SPKRAMP
=PP12V_S0_AUDIO_SPKRAMP
72
SIZE
MAKE_BASE=TRUE
SILKSCREEN:2
DRAWING NUMBER
REV.
051-7148
SHT
NONE
SCALE
5%
1/16W
MF-LF
402
73
LCD_SHOULD_ON
1
LED601
=PP5V_S0_SB
=PP5V_S0_PATA
1
2
PP5V_S0_AUDIO
MAKE_BASE=TRUE
=PP5V_S0_DEBUG
5%
1/10W
MF-LF
2 603
ITS_ALIVE
1
PP5V_S0
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
1
79 77 76 66 65 59 26 11 6 5
83 81 80
=PP3V3_S0_NB_PM
=PP3V3_S0_NB_VCC_HV
=PP3V3_S0_NB_TVDAC
=PP3V3_S0_SB
=PP3V3_S0_SB_GPIO
=PP3V3_S0_SB_VCC3_3
=PP3V3_S0_SB_VCC3_3_PCI
=PP3V3_S0_SB_VCC3_3_IDE
=PP3V3_S0_SB_PCI
=PP3V3_S0_SB_PM
=PP3V3_S0_PATA
=PP3V3_S0_FAN
=PP3V3_S0_HD_TSENS
=PP3V3_S0_ODD_TSENS
=PP3V3_S0_SB_3V3_1V5_VCCHDA
=PP3V3_S0_TPM
=PPSPD_S0_MEM
=PP3V3_S0_CK410
=PP3V3_S0_IMVP
=PP3V3_S0_AUDIO
=PP3V3_S0_PCI
=PP3V3_S0_SB_VCCLAN3_3
=PP3V3_S0_AIRPORT
=PP3V3_S0_2V5REG
=PP3V3_S0_NB
0.01UF
32
3
R603
R614
CRITICAL
NOSTUFF
17 19
OF
13
110
OMIT
J0700
IO
12
IO
12
IO
12
IO
12
IO
12
IO
12
IO
12 5
IO
12 5
12 5
12 5
IO
IO
IO
12 5
IO
12 5
IO
12
IO
12
IO
12
IO
12
IO
12
IO
12
12
12
12
12
12 5
12
12
12
12
12 5
21 5
21
21 5
21 5
21 5
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
OUT
IN
IN
IN
21 5
IN
21 5
IN
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
A10*
A11*
A12*
A13*
A14*
A15*
A16*
ADSTB0*
BR0*
12
IO
H5
12
F21
E1
F1
FSB_DEFER_L
FSB_DRDY_L
FSB_DBSY_L
IO
IO
12 5
FSB_BREQ0_L
INIT*
21 5
LOCK*
H4
12 5
RESET*
RS0*
B1
RS2*
TRDY*
G3
HIT*
G6
E4
HITM*
FSB_LOCK_L
FSB_CPURST_L
FSB_RS_L<0>
FSB_RS_L<1>
12 FSB_RS_L<2>
12 FSB_TRDY_L
G2
1%
1/16W
MF-LF
2 402
PLACE TESTPOINT ON
IN
IN
IN
=PP1V05_S0_CPU
5 6 7 8 9 11
IO
IO
L5 REQ4*
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_ADSTB_L<1>
Y2 A17*
U5 A18*
R3 A19*
W6 A20*
U4 A21*
Y5 A22*
U2 A23*
R4 A24*
T5 A25*
T3 A26*
W3 A27*
W5 A28*
Y4 A29*
W2 A30*
Y1 A31*
V4 ADSTB1*
CPU_A20M_L
CPU_FERR_L
CPU_IGNNE_L
BPM1*
BPM2*
BPM3*
PRDY*
PREQ*
TCK
TDI
TDO
TMS
TRST*
DBR*
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
26
XDP_BPM_L<0>
XDP_BPM_L<1>
11 XDP_BPM_L<2>
11 XDP_BPM_L<3>
11 XDP_BPM_L<4>
11 XDP_BPM_L<5>
11 7 5 XDP_TCK
11 7 5 XDP_TDI
11 5 XDP_TDO
11 7 5 XDP_TMS
11 5 XDP_TRST_L
11 XDP_DBRESET_L
R0701
R0703
11
IO
54.9
54.9
11
IO
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
IO
IO
OMIT
J0700
IO
12 5
IO
12
12
IN
IN
12
R0704
OUT
68
ON ITP SIGNALS?
IN
5%
1/16W
MF-LF
402
IN
2
12
12
12
12
OUT
A6 A20M*
A5 FERR*
C4 IGNNE*
CPU_STPCLK_L
CPU_INTR
CPU_NMI
CPU_SMI_L
BPM0*
IN
IN
FSB_HIT_L
FSB_HITM_L
IO
12
12 5
54.9
IO
12
12 5
R0702
FSB_IERR_L
CPU_INIT_L IN
12 11 5
F3
F4
IO
12
12 5
D20
B3
IERR*
RS1*
K3 REQ0*
H2 REQ1*
K2 REQ2*
J3 REQ3*
IO
THERMDA
D21
A24
10
THERMDC
A25
10
PROCHOT*
12
59
CPU_THERMD_P
CPU_THERMD_N
CPU_PROCHOT_L TO SMC
CPU_PROCHOT_L
IN
12
OUT
CPU IS HOT
12
OUT
12
THERMTRIP*
C7
59 21 14
PM_THRMTRIP_L
OUT
12
12
PM_THRMTRIP#
D5 STPCLK*
C6 LINT0
B4 LINT1
A3 SMI*
12
BCLK0
BCLK1
A22
34 5
A21
34 5
FSB_CLK_CPU_P
FSB_CLK_CPU_N
SHOULD CONNECT TO
IN
12 5
IO
12 5
IO
12 5
IO
IN
12 5
12
TP_CPU_A32_L
TP_CPU_A33_L
TP_CPU_A34_L
TP_CPU_A35_L
TP_CPU_A36_L
TP_CPU_A37_L
TP_CPU_A38_L
TP_CPU_A39_L
TP_CPU_APM0_L
TP_CPU_APM1_L
AA1 RSVD1
AA4 RSVD2
AB2 RSVD3
AA3 RSVD4
M4 RSVD5
N5 RSVD6
T2 RSVD7
V3 RSVD8
B2 RSVD9
C3 RSVD10
TP_CPU_HFPLL
B25 RSVD11
12
RSVD12
T22
TP_CPU_EXTBREF
12
12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
D2
F6
D3
C1
AF1
D22
C23
C24
TP_CPU_SPARE0
TP_CPU_SPARE1
TP_CPU_SPARE2
TP_CPU_SPARE3
TP_CPU_SPARE4
TP_CPU_SPARE5
TP_CPU_SPARE6
TP_CPU_SPARE7
12
12
SPARE[7-0],HFPLL:
12
=PP1V05_S0_CPU
12
=PP1V05_S0_CPU
12
R0705
12 5
1K
5 6 7 8 9 11
1%
1/16W
MF-LF
402
5
IO
12 5
IO
12 5
IO
FSB_D_L<0>
FSB_D_L<1>
IO FSB_D_L<2>
IO FSB_D_L<3>
IO FSB_D_L<4>
IO FSB_D_L<5>
IO FSB_D_L<6>
IO FSB_D_L<7>
IO FSB_D_L<8>
IO FSB_D_L<9>
IO FSB_D_L<10>
IO FSB_D_L<11>
IO FSB_D_L<12>
FSB_D_L<13>
IO
IO FSB_D_L<14>
IO FSB_D_L<15>
FSB_DSTBN_L<0>
FSB_DSTBP_L<0>
FSB_DINV_L<0>
IO
IO
FSB_D_L<16>
IO FSB_D_L<17>
IO FSB_D_L<18>
IO FSB_D_L<19>
IO FSB_D_L<20>
IO FSB_D_L<21>
IO FSB_D_L<22>
IO FSB_D_L<23>
IO FSB_D_L<24>
IO FSB_D_L<25>
IO FSB_D_L<26>
IO FSB_D_L<27>
IO FSB_D_L<28>
IO FSB_D_L<29>
IO FSB_D_L<30>
IO FSB_D_L<31>
FSB_DSTBN_L<1>
FSB_DSTBP_L<1>
FSB_DINV_L<1>
IO
XDP_TMS
54.9
1
2
R0721
11 7 5
R0706
XDP_TDI
CPU_TEST1
1%
1/16W
MF-LF
402
54.9
E25 D6*
E23 D7*
K24 D8*
G24 D9*
J24 D10*
J23 D11*
H26 D12*
F26 D13*
K22 D14*
H25 D15*
H23 DSTBN0*
D36*
D37*
D38*
D39*
D40*
D41*
D42*
D43*
D44*
D45*
D46*
D47*
DSTBN2*
DSTBP2*
G22 DSTBP0*
J26 DINV0*
DINV2*
N22 D16*
K25 D17*
P26 D18*
R23 D19*
D48*
L25 D20*
L22 D21*
L23 D22*
D52*
D53*
M23 D23*
P25 D24*
P22 D25*
P23 D26*
T24 D27*
R24 D28*
D49*
D50*
D51*
L26 D29*
T25 D30*
N24 D31*
D54*
D55*
D56*
D57*
D58*
D59*
D60*
D61*
D62*
D63*
DSTBN3*
M24 DSTBN1*
N25 DSTBP1*
M26 DINV1*
DSTBP3*
DINV3*
MISC
34
OUT
34
OUT
34
OUT
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
12
Y25
12
V23
AC22
AC23
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
12 FSB_D_L<35>
12 FSB_D_L<36>
12 FSB_D_L<37>
12 FSB_D_L<38>
12 FSB_D_L<39>
12 FSB_D_L<40>
12 5 FSB_D_L<41>
12 FSB_D_L<42>
12 FSB_D_L<43>
12 FSB_D_L<44>
12 FSB_D_L<45>
12 FSB_D_L<46>
12 FSB_D_L<47>
5 FSB_DSTBN_L<2>
5 FSB_DSTBP_L<2>
12 5 FSB_DINV_L<2>
12
IO
12
IO
12
IO
FSB_D_L<48>
12 FSB_D_L<49>
12 FSB_D_L<50>
12 FSB_D_L<51>
12 FSB_D_L<52>
12 FSB_D_L<53>
12 FSB_D_L<54>
12 FSB_D_L<55>
12 FSB_D_L<56>
12 FSB_D_L<57>
12 FSB_D_L<58>
12 5 FSB_D_L<59>
12 FSB_D_L<60>
12 FSB_D_L<61>
12 FSB_D_L<62>
12 FSB_D_L<63>
5 FSB_DSTBN_L<3>
5 FSB_DSTBP_L<3>
12 5 FSB_DINV_L<3>
12
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
12
12
AC20
COMP0
R26
COMP1
U26
U1
COMP2
COMP3
C26 TEST1
CPU_TEST2
D25 TEST2
CPU_BSEL<0>
CPU_BSEL<1>
CPU_BSEL<2>
B22 BSEL0
B23 BSEL1
C21 BSEL2
DPRSTP*
DPSLP*
DPWR*
PWRGOOD
SLP*
PSI*
NOSTUFF
R0730
1
R0722
XDP_TCK
D34*
D35*
AA23
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
LAYOUT NOTE:
IO
IO
IO
IO
IO
IO
IO
IO
IO
R0716
IO
IO
R0717
IO
CPU_COMP<0>
CPU_COMP<1>
CPU_COMP<2>
CPU_COMP<3>
V1
E5
B5
D24
D6
D7
AE6
CPU_DPRSTP_L
21 CPU_DPSLP_L
12 5 FSB_DPWR_L
21 CPU_PWRGD
12 FSB_SLPCPU_L
75 CPU_PSI_L
75 21
27.4
54.9
27.4
54.9
402
IO
1
1%
1%
1/16W
MF-LF
402
11 7 5
(2 OF 4)
D32*
D33*
54.9
1
BGA
H22 D3*
F23 D4*
G25 D5*
AD26 GTLREF
A2 NC
2.0K
1%
1/16W
MF-LF
402
YONAH-SKT
CPU
CPU_GTLREF
R0720
11 7 5
E22 D0*
F24 D1*
E26 D2*
DATA GRP2
12
IO
DATA GRP3
IO
DEFER*
DRDY*
DBSY*
A8*
A9*
5 6 7 8 9 11
12
12 5
DATA GRP0
12
(1 OF 4)
FSB_ADS_L
FSB_BNR_L
FSB_BPRI_L
H1
E2
G5
DATA GRP1
IO
A6*
A7*
ADS*
BNR*
BPRI*
CONTROL
IO
12
BGA
XDP/ITP SIGNALS
12
A5*
THERM
IO
YONAH-SKT
CPU
HCLK
IO
=PP1V05_S0_CPU
A3*
A4*
ADDR GROUP0
12
FSB_A_L<3>
J4
FSB_A_L<4>
L4
FSB_A_L<5>
M3
FSB_A_L<6>
K5
FSB_A_L<7>
M1
FSB_A_L<8>
N2
FSB_A_L<9>
J1
FSB_A_L<10>
N3
FSB_A_L<11>
P5
FSB_A_L<12>
P2
FSB_A_L<13>
L1
FSB_A_L<14>
P4
FSB_A_L<15>
P1
FSB_A_L<16>
R1
FSB_ADSTB_L<0> L2
ADDR GROUP1
IO
12 5
IO
12
RESERVED
12
R0718
R0719
402
1%
402
IN
IN
IN
IN
IN
IN
402
1%
1/16W
MF-LF
402
R0707
51
5%
1/16W
MF-LF
2 402
1NOSTUFF
R0712
1K
5%
1/16W
MF-LF
2 402
CPU 1 OF 2-FSB
SYNC_MASTER=MASTER
SYNC_DATE=05/03/2005
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
7
110
OMIT
A4 VSS_1
A8 VSS_2
A11 VSS_3
=PPVCORE_S0_CPU
6 8 9
=PPVCORE_S0_CPU
OMIT
A7 VCC_1
A9 VCC_2
A10 VCC_3
A12 VCC_4
A13 VCC_5
A15 VCC_6
CPU
BGA
(3 OF 4)
VCC_77 AD7
VCC_78 AD9
VCC_79 AD10
B12 VCC_13
B14 VCC_14
B15 VCC_15
VCC_80 AD12
VCC_81 AD14
D9 VCC_26
D10 VCC_27
D12 VCC_28
D14 VCC_29
VCC_85 AE9
VCC_86 AE10
VCC_87 AE12
VCC_88 AE13
VCC_89 AE15
VCC_90 AE17
VCC_91 AE18
VCC_92 AE20
VCC_93 AF9
VCC_94 AF10
VCC_95 AF12
VCC_96 AF14
VCC_97 AF15
VCC_98 AF17
VCC_99 AF18
VCC_100 AF20
E9 VCC_34
E10 VCC_35
E12 VCC_36
VCCP_1 V6
VCCP_2 G21
E13 VCC_37
E15 VCC_38
E17 VCC_39
VCCP_3 J6
VCCP_4 K6
VCCP_5 M6
E18 VCC_40
E20 VCC_41
F7 VCC_42
VCCP_6 J21
VCCP_7 K21
VCCP_8 M21
F9 VCC_43
F10 VCC_44
F12 VCC_45
VCCP_9 N21
VCCP_10 N6
VCCP_11 R21
F14 VCC_46
F15 VCC_47
F17 VCC_48
VCCP_12 R6
VCCP_13 T21
AA9 VCC_52
AA10 VCC_53
AA12 VCC_54
AA13 VCC_55
AA15 VCC_56
AA17 VCC_57
AA18 VCC_58
AA20 VCC_59
AB9 VCC_60
AC10 VCC_61
=PP1V05_S0_CPU
=PP1V5_S0_CPU
C0800
0.01UF
VCCP_14 T6
VCCP_15 V21
VCCP_16 W21
=PP1V5_S0_CPU
20%
16V
CERM
402
6 8
C0801
10UF
20%
6.3V
X5R
603
VCCA=1.5 ONLY
VCCA B26
VID0 AD6
VID1 AF5
VID2 AE5
VID3 AF4
VID4 AE3
VID5 AF2
VID6 AE2
75
75
75
75
75
75
75
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
CPU_VID<6>
OUT
OUT
OUT
=PPVCORE_S0_CPU
OUT
OUT
R0802
100
OUT
2
1%
1/16W
MF-LF
402
LAYOUT NOTE:
VCCSENSE AF7
75
VSSSENSE AE7
75
CPU_VCCSENSE_P
CPU_VCCSENSE_N
OUT
R0803
TRANSMISSION LINE
100
1%
1/16W
MF-LF
2 402
VSS_87 R22
VSS_88 R25
VSS_89 T1
VSS_90 T4
VSS_91 T23
VSS_92 T26
VSS_96 U24
VSS_97 V2
VSS_101 W1
VSS_102 W4
VSS_103 W23
VSS_104 W26
VSS_105 Y3
VSS_106 Y6
D8 VSS_28
D11 VSS_29
D13 VSS_30
VSS_109 AA2
VSS_110 AA5
VSS_111 AA8
D16 VSS_31
D19 VSS_32
D23 VSS_33
VSS_112 AA11
VSS_113 AA14
VSS_114 AA16
D26 VSS_34
E3 VSS_35
E6 VSS_36
VSS_115 AA19
VSS_116 AA22
VSS_117 AA25
E8 VSS_37
E11 VSS_38
E14 VSS_39
VSS_118 AB1
VSS_119 AB4
VSS_107 Y21
VSS_108 Y24
VSS_120 AB8
VSS_121 AB11
VSS_122 AB13
VSS_123 AB16
VSS_124 AB19
VSS_125 AB23
F8 VSS_45
F11 VSS_46
F13 VSS_47
F16 VSS_48
F19 VSS_49
VSS_126 AB26
VSS_127 AC3
VSS_128 AC6
F2 VSS_50
F22 VSS_51
F25 VSS_52
VSS_131 AC14
VSS_132 AC16
VSS_133 AC19
G4 VSS_53
G1 VSS_54
G23 VSS_55
VSS_134 AC21
VSS_135 AC24
VSS_136 AD2
G26 VSS_56
H3 VSS_57
H6 VSS_58
VSS_137 AD5
VSS_138 AD8
VSS_139 AD11
H21 VSS_59
H24 VSS_60
J2 VSS_61
VSS_140 AD13
VSS_141 AD16
VSS_129 AC8
VSS_130 AC11
VSS_142 AD19
VSS_143 AD22
VSS_144 AD25
VSS_145 AE1
VSS_146 AE4
VSS_147 AE8
K23 VSS_67
K26 VSS_68
L3 VSS_69
VSS_148 AE11
VSS_149 AE14
VSS_150 AE16
L6 VSS_70
L21 VSS_71
L24 VSS_72
VSS_151 AE19
VSS_152 AE23
N4 VSS_78
N23 VSS_79
N26 VSS_80
P3 VSS_81
VSS_98 V5
VSS_99 V22
VSS_100 V25
C2 VSS_23
C22 VSS_24
C25 VSS_25
D1 VSS_26
D4 VSS_27
M2 VSS_73
M5 VSS_74
M22 VSS_75
M25 VSS_76
N1 VSS_77
BGA
B21 VSS_15
B24 VSS_16
C5 VSS_17
J5 VSS_62
J22 VSS_63
J25 VSS_64
K1 VSS_65
K4 VSS_66
6 8 9
OUT
AB10 VCC_62
AB12 VCC_63
AB14 VCC_64
AB15 VCC_65
AB17 VCC_66
AB18 VCC_67
6 8
CPU
(4 OF 4)
P6
P21
VSS_84 P24
VSS_85 R2
VSS_86 R5
VSS_93 U3
VSS_94 U6
VSS_95 U21
E16 VSS_40
E19 VSS_41
E21 VSS_42
E24 VSS_43
F5 VSS_44
5 6 7 9 11
YONAH-SKT
B13 VSS_12
B16 VSS_13
B19 VSS_14
C8 VSS_18
C11 VSS_19
C14 VSS_20
C16 VSS_21
C19 VSS_22
VCC_82 AD15
VCC_83 AD17
VCC_84 AD18
D15 VCC_30
D17 VCC_31
D18 VCC_32
E7 VCC_33
F18 VCC_49
F20 VCC_50
AA7 VCC_51
A23 VSS_7
A26 VSS_8
B6 VSS_9
B8 VSS_10
B11 VSS_11
VCC_71 AC9
VCC_72 AC12
VCC_73 AC13
B7 VCC_10
B9 VCC_11
B10 VCC_12
C15 VCC_23
C17 VCC_24
C18 VCC_25
J0700
VCC_74 AC15
VCC_75 AC17
VCC_76 AC18
C9 VCC_19
C10 VCC_20
C12 VCC_21
C13 VCC_22
VCC_68 AB20
VCC_69 AB7
YONAH-SKT
VCC_70 AC7
A17 VCC_7
A18 VCC_8
A20 VCC_9
B17 VCC_16
B18 VCC_17
B20 VCC_18
A14 VSS_4
A16 VSS_5
A19 VSS_6
6 8 9
J0700 VSS_82
VSS_83
VSS_153 AE26
VSS_154 AF3
VSS_155 AF6
VSS_156 AF8
VSS_157 AF11
VSS_158 AF13
VSS_159 AF16
VSS_160 AF19
VSS_161 AF21
VSS_162 AF24
CPU 2 OF 2-PWR/GND
SYNC_MASTER=MASTER
SYNC_DATE=05/03/2005
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
8
110
D
OMIT
OMIT
ZH607
ZH608
4P75R4
CPU_HS_ZH607
C950
11 9 8 7 6 5
OMIT
ZH609
4P75R4
66
C951
CPU_HS_ZH608
ZH610
4P75R4
CPU_HS_ZH609
OMIT
C952
4P75R4
CPU_HS_ZH610
C953
0.01UF
0.01UF
0.01UF
0.01UF
20%
16V
CERM
402
20%
16V
CERM
402
20%
16V
CERM
402
20%
16V
CERM
402
=PP1V05_S0_CPU
CRITICAL
1
OMIT
C940
ZH611
330UF
20%
2 6.3V
ELEC
CASE-C1
6P5R3P2
1
=PP1V05_S0_CPU
C926
0.1UF
20%
C934
0.1UF
20%
2 10V
CERM
402
2 10V
CERM
402
C935
0.1UF
20%
2 10V
CERM
402
B
8 6
C936
0.1UF
20%
10V
2 CERM
402
C937
0.1UF
20%
2 10V
CERM
402
C938
0.1UF
20%
10V
2 CERM
402
=PPVCORE_S0_CPU
C923
22UF
C911
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
C924
22UF
C918
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
C910
22UF
20%
6.3V
2 X5R
805
C913
22UF
20%
6.3V
2 X5R
805
NOSTUFF
C908
22UF
C901
22UF
20%
6.3V
2 X5R
805
C912
22UF
20%
6.3V
2 X5R
805
C904
22UF
20%
6.3V
2 X5R
805
22UF
C919
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
C922
22UF
C921
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
C916
22UF
20%
6.3V
2 X5R
805
C917
22UF
20%
6.3V
2 X5R
805
C930
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
C900
22UF
20%
6.3V
2 X5R
805
C902
22UF
20%
6.3V
2 X5R
805
C909
22UF
C931
22UF
20%
6.3V
2 X5R
805
C907
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
C939
22UF
20%
6.3V
2 X5R
805
C929
22UF
20%
6.3V
2 X5R
805
C920
22UF
20%
6.3V
2 X5R
805
NOSTUFF
1
C914
22UF
20%
6.3V
2 X5R
805
NOSTUFF
C915
22UF
NOSTUFF
C906
22UF
20%
6.3V
2 X5R
805
C905
22UF
20%
6.3V
2 X5R
805
NOSTUFF
1
C932
22UF
20%
6.3V
2 X5R
805
NOSTUFF
1
C928
22UF
20%
6.3V
2 X5R
805
NOSTUFF
C925
NOSTUFF
C903
22UF
20%
6.3V
2 X5R
805
20%
6.3V
2 X5R
805
CRITICAL
C941
470UF
20%
2 2.5V
TANT
D2T
C942
470UF
20%
2 2.5V
TANT
D2T
CRITICAL
1
C943
470UF
20%
3 2 2.5V
TANT
D2T
CRITICAL
1
CRITICAL
C944
470UF
20%
3 2 2.5V
TANT
D2T
CRITICAL
C945
470UF
20%
2 2.5V
TANT
D2T
C946
470UF
20%
2 2.5V
TANT
D2T
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
110
NOTE:
IF CPU T DIODE TO BE READ IN OFF STATE,
THEN THIS SHOULD BE S5
PP3V3_S0
6 11 26 41 59 61 76 88
C1001
0.1UF
2
LAYOUT NOTE:
10%
16V
X5R
402
R1000
10K
5%
1/16W
MF-LF
402
R1001
10K
5%
1/16W
MF-LF
402
NOSTUFF
R1005
VDD
CPU_TSENS_INT
ALERT*/
CRITICAL THM2*
R1002
OUT
CPU_THERMD_P
499
10
NOSTUFF
1%
1/16W
MF-LF
402
R1017
7
CPU_THERMD_N
499
1
C1000
D+
D-
U1000
MSOP
20%
50V
CERM
402
THM*
THRM_ALERT_L
SCLK
SDATA
58 23
PM_THRM_L
IO
5%
1/16W
MF-LF
402
THRM_THM
ADT7461
0.001UF
CPU_TSENS_INT
IN
10
THERM_DX_P
THERM_DX_N
=SMB_THRM_CLK
=SMB_THRM_DATA
59
59
IO
IO
GND
5
2
1%
1/16W
MF-LF
402
C
LAYOUT NOTE:
PLACE R1002 AND R1018 SUCH THAT THEY SHARE ONE PAD
PLACE R1017 AND R1019 SUCH THAT THEY SHARE ONE PAD
CPU_TSENS_EXT
CRITICAL
CPU_TSENS_EXT
R1018
J1000
SM-2MT-BLK-LF
3
1
2
5%
1/16W
MF-LF
402
CPU_THERMD_EXT_P
CPU_THERMD_EXT_N
THERM_DX_P 10
THERM_DX_N 10
CPU_TSENS_EXT
4
R1019
1
5%
1/16W
MF-LF
402
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
10
110
C1150
0.1UF
80 79 77 76 66 65 59 26 6 5
83 81
PP3V3_S5
PP12V_S5
5 6 11 77 78 79 80 81 83 88
10%
16V
X5R
402
C1151
0.1UF
1
2
10%
16V
X5R
402
C1152
0.1UF
1
2
10%
16V
X5R
402
C1153
0.1UF
88 77 11 6
PP2V5_S0
PP12V_S5
5 6 11 77 78 79 80 81 83 88
10%
16V
X5R
402
C1154
0.1UF
1
2
10%
16V
X5R
402
C1155
0.1UF
1
2
10%
16V
X5R
402
DEVELOPMENT
=PP1V05_S0_CPU
11 9 8 7 6 5
J1101
52435-2872
R1101 1R1103
54.9
1%
1/16W
MF-LF
2 402
C1156
0.1UF
88 76 61 59 41 26 10 6
PP3V3_S0
PP1V5_S0
F-RT-SM
29
54.9
1%
1/16W
MF-LF
2 402
OUT
OUT
10%
16V
X5R
402
OUT
R1102
7 5
IN
XDP_TDO
0.1UF
IN
FSB_CPURST_L
23 6
0.1UF
88 77 11 6
PP2V5_S0
PP1V5_S0
IN
34
IN
11 7
5
OUT
22.6 2
IO
XDP_TRST_L
XDP_TCK
NC
(TCK)
XDP_BPM_L<5>
6
7
CPU_XDP_CLK_N
CPU_XDP_CLK_P
XDP_TCK
C1199
56PF
5%
50V
402
(FBO)
7 11
NOSTUFF
1
2 CERM
11
ITPRESET_L
12
XDP_BPM_L<5>
13
14
IO
XDP_BPM_L<4>
IO
XDP_BPM_L<3>
IO
XDP_BPM_L<2>
IO
XDP_BPM_L<1>
IO
XDP_BPM_L<0>
15
16
17
18
6 11 80
R1104
240
19
20
5%
1/16W
MF-LF
2 402
21
22
C1159
0.1UF
23
NC
ITP_TDO
=PP3V3_S5_SB_PM
10%
16V
X5R
402
10
1%
1/16W
MF-LF
402
C1158
34
R1100
12 7 5
XDP_TDI
XDP_TMS
NC
22.6 2
1%
1/16W
MF-LF
402
2
10%
16V
X5R
402
7
5
11 7
5
C1157
1
7
5
OUT 5
6 11 80
OUT
26 7
XDP_DBRESET_L
10%
16V
X5R
402
24
25
11 9 8 7 6 5
=PP1V05_S0_CPU
26
(DBA#) INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.
(DEBUG PORT ACTIVE)
(DBR#) TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC
(DEBUG PORT RESET)
27
C1100
28
0.1UF
10%
2 16V
X5R
402
C1160
30
518S0320
0.1UF
88 83 81 80 79 78 77 11 6 5
PP12V_S5
PP1V5_S0
R1106
6 11 80
10%
16V
X5R
402
680
5%
1/16W
MF-LF
2 402
SYNC_DATE=5/23/05
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
11
110
7 5
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
7 5
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
1%
1/16W
MF-LF
402
R1221
24.9
1%
1/16W
MF-LF
402
IO
IO
IO
IO
IO
R1225
IO
221
IO
IO
IO
1%
1/16W
MF-LF
402
R1226
100
IO
IO
54.9
IO
7 5
IO
R1220 1
IO
19 12 6 5
IO
=PP1V05_S0_FSB_NB
IO
IO
1%
1/16W
MF-LF
402
IO
IO
IO
7 5
IO
IO
C1226
IO
0.1uF
IO
10%
16V
X5R
402
IO
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
NB_FSB_XRCOMP
NB_FSB_XSCOMP
NB_FSB_XSWING
19 12 6 5
E1
E2
E4
NB_FSB_YRCOMP
NB_FSB_YSCOMP
NB_FSB_YSWING
=PP1V05_S0_FSB_NB
R1230
54.9
1%
1/16W
MF-LF
402
R1235
221
34 5
IN
34 5
IN
Y1
U1
W1
FSB_CLK_NB_P
FSB_CLK_NB_N
AG2
AG1
HD0*
HD1*
HD2*
HD3*
HD4*
HD5*
HD6*
HD7*
HD8*
HD9*
HD10*
HD11*
HD12*
HD13*
HD14*
HD15*
HD16*
HD17*
HD18*
HD19*
HD20*
HD21*
HD22*
HD23*
HD24*
HD25*
HD26*
HD27*
HD28*
HD29*
HD30*
HD31*
HD32*
HD33*
HD34*
HD35*
HD36*
HD37*
HD38*
HD39*
HD40*
HD41*
HD42*
HD43*
HD44*
HD45*
HD46*
HD47*
HD48*
HD49*
HD50*
HD51*
HD52*
HD53*
HD54*
HD55*
HD56*
HD57*
HD58*
HD59*
HD60*
HD61*
HD62*
HD63*
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
HCLKIN
HCLKIN*
OMIT
U1200
945GM
NB
BGA
(1 OF 10)
HA3*
HA4*
HA5*
HA6*
HA7*
HA8*
HA9*
HA10*
HA11*
HA12*
HA13*
HA14*
HA15*
HA16*
HA17*
HA18*
HA19*
HA20*
HA21*
HA22*
HA23*
HA24*
HA25*
HA26*
HA27*
HA28*
HA29*
HA30*
HA31*
H9
C9
E11
G11
7 5
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
7 5
C12
A14
C14
D14
FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
HADS*
HADSTB0*
HADSTB1*
HAVREF
HBNR*
HBPRI*
HBREQ0*
HCPURST*
HDBSY*
HDEFER*
HDPWR*
HDRDY*
HDVREF
E8
B9
7 5
C13
7 5
HDINV0*
HDINV1*
HDINV2*
HDINV3*
J7
7 5
W8
7 5
U3
7 5
AB10
7 5
HDSTBN0*
HDSTBN1*
HDSTBN2*
HDSTBN3*
K4
7 5
T7
7 5
Y5
7 5
AC4
7 5
HDSTBP0*
HDSTBP1*
HDSTBP2*
HDTSBP3*
K3
7 5
T6
7 5
AA5
7 5
AC5
7 5
HHIT*
HHITM*
HLOCK*
D3
7 5
D4
7 5
B3
7 5
HREQ0*
HREQ1*
HREQ2*
HREQ3*
HREQ4*
D8
7 5
G8
7 5
B8
7 5
F8
7 5
A8
7 5
HRS0*
HRS1*
HRS2*
B4
E6
D6
HSLPCPU*
HTRDY*
E3
E7
J13
C6
7
5
F6
C7
7
5
B7
A7
C3
7
5
J9
7
7
5
H8
FSB_ADS_L
FSB_ADSTB_L<0>
FSB_ADSTB_L<1>
NB_FSB_VREF
FSB_BNR_L
FSB_BPRI_L
FSB_BREQ0_L
11 7 5 FSB_CPURST_L
FSB_DBSY_L
FSB_DEFER_L
FSB_DPWR_L
FSB_DRDY_L
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
=PP1V05_S0_FSB_NB
IO
5 6 12 19
IO
1
HOST
R1210
100
IO
IO
2
1%
1/16W
MF-LF
402
IO
IO
1
OUT
IO
OUT
IO
C1211
10%
16V
X5R
402
R1211
200
0.1uF
2
2
1%
1/16W
MF-LF
402
OUT
IO
IO
K13
FSB_DINV_L<0>
FSB_DINV_L<1>
FSB_DINV_L<2>
FSB_DINV_L<3>
FSB_DSTBN_L<0>
FSB_DSTBN_L<1>
FSB_DSTBN_L<2>
FSB_DSTBN_L<3>
FSB_DSTBP_L<0>
FSB_DSTBP_L<1>
FSB_DSTBP_L<2>
FSB_DSTBP_L<3>
FSB_HIT_L
FSB_HITM_L
FSB_LOCK_L
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
FSB_RS_L<0>
FSB_RS_L<1>
FSB_RS_L<2>
FSB_SLPCPU_L
FSB_TRDY_L
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
1%
1/16W
MF-LF
402
NB CPU Interface
SYNC_MASTER=(MASTER)
R1231
24.9
1%
1/16W
MF-LF
402
R1236
100
1%
1/16W
MF-LF
402
SYNC_DATE=(MASTER)
C1236
0.1uF
2
10%
16V
X5R
402
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
12
110
=PP1V5_S0_NB_PCIE
1
U1200
19
OUT
OUT
OUT
19
IO
19
IO
19
19
19
IO
OUT
IN
19 IN
19
19
19
19
19
19
OUT
OUT
OUT
OUT
OUT
19
OUT
19
OUT
19
OUT
19
OUT
19
OUT
19
19
19
OUT
19
19
OUT
OUT
OUT
OUT
OUT
19
19
19
19
19
19
OUT
OUT
OUT
OUT
OUT
OUT
OUT
LVDS_BKLTCTL
LVDS_BKLTEN
LVDS_CLKCTLA
LVDS_CLKCTLB
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_IBG
TP_LVDS_VBG
LVDS_VDDEN
LVDS_VREFH
LVDS_VREFL
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P
EXP_A_COMPI
D40
BGA
EXP_A_COMPO
D38
EXP_A_RXN0
EXP_A_RXN1
F34
84
L_CLKCTLB
G38
84
L_DDC_CLK
L_DDC_DATA
EXP_A_RXN2
H34
84
J38
84
L_IBG
EXP_A_RXN3
EXP_A_RXN4
L34
84
EXP_A_RXN5
EXP_A_RXN6
M38
84
N34
84
EXP_A_RXN7
P38
84
EXP_A_RXN8
EXP_A_RXN9
R34
84
T38
84
L_BKLTCTL
J30
H30
L_BKLTEN
L_CLKCTLA
H29
G26
G25
B38
C35
F32
C33
C32
L_VREFH
L_VREFL
A32
LA_CLK
EXP_A_RXN10
V34
84
E27
LB_CLK*
LB_CLK
EXP_A_RXN11
EXP_A_RXN12
W38
84
Y34
84
EXP_A_RXN13
AA38
84
EXP_A_RXN14
EXP_A_RXN15
AB34
84
AC38
84
EXP_A_RXP0
D34
84
EXP_A_RXP1
EXP_A_RXP2
F38
84
G34
84
EXP_A_RXP3
H38
84
EXP_A_RXP4
EXP_A_RXP5
J34
84
L38
84
EXP_A_RXP6
M34
84
EXP_A_RXP7
EXP_A_RXP8
N38
84
P34
84
EXP_A_RXP9
R38
84
EXP_A_RXP10
EXP_A_RXP11
T34
84
V38
84
EXP_A_RXP12
EXP_A_RXP13
W34
84
Y38
84
EXP_A_RXP14
AA34
84
EXP_A_RXP15
AB38
84
EXP_A_TXN0
EXP_A_TXN1
F36
84
G40
84
EXP_A_TXN2
H36
84
EXP_A_TXN3
EXP_A_TXN4
J40
84
L36
84
EXP_A_TXN5
EXP_A_TXN6
M40
84
N36
84
EXP_A_TXN7
P40
84
EXP_A_TXN8
EXP_A_TXN9
R36
84
T40
84
EXP_A_TXN10
V36
84
EXP_A_TXN11
EXP_A_TXN12
W40
84
C25
CRT_DDC_CLK
CRT_DDC_DATA
Y36
84
G23
HSYNC
EXP_A_TXN13
AA40
84
J22
CRT_IREF
CRT_VSYNC
EXP_A_TXN14
EXP_A_TXN15
AB36
84
AC40
84
EXP_A_TXP0
D36
84
EXP_A_TXP1
EXP_A_TXP2
F40
84
G36
84
EXP_A_TXP3
H40
84
EXP_A_TXP4
EXP_A_TXP5
J36
84
L40
84
EXP_A_TXP6
M36
84
EXP_A_TXP7
EXP_A_TXP8
N40
84
P36
84
EXP_A_TXP9
R40
84
EXP_A_TXP10
EXP_A_TXP11
T36
84
V40
84
EXP_A_TXP12
EXP_A_TXP13
W36
84
Y40
84
EXP_A_TXP14
AA36
84
EXP_A_TXP15
AB40
84
LA_DATA0*
B35
LA_DATA1*
A37
LA_DATA2*
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
B37
LA_DATA0
B34
LA_DATA1
A36
LA_DATA2
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
G30
D30
LB_DATA0*
LB_DATA1*
F29
LB_DATA2*
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
F30
D29
F28
LB_DATA0
LB_DATA1
LB_DATA2
C18
TV_DACA_OUT
TV_DACB_OUT
A19
TV_DACC_OUT
A16
J20
TV_IREF
B16
B18
TV_IRTNA
TV_IRTNB
B19
TV_IRTNC
TV-Out Disable
19
19
19
19
CRT Disable
19
OUT
OUT
OUT
OUT
OUT
OUT
19
IO
19
IO
19
19
19
OUT
OUT
OUT
CRT_BLUE
CRT_BLUE_L
CRT_GREEN
CRT_GREEN_L
CRT_RED
CRT_RED_L
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC_R
CRT_IREF
CRT_VSYNC_R
E23
D23
C22
B22
A21
B21
C26
H23
CRT_BLUE
CRT_BLUE*
CRT_GREEN
CRT_GREEN*
CRT_RED
CRT_RED*
VGA
19
1%
1/16W
MF-LF
402
LA_CLK*
E26
R1310
PEG_COMP
A33
C37
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
(3 OF 10)
L_VBG
L_VDDEN
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
945GM
NB
D32
PCI-EXPRESS GRAPHICS
19
OUT
LVDS
19
TV
19
6 19
24.9
OMIT
LVDS Disable
PEG_D2R_N<0>
PEG_D2R_N<1>
PEG_D2R_N<2>
PEG_D2R_N<3>
PEG_D2R_N<4>
PEG_D2R_N<5>
PEG_D2R_N<6>
PEG_D2R_N<7>
PEG_D2R_N<8>
PEG_D2R_N<9>
PEG_D2R_N<10>
PEG_D2R_N<11>
PEG_D2R_N<12>
PEG_D2R_N<13>
PEG_D2R_N<14>
PEG_D2R_N<15>
IN
IN
IN
SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
PEG_D2R_P<0>
PEG_D2R_P<1>
PEG_D2R_P<2>
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P<5>
PEG_D2R_P<6>
PEG_D2R_P<7>
PEG_D2R_P<8>
PEG_D2R_P<9>
PEG_D2R_P<10>
PEG_D2R_P<11>
PEG_D2R_P<12>
PEG_D2R_P<13>
PEG_D2R_P<14>
PEG_D2R_P<15>
IN
IN
IN
SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
PEG_R2D_C_N<0>
PEG_R2D_C_N<1>
PEG_R2D_C_N<2>
PEG_R2D_C_N<3>
PEG_R2D_C_N<4>
PEG_R2D_C_N<5>
PEG_R2D_C_N<6>
PEG_R2D_C_N<7>
PEG_R2D_C_N<8>
PEG_R2D_C_N<9>
PEG_R2D_C_N<10>
PEG_R2D_C_N<11>
PEG_R2D_C_N<12>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_N<15>
PEG_R2D_C_P<0>
PEG_R2D_C_P<1>
PEG_R2D_C_P<2>
PEG_R2D_C_P<3>
PEG_R2D_C_P<4>
PEG_R2D_C_P<5>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_P<8>
PEG_R2D_C_P<9>
PEG_R2D_C_P<10>
PEG_R2D_C_P<11>
PEG_R2D_C_P<12>
PEG_R2D_C_P<13>
PEG_R2D_C_P<14>
PEG_R2D_C_P<15>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_CLKN
SDVOC_RED#
SDVOC_GREEN#
SDVOC_BLUE#
SDVOC_CLKN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_CLKP
SDVOC_RED
SDVOC_GREEN
SDVOC_BLUE
SDVOC_CLKP
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
13
110
R1440 1
10K
NC
NC
NC
NC
NC
NC
IN
34
IN
IN
IN
IN
IN
IN
20
IN
IN
20
IN
IN
IN
IN
IN
IN
=PP3V3_S0_NB
IN
20
IN
IN
20
10K
20
5%
1/16W
MF-LF
402 2
75 23
IN
IN
20
23
IN
SM_CK0
AY35
28
R32
RSVD2
RSVD3
BGA
28
(2 OF 10)
SM_CK1
SM_CK2
AR1
F3
AW7
29
F7
RSVD4
SM_CK3
AW40
29
AG11
RSVD5
RSVD6
SM_CK0*
SM_CK1*
AW35
28
AT1
28
SM_CK2*
AY7
29
SM_CK3*
AY40
29
SM_CKE0
SM_CKE1
AU20
30 28
AT20
30 28
SM_CKE2
BA29
30 29
SM_CKE3
AY29
30 29
SM_CS0*
SM_CS1*
AW13
30 28
AW12
30 28
SM_CS2*
SM_CS3*
AY21
30 29
AW21
30 29
SMOCDCOMP0
AL20
SMOCDCOMP1
AF10
AF11
H7
J19
IN
IN
IN
OUT
NB_RST_IN_L
RSVD9
J29
A41
RSVD10
RSVD11
A35
RSVD12
A34
RSVD13
RSVD14
D27
RSVD15
NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>
NB_CFG<3>
NB_CFG<4>
NB_CFG<5>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
NB_CFG<9>
NB_CFG<10>
NB_CFG<11>
NB_CFG<12>
NB_CFG<13>
NB_CFG<14>
NB_CFG<15>
NB_CFG<16>
NB_CFG<17>
NB_CFG<18>
NB_CFG<19>
NB_CFG<20>
K16
K18
CFG0
CFG1
J18
CFG2
F18
E15
CFG3
CFG4
F15
CFG5
E18
D19
CFG6
CFG7
D16
CFG8
G16
CFG9
CFG10
J26
CFG20
PM_BMBUSY_L
G28
PM_BM_BUSY*
PM_EXTTS0*
E16
G15
CFG11
CFG12
K15
CFG13
C15
CFG14
CFG15
D15
H16
G18
CFG16
H15
CFG17
CFG18
J25
K27
F25
H26
OUT
100
75 26 5
IN
5%
1/16W
MF-LF
402
19
19
IO
IO
22
OUT
33
OUT
PM_THRMTRIP_L
VR_PWRGOOD_DELAY
NB_RST_IN_L_R
G6
CFG19
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPD
IPD
IPD
PM_EXTTS1*
PW_THRMTRIP*
SM_ODT0
BA13
SM_ODT1
SM_ODT2
BA12
30 28
AY20
30 29
SM_ODT3
AU21
30 29
AV9
SMRCOMP
AT9
SMVREF0
AK1
19 5
SMVREF1
AK41
19 5
G_CLKIN*
AF33
34 5
G_CLKIN
D_REFCLKIN*
AG33
34 5
A27
19
D_REFCLKIN
A26
19
D_REFSSCLKIN*
D_REFSSCLKIN
C40
19
D41
19
DMI_RXN0
AE35
22 5
DMI_RXN1
DMI_RXN2
AF39
22
AG35
22
DMI_RXN3
AH39
22
AC35
22 5
AH34
RSTIN*
DMI_RXP1
DMI_RXP2
AE39
22
AF35
22
DMI_RXP3
AG39
22
DMI_TXN0
AE37
22 5
H27
K28
ICH_SYNC*
H32
CLK_REQ*
DMI_TXN1
DMI_TXN2
AF41
22
AG37
22
NC0
NC1
DMI_TXN3
AH41
22
DMI_TXP0
DMI_TXP1
AC37
22 5
BA41
NC2
NC3
AE41
22
BA40
NC4
DMI_TXP2
AF37
22
BA39
DMI_TXP3
22
BA3
NC5
NC6
AG41
BA2
NC7
BA1
NC8
NC9
D1
C41
C1
B41
B2
NC10
AY41
NC11
NC12
AY1
AW1
NC13
NC14
A40
NC15
A4
A39
NC16
NC17
A3
NC18
AW41
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>
MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MEM_ODT<0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3>
1
OUT
R1410
OUT
80.6
OUT
OUT
IN
6 16 19
1%
1/16W
MF-LF
402
MEM_RCOMP_L
MEM_RCOMP
SMRCOMP*
DMI_RXP0
SDVO_CTRLCLK
SDVO_CTRLDATA
MEM_CLK_N<0>
MEM_CLK_N<1>
MEM_CLK_N<2>
MEM_CLK_N<3>
OUT
=PP1V8_S3_MEM_NB
30 28
PWROK
H28
MEM_CLK_P<0>
MEM_CLK_P<1>
MEM_CLK_P<2>
MEM_CLK_P<3>
NC
NC
AH33
SDVO_CTRLCLK
SDVO_CTRLDATA
NB_SB_SYNC_L
CLK_NB_OE_L
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
RSVD7
RSVD8
K30
D28
PM_EXTTS_L<0>
PM_DPRSLPVR
R1430
6
945GM
NB
NC
20
R1420 1
RSVD1
TP_NB_XOR_LVDS_A35
TP_NB_XOR_LVDS_A34
TP_NB_XOR_LVDS_D28
TP_NB_XOR_LVDS_D27
34
T32
TP_NB_XOR_FSB2_H7
TP_NB_TESTIN_L
NB_TV_DCONSEL0
NB_TV_DCONSEL1
34
U1200
RSVD
(D_PLLMON1#)
(D_PLLMON1)
(H_EDRDY#)
(H_PCREQ#)
(H_PLLMON1#)
(H_PLLMON1)
(H_PROCHOT#)
(TESTIN#)
(TV_DCONSEL0)
(TV_DCONSEL1)
(VSS_MCHDETECT)
(LA_DATAN3)
(LA_DATAP3)
(LB_DATAN3)
(LB_DATAP3)
OMIT
5%
1/16W
MF-LF
402
DDR MUXING
CFG
CLK
R1441
PM
5%
1/16W
MF-LF
402
MISC
DMI
10K
59 58
=PP3V3_S0_NB
20 19 14 6
20 19 14 6
MEM_VREF_NB_0
MEM_VREF_NB_1
NB_CLK100M_GCLKIN_N
NB_CLK100M_GCLKIN_P
NB_CLK_DREFCLKIN_N
NB_CLK_DREFCLKIN_P
NB_CLK_DREFSSCLKIN_N
NB_CLK_DREFSSCLKIN_P
DMI_S2N_N<0>
DMI_S2N_N<1>
DMI_S2N_N<2>
DMI_S2N_N<3>
DMI_S2N_P<0>
DMI_S2N_P<1>
DMI_S2N_P<2>
DMI_S2N_P<3>
DMI_N2S_N<0>
DMI_N2S_N<1>
DMI_N2S_N<2>
DMI_N2S_N<3>
DMI_N2S_P<0>
DMI_N2S_P<1>
DMI_N2S_P<2>
DMI_N2S_P<3>
IN
R1411
80.6
1%
1/16W
MF-LF
2 402
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
NC
NB Misc Interfaces
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
14
110
OMIT
IO
28
IO
28
IO
28
IO
28
IO
28
28 5
28
28
28
28
IO
IO
IO
IO
IO
28
IO
28 5
IO
28
IO
28
28
28
28
28
28
28
28
IO
IO
IO
IO
IO
IO
IO
IO
IO
28 5
IO
28
IO
28
IO
28
28
28
IO
IO
IO
28
IO
28
IO
28
28
28
28
28
28
28 5
28
28
28
28
IO
28
28 5
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
28
IO
28
IO
28
IO
28 5
IO
28
IO
28
IO
28
IO
28
IO
28
IO
28
IO
28 5
IO
28
IO
28
IO
28
IO
28
IO
28 5
IO
28
IO
28
IO
28
28
IO
IO
AJ35
SA_DQ0
AJ34
SA_DQ1
SA_DQ2
AM31
AJ36
SA_DQ3
SA_DQ4
AK35
SA_DQ5
AM33
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AN22
28
SA_DQ8
AM14
28
SA_DQ9
SA_DQ10
SA_DM5
AL9
28
AR3
28
SA_DQ11
SA_DM6
SA_DM7
AH4
28
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQS0
SA_DQS1
AK33
28 5
AT33
28 5
SA_DQS2
SA_DQS3
AN28
28 5
AM22
28 5
SA_DQS4
AN12
28 5
SA_DQS5
SA_DQS6
AN8
28 5
AP3
28 5
SA_DQS7
AG5
28 5
AK32
28 5
AU33
28 5
SA_DQS0*
SA_DQS1*
SA_DQS2*
AN27
28 5
SA_DQS3*
SA_DQS4*
AM21
28 5
AM12
28 5
SA_DQS5*
SA_DQS6*
AL8
28 5
AN3
28 5
SA_DQS7*
AH5
28 5
SA_DQ36
SA_DQ37
SA_MA0
AY16
30 28
SA_MA1
AU14
30 28
SA_MA2
SA_MA3
AW16
30 28
BA16
30 28
SA_MA4
BA17
30 28
SA_MA5
SA_MA6
AU16
30 28
AV17
30 28
SA_MA7
SA_MA8
AU17
30 28
AW17
30 28
SA_DQ39
SA_DQ40
SA_MA9
AT16
30 28
AU13
SA_DQ41
SA_MA10
SA_MA11
30 28
AT17
30 28
SA_MA12
AV20
30 28
SA_MA13
AV12
30 28
SA_DQ38
SA_DQ42
SA_DQ43
AP9
SA_DQ44
AN9
SA_DQ45
SA_DQ46
AT5
30 28
AY13
SA_DM3
SA_DM4
SA_DQ30
AT13
SA_CAS*
28
SA_DQ19
MEM_A_BS<0>
MEM_A_BS<1>
MEM_A_BS<2>
SA_RAS*
AW14
SA_RCVENIN*
SA_RCVENOUT*
AK23
SA_WE*
AY14
30 28
OUT
29
IO
OUT
29
IO
OUT
(4 OF 10)
AL26
AP20
AP12
30 28
SA_DM2
AP24
AP13
30 28
BA20
SA_DQ6
SA_DQ7
SA_DQ28
SA_DQ29
AR14
AV14
28
SA_DQ27
AR12
SA_BS1
SA_BS2
28
AN20
AT21
30 28
AM35
AP21
AL23
AU12
AJ33
SA_DQ25
SA_DQ26
AL22
BGA
SA_BS0
SA_DM0
SA_DM1
SA_DQ17
SA_DQ18
MEM_A_CAS_L
MEM_A_DM<0>
MEM_A_DM<1>
MEM_A_DM<2>
MEM_A_DM<3>
MEM_A_DM<4>
MEM_A_DM<5>
MEM_A_DM<6>
MEM_A_DM<7>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_A_DQS_P<4>
MEM_A_DQS_P<5>
MEM_A_DQS_P<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_N<4>
MEM_A_DQS_N<5>
MEM_A_DQS_N<6>
MEM_A_DQS_N<7>
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
MEM_A_A<0>
MEM_A_A<1>
MEM_A_A<2>
MEM_A_A<3>
MEM_A_A<4>
MEM_A_A<5>
MEM_A_A<6>
MEM_A_A<7>
MEM_A_A<8>
MEM_A_A<9>
MEM_A_A<10>
MEM_A_A<11>
MEM_A_A<12>
MEM_A_A<13>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MEM_A_RAS_L
OUT
NC
NC
29
IO
29
IO
29
IO
29
IO
29 5
29
29 5
29
29
29
IO
IO
IO
IO
IO
IO
29
IO
29
IO
29
IO
29
IO
29
29
29
29
29
29
29
29 5
29
IO
IO
IO
IO
IO
IO
IO
IO
IO
29 5
IO
29
IO
29
IO
29
IO
29
IO
29
IO
29
IO
29
IO
29
29
29
29
29
29 5
29
29
29
29
29
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
29 5
IO
29
IO
29
IO
29
IO
29 5
IO
29
IO
AY2
SA_DQ47
SA_DQ48
AW2
SA_DQ49
AP1
29
IO
AN2
SA_DQ50
SA_DQ51
29
IO
AV2
SA_DQ52
29
IO
AT3
29
IO
AN1
SA_DQ53
SA_DQ54
29
IO
AL2
SA_DQ55
29
IO
AG7
SA_DQ56
SA_DQ57
29
IO
29
IO
SA_DQ58
SA_DQ59
29
IO
AF6
29
IO
AG9
SA_DQ60
29
IO
AH6
SA_DQ61
SA_DQ62
29
IO
AF4
29 5
AF8
SA_DQ63
29
AL5
AF9
AG4
U1200
945GM
NB
AK24
30 28
MEM_A_WE_L
OUT
IO
IO
MEM_B_DQ<0>
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<51>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>
AK39
SB_DQ0
AJ37
SB_DQ1
SB_DQ2
AP39
SB_BS0
AT24
30 29
SB_BS1
SB_BS2
AV23
30 29
AY28
30 29
SB_CAS*
AR24
30 29
SB_DM0
SB_DM1
AK36
29
AR38
29
SB_DQ6
SB_DQ7
SB_DM2
AT36
29
BA31
29
SB_DQ8
SB_DM3
SB_DM4
AL17
29
SB_DQ9
SB_DQ10
SB_DM5
AH8
29
BA5
29
SB_DQ11
SB_DM6
SB_DM7
AN4
29
AJ38
SB_DQ3
SB_DQ4
AK38
SB_DQ5
AR41
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
AU29
SB_DQ27
AW31
SB_DQ28
SB_DQ29
AV29
SB_DQ30
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
SB_DQS0
SB_DQS1
AM39
29 5
AT39
29 5
SB_DQS2
SB_DQS3
AU35
29 5
AR29
29 5
SB_DQS4
AR16
29 5
SB_DQS5
SB_DQS6
AR10
29 5
AR7
29 5
SB_DQS7
AN5
29 5
SB_DQS0*
SB_DQS1*
AM40
29 5
AU39
29 5
SB_DQS2*
AT35
29 5
SB_DQS3*
SB_DQS4*
AP29
29 5
AP16
29 5
SB_DQS5*
SB_DQS6*
AT10
29 5
AT7
29 5
SB_DQS7*
AP5
29 5
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
SB_MA1
AW24
30 29
SB_MA2
SB_MA3
AY24
30 29
AR28
30 29
SB_MA4
AT27
30 29
SB_MA5
SB_MA6
AT28
30 29
AU27
30 29
SB_MA7
SB_MA8
AV28
30 29
AV27
30 29
SB_DQ39
SB_DQ40
SB_MA9
AW27
30 29
AV24
SB_DQ41
SB_MA10
SB_MA11
30 29
BA27
30 29
SB_MA12
AY27
30 29
SB_MA13
AR23
30 29
SB_RAS*
AU23
30 29
MEM_B_RAS_L
OUT
SB_RCVENIN*
SB_RCVENOUT*
AK16
SB_WE*
AR27
30 29
MEM_B_WE_L
OUT
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ42
SB_DQ43
BA10
SB_DQ47
SB_DQ48
AW10
SB_DQ49
BA4
AW4
SB_DQ50
SB_DQ51
AY10
SB_DQ52
AY9
AW5
SB_DQ53
SB_DQ54
AY5
SB_DQ55
AV4
SB_DQ56
SB_DQ57
AK3
SB_DQ58
SB_DQ59
AT4
SB_DQ60
AK5
AJ5
SB_DQ61
SB_DQ62
AJ3
SB_DQ63
AK18
IO
MEM_B_A<0>
MEM_B_A<1>
MEM_B_A<2>
MEM_B_A<3>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<10>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
SB_DQ45
SB_DQ46
AK4
OUT
MEM_B_CAS_L
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
30 29
AH11
AR5
OUT
AY23
SB_DQ44
AJ8
OUT
SB_MA0
AK13
AK10
MEM_B_BS<0>
MEM_B_BS<1>
MEM_B_BS<2>
(5 OF 10)
SB_DQ14
SB_DQ15
AT31
AU31
BGA
SB_DQ12
SB_DQ13
SB_DQ25
SB_DQ26
BA33
945GM
NB
28
MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<2>
MEM_A_DQ<3>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<6>
MEM_A_DQ<7>
MEM_A_DQ<8>
MEM_A_DQ<9>
MEM_A_DQ<10>
MEM_A_DQ<11>
MEM_A_DQ<12>
MEM_A_DQ<13>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<17>
MEM_A_DQ<18>
MEM_A_DQ<19>
MEM_A_DQ<20>
MEM_A_DQ<21>
MEM_A_DQ<22>
MEM_A_DQ<23>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<26>
MEM_A_DQ<27>
MEM_A_DQ<28>
MEM_A_DQ<29>
MEM_A_DQ<30>
MEM_A_DQ<31>
MEM_A_DQ<32>
MEM_A_DQ<33>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<36>
MEM_A_DQ<37>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<42>
MEM_A_DQ<43>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<46>
MEM_A_DQ<47>
MEM_A_DQ<48>
MEM_A_DQ<49>
MEM_A_DQ<50>
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>
IO
OMIT
U1200
28
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
NC
NC
NB DDR2 Interfaces
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
15
110
=PPVCORE_S0_NB
AD27
AC27
AB27
AA27
VCC_NCTF4
W27
V27
VCC_NCTF5
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
VCC_NCTF12
AB26
AA26
L16
N16
M16
VCC_109
VCC_110
M17
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
AU19
AT19
AP19
AK19
AJ18
AH17
AJ16
BA15
AY15
AV15
AU15
AR15
AJ14
AJ13
AK12
AJ12
AG12
AK11
AY8
AV8
AT8
AP8
BA6
AW6
AV6
AR6
AN6
AL6
AJ6
AV1
C1613
0.47UF
0.47UF
10%
6.3V
CERM-X5R
402
10%
6.3V
CERM-X5R
402
AJ1
VCC_SM59
VCC_SM60
AW19
AK6
VCC_SM58
AY19
10%
6.3V
CERM-X5R
402
AP6
VCC_SM56
VCC_SM57
AK20
=PP1V8_S3_MEM_NB
AT6
VCC_SM54
VCC_SM55
AJ22
AY6
VCC_SM53
AK22
AR8
VCC_SM51
VCC_SM52
AR22
AW8
VCC_SM50
AT22
BA8
VCC_SM48
VCC_SM49
AV22
AH12
VCC_SM47
AW22
AH13
VCC_SM45
VCC_SM46
BA22
AJ15
VCC_SM43
VCC_SM44
BA23
AT15
VCC_SM42
AH24
AW15
VCC_SM40
VCC_SM41
AH25
AH16
VCC_SM39
AJ25
AJ17
VCC_SM37
VCC_SM38
AJ26
AJ19
VCC_SM36
AR26
AR19
VCC_SM34
VCC_SM35
AU26
AV19
VCC_SM32
VCC_SM33
AW26
BA19
VCC_SM31
AY26
AK21
VCC_SM29
VCC_SM30
AH27
19 14 6
AP22
VCC_SM28
AJ27
AU22
VCC_SM26
VCC_SM27
AJ28
AY22
VCC_SM25
AH29
C1615
NB_VCCSM_LF2
NB_VCCSM_LF1
0.47UF
2
C1614
AJ23
VCC_SM23
VCC_SM24
AK29
AJ24
VCC_SM21
VCC_SM22
AM29
AH26
VCC_SM20
AM30
AT26
VCC_SM18
VCC_SM19
AP30
AV26
VCC_SM17
AR30
BA26
VCC_SM15
VCC_SM16
AU30
AH28
VCC_SM14
AV30
AJ29
VCC_SM12
VCC_SM13
AY30
AL29
VCC_SM10
VCC_SM11
AR34
AN30
VCC_SM9
AT34
AT30
VCC_SM7
VCC_SM8
AV34
AW30
VCC_SM6
AW34
BA30
VCC_SM4
VCC_SM5
AU34
VCC_SM3
BA34
AY34
VCC_108
P17
L18
N17
VCC_106
VCC_107
VCC_105
N18
L19
M18
VCC_103
VCC_104
VCC_102
N19
Y19
AA19
AB19
M19
VCC_100
VCC_101
VCC_98
VCC_99
VCC_97
M20
N20
L20
VCC_95
VCC_96
VCC_94
W20
Y20
P20
VCC_92
VCC_93
VCC_91
AC20
L21
M21
N21
AB20
VCC_89
VCC_90
VCC_87
VCC_88
VCC_86
AA21
AC21
W21
VCC_84
VCC_85
VCC_83
M22
N22
L22
VCC_81
VCC_82
VCC_80
W22
P22
VCC_78
VCC_79
AB22
AC22
L23
M23
N23
Y22
VCC_76
VCC_77
VCC_75
VCC_73
VCC_74
VCC_72
Y23
AA23
P23
VCC_70
VCC_71
VCC_69
M24
AB23
VCC_67
VCC_68
P24
L25
M25
N25
L26
N26
P26
L27
N24
VCC_65
VCC_66
VCC_64
VCC_62
VCC_63
VCC_61
VCC_59
VCC_60
VCC_58
N27
M27
VCC_56
VCC_57
L28
M28
P27
VCC_54
VCC_55
VCC_53
P28
R28
T28
U28
V28
N28
VCC_51
VCC_52
VCC_50
VCC_48
VCC_49
VCC_47
AA28
Y28
VCC_45
VCC_46
L29
M29
AB28
VCC_43
VCC_44
VCC_42
R29
U29
P29
VCC_40
VCC_41
VCC_39
W29
Y29
AA29
L30
V29
VCC_37
VCC_38
VCC_36
VCC_34
VCC_35
N30
P30
M30
VCC_32
VCC_33
VCC_31
T30
U30
R30
VCC_29
VCC_30
VCC_28
W30
Y30
AA30
M31
V30
VCC_26
VCC_27
VCC_25
VCC_23
VCC_24
P31
R31
N31
VCC_21
VCC_22
VCC_20
V31
W31
T31
VCC_18
VCC_19
VCC_17
J32
L32
AA31
VCC_15
VCC_16
VCC_14
M32
P32
V32
N32
VCC_12
VCC_13
VCC_11
VCC_10
Y32
W32
VCC_8
VCC_9
AA32
L33
J33
VCC_6
VCC_7
VCC_5
(6 OF 10)
P33
N33
VCC_3
VCC_4
W33
AU40
AM41
VCC_SM1
VCC_SM2
BGA
VCC_2
AA33
VCC_0
VCC_1
VCC_SM0
Layout Note:
Place near pin BA23
C1621
C1610
C1612
10UF
10UF
0.47UF
0.47UF
0.47UF
20%
6.3V
CERM
805-1
20%
6.3V
CERM
805-1
10%
6.3V
CERM-X5R
402
10%
6.3V
CERM-X5R
402
10%
6.3V
CERM-X5R
402
Layout Note:
Place in cavity
(Need to better define cavity)
VSS_NCTF7
AE20
VSS_NCTF8
VSS_NCTF9
AE19
VSS_NCTF10
AC17
VSS_NCTF11
VSS_NCTF12
Y17
AE18
U17
AG27
VCC_NCTF18
R26
VCCAUX_NCTF1
VCCAUX_NCTF2
AF27
T26
VCCAUX_NCTF3
AF26
AD25
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
AB25
VCCAUX_NCTF4
VCCAUX_NCTF5
AG25
AC25
VCC_NCTF22
VCC_NCTF23
VCCAUX_NCTF6
AG24
VCCAUX_NCTF7
VCCAUX_NCTF8
AF24
=PP1V5_S0_NB_VCCAUX
AF25
W25
VCC_NCTF26
U25
VCCAUX_NCTF9
VCCAUX_NCTF10
AF23
V25
VCCAUX_NCTF11
AF22
T25
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
AD24
VCCAUX_NCTF12
VCCAUX_NCTF13
AG21
R25
VCCAUX_NCTF14
AG20
AC24
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
AA24
VCCAUX_NCTF15
VCCAUX_NCTF16
AF20
AB24
VCC_NCTF33
VCC_NCTF34
VCCAUX_NCTF17
AF19
VCCAUX_NCTF18
VCCAUX_NCTF19
R19
AG23
AG22
AF21
V24
VCC_NCTF37
T24
VCCAUX_NCTF20
VCCAUX_NCTF21
AF18
U24
VCCAUX_NCTF22
AG17
R24
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
V23
VCCAUX_NCTF23
VCCAUX_NCTF24
AF17
AD23
VCCAUX_NCTF25
AD17
U23
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
R23
VCCAUX_NCTF26
VCCAUX_NCTF27
AB17
T23
VCC_NCTF44
VCC_NCTF45
VCCAUX_NCTF28
W17
VCCAUX_NCTF29
VCCAUX_NCTF30
V17
R17
AG18
R18
AE17
AA17
T17
T22
VCC_NCTF48
R22
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AF16
AD21
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
U21
VCCAUX_NCTF34
VCCAUX_NCTF35
AE16
V21
VCCAUX_NCTF36
AC16
T21
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
AD20
VCCAUX_NCTF37
VCCAUX_NCTF38
AB16
R21
VCC_NCTF55
VCC_NCTF56
VCCAUX_NCTF39
Y16
VCCAUX_NCTF40
VCCAUX_NCTF41
W16
U16
T20
VCC_NCTF57
VCC_NCTF58
AG16
AD16
AA16
V16
R20
VCC_NCTF59
AD19
VCCAUX_NCTF42
VCCAUX_NCTF43
VCC_NCTF60
VCC_NCTF61
VCCAUX_NCTF44
R16
V19
U19
VCC_NCTF62
T19
VCCAUX_NCTF45
VCCAUX_NCTF46
VCC_NCTF63
VCC_NCTF64
VCCAUX_NCTF47
AE15
AD18
VCC_NCTF65
AB18
VCCAUX_NCTF48
VCCAUX_NCTF49
AD15
AC18
VCC_NCTF66
VCC_NCTF67
VCCAUX_NCTF50
AB15
VCCAUX_NCTF51
VCCAUX_NCTF52
AA15
W15
Y18
W18
VCC_NCTF68
VCC_NCTF69
AF15
AC15
Y15
V18
VCC_NCTF70
U18
VCCAUX_NCTF53
VCCAUX_NCTF54
VCC_NCTF71
VCC_NCTF72
VCCAUX_NCTF55
U15
VCCAUX_NCTF56
VCCAUX_NCTF57
T15
T18
T16
AG15
AA18
AG19
VCC_NCTF35
VCC_NCTF36
VCC_NCTF46
VCC_NCTF47
6 17 19
AG26
VCC_NCTF24
VCC_NCTF25
U20
AE21
VCCAUX_NCTF0
V20
AE22
AE24
VCC_NCTF16
VCC_NCTF17
V22
Layout Note:
Place near pin BA15
AE23
VSS_NCTF5
VSS_NCTF6
VCC_NCTF15
AD22
C1611
VSS_NCTF4
U26
U22
C1620
AE25
AE26
V26
W24
NB_VCCSM_LF4
NB_VCCSM_LF5
(7 OF 10)
AE27
VSS_NCTF2
VSS_NCTF3
W26
Y24
AT41
945GM
NB
OMIT
AU41
U1200
VCC
BGA
VSS_NCTF0
VSS_NCTF1
Y26
Y25
1.05V or 1.5V
945GM
NB
VCC_NCTF13
VCC_NCTF14
AA25
6 16 19
U1200
VCC_NCTF2
VCC_NCTF3
Y27
R27
=PPVCORE_S0_NB
VCC_NCTF0
VCC_NCTF1
NCTF
19 16 6
V15
R15
NB Power 1
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
16
110
OMIT
19
=PP2V5_S0_NB_VCCSYNC
H22
VCCSYNC
19
=PP2V5_S0_NB_VCC_TXLVDS
C30
VCC_TXLVDS0
B30
VCC_TXLVDS1
VCC_TXLVDS2
A30
VTT0
AC14
945GM
NB
VTT1
VTT2
AB14
BGA
VTT3
VTT4
V14
VTT5
R14
VCC3G1
VCC3G2
VTT6
VTT7
P14
V41
VCC3G3
VTT8
M14
R41
VCC3G4
VCC3G5
VTT9
VTT10
L14
VTT11
AC13
VTT12
VTT13
AB13
VTT14
VTT15
Y13
N41
L41
19
PP1V5_S0_NB_VCCA_3GPLL
=PP2V5_S0_NB_VCCA_3GBG
GND_NB_VSSA_3GBG
19
PP2V5_S0_NB_VCCA_CRTDAC
19
19 6
AC33
G41
VCCA_3GPLL
VCCA_3GBG
AD13
AA13
VSSA_3GBG
F21
VCCA_CRTDAC0
VCCA_CRTDAC1
VTT16
V13
U13
W13
GND_NB_VSSA_CRTDAC
G21
VSSA_CRTDAC
VTT17
VTT18
PP1V5_S0_NB_VCCA_DPLLA
PP1V5_S0_NB_VCCA_DPLLB
PP1V5_S0_NB_VCCA_HPLL
B26
VCCA_DPLLA
VTT19
R13
C39
VCCA_DPLLB
VCCA_HPLL
VTT20
VTT21
N13
VCCA_LVDS
VTT22
L13
A38
B39
VSSA_LVDS
VTT23
VTT24
AB12
19
=PP2V5_S0_NB_VCCA_LVDS
GND_NB_VSSA_LVDS
19
PP1V5_S0_NB_VCCA_MPLL
AF2
VCCA_MPLL
Y12
PP3V3_S0_NB_VCCA_TVBG
GND_NB_VSSA_TVBG
H20
VTT25
VTT26
VCCA_TVBG
VSSA_TVBG
VTT27
V12
VCCA_TVDACC0
VTT28
VTT29
U12
PP3V3_S0_NB_VCCA_TVDACC
E20
F20
VCCA_TVDACC1
VTT30
R12
C20
VCCA_TVDACB0
VCCA_TVDACB1
VTT31
VTT32
P12
E19
VCCA_TVDACA0
VTT33
M12
F19
VCCA_TVDACA1
L12
AH1
VTT34
VTT35
VCCD_HMPLL0
VCCD_HMPLL1
VTT36
VTT37
P11
19
19
19
19
19
19
19
19
19
AF1
G20
PP3V3_S0_NB_VCCA_TVDACB
D20
19
19 6
PP3V3_S0_NB_VCCA_TVDACA
=PP1V5_S0_NB_VCCD_HMPLL
AH2
19
=PP1V5_S0_NB_VCCD_LVDS
19
19 6
19
19 16 6
=PP3V3_S0_NB_VCC_HV
PP1V5_S0_NB_VCCD_QTVDAC
=PP1V5_S0_NB_VCCAUX
W12
T12
N12
N11
M11
VCCD_LVDS1
VCCD_LVDS2
VTT39
VTT40
R10
VTT41
N10
M10
VCCD_TVDAC
R11
B28
P10
A23
VCC_HV0
VTT42
VTT43
B23
VCC_HV1
VTT44
N9
B25
VCC_HV2
M9
H19
VTT45
VTT46
VCCD_QTVDAC
P8
P9
R8
AK31
VCCAUX0
VTT47
VTT48
AF31
VCCAUX1
VTT49
M8
AE31
VCCAUX2
VCCAUX3
VTT50
VTT51
P7
AC31
AL30
VCCAUX4
VTT52
M7
AK30
VTT53
VTT54
R6
AJ30
VCCAUX5
VCCAUX6
AH30
VCCAUX7
VTT55
M6
AG30
VCCAUX8
VCCAUX9
VTT56
VTT57
A6
VCCAUX10
VCCAUX11
VTT58
VTT59
P5
C1713
N5
0.47UF
AC30
VCCAUX12
VTT60
M5
AG29
VTT61
VTT62
P4
AF29
VCCAUX13
VCCAUX14
10%
6.3V
CERM-X5R
402
AE29
VCCAUX15
VTT63
M4
AD29
VTT64
VTT65
R3
AC29
VCCAUX16
VCCAUX17
AG28
VCCAUX18
VTT66
N3
AF28
VCCAUX19
VCCAUX20
VTT67
VTT68
M3
VCCAUX21
VCCAUX22
VTT69
VTT70
P2
AJ21
AH21
VCCAUX23
VTT71
D2
AJ20
VCCAUX24
VCCAUX25
VTT72
VTT73
AB1
AH20
AH19
VCCAUX26
VTT74
P1
C1711
P19
VCCAUX27
VCCAUX28
VTT75
VTT76
N1
0.47UF
P16
M1
AH15
VCCAUX29
10%
6.3V
CERM-X5R
402
P15
VCCAUX30
VCCAUX31
AE30
AD30
AE28
AH22
AH14
AG14
AA12
VTT38
AF30
M13
VCCD_LVDS0
D21
PP1V5_S0_NB_VCCD_TVDAC
T13
A28
C28
AF14
VCCAUX32
VCCAUX33
AE14
VCCAUX34
Y14
AF13
VCCAUX35
VCCAUX36
AE13
VCCAUX37
AF12
AE12
VCCAUX38
VCCAUX39
AD12
VCCAUX40
6 19
N14
H41
E21
VCC3G6
T14
VCC3G0
AB41
Y41
W14
AJ41
POWER
PP1V5_S0_NB_VCC3G
=PP1V05_S0_NB_VTT
U1200
(8 OF 10)
19
N8
N7
P6
NB_VTTLF_CAP3
R5
1
N4
P3
R2
M2
NB_VTTLF_CAP2
NB_VTTLF_CAP1
R1
1
C1712
0.22UF
20%
6.3V
X5R
402
NB Power 2
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
17
110
OMIT
AC41
AA41
W41
VSS_3
P41
VSS_4
VSS_5
J41
NB
BGA
(9 OF 10)
AK34
VSS_98
VSS_99
AG34
VSS_100
AE34
VSS_101
VSS_102
AC34
VSS_8
VSS_105
AR33
VSS_106
VSS_107
AE33
AN40
VSS_9
VSS_10
AK40
VSS_11
VSS_108
Y33
VSS_109
VSS_110
V33
AH40
VSS_12
VSS_13
AG40
VSS_14
VSS_111
R33
AF40
VSS_15
VSS_16
VSS_112
VSS_113
M33
VSS_117
VSS_118
B33
AR39
VSS_20
VSS_21
AN39
VSS_22
VSS_119
AG32
VSS_120
VSS_121
AF32
AC39
VSS_23
VSS_24
AB39
VSS_25
VSS_122
AC32
VSS_26
VSS_27
VSS_123
VSS_124
AB32
VSS_28
VSS_29
VSS_125
VSS_126
B32
VSS_30
VSS_127
AV31
VSS_31
VSS_32
VSS_128
VSS_129
AN31
VSS_33
VSS_130
AG31
VSS_131
VSS_132
AB31
L39
VSS_34
VSS_35
J39
VSS_36
VSS_133
AB30
VSS_37
VSS_38
VSS_134
VSS_135
E30
VSS_136
VSS_137
AN29
D39
VSS_39
VSS_40
AT38
VSS_41
VSS_138
T29
AM38
VSS_42
VSS_43
VSS_139
VSS_140
N29
VSS_44
VSS_141
G29
VSS_142
VSS_143
E29
AE38
VSS_45
VSS_46
C38
VSS_47
VSS_144
B29
VSS_48
VSS_49
VSS_145
VSS_146
A29
VSS_50
VSS_51
VSS_147
VSS_148
AW28
Y39
W39
V39
T39
R39
P39
N39
M39
H39
G39
F39
AH38
AG38
AF38
AK37
AH37
AB37
AA37
VSS_158
VSS_159
AK27
VSS_161
VSS_162
F27
AY36
VSS_66
VSS_163
B27
AW36
VSS_67
VSS_68
VSS_164
VSS_165
AN26
VSS_69
VSS_166
K26
VSS_70
VSS_71
VSS_167
VSS_168
F26
VSS_72
VSS_73
VSS_169
VSS_170
AK25
H25
VSS_77
VSS_174
D25
AR35
VSS_78
VSS_79
VSS_175
VSS_176
A25
VSS_80
VSS_177
AU24
VSS_81
VSS_82
VSS_178
VSS_179
AL24
F35
D35
AN34
VSS_297
VSS_298
J21
VSS_206
VSS_299
C8
H21
VSS_207
VSS_208
VSS_300
VSS_301
BA7
VSS_209
VSS_210
VSS_302
VSS_303
AP7
AR20
AM20
VSS_211
VSS_304
AJ7
AA20
VSS_212
VSS_213
VSS_305
VSS_306
AH7
K20
B20
VSS_214
VSS_307
AC7
A20
VSS_215
VSS_216
VSS_308
VSS_309
R7
AN19
AC19
VSS_217
VSS_310
D7
W19
VSS_218
VSS_219
VSS_311
VSS_312
AG6
VSS_220
VSS_221
VSS_313
VSS_314
AB6
C19
AH18
VSS_222
VSS_315
U6
P18
VSS_223
VSS_224
VSS_316
VSS_317
N6
H18
D18
VSS_225
VSS_318
H6
A18
VSS_226
VSS_227
VSS_319
VSS_320
B6
AY17
AR17
VSS_228
VSS_321
AF5
AP17
VSS_229
VSS_230
VSS_322
VSS_323
AD5
VSS_324
VSS_325
AR4
AV16
VSS_231
VSS_232
AN16
VSS_233
VSS_326
AL4
AL16
VSS_234
VSS_235
VSS_327
VSS_328
AJ4
J16
F16
VSS_236
VSS_329
U4
C16
VSS_237
VSS_238
VSS_330
VSS_331
R4
AN15
AM15
VSS_239
VSS_332
F4
AK15
VSS_240
VSS_241
VSS_333
VSS_334
C4
VSS_335
VSS_336
AW3
L15
VSS_242
VSS_243
B15
VSS_244
VSS_337
AL3
R9
E9
AD8
K8
AV7
AL7
AF7
AD6
Y6
K6
AV5
AY4
AP4
Y4
J4
AY3
VSS_340
AF3
VSS_248
VSS_249
VSS_341
VSS_342
AD3
AD14
AA14
VSS_250
VSS_343
AA3
U14
VSS_251
VSS_252
VSS_344
VSS_345
G3
VSS_346
VSS_347
AR2
E14
VSS_253
VSS_254
AV13
VSS_255
VSS_348
AK2
AR13
VSS_349
VSS_350
AJ2
AN13
VSS_256
VSS_257
AM13
VSS_258
VSS_351
AB2
AL13
VSS_259
VSS_260
VSS_352
VSS_353
Y2
AG13
P13
VSS_261
VSS_354
T2
F13
VSS_262
VSS_263
VSS_355
VSS_356
N2
VSS_357
VSS_358
H2
AY12
VSS_264
VSS_265
AC12
VSS_266
VSS_359
C2
K12
VSS_360
AL1
H12
VSS_267
VSS_268
E12
VSS_269
VSS_270
VSS_271
Y11
VSS_272
AV3
AK14
AA11
G7
VSS_338
VSS_339
AD11
VSS_92
VSS_93
AH9
VSS_247
B13
BA9
VSS_245
VSS_246
D13
VSS_91
AC10
AT14
AW23
VSS_89
VSS_90
VSS
AJ10
BA14
BA24
VSS_88
(10 OF 10)
AH3
E25
AV35
G35
VSS_204
VSS_205
U8
K21
H14
VSS_172
VSS_173
H35
AA8
P21
P25
VSS_75
VSS_76
J35
VSS_296
K14
B36
L35
VSS_203
D26
K25
M35
Y21
M26
VSS_171
N35
VSS_294
VSS_295
A15
VSS_74
P35
VSS_201
VSS_202
AG8
AB21
C27
C36
VSS_86
VSS_87
A9
AL21
M15
VSS_64
VSS_65
R35
VSS_293
J27
F37
VSS_85
VSS_200
N15
G27
T35
AN21
AM27
VSS_160
V35
VSS_291
VSS_292
J28
VSS_63
VSS_83
VSS_84
VSS_198
VSS_199
G9
AR21
AD28
G37
W35
Y9
AK17
VSS_61
VSS_62
Y35
AB9
VSS_289
VSS_290
AU28
AP27
AA35
VSS_288
VSS_196
VSS_197
AM17
VSS_156
VSS_157
AB35
VSS_195
A22
BA28
VSS_59
VSS_60
AH35
VSS_286
VSS_287
D22
C29
E28
BA35
VSS_193
VSS_194
AR9
E22
K29
VSS_155
AC36
F22
G19
VSS_58
AE36
AW9
AB29
W28
AF36
VSS_285
K19
VSS_153
VSS_154
AG36
VSS_192
AT29
VSS_56
VSS_57
AH36
G22
Y31
AC28
AN36
VSS_283
VSS_284
AJ31
VSS_152
D37
VSS_190
VSS_191
U10
K22
C21
VSS_55
H37
W10
AA22
AW20
AM28
J37
VSS_282
AY31
VSS_150
VSS_151
L37
VSS_189
G32
VSS_53
VSS_54
M37
C23
AE32
W37
N37
VSS_280
VSS_281
AH32
AP28
P37
VSS_187
VSS_188
AG10
F23
AV21
VSS_149
R37
AL10
BA21
VSS_52
T37
AP10
VSS_278
VSS_279
F33
Y37
V37
VSS_277
VSS_185
VSS_186
H33
D33
AV10
VSS_184
W23
T33
VSS_116
AA39
B11
BGA
AC23
AB33
VSS_19
AJ39
D11
VSS_275
VSS_276
J23
G33
AV39
945GM
NB
VSS_274
VSS_182
VSS_183
K23
VSS_114
VSS_115
AW39
J11
VSS_181
AM23
AV33
VSS_17
VSS_18
AY39
VSS_273
AN23
U1200
C34
AV40
B40
VSS_180
AH23
F41
VSS
AT23
AF34
AW33
AE40
945GM
OMIT
VSS_97
VSS_103
VSS_104
AJ40
U1200
VSS_6
VSS_7
AP40
VSS_1
VSS_2
T41
M41
VSS_0
AG3
AC3
AT2
AP2
AD2
U2
J2
F2
NB Grounds
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
VSS_94
VSS_95
VSS_96
SIZE
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
18
110
LVDS DISABLE
TVOUT DISABLE
Power Interface
16 6
19
IN
=PP1V05_S0_FSB_NB
IN
=PPVCORE_S0_NB
IN
IN
=PP1V05_S0_NB
=PP1V05_S0_NB_VTT
6 17 19
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
CRT_GREEN
CRT_GREEN_L
CRT_BLUE
CRT_BLUE_L
CRT_IREF
=PP1V8_S3_MEM_NB
IN
CRT_RED
CRT_RED_L
6 16 19
IN
IN
PP2V5_S0_NB_VCCA_CRTDAC
5 6 12
=PP1V5_S0_NB
=PP1V5_S0_NB_PCIE
=PP1V5_S0_NB_PLL
=PP1V5_S0_NB_TVDAC
=PP1V5_S0_NB_VCCD_HMPLL
=PP1V5_S0_NB_VCCD_LVDS
=PP1V5_S0_NB_VCCAUX
IN
=PPVCORE_S0_NB
6 19
17
13
13
IO
13
IO
13
IO
13
IO
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P
13
13
IO
13
13
IO
13
13
IO
13
IO
13
IO
13
IO
13
IO
13
IO
13
IO
13
IO
13
IO
13
13
13
6 19
CRT_VSYNC_R 13
CRT_HSYNC_R 13
=PP2V5_S0_NB_VCCSYNC 17
GND_NB_VSSA_CRTDAC 17
6 19
6 17
17 19
6 16 17 19
13
IO
13
IN
13
IN
17 19
13
IN
6 17 19
17
IN
13
OUT
TP_CRT_DDC_CLK
TP_CRT_DDC_DATA
17 19
CRT_DDC_CLK
CRT_DDC_DATA
TRUE
TRUE
13
13
17 19
=PP3V3_S0_NB
=PP3V3_S0_NB_TVDAC
=PP3V3_S0_NB_VCC_HV
13
6 14 20
OUT
6 17 19
FERR-120-OHM-0.2A
1
PP1V5_S0_NB_VCCA_HPLL
TP_LVDS_A_DATA_N<0>
TP_LVDS_A_DATA_N<1>
TP_LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
TRUE
TRUE
TRUE
TP_LVDS_A_DATA_P<0>
TP_LVDS_A_DATA_P<1>
TP_LVDS_A_DATA_P<2>
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
TRUE
TRUE
TRUE
TP_LVDS_B_DATA_N<0>
TP_LVDS_B_DATA_N<1>
TP_LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
TRUE
TRUE
TRUE
TP_LVDS_B_DATA_P<0>
TP_LVDS_B_DATA_P<1>
TP_LVDS_B_DATA_P<2>
LVDS_BKLTEN
LVDS_VDDEN
LVDS_IBG
GND_NB_VSSA_LVDS
TRUE
TRUE
TRUE
TRUE
TP_LVDS_BKLTEN
TP_LVDS_VDDEN
TP_LVDS_IBG
TP_GND_NB_VSSA_LVDS
LVDS_VREFH
LVDS_VREFL
TRUE
TRUE
TP_LVDS_VREFH
TP_LVDS_VREFL
TRUE
TRUE
TRUE
TRUE
TRUE
TP_LVDS_BKLTCTL
TP_LVDS_CLKCTLA
TP_LVDS_CLKCTLB
TP_LVDS_DDC_CLK
TP_LVDS_DDC_DATA
C1934
22uF
TP_NB_VCCA_DPLLA
TP_NB_VCCA_DPLLB
C1935
PP1V5_S0_NB_VCCA_DPLLA
PP1V5_S0_NB_VCCA_DPLLB
TRUE
TRUE
19 17
=PP2V5_S0_NB_VCCA_LVDS
19 17
=PP1V5_S0_NB_VCCD_LVDS
19 17
=PP2V5_S0_NB_VCC_TXLVDS
20%
10V
CERM
402
NB_CLK_DREFCLKIN_N
NB_CLK_DREFCLKIN_P
NB_CLK_DREFSSCLKIN_P
NB_CLK_DREFSSCLKIN_N
L1936
FERR-120-OHM-0.2A
1
PP1V5_S0_NB_VCCA_MPLL
22uF
20%
6.3V
X5R
805
14
BI
13
IN
13
IN
13
IN
OUT
14
13
IN
OUT
14
13
IN
OUT
14
LVDS_BKLTCTL
LVDS_CLKCTLA
LVDS_CLKCTLB
LVDS_DDC_CLK
LVDS_DDC_DATA
17
C1937
0.1uF
TVOUT DISABLE
20%
10V
CERM
402
19 6
=PP1V5_S0_NB
PP3V3_S0_NB_VCCA_TVDACA
PP3V3_S0_NB_VCCA_TVDACB
PP3V3_S0_NB_VCCA_TVDACC
PP3V3_S0_NB_VCCA_TVBG
=PP1V05_S0_NB_VTT
13
C1965
C1966
2.2UF
0.22uF
20%
6.3V
CERM
603
10%
6.3V
CERM1
603
20%
6.3V
X5R
402
Layout Note:
Place in cavity
19 16 14 6
C1967
4.7uF
2
17
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=0.2 MM
2
0603
C1936
17
0.1uF
20%
6.3V
X5R
805
Layout Note:
These 4 0.1uF caps should
be within 5 mm of NB edge
17
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=0.2 MM
2
0603
19 17 6
TRUE
TRUE
TRUE
DISPLAY DISABLE
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
19
6 14 16 19
=PP2V5_S0_NB_VCCSYNC
=PP2V5_S0_NB_VCC_TXLVDS
=PP2V5_S0_NB_VCCA_3GBG
=PP2V5_S0_NB_VCCA_LVDS
=PP1V5_S0_NB_PLL
TP_LVDS_A_CLK_N
TP_LVDS_A_CLK_P
TP_LVDS_B_CLK_N
TP_LVDS_B_CLK_P
TRUE
TRUE
TRUE
TRUE
6 13
L1934
19 6
19 16 6
NOSTUFF
=PPVCORE_S0_NB
13
C1968
13
330UF
2
20%
6.3V
ELEC
CASE-C1
Layout Note:
Place on the edge
C1900
C1901
330UF
330UF
20%
6.3V
ELEC
CASE-C1
20%
6.3V
ELEC
CASE-C1
C1902
C1903
C1904
C1905
C1906
13
C1907
10UF
10UF
1UF
0.22uF
0.22uF
0.22uF
13
20%
6.3V
CERM
805-1
20%
6.3V
CERM
805-1
10%
6.3V
CERM
402
20%
6.3V
X5R
402
20%
6.3V
X5R
402
20%
6.3V
X5R
402
13
13
17
17
17
17
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
IN
IN
IN
IN
IN
IN
IN
=PP1V8_S3_MEM_NB
GND_NB_VSSA_TVBG
R1982
R1980
1K
1K
5%
1/16W
MF-LF
402
MEM_VREF_NB_1
5 14
R1983
1K
5%
1/16W
MF-LF
2 402
C1982
0.1UF
MEM_VREF_NB_0
5%
1/16W
MF-LF
402
5 14
R1981
1K
5%
1/16W
MF-LF
2 402
20%
16V
CERM
603
C1981
6
19
0.1UF
2
=PP1V5_S0_NB_TVDAC
PP1V5_S0_NB_VCCD_TVDAC
PP1V5_S0_NB_VCCD_QTVDAC
L1970
91NH
=PP1V5_S0_NB_3GPLL
1
PP1V5_S0_NB_VCC3G
Layout Note:
Place L and C
close to MCH
=PP3V3_S0_NB_VCC_HV
C1914
10UF
2
20%
6.3V
CERM
805-1
17
C1970
C1971
10UF
220UF
2
20%
2.5V
POLY
SMB2
C1972
10UF
20%
6.3V
CERM
805-1
20%
6.3V
CERM
805-1
Layout Note:
10uF caps should
be close to MCH
on opposite side.
14
IN
14
IN
SDVO_CTRLCLK
SDVO_CTRLDATA
C1915
20%
10V
CERM
402
NB (GM) Decoupling
Should be 1%
L1975
19 6
=PP1V5_S0_NB_3GPLL
19 17 16 6
=PP1V5_S0_NB_VCCAUX
C1916
2
0805
PP1V5_S0_NB_3GPLL_F
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=0.2 MM
C1918
0.1uF
0.1uF
20%
10V
CERM
402
20%
10V
CERM
402
R1975
1.0UH-220MA-0.12-OHM
1
=PP2V5_S0_NB_VCCA_3GBG
TP_SDVO_CTRLCLK
TP_SDVO_CTRLDATA
0.1uF
2
1uH, 20%
19 17 6
0.51
1%
1/16W
MF-LF
402
PP1V5_S0_NB_VCCA_3GPLL
C1975
10UF
SYNC_DATE=(MASTER)
17
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=0.2 MM
20%
6.3V
CERM
805-1
Layout Note:
3GPLL 10uF cap should
be placed in cavity
SYNC_MASTER=(MASTER)
C1976
0.1uF
20%
10V
CERM
402
GND_NB_VSSA_3GBG
17
SIZE
DRAWING NUMBER
SHT
NONE
REV.
051-7148
SCALE
17
Layout Note:
THESE 2 CAPS SHOULD BE
within 6.35 mm of NB edge
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=0.2 MM
2
1210
17
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
20%
16V
CERM
603
19 6
19 17 6
17
13
OF
19
110
Internal pull-ups
00
01
10
11
NB_CFG<13:12>
NB_CFG<3>
RESERVED
NB_CFG<4>
RESERVED
=
=
=
=
NB_CFG<14>
RESERVED
NB_CFG<15>
RESERVED
NB_CFG<5>
14
Internal pull-up
NBCFG_DMI_X2
1
NB_CFG<5>
High = DMIx4
DMI x2 Select
Low
R2075
2.2K
= DMIx2
2
5%
1/16W
MF-LF
402
14
Internal pull-up
NB_CFG<6>
RESERVED
FSB Dynamic
ODT
NBCFG_DYN_ODT_DISABLE
1
NB_CFG<16>
R2085
High = Enabled
2.2K
Low
5%
1/16W
MF-LF
402
= Disabled
2
NB_CFG<7>
14
Internal pull-up
NO STUFF
1
NB_CFG<7>
CPU Strap
Low
R2077
2.2K
= RESERVED
2
5%
1/16W
MF-LF
402
NB_CFG<17>
RESERVED
=PP3V3_S0_NB
6 14 19 20
NBCFG_VCC_1V5
1
NB_CFG<18>
NB_CFG<8>
RESERVED
VCC Select
Low
= 1.05V
2
5%
1/16W
MF-LF
402
NB_CFG<18>
14
R2058
2.2K
High = 1.5V
Internal pull-down
NB_CFG<9>
14
Internal pull-up
=PP3V3_S0_NB
NBCFG_PEG_REVERSE
1
NB_CFG<9>
High = Normal
2.2K
NB_CFG<19>
High = Reversed
PCIE Graphics
Lane Reversal
Low
5%
1/16W
MF-LF
402
DMI Lane
Reversal
Low
= Reversed
2
6 14 19 20
NBCFG_DMI_REVERSE
1
R2079
R2059
2.2K
= Normal
2
5%
1/16W
MF-LF
402
NB_CFG<19>
14
Internal pull-down
=PP3V3_S0_NB
945 External Design Spec says reserved
NB_CFG<10>
RESERVED
NB_CFG<20>
PCIe Backward
Interop. Mode
Low
14
= Only SDVO
or PCIe x1
6 14 19 20
NBCFG_SDVO_AND_PCIE
1
R2060
2.2K
5%
1/16W
MF-LF
402
NB_CFG<20>
Internal pull-down
SYNC_MASTER=(MASTER)
NB_CFG<11>
RESERVED
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
20
110
PP3V3_S5_SB_RTC
=PP3V3_S0_SB_GPIO
R2105
402 MF-LF
1/16W 1%
R2194
10K
U2100
IN
SB_RTC_RST_L
AA3
SB_SM_INTRUDER_L
26 IN
RTCRST*
Y5
INTRUDER*
SB_INTVRMEN W4 INTVRMEN
ICH7-M
SB
LAD0
LAD1
LAD2
LAD3
BGA
(1 OF 6)
LPC
26
OUT
AB1
RTCX1
AB2
RTCX2
RTC
26
SB_RTC_X1
SB_RTC_X2
LDRQ0*
LDRQ1*/GPIO23
W1
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT
W3 (INT PU)
EE_DIN
TP_SB_XOR_W1
TP_SB_XOR_Y1
TP_SB_XOR_Y2
TP_SB_XOR_W3
LFRAME*
A20GATE
A20M*
AA6
AB5
AC4
Y6
AC3
AA5
AB3
67 60 58
67 60 58
67 60 58
67 60 58
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
TP_SB_DRQ0_L
TP_SB_GPIO23
67
60 58
LPC_FRAME_L
AE22
AH28
IO
IO
IO
IO
NOSTUFF
OUT
SB_A20GATE
CPU_A20M_L
7 5
68
OUT
68
OUT
68
OUT
68
IN
ACZ_BITCLK
ACZ_SYNC
ACZ_RST_L
ACZ_SDATAIN<0>
R2195
R2198
1
1
R2197
TP_SB_XOR_U3
U3
TP_SB_XOR_U5
TP_SB_XOR_V4
TP_SB_XOR_T5
U5
LAN_RXD0
V4
LAN_RXD1 (WEAK
T5
LAN_RXD2
LAN_RSTSYNC
39
39
SB_ACZ_BITCLK
SB_ACZ_SYNC
U1
ACZ_BIT_CLK
R6
ACZ_SYNC
39
SB_ACZ_RST_L
R5
ACZ_RST*
T2
ACZ_SDIN0
T3 20K PD
ACZ_SDIN1
T1 20K PD
ACZ_SDIN2
TP_SB_ACZ_SDIN1
TP_SB_ACZ_SDIN2
TP1/DPRSTP*
TP2/DPSLP*
FERR*
INT PU)
GPIO49/CPUPWRGD
CPU
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
TP_SB_XOR_U7
TP_SB_XOR_V6
TP_SB_XOR_V7
CPUSPL*
IGNNE*
INIT3_3V*
INIT*
INTR
RCIN*
AC-97/
AZALIA
NOTE:
POR IS SMC WILL PUT LAN INTF
INTO RESET STATE TO SAVE PWR.
INTEL CONFIRMS OK TO LEAVE PINS AS NC
5%
1/16W
MF-LF
402
LAN_CLK
LAN
V3
NMI
SMI*
STPCLK*
20K PD
68
OUT
ACZ_SDATAOUT
R2196
39
SB_ACZ_SDATAOUT
T4
THRMTRIP*
ACZ_SDOUT
38
OUT
38
OUT
38 IN
38
38
38
34 5
34 5
IN
IN
OUT
OUT
SB_CLK100M_SATA_N
SB_CLK100M_SATA_P
38
IN
38
IN
38 5
OUT
38
OUT
38
IN
SATA_C_D2R_N
SATA_C_D2R_P
SATA_C_R2D_C_N
SATA_C_R2D_C_P
OUT
38
IN
38 5
IN
38
IN
SATA_RBIAS_N
SATA_RBIAS_P
IDE_PDIOR_L
IDE_PDIOW_L
IDE_PDDACK_L
IDE_IRQ14
IDE_PDIORDY
IDE_PDDREQ
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
AF3
SATA_0RXN
AE3
SATA_0RXP
AG2
SATA_0TXN
AH2
SATA_0TXP
AF7
SATA_2RXN
AE7
SATA_2RXP
AG6
SATA_2TXN
AH6
SATA_2TXP
IDE
IN
SATA_A_D2R_N
SATA_A_D2R_P
SATA_A_R2D_C_N
SATA_A_R2D_C_P
SATA
38
IN
AF1
SATA_CLKN
AE1
SATA_CLKP
AH10
SATARBIASN
AG10
SATARBIASP
AF15
AH15
AF16
AH16
AG16
AE15
AF24
AH25
TP_CPU_CPUSLP_L
75 7
CPU_DPRSTP_L
CPU_DPSLP_L
=PP1V05_S0_SB_CPU_IO
6 21 23
5%
1/16W
MF-LF
402
OUT
R2199
R2110
10K
54.9
5%
1/16W
MF-LF
2 402
MF-LF 402
1/16W 1%
AG22
AG21
AF22
AF25
7 5
CPU_PWRGD
CPU_IGNNE_L
FWH_INIT_L
5 CPU_INIT_L
7 5 CPU_INTR
60 59
7
AG23
CPU_NMI
CPU_SMI_L
7 5
7 5
AH22
7 5
CPU_STPCLK_L
CPU_FERR_L
IN
OUT
OUT
OUT
R2100
OUT
OUT
=PP1V05_S0_SB_CPU_IO
NOSTUFF
OUT
CPU_RCIN_L
AH24
AF23
OUT
AG26
AG24
6 21 24 25
2.2K 2
1
MF-LF 402
1/16W 5%
58
SMC_RCIN_L
IN
R2108
54.9
OUT
R2107
OUT
AF26
CPU_THERMTRIP_R
24.9 2
MF-LF 402
1/16W 1%
59 14 7
6 21 24 25
PM_THRMTRIP_L
IN
MF-LF 402
1/16W 1%
AG27
=PP3V3_S0_SB_GPIO
R2101
(INT PU)
TP_SB_XOR_V3
5%
1/16W
MF-LF
2 402
OMIT
IN
6 21 23
332K
26
26 25 24 5
DIOR* (HSTROBE)
DIOW* (STOP)
DDACK*
IDEIRQ
IORDY (DSTROBE)
DA0
DA1
DA2
DCS1*
DCS3*
DDREQ
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
38
38
38
38
38
38
38
38
38
38 5
38
38
38
38
38
38
IDE_PDD<0>
IDE_PDD<1>
IDE_PDD<2>
IDE_PDD<3>
IDE_PDD<4>
IDE_PDD<5>
IDE_PDD<6>
IDE_PDD<7>
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
38
38
38
38
38
IDE_PDA<0>
IDE_PDA<1>
IDE_PDA<2>
IDE_PDCS1_L
IDE_PDCS3_L
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
AC 07
ACZ_BIT_CLK
SB: 1 OF 4
ACZ_RST#
SYNC_DATE=N/A
ACZ_SDIN[0-2]
INTERNAL 20K PD
INTERNAL 20K PD
ACZ_SDOUT
SIZE
ACZ_SYNC
INTERNAL 20K PD
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
21
OF
13
110
7
6
=PP3V3_S5_SB_USB
OMIT
1
47 22
22
47 22
22
47 22
R2200
R2250
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
R2255
10K
5%
1/16W
MF-LF
2 402
R2251
10K
5%
1/16W
MF-LF
2 402
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
U2100
41 5
IN
41 5
IN
41
USB_A_OC_L
USB_B_OC_L
USB_C_OC_L
USB_D_OC_L
USB_E_OC_L
OUT
41
OUT
53 5
IN
53 5
IN
53
OUT
53
OUT
54
IN
54
IN
54
22
22
22
OUT
54
SB_GPIO29
SB_GPIO30
SB_GPIO31
OUT
54 IN
54
27 6
=PP3V3_S5_SB_IO
OUT
54
OUT
54
IN
54
IN
54
63 58
IO
63 58
IO
58
IO
63 58
IO
63 58
IO
54
R2206
10K
MF-LF
1/16W
402 5%
R2207
10K
MF-LF
1/16W
402 5%
OUT
NOSTUFF
R2205
OUT
54
10K
MF-LF
1/16W
402 5%
54
54
IN
54
IN
IN
OUT
54
OUT
ICH7-M
SB
PCIE_A_D2R_N
PCIE_A_D2R_P
PCIE_A_R2D_C_N
PCIE_A_R2D_C_P
F26
PERN1
F25
PERP1
E28
PETN1
E27
PETP1
PCIE_B_D2R_N
PCIE_B_D2R_P
PCIE_B_R2D_C_N
PCIE_B_R2D_C_P
H26
PERN2
H25
PERP2
G28
PETN2
G27
PETP2
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
PCIE_C_D2R_N
PCIE_C_D2R_P
PCIE_C_R2D_C_N
PCIE_C_R2D_C_P
K26
PERN3
K25
PERP3
J28
PETN3
J27
PETP3
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
PCIE_D_D2R_N
PCIE_D_D2R_P
PCIE_D_R2D_C_N
PCIE_D_R2D_C_P
M26
PERN4
M25
PERP4
L28
PETN4
L27
PETP4
PCIE_E_D2R_N
PCIE_E_D2R_P
PCIE_E_R2D_C_N
PCIE_E_R2D_C_P
P26
PERN5
P25
PERP5
N28
PETN5
N27
PETP5
PCIE_F_D2R_N
PCIE_F_D2R_P
PCIE_F_R2D_C_N
PCIE_F_R2D_C_P
T25
PERN6
T24
PERP6
R28
PETN6
R27
PETP6
BGA
(3 OF 6)
P5
SPI_MOSI
P2
SPI_MISO
22
47 22
22
47 22
D3
C4
D5
D4
E5
C3
A2
B3
14 5
14 5
14 5
14
14
14
14
14
14
14
14
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
14
14
14
14
DMI_N2S_N<0>
DMI_N2S_P<0>
DMI_S2N_N<0>
DMI_S2N_P<0>
DMI_N2S_N<1>
DMI_N2S_P<1>
DMI_S2N_N<1>
DMI_S2N_P<1>
DMI_N2S_N<2>
DMI_N2S_P<2>
DMI_S2N_N<2>
DMI_S2N_P<2>
DMI_N2S_N<3>
DMI_N2S_P<3>
DMI_S2N_N<3>
DMI_S2N_P<3>
34 5
34 5
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
SB_CLK100M_DMI_N
SB_CLK100M_DMI_P
IN
PP1V5_S0_SB_VCC1_5_B
R2203
DMI_IRCOMP_R
PD)
PD)
OC0*
OC1*
OC2*
OC3*
OC4*
OC5*/GPIO29
OC6*/GPIO30
OC7*/GPIO31
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
USBRBIAS*
D1
USBRBIAS
47
47
53
53
47
47
47
47
47
47
47
47
47
47
USB_A_N
USB_A_P
USB_B_N
USB_B_P
USB_C_N
USB_C_P
USB_D_N
USB_D_P
USB_E_N
USB_E_P
USB_F_N
USB_F_P
USB_G_N
USB_G_P
USB_H_N
USB_H_P
IO
EXTERNAL 0
IO
IO
AIRPORT (MINI-PCIE)
IO
IO
EXTERNAL 1
IO
IO
CAMERA
IO
IO
EXTERNAL 2
IO
IO
CF/SD
IO
IO
BT
IO
IO
IR
IO
R2204
USB_RBIAS_PN
22.6 2
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
44
IO
44
IO
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
IO
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44
IO
44 26
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
6 25 27
U2100
ICH7-M
SB
BGA
(2 OF 6)
REQ0*
GNT0*
REQ1*
GNT1*
REQ2*
GNT2*
REQ3*
GNT3*
REQ4*/GPIO22
GNT4*/GPIO48
GPIO1/REQ5*
GPIO17/GNT5*
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
26 PCI_REQ0_L
TP_PCI_GNT0_L
44 26 PCI_REQ1_L
44 PCI_GNT1_L
26 PCI_REQ2_L
TP_PCI_GNT2_L
26 PCI_REQ3_L
TP_PCI_GNT3_L
R2298
IN
IN
R2299
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
OUT
IN
IN
SB_CRT_TVOUT_MUX
IO
PCI_PME_FW_L
IN
TP_PCI_GNT4_L
44
PCI
C/BE0*
C/BE1*
C/BE2*
C/BE3*
IRDY*
PAR
PCICLK
DEVSEL*
PERR*
PLOCK*
SERR*
STOP*
TRDY*
PLTRST*
PCIRST*
(INT 20K PU) PME*
B15
C12
D12
C15
A7
E10
A9
A12
C9
E11
B10
F15
F14
C26
B18
B19
BOOT_LPC_SPI_L
60 58
44
44
44
44
PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
PCI_IRDY_L
44 PCI_PAR
PCI_CLK_SB
PCI_DEVSEL_L
26 PCI_PERR_L
26 PCI_LOCK_L
26 PCI_SERR_L
26 PCI_STOP_L
26 PCI_TRDY_L
44 26
34 5
44
26
44
44
44
44
PLT_RST_L
PCI_RST_L
TP_PCI_PME_L
6
44
IO
5%
1/16W
MF-LF
2 402
IO
IO
R2211
1K
NO STUFF - DEFAULT
STUFF - A16 SWAP OVERRIDE
IO
OUT
IO
IO
IN
IO
IO
IO
STRAP
GNT5#
R2211
GNT4#
R2210
IO
LPC (DEFAULT)
11
UNSTUFF
IO
PCI
10
UNSTUFF
STUFF
OUT
SPI
01
STUFF
UNSTUFF
IO
UNSTUFF
OUT
NOTE: GNT4#
SB: 2 OF 4
26
IO
26
IO
26
IO
44 26
IO
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
TP_SB_XOR_AE5
TP_SB_XOR_AD5
TP_SB_XOR_AG4
TP_SB_XOR_AH4
TP_SB_XOR_AD9
A3
PIRQA*
B4
PIRQB*
C5
PIRQC*
B5
PIRQD*
AE5
AD5
AG4
AH4
AD9
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
VOLTAGE=0
LAYOUT NOTE:
PLACE R2204 < 1/2 IN FROM SB
NOTE:
GNT[0-3]# HAVE INT 20K PU
ENABLED ONLY WHEN PCIRST#=0
AND PWROK=H
OMIT
44
LAYOUT NOTE:
PLACE R2203 < 1/2 IN FROM SB
24.9 2
1%
1/16W
MF-LF
402
=PP3V3_S0_SB
MISC
RSVD5
RSVD6
NOTE: CHANGE SYMBOL
RSVD7
TO RSVD[1-9]
RSVD8
MCH_SYNC*
G8
F7
F8
G7
26
26
26
26
SB_GPIO2 IO
SB_GPIO3 IO
SB_GPIO4 IO
ODD_PWR_EN_L
AE9 TP_SB_XOR_AE9
AG8 TP_SB_XOR_AG8
AH8 TP_SB_XOR_AH8
F21
TP_SB_RSVD9
AH20
14 NB_SB_SYNC_L
SYNC_MASTER=N/A
SYNC_DATE=N/A
IO
DRAWING NUMBER
SHT
NONE
REV.
051-7148
D
SCALE
24 25
IN
SPI_SI
SPI_SO
USB_A_OC_L
USB_B_OC_L
USB_C_OC_L
USB_D_OC_L
USB_E_OC_L
22 SB_GPIO29
22 SB_GPIO30
22 SB_GPIO31
14 5
C25
DMI_ZCOMP
D25
DMI_IRCOMP
R2
SPI_CLK (INT
P6
SPI_CS*
P1
SPI_ARB (INT
IN
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
AE28
DMI_CLKN
AE27
DMI_CLKP
SPI_SCLK
SPI_CE_L
SPI_ARB
47 22
DMI
5%
1/16W
MF-LF
2 402
USB
10K
PCI-EXP
R2225
SPI
22
OF
13
110
=PP3V3_S0_SB_GPIO
6 21 23
=PP3V3_S5_SB
8
1
D
26 25 23 6
=PP3V3_S5_SB
7 6
R2318
R2395
R2396
R2397
R2327
R2326
R2323
10K
8.2K
10K
8.2K
10K
10K
1K
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
1/16W
2 MF-LF
402
5%
6 23 25 26
RP2300
=PP3V3_S5_SB_PM
5%
1/16W
SM-LF
1/16W
2 402
MF-LF
5%
2 3
U2100
ICH7-M
SB
R2398
R2320
R2317
R2316
1K
10K
10K
10K
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
27
IO
27
IO
C22
B22
SMB_LINK_ALERT_L A26
B25
SMLINK<0>
A25
SMLINK<1>
SMB_CLK
SMB_DATA
NOT USED
PM_RI_L
SB_SPKR
58 26 5
IN
PM_SUS_STAT_L
PM_SYSRST_L
14
IN
PM_BMBUSY_L
67 60 58
OUT
SMB_ALERT_L
A28
AB18
B23
OUT
33
OUT
A21
23
23
IO
53 41
IN
IO
TP_AZ_DOCK_EN_L
TP_AZ_DOCK_RST_L
PCIE_WAKE_L
INT_SERIRQ
PM_THRM_L
IN
VR_PWRGD_CK410
IO
58
IN
IN
GPIO11/SMBALERT*
GPIO26
SMC_RUNTIME_SCI_L
SMC_EXTSMI_L
TP_SB_GPIO6
AC1
CLK14
B2
CLK48
SUSCLK
PWROK
GPIO16/DPRSLPVR
TP0/BATLOW*
LAN_RST*
GPIO32/CLKRUN*
RSMRST*
AC19
GPIO33/AZ_DOCK_EN*
U2
GPIO34/AZ_DOCK_RST*
AD22
DEF=GPI
VRMPWRGD
OD
GPIO
34 5
34 5
59
C21
88
79 77 58 6
R2302
R2303
100 1
R2305
1/16W
2 402
MF-LF
5%
38
SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR
SATA_C_DET_L
5%
2 1/16W
MF-LF
402
IN
IN
IN
OUT
58
PM_SLP_S3_L
PM_SLP_S4_L
PM_SLP_S5_L
26
PM_SB_PWROK
IN
75 14
PM_DPRSLPVR
OUT
77 58
OUT
OUT
OUT
NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN
58
C23
C19
SUS_CLK_SB
AA4
AC22
100 1
100 1
PM_PWRBTN_L
IN
PM_LAN_ENABLE
IN
58
58
Y4
NOTE:
SMC WILL DRIVE 0-1-0 TO KEEP LAN INTF
IN RESET STATE TO SAVE PWR
58
PM_BATLOW_L
IN
PM_RSMRST_L
IN
R2399
DEF=GPI
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
C20
B24
SLP_S3*
D23
SLP_S4*
F22
SLP_S5*
F20
WAKE*
AH21
SERIRQ
AF20
THRM*
26
58
AF19 SB_GPIO21
GPIO21/SATA0GP
AH18 SB_GPIO19
GPIO19/SATA1GP
AH19
GPIO36/SATA2GP
AE19 SB_GPIO37
GPIO37/SATA3GP
GPIO0/BM_BUSY*
B21
GPIO27
E23
GPIO28
AG18
58 10 IN
BIOS_REC
FWH_MFG_MODE
PM_CLKRUN_L
C
67 60 58
PD)
AC20
GPIO18/STPPCI*
AF21
GPIO20/STPCPU*
PM_STPPCI_L
PM_STPCPU_L
SB_GPIO26
67 60 58 44 5
RI*
A19
SPKR (INT WEAK
A27
SUS_STAT*
A22
SYS_RST*
8.2K
10K
SATA GPIO
(4 OF 6)
SMBCLK
SMBDATA
LINKALERT*
SMLINK0
SMLINK1
CLKS
SMB
SYS GPIO
PWR MNGT
R2319 R2343
BGA
1
6 11
OMIT
10K
DEF=GPI
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
23
SMS_INT_L
SMC_SB_NMI
PATA_PWR_EN_L
58 26
IN
58
IN
100K
5% 1/16W
402 MF-LF
OUT
58
SMC_WAKE_SCI_L
IN
IDE_RESET_L OUT
SV_SET_UP 23 60
CRB_SV_DET 23
TP_SB_GPIO25_DO_NOT_USE
33 SB_CLK100M_SATA_OE_L
OUT
TP_SB_GPIO38 IO
23 SATA_C_PWR_EN_L
OUT
38
=PP3V3_S5_SB
26 25 23 6
6 23 25 26
=PP3V3_S5_SB
1
R2390
B
1 NOSTUFF
R2306 R2308
10K
10K
1/16W
2 402
MF-LF
5%
1/16W
2 402
MF-LF
5%
5%
1/16W
MF-LF
2 402
23
SV_SET_UP
CRB_SV_DET
10K
NOTE:
SV_SET_UP IS LINDACARD DETECT
HI = PRESENT
LO = NOT PRESENT
PATA_PWR_EN_L
=PP3V3_S0_SB_GPIO
23 60
6 21 23
23
R2388
10K
LAYOUT NOTE:
5%
1/16W
MF-LF
2 402
1 NOSTUFF
R2307 R2309
26 25 23 6
10K
1/16W
2 402
MF-LF
5%
0
1/16W
402
2 MF-LF
5%
23
SATA_C_PWR_EN_L
=PP3V3_S5_SB
1
SB: 3 OF 4
R2313
R2310
10K
10K
1/16W
402
2 MF-LF
5%
1/16W
402
2 MF-LF
5%
1 NOSTUFF
1 NOSTUFF
SYNC_MASTER=N/A
SYNC_DATE=N/A
FWH_MFG_MODE 23
BIOS_REC 23
R2314
0
1/16W
2 402
MF-LF
5%
R2311
10K
SIZE
1/16W
2 402
MF-LF
5%
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
23
OF
13
110
OMIT
OMIT
A4
A23
N24
P24
R18
U14
V27
AA24
AB27
AD11
B1
D10
F4
G18
J1
L24
M17
N14
N17
N18
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P27
P28
R1
R11
R12
R13
R14
R15
R16
R17
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB28
AC2
AC5
AC9
AC11
AD1
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
5
25
AD3
AD4
AD7
AD8
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N15
N16
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
U2100
ICH7-M
SB
BGA
(6 OF 6)
VSS
25
25 22
PP5V_S5_SB_V5REF_SUS
PP1V5_S0_SB_VCC1_5_B
25 24 6
=PP3V3_S0_SB_VCC3_3
G10
AD17
F6
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
B27
PP1V5_S0_SB_VCCDMIPLL
AG28
=PP1V5_S0_SB_VCC1_5_A_ARX
AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5
25
25 6
PP5V_S0_SB_V5REF
25 6
25 24 6
25 6
=PP1V5_S0_SB_VCCSATAPLL
=PP3V3_S0_SB_VCC3_3
=PP1V5_S0_SB_VCC1_5_A_ATX
AD2
AH11
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9
V5REF
V5REF_SUS
U2100
ICH7-M
SB
BGA
(5 OF 6)
CORE
VCC1_05
VCC PAUX
VCCLAN_3_3
VCCA3GP
VCC3_3/VCCHDA
VCCSUS3_3/VCCSUSHDA
VCC1_5_B
V_CPU_IO
IDE
VCC3_3
PCI
VCC3_3
VCCRTC
=PPVCORE_S0_SB
6 25
=PP3V3_S0_SB_VCCLAN3_3 6
25
U6
R7
=PP3V3_S0_SB_3V3_1V5_VCCHDA
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA
AE23
AE26
AH26
=PP1V05_S0_SB_CPU_IO
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
=PP3V3_S0_SB_VCC3_3_IDE
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
NOTE:
VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V
DEPENDING ON VIO OF AZALIA INTERFACE
CODEC ICS CONSIDERED SO FAR ARE 3.3V
6 25
6
6 21 25
6 25
=PP3V3_S0_SB_VCC3_3_PCI 6
PP3V3_S5_SB_RTC
25
5 21 25 26
=PP3V3_S5_SB_VCCSUS3_3 6
24 25
A24
C24
D19
VCCSUS3_3
D22
G19
VCC3_3
VCCDMIPLL
ARX
VCC1_5_A
USB
VCCSUS3_3
VCCSATAPLL
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
=PP3V3_S5_SB_VCCSUS3_3_USB
6 25
VCC3_3
AB17
VCC1_5_A AC17
VCC1_5_A
ATX
VCC1_5_A
T7
F17
G17
=PP1V5_S0_SB_VCC1_5_A
6 25
AB8
VCC1_5_A AC8
K7
25 24 6
E3 VCCSUS3_3
25 6
=PP1V5_S0_SB_VCCUSBPLL
C1
VCCSAUS1_5
CHANGE SYMBOL TO 1.05
AA2
Y7
V5
V1
W2
W7
P7
=PP3V3_S5_SB_VCCSUS3_3
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
C28
G20
VCCUSBPLL
VCCLAN1_5
CHANGE SYMBOL TO 1.05
USB CORE
VCC1_5_A
A1
H6
H7
J6
J7
SB: 4 OF 4
SYNC_MASTER=N/A
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
6 25
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
24
OF
13
110
=PPVCORE_S0_SB
27 22 6
24 6
R2502
1/16W
MF-LF
402
5%
10%
16V
2 X5R
402
BAT54E3
3
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
PP5V_S0_SB_V5REF
1
C2503
0.1UF
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AG5
C2518
0.1UF
10%
16V
2 X5R
402
24
=PP3V3_S5_SB_VCCSUS3_3 6
C2502
24 6
C2517
0.1UF
10%
2 16V
X5R
402
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AD2
20%
2 2.5V
POLY
CASE-C2
=PP3V3_S0_SB_VCCLAN3_3 6
=PP3V3_S5_SB
10
1/16W
MF-LF
402
5%
D2500
SOT23
25 24 6
BAT54E3
PP5V_S5_SB_V5REF_SUS
1
C2504
C2513
0.1UF
10%
2 16V
X5R
402
24
PLACEMENT NOTE:
PLACE C2504 < 2.54MM OF PIN F6 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
0.1UF
10%
16V
2 X5R
402
10%
2 16V
X5R
402
C2519
0.1UF
=PP3V3_S5_SB_VCCSUS3_3_USB
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AH11
24 6
C2533
PLACEMENT NOTE:
PLACE CAPS NEAR PINS
K3 ... N7 OF SB
=PP3V3_S0_SB_VCC3_3
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
C2534
0.1UF
10%
2 16V
X5R
402
R2501
0.1UF
24
10%
16V
2 X5R
402
=PP5V_S5_SB
0.1UF
6 24
C2532
0.1UF
10%
16V
2 X5R
402
10%
16V
2 X5R
402
=PP3V3_S0_SB_3V3_1V5_VCCHDA
0
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN U6
C2521
0.1UF
10%
16V
2 X5R
402
0
24 6
=PP1V5_S0_SB_VCC1_5_A_ATX
1
C2514
1UF
10%
6.3V
2 CERM
402
=PP1V5_S0_SB_VCC1_5_A
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AG9
=PP1V05_S0_SB_CPU_IO
=PP1V5_S0_SB
6 21 24
L2500
SM-3
PLACEMENT NOTE:
PLACE NEAR PINS AE23, AE26 & AH26 OF SB
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
100-OHM-EMI
2
PP1V5_S0_SB_VCC1_5_B
155S0247
100-OHM,4A,0805
20%
2 2.5V
POLY
SMB2
0.1UF
10%
2 16V
X5R
402
0.1UF
1
25 24 6
=PP3V3_S5_SB_VCCSUS3_3
10%
2 16V
X5R
402
C2520
0.1UF
10%
16V
2 X5R
402
PLACEMENT NOTE:
PLACE C2500 & C2505-07 < 2.54MM OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
NEAR PINS D28, T28, AD28
C2523
0.1UF
10%
2 16V
X5R
402
PLACEMENT NOTE:
PLACE C2520 NEAR PIN E3 OF SB
C2522
0.1UF
C2524
4.7UF
20%
2 6.3V
CERM
603
10%
2 16V
X5R
402
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
=PP3V3_S0_SB_VCC3_3_IDE 6
24 6
=PP3V3_S0_SB_VCC3_3
C2515
0.1UF
10%
16V
2 X5R
402
PLACEMENT NOTE:
PLACE C2509 NEAR PIN B27 OF SB
0.1UF
10%
2 16V
X5R
402
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS AA7 ... AG19
=PP1V5_S0_SB_VCCUSBPLL
1
C2509
0.1UF
6 24
C2510
10%
16V
2 X5R
402
0.1UF
10%
2 16V
X5R
402
PLACEMENT NOTE:
PLACE CAPS NEAR PINS
AB8 AND AC8 OF SB
6 24
22 24
25 24 6
C2531
PLACEMENT NOTE:
PLACE CAP UNDER SB NEAR PINS V1,
V5, W2, OR W7
25 6
PLACEMENT NOTE:
PLACE CAPS NEAR PINS
A24 ... G19 AND P7 OF SB
C2516
330UF
10%
6.3V
2 CERM
402
24 25
=PP1V5_S0_SB_VCCSATAPLL
1
1UF
PLACEMENT NOTE:
PLACE C2503 < 2.54MM OF PIN AD17 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
10%
16V
2 X5R
402
C2511
0.1UF
D2501
SOT23
26 23 6
6 24
PLACEMENT NOTE:
PLACE CAPS AT EDGE OF SB
=PP1V5_S0_SB_VCC1_5_A_ARX
1
100
1
=PP3V3_S0_SB
=PP5V_S0_SB
2
PLACEMENT NOTE:
PLACE C2520 NEAR PIN C1 OF SB
24
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS A1 ... J7
C2512
0.1UF
10%
16V
2 X5R
402
C2525
0.1UF
10%
16V
2 X5R
402
=PP3V3_S0_SB_VCC3_3_PCI 6
PLACEMENT NOTE:
DISTRIBUTE IN PCI SECTION OF SB
NEAR PINS A5 ... G16
C2526
0.1UF
10%
16V
2 X5R
402
C2527
0.1UF
24
C2528
0.1UF
10%
16V
2 X5R
402
10%
16V
2 X5R
402
0
152S0315
1UH,0.5A,20%,1206
25 6
=PP1V5_S0_SB
L2507
1/10W 5%
MF-LF 603
1206
PP1V5_S0_SB_R
SB:DECOUPLING
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
0.28-OHM
R2500
PP1V5_S0_SB_VCCDMIPLL
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
SYNC_MASTER=N/A
PP3V3_S5_SB_RTC
1
C2501
0.01UF
10%
2 16V
CERM
402
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON
SECONDARY SIDE OR 3.56MM ON PRIMARY
SYNC_DATE=N/A
24
5 21 24 26
C2508
10UF
20%
2 6.3V
CERM
805-1
PLACEMENT NOTE:
PLACE CAPS NEAR PIN W5 OF SB
C2530
0.1UF
10%
2 16V
X5R
402
C2529
0.1UF
10%
2 16V
X5R
402
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
25
OF
13
110
7
C2608
=PP3V3_S0_SB_PM
15PF
CRITICAL
1
CERM 50V
402 5%
Y2600
0.1UF
1
402 MF-LF
1/16W 5%
15PF
21
SB_RTC_X2
20%
10V
CERM
402
IN
CERM 50V
402 5%
0
OUT
PM_SB_PWROK
IO
44 22
IO
1.8K
44 22
IO
44 22
IO
44 22
IO
1/16W
MF-LF
402 5%
U2601
23
SOT23-5-LF
4
44 22
R2611
MC74VHC1G08
VR_PWRGOOD_DELAY
75 14 5
1
25 23 6
D2600
SOT23
=PP3V3_S5_SB
BAT54E3
BAT_2
C2610
BAT54E3
R2607
MIN_LINE_WIDTH=0.6MM
79 77 76 66 65 59 26 11 6 5
83 81 80
21
SB_RTC_RST_L
88 76 61 59 41 26 11 10 6
79 77 76 66 65 59 26 11 6 5
83 81 80
OUT
1M
402 MF-LF
1/16W 5%
IO
22
IN
44 22
IN
22
IN
IN
R2623
R2624
R2625
R2626
R2627
R2628
R2630
R2629
PCI_REQ0_L
PCI_REQ1_L
PCI_REQ2_L
PCI_REQ3_L
R2632
R2631
R2633
R2634
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
SB_GPIO2
SB_GPIO3
SB_GPIO4
SB_GPIO5
R2637
R2636
R2638
R2639
R2640
R2642
R2641
R2643
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
22
IO
22
IO
22
IO
44 22
IO
22
IO
22
IO
22
IO
ODD_PWR_EN_L
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
PP3V3_S5
DEVELOPMENT
C2605
20%
10V
2 CERM
402
R2699
6 11 26 59 65 66 76 77 79
80 81 83
C2698
0.1UF
20%
10V
2 CERM
402
DEVELOPMENT
PP3V3_S5 5
DEVELOPMENT
C2699
0.1UF
SB_SYSRST_4_PVT
1
BAT_1
21
SB_SM_INTRUDER_L
5%
1/16W
MF-LF
2 402
OUT
VCC
U2699
SW_RST_BTN_L
DEVELOPMENT
DEVELOPMENT
MAX6816
2
IN
OUT
SW_RST_DEBNC
SOT143
SW2600
GND
SPST
5
1
DEVELOPMENT
1
R2698
SM-LF
1
R2651
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
DEVELOPMENT
J2600
SM
R2697
10K
BB1020
2
PP3V3_S0
10%
2 6.3V
CERM
402
R2606
1K
22
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_SERR_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
MAKE_BASE=TRUE
1UF
402 MF-LF
1/16W 5%
1
PP3V3_S5
402 MF-LF
5%
1/16W
MIN_LINE_WIDTH=0.6MM
20K
10K
22
IO
22
10%
6.3V
2 CERM
402
R2600
44 22
1UF
D2601
SOT23
IO
IN
44 22
R2622
1/16W
MF-LF
402 5%
MIN_LINE_WIDTH=0.6MM
IN
R2612
PP3V3_S5_SB_RTC
ALL_SYS_PWRGD
77 58
10K
25 24 21 5
=PP3V3_S0_SB_PCI
6
C2607
10M
SM-LF
OUT
R2609
32.768K
C2609
1
SB_RTC_X1
21
100K
5%
1/16W
MF-LF
2 402
DEVELOPMENT
MC74VHC1G08
U2698
SOT23-5-LF
4
U2698_4
58 23
SMS_INT_L
R2650
1
1K
58 23 5
PM_SYSRST_L
OUT
5%
1/16W
MF-LF
402
NOSTUFF
R2696
1
RESET
11 7
IN
5%
1/16W
MF-LF
402
XDP_DBRESET_L
B
PP3V3_S0
6 10 11 26 41 59 61 76 88
C2611
0.1UF
1
20%
10V
CERM
402
U2603
23
OUT
VR_PWRGD_CK410
74LVC1G04DBVG4
4
75
VR_PWRGD_CK410_L
IN
SOT23-5
3
33
OUT
CK410_PD_VTT_PWRGD_L
SB: MISC
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
26
OF
13
110
SB I2C BUSSES
D
D
27 23
IO
27 23
IO
SMB_CLK
SMB_DATA
=I2C_MEM_SCL
=I2C_MEM_SDA
IO
SMB_CK410_CLK
SMB_CK410_DATA
IO
=SMB_AIRPORT_CLK
=SMB_AIRPORT_DATA
IO
29 28
MAKE_BASE=TRUE
29 28
MAKE_BASE=TRUE
33
33
53
53
IO
IO
IO
=PP3V3_S0_SB
R2750
R2751
6 22 25
2.2K
2.2K
=PP3V3_S5_SB_IO
6 22
NOSTUFF
27 23
27 23
R2719
R2718
SMB_CLK
SMB_DATA
2.2K
2.2K
NOSTUFF
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
27
OF
13
110
C2850
C2800
2.2UF
0.1uF
20%
20%
6.3V
10V
CERM1
603
CERM
402
15
15
MEM_A_DQ<0>
MEM_A_DQ<1>
7
9
2
15 5
15 5
11
MEM_A_DQS_N<0>
MEM_A_DQS_P<0>
13
15
15
15
17
MEM_A_DQ<2>
MEM_A_DQ<3>
19
21
15
15
23
MEM_A_DQ<8>
MEM_A_DQ<9>
25
27
15 5
15 5
29
MEM_A_DQS_N<1>
MEM_A_DQS_P<1>
31
33
15
15
35
MEM_A_DQ<10>
MEM_A_DQ<11>
37
39
DDR2 VRef
41
15 5
15
43
MEM_A_DQ<16>
MEM_A_DQ<17>
45
47
29 28 6 5
=PP1V8_S3_MEM
15 5
15 5
53
1%
1/16W
MF-LF
402
15
15
15
5 28 29
VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
15 5
57
61
MEM_A_DQ<24>
MEM_A_DQ<25>
63
65
R2801
15
1K
55
MEM_A_DQ<18>
MEM_A_DQ<19>
59
MEM_VREF
51
R2800
1K
49
MEM_A_DQS_N<2>
MEM_A_DQS_P<2>
67
MEM_A_DM<3>
NC
1%
1/16W
MF-LF
402
69
71
15
15
73
MEM_A_DQ<26>
MEM_A_DQ<27>
75
77
30 14
79
MEM_CKE<0>
81
NC
30 15
83
85
MEM_A_BS<2>
87
30 15
30 15
30 15
89
MEM_A_A<12>
MEM_A_A<9>
MEM_A_A<8>
91
93
95
30 15
30 15
30 15
97
MEM_A_A<5>
MEM_A_A<3>
MEM_A_A<1>
99
101
103
30 15
30 15
30 15
105
MEM_A_A<10>
MEM_A_BS<0>
MEM_A_WE_L
107
109
111
30 15
30 14
113
MEM_A_CAS_L
MEM_CS_L<1>
115
117
30 14
119
MEM_ODT<1>
121
15
15
123
MEM_A_DQ<32>
MEM_A_DQ<33>
125
127
15 5
15 5
129
MEM_A_DQS_N<4>
MEM_A_DQS_P<4>
131
133
15
15
135
MEM_A_DQ<34>
MEM_A_DQ<35>
137
139
15
15
141
MEM_A_DQ<40>
MEM_A_DQ<41>
143
145
15
147
MEM_A_DM<5>
149
15
15
151
MEM_A_DQ<42>
MEM_A_DQ<43>
153
155
15
15
157
MEM_A_DQ<48>
MEM_A_DQ<49>
159
161
NC
163
165
15 5
15 5
167
MEM_A_DQS_N<6>
MEM_A_DQS_P<6>
169
171
15
15
173
MEM_A_DQ<50>
MEM_A_DQ<51>
175
177
15
15
179
MEM_A_DQ<56>
MEM_A_DQ<57>
181
183
15
185
MEM_A_DM<7>
187
29 6
=PPSPD_S0_MEM
15
C2851
2.2UF
20%
6.3V
CERM1 2
603
15 5
10V
CERM 2
29 27
C2852
189
MEM_A_DQ<58>
MEM_A_DQ<59>
191
193
0.1uF
20%
29 27
402
195
=I2C_MEM_SDA
=I2C_MEM_SCL
197
199
DQ0
J2800
F-RT-SM1
DQ1
VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9
DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1
VSS10
VSS11
DQS1*
DQS1
CK0
CK0*
VSS13
VSS12
DQ14
DQ15
DQ10
DQ11
VSS14
VSS15
KEY
VSS16
DQ16
VSS17
DQ20
DQ17
DQ21
VSS18
DQS2*
VSS19
NC0
DQS2
DM2
VSS21
DQ18
VSS22
DQ22
DQ19
VSS23
DQ23
VSS24
DQ24
DQ28
DQ25
VSS25
DQ29
VSS26
DM3
DQS3*
NC1
VSS27
DQS3
VSS28
DQ26
DQ30
DQ27
VSS29
DQ31
VSS30
CKE0
VDD0
NC/CKE1
VDD1
NC2
NC/A15
BA2
VDD2
NC/A14
VDD3
A12
A11
A9
A8
A7
A6
VDD4
VDD5
A5
A3
A4
A2
A1
VDD6
A0
VDD7
A10/AP
BA1
BA0
WE*
RAS*
S0*
VDD8
VDD9
CAS*
NC/S1*
ODT0
NC/A13
VDD10
VDD11
NC/ODT1
VSS31
NC3
VSS32
DQ32
DQ33
DQ36
DQ37
VSS33
VSS34
DQS4*
DQS4
DM4
VSS35
VSS36
DQ38
DQ34
DQ35
DQ39
VSS37
VSS38
DQ44
DQ40
DQ41
DQ45
VSS39
VSS40
DM5
DQS5*
DQS5
VSS41
VSS42
DQ42
DQ43
DQ46
DQ47
VSS43
VSS44
DQ48
DQ49
DQ52
DQ53
VSS45
VSS46
NC_TEST
VSS47
CK1
CK1*
DQS6*
DQS6
VSS48
DM6
VSS49
VSS50
DQ50
DQ51
DQ54
DQ55
VSS51
VSS52
DQ56
DQ57
DQ60
DQ61
VSS53
VSS54
DM7
VSS55
DQS7*
DQS7
DQ58
DQ59
VSS56
DQ62
VSS57
DQ63
SDA
SCL
VSS58
SA0
VDDSPD
516S0403
CRITICAL VSS0
GND
SA1
205
VREF
VSS1
DDR2-SODIMM-STD
5 6 28 29
OMIT
1
MEM_VREF
204
29 28 5
=PP1V8_S3_MEM
203
Page Notes
=PP1V8_S3_MEM
5
29 28 6 5
202
201
2
TABLE_5_HEAD
MEM_A_DQ<4>
MEM_A_DQ<5>
15
PART#
MEM_A_DM<0>
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
516S0503
8
10
QTY
15
J2800
CRITICAL
15
12
14
MEM_A_DQ<6>
MEM_A_DQ<7>
16
15
5 15
18
20
MEM_A_DQ<12>
MEM_A_DQ<13>
22
15
15
24
26
MEM_A_DM<1>
15
28
30
MEM_CLK_P<0>
MEM_CLK_N<0>
32
14
14
34
36
MEM_A_DQ<14>
MEM_A_DQ<15>
38
5 15
15
40
42
44
MEM_A_DQ<20>
MEM_A_DQ<21>
46
15
15
48
50
DIMM_OVERTEMP_L
MEM_A_DM<2>
52
29 59
15
54
56
MEM_A_DQ<22>
MEM_A_DQ<23>
58
15
15
60
62
MEM_A_DQ<28>
MEM_A_DQ<29>
64
15
15
66
68
MEM_A_DQS_N<3>
MEM_A_DQS_P<3>
70
5 15
5 15
72
74
MEM_A_DQ<30>
MEM_A_DQ<31>
76
15
15
78
80
MEM_CKE<1>
14 30
82
84
TP_MEM_A_A<15>
TP_MEM_A_A<14>
86
88
90
MEM_A_A<11>
MEM_A_A<7>
MEM_A_A<6>
92
94
15 30
15 30
15 30
96
29 28 6 5
98
MEM_A_A<4>
MEM_A_A<2>
MEM_A_A<0>
100
102
=PP1V8_S3_MEM
15 30
15 30
C2801
10UF
15 30
106
MEM_A_BS<1>
MEM_A_RAS_L
MEM_CS_L<0>
108
110
C2803
10UF
20%
20%
6.3V
2 X5R
603
C2804
10UF
20%
6.3V
2 X5R
603
15 30
C2802
10UF
20%
6.3V
2 X5R
104
6.3V
2 X5R
603
603
15 30
14 30
112
114
MEM_ODT<0>
MEM_A_A<13>
116
14 30
15 30
118
120
NC
122
124
MEM_A_DQ<36>
MEM_A_DQ<37>
126
C2810
C2811
0.1uF
0.1uF
20%
20%
20%
10V
CERM
402
C2814
10V
CERM
402
C2815
C2812
0.1uF
C2813
0.1uF
20%
10V
CERM
402
10V
CERM
402
15
15
128
1
130
MEM_A_DM<4>
15
132
134
MEM_A_DQ<38>
MEM_A_DQ<39>
136
2
15
C2816
C2817
0.1uF
0.1uF
0.1uF
0.1uF
20%
20%
20%
20%
10V
CERM
402
C2818
10V
CERM
402
C2819
10V
CERM
402
10V
CERM
402
5 15
138
140
MEM_A_DQ<44>
MEM_A_DQ<45>
142
15
15
144
146
MEM_A_DQS_N<5>
MEM_A_DQS_P<5>
148
0.1uF
0.1uF
20%
20%
20%
10V
2 CERM
5 15
10V
2 CERM
402
5 15
C2820
0.1uF
402
C2821
0.1uF
20%
10V
2 CERM
402
10V
CERM
402
150
152
MEM_A_DQ<46>
MEM_A_DQ<47>
154
15
5 15
156
158
MEM_A_DQ<52>
MEM_A_DQ<53>
160
15
15
162
164
MEM_CLK_P<1>
MEM_CLK_N<1>
166
14
14
168
170
MEM_A_DM<6>
15
172
174
MEM_A_DQ<54>
MEM_A_DQ<55>
176
5 15
15
178
SYNC_MASTER=(MASTER)
180
MEM_A_DQ<60>
MEM_A_DQ<61>
182
15
15
184
186
MEM_A_DQS_N<7>
MEM_A_DQS_P<7>
188
SYNC_DATE=(MASTER)
5 15
5 15
190
192
MEM_A_DQ<62>
MEM_A_DQ<63>
194
15
15
196
SIZE
198
200
ADDR=0xA0(WR)/0xA1(RD)
DRAWING NUMBER
SCALE
ALL NCS
SHT
NONE
REV.
051-7148
13
OF
28
110
C2950
C2900
2.2UF
0.1uF
10V
CERM
402
MEM_B_DQ<0>
MEM_B_DQ<1>
7
9
2
15 5
15 5
11
MEM_B_DQS_N<0>
MEM_B_DQS_P<0>
13
15
15
15
20%
20%
6.3V
CERM1
603
15
15
17
MEM_B_DQ<2>
MEM_B_DQ<3>
19
21
15 5
15
23
MEM_B_DQ<8>
MEM_B_DQ<9>
25
27
15 5
15 5
29
MEM_B_DQS_N<1>
MEM_B_DQS_P<1>
31
33
15
15
35
MEM_B_DQ<10>
MEM_B_DQ<11>
37
39
41
15
15
43
MEM_B_DQ<16>
MEM_B_DQ<17>
45
47
15 5
15 5
49
MEM_B_DQS_N<2>
MEM_B_DQS_P<2>
51
53
15
15
55
MEM_B_DQ<18>
MEM_B_DQ<19>
57
59
15
15 5
61
MEM_B_DQ<24>
MEM_B_DQ<25>
63
65
15
67
MEM_B_DM<3>
NC
69
71
15
15
73
MEM_B_DQ<26>
MEM_B_DQ<27>
75
77
30 14
79
MEM_CKE<2>
81
NC
30 15
83
85
MEM_B_BS<2>
87
30 15
30 15
30 15
89
MEM_B_A<12>
MEM_B_A<9>
MEM_B_A<8>
91
93
95
30 15
30 15
30 15
97
MEM_B_A<5>
MEM_B_A<3>
MEM_B_A<1>
99
101
103
30 15
30 15
30 15
105
MEM_B_A<10>
MEM_B_BS<0>
MEM_B_WE_L
107
109
111
30 15
30 14
113
MEM_B_CAS_L
MEM_CS_L<3>
115
117
30 14
119
MEM_ODT<3>
121
15
15
123
MEM_B_DQ<32>
MEM_B_DQ<33>
125
127
15 5
15 5
129
MEM_B_DQS_N<4>
MEM_B_DQS_P<4>
131
133
15
15
135
MEM_B_DQ<34>
MEM_B_DQ<35>
137
139
15
15
141
MEM_B_DQ<40>
MEM_B_DQ<41>
143
145
15
147
MEM_B_DM<5>
149
15
15
151
MEM_B_DQ<42>
MEM_B_DQ<43>
153
155
15 5
15
157
MEM_B_DQ<48>
MEM_B_DQ<49>
159
161
NC
163
165
15 5
15 5
167
MEM_B_DQS_N<6>
MEM_B_DQS_P<6>
169
171
15
15
173
MEM_B_DQ<50>
MEM_B_DQ<51>
175
177
15
15
179
MEM_B_DQ<56>
MEM_B_DQ<57>
181
183
15
185
MEM_B_DM<7>
187
29 28 6
=PPSPD_S0_MEM
15
15
C2951
C2952
2.2UF
0.1uF
20%
20%
6.3V
10V
CERM1 2
603
189
MEM_B_DQ<58>
MEM_B_DQ<59>
191
193
1
28 27
CERM 2
28 27
195
=I2C_MEM_SDA
=I2C_MEM_SCL
197
199
402
DQ0
J2900
F-RT-SM1
DQ1
VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9
VSS0
DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1
VSS10
VSS11
DQS1*
DQS1
CK0
CK0*
VSS13
VSS12
DQ14
DQ15
DQ10
DQ11
VSS14
VSS15
KEY
VSS16
DQ16
VSS17
DQ20
DQ17
DQ21
VSS18
DQS2*
VSS19
NC0
DQS2
DM2
VSS21
DQ18
VSS22
DQ22
DQ19
VSS23
DQ23
VSS24
DQ24
DQ28
DQ25
VSS25
DQ29
VSS26
DM3
DQS3*
NC1
VSS27
DQS3
VSS28
DQ26
DQ30
DQ27
VSS29
DQ31
VSS30
CKE0
VDD0
NC/CKE1
VDD1
NC2
NC/A15
BA2
VDD2
NC/A14
VDD3
A12
A11
A9
A8
A7
A6
VDD4
VDD5
A5
A3
A4
A2
A1
VDD6
A0
VDD7
A10/AP
BA1
BA0
WE*
RAS*
S0*
VDD8
VDD9
CAS*
NC/S1*
ODT0
NC/A13
VDD10
VDD11
NC/ODT1
VSS31
NC3
VSS32
DQ32
DQ33
DQ36
DQ37
VSS33
VSS34
DQS4*
DQS4
DM4
VSS35
VSS36
DQ38
DQ34
DQ35
DQ39
VSS37
VSS38
DQ44
DQ40
DQ41
DQ45
VSS39
VSS40
DM5
DQS5*
DQS5
VSS41
VSS42
DQ42
DQ43
DQ46
DQ47
VSS43
VSS44
DQ48
DQ49
DQ52
DQ53
VSS45
VSS46
NC_TEST
VSS47
CK1
CK1*
DQS6*
DQS6
VSS48
DM6
VSS49
VSS50
DQ50
DQ51
DQ54
DQ55
VSS51
VSS52
DQ56
DQ57
DQ60
DQ61
VSS53
VSS54
DM7
VSS55
DQS7*
DQS7
DQ58
DQ59
VSS56
DQ62
VSS57
DQ63
SDA
SCL
VSS58
SA0
VDDSPD
516S0404
CRITICAL
GND
SA1
205
VREF
VSS1
DDR2-SODIMM-REV
5 6 28 29
OMIT
1
MEM_VREF
204
28 5
=PP1V8_S3_MEM
203
Page Notes
=PP1V8_S3_MEM
5
29 28 6 5
202
201
TABLE_5_HEAD
MEM_B_DQ<4>
MEM_B_DQ<5>
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
J2900
CRITICAL
BOM OPTION
15
TABLE_5_ITEM
516S0504
15
8
10
MEM_B_DM<0>
15
12
14
MEM_B_DQ<6>
MEM_B_DQ<7>
16
5 15
15
18
20
MEM_B_DQ<12>
MEM_B_DQ<13>
22
15
15
24
26
MEM_B_DM<1>
15
28
30
MEM_CLK_P<3>
MEM_CLK_N<3>
32
14
14
34
36
MEM_B_DQ<14>
MEM_B_DQ<15>
38
15
15
40
42
44
MEM_B_DQ<20>
MEM_B_DQ<21>
46
15
15
48
50
DIMM_OVERTEMP_L
MEM_B_DM<2>
52
28 59
15
54
56
MEM_B_DQ<22>
MEM_B_DQ<23>
58
15
5 15
60
62
MEM_B_DQ<28>
MEM_B_DQ<29>
64
15
15
66
68
MEM_B_DQS_N<3>
MEM_B_DQS_P<3>
70
5 15
5 15
72
74
MEM_B_DQ<30>
MEM_B_DQ<31>
76
15
15
78
80
MEM_CKE<3>
14 30
82
84
TP_MEM_B_A<15>
TP_MEM_B_A<14>
86
5
5
88
90
MEM_B_A<11>
MEM_B_A<7>
MEM_B_A<6>
92
94
15 30
15 30
15 30
96
29 28 6 5
98
MEM_B_A<4>
MEM_B_A<2>
MEM_B_A<0>
100
102
=PP1V8_S3_MEM
15 30
15 30
15 30
104
106
MEM_B_BS<1>
MEM_B_RAS_L
MEM_CS_L<2>
108
110
15 30
15 30
C2908
C2909
C2910
1UF
1UF
1UF
10%
10%
10%
6.3V
2 6.3V
CERM
CERM
402
C2911
1UF
10%
2 6.3V
CERM
402
2 6.3V
CERM
402
402
14 30
112
114
MEM_ODT<2>
MEM_B_A<13>
116
14 30
15 30
118
120
C2912
122
MEM_B_DQ<36>
MEM_B_DQ<37>
126
C2914
1UF
1UF
10%
10%
6.3V
2 CERM
402
124
C2913
10%
6.3V
2 CERM
NC
1UF
C2915
1UF
10%
6.3V
2 CERM
402
6.3V
2 CERM
402
402
15
15
128
130
MEM_B_DM<4>
15
C2916
1UF
132
MEM_B_DQ<38>
MEM_B_DQ<39>
136
10%
2 6.3V
CERM
402
C2919
1UF
10%
2 6.3V
CERM
402
15
C2918
1UF
10%
2 6.3V
CERM
5 15
1UF
10%
134
C2917
2 6.3V
CERM
402
402
138
140
MEM_B_DQ<44>
MEM_B_DQ<45>
142
5 15
15
144
146
MEM_B_DQS_N<5>
MEM_B_DQS_P<5>
148
5 15
C2920
150
MEM_B_DQ<46>
MEM_B_DQ<47>
154
C2922
1UF
1UF
10%
10%
6.3V
2 CERM
402
152
C2921
10%
6.3V
2 CERM
5 15
1UF
C2923
1UF
10%
6.3V
2 CERM
402
6.3V
2 CERM
402
402
15
15
156
158
MEM_B_DQ<52>
MEM_B_DQ<53>
160
15
15
162
164
MEM_CLK_P<2>
MEM_CLK_N<2>
166
14
14
168
170
MEM_B_DM<6>
15
172
174
MEM_B_DQ<54>
MEM_B_DQ<55>
176
15
15
178
SYNC_MASTER=(MASTER)
180
MEM_B_DQ<60>
MEM_B_DQ<61>
182
15
15
184
186
MEM_B_DQS_N<7>
MEM_B_DQS_P<7>
188
=PPSPD_S0_MEM
MEM_B_DQ<62>
MEM_B_DQ<63>
194
6 28 29
5 15
5 15
190
192
R2900
10K
5 15
15
196
5%
1/16W
MF-LF
402
SIZE
ADDR=0XA4(WR)/0XA5(RD)
198
200
SYNC_DATE=(MASTER)
MEM_B_SPD_SA1
DRAWING NUMBER
D
SCALE
ALL NCS
SHT
NONE
REV.
051-7148
13
OF
29
110
One cap for each side of every RPAK, one cap for every two discrete resistors
BOMOPTION shown at the top of each group applies to every part below it
29 28 14
IN
MEM_CS_L<3..0>
0
1
2
3
RP3000
R3001
RP3001
RP3002
3
56
1
56
2
56
4
56
=PP0V9_S0_MEM_TERM
6
2
7
5
5% 1/16W SM-LF
5% 1/16W MF-LF 402
5% 1/16W SM-LF
5% 1/16W SM-LF
D
29 28 14
IN
MEM_CKE<3..0>
0
1
2
3
RP3003
RP3004
RP3005
RP3006
56
56
56
56
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
IN
MEM_ODT<3..0>
0
1
2
3
28 15
IN
MEM_A_A<13..0>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
RP3000
R3009
RP3001
R3011
RP3007
RP3008
RP3007
RP3008
RP3007
RP3008
RP3007
RP3004
RP3008
RP3003
RP3009
RP3004
RP3003
R3025
4
56
1
56
3
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
20%
10V
CERM
402
0.1uF
2
5% 1/16W SM-LF
5% 1/16W MF-LF 402
5% 1/16W SM-LF
5% 1/16W MF-LF 402
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
C3010
20%
10V
CERM
402
IN
MEM_A_BS<2..0>
0
1
2
RP3009
RP3000
RP3003
56
56
56
20%
10V
CERM
402
5% 1/16W SM-LF
5% 1/16W SM-LF
C3011
0.1uF
20%
10V
CERM
402
C3030
0.1uF
20%
10V
CERM
402
C3033
0.1uF
20%
10V
CERM
402
5% 1/16W SM-LF
5% 1/16W MF-LF 402
0.1uF
C3035
0.1uF
28 15
C3007
5
2
0.1uF
5% 1/16W SM-LF
29 28 14
C3005
20%
10V
CERM
402
5% 1/16W SM-LF
28 15
IN
28 15
IN
28 15
IN
RP3000
RP3009
RP3009
MEM_A_RAS_L
MEM_A_CAS_L
MEM_A_WE_L
56
56
56
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
29 15
IN
RP3011
RP3010
RP3011
R3035
RP3011
RP3010
RP3006
RP3006
RP3010
RP3005
RP3010
RP3006
RP3005
RP3001
MEM_B_A<0>
MEM_B_A<3>
MEM_B_A<2>
MEM_B_A<10>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<1>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
56
56
56
5% 1/16W SM-LF
5% 1/16W SM-LF
1
56
1
56
2
56
4
56
3
56
1
56
4
56
4
56
2
56
3
56
4
56
2
8
5% 1/16W SM-LF
5% 1/16W MF-LF 402
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
IN
5% 1/16W SM-LF
MEM_B_BS<2..0>
0
1
2
RP3002
RP3011
RP3005
56
56
56
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
29 15
IN
29 15
IN
29 15
IN
RP3001
RP3002
RP3002
MEM_B_RAS_L
MEM_B_CAS_L
MEM_B_WE_L
56
56
56
0.1uF
20%
10V
CERM
402
C3009
20%
10V
CERM
402
C3006
0.1uF
0.1uF
2
29 15
C3004
20%
10V
CERM
402
C3008
0.1uF
20%
10V
CERM
402
C3013
0.1uF
20%
10V
CERM
402
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
C3014
0.1uF
2
20%
10V
CERM
402
C3015
0.1uF
2
20%
10V
CERM
402
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
30
110
8
Page Notes
=PP5V_S0_MEMVTT
MEMVTT_EN_PU
R3100 1
5%
1/16W
MF-LF
402
C3100
1uF
1K
2
10%
6.3V
CERM
402
R3101
=PP1V8_S0_MEMVTT
220
5%
1/16W
MF-LF
402
U3100_VDDQ
C3109
2.2UF
10%
6.3V
CERM1
603
VDDQ
VCC
U3100
BD3533FVM
MSOP-8
79
C3101
C3110
10UF
0.1UF
20%
6.3V
CERM
805-1
20%
10V
CERM
402
MEMVTT_EN
VTT_IN
EN
VTTS
VTT
VREF
MEMVTT_VREF
CRITICAL
3
C3102
10UF
20%
6.3V
CERM
805-1
GND
CRITICAL
C3105
150UF
20%
6.3V
POLY
SMC-LF
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
31
110
10UF
10%
FERR-120-OHM-1.5A
1
402
6 33 34
C3310
1UF
20%
2 6.3V
CERM
805-1
2 16V
X5R
=PP3V3_S0_CK410
0402-LF
5%
1/16W
MF-LF
402
C3308 1 C3309
0.1UF
2.2
L3302
R3302
PP3V3_S0_CK410_VDD48
10%
2 6.3V
CERM
402
D
L3301
FERR-120-OHM-1.5A
34 33 6
=PP3V3_S0_CK410
PP3V3_S0_CK410_VDD_CPU_SRC
PP3V3_S0_CK410_VDD_PCI
0402-LF
1
C3314
1UF
0.1UF
20%
2 6.3V
CERM
805-1
10%
6.3V
2 CERM
402
10%
2 16V
X5R
402
0.1UF
10%
2 16V
X5R
402
0.1UF
0.1UF
10%
2 16V
X5R
402
10%
2 16V
X5R
402
0.1UF
10%
2 16V
X5R
402
0.1UF
10%
10%
2 16V
X5R
2 16V
X5R
402
402
R3304
R3303
PP3V3_S0_CK410_VDDA
C3312 C3311
1
10UF
0.1UF
18PF
5%
2 50V
CERM
402
18PF
34
R3301
10K
5%
1/16W
MF-LF
2402
34
34
OUT
OUT
IN
CK410_FSB_TEST_MODE
34
(FW PCI 33MHZ)
OUT CK410_PCI1_CLK
(TPM LPC 33MHZ) 34 OUT CK410_PCI2_CLK
(SMC LPC 33MHZ) 34 OUT CK410_PCI3_CLK
34
(NOT USED)
OUT CK410_PCI4_CLK
34 CK410_PCI5_FCTSEL1
(INT PD)
IO
CK410_PCIF0_CLK
CK410_PCIF1_ITP_EN
28
35
17
12
QFN
CY284455
=PP3V3_S0_CK410
1
U3301
5%
50V
2 CERM
402
CK410_XTAL_IN
CK410_XTAL_OUT
34 33 6
VDD_SRC2
VDD_SRC3
C3390
VDD_SRC1
VDD_SRC0
3
VDD48
5X3.2-SM
C3389
C3307
402
CRITICAL
10%
402
Y3301
5%
1/16W
MF-LF
402
2 16V
X5R
14.31818
1
0.1UF
10%
2 16V
X5R
49
20%
2 6.3V
CERM
805-1
VDD_REF
61
67
5%
1/16W
MF-LF
402
PP3V3_S0_CK410_VDD_REF
43
VDD_PCI0
VDD_PCI1
2.2
VDD_CPU
10UF
20%
2 6.3V
CERM
805-1
38
39
VDDA
VSSA
51
50
XIN
PCI_STP*
CPU_STP*
OMIT
FSB
68
1
23
34
CPUT0
CPUC1
CPUT1
41
42
34
CPUC2_ITP/SRCC_10
36
37
CPUT2_ITP/SRCT_10
SRCC_0/LCD100MC
34
34
34
34
PM_STPPCI_L
PM_STPCPU_L
CK410_CPU1_N
CK410_CPU1_P
OUT
CK410_LVDS_N
CK410_LVDS_P
34
14
13
9
CK410_SRC1_N
34 CK410_SRC1_P
CK410_SRC_CLKREQ1_L
SRCC_2
SRCT_2
16
15
SRCC_3
19
18
59
SRCT_0/LCD100MT
SRCC_1
SRCT_1
PCIF0/ITP_SEL
PCIF1
34
34
34
34
IN
OUT
CK410_CPU2_ITP_SRC10_N
CK410_CPU2_ITP_SRC10_P
34
IN
CK410_CPU0_N
CK410_CPU0_P
11
10
PCI1
PCI2
PCI3
PCI4
PCI5/FCTSEL1
23
44
45
CPUC0
XOUT
57
58
63
64
65
56 (INT PU)
55 (INT PU)
CK410_SRC2_N
CK410_SRC2_P
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
27
IN
27
IO
SMB_CK410_CLK
SMB_CK410_DATA
47
48
CK410_IREF
SCLK
SDATA
40
SRCT_3
(INT PU) CLKREQ_3*
IREF
SRCC_4
SRCT_4
(INT PU) CLKREQ_4*
VSS48
22
21
20
34
CK410_SRC3_N
CK410_SRC3_P
CK410_SRC_CLKREQ3_L
23
CK410_SRC4_N
CK410_SRC4_P
SB_CLK100M_SATA_OE_L
34
OUT
34
OUT
34
34
R3300
475
1%
1/16W
MF-LF
2 402
46
VSS_CPU
62
VSS_PCI0
66
VSS_PCI1
52
VSS_REF
SRCC_6
SRCT_6
31
VSS_SRC
27
26
25
69
THRML_PAD
SRCC_7
SRCT_7
30
29
SRCC_8
32
33
34
SRCC_5
SRCT_5
SRCT_8
24
23
60
34
34
14
53
34
34
CK410_SRC8_N
34 CK410_SRC8_P
CK410_SRC_CLKREQ8_L
26
4
54
53
34
34
34
OUT
OUT
IN
34
34
CK410_PD_VTT_PWRGD_L
CK410_USB48_FSA
CK410_CLK14P3M_TIMER
CK410_REF1_FCTSEL0
OUT
OUT
IN
OUT
OUT
IN
OUT
(NOT USED )
OUT
OUT
OUT
IN
CK410_DOT96_27M_SPREAD_N
CK410_DOT96_27M_NONSPREAD_P
REF0/FSC
CK410_SRC7_N
CK410_SRC7_P
34
7
6
34 CK410_SRC6_N
34 CK410_SRC6_P
CK410_SRC_CLKREQ6_L
34
DOT96C/27MHZ_SPREAD
DOT96T/27MHZ_NON-SPREAD
FSA/48M
CK410_SRC5_N
CK410_SRC5_P
CLK_NB_OE_L
IN
IN
OUT
OUT
OUT
OUT
IO
CLOCKS
FCTSEL1
0
FCTSEL0
0
PIN 6
DOT96T
PIN 7
DOT96C
PIN 10
100MT_SST
SYNC_MASTER=CLOCK
PIN 11
100MC_SST
DOT96T
DOT96C
SRCT0
SRCC0
27M NON
SPREAD
27M
SPREAD
SRCT0
SRCC0
OFF LOW
TBD
SRCT0
SRCC0
SYNC_DATE=06/03/2005
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
33
110
=PP3V3_S0_CK410
33
CK410_SRC_CLKREQ1_L
(GPU CLK OE*)
33
CK410_SRC_CLKREQ3_L
(SPARE CLK OE*)
33
R3495
R3494
R3493
6 33
1K
1K
33
CK410_SRC_CLKREQ8_L
(YUKON CLK OE*)
IO
CK410_PCI5_FCTSEL1
R3499
1/16W
1K
1K
33
IN
33
IN
33
IN
33
IN
5% MF-LF 402
R3497
1
2.2K 2
CK410_SRC3_P
CK410_SRC3_N
33
33
CK410_SRC7_P
CK410_SRC7_N
33
33
R3492
R3491
R3490
R3489
SPARE_SRC3_P
SPARE_SRC3_N
SPARE_SRC7_P
SPARE_SRC7_N
R3488
R3487
R3486
R3485
49.9
49.9
49.9
49.9
CK410_FSC 34
5%
1/16W
MF-LF
402
33
IN
CK410_CLK14P3M_TIMER
R3498
33
SB_CLK14P3M_TIMER OUT
5 23
33
IN
CK410_REF1_FCTSEL0
R3496
33
TP_CLK14P3M_SPARE OUT
34 12 5
R3451
1
34 12 5
2.2K 2
CK410_FSA 34
34 7 5
5%
1/16W
MF-LF
402
34 7 5
STUFF
R3454
R3459
R3463
R3452
R3457
R3461
R3452
R3461
CPU DRIVEN
533MHZ
(133MHZ CPU CLK)
667MHZ
(166MHZ CPU CLK)
NO STUFF
R3452
R3457
R3461
R3454
R3459
R3463
R3454
R3459
R3463
R3457
IN
CK410_USB48_FSA
R3400
33
34
SB_CLK48M_USBCTLR OUT
34
5 23
53 34
33
IN
CK410_PCI4_CLK
R3406
33
TP_PCI_CLK_SPARE OUT
53 34
34 14 5
33
IN
CK410_PCI3_CLK
33
IN
CK410_PCI2_CLK
IN
CK410_PCI1_CLK
R3405
R3404
R3403
34 14 5
33
33
PCI_CLK_SMC OUT
58
PCI_CLK_TPM OUT
67
PCI_CLK_FW OUT
44
33
34 21 5
34 21 5
PP1V05_S0
34 22 5
NOSTUFF
1
R3452
56
R3453
1
NB_BSEL<0>
1K
1/16W 5%
34
FSB_CLK_CPU_P
FSB_CLK_CPU_N
R3431
R3432
FSB_CLK_XDP_P
FSB_CLK_XDP_N
R3433
R3434
AIRPORT_CLK100M_PCIE_P
AIRPORT_CLK100M_PCIE_N
R3435
R3436
NB_CLK100M_GCLKIN_P
NB_CLK100M_GCLKIN_N
R3438
R3437
SB_CLK100M_SATA_P
SB_CLK100M_SATA_N
R3439
R3440
SB_CLK100M_DMI_P
SB_CLK100M_DMI_N
R3442
R3441
ENET_CLK100M_PCIE_P
ENET_CLK100M_PCIE_N
R3443
R3444
GPU_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
R3446
R3445
49.9
49.9
49.9
49.9
49.9
49.9
CK410_PCIF1_ITP_EN
IN
CK410_PCIF0_CLK
R3401
R3402
33
PCI_CLK_SB OUT
33
PCI_CLK_PORT80 OUT
49.9
49.9
41 34 5
5 22
41 34 5
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
60
84 34 5
84 34 5
49.9
49.9
R3454
0
5%
1/16W
MF-LF
2 402
MF-LF 402
R3455
CPU_BSEL<0>
B
81 34 6
R3456
1K
R3458
1
NB_BSEL<1>
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
CK410_CPU1_P
CK410_CPU1_N
33
33
CK410_CPU0_P
CK410_CPU0_N
33
33
CK410_CPU2_ITP_SRC10_P
CK410_CPU2_ITP_SRC10_N
33
33
1K
1/16W 5%
R3457
0
5%
1/16W
MF-LF
2 402
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
33
IN
NOSTUFF
1
5%
1/16W
MF-LF
2 402
MF-LF 402
CK410_FSB_TEST_MODE
R3411
R3412
R3459
0
5%
1/16W
MF-LF
2 402
CPU_BSEL<1>
33
IN
33
IN
PP1V05_S0
FSB_CLK_NB_P OUT
FSB_CLK_NB_N OUT
FSB_CLK_CPU_P OUT
FSB_CLK_CPU_N OUT
34
MAKE_BASE=TRUE
34
5 12 34
5 12 34
5 7 34
5 7 34
FSB_CLK_XDP_P
FSB_CLK_XDP_N
CPU_XDP_CLK_P
CPU_XDP_CLK_N
11
11
MAKE_BASE=TRUE
CK410_SRC6_P
CK410_SRC6_N
33
33
CK410_SRC5_P
CK410_SRC5_N
33
33
CK410_SRC4_P
CK410_SRC4_N
33
33
CK410_SRC2_P
CK410_SRC2_N
33
33
CK410_SRC8_P
CK410_SRC8_N
33
33
CK410_SRC1_P
CK410_SRC1_N
33
33
81 34 6
R3407
R3408
R3409
R3410
PP1V05_S0
1
1K
33
IN
33
MF-LF 402
1/16W 5%
14
33
5%
1/16W
MF-LF
2 402
CK410_FSA
1
34 22 5
14
R3429
R3430
33
81 34 6
1%
402
1/16W
MF-LF
FSB_CLK_NB_P
FSB_CLK_NB_N
R3413
R3414
R3415
R3416
R3417
R3418
R3419
R3420
R3421
R3422
R3423
R3424
CK410_LVDS_P
CK410_LVDS_N
AIRPORT_CLK100M_PCIE_P OUT
AIRPORT_CLK100M_PCIE_N OUT
NB_CLK100M_GCLKIN_P
NB_CLK100M_GCLKIN_N
34 53
OUT
5 14 34
OUT
5 14 34
SB_CLK100M_SATA_P OUT
SB_CLK100M_SATA_N OUT
SB_CLK100M_DMI_P OUT
SB_CLK100M_DMI_N OUT
ENET_CLK100M_PCIE_P OUT
ENET_CLK100M_PCIE_N OUT
GPU_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
34 53
5 21 34
5 21 34
5 22 34
5 22 34
5 34 41
5 34 41
OUT
5 34 84
OUT
5 34 84
TP_CK410_LVDS_P
TP_CK410_LVDS_N
R3460
1K
R3462
14
NB_BSEL<2>
1K
1/16W 5%
34
NOSTUFF
1
R3461
5%
1/16W
MF-LF
2 402
33
IN
33
IN
CK410_DOT96_27M_SPREAD_N
CK410_DOT96_27M_NONSPREAD_P
33
33
R3470
R3471
CK410_27M_SPREAD
CK410_27M_NONSPREAD
OUT
92
OUT
92
CLOCKS:
5%
1/16W
MF-LF
2 402
SYNC_DATE=N/A
MF-LF 402
CK410_FSC
R3463
5%
1/16W
MF-LF
2 402
7
TERMINATIONS
SYNC_MASTER=N/A
CPU_BSEL<2>
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
34
110
PATA CONNECTOR
38 6
=PP5V_S0_PATA
=PP3V3_S0_PATA
NO STUFF 1
NOSTUFF 1
R3852
10K
R3824
10K
CRITICAL
F-ST-SM
51
R3851
5%
1/16W
MF-LF
2 402
1K
NC
IDE_RESET_L
38 23
21
21
21
21
21
21
21
21
21
21 5
21
OUT
OUT
IDE_RESET_L
IDE_PDD<7>
IDE_PDD<6>
IDE_PDD<5>
IDE_PDD<4>
IDE_PDD<3>
IDE_PDD<2>
IDE_PDD<1>
IDE_PDD<0>
IDE_PDIOW_L
IDE_PDIORDY
IDE_IRQ14
21
21
NO STUFF
C3804
21
10pF
IDE_PDA<1>
IDE_PDA<0>
IDE_PDCS1_L
IDE_DASP_L
5%
50V
CERM 2
402
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
IDE_CSEL_PD
R3853
4.7K
2
38 23
804RVS-0501S5RGM
1K
JC901
R2389
NC
NC
NC
2
Obsolete
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
21
5 21
21
21
21
21
21
21
IDE_PDIOR_L
5 21
IDE_PDDACK_L
IDE_IOCS16_PU
IDE_PDA<2>
IDE_PDCS3_L
21
46
47
48
49
50
NC
C3805
C3806
20%
10V
2 CERM
805-2
2 CERM
52
10UF
0.1uF
10V
OUT
21
20%
21
21
NC
402
516S0327
IDE_PDDREQ
SATA_RBIAS_N
21
SATA_RBIAS_P
OUT
SATA_RBIAS
38 6
MAKE_BASE=TRUE
R3858 1R3859
DEVELOPMENT 1
R3857
24.9
1/16W
MF-LF
402
1%
499
R3897
=PP5V_S0_PATA
1
OUT
DEVELOPMENT
1% 1/16W
402 MF-LF
LED3800
NOTE: ???
6.2K
5%
1/16W
MF-LF
2 402
PER ATA7 SPEC
STUFFED PER LARRY
IDE_DASP_L_DS
5%
1/16W
MF-LF
2 402
GREEN-3.6MCD
2.0X1.25MM-SM
"IDE ACTIVE"
SATA CONNECTOR
JC900
EP00-081-91
M-ST-SM
1
2
3
SATA_C_R2D_P
SATA_C_R2D_N
0.0047UF 1
SATA_C_D2R_C_N
SATA_C_D2R_C_P
0.0047UF 1
402
402
C3803
0.0047UF 1
4
5
6
21
2
402
C3801
C3800
0.0047UF 1
23
21
21
2
402
C3802
21
SATA_C_DET_L
OUT
SATA_C_R2D_C_P
SATA_C_R2D_C_N
IN
R3899
IN
100
SATA_C_D2R_N
SATA_C_D2R_P
OUT
5%
1/16W
MF-LF
2 402
OUT
518S0251
GV3801
GV3802
HOLE-VIA-P5RP25
HOLE-VIA-P5RP25
GV3803
GV3804
HOLE-VIA-P5RP25
IN
SATA_A_R2D_C_P
21
IN
SATA_A_R2D_C_N
HOLE-VIA-P5RP25
21
GV3805
Disk Connectors
TP_SATA_A_R2D_P
MAKE_BASE=TRUE
TP_SATA_A_R2D_N
HOLE-VIA-P5RP25
21
1
21
GV3807
GV3808
HOLE-VIA-P5RP25
OUT
SATA_A_D2R_P
OUT
SATA_A_D2R_N
TP_SATA_A_D2R_P
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
MAKE_BASE=TRUE
TP_SATA_A_D2R_N
MAKE_BASE=TRUE
HOLE-VIA-P5RP25
MAKE_BASE=TRUE
GV3806
HOLE-VIA-P5RP25
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
38
110
C4101
0.1UF
C4102
0.1UF
10%
16V
2 X5R
402
=PP2V5_S3_ENET
42 41
C4103
0.1UF
10%
2 16V
X5R
402
10%
2 16V
X5R
402
C4104
0.1UF
C4105
0.001UF
C4150
0.001UF
10%
2 50V
CERM
402
10%
2 16V
X5R
402
10%
2 50V
CERM
402
D
=PP3V3_S3_ENET
6 41 42
TEST
1%
1/16W
MF-LF
402
49.9 2
R4105
1%
1/16W
MF-LF
402
49.9 2
R4103
1%
1/16W
MF-LF
402
49.9 2
R4106
49.9 2
R4104
64
43
MDIP1 20
MDIN1 21
43
MDIP2 26
MDIN2 27
43
MDIP3 30
MDIN3 31
43
43
43
TWSI
VPD_CLK 38
VPD_DATA 41
TEST
PU_VDDO_TTL0 42
PU_VDDO_TTL1 43
SPI
43
43
ENET_VPD_CLK
ENET_VPD_DATA
4.7K
4.7K
ENET_PU_VDDO_TTL0
ENET_PU_VDDO_TTL1
ENET_MDI_P<0> IO
ENET_MDI_N<0> IO
ENET_MDI_P<1> IO
ENET_MDI_N<1> IO
ENET_MDI_P<2> IO
ENET_MDI_N<2> IO
ENET_MDI_P<3> IO
ENET_MDI_N<3> IO
41
41
R4130
R4131
=PP3V3_S3_ENET 6
41 42
SPI_DI 35
SPI_DO 34
SPI_CLK 37
1% 1/16W
402 MF-LF
TESTMODE
IN
MDIP0 17
MDIN0 18
49.9 2
TSTPT
46
C4113
OUT
MEDIA
LINK*
29
IN
1%
1/16W
MF-LF
402
LED
IN
R4117
LED_LINK10/100*
LED_LINK1000*
42
PCIE_A_R2D_C_P
PCIE_A_R2D_C_N
1% 1/16W
402 MF-LF
LED_ACT*
60
4.75K2
RSET
59
62
63
R4102
CTRL25
CTRL12
0.1UF
IN
PCIE_WAKE_L
ENET_GATED_RST_L
ENET_C4107_2
CERM 402
20% 10V
IN
53 23
22
49.9 2
1
16
ENET_LED_ACT_L
ENET_LED_LINK10_100_L
ENET_LED_LINK1000_L
ENET_LED_LINK_L
WAKE* 6
PERST* 5
22
R4118
ENET_RSET
ENET_CLK100M_PCIE_P
ENET_CLK100M_PCIE_N
1% 1/16W
402 MF-LF
ENET_CTRL25
ENET_CTRL12
34 5
1
1
49.9 2
OUT
PCI EXPRESS
ANALOG
HSDACN
0.1UF
20% 10V
CERM 402
PCIE_A_R2D_P
PCIE_A_R2D_N
34 5
10%
50V
402
ENET_C4106_2
OUT
42
0.1UF
REFCLKP 55
REFCLKN 56
0.001UF
OUT
C4112
C4111
RX_N 53
C4107
2 CERM
PCIE_A_D2R_P OUT
PCIE_A_D2R_N
R4119
42
HSDACP
22 5
49.9 2
NC 24
NC 25
22 5
CERM 402
20% 10V
88E8053
QFN
VDD25
57
52
51
AVDDL4
32
AVDDL3
28
AVDDL2
22
AVDDL1
19
AVDDL0
AVDDL5
23
AVDD
AVDDL6
U4101
SWITCH_VCC
SWITCH_VAUX
PCIE_A_D2R_C_N
TX_P 49
TX_N 50
RX_P 54
OMIT
VMAIN_AVLBL
PCIE_A_D2R_C_P
NC 11
NC 9
LOM_DISABLE*
VAUX_AVLBL
20% 10V
CERM 402
1
10%
50V
2 CERM
402
1% 1/16W
402 MF-LF
VMAIN_AVLBL
61
VDDO_TTL4
45
VDDO_TTL3
40
VDDO_TTL2
8
VDDO_TTL1
1
VDDO_TTL0
10
12
47
48
44
VDD5
39
VDD4
33
VDD3
13
VDD2
7
VDD1
2
VDD0
58
ENET_LOM_DIS_L
VDD6
VDD7
5%
1/16W
MF-LF
402
4.7K 2
R4101
5%
1/16W
MF-LF
402
NOSTUFF
R4151
0
1
5%
1/16W
MF-LF
402
R4150
PP3V3_S0
C4106
0.001UF
0.1UF
41 42
88 76 61 59 26 11 10 6
C4110
=PP2V5_S3_ENET
1%
1/16W
MF-LF
402
42 41
=PP1V2_S3_ENET
=PP3V3_S3_ENET
R4120
42 41 6
SPI_CS 36
MAIN CLK
ENET_C4117_1
XTALI 15 ENET_XTALI
XTALO 14 ENET_XTALO
THRML_PAD
65
C4117
0.001UF
Y4101
10%
50V
402
2 CERM
C4118
0.001UF
10%
50V
402
25.0000M
ENET_C4118_1
1
2 CERM
SM-3-LF
5%
2 27PF
50V 5%
2 50V
CERM
402
402
5%
1/16W
MF-LF
402
10%
4.7K 2
4.7K2
0.1UF
2 16V
X5R
C4140
R4122
=PP3V3_S3_ENET
R4123
42 41 6
5%
1/16W
MF-LF
402
402 CERM
C4116
27PF
C4115
8
3
2
1
7
42 41 6
42 41
=PP3V3_S3_ENET
C4126
0.1UF
10%
16V
2 X5R
402
10%
16V
2 X5R
402
ENET_VPD_DATA
41
ENET_VPD_CLK
41
VSS
=PP1V2_S3_ENET
1
VCC
E2
OMIT
NC1 U4102 SDA
NC0M24C08
SO8
SCL
WC*
0.1UF
10%
16V
2 X5R
402
0.1UF
10%
16V
2 X5R
402
C4130
0.1UF
10%
16V
2 X5R
402
C4131
0.001UF
10%
50V
2 CERM
402
C4132
0.001UF
10%
2 50V
CERM
402
C4133
0.001UF
10%
50V
2 CERM
402
C4134
0.001UF
10%
50V
2 CERM
402
C4135
0.1UF
10%
16V
2 X5R
C4136
0.1UF
10%
16V
2 X5R
402
402
C4137 C4138
0.001UF
1
0.1UF
10%
16V
2 X5R
402
10%
50V
402
2 CERM
C4139
ETHERNET CONTROLLER
0.001UF
10%
50V
402
2 CERM
SYNC_MASTER=ENET
SYNC_DATE=06/22/2005
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
41
110
D
41 6
L4200
=PP3V3_S3_ENET
FERR-330-OHM
1
Q4201_3
0805
6
C4200
10UF
10%
16V
2 CERM
1210
C4201
C4202
10UF
0.1UF
10%
16V
2 CERM
1210
10%
2 16V
X5R
402
C4203
4.7UF
20%
16V
2 CERM
1206-1
C4204
0.1UF
IN
ENET_RST_L
41
ENET_GATED_RST_L OUT
R4202
4.7K
10%
5%
1/16W
MF-LF
2 402
2 16V
X5R
402
CRITICAL
3
Q4201
PBSS5540Z
SOT223
4 2
41 IN
ENET_CTRL25
PP2V5_S3_ENET
1
C4205
4.7UF
20%
10V
2 CERM
1210
C4206
43
MAKE_BASE=TRUE
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
0.1UF
10%
16V
=PP2V5_S3_ENET
41
2 X5R
402
41
IN
ENET_CTRL12
TP_ENET_CTRL12
MAKE_BASE=TRUE
L4201
=PP1V2_S3_LAN
FERR-330-OHM
1
PP1V2_S3_ENET
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
0805
C4209
4.7UF
20%
6.3V
2 CERM
603
C4210
0.1UF
2
10%
16V
X5R
402
=PP1V2_S3_ENET
41
ETHERNET MISC
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
42
110
R4300
1
5%
1/16W
MF-LF
402
NOSTUFF
L4300
FERR-EMI-600-OHM
42
PP2V5_S3_ENET
PP2V5_ENET_CTAP
MIN_LINE_WIDTH=0.50mm
MIN_NECK_WIDTH=0.38mm
VOLTAGE=2.5V
SM
C4300
0.1UF
C4301
0.001UF
20%
2 50V
CERM
402
20%
2 10V
CERM
402
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
JD600
CRITICAL
BOM OPTION
TABLE_5_ITEM
514-0366
TABLE_ALT_HEAD
PART NUMBER
6
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
GND_CHASSIS_RJ45
C4304
0.001UF
10%
50V
CERM 2
402
OMIT
JD600
RJ45-M50
F-ANG-TH
PRIMARY
1CT:1CT
13
11
75 OHM
C
41
IO
41
IO
41
IO
41
IO
41
IO
41
IO
41
IO
41
IO
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
0
0
0
0
0
0
0
0
R4350
R4351
R4352
R4353
R4354
R4355
R4356
R4357
5
5
5
5
5
5
5
5
ENET_CTAP
ENET_CTAP
MDI_0+
MDI_0-
MDI_1+
MDI_1MDI_2+
ENET_MDI_R_P<0>
ENET_MDI_R_N<0>
ENET_MDI_R_P<1>
ENET_MDI_R_N<1>
ENET_MDI_R_P<2>
ENET_MDI_R_N<2>
ENET_MDI_R_P<3>
ENET_MDI_R_N<3>
MDI_2MDI_3+
10
MDI_3-
1CT:1CT
75 OHM
SECONDARY
J1
J2
J3
J4
1CT:1CT
75 OHM
J5
J6
J7
J8
1CT:1CT
RJ45
CABLE SIDE
12
75 OHM
RJ45
CHIP SIDE
SHIELD
1000PF, 2000V
B
1
C4305
0.001UF
10%
50V
2 CERM
402
ETHERNET CONNECTOR
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
43
110
NOSTUFF
R4411
1
L4409
600-OHM-300MA
46 45 44 6
=PP3V3_S5_FW
PP3V3_S5_FW_VDDA
45
0402
=PP3V3_S5_FW
0.1UF
VDDA2
VDDA1
VDDA0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
=PP3V3_S0_PCI
VDD0
PLLVDD
20%
2 10V
CERM
402
1
11
19
26
37
43
49
55
72
82
93
119
C4410
104
116
96
46 45 44 6
C4401
27PF
44
85 PCI_VIOS
IO
IO
22
22
IO
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
PCI_AD<19>
R4403
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
22
IO
26 22
IO
26 22
IO
26 22
IO
26 22
IO
26 22
IO
26 22
OUT
0
22 IN
26 22
IO
26 22
IO
34
IN
67 60 58 23 5
IO
44
26 22
IO
22
OUT
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
PCI_C_BE_L<0> 73
PCI_C_BE_L<1> 60
PCI_C_BE_L<2> 47
PCI_C_BE_L<3> 33
RESET*
PCI_AD7
PCI_AD8
123
PCI_AD10
PCI_AD11
R1
118
PCI_AD12
R0
117
FW_XTAL_X0
44
FW_RESET_L
412
TPBIAS0
114
113
112
111
110
109
108
107
106
105
101
100
99
98
97
FW_R1
FW_R0
PCI_AD13
PCI_AD14
27PF
C4402
0.1UF
1
2.49K2
10V 20%
MF-LF 402
44
TPA0_P
PCI_AD17
TPA0_N
TPB0_P
PCI_AD18
PCI_AD19
TPB0_N
PCI_AD20
TPBIAS1
TPA1_P
PCI_AD21
PCI_AD22
TPA1_N
PCI_AD23
TPB1_P
TPB1_N
PCI_AD24
PCI_AD25
TPBIAS2
TPA2_P
PCI_AD26
PCI_AD27
TPA2_N
PCI_AD28
TPB2_P
TPB2_N
PCI_AD29
PCI_AD30
CPS
LPS
PCI_AD31
PCI_CBE0*
LKON
PCI_CBE1*
PCI_CBE2*
CNA
NANDTREE
PCI_CBE3*
PC0
PC1
PCI_REQ*
PCI_GNT*
PCI_CLK_FW
PM_CLKRUN_L
20 PCI_CLK
13 CLKRUN*
PC2
CONTENDER
PCI_IRDY*
PCI_TRDY*
PCI_DEVSEL*
MPCIACT*
VAUX_PRESENT
PCI_STOP*
PCI_IDSEL
NU1
NU2
PCI_PERR*
PCI_SERR*
TEST0
TEST1
PTEST
SE
SM
PCI_RST_FW_L 15 PCI_RST*
INT_PIRQD_L
14 PCI_INTA*
PCI_PME_FW_L
18 PCI_PME/CSTSCHG*
3 CARDBUS*
FW_A_TPBIAS
46 FW_A_TPA_P
46 FW_A_TPA_N
46 FW_A_TPB_P
46 FW_A_TPB_N
46 FW_B_TPBIAS
46 FW_B_TPA_P
46 FW_B_TPA_N
46 FW_B_TPB_P
46 FW_B_TPB_N
46 FW_C_TPBIAS
46 FW_C_TPA_P
46 FW_C_TPA_N
46 FW_C_TPB_P
46 FW_C_TPB_N
FW_RESET_L
10
7
124
126
125
2
CERM 402
R4412
510K 2
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
R4414
FW_CPS
94
TP_FW_LPS
91
TP_FW_LKON
90
TP_FW_CNA
5
6 TP_FW_NANDTREE
FW_PC0
89
FW_PC1
88
FW_PC2
87
FW_CONTENDER
86
92
128
4
127
44
46
FW_XTAL_XR
PCI_AD15
PCI_AD16
C4412
HC49-USMD
2
1%
1/16W
MF-LF
402
1/16W 1%
17
16
57
58
R4416
FW_XTAL_X0
PCI_AD9
PCI_REQ1_L
PCI_GNT1_L
PCI_PERR_L
PCI_SERR_L
Y4400
R4413
PCI_PAR
PCI_FRAME*
TP (?)
44
PCI_AD6
59
48
51
52
53
54
34
T1:
R4410
44
TQFP
PCI_PAR
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_DEVSEL_L
PCI_STOP_L
PCI_IDSEL
FW_CARDBUS_L
122
FW_XTAL_XI
=PP12V_S5_FW_PHY
46
390K 2
1/16W 5%
MF-LF 402
R4409
1
10K
=PP3V3_S5_FW 6
44 45 46
10K
10K
10K
R4453
R4454
R4455
FW_TEST
10K
R4450
FW_SE
FW_SM
10K
10K
R4451
R4452
TP_FW_MPCIACT_L
TP_FW_VAUX_PRES
NC_FW_NU1
NC_FW_NU2
ROM_AD
TP_FW_ROM_AD
ROM_CLK
FW_ROM_CLK
10K
R4402
VSSA3
IO
22
121
102
VSSA0
103
VSSA1
115
VSSA2
95
22
22
XO
VSS12
VSS13
IO
VSS10
VSS11
22
FW32306
PCI_AD4
PCI_AD5
VSS9
IO
XI
U4400
VSS7
VSS8
22
PCI_AD2
PCI_AD3
24.576M
OMIT
VSS6
IO
PCI_AD1
VSS4
VSS5
22
PCI_AD0
VSS2
VSS3
IO
84
83
80
79
78
76
75
74
70
69
68
67
65
64
63
62
46
45
42
41
40
39
36
35
31
30
29
28
25
24
23
22
VSS1
22
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
VSS0
IO
CRITICAL
12
2
21
27
32
38
44
50
56
61
66
71
77
81
IO
120 PLLVSS
22
22
FW_XTAL_XI
10K
5%
1/16W
MF-LF
2 402
R4407
22
IN
PCI_RST_L
46 45 44 6
PCI_RST_FW_L
=PP3V3_S5_FW
44
150
FW: FW323-06
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
44
OF
13
110
D
46 44 6
=PP3V3_S5_FW
C4515
10UF
20%
2 6.3V
CERM
805-1
44
C4508
0.1UF
20%
2 10V
CERM
402
C4509
0.1UF
20%
2 10V
CERM
402
C4510
0.1UF
C4520
0.1UF
20%
2 10V
CERM
402
C4521
0.1UF
20%
2 10V
CERM
402
C4500
0.01UF
20%
2 10V
CERM
402
20%
2 16V
CERM
402
C4501
0.01UF
20%
2 16V
CERM
402
C4502
0.01UF
20%
2 16V
CERM
402
C4522
0.01UF
20%
2 16V
CERM
402
C4523
0.01UF
20%
16V
2 CERM
402
PP3V3_S5_FW_VDDA
C4503
10UF
20%
6.3V
2 CERM
805-1
C4507
0.1UF
20%
10V
2 CERM
402
C4506
0.1UF
20%
10V
2 CERM
402
C4505
0.01UF
20%
16V
2 CERM
402
C4504
0.01UF
20%
16V
2 CERM
402
FW: DECAPS
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
45
OF
13
110
7
6
CRITICAL
NOSTUFF
PP12V_FW
MIN_LINE_WIDTH=0.8MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=12V
MAKE_BASE=TRUE
FW_VP
=PP12V_S5_FW_PHY
44
MINISMD-LF
PPFW_PORTS_VP
0.1UF
PPFW_PORT0_VP
DP4610
DP4610
BAV99DW-X-F
BAV99DW-X-F
C4610
0.001UF
SOT-363
2
10%
50V
CERM 2
402
Termination
C4611 1
SOT-363
5
0.001UF
6
L4610
10%
50V
CERM 2
402
FERR-160-OHM
1206-LF
CRITICAL
FL4610
120-OHM
IO
SYM_VER-1
FW_PORT0_TPA_P
46 FW_PORT0_TPA_N
46
VOLTAGE=1.86V
CRITICAL
C4650
0.33UF
JE000
C4660
0.33UF
10%
6.3V
2 CERM-X5R
402
R46501
R4651 R46601
56.2
56.2
FLE011
120-OHM
CRITICAL
1%
1/16W
MF-LF
402 2
44
44
44
IO
IO
IO
IO
1%
1/16W
MF-LF
2 402
FW_PORT0_TPB_P
R4661
56.2
1%
1/16W
MF-LF
402 2
46
FW_PORT0_TPB_N
1%
1/16W
MF-LF
2 402
FW_A_TPA_P
FW_A_TPA_N
FW_A_TPB_P
FW_A_TPB_N
46
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FW_PORT0_TPA_P
FW_PORT0_TPA_N
FW_PORT0_TPB_P
FW_PORT0_TPB_N
FW_PORT0_TPA_FL_P
FW_PORT0_TPA_FL_N
FW_PORT0_TPB_FL_P
FW_PORT0_TPB_FL_N
2012
4
PPFW_PORT0_VP_FL
PP3V3_FW_ESD
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=33V
DP4611
DP4611
46
BAV99DW-X-F
BAV99DW-X-F
SOT-363
2
46
MAKE_BASE=TRUE
(TPA+)
(TPA-)
TPI
(TPB+)
TPI#
(TPB-)
VP
VGND
46
46
TPO
TPO#
SYM_VER-1
56.2
1394A-M50
F-ST-TH
10%
6.3V
2 CERM-X5R
402
46
44
PORT 0
1394A
2012
FW_B_TPBIAS
FW_A_TPBIAS
1
46
C4609
46
IO
PPFW_PORT1_VP
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=33V
10%
2 50V
X7R
603-1
5%
1/8W
MF-LF
805
MIN_LINE_WIDTH=0.8MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
SMC
I443
R4657
0
0.75AMP-13.2V
MURS320XXG
0.0252
F4602
D4600
R4656
1%
1W
MF
2512-1
44
=PP12V_S5_FW
8 WATTS MAX
12 VOLTS
44
10
SOT-363
5
IO
44
IO
44
IO
44
IO
FW_B_TPA_P
FW_B_TPA_N
FW_B_TPB_P
FW_B_TPB_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FW_PORT1_TPA_P
FW_PORT1_TPA_N
FW_PORT1_TPB_P
FW_PORT1_TPB_N
46
C4612
46
R4652
56.2
1%
1/16W
MF-LF
402 2
C4654
VOLTAGE=0V
220PF
1/16W
MF-LF
2 402
5%
25V
CERM 2
402
DP4620
BAV99DW-X-F
4.99K
C4620
1%
1/16W
MF-LF
2 402
5%
25V
CERM 2
402
20%
16V
CERM 2
402
PP3V3_FW_ESD
R4664
220PF
6 46
0.01uF
R4654
4.99K C4664 1
1%
GND_CHASSIS_FIREWIRE
C4616
1%
1/16W
MF-LF
2 402
FW_TPA_C<1>
VOLTAGE=0V
0.1UF
56.2
1%
1/16W
MF-LF
402 2
46
FW_TPA_C<0>
C4615
10%
50V
2 X7R
603-1
10%
50V
CERM 2
402
R4663
56.2
1%
1/16W
MF-LF
2 402
1
4
R4653 R4662
56.2
C4613 1
0.001UF
10%
50V
CERM 2
402
46
MAKE_BASE=TRUE
6
1
0.001UF
46
0.001UF
SOT-363
2
10%
50V
CERM 2
402
BAV99DW-X-F
C4621
0.001UF
6
SOT-363
5
10%
50V
CERM 2
402
PPFW_PORT1_VP
46
3
4
CRITICAL
FL4620
120-OHM
46
PORT 1
1394A
L4620
FERR-160-OHM
2012
1206-LF
SYM_VER-1
FW_PORT1_TPA_P
FW_PORT1_TPA_N
CRITICAL
2
46
44
44
44
44
IO
IO
IO
FW_C_TPBIAS
46 FW_PORT1_TPB_P
TP_FW_C_TPA_P
MAKE_BASE=TRUE
NO_TEST=TRUE
FW_C_TPA_N
FW_PORT1_TPA_FL_P
FW_PORT1_TPA_FL_N
FW_PORT1_TPB_FL_P
FW_PORT1_TPB_FL_N
2012
46
TP_FW_C_TPA_N
FW_PORT1_TPB_N
MAKE_BASE=TRUE
PPFW_PORT1_VP_FL
IO
FW_C_TPB_P
TP_FW_C_TPB_P
IO
FW_C_TPB_N
TP_FW_C_TPB_N
MAKE_BASE=TRUE
46
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=33V
PP3V3_FW_ESD
MAKE_BASE=TRUE
DP4621
DP4621
BAV99DW-X-F
BAV99DW-X-F
SOT-363
2
C4622
0.001UF
6
1
=PP3V3_S5_FW
374
PP3V3_FW_ESD
400-OHM-EMI
PP3V3_FW_ESD_F
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
(TPB-)
VGND
8
10
C4625
10%
50V
2 X7R
603-1
C4626
0.01uF
20%
16V
CERM 2
402
10%
50V
CERM 2
402
GND_CHASSIS_FIREWIRE
46
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
SM-1
402
[ LATE VG NOTES ]
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V
IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP
CRITICAL
D4690
SOT23
BZX84C2V7-X-F
SIZE
DRAWING NUMBER
SHT
NONE
REV.
051-7148
SCALE
6 46
1%
1/16W
MF-LF
(TPB+)
TPI#
FIREWIRE CONNECTORS
L4690
R4690
(TPA-)
TPI
0.1UF
C4623 1
0.001UF
45 44 6
(TPA+)
VP
SOT-363
5
10%
50V
CERM 2
402
ESD Rail
TPO
TPO#
SYM_VER-1
MAKE_BASE=TRUE
FW_C_TPA_P
F-ST-TH
FLE021
120-OHM
TP_FW_C_TPBIAS
JE001
1394A-M50
13
OF
46
110
CRITICAL
=PP5V_S3_BNDI
L4710
MINISMD-LF
C4752
0.1UF
C4713
L4712
120-OHM
22
USB_A_N
IO
USB_A_P
R4746
0
47 6
R4712
USB_PORT0_N
USB_PORT0_P
R4713
3
4
D4700
402
NOSTUFF
VDD
DD+
GND
CRITICAL
0.01uF
20%
16V
CERM 2
402
GND_CHASSIS_BNDI
F-ST-TH
5
6
C4743 1
0.01uF
JE310
47
USB-M50
SYM_VER-1
NOSTUFF
C4742
20%
16V
CERM 2
402
2012
1
GND_BNDI
VOLTAGE=0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
20%
16V
CERM 2
402
0.01uF
20%
16V
CERM 2
402
CRITICAL
IO
10UF
805
1/8W
MF-LF
5%
0.01uF
47
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C4797
20%
2 10V
CERM
805-2
PP5V_S3_BNDI
20%
2 6.3V
POLY
B2
C4712
22
100UF
20%
10V
CERM 2
402
C4710
740S0032
PP5V_USB2_PORT0_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
SM
1
FERR-250-OHM
PP5V_BNDI_LE340
PORT 0
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
SM
FERR-250-OHM
PP5V_USB2_PORT0
L4740
F4701
0.75AMP-13.2V
6
LAYOUT NOTE:
PLACE C4743, C4797 & L4740
NEAR JE350 PIN 14 IN THE
ORDER LISTED, AND NOT ON
BOTH SIDES OF THE PIN.
PLACE C4742 CLOSED TO JE350.
402
GND_CHASSIS_USB
RCLAMP0502B
SC-75
CRITICAL
2 NOSTUFF
DZ4700
POWERDI-123
DFLS140
20%
2 6.3V
CERM
805-1
C4700
10UF
OUT1
15
OUT2 14
IN2
C4796
OUT3
11
FERR-250-OHM
1
PP5V_USB2_PORT1
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
0.1UF
20%
2 10V
CERM
402
3
4
7
EN1*
EN2*
EN3*
OC1*
OC2*
OC3*
C4751
0.1UF
16
20%
10V
CERM 2
402
13
12
C4720
22
22
OUT
OUT
IO
C4723
CRITICAL
L4722
120-OHM
IO
73
USB_H_N
R4742
F-ST-TH
5
6
NOSTUFF
R4722
R4723
2
3
4
D4701
402
NOSTUFF
VDD
DD+
GND
USB_PORT1_N
USB_PORT1_P
1
2
USB-M50
73
47 6
2
3
4
GND_CHASSIS_BNDI
USB_IR_P
USB_IR_N
7
8
9
402
22
IO
AUD_MIC_IN_P_CONN
GND_AUDIO_MIC_CONN
AUD_MIC_IN_N_CONN
GND_CHASSIS_BNDI
5
47 6
R4754
JE320
20%
16V
CERM 2
402
SYM_VER-1
USB_E_OC_L
USB_C_OC_L
USB_A_OC_L
73
402
2012
USB_C_P
M-RT-SM
15
0.01uF
20%
16V
CERM 2
402
JE350
53261-1498
SYM_VER-2
22
USB_C_N
CRITICAL
120-OHM
2012
NOSTUFF
100UF
0.01uF
22
OUT
20%
2 6.3V
POLY
B2
C4722
IO
518S0324
L4742
CRITICAL
USB_H_P
22
FHB CONNECTOR
22
IO
PP5V_USB2_PORT1_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
SM
NC 8
NC 9
NC 10
GNDA GNDB
1
22
PORT 1
IN1
402
L4720
SOI
2
=PP5V_S3_USB
6 47
TPS2043B
6
R4743
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0
U4700
L4752
CRITICAL
USB_D_P
2
47
120-OHM
2012
NOSTUFF
1
47
10
GND_BNDI
USB_CAMERA_P
USB_CAMERA_N
NC_JE350_13
PP5V_S3_BNDI
11
12
13
14
SYM_VER-2
22
IO
16
USB_D_N
R4755
1
402
402
GND_CHASSIS_USB
6 47
RCLAMP0502B
SC-75
BLUETOOTH
L4730
FERR-250-OHM
PP5V_USB2_PORT2
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP5V_USB2_PORT2_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
SM
C4750 1
0.1UF
20%
10V
CERM 2
402
C4730
C4733
22
0.01uF
SYM_VER-1
USB_PORT2_N
USB_PORT2_P
VDD
DD+
GND
USB_E_P
NOSTUFF
R4732
NOSTUFF
402
R4733
D4702
1
2
3
4
MAKE_BASE=TRUE
TO M13D SLOT
5
7
10
SDF4700
STDOFF-4OD4.5H-1.35-TH
1
402
F-ST-SM
MAKE_BASE=TRUE
USB_BT_N
USB_BT_P
0.1UF
20%
2 10V
CERM
402
J4700
QT800101-1210S-8F
F-ST-TH
5
2012
4
IO
USB_G_N
USB_G_P
C4798
USB-M50
L4732
120-OHM
1
IO
JE330
20%
16V
CERM 2
402
PORT 2
20%
16V
CERM 2
402
CRITICAL
22
20%
10V
2 CERM
805-2
0.01uF
USB_E_N
C4799
10UF
100UF
20%
2 6.3V
POLY
B2
C4732
IO
CRITICAL
1
22
22
=PP3V3_S3_BT
GND_CHASSIS_USB
2
6 47
SDF4701
RCLAMP0502B
STDOFF-4OD4.5H-1.35-TH
SC-75
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
47
110
BLANK
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
48
OF
13
110
=PP1V5_S0_AIRPORT
1
C5304
0.1UF
C5305
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C5306
0.1UF
C5312
10UF
20%
10V
2 CERM
402
20%
6.3V
2 CERM
805-1
=PP3V3_S0_AIRPORT
CRITICAL
J5300
0.1UF
F-RT-SM
54
R5304
C5308
20%
10V
2 CERM
402
ASOB226-S80N-7F
C5307
0.1UF
C5309
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C5310
0.1UF
C5311
10UF
20%
10V
2 CERM
402
20%
6.3V
2 CERM
805-1
0
41 23
OUT
PCIE_WAKE_L
AIRPORT_WAKE_L
PP3V3_S3 6
1
33
OUT
34
IN
34
IN
CK410_SRC_CLKREQ6_L
AIRPORT_CLK100M_PCIE_N
AIRPORT_CLK100M_PCIE_P
10
11
12
13
22 5
22 5
OUT
OUT
PCIE_B_D2R_N
PCIE_B_D2R_P
C5300
22
22
IN
IN
PCIE_B_R2D_C_N
PCIE_B_R2D_C_P
0.1UF
0.1UF
PCIE_B_R2D_N
PCIE_B_R2D_P
C5301
PLACE CAPS < 250 MILS FROM U2100
0.1UF
59 83
C5314
10UF
20%
6.3V
2 CERM
805-1
14
15
17
C5313
20%
10V
2 CERM
402
16
KEY
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
22
37
38
22
39
40
41
42
43
44
45
46
47
48
49
50
51
52
AIRPORT_CONN_CLK
AIRPORT_CONN_DATA
AIRPORT_RST_L
R5302
R5303
IN
0
0
=SMB_AIRPORT_CLK
=SMB_AIRPORT_DATA
27
27
IO
IO
IO
IO
LAYOUT NOTE:
PLACE R5302-03 SUCH THAT STUB LENGTH IS
MINIMIZED IF THE RESISTORS ARE NOT STUFFED
53
SDF5300
STDOFF-4OD5.6H-1.35-TH
1
SDF5301
STDOFF-4OD5.6H-1.35-TH
1
AIRPORT CONN
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
53
OF
13
110
22
IN
PCIE_C_R2D_C_N
TP_PCIE_C_R2D_C_N
22
IN
PCIE_C_R2D_C_P
TP_PCIE_C_R2D_C_P
22
22
MAKE_BASE=TRUE
OUT
OUT
PCIE_C_D2R_N
TP_PCIE_C_D2R_N
PCIE_C_D2R_P
TP_PCIE_C_D2R_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
IN
PCIE_D_R2D_C_N
TP_PCIE_D_R2D_C_N
22
IN
PCIE_D_R2D_C_P
TP_PCIE_D_R2D_C_P
22
MAKE_BASE=TRUE
22
22
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OUT
OUT
PCIE_D_D2R_N
TP_PCIE_D_D2R_N
PCIE_D_D2R_P
TP_PCIE_D_D2R_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
22
IN
PCIE_E_R2D_C_N
TP_PCIE_E_R2D_C_N
22
IN
PCIE_E_R2D_C_P
TP_PCIE_E_R2D_C_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
C
22
22
OUT
OUT
PCIE_E_D2R_N
TP_PCIE_E_D2R_N
MAKE_BASE=TRUE
PCIE_E_D2R_P
TP_PCIE_E_D2R_P
MAKE_BASE=TRUE
22
IN
PCIE_F_R2D_C_N
TP_PCIE_F_R2D_C_N
22
IN
PCIE_F_R2D_C_P
TP_PCIE_F_R2D_C_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
22
OUT
PCIE_F_D2R_N
TP_PCIE_F_D2R_N
22
OUT
PCIE_F_D2R_P
TP_PCIE_F_D2R_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
54
OF
13
110
59 58 6
=PP3V3_S5_SMC
OMIT
23
OUT
L14
59
L15
K12
22
63 22
K13
63 22
K14
J12
63 22
SMC_P20
59 SMC_P21
59 SMC_P22
59 SMC_P23
SMC_BATT_TRICKLE_EN_L
SMC_BATT_CHG_EN
59 SMC_P26
59 SMC_P27
59
59
OUT
59
OUT
67 60 21
IO
67 60 21
IO
67 60 21
IO
67 60 21
IO
67 60 21
IN
IN
34
IN
67 60 23
OUT
OUT
60
OUT
59
IO
59
OUT
OUT
OUT
60
OUT
59
OUT
60 59 5
OUT
60 59 5
59
IN
B15
C14
D12
BGA
(1 OF 4)
P13
P14
P63/KIN3*
P64/KIN4*
P15
P65/KIN5*
C15
P16
P17
P66/IRQ6*/KIN6*
P67/IRQ7*/KIN7*
J13
59
D13
P20
P70/AN0
N12
76
D14
D15
P21
P71/AN1
76
P22
P23
P72/AN2
P73/AN3
R13
P13
59
P24
P74/AN4
R14
P14
P25
P26
P75/AN5
P76/AN6
R15
76
59
P27
P77/AN7
N13
P15
23
E12
E14
E15
E13
F14
D9
C9
A9
B9
D8
C8
A8
D7
A7
59
P32/LAD2
P82/CLKRUN*
B7
D6
67 60 44 23 5
P33/LAD3
P34/LFRAME*
P83/LPCPD*
P84/IRQ3*/TXD1
P85/IRQ4*/RXD1
C6
A6
59
P35/LRESET*
P86/IRQ5*/SCK1/SCL1
B6
59
K4
59
P40/TMIO
P90/IRQ2*
P91/IRQ1*
P41/TMO0
P42/SDA1
P92/IRQ0*
P93/IRQ12*
P43/TMI1/EXSCK1
P94/IRQ13*
P44/TMO1
P45
P95/IRQ14*
P96/EXCL
P36/LCLK
P37/SERIRQ
P46/PWX0/PWM0
SMC_TX_L
SMC_RX_L
SMC_SMB_0_CLK
G1
P50
P51
G4
F2
59
C7
D3
C1
C2
76
P80/PME*
P81/GA20
A5
B5
C3
B1
59
P30/LAD0
P31/LAD1
SMC_XDP_TMS_L
SMC_SYS_LED_16B
SMB_BSB_DATA
SMC_TPM_PP
SMC_XDP_TRST_L
SMC_XDP_TCK
SMC_SYS_LED
SMC_SYS_KBDLED
D5
59
P97/IRQ15*/SDA0
67 60 23
59
J2
J1
59
J3
88 79 77 23 6
J4
H2
77 23
H1
59
G2
59
59
23
SMC_CPU_ISENSE
SMC_CPU_VSENSE
SMC_GPU_ISENSE
SMC_GPU_VSENSE
SMC_DCIN_ISENSE
SMC_PBUS_VSENSE
SMC_BATT_ISENSE
SMC_FWIRE_ISENSE
SMC_WAKE_SCI_L
SMC_TPM_GPIO
PM_CLKRUN_L
PM_SUS_STAT_L
SC_TX_L
SC_RX_L
SMB_BSB_CLK
22UF
OUT
20%
6.3V
2 X5R
805
OUT
IN
C5803
0.1UF
C5804
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C5805
0.1UF
C5806
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
LAYOUT NOTE:
PLACE C5807 NEAR PIN F1
IN
IN
IN
SMC_VCL
IN
IN
IN
IN
LAYOUT NOTE:
PLACE R5899 AND C5820 NEAR SMC PIN N14,N15
C5807
0.47UF
10%
6.3V
2 CERM-X5R
402
IN
IN
IN
59 58 6
IN
=PP3V3_S5_SMC
PP3V3_AVREF_SMC
R5899
IN
OUT
4.7
5%
1/16W
MF-LF
402
IO
IN
OUT
C5820
0.1UF
OMIT
85 76 59 58
BGA
(3 OF 4)
IN
IN
IN
IN
59
IN
59
SMC_RST_L
E3
RES*
SMC_XTAL
SMC_EXTAL
A2
XTAL
B2
EXTAL
=PP3V3_S5_SMC
R5809
10K
SMC_H8S2116
GND_SMC_AVSS
60 59
IN
59 58 6
U5800
IO
IN
59
PP3V3_AVCC_SMC
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
20%
10V
2 CERM
402
IN
SMC_ONOFF_L
SMC_BC_ACOK
SMC_BS_ALRT_L
PM_SLP_S3_L
PM_SLP_S4_L
PM_SLP_S5_L
SMC_SUS_CLK
SMC_SMB_0_DATA
IN
OUT
MD1
E2
MD2
K1
NMI
F4
R5801
10K
5%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
2402
SMC_MD1
60
KBC_MDE
60
SMC_NMI
IN
SMC_TRST_L
IN
IN
IO
P47/PWX1/PWM1
ETRST*
AVSS
P52/SCL0
VSS
D1
P4
IO
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
SMC_LRESET_L
PCI_CLK_SMC
INT_SERIRQ
A15
B14
SMC_PM_G2_EN
SMC_ADAPTER_EN
SPI_ARB
SPI_SCLK
SPI_SI
SPI_SO
SMC_PROCHOT_3_3_L
SMC_CPU_INIT_3_3_L
VCL F1
OUT
P61/KIN1*
P62/KIN2*
AVREF M14
AVREF M15
75
59
SMC_H8S2116
B4
D2
OUT
L13
P11
P12
A4
23
IN
OUT
P60/KIN0*
C13
VCC J15
VCC A1
76
23
U5800
B13
A13
IN
P10
VCC P2
VCC P1
77 26
C5802
B12
R4
OUT
PM_LAN_ENABLE
SMC_RSTGATE_L
ALL_SYS_PWRGD
RSMRST_PWRGD
SMC_SB_NMI
PM_RSMRST_L
IMVP_VR_ON
PM_PWRBTN_L
F12
F13
OUT
AVCC N14
AVCC N15
23
L1
P12
R12
NOSTUFF
1
1
R5898
R5803
R5802
10K
0
10K
5%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
2402
OMIT
21
60 22
26 23 5
67 59
59 14
23 10
IN
IN
OUT
IN
IO
59
IO
23
OUT
23
23
59
76
59
59
OUT
IN
OUT
IN
OUT
IN
OUT
59
IN
59
IN
65
OUT
65
OUT
66
OUT
59
OUT
65
IN
65
IN
66
IN
59
IN
59
IN
59
IN
59
IN
59 IN
59
IN
59
IN
59
IN
59
IN
SMC_RCIN_L
BOOT_LPC_SPI_L
PM_SYSRST_L
SMC_TPM_RESET_L
PM_EXTTS_L<0>
PM_THRM_L
SYS_ONEWIRE
PM_BATLOW_L
SMC_EXTSMI_L
SMC_RUNTIME_SCI_L
SMC_ODD_DETECT
ISENSE_CAL_EN
SMC_EXCARD_CP
SMC_EXCARD_PWR_EN
SMC_EXCARD_PWR_OC_L
SMC_XDP_TDO_3_3_L
SMC_FAN_0_CTL
SMC_FAN_1_CTL
SMC_FAN_2_CTL
SMC_FAN_3_CTL
SMC_FAN_0_TACH
SMC_FAN_1_TACH
SMC_FAN_2_TACH
SMC_FAN_3_TACH
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SMC_ANALOG_ID
SMC_NB_ISENSE
SMC_MEM_ISENSE
ALS_LEFT
ALS_RIGHT
U5800
R3
P3
PA0/KIN8*/PA2DC
R2
PA2/KIN10*/PS2AC
PA3/KIN11*/PS2AD
N3
R1
N2
M4
N1
B10
A10
D10
A11
B11
C11
A12
D11
G14
G15
G13
G12
H14
H15
H13
H12
M11
P11
R11
N11
P10
R10
PA1/KIN9*/PA2DD
SMC_H8S2116
BGA
(2 OF 4)
PA4/KIN12*/PS2BC
PA5/KIN13*/PS2BD
PA6/KIN14*/PS2CC
PA7/KIN15*/PS2CD
PB0/LSMI*
PB1/LSCI
PE0
PE1*/ETCK
PE2*/ETDI
PE3*/ETDO
PE4*/ETMS
59
59
R5
P5
59
N5
59
P9
R9
63 22
N9
59
P8
R8
59
M8
59
P7
R7
59
E1
59
F3
K2
59
C4
59
D4
B3
26 23
PG0/EXIRQ8*/TMIX
PG1/EXIRQ9*/TMIY
PG2/EXIRQ10*/SDA2
PG3/EXIRQ11*/SCL2
PC1/TIOCB0/WUE9*
PC2/TIOCC0/TCLKA/WUE10*
PG4/EXIRQ12*/EXSDAA
PG5/EXIRQ13*/EXSCLA
PC3/TIOCD0/TCLKB/WUE11*
PG6/EXIRQ14*/EXSDAB
PC4/TIOCA1/WUE12*
PC5/TIOCB1/TCLKC/WUE13*
PG7/EXIRQ15*/EXSCLB
PD0/AN8
PD1/AN9
PH0/EXIRQ6*
PH1/EXIRQ7*
PH2/FWE
PH3/EXEXCL
PH4
PD2/AN10
PD3/AN11
60 59 5
M6
PF6/PWM6
PF7/PWM7
PC7/TIOCB2/TCLKD/WUE15*
60 59 5
R6
N6
PB3
PB4
PC6/TIOCA2/WUE14*
L4
L2
59
PF2/IRQ10*/TMOY
PF5/PWM5
PC0/TIOCA0/WUE8*
60 59 5
M7
PB2
PB6
PB7
60 59 5
M1
PF0/IRQ8*/PWM2
PF1/IRQ9*/PWM3
PF3/IRQ11*/TMOX
PF4/PWM4
PB5
M3
M2
PH5
P6
59
59
59
59
59
59
59
SMC_CASE_OPEN
SMC_TCK
SMC_TDI
SMC_TDO
SMC_TMS
SMC_PF0
59
SMC_PF1
59
SMC_LID
SMC_CPU_RESET_3_3_L
SMC_BATT_ISET
SMC_BATT_VSET
SMC_SYS_ISET
SMC_SYS_VSET
SPI_CE_L
SMC_XDP_TCK_3_3
SMB_BSA_DATA
SMB_BSA_CLK
SMB_A_S3_DATA
SMB_A_S3_CLK
SMB_B_S0_DATA
SMB_B_S0_CLK
SMC_PROCHOT
SMC_THRMTRIP
SMC_FWE
ALS_GAIN
SMS_INT_L
SMS_ONOFF_L
IN
XW5800
SM
IN
IN
OUT
GND_SMC_AVSS
58 59 76 85
IN
IN
IN
OUT
OUT
OUT
OUT
IO
IN
IO
IO
IO
IO
IO
IO
OUT
OUT
IN
OUT
OUT
OUT
PD4/AN12
N10
PD5/AN13
PD6/AN14
M10
PD7/AN15
OMIT
U5800
SMC_H8S2116
BGA
SMC
(4 OF 4)
G3
H3
K3
L3
N4
M5
N7
M12
M13
L12
NC0
NC12
NC1
NC2
NC13
NC14
NC3
NC15
NC4
NC5
NC16
NC17
NC6
NC7
NC18
NC19
NC8
NC20
K15
NC9
NC10
NC21
NC22
J14
NC11
F15
A14
SYNC_MASTER=N/A
SYNC_DATE=N/A
C12
C10
C5
A3
B8
E4
H4
M9
SIZE
N8
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
58
OF
13
110
8
59 58 6
=PP3V3_S5_SMC
76 61 41 26 11 10 6
88
C5901
0.1uF
20% 10V
R5900
CRITICAL
1K
5%
1/16W
MF-LF
VDD
CERM 402
83 59 53 6
U5900
SMC_MANUAL_RST_L
DEVELOPMENT
C5900 1
SW5900
60 58
SMC_RST_LOUT
SMC_P20
SMC_P21
58 SMC_P22
58 SMC_P23
58 SMC_P26
58 SMC_P27
58 SMC_BATT_ISET
58 SMC_BATT_VSET
58 SMC_SYS_ISET
58 SMC_SYS_VSET
SMC_BATT_TRICKLE_EN_L
SMC_BATT_CHG_EN
58 SMC_ANALOG_ID
58 ALS_GAIN
58
58
58
59 58 6
NC_SMC_P20
MAKE_BASE=TRUE
NC_SMC_P21
MAKE_BASE=TRUE
NC_SMC_P22
MAKE_BASE=TRUE
NC_SMC_P23
MAKE_BASE=TRUE
NC_SMC_P26
MAKE_BASE=TRUE
NC_SMC_P27
MAKE_BASE=TRUE
NC_SMC_BATT_ISET
MAKE_BASE=TRUE
NC_SMC_BATT_VSET
MAKE_BASE=TRUE
NC_SMC_SYS_ISET
MAKE_BASE=TRUE
NC_SMC_SYS_VSET
MAKE_BASE=TRUE
NC_SMC_BATT_TRICKLE_EN_L
MAKE_BASE=TRUE
NC_SMC_BATT_CHG_EN
MAKE_BASE=TRUE
NC_SMC_ANALOG_ID
MAKE_BASE=TRUE
NC_ALS_GAIN
58
16V
CERM 2
402
SM-LF
GND
0.01UF
10%
SPST
1
OUT
CD
NC
R5903
SMB_B_S0_CLK
58 59
R5904
SMB_B_S0_DATA
58 59
2.2K
R5905
SMB_A_S3_CLK
58 59
2.2K
R5906
SMB_A_S3_DATA
58 59
10K
R5910
SMB_BSB_CLK
58
10K
R5911
SMB_BSB_DATA
58
SOT23-5
5
2.2K
PP3V3_S3
2 402
RN5VD30A-F
2.2K
=PP3V3_S5_SMC
TP_SMC_SYS_KBDLED
TP_SMC_PF0
TP_PM_G2_EN
TP_SMC_ADAPTER_EN
TP_ALS_LEFT
TP_ALS_RIGHT
TP_SMC_PF1
58
58
MAKE_BASE=TRUE
FUNC_TEST=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FUNC_TEST=TRUE
MAKE_BASE=TRUE
FUNC_TEST=TRUE
MAKE_BASE=TRUE
FUNC_TEST=TRUE
10K
R5912
SMC_SMB_0_CLK
10K
R5913
SMC_SMB_0_DATA
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_SMC_SMB_0_CLK
FUNC_TEST=TRUE
58
58
TP_SMC_SMB_0_DATA
10K
R5914
SMB_BSA_CLK
58
10K
R5915
SMB_BSA_DATA
58
FUNC_TEST=TRUE
SMC_PB7
TP_SMC_PB7
10K
FUNC_TEST=TRUE
MAKE_BASE=TRUE
R5916
SMC_LID
58
MAKE_BASE=TRUE
53398-0476
58
F-ST-SM
5
PP3V3_S3
83 59 53 6
I2C_ALS_SDA
I2C_ALS_SCL
59
59
59 7
SMC_EXCARD_PWR_EN
SMC_PB7
SMC_FAN_3_TACH
58 SMC_FAN_3_CTL
CPU_PROCHOT_L
58
59
6
4
58
Q5901
2N7002DW-X-F
6
58
SMC_PROCHOT
SOT-363
67 58
PP3V3_TPM_3VSB
67
FUNC_TEST=TRUE
FUNC_TEST=TRUE
59 58
IO
FUNC_TEST=TRUE
59 58
IO
SMB_B_S0_CLK
SMB_B_S0_DATA
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FUNC_TEST=TRUE
=I2C_HD_TEMP_SCL
=I2C_HD_TEMP_SDA
IO
=I2C_ODD_TEMP_SCL
=I2C_ODD_TEMP_SDA
IO
=SMB_THRM_CLK
=SMB_THRM_DATA
IO
SMB_GPU_NB_THRM_CLK
SMB_GPU_NB_THRM_DATA
IO
66
66
R58271
SMC_TPM_RESET_L
TP_SMC_EXCARD_PWR_EN
MAKE_BASE=TRUE
TP_SMC_PB7
MAKE_BASE=TRUE
TP_SMC_FAN_3_TACH
MAKE_BASE=TRUE
TP_SMC_FAN_3_CTL
MAKE_BASE=TRUE
10K
518S0328
66
POWER
BUTTON HEADER
(REF DES PRESERVED FOR PLACEMENT PURPOSE)
J2903
14 58
58
Q5901
59 58 6
SMC_GPU_ISENSE
GPUVCORE_IOUT
85
MAKE_BASE=TRUE
59 58
2N7002DW-X-F
58
SMC_THRMTRIP
58
SOT-363
58
58
SMC_ONOFF_L
SMC_ODD_DETECT
SMC_EXCARD_CP
SMC_EXCARD_PWR_OC_L
10
=PP3V3_S5_SMC
5%
1/16W
MF-LF
402
M-ST-SM
3
POWER_BUTTON_L
PM_EXTTS_L<0>
MAKE_BASE=TRUE
53398-0276
DIMM_OVERTEMP_L
PM_THRMTRIP_L
66
SMC PULL-UPS
R5808
R5829
R5830
R5831
10
61
61
10K
10K
10K
10K
59 58
59 58
IO
IO
SMB_A_S3_CLK
SMB_A_S3_DATA
IO
IO
IO
I2C_ALS_SCL
I2C_ALS_SDA
59
MAKE_BASE=TRUE
59
IO
IO
IO
MAKE_BASE=TRUE
NOT_DEVELOPMENT_SMC
4
58
R5907
518S0327
SMC_ONOFF_L
5%
1/16W
MF-LF
402
SW5901
SPST
SM-LF
1
1K
58
58
C5902
0.1uF
20% 10V
DEVELOPMENT
CERM 402
59
P0V48_SMC_LSREF
R5930
58
6.2K
58
5%
1/16W
MF-LF
2 402
58
58
58
58
1
3
R5931
59
5%
1/16W
MF-LF
2 402
TPM CRYSTAL
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SMC_NB_ISENSE
SMC_MEM_ISENSE
SMC_BATT_ISENSE
SMC_FWIRE_ISENSE
10K
R5832
SC_TX_L
SMS_ONOFF_L
SMC_TX_L
SMC_RX_L
SYS_ONEWIRE
SMC_BS_ALRT_L
SMC_TMS
SMC_TDO
SMC_TDI
SMC_TCK
SMC_BC_ACOK
SMC_FWE
R5833
R5815
R5817
R5818
R5819
R5821
R5822
R5823
R5824
R5825
R5826
R5828
10K
NOT_DEVELOPMENT_SMC
59 58
58
NC_SMS_X_AXIS
MAKE_BASE=TRUE
NC_SMS_Y_AXIS
MAKE_BASE=TRUE
NC_SMS_Z_AXIS
MAKE_BASE=TRUE
NC_SMC_NB_ISENSE
MAKE_BASE=TRUE
NC_SMC_MEM_ISENSE
MAKE_BASE=TRUE
UNUSED_SMC_SENSE
59
MAKE_BASE=TRUE
UNUSED_SMC_SENSE
59
UNUSED_SMC_SENSE
SC_RX_L
21 60
23
60 59 58 5
60 59 58 5
58
58
60 58 5
60 58 5
60 58 5
MAKE_BASE=TRUE
1K
SMC CRYSTAL
59 58
FWH_INIT_L
MAKE_BASE=TRUE
SUS_CLK_SB
MAKE_BASE=TRUE
=PP3V3_S0_FAN
1
SMC_CPU_INIT_3_3_L
SMC_SUS_CLK
R5924
60 58 5
58
5%
PULLDOWN UNUSED ANALOG SENSE
1/16W
PINS ON PORT 7.
MF-LF
58
10K
10K
10K
100K
10K
10K
10K
10K
10K
10K
10K
10K
XW5900
SM
GND_NEXT_TO_SMC
DEVELOPMENT_SMC
59 58
SC_RX_L
R5922
SMC_RX_L
5 58 59 60
DEVELOPMENT_SMC
C5800
C6704
22PF
CERM 5%
50V 402
58
Y5800
SM-3
C5801
SMC_EXTAL
58
58
SMC_TPM_GPIO
67
R5995
SMC_TPM_PP
CRITICAL
R5920
TPM_GPIO1
PP1V0R1V2_S0_GPU
4.53K2
R5921
TPM_GPIO2
SMC_GPU_VSENSE
1%
1/16W
MF-LF
402
67
58
C5919
0.22UF
20%
2 6.3V
X5R
402
67
MF-LF
402
GND_SMC_AVSS
TPM_PP
58 59 76 85
67
5%
1/16W
MF-LF
402
TABLE_5_HEAD
REFERENCE DESIGNATOR(S)
88
SMC_TPM_GPIO2
TPM_XTALO
5 58 59 60
R5919
2
1
0
5%
SMC_TPM_PP 1/16W
DESCRIPTION
SMC_TX_L
SMC_TPM_GPIO1
SM-LF
R5923
5%
1/16W
MF-LF
402
58
QTY
Y6700
32.768K
15PF
CERM 5%
50V 402
PART#
67
CRITICAL
C6705
22PF
TPM_XTALI
5%
50V
CERM
402
OMIT
1
20.000M
SC_TX_L
15PF
SMC_XTAL
59 58
BOM OPTION
TABLE_5_ITEM
197S0165
XTAL,20.00,80PPM,HC49,SMD,LF
80 79 77 76 66 65 26 11 6 5
83 81
66 65 59 6
Y5800
PP3V3_S5
=PP3V3_S0_FAN
C5903
R5932
0.1uF
20% 10V
CERM 402
5%
1/16W
MF-LF
2 402
LM393A
P0V48_SMC_LSREF
V+
A
5
GND
4
LM393A
V+
SOI-1-LF
1
SMC_XDP_TCK_3_3
=PP3V3_S5_SMC
83 81 80 79 6 5
58
R5942
10K
Q5910
5%
1/16W
MF-LF
2 402
SOI-1-LF
7
SMC_PROCHOT_3_3_L 58
NTR4101P
R5933
1K
1K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
2 402
SMC_CPU_RESET_3_3_L
10K
5%
1/16W
MF-LF
402
58
Q5911
R5941
58
2N7002
NOSTUFF
SOT23-LF
59 58 6
C5943
1UF
CRITICAL
U5940
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDT=0.2 MM
PART NUMBER
ALTERNATE FOR
PART NUMBER
353S1381
353S1278
BOM OPTION
REF DES
COMMENTS:
U5940
DONE IN M50/M51
TABLE_ALT_ITEM
5%
1/16W
MF-LF
402
IN
SOT23-3
TI
OUT
3
0.47UF
10%
2 6.3V
CERM-X5R
402
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
C5940 C5942 1
10UF
20%
6.3V 2
CERM
805-1
C5941
0.01uF
20%
2 16V
CERM
402
SIZE
PP3V3_AVREF_SMC 58
2
GND
TABLE_ALT_HEAD
REF3133
1
10%
2 6.3V
CERM
402
GND
=PP3V3_S5_SMC 1
SMC_REF_IN
1
R5940
3
D
SMC_XDP_TDO_3_3_L
SOT-23
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
SMC_REF_GATE1
R5935
U5999
3
PP5V_S5
SMC_REF_GATE2 1
U5999
CPU_PROCHOT_L
1K
5%
1/16W
MF-LF
402
1K
59 7
59 58 6
R5934
59
CRITICAL
DRAWING NUMBER
D
SCALE
58 59 76
85
SHT
NONE
REV.
051-7148
13
OF
59
110
=PP3V3_S5_DEBUG
DEVELOPMENT
1
C6000
1UF
10%
6.3V
2 CERM
402
D
6
DEVELOPMENT
1
C6001
0.1UF
20%
10V
2 CERM
402
=PP5V_S0_DEBUG
DEVELOPMENT
1
C6002
1UF
10%
6.3V
2 CERM
402
DEVELOPMENT
1
C6003
0.1UF
20%
10V
2 CERM
402
DEVELOPMENT
J6000
F-ST-5047
SM1
67 58 21
67 58 21
67 58 21
67 58 44 23 5
58 22
LPC_AD<0>
LPC_AD<1>
LPC_FRAME_L
PM_CLKRUN_L
BOOT_LPC_SPI_L
59 58
5 SMC_TMS
DEBUG_RST_L
SMC_TRST_L
58 5 SMC_TDO
58 SMC_MD1
58 5 SMC_TX_L
58 5
59
59
PP5V_S3
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
FWH_INIT_L
PCI_CLK_PORT80
LPC_AD<2>
LPC_AD<3>
INT_SERIRQ
PM_SUS_STAT_L
SMC_TDI
SMC_TCK
SMC_RST_L
SMC_NMI
SMC_RX_L
21 59
34
21 58 67
21 58 67
23 58 67
23 58 67
5 58 59
5 58 59
58 59
58
5 58 59
SV_SET_UP
23
6 83
NOSTUFF
1
R5955
4.7K
5%
1/16W
MF-LF
2 402
C5951
R5951
1UF
2.2K
10%
6.3V
CERM
402
5%
1/16W
MF-LF
402
R5952
36
2 402
SYS_LED_BRT_D
SYS_LED_CTL_C
3 NOSTUFF
SYS_LED_CTL_B
2N7002
SOT23-LF
S
2
SMC_SYS_LED
5%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
Q5950
SMC_SYS_LED_16B
SYS_LED_C
SYS_LED_CTL_D
R5990
58
SOT23-LF
5%
1/16W
MF-LF
2 402
58
Q5952
2N3906
R5957
R5991
1/16W
MF-LF
5% 402
4.7K
NOSTUFF
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
Q5951
D
1
1%
1/16W
MF-LF
2N7002
Q5950_1 1
SOT23-LF
NOSTUFF
1
R5950
5%
1/16W
MF-LF
2 402
CRITICAL
LED5950
WHITE-740MCD
4.7K
3X2MM-SM1
2
LPC+ CONN
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
60
OF
13
110
R6102
1
ATI_TDIODE_N
91
ATI_TDIODE_P
91
5%
1/16W
MF-LF
402
R6101
1
5%
1/16W
MF-LF
402
R6100
U6100_VCC
47
PP3V3_S0
6 10 11 26 41 59 76 88
5%
1/16W
MF-LF
402
VCC
U6100
MAX6695AUB
UMAX
TSENSE_GPU_DXP
1
C6100
2 DXP1
3 DXN
4 DXP2
SMBDATA
SMBCLK
ALERT*
9
7
8
SMB_GPU_NB_THRM_DATA 59
SMB_GPU_NB_THRM_CLK 59
0.001UF
20%
50V
CRITICAL
2 CERM
402
TSENSE_NB_GPU_DXN
J3
5
10
GND
1
SM-2MT-BLK-LF
3
OT1*
OT2*
C6101
NOSTUFF
CRITICAL
0.001UF
20%
2 50V
CERM
402
TSENSE_NB_DXP
I2C ADDR:30(0011000)
4
GPU+NB THERMAL
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
61
OF
13
110
D
6
=PP3V3_S5_ROM
1
R63021 R63011
3.3K
5%
1/16W
MF-LF
402 2
C6312
0.1UF
20%
10V
402
3.3K
5%
1/16W
MF-LF
402 2
R63991
10K
5%
1/16W
MF-LF
402 2
2 CERM
OMIT
VDD
U6301
16MBIT
R6307
58 22
58 22
SPI_SCLK
47
SPI_WP_L
NOSTUFF
1
C6309
33PF
5%
50V
402
2 CERM
SPI_HOLD_L
C6308
R6309
10K
5%
1/16W
MF-LF
402 2
33PF
5%
2 50V
CERM
402
SI
SCK
SPI_SI_R
SST25VF016B
5%
1/16W
MF-LF
402
SPI_CE_L
R6306
SOI
SPI_SCLK_R
3
7
CE*
WP*
HOLD*
SO
SPI_SO_R
47
5%
1/16W
MF-LF
402
47
C6301
33PF
5%
1/16W
MF-LF
402
R6303
VSS
R6309 NOT NEEDED SINCE SPI ROM
IS SHARED WITH SB AND SMC
5%
2 50V
CERM
402
SPI_SI
22 58
SPI_SO
22 58
C6311
33PF
5%
2 50V
CERM
402
C
R6306-07 SHOULD BE PLACED LESS THAN 2.54MM FROM U2100
R6303 SHOULD BE PLACED LESS THAN 2.54MM FROM U6301
SPI BOOTROM
SYNC_MASTER=MASTER
SYNC_DATE=5/23/05
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
63
110
FAN 0
66 65 6
79 77 76 66 65 59 26 11 6 5
83 81 80
=PP12V_S0_FAN
PP3V3_S5
1
R6502
1.5K
R6506
5%
1/16W
MF-LF
2 402
1.5K
5%
1/4W
MF-LF
2 1206
10K
NOSTUFF
R65031
C6500
0.1UF
5%
1/8W
MF-LF
805 2
20%
2 25V
CERM
603
F0_VOLTAGE8R5
3.9K
R6505
F0_GATESLOWDN
Q6500
5%
1/8W
MF-LF
805
NTHS5443T1
1206A-03-LF
58
IN
SMC_FAN_0_CTL
1
2
3
C6501
J6500
0.47UF
FAN_RPM0
10%
2 16V
X7R
805
3 CRITICAL
Q6502
2N7002
53261-0498
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
D6502
SMB
R6504
0
NOSTUFF
1
R6512
1.0K
FAN_0_OUT
SMC_FAN_0_TACH
R6515
0
D6500
1
MMBD914XXG
C6504
MOTOR CONTROL
TACH
GND
12V DC
120UF
20%
16V
2 ELEC
6.3X11-TH-LF1
5%
1/8W
MF-LF
805
SOT23
CRITICAL
518S0193
5%
1/16W
MF-LF
2 402
R6599
OUT
FAN_0_PWR
R6500
10K
58
B130LBT01XF
47K
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
5%
1/8W
MF-LF
805
5%
1/8W
MF-LF
2 805
=PP3V3_S0_FAN
M-RT-SM
5
NOSTUFF
F0_RCFEEDBK 1
SOT23-LF
S
2
66 65 59 6
6
7
8
CRITICAL
1
FAN_TACH0
5%
1/16W
MF-LF
402
NOTE:
FAN 1
66 65 6
79 77 76 66 65 59 26 11 6 5
83 81 80
=PP12V_S0_FAN
PP3V3_S5
1
R6511
10K
5%
R6510
1.5K
1/16W
MF-LF
2 402
5%
1/4W
MF-LF
2 1206
NOSTUFF
R65071
F1_VOLTAGE8R5
R6509
3.9K
C6502
0.1UF
1.5K
20%
25V
2 CERM
603
5%
1/8W
MF-LF
805 2
F1_GATESLOWDN
NTHS5443T1
1206A-03-LF
1
IN
SMC_FAN_1_CTL
FAN_RPM1
2 16V
X7R
805
3 CRITICAL
Q6505
2N7002
F1_RCFEEDBK
SOT23-LF MIN_LINE_WIDTH=0.5MM
NOSTUFF
MIN_NECK_WIDTH=0.25MM
1
66 65 59 6
R6513
=PP3V3_S0_FAN
1.0K
5%
1/8W
MF-LF
2 805
R6501
10K
J6501
0.47UF
10%
1
2
3
58
CRITICAL
C6503
2
5%
1/8W
MF-LF
805
53261-0598
NOSTUFF
M-RT-SM
D6503
SMB
R6508
0
1
6
7
8
M38: HD FAN
Q6503
5%
1/8W
MF-LF
805
FAN_1_OUT
6
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
1
2
FAN_1_PWR
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
B130LBT01XF
3
D6501
MMBD914XXG
R6514
0
1
1 SOT23
5%
1/8W
MF-LF
805
5%
1/16W
MF-LF
2 402
CRITICAL
C6505
4
5
120UF
20%
2 16V
ELEC
6.3X11-TH-LF1
MOTOR CONTROL
TACH
GND
12V DC
518S0326
R6598
58
OUT
SMC_FAN_1_TACH
47K
FAN_TACH1
5%
1/16W
MF-LF
402
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148 13
65 110
OF
FAN 2
65 6
=PP12V_S0_FAN
D
80 79 77 76 65 59 26 11 6 5
83 81
PP3V3_S5
1
R6605
1.5K
5%
1/16W
MF-LF
2 402
NOSTUFF
R66011
R6604
10K
1.5K
5%
1/4W
MF-LF
2 1206
C6600
0.1UF
5%
1/8W
MF-LF
805 2
20%
25V
2 CERM
603
R6603
F2_VOLTAGE8R5
3.9K
F2_GATESLOWDN
NTHS5443T1
FAN_RPM2
Q6600
CRITICAL
1
0.47UF
10%
16V
2 X7R
805
Q6602
2N7002
SOT23-LF
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
F2_RCFEEDBK
NOSTUFF
R6606
1.0K
5%
1/8W
MF-LF
2 805
=PP3V3_S0_FAN
5%
1/8W
MF-LF
805
D6601
SMB
53398-0476
NOSTUFF
R6602
65 59 6
J6600
C6601
6
7
8
IN
SMC_FAN_2_CTL
1
2
3
58
1206A-03-LF
5%
1/8W
MF-LF
805
FAN_2_OUT
F-ST-SM
5
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MOTOR CONTROL
TACH
GND
12V DC
B130LBT01XF
D6600
1
FAN_2_PWR
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
C6602
220UF
R6607
MMBD914XXG
SOT23
CRITICAL
20%
2 16V
ELEC
SM-LF
5%
1/8W
MF-LF
805
R6600
10K
518S0328
5%
1/16W
MF-LF
2 402
FAN_TACH2
R6697
58
OUT
SMC_FAN_2_TACH
47K
5%
1/16W
MF-LF
402
HD TEMP SENSOR
6
=PP3V3_S0_HD_TSENS
6
17_INCH_LCD
CRITICAL
C6650
CPU_HS_ZH608
17_INCH_LCD
J6601
0.01UF
66 9
=PP3V3_S0_ODD_TSENS
53261-0498
J6602
0.01UF
M-RT-SM
5
20% CERM
16V 402
66 9
CPU_HS_ZH608
CRITICAL
C6652
53261-0498
M-RT-SM
5
20% CERM
16V 402
1
59
59
=I2C_HD_TEMP_SDA
=I2C_HD_TEMP_SCL
3
4
I2C ADDR:0X92(1001001)
C6654
0.1UF
59
20%
10V
CERM 2
402
59
I2C ADDR:0X90(1001000)
0.1UF
20%
10V
CERM 2
402
17_INCH_LCD
518S0193
C6653
0.01UF
2
C6655
C6651
CPU_HS_ZH608
3
4
17_INCH_LCD
66 9
=I2C_ODD_TEMP_SDA
=I2C_ODD_TEMP_SCL
518S0193
0.01UF
1
66 9
20% CERM
16V 402
CPU_HS_ZH608
20% CERM
16V 402
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
66
OF
13
110
67 6
=PP3V3_S0_TPM
C6700
0.1UF
10%
16V
2 X5R
402
C6701
0.1UF
10%
16V
2 X5R
402
NOSTUFF
C6702
R6705
10%
16V
2 X5R
402
5%
1/8W
MF-LF
2 805
OMIT
67 6
60 58 21
IO
60 58 21
IO
60 58 21
=PP3V3_S0_TPM
60 58 21
NOSTUFF
34
R6700
IO
IN
60 58 21
IN
60 58 23
IN
26
LAD0
23
20
LAD1
TPM
VDD
TSSOP
VDD
LAD2
LAD3
PCI_CLK_TPM
LPC_FRAME_L
21
PM_SUS_STAT_L
INT_SERIRQ
PM_CLKRUN_L
28
27
17
5%
1/16W
MF-LF
2 402
59
60 58 23
IO
60 58 44 23 5
IO
22
16
15
TPM_GPIO1
NC
59
10
19
24
R6704
59
VSB
LCLK
VNC
LFRAME*
NC
12
NC
TPM_GPIO2
TPM_XTALI
TPM_XTALO
NC
VBAT
LRESET*
LPCPD*
0.1UF
SERRIRQ
R6702
PP/GPIO
6
1
GPIO_EXPRESS_00
5%
1/16W
MF-LF
2 402
(INT PD)
PP
XTALI/32K_IN
14
XTALO
=PP3V3_S3_TPM
GPIO
13
5%
1/8W
MF-LF
805
10K
CLKRUN/GPIO*
GPIO/SM_DAT
NC
GPIO/SM_CLK
C6703
10%
16V
2 X5R
402
NC
PP3V3_TPM_3VSB
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.15MM
TESTBI/BADD/GPIO
TESTBI/BADD
TESTI
9
8
LAYOUT NOTE:
PLACE R6702-03 WHERE ACCESSIBLE
TPM_BADD
NOSTUFF
1
GND
4 GND0
11 GND1
18 GND2
25 GND3
59
3V2
VDD
GPIO2
59
3V1
CLKRUN*
TPM_PP
59
3V0
3VSB
LAYOUT NOTE:
PLACE WHERE ACCESSIBLE
IO
U6700
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
NOTE:
SINCE CURRENT OF VSB IS NOT YET ON SPEC,
1/8W (R6704/R6705) IS USED FOR NOW
0.1UF
R6703
10K
5%
1/16W
MF-LF
2 402
R6798
6
IN
TPM_LRESET_L
5%
1/16W
MF-LF
402
TPM_RST_L
NOSTUFF
R6799
59 58
IN
SMC_TPM_RESET_L
5%
1/16W
MF-LF
402
TPM
SYNC_MASTER=N/A
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
67
OF
13
110
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=4.5V
AUDIO CODEC
PP4V5_AUDIO_ANALOG
74 73 72 68 6
=PP3V3_S0_AUDIO
68 74
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
VOLTAGE=3.3V
L6801
FERR-120-OHM-1.5A
VOLTAGE=3.3V
PPV_3V3_AUDIO_CODEC
2
0402-LF
1000PF
20%
6.3V
X5R 2
603
21
IN
21
IN
21
IN
10%
25V
2 X7R
402
C6835
1000PF
ACZ_BITCLK
ACZ_SYNC
ACZ_SDATAOUT
R6807
21
OUT
ACZ_SDATAIN<0>
22
BIT_CLK
SYNC
5%
1/16W
MF-LF
402
68
72
74
72
72
SDATA_OUT 10
SDATA_IN 10
ACZ_SDATAIN_CHIP
AUD_GPIO_2
AUD_GPIO_0
AUD_GPIO_1
U6800
SENSE_A
SENSE_B
74
74
LO
12
PORT-D_L_HP
PORT-D_R_HP
15
13
68 72 73 74
AUD_SPDIF_OUT_CHIP
22
AUD_SPDIF_OUT 73
5%
1/16W
MF-LF
402
AUD_SPDIF_IN
AUD_SENSE_A
PORT-F_L_HP
PORT-F_R_HP
AUD_BI_PORT_F_L
AUD_BI_PORT_F_R
PORT-E_R
AUD_VREF_PORT_B
AUD_BI_PORT_B_L
AUD_BI_PORT_B_R
VREFOUT-B
MIC2
73
74
74
74
74
74
74
NC_AUD_VREF_PORT_A NC
NC_AUD_BI_PORT_E_L NC
NC_AUD_BI_PORT_E_R NC
VREFOUT-A
PORT-E_L
MIC1
CD-R
PORT-B_L
PORT-B_R
74
68 74
68
VOLUME_UP
ACZ_RST_L
VOLUME_DOWN
PC_BEEP 10
VREFOUT-C
VREFOUT-D
RESET*
VREF_FILT
AFILT1
NC_AUD_VREF_PORT_C NC
NC_AUD_VREF_PORT_D NC
AUD_VREF_FILT
AUD_ANALOG_FILT_1
AUD_ANALOG_FILT_2
AUD_BYPASS
AFILT2
CAP2
0.1UF
10%
16V
2 X5R
402
AUD_NC_40
AUD_NC_43
NC1
AVSS3
5%
1/16W
MF-LF
2 402
C6821
AVSS1
100K
DVSS2
R6800
DVSS3
NC2
10%
25V
2 X7R
402
OMIT
C6812
1000PF
XW6801
SM
74 73 72 68
GND_AUDIO_CODEC
PORT-A_R_HP
CD-L
CD-G 10
BEEP
IN
1000PF
AUD_SENSE_B
AUD_BI_PORT_A_L
AUD_BI_PORT_A_R
11
21
10%
25V
2 X7R
402
100UF
PORT-A_L_HP
HP
10
PORT-C_R
NC NC_VOL_UP
NC NC_VOL_DOWN
20%
16V 2
ELEC
6.3X5.5-SM
LQFP
CRITICAL
PORT-C_L
BAL_IN_L
BAL_IN_COM
BAL_IN_R
1000PF
R6808
14
74
10%
25V
2 X7R
402
C6836
C6803 1
GPIO3/SPDIFIN
GPIO1
NC NC_AUD_BI_PORT_D_L
NC NC_AUD_BI_PORT_D_R
20%
16V 2
ELEC
6.3X5.5-SM
SPDIF-OUT
STAC92204XR
GPIO2
GPIO0
AUD_BI_PORT_C_L
AUD_BI_PORT_C_R
100UF
10%
25V
2 X7R
402
C6830
C6802 1
AVDD1
AVDD2
10UF
C6801
DVDD_CORE3
DVDD_CORE1
C6800
C6804 1
C6805 1
20%
6.3V 2
TANT
SMA-LF
5%
50V
CERM 2
805
820PF
10UF
C6806
820PF
C6813
1000PF
5%
50V
2 CERM
805
10%
25V
2 X7R
402
C6807 1
C6810 1
20%
6.3V 2
TANT
SMA-LF
20%
6.3V 2
TANT
SMA-LF
10UF
C6833
1000PF
10%
25V
2 X7R
402
10UF
GND_AUDIO_CODEC
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=0V
74 68
AUD_BI_PORT_B_L
AUD_BI_PORT_B_R
68
AUD_GPIO_2
R6815
10K
5%
1/16W
MF-LF
2 402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=5V
L6800
FERR-120-OHM-1.5A
=PP5V_S0_AUDIO
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=5V
VR6800
MAX1819EBL33-T
UCSP
5V_REG_IN
A1
IN
A3
SHDN*
0402-LF
OUT C1
=PP3V3_S0_AUDIO
1%
1/16W
MF-LF
402
C6822
126S0091
126S0091
BOM OPTION
REF DES
COMMENTS:
126S0092
C6802,C6803
FACTORY SHORTAGE
126S0092
C7403,C7404
FACTORY SHORTAGE
78.7K
1%
1/16W
MF-LF
2 402
GND
VREG_FB
C6823 1
0.1UF
DFLS140
74 73 72 68
C6825
15PF
5%
50V
2 CERM
402
C6826
10UF
20%
6.3V
2 X5R
603
DZ6800
POWERDI-123
NC_VREG_POK NC
R6811
29.4K
1%
1/16W
MF-LF
2 402
10%
16V
X5R 2
402
TABLE_ALT_HEAD
ALTERNATE FOR
PART NUMBER
R6810
2 NOSTUFF
10UF
20%
2 6.3V
X5R
603
PART NUMBER
POK A2
AUD_4V5_SHDN_L
68 74
NO STUFF
SET C2
C3
74 73 72 68 6
PP4V5_AUDIO_ANALOG
CRITICAL
R6802
1K
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=4.5V
GND_AUDIO_CODEC
AUDIO: CODEC
SYNC_MASTER=FINO-SO
SYNC_DATE=04/28/2005
TABLE_ALT_ITEM
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
68
110
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=12V
FERR-250-OHM
=PP12V_S0_AUDIO_SPKRAMP
PP12V_AUD_SPKRAMP_PLANE
SM-1
20%
16V 2
ELEC
6.3X8-SM
L7205
AUDSAMPINLN
C7205
1
0603
2
10%
16V
X7R
805
GND_AUDIO_CODEC
L7207
C7206
1K-OHM-100MA
1
0.47UF
AUDSAMPINRP
0603
C
1K-OHM-100MA
68
AUD_BI_PORT_C_R
10K
5%
1/16W
MF-LF
402
19 FS1
20 FS2
NOSTUFF
1
R7216
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUD_DEBOUNCE
1
C7221
SOT-363
C7223
10UF
10%
16V
2 CERM
1210
10%
16V
2 CERM
1210
AUD_SPKR_OUTL_P
73
OUTL- 29
OUTL- 30
U7200
C1+ 6
AUDSAMPOUTLN
C1- 5
AUDSAMPCPN
OUTR+ 27
OUTR+ 28
SHDN*
AUD_SPKR_OUTL_N
73
0603-LF
C7208
0.1UF
10%
50V
2 X7R
603-1
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
OUTR- 25
OUTR- 26
8 NC
AUDSAMPCPP
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
QFN-LF
180-OHM-1.5A
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
1
MAX9714
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.2MM
L7202
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
AUDSAMPOURTP
C
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.2MM
L7203
180-OHM-1.5A
1
AUD_SPKR_OUTR_P
73
0603-LF
THM
AGND PAD
SS 12
PGND
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
AUDSAMPOUTRN
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
SPKRAMP_SS
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.2MM
L7204
180-OHM-1.5A
1
AUD_SPKR_OUTR_N
73
0603-LF
C7210
1000PF
1
1
5%
50V
2 CERM
402
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.2MM
L7201
0603-LF
100PF
72 74
180-OHM-1.5A
5%
1/16W
MF-LF
402
2N7002DW-X-F
SOT-363
C7203
AUDSAMPOUTLP
R7217
0
10UF
20%
16V
2 CERM
603
CHOLD 7
AUD_MAX9714_VREG 14 REG
SPKRAMP_MUTE
Q7200
11
NC
2N7002DW-X-F
1%
1/16W
MF-LF
402
AUD_SAMP_FS1
AUD_SAMP_FS2
Q7200
R7212
10K
100
17 G1
18 G2
2
10%
16V
X7R
805
R7213
AUD_GPIO_0
0.1UF
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
OUTL+ 31
OUTL+ 32
15 INR-
AUD_SAMP_G1
AUD_SAMP_G2
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
68
16 INR+
AUD_SAMP_SHDN_L
0.47UF
PP3V3_INTERCON
AUD_SAMP_INR_P
72
R7215
=PP3V3_S0_AUDIO
10 INL+
72
0603
74 73 72 68 6
AUD_SAMP_INL_P
72
C7207
AUDSAMPINRN
9 INL-
72
100PF
5%
50V
2 CERM
402
L7208
AUD_SAMP_INL_N
AUD_SAMP_INR_N
2
10%
16V
X7R
805
C7216
22
VDD
0.47UF
AUDSAMPINLP
C7219
GND_AUDIO_SPKRAMP_PLANE
24
1K-OHM-100MA
1%
1/16W
MF-LF
2 402
21
5%
2 50V
CERM
402
10K
C7215
100PF
L7206
R7214
23
2
10%
16V
X7R
805
74
6 68
72 73
0.47UF
10%
35V
2 X7R
805
AUD_BI_PORT_C_L
C7202
1UF
20%
16V
CERM 2
603
=PP3V3_S0_AUDIO
C7204
0603
74 73 72 68
0.1UF
10%
16V
CERM 2
1210
GND_AUDIO_SPKRAMP_PLANE
1K-OHM-100MA
68
C7218 1
10UF
33
74 72
C7201
220UF
AUD_MAX9714_CHOLD
C7200 1
20%
16V 2
ELEC
6.3X8-SM
220UF
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
C7217 1
13
SPEAKER AMP
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=12V
L7200
10%
2 25V
X7R
402
C7209
C7211
1000PF
10%
2 25V
X7R
402
C7212
1000PF
10%
2 25V
X7R
402
C7213
1000PF
10%
2 25V
X7R
402
0.47UF
C7214
10%
16V
2 X7R
805
1UF
10%
2 25V
X5R
603
NOSTUFF
R7219
1
74 73 72 68
XC7200
50R28
GND_AUDIO_CODEC
5%
1/16W
MF-LF
402
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
XW7201
SM
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
OMIT
GND_AUDIO_SPKRAMP_PLANE
GND_AUDIO_SPKRAMP_PLANE
GND_AUDIO_SPKRAMP
6 74
72 74
72 74
74 73 72 68 6
=PP3V3_S0_AUDIO
8 7
6 5
RP7200
47K
5%
1/16W
SM-LF
1 2
72
72
72
72
3 4
SYNC_MASTER=FINO-SO
AUD_SAMP_FS2
AUD_SAMP_FS1
AUD_SAMP_G2
AUD_SAMP_G1
NOSTUFF
1
R7218
0
5%
1/16W
MF-LF
2 402
74 72
SYNC_DATE=04/28/2005
R7208
5%
1/16W
MF-LF
2 402
SIZE
GND_AUDIO_SPKRAMP_PLANE
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
72
110
COMBO IN JACK
L7302
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
1
4
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
AUD_LI_GND_JACK
73
AUD_LI_DET_EMI
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
SHELL
13
180-OHM-1.5A
AUD_LI_GND_EMI
0603-LF
3
4
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
72
GND_AUDIO_CODEC
72
C7326
1UF
DZ7302
10%
2 6.3V
CERM
402
402
AUD_SPDIF_IN
68
5%
1/16W
MF-LF
402
DZ7300
8V-100PF
8V-100PF
402
1
1
AUD_SPDIF_GND_IN
39
DZ7324
8V-100PF
DZ7301
8V-100PF
XW7300
SM
402
L7309
74
180-OHM-1.5A
AUD_MIC_IN_P
XW7307
SM
GND_CHASSIS_AUDIO_EXTERNAL_J
GND_CHASSIS_AUDIO_EXTERNAL
GND_CHASSIS_AUDIO_EXTERNAL_J 73
74
NET_SPACING_TYPE=AUDIO
74
180-OHM-1.5A
1
AUD_MIC_IN_P_EMI
0603-LF
L7310
L7313
NET_SPACING_TYPE=AUDIO
180-OHM-1.5A
1
AUD_MIC_IN_N_EMI
IN
IN
IN
NET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIO
0603-LF
2
8V-100PF
402
DZ7326
8V-100PF
47
DZ7325
0603-LF
180-OHM-1.5A
AUD_MIC_IN_N
L7312
NET_SPACING_TYPE=AUDIO
0603-LF
402
1
1
GND_CHASSIS_AUDIO_INTERNAL
AUD_SPDIF_OUT
1
68
68 72 73 74
NET_SPACING_TYPE=AUDIO
74 73
AUD_SPKR_OUTL_N
AUD_SPKR_OUTL_P
R7306
402
5%
1/16W
MF-LF
402
0603-LF
R7305
L7307
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
10
1
AUD_SPKR_OUTR_N
AUD_SPKR_OUTR_P
AUD_LI_DET_H 74
AUD_SPDIFIN_JACK
11
12
72
0603-LF
L7303
180-OHM-1.5A
PP3V3_AUDIO_SPDIF_JACK
M-RT-SM
8
74
72
180-OHM-1.5A
0603-LF
VCC
8
GND
9
VOUT
L7305
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
AUD_LI_DET_JACK
AUD_LI_L
J7301
53261-0798
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
0603-LF
L7301
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
2
3
LED
0603-LF
F-5.5-DEG-TH
180-OHM-1.5A
AUD_LI_L_EMI
WO-RIB-M50
L7304
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
AUD_LI_L_JACK
OPTI-AUD-JCK
MIN_LINE_WIDTH=0.5MM
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.2MM
74
0603-LF
L7300
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
J7300
AUD_LI_R
0603-LF
CRITICAL
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
AUD_LI_R_EMI
L7306
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
AUD_LI_R_JACK
R7308
1/16W
MF-LF
402
L7315
74 72 68 6
=PP3V3_S0_AUDIO
L7323
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
PP3V3_AUDIO_SPDIF_EMI
0603-LF
L7316
AUD_LO_TYPE
L7324
74
2
0603-LF
L7318
1UF
180-OHM-1.5A
AUD_LO_L_EMI
C7317
10%
2 6.3V
CERM
402
0603-LF
L7319
74
AUD_LO_TIP_EMI
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
AUD_LO_TYPE_JACK
AUD_LO_L_JACK
AUD_LO_TIP_JACK
MIN_NECK_WIDTH=0.2MM AUD_LO_R_JACK
AUD_LO_GND_JACK
TYPE_DET
TIP
TIP_DET
2
4
RING
GND_1
GND_2
7
8
L7325
180-OHM-1.5A
1
F-ANG-TH
10
11
0603-LF
L7317
AUD_LO_R
J7303
OPTI-AUD-OUT-JCK-M50
180-OHM-1.5A
0603-LF
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
CRITICAL
10UF
L7327
180-OHM-1.5A
AUD_LO_TIP
C7318
20%
6.3V
2 CERM
805-1
MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM
0603-LF
MIN_LINE_WIDTH=0.3MM
74
L7326
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
AUD_LO_L
PP3V3_AUDIO_SPDIF_JACK
1
180-OHM-1.5A
AUD_LO_TYPE_EMI
2
0603-LF
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
73
0603-LF
180-OHM-1.5A
74
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
180-OHM-1.5A
180-OHM-1.5A
AUD_LO_R_EMI
0603-LF
VIN
VCC
GND
LED
100K
5%
12
0603-LF
13
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
L7880
AUD_SPDIF_GND_OUT
L7381
180-OHM-1.5A
180-OHM-1.5A
1
74 73 72 68
GND_AUDIO_CODEC
GND_AUDIO_CODEC_EMI1
0603-LF
R7302
0603-LF
5%
1/16W
MF-LF
402 2
AUDIO: CONNECTORS
SYNC_MASTER=AUDIO
DZ7380
DZ7314
DZ7315
8V-100PF
8V-100PF
8V-100PF
402
402
402
1
2
DZ73131
DZ7311
8V-100PF
DZ7323
8V-100PF
402
8V-100PF
SYNC_DATE=01/10/2006
402
402
1
1
SIZE
1
74 73
GND_CHASSIS_AUDIO_EXTERNAL_J
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
73
OF
13
110
74 68
AUD_SENSE_B
1
74 68
PP4V5_AUDIO_ANALOG
74 73 72 68 6
R7405
=PP3V3_S0_AUDIO
R7421
R7422
5.11K
5%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
AUD_PORT_F_DET_L
100K
5.11K
1%
1/16W
MF-LF
2 402
C7407
0.1UF
AUD_SENSE_A
68 74
AUD_SENSE_B
68 74
73
AUD_LI_DET_H
47K
AUDLINDETH
1
SOT23-LF
AUD_PORT_A_L1
74
AUD_PORT_A_R1
NOSTUFF
C7401
10%
2 16V
X5R
402
74
5%
1/8W
MF-LF
805
2N7002
NOSTUFF
AUD_PORT_A_L2 74
AUD_PORT_A_R2 74
0.1UF
R7410
72 6
GND_AUDIO_SPKRAMP
R7443
20%
10V
2 CERM
402
C7408
5%
1/16W
MF-LF
402
0.1UF
10%
2 16V
X5R
402
R7442
Q7401
NOSTUFF
NC
R7404
5%
1/8W
MF-LF
805
1%
1/16W
MF-LF
2 402
R7420
R7440
20.0K
1
1
5%
1/8W
MF-LF
805
5%
1/8W
MF-LF
805
NOSTUFF
GND_AUDIO_CODEC
74 73 72 68
R7412
GND_AUDIO_CODEC
74 73
GND_CHASSIS_AUDIO_EXTERNAL_J
68 72 73 74
74 68
PLACE AT J7303
5%
1/8W
MF-LF
805
PP4V5_AUDIO_ANALOG
CRITICAL
PORTS
UNUSED PORTS
A HP/LI
PORT E SPDIF OUT DELEGATE
B MIC IN, VREF 80% PORT D
C BI SPEAKERS
F LI/LO
AUD_BI_PORT_F_L
AUD_GPIO_1
1
R7437
74
10K
1%
1/16W
MF-LF
2 402
74
AUD_PORT_A_L1
AUD_PORT_A_R1
4.7
4.7
AUD_PORT_F_L1
73
AUD_PORT_A_R2 74
GND_AUDIO_SPKRAMP_PLANE
AUD_LI_R
73
74 68
AUD_SENSE_B
74 68
AUD_SENSE_A
74
AUD_PORT_A_R2
R7414
AUD_BI_PORT_A_L
R7415
4.7
4.7
5%
1/8W
MF-LF
805
AUD_PORT_A_L1 74
AUD_PORT_A_R1 74
5%
1/8W
MF-LF
805
B
74 73 72 68
GND_AUDIO_CODEC
0.1UF
10%
16V
2 X7R-CERM
402
68 72 73 74
XW7440
SM
GND_AUDIO_CODEC
GND_CHASSIS_AUDIO_EXTERNAL_J
73 74
470K
C7404
1
AUD_LO_R
2
1
R7423
20%
16V
ELEC
6.3X5.5-SM
R74181
22K
5%
1/16W
MF-LF
402 2
73
73
AUD_LO_TIP
R7424
22K
Q7400
Q7402
2N7002DW-X-F
SOT-363
Q7402
2N7002DW-X-F
AUD_LO_DET2_1
5%
1/16W
MF-LF
402
NC
AUD_PORT_E_DET_L
47K
NC
3
D
R7400
100UF
1%
1/16W
MF-LF
2 402
AUD_PORT_A_DET_L
5%
1/16W
MF-LF
2 402
73
39.2K
1%
1/16W
MF-LF
2 402
AUD_TYPE_DET_EN
R7413
AUD_LO_L
R7430
39.2K
=PP3V3_S0_AUDIO
1
20%
16V
ELEC
6.3X5.5-SM
R7431
74 73 72 68 6
C7403
1
5%
1/8W
MF-LF
805
10%
16V
TANT
SMA-LF
AUD_PORT_A_L2
C7424
3.3UF
100UF
B3 INR
72
AUD_PORT_A_L2 74
C7406
AUD_PORT_F_R1
74
AUD_BI_PORT_A_R
OUTL A1
UCSP1 OUTR A3
74 73 72 68
AUD_LI_L
10%
16V
TANT
SMA-LF
PORT A HP/LI
68
B1 INL
74 73 72 68
5%
1/8W
MF-LF
805
68
NOSTUFF
R7411
U7400_CEXT
SHDN*
3.3UF
5%
1/8W
MF-LF
805
R7417
AUD_BI_PORT_F_R
68
C7405
R7416
68
U7400
MAX9890
CEXT C3
C1
GND_AUDIO_CODEC
PORT F LI/LO
68
C2
VCC
A2 GND
USED
PORT
PORT
PORT
PORT
SOT-363
2N7002DW-X-F
SOT-363
C7400
0.1UF
5%
1/16W
MF-LF
2 402
20%
10V
2 CERM
402
R7419
22K
22K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
2 402
74 73 72 68
GND_AUDIO_CODEC
74 73 72 68 6
=PP3V3_S0_AUDIO
R7407
GND_AUDIO_CODEC
100K 2
AUD_LO_DET1_INV
5%
1/16W
MF-LF
402
74
AUD_LO_DET1_1
R7409
270K
5%
1/16W
MF-LF
2 402
73
AUD_LO_TYPE
10%
16V
2 X5R
402
47K
2 74
5%
1/16W
MF-LF
402
68
C7415
0.1UF
0.1UF
SOT-363
S
1
C7402
0.1UF
20%
10V
2 CERM
402
C7417
0.1UF
74 73 72 68
10%
16V
2 X5R
402
GND_AUDIO_CODEC
2N7002DW-X-F
AUD_LO_DET1_1
1
C7416
10%
16V
2 X5R
402
Q7400
R7408
GND_AUDIO_CODEC
68 72 73 74
R7435
AUD_MIC_INTERCON
C7435 1
R7427
A
R7425
AUD_MIC_IN_P
C7418
5%
1/10W
MF-LF
603
73
10%
50V
CERM 2
805
68
GND_AUDIO_CODEC
68 72 73 74
0.1UF
1
AUD_BI_PORT_B_L
SYNC_DATE=02/23/2006
C7419
AUD_MIC_P1
R74261
10%
50V
X7R
603-1
100K
5%
1/16W
MF-LF
402 2
820PF
NET_SPACING_TYPE=AUDIO
330
AUD_VREF_PORT_B
5%
1/16W
MF-LF
402
20%
16V 2
ELEC
6.3X8-SM
5%
1/16W
MF-LF
2 402
NET_SPACING_TYPE=AUDIO
2.2K 2
220UF
2.2K
73
XW7400
SM
AUD_MIC_IN_N
DRAWING NUMBER
SCALE
SHT
68 72 73 74
NONE
REV.
051-7148
74
OF
13
110
PP5V_S0
R7512
1uF
PP12V_S5_CPU_REG
C7596
R7520
=PP3V3_S0_IMVP
4.7uF
10 5%
1/16W 402
MF-LF
CPU_VID<6> 1
CPU_VID<5>
0.1uF
10%
16V
X5R
402
GND_IMVP6_SGND
LAYOUT NOTE:
8
CPU_VID<4> 1
CPU_VID<3>
R7593
0
CPU_VID<2> 1
CRITICAL
CPU_VID<1>
R7526
R7591
4.02K
402
1/16W
1%
402 MF-LF
1
2
R7590
0
CPU_VID<0> 1
R7519
23 14
IN
PM_DPRSLPVR
21 7
IN
499
1/16W 1%
MF-LF 402
470K
C7510
43
42
41
40
39
38
37
IMVP_VID<6>
IMVP_VID<5>
IMVP_VID<4>
IMVP_VID<3>
IMVP_VID<2>
IMVP_VID<1>
IMVP_VID<0>
R7592
PLACE R7526
CLOSE TO CPU
R7527
VIN
77
IN
IN
46
45
2
3
CPU_DPRSTP_L
IMVP_DPRSLPVR
CPU_PSI_L
IMVP_PGD_IN
VID5
48
47
44
1
5
6
0.01uF
R75A0
26
499
C7505
FROM SMC
1/16W
MF-LF
402 1%
2
58
26 14
0.01uF
VR_PWRGD_CK410_L
IN IMVP_VR_ON
5
OUT VR_PWRGOOD_DELAY
IMVP6_VR_TT
IMVP6_NTC
OUT
16V 10%
402 CERM
1
75
GND_IMVP6_SGND
147K
402 1%
R7508
R7509
1.82K
1%
1/16W
MF-LF
2 402
MF-LF 1/16W
470pF
10%
50V
CERM
402
75
IMVP6_UGATE1
34
75
IMVP6_PHASE1
32
LGATE1
75
PHASE1
VID0
R7513
PGND1
PGD_IN
75
12
11
10
9
33
CLK_EN*
UGATE2 27
75
IMVP6_UGATE2
75
75
VR_ON
PGND2
29
75
19
OCSET 8
18
VO
16
DROOP
VSUM
75
75
17
75
COMP
0.22UF
C7515
1
20%
25V
X5R
603
20%
25V
2 X5R
603
VSS
49
470PF
10%
50V
CERM
402
R7514
C7507
47PF
5%
50V
CERM
402
IMVP6_DFB
C7531
0.01uF
10%
16V
CERM
402
75
NO STUFF
75
75
75
75
75
75
75
75
75
75
75
5%
1/16W
MF-LF
402
1/16W
MF-LF
402
0.001uF
180pF
1%
1/16W
MF-LF
402
1
10%
50V
CERM
402
C7529
5%
2 50V
CERM
402
R7518
MEROM
C7503
0.22uF
NO STUFF
Q7503
HAT2165H
R7515
11K
1%
1/16W
MF-LF
2 402
1
C7534 1
0.033UF
10%
16V
X5R
402
C7528
Q7505
1
4
IMVP6_PHASE2
IMVP6_BOOT2
IMVP6_UGATE2
IMVP6_LGATE2
IMVP6_ISEN2
IMVP6_FET_RC2
IMVP6_VSUM_R2
R7507_1
1.0
1%
1/16W
MF-LF
2 402
IMVP6_VO_R
NO STUFF
C7502
0.0022UF
C7592
0.0022UF
10%
50V
CERM
402
10%
2 50V
CERM
402
D7501
B340LBXF
NTC
R7523
0
5%
1/16W
MF-LF
2 402
1% MF-LF
1/16W 402
NOSTUFF
R7529
1
2
1% MF-LF
1/16W 402
NOSTUFF
R7528
1
2
R7522
MIN_LINE_WIDTH
0.25 MM
0.25 MM
0.25
0.25
0.25
0.25
0.60
0.25
5%
1/16W
MF-LF
2 402
100
PPVCORE_CPU
100
CPU_VCCSENSE_P
CPU_VCCSENSE_N
75
R7507
1%
1/16W
MF-LF
402
1/16W 402
MF-LF 5%
2
1
1
R7506
3.65K
R7541
10K
1%
1/10W
MF-LF
2 603
5 6 75 76
75
8
8
75
75
75
75
75
75
75
MM
MM
MM
MM
MM
MM
75
75
IMVP6_OCSET
MIN_LINE_WIDTH
MIN_NECK_WIDTH
0.25 MM
0.20 MM
IMVP6_VSUM
GND_IMVP6_SGND
IMVP6_VO
IMVP6_DROOP
IMVP6_DFB
IMVP6_SOFT
IMVP6_RBIAS
IMVP6_VDIFF
IMVP6_FB2
IMVP6_FB
IMVP6_COMP
IMVP6_VW
0.25
0.50
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
IMVP6_RTN
IMVP6_VSEN
0.25 MM
0.25 MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
0.20
0.20
0.20
0.20
0.20
0.20
0.20
0.20
0.20
0.20
0.20
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
75
75
0.25 MM
0.25 MM
SYNC_DATE=07/08/2005
DRAWING NUMBER
SCALE
REV.
051-7148
SHT
NONE
NO STUFF
C7504
0.22uF
1%
1/10W
MF-LF
2 603
MIN_NECK_WIDTH
0.25 MM
0.25 MM
0.25
0.25
0.25
0.25
0.25
0.25
R7505
10K
75
LAYOUT NOTE:
PLACE R7528-29 CLOSE TO CPU DECAPS
MM
MM
MM
MM
MM
MM
(IMVP6_ISEN2)
(IMVP6_VO)
20%
6.3V
X5R
402
75
CRITICAL
(IMVP6_VSUM)
10%
50V
CERM
603
0603-LF
10KOHM-5%
C7521
C7511
SMB
10%
16V
CERM
402
IMVP6_FET_RC2
XW7502
SM
5%
1/4W
MF-LF
1206
4700PF
ERT-J1VR103J
XW7501
SM
R7502
1 2 3
NO STUFF
LFPAK
2.61K
HAT2165H
C7533
CRITICAL
SM
R7531
10%
6.3V
CERM-X5R
402
1210
L7501
R7530
0.33uF
20%
16V
0.36UH-30A-0.80MOHM
1 2 3
1
2 X7R
LFPAK
1
1
10K
1%
1/10W
MF-LF
603
C7508
(IMVP6_PHASE2)
(IMVP6_VO)
22UF
20%
16V
ELEC
TH-MCZ
HAT2168H
1 2 3
1%
1/16W
MF-LF
2 402
680UF
CRITICAL
LFPAK
R7516
C7501
R7540
Q7572
11.5K
1K
1%
1/16W
MF-LF
2 402
CRITICAL
10%
6.3V
CERM-X5R
402
PP12V_S5_CPU_REG
LFPAK
1 2 3
75
MM
MM
MM
MM
MM
MM
75
R75041
R7500
10K
1%
CRITICAL
75
0.25
0.25
0.25
0.25
0.25
0.25
R7501
C7516
1%
1/16W
MF-LF
2 402
(IMVP6_COMP)
1.5 MM
1.5 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
HAT2168H
75
4.42K
75
1 75
3.65K
Q7502
10%
16V
CERM
402
1
2
R7510
75
75
SMB
0.01uF
MIN_NECK_WIDTH
0.25 MM
0.25 MM
D7500
B340LBXF
CRITICAL
IMVP6_VSUM
IMVP6_OCSET
IMVP6_VO
IMVP6_DROOP
10%
2 50V
CERM
402
75
75
0.0022UF
10%
50V
CERM
402
0.01uF
C7513
C7590
0.0022UF
XW7503
SM
10%
50V
CERM
603
NO STUFF
C7500
5 6 75 76
XW7504
SM
4700PF
C7532
XW7500
SM
IMVP6_UGATE1
IMVP6_LGATE1
IMVP6_ISEN1
IMVP6_FET_RC1
IMVP6_VSUM_R1
R7504_1
5%
1/4W
MF-LF
1206
C7512
1 2 3
NO STUFF
(IMVP6_VW)
MIN_LINE_WIDTH
1.5 MM
0.25 MM
R7503
IMVP6_FET_RC1
IMVP6_ISEN2
0.22UF
IMVP6_PHASE1
IMVP6_BOOT1
0.22UF
IMVP6_LGATE2
(GND)
4.32K
TPAD
GND_IMVP6_SGND
75
NO STUFF
PPVCORE_CPU
2
1.0
LFPAK
IMVP6_PHASE2
R7517
VW
75
HAT2165H
LFPAK
76 75
VSEN
25 NC
C7514
5%
1/16W
MF-LF
2 402
1%
1/10W
MF-LF
2 603
14
15
RTN
FB
180K
Q7504
HAT2165H
1-Phase DCM
FB2
470PF
Q7501
1-Phase DCM
SM
CRITICAL
NTC
75
IMVP6_COMP_RC
CRITICAL
ISEN2 23
20%
1210
1-Phase CCM
PGOOD
VR_TT*
22UF
2 16V
X7R
(IMVP6_ISEN1)
IMVP6_ISEN1
LGATE2 30
C7597
20%
0.36UH-30A-0.80MOHM
(IMVP6_PHASE1)
IMVP6_LGATE1
(GND)
75
PHASE2 28
2 16V
X7R
L7500
1 2 3
3V3
13 VDIFF
IMVP6_FB2
IMVP6_FB
IMVP6_COMP
IMVP6_VW
C7527
24
ISEN1
21
1 2 3
PSI*
IMVP6_VDIFF
75
2.0K
1%
1/16W
MF-LF
402
R7511
10%
50V
CERM
402
2-Phase CCM
DPRSTP*
DPRSLPVR
1uF
25V 10%
603 X5R
CRITICAL
C7598
1210
VID1
75
75
UGATE1 35
VID2
4 RBIAS
(IMVP6_FB)
IMVP6_BOOT1
IMVP6_BOOT2
VID3
1%
1/16W
MF-LF
2 402
75
U7500
1.40K
75
26
BOOT2
QFN
IMVP6_RBIAS
75
BOOT1 36
ISL6262
7 SOFT
IMVP6_SOFT
PVCC
VID4
75
75
NO STUFF
IMVP6_VDIFF_RC
1
1
0
1
0
1 2 3
DFB
C7506
1
1
0
0
31
OMIT
16V 10%
402 CERM
1
2
75
VID6
VDD
1uF
25V 10%
603 X5R 2
CRITICAL
1
22
20
22UF
Operation Mode
R7594
0
IMVP6_VSEN
IMVP6_NTC_R
PSI*
R7595
0
C7550 1 C7551
LFPAK
20%
2 16V
ELEC
SM-3
20%
16V
X7R
1210
HAT2168H
IMVP6_RTN
DPRSTP*
0
0
1
1
R7596
8
22UF
D
DPRSLPVR
C7530
LFPAK
PP3V3_S0_IMVP6_3V3
R7521
C7509
330UF
Q7570
HAT2168H
20%
6.3V
CERM
603
C7517
MEROM
CRITICAL
Q7500
C7535
0.1uF
75
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
CRITICAL
CRITICAL
10%
16V
X5R
402
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
10
PP12V_S5_CPU_REG
PPVIN_S5_IMVP6_VIN
20%
2 16V
ELEC
SM-3
CRITICAL
5%
1/16W
MF-LF
402
76 75
10%
25V
X5R
603
10
5%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=5V
C7526
C7518
330UF
PP5V_S0_IMVP6_VDD
OMIT
R7504_1
76 75
1
OMIT
IMVP6_VSUM_R1
97 88 6
R7507_1
IMVP6_VSUM_R2
13
OF
75
110
1
SMC PWRGD PULLUP
5 PP3V3_S5
80 79 77 66 65 59 26 11 6
83 81
L7502
R7599
1UH-20A-4.5MOHM
6
=PP12V_S5_CPU
R7623
10K
CRITICAL
PP12V_S5_CPU_REG75
0.0252
1
2 PP12V_L7502
TH-VERT-LF VOLTAGE=12V
1%
1W
MF
2512-1
1%
1/16W
MF-LF
2 402
76
VOLTAGE=12V
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.25MM
NOSTUFF
R7620
PP3V3_S0 6
SYS_POWERFAIL_L
10 11 26 41 59 61 88
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.25MM
3 NOSTUFF
CRITICAL
XW7598
SM
ZXCT1010
4 VIN
SOT23-5
IOUT 3
1 NC
CPU_DCIN_SENSE 1
LOAD 5
1%
1/16W
MF-LF
402
C7599
0.22UF
1%
1/16W
MF-LF
2 402
COUNT
464
10K
SMC_CPU_ISENSE
58
5%
1/16W
MF-LF
402
58
1 MS TIME CONSTANT
SO SMC ADC SAMPLING
WORKS WELL.
20%
6.3V
2 X5R
402
GND_SMC_AVSS
R7691
SMC_DCIN_ISENSE
1
RSMRST_PWRGD 58
R7602
TO SMC
SOT23
1K
0.00881 A/COUNT
4.53K2
CPU_SENSE_I_R
R7598
SCALE
R7597
GND
2.73224 A/V
D7599
BAS16
OMIT
U7501
5%
1/16W
MF-LF
402
58 59 76 85
CPU_DCIN_SENSE_R
1%
1/16W
MF-LF
402
76 75
PP12V_S5_CPU_REG
1
R7630
6.04K
R7632
SMC_PBUS_VSENSE_R
R7631
2.0K
SCALE
4 V/V
COUNT
.0129 V/COUNT
4.53K2
1%
1/16W
MF-LF
402
SMC_PBUS_VSENSE
1
1%
1/16W
MF-LF
2 402
58
C7633
0.22UF
20%
6.3V
2 X5R
402
1%
1/16W
MF-LF
2 402
GND_SMC_AVSS
R7612
75 6 5
PPVCORE_CPU
4.53K2
SMC_CPU_VSENSE
1%
1/16W
MF-LF
402
58
C7612
0.22UF
20%
2 6.3V
X5R
402
GND_SMC_AVSS
58 59 76 85
58
IN
ISENSE_CAL_EN
SYNC_MASTER=(MASTER)
100K
5%
1/16W
MF-LF
402 2
SYNC_DATE=(MASTER)
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
76
OF
13
110
2.5V S0 Regulator
=PP3V3_S0_2V5REG
2.5V S0
R7700
88 83 81 80 79 78 77 11 6 5
PP12V_S5
PP3V3_S5
R7793
R7799
10K
10K
5%
1/16W
MF-LF
2 402
5
81
PM_SLP_S3
80
PP1V5_S0_PGOOD
R77011
SOT23-5-LF 59 26 11 6 5 PP3V3_S5
83 81 80 79 77 76 66 65
4
75 IMVP_PGD_IN
U7710
C7712
1
Q7703
88 79 58 23 6
IN
PM_SLP_S3_L
PP3V3_S5
C7711
79 77 76 66 65 59 26 11 6 5
83 81 80
5%
1/16W
MF-LF
2 402
U7712
20%
6.3V
X5R
603
CRITICAL
L7700
LTC3411
2.2uH
2V5REG_RT
77
SW 4
SHDN/RT
2V5REG_SW
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm
2V5REG_MODE
SYNC/MODE VFB 9
2V5REG_VFB
PP2V5 S0_PGOOD
ITH 10
PGOOD
CRITICAL
PGND SGND
2V5REG_ITH
26 58
1%
1/16W
MF-LF
402
10V
5
79
88 83 81 80 79 78 77 11 6 5
77
PP12V_S5
MC74VHC1G08
PP0V9_S0_PGOOD
PP2V5 S0_PGOOD
R77041
SOT23-5-LF
4
PM_PWROK
U7711
10K
5%
1/16W
MF-LF
402
2
2
1%
1/16W
MF-LF
402
R7798
10K
5%
1/16W
MF-LF
2 402
(R2)
R7708
C7704
1%
1/16W
MF-LF
402
C7703
1
2
100pF
10%
50V
CERM
402
5%
50V
CERM
402
C7709
22uF
20%
6.3V
X5R
805
(R1)
2
XW7700
SM
1
5%
1/16W
MF-LF
2 402
PM_SLP_S4
0.784V MIN
VREF = 0.800V TYP
0.816V MAX
Q7703
1%
1/16W
MF-LF
2 402
VOLTAGE=0V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
10K
10K
2
4.7K
2V5REG_SGND
R7794
R7707
2V5REG_ITH_RC
0.0033uF
NOSTUFF
1
5%
50V
CERM
402
R7705
324K
CONTINUOUS
PP3V3_S5
79 77 76 66 65 59 26 11 6 5
83 81 80
1
1
22pF
4.99K
6 11 88
2
SM1-LF
C7706
R7706
0.1UF
1
PP2V5_S0
MSOP-LF
MC74VHC1G08
SOT23-5-LF
4
ALL_SYS_PWRGD
POWER BUDGET
NB=0.142A
M56=0.745A
TOTAL=0.887A
10UF
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
C7700
SVIN PVIN
U7700
10V
5
1
SOT-363
5%
1/16W
MF-LF
402
0.1UF
OUT
2N7002DW-X-F
PP3V3_SO_2V5REG_R
10K
MC74VHC1G08
PP1V05_S0_PGOOD
78 80 81
6
D
47K
10V
5%
1/16W
MF-LF
2 402
2
5%
1/16W
MF-LF
402
R7710
0.1UF
NOSTUFF
C7710
79 77 76 66 65 59 26 11 6 5
83 81 80
PP3V3_S5
79 77 76 66 65 59 26 11 6 5
83 81 80
10
1
2N7002DW-X-F
58 23
IN
PM_SLP_S4_L
SOT-363
C7751
22uF
NOSTUFF
20%
6.3V
X5R
805
R7757
22uF
20%
6.3V
X5R
805
1.2V S0
14
POWER BUDGET
M56=2.100A
YUKON=0.426A
TOTAL=2.526A
VIN1
U7750
C7797
SN200505068
19
SYNC
1V2REG_VBIAS
17
VBIAS
1V2REG_RUNSS
C7753
R7754
71.5K
1%
1/16W
MF-LF
402
C7798
1UF
10%
2 16V
X5R
603
SS/ENA
7
8
CRITICAL
L7750
1.0UH-3.48A
9
10
1V2REG_SW
4 1V2REG_PGOOD
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
C7755
1%
1/16W
MF-LF
402 2
100PF
5%
2 50V
CERM
402
C7750
R7753
22uF
2
20%
6.3V
X5R
805
R7752
10K
10%
50V
CERM
402
2 402
(R2)
0.0018UF
2
1%
1/16W
MF-LF
2 402
20%
6.3V
X5R
805
1%
1/16W
MF-LF
1V2REG_SW_FIL
1K
2N7002
83 79 77
PM_SLP_S4
SOT23-LF
C7757
470pF
Q7799
2
R77511
26.7K
10%
50V
CERM
402
0.882V MIN
VREF = 0.891V TYP
0.900V MAX
1%
1/16W
MF-LF
402
(R1)
Q7701
3 NOSTUFF
D
C7756
22uF
1
R7750
21
C7754
1V2REG_ITH_RC
PP1V2_S3
SM-LF
187
13
10%
2 50V
CERM
402
PWRGD
10%
16V
CERM
402
COMP
PGND
0.0033UF
PH4
11
12
18
1V2REG_BOOT
THRML
1V2REG_ITH
PH0
PH1
PH2
PH3
VSENSE
AGND
CRITICAL
1V2REG_MODE
BOOT
RT
20
1V2REG_VFB
0.047UF
SOP
CONTINUOUS
1V2REG_RT
16
5%
1/16W
MF-LF
2 402
15
1M
C7752
TSOP-LF
SI3446DV
XW7750
SM
1V2REG_SGND
85
GPUVCORE_PGOOD
VOLTAGE=0V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
=PP1V2_S0_REG
1
88
SYNC_MASTER=(MASTER)
C7799
SYNC_DATE=(MASTER)
0.1UF
20%
10V
2 CERM
402
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
77
110
PAGE_BORDER=TRUE
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
114S0514
R7840
1.8V S0 REGULATOR
C7802
1UF
1
88 83 81 80 79 77 11 6 5
PP12V_S5
1V8REG_GPU_VCC5
2
10%
25V
X5R
603
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7800
10
1%
1/16W
MF-LF
2 402
C7804
1UF
D 4
10%
2 6.3V
CERM
402
9
1V8REG_GPU_PVCC5
10
VCC5
UGATE
14
BOOT
15
U7800
PHASE
13
5%
1/16W
MF-LF
402
LDO_DR
QFN
1V8REG_GPU_LDO_FB
LDO_FB
LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V8REG_GPU_FS_DIS
Q7802
2N7002
81 80 77
PM_SLP_S3
SOT23-LF
R7892 C7803 1
39.2K
1%
1/16W
MF-LF
2 402
4.7UF
20%
6.3V
CERM 2
603
C7805
CASE369-LF
1V8REG_GPU_BOOT_R
16
COMP
S 3
CRITICAL
20%
25V
CERM
1V8REG_GPU_SWITCHNODE 603
AGND PGND
17
12
7.15K2
5.11
1V8REG_GPU_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
D 4
CRITICAL
Q7801
0.068UF
1V8REG_GPU_COMP_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C7811
820PF
1
NTD60N02R
1
G
C7814
R7805
1
CASE369-LF
S3
10%
10V
CERM
402
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
10%
25V
2 X7R
402
C7817
330UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
88
C7806
10UF
20%
6.3V
2 CERM
805-1
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7812
C7813
22
5%
1/16W
MF-LF
2 402
5%
2 50V
CERM
1206
1500PF
1V8REG_GPU_SNUB
1000PF
C7810
C7807
330UF
1%
1/4W
MF-LF
2 1206
R7802
1.24K
10%
50V
CERM
402
PP1V8_S0
SM
R7804
1V8REG_GPU_COMP
1%
1/16W
MF-LF
402
1.53UH
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
THRML_PAD
L7800
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
FS_DIS
DGND
1.5V S0
POWER BUDGET
M56=2.400A
GDDR=3.320A
IO=1.750A
TOTAL=8.010A
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
5%
1/16W
MF-LF
402
11
FB
10UF
0.1UF
1V8REG_GPU_LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V8REG_GPU_BOOT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
ISL6549
1V8REG_GPU_LDO_DR
OMIT
R7840
PVCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7801
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C7800
10%
2 16V
CERM
1210
20%
2 16V
ELEC
SM-LF
NTD60N02R
1
G
1V8REG_GPU_UGATE
680UF
CRITICAL
Q7800
VCC12
C7801
1V8REG_GPU_FB_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1%
1/16W
MF-LF
2 402
C7809
0.01UF
10%
16V
2 CERM
402
(R2)
R7803
953
XW7800
SM
1%
1/16W
MF-LF
2 402
1V8REG_GPU_GND
(R1)
VOLTAGE=0 V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOUT=VREF*(1+R2/R1)
0.784V MIN
VREF = 0.800V TYP
0.816V MAX
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
TRUE
78
OF
13
110
1.8V S3 REGULATOR
C7992
1UF
1
88 83 81 80 78 77 11 6 5
PP12V_S5
10%
25V
X5R
603
1V8REG_DDR_VCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7905
10
1%
1/16W
MF-LF
2 402
OMIT
1
C7900
10
VCC12
VCC5
14
BOOT
15
U7900
R7991
1
LDO_FB
PHASE
QFN
LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
5%
1/16W
MF-LF
402
1V8REG_DDR_FS_DIS
16
R7992 C7903 1
100K
5%
1/16W
MF-LF
2 402
PM_SLP_S4
SOT23-LF
4.7UF
20%
6.3V
CERM 2
603
FB
S3
CRITICAL
3
AGND PGND
17
12
5.11
1V8REG_DDR_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V8REG_DDR_COMP
D 4
CRITICAL
Q7901
0.047UF
1V8REG_DDR_COMP_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C7906
1000PF
NTD60N02R
1
G
C7908
R7904
4.02K2
1
PP1V8_S3
SM
1
R7902
CASE369-LF
S3
2
1
10%
25V
2 X7R
402
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
5 6
C7913
10UF
20%
6.3V
CERM
1206
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7999
C7909
22
5%
1/16W
MF-LF
2 402
5%
2 50V
CERM
1206
1000PF
C7998
330UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
1000PF
C7902
1V8REG_DDR_SNUB
1
10%
16V
CERM
402
C7912
330UF
1%
1/4W
MF-LF
2 1206
R7903
1.24K
10%
25V
X7R
402
1.53UH
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1%
1/16W
MF-LF
402
L7900
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
THRML_PAD
DGND
1.8V S3
POWER BUDGET
NB=4.000A
DRAM=6.000A
TOTAL=10.000A
20%
25V
CERM
1V8REG_DDR_SWITCHNODE 603
11
COMP
10UF
10%
16V
2 CERM
1210
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
5%
1/16W
MF-LF
402
C7911
0.1UF
1V8REG_DDR_BOOT_R
FS_DIS
Q7902
2N7002
83 77
13
CASE369-LF
1V8REG_DDR_LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V8REG_DDR_LDO_FB
LDO_DR
1V8REG_DDR_BOOT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
ISL6549
3
C7901
R7940
PVCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V8REG_DDR_LDO_DR
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
NTD60N02R
1
G
1V8REG_DDR_UGATE
UGATE
20%
2 16V
ELEC
SM-3
Q7900
C7910
330UF
CRITICAL
D 4
10%
6.3V
2 CERM
402
1V8REG_DDR_PVCC5
1UF
1V8REG_DDR_FB_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1%
1/16W
MF-LF
2 402
C7907
0.01UF
10%
2 16V
CERM
402
(R2)
R7901
1K
XW7900
SM
1%
1/16W
MF-LF
2 402
1V8REG_DDR_GND
VOUT=VREF*(1+R2/R1)
(R1)
0.784V MIN
VREF = 0.800V TYP
0.816V MAX
VOLTAGE=0 V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
83 81 80 79 59 6 5
PP5V_S5
PP3V3_S5
C7980
79 77 76 66 65 59 26 11 6 5
83 81 80
0.1UF
R7911
5.49K
1%
1/16W
MF-LF
2 402
1V6_REF
1.591V
R7910
10K
1%
1/16W
MF-LF
2 402
LM339A
20%
10V
CERM
402
SOI-LF
2
V+
GND
PP1V8_S3
PP1V8_S3_PGOOD
U7910
12
1
R7912
5.11K
1%
1/16W
MF-LF
2 402
83 81 80 79 59 6 5
PP5V_S5
PP3V3_S5
79 77 76 66 65 59 26 11 6 5
83 81 80
R7913
1
66 65 59 26 11 6 5
83 81 80 79 77 76
R7914
PP3V3_S5
1DEVELOPMENT
330
PM_SLP_S3_L
MEMVTT_EN
5%
1/16W
MF-LF
2 402
31
0V7_REF
0.723V
3 DEVELOPMENT
PP1V8_S3
V+
U7901
81 80
1V0_REF
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
SOI-LF
14
LM339A
V+
SOI-LF
13
U7910
DEVELOPMENT
LED7900
10
LED_PP1V8_S3_P
1
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
R7906
88 77 58 23 6
10K
8.45K
11
PP0V9_S0
PLACE LED
NEAR VREG
PP0V9_S0_PGOOD
77
GND
12
R7915
2.37K
LED_PP1V8_S3_N
1.8V Vreg
1%
1/16W
MF-LF
2 402
GND
12
SYNC_MASTER=M23-PC
SYNC_DATE=04/12/2005
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
79
OF
13
110
1.5V S0 REGULATOR
C8002
1UF
1
88 83 81 79 78 77 11 6 5
PP12V_S5
2
10%
25V
X5R
603
1V5REG_PCIE_VCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R8005
10
C8006
1UF
1V5REG_PCIE_PVCC5
10
VCC12
VCC5
1V5REG_PCIE_UGATE
UGATE
14
BOOT
15
U8000
PHASE
13
R8001
1
5%
1/16W
MF-LF
402
LDO_DR
QFN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_LDO_FB
LDO_FB
LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_FS_DIS
16
Q8003
2N7002
81 78 77
PM_SLP_S3
SOT23-LF
R8092 C8009
100K
5%
1/16W
MF-LF
2 402
4.7UF
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
5%
1/16W
MF-LF
402
COMP
THRML_PAD
DGND
6
AGND PGND
17
12
S 3
CRITICAL
20%
25V
CERM
L8000
1.53UH
2
PP1V5_S0
1
R8002
5.11
1V5REG_PCIE_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
D 4
CRITICAL
Q8001
C8011
R8004
1%
1/16W
MF-LF
402
1.5V S0
POWER BUDGET
CPU=0.120A
NB=6.000A
SB=1.890A
TOTAL=8.010A
6 11
SM
1V5REG_PCIE_COMP
4.22K2
10UF
10%
2 16V
CERM
1210
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C8015
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
20%
6.3V 2
CERM
603
10UF
10%
2 16V
CERM
1210
1V5REG_PCIE_SWITCHNODE603
11
FB
C8000
0.1UF
1V5REG_PCIE_BOOT_R
FS_DIS
CASE369-LF
1V5REG_PCIE_LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_BOOT 1
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
ISL6549
3
C8010
R8040
PVCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_LDO_DR
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
NTD60N02R
1
G
20%
2 16V
ELEC
TH-MCZ
Q8000
C8014
680UF
CRITICAL
D 4
10%
2 6.3V
CERM
402
1%
1/16W
MF-LF
2 402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C8012
1000PF
1
NTD60N02R
1
G
0.047UF
1V5REG_PCIE_COMP_R 1
CASE369-LF
20%
6.3V
2 CERM
805-1
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
R8099
C8004
22
1000PF
C8005
5%
1/16W
MF-LF
2 402
5%
50V
2 CERM
1206
1000PF
10%
25V
2 X7R
402
10UF
330UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
C8016
1V5REG_PCIE_SNUB
10%
16V
CERM
402
330UF
1%
1/4W
MF-LF
2 1206
C8099
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
S3
C8001
R8003
10%
25V
X7R
402
1V5REG_PCIE_FB_R
1K
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1%
1/16W
MF-LF
2 402
C8003
0.01UF
10%
16V
2 CERM
402
(R2)
R8000
1.13K
XW8000
SM
1%
1/16W
MF-LF
2 402
1V5REG_PCIE_GND
(R1)
VOLTAGE=0 V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOUT=VREF*(1+R2/R1)
0.784V MIN
VREF = 0.800V TYP
0.816V MAX
83 81 79 59 6 5
PP5V_S5
PP3V3_S5
79 77 76 66 65 59 26 11 6 5
83 81 80
R8010
R8011
10K
8.45K
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
B
1V3_REF
1.300V
LM339A
V+
U7910
7
PP1V5_S3
SOI-LF
1
PP1V5_S0_PGOOD
77
GND
12
R8012
5.49K
1%
1/16W
MF-LF
2 402
66 65 59 26 11 6 5
83 81 80 79 77 76
PP3V3_S5
DEVELOPMENT
1
R8007
330
5%
1/16W
MF-LF
2 402
LED_PP1V5_S0_P
1
3
PP1V8_S3
V+
U7901
81 79
1V0_REF
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
SOI-LF
1
DEVELOPMENT
LED8000
DEVELOPMENT
1.5V Vreg
PLACE LED
NEAR VREG
SYNC_MASTER=FINO-PC
SYNC_DATE=05/18/2005
LED_PP1V5_S0_N
GND
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
12
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
80
OF
13
110
1.05V S0 REGULATOR
C8192
1UF
1
88 83 80 79 78 77 11 6 5
PP12V_S5
2
10%
25V
X5R
603
1V05REG_NB_VCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R8105
10
1%
1/16W
MF-LF
2 402
C8100
10
VCC12
VCC5
1V05REG_NB_UGATE
UGATE
14
U8100
BOOT
15
1V05REG_NB_LDO_DR
LDO_DR
PHASE
QFN
LDO_FB
LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V05REG_NB_FS_DIS
16
R8192 C8103 1
100K
Q8104
5%
1/16W
MF-LF
2 402
2N7002
PM_SLP_S3
SOT23-LF
4.7UF
20%
6.3V 2
CERM
603
COMP
AGND PGND
17
3.9K 2
1.5UH
PP1V05_S0
IHLP
D 4
CRITICAL
Q8103
C8108
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C8106
1000PF
1
NTD60N02R
1
G
0.047UF
1V05REG_NB_COMP_R
CASE369-LF
S3
2
1
10%
16V
CERM
402
10UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
20%
6.3V
2 CERM
805-1
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R8190
C8109
22
5%
1/16W
MF-LF
2 402
5%
50V
2 CERM
1206
10%
2 25V
X7R
402
6 34
C8115
1V05REG_NB_SNUB
1000PF
1000PF
C8190
330UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
1%
1/4W
MF-LF
2 1206
C8102
C8114
330UF
5.11
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
POWER BUDGET
CPU=2.500A
NB=5.500A
SB=0.874A
TOTAL=8.874A
L8100
1
1V05REG_NB_FB
5%
1/16W
MF-LF
402
1.05V S0
10UF
R8102
1V05REG_NB_COMP
C8198
CRITICAL
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R8104
12
10%
2 16V
CERM
1210
10%
2 16V
CERM
1210
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
THRML_PAD
DGND
C8112
CASE369-LF
20%
25V
CERM
1V05REG_NB_SWITCHNODE 603
11
FB
10UF
10%
2 16V
CERM
1210
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
FS_DIS
80 78 77
13
10UF
0.1UF
1V05REG_NB_BOOT_R
5%
1/16W
MF-LF
402
C8111
S3
1V05REG_NB_LGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V05REG_NB_LDO_FB
5%
1/16W
MF-LF
402
1V05REG_NB_BOOT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
ISL6549
NTD60N02R
1
G
C8101
R8140
PVCC5
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R8191
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
10%
2 16V
CERM
1210
Q8102
C8110
10UF
CRITICAL
D 4
10%
2 6.3V
CERM
402
1V05REG_NB_PVCC5
1UF
R8103
10%
25V
X7R
402
1.02K
1%
1/16W
MF-LF
2 402
1V05REG_NB_FB_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
C8107
0.01UF
10%
16V
2 CERM
402
(R2)
R8101
3.24K
XW8100
SM
1%
1/16W
MF-LF
2 402
1V05REG_NB_GND
(R1)
VOLTAGE=0 V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOUT=VREF*(1+R2/R1)
0.784V MIN
VREF = 0.800V TYP
0.816V MAX
83 80 79 59 6 5
PP5V_S5
1
R8110
10K
1%
1/16W
MF-LF
2 402
3
81 80 79
1V0_REF
V+
SOI-LF
14
U7910
PP1V05_S0
LM339A
PP1V05_S0_PGOOD
77
GND
12
66 65 59 26 11 6 5
83 81 80 79 77 76
PP3V3_S5
DEVELOPMENT
1
DEVELOPMENT
C8199
0.1UF
1
20%
10V
CERM
402
PP1V05_S0
R8107
330
5%
1/16W
MF-LF
2 402
LED_PP1V05_S0_P
1
79 77 76 66 65 59 26 11 6 5
83 81 80
V+
1
R8198
8.45K
81 80 79
SOI-LF
2
U7901
5
1%
1/16W
MF-LF
2 402
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
PP3V3_S5
DEVELOPMENT
LED8100
3 DEVELOPMENT
PLACE LED
NEAR VREG
1.05V VREG
LED_PP1V05_S0_N
SYNC_MASTER=M38-RT
GND
SYNC_DATE=05/18/2005
1V0_REF
0.867V
R8199
3.01K
1%
1/16W
MF-LF
2 402
SIZE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
81
OF
13
110
PP5V_S5
88 83 81 80 79 78 77 11 6 5
5 6 59 79 80 81
PP12V_S5
R83011
C8399
1UF
3.6K
6 7
20%
2 10V
CERM
603
5%
1/16W
MF-LF
402 2
CRITICAL
Q8300
IRF7413PBF
SO-8
4
GATE_5V_S3
6 CRITICAL
Q8303
2N7002DW-X-F
SOT-363
R8303
47K
5%
1/16W
MF-LF
2 402
C
PP5V_S3
6 60
PP3V3_S5
79 78 77 11 6 5
88 83 81 80
79 77
5 6 11 26 59 65 66 76 77 79 80
81
PP12V_S5
PM_SLP_S4
1
1
R8302
Q8302
2N7002DW-X-F
SOT-363
Q8301
IRF7413PBF
SO-8
4
GATE_3V3_S3
3 CRITICAL
5 6
20%
2 10V
CERM
603
5%
1/16W
MF-LF
2 402
C8398
1UF
3.6K
R8300
47K
5%
1/16W
MF-LF
2 402
2 3
PP3V3_S3
6 53 59
SYNC_MASTER=FINO-PC
SYNC_DATE=04/12/2005
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
83
OF
13
110
OMIT
U8400
M56P
BGA
(1 OF 7)
IN
C8420
PEG_R2D_C_P<15>
0.1uF
2
10%
13
PEG_R2D_C_N<15>
C8421
0.1uF
PEG_R2D_C_P<14>
0.1uF
IN
C8422
C8423
0.1uF
IN
10%
13
10%
IN
PEG_R2D_C_N<14>
IN
PEG_R2D_C_P<13>
C8424
0.1uF
13
IN
PEG_R2D_C_N<13>
C8425
0.1uF
13
13
10%
13
IN
IN
PEG_R2D_C_P<12>
C8426
0.1uF
PEG_R2D_C_N<12>
C8427
0.1uF
13 IN
PEG_R2D_C_P<11>
C8428
PEG_R2D_C_N<11>
C8429
0.1uF
13
PEG_R2D_C_P<10>
0.1uF
IN
C8430
C8431
0.1uF
IN
PEG_R2D_C_N<10>
C8432
0.1uF
IN
PEG_R2D_C_P<9>
X5R
402
X5R
402
PEG_R2D_C_N<9>
C8433
0.1uF
PEG_R2D_C_P<8>
C8434
0.1uF
PEG_R2D_C_N<8>
C8435
0.1uF
10%
10%
13 IN
10%
13
IN
10%
13
IN
10%
88
88
=PP1V2_S0_PCIE_GPU_VDDR
=PP1V2_S0_PCIE_GPU_PVDD
OMIT
13
IN
PEG_R2D_C_P<7>
C8436
0.1uF
IN
PEG_R2D_C_N<7>
C8437
0.1uF
13
M56P
BGA
W27
N23
W29
P23
PCIE_PVDD_12
(1.2V)
Y26
C8402
C8401
1uF
10%
6.3V
CERM
402
U23
V23
1uF
PEG_R2D_C_N<6>
C8439
22uF
10%
6.3V
CERM
402
20%
6.3V
X5R
805
13
13
AA23
N27
C8407
AA25
N28
1uF
1uF
22uF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
20%
6.3V
X5R
805
N29
AL29
C8406
13
C8405
PCIE_VDDR_12
(1.2V)
AB23
13
AM27
1uF
1uF
1uF
22uF
AB29
AM28
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
20%
6.3V
X5R
805
AC23
AM29
AC24
AM30
C8413
C8412
C8411
13
C8410
AD25
AD26
AD29
AD31
PCIE_VSS
AE27
AE29
AF26
AF28
AF29
AF30
AG25
PCIE_PVSS
PEG_R2D_C_N<5>
0.1uF
PEG_R2D_C_P<4>
C8442
C8443
0.1uF
IN
PEG_R2D_C_N<4>
IN
PEG_R2D_C_P<3>
C8444
IN
PEG_R2D_C_N<3>
IN
W23
GND_GPU_PCIE_PVSS
13
VOLTAGE=0V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
N24
13
IN
IN
0.1uF
C8445
0.1uF
PEG_R2D_C_P<2>
C8446
0.1uF
PEG_R2D_C_N<2>
C8447
0.1uF
PEG_R2D_C_P<1>
C8448
0.1uF
PEG_R2D_C_N<1>
C8449
0.1uF
L8400
P25
FERR-220-OHM
P26
0402
13
IN
PEG_R2D_C_P<0>
C8450
0.1uF
C8451
0.1uF
IN
PEG_R2D_C_N<0>
P28
16V
16V
16V
16V
16V
X5R
X5R
X5R
X5R
X5R
X5R
402
AH30
AG30
PCIE_TX1P
PCIE_TX1N
PCIE_RX1P
PCIE_RX1N
PEG_D2R_C_P<0>
PEG_D2R_C_N<0>
16V
X5R
16V
16V
X5R
X5R
402
16V
16V
16V
16V
16V
X5R
X5R
X5R
X5R
X5R
X5R
402
402
402
402
402
402
16V
X5R
402
X5R
C8457
0.1uF
C8458
0.1uF
C8459
0.1uF
C8460
0.1uF
10%
AJ25
AH25
PEG_D2R_C_P<1>
PEG_D2R_C_N<1>
10%
AG32
AF32
PCIE_TX2P
PCIE_TX2N
PCIE_RX2P
PCIE_RX2N
AH28
AG28
PEG_D2R_C_P<2>
PEG_D2R_C_N<2>
10%
PEG_R2D_P<3>
PEG_R2D_N<3>
AF31
AE31
PCIE_RX3P
PCIE_RX3N
PEG_R2D_P<4>
PEG_R2D_N<4>
AE30
AD30
PCIE_RX4P
PCIE_RX4N
PEG_R2D_P<5>
PEG_R2D_N<5>
AD32
AC32
PCIE_RX5P
PCIE_RX5N
PEG_R2D_P<6>
PEG_R2D_N<6>
AC31
AB31
PCIE_RX6P
PCIE_RX6N
AG27
AF27
PEG_D2R_C_P<3>
PEG_D2R_C_N<3>
C8461
0.1uF
C8462
0.1uF
C8463
0.1uF
C8464
0.1uF
C8465
0.1uF
C8466
0.1uF
C8467
0.1uF
C8468
0.1uF
C8469
0.1uF
C8470
0.1uF
C8471
0.1uF
C8472
0.1uF
IN
R23
IN
AF25
AE25
PEG_D2R_C_P<4>
PEG_D2R_C_N<4>
10%
PCIE_TX5P
PCIE_TX5N
AE28
AD28
PEG_D2R_C_P<5>
PEG_D2R_C_N<5>
10%
10%
PCIE_TX6P
PCIE_TX6N
AD27
AC27
PEG_D2R_C_P<6>
PEG_D2R_C_N<6>
10%
10%
PEG_R2D_P<7>
PEG_R2D_N<7>
AB30
AA30
PCIE_RX7P
PCIE_RX7N
PCIE_TX7P
PCIE_TX7N
AC25
AB25
PEG_D2R_C_P<7>
PEG_D2R_C_N<7>
10%
10%
PEG_R2D_P<8>
PEG_R2D_N<8>
AA32
Y32
PCIE_RX8P
PCIE_RX8N
PCIE_TX8P
PCIE_TX8N
AB28
AA28
PEG_D2R_C_P<8>
PEG_D2R_C_N<8>
AG31
T24
PCIE_VSS
PEG_R2D_P<9>
PEG_R2D_N<9>
Y31
W31
PCIE_RX9P
PCIE_RX9N
PCIE_TX9P
PCIE_TX9N
AA27
Y27
PEG_D2R_C_P<9>
PEG_D2R_C_N<9>
0.1uF
C8474
0.1uF
10%
10%
PEG_R2D_P<10>
PEG_R2D_N<10>
W30
V30
PCIE_RX10P
PCIE_RX10N
PCIE_TX10P
PCIE_TX10N
Y25
W25
PEG_D2R_C_P<10>
PEG_D2R_C_N<10>
C8475
0.1uF
C8476
0.1uF
C8477
0.1uF
C8478
0.1uF
C8479
10%
10%
PEG_R2D_P<11>
PEG_R2D_N<11>
V32
U32
PCIE_RX11P
PCIE_RX11N
PCIE_TX11P
PCIE_TX11N
W28
V28
PEG_D2R_C_P<11>
PEG_D2R_C_N<11>
0.1uF
C8480
0.1uF
C8481
0.1uF
C8482
0.1uF
10%
10%
PEG_R2D_P<12>
PEG_R2D_N<12>
U31
T31
PCIE_RX12P
PCIE_RX12N
PCIE_TX12P
PCIE_TX12N
V27
U27
PEG_D2R_C_P<12>
PEG_D2R_C_N<12>
10%
10%
PEG_R2D_P<13>
PEG_R2D_N<13>
T30
R30
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
U25
T25
PEG_D2R_C_P<13>
PEG_D2R_C_N<13>
10%
10%
PEG_R2D_P<14>
PEG_R2D_N<14>
R32
P32
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
T28
R28
PEG_D2R_C_P<14>
PEG_D2R_C_N<14>
C8483
0.1uF
C8484
0.1uF
C8485
0.1uF
C8486
0.1uF
10%
402
402
10%
PEG_R2D_P<15>
PEG_R2D_N<15>
P31
N31
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
R27
P27
PEG_D2R_C_P<15>
PEG_D2R_C_N<15>
10%
402
402
16V
X5R
402
X5R
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
16V
X5R
X5R
402
16V
X5R
402
X5R
10%
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
X5R
PEG_D2R_N<14>
13
PEG_D2R_P<13>
OUT
13
PEG_D2R_N<13>
OUT
13
PEG_D2R_P<12>
OUT
13
PEG_D2R_N<12>
OUT
13
PEG_D2R_P<11>
OUT
13
PEG_D2R_N<11>
OUT
13
PEG_D2R_P<10>
13
PEG_D2R_N<10>
13
PEG_D2R_P<9>
13
PEG_D2R_N<9>
13
PEG_D2R_P<8>
13
PEG_D2R_N<8>
13
PEG_D2R_P<7>
13
PEG_D2R_N<7>
13
PEG_D2R_P<6>
13
PEG_D2R_N<6>
13
PEG_D2R_P<5>
OUT
13
PEG_D2R_N<5>
OUT
13
PEG_D2R_P<4>
OUT
13
PEG_D2R_N<4>
OUT
13
PEG_D2R_P<3>
13
PEG_D2R_N<3>
13
PEG_D2R_P<2>
13
PEG_D2R_N<2>
13
PEG_D2R_P<1>
13
PEG_D2R_N<1>
13
PEG_D2R_P<0>
13
PEG_D2R_N<0>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
402
X5R
OUT
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
X5R
402
16V
PEG_D2R_P<14>
13
OUT
402
16V
16V
13
OUT
402
X5R
16V
PEG_D2R_N<15>
402
16V
16V
PEG_D2R_P<15>
13
402
2
10%
C8473
X5R
2
10%
16V
16V
13
402
X5R
OUT
OUT
OUT
OUT
OUT
402
GPU_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
AL28
AK28
=PPVIO_S0_PCIE
PCIE_REFCLKP
PCIE_REFCLKN
88
R8495
2.0K
R26
R31
10%
R25
R29
10%
R24
AG29
10%
PCIE_TX4P
PCIE_TX4N
X5R
2
10%
PCIE_TX3P
PCIE_TX3N
16V
P30
AG26
402
10%
16V
402
402
X5R
402
X5R
16V
0.1uF
402
16V
X5R
C8456
402
10%
16V
0.1uF
402
402
16V
C8455
10%
PEG_R2D_P<2>
PEG_R2D_N<2>
402
X5R
10%
P29
PEG_R2D_P<1>
PEG_R2D_N<1>
402
16V
10%
13
16V
X5R
402
10%
10%
N30
P24
16V
X5R
402
10%
13 IN
AH24
0.1uF
C8441
IN
AJ27
10%
402
X5R
10%
13
AM31
AC30
C8440
0.1uF
16V
X5R
402
16V
10%
AB27
AC29
IN
PEG_R2D_C_P<5>
AL31
AL32
AC28
IN
16V
X5R
10%
10%
AB26
AC26
10%
13
AL30
AA31
10%
N26
AA29
2000mA
N25
Y30
AA26
0.1uF
C8400
Y29
AE26
PEG_R2D_C_P<6>
IN
0.1uF
10%
Y28
IN
13
100mA
(2 OF 7)
Y24
13
C8438
AK27
2
10%
U8400
16V
2
10%
PCIE_TX0P
PCIE_TX0N
402
16V
10%
13
X5R
402
16V
10%
13
16V
X5R
AH31
PCIE_RX0P
PCIE_RX0N
402
10%
10%
13
16V
X5R
402
10%
10%
0.1uF
IN
16V
X5R
AJ31
10%
13
16V
PEG_R2D_P<0>
PEG_R2D_N<0>
13
IN
PEG_RESET_L
AF24
PERST*
PERST*_MASK
AA24
PCIE_TEST
AG24
NC
PCIE_CALRP
PCIE_CALRN
AD24
AE24
GPU_PCIE_CALRP
GPU_PCIE_CALRN
PCIE_CALI
AB24
GPU_PCIE_CALI
1%
1/16W
MF-LF
402
T26
AH26
T27
AH27
T29
AH29
U24
AJ26
U26
AJ28
U28
R8497 1
1.47K
1%
1/16W
MF-LF
402
R8496
562
1%
1/16W
MF-LF
402
AJ29
U29
AJ30
U30
AJ32
V24
AK26
V25
AK29
V26
AK30
V29
AK31
V31
SYNC_DATE=(MASTER)
AK32
W24
AL27
W26
SIZE
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
84
110
88
88
C8501
10%
16V
X5R
603
D
88
2.2UF
20%
6.3V
CERM1
603
R8502
R8503
33K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
20%
6.3V
CERM1
603
R8507
10K
GPUVCORE_EN
GPUVCORE_PGOOD
R8508
C8507
150K
2
1
C8506
10%
16V
CERM
402
R8506
1%
1/16W
MF-LF
2 402
FSET
EN
FCCM
PGOOD
COMP
GPUVCORE_FB
15PF
1%
1/16W
MF-LF
402
5%
50V
CERM
402
UG
14
R8588
GPUVCORE_UG
BOOT
PHASE
ISEN
13
15
9
22uF
20%
16V
X7R
1210
0.22UF
LFPAK
5%
1/16W
MF-LF
402
GPUVCORE_BOOT
GPUVCORE_PHASE
GPUVCORE_ISEN
LG
11
PGND
10
10%
50V
CERM
402
1%
1/16W
MF-LF
402
HAT2165H
LFPAK
THRML
PAD
C8522
GND_GPUVCORE_SGND
10%
25V
X7R
402
C8521
2
1
R85A0
4.53K2
1%
1/16W
MF-LF
402
GPUISENS_POS
1
59
GPUVCORE_IOUT OUT
C85A0
0.22UF
20%
6.3V
2 X5R
402
R8592
2
GND_SMC_AVSS
1%
1/16W
MF-LF
402
Placement Note:
1.5UH
58 59 76
C8592
470pF
2
10%
50V
CERM
402
R8599
=PPVCORE_S0_GPU_REG
88
5.11
1%
1/4W
MF-LF
2 1206
<Ra>
R8521 1
1%
1/16W
MF-LF
402 2
C8599
1
1
<Rb>
1
OMIT
D8520
R8522
SMB
10%
25V
X7R
402
C8540
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
20%
6.3V
X5R
805
1
C8543
22uF
20%
6.3V
X5R
805
C8542
330uF
22uF
C8541
1000PF
1000pF
1000pF
SM
L8520
5%
50V
2 CERM
1206
NO STUFF
NO STUFF
XW8500
LMV2011MF
U8595_1
1M
U8595
1
1
CRITICAL
R8599_2
Q8522
SOT23-5
3.01K
NO STUFF
CRITICAL
17
10%
6.3V
CERM
402
CRITICAL
27.4K
CRITICAL
GPUVCORE_LG
GPUISENS_NEG
R8591
1
R8590 1
Q8521
IHLP
R8510
27.4K
1%
1/16W
MF-LF
402
VO
GPUISENS_RC
3.01K
FB
1uF
1%
1/16W
MF-LF
402
LFPAK
5%
1/16W
MF-LF
2 402
1uF
649
1
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
C8590
2
2
20%
6.3V
X5R
402
Q8520
470PF
HAT2165H
C8508
R8505
C8532
20%
16V
X7R
1210
C8509
C8509_P1
NO STUFF
1
22uF
HAT2168H
GPUVCORE_COMP_R
40.2K
0.01UF
VIN
16
GPUVCORE_COMP
1
C8531
20%
16V
X7R
1210
CRITICAL
4
QFN
C8595
R8593
10%
6.3V
CERM
402
ISL6269
GPUVCORE_FCCM
77
22uF
VCC
U8500
GPUVCORE_FSET
88
C8530
PVCC
1%
1/16W
MF-LF
402
1M
2
5%
1/16W
MF-LF
2 402
12
10%
50V
CERM
402
R8598
1K
2.2UF
1
0
5%
1/16W
MF-LF
402
R8594
1
R8504 1
NO STUFF
PP5V_S0_GPUVCORE_VCC
C8502
470pF
0603-LF
2
NO STUFF
C8500
2
C8598
10KOHM-5%
1uF
=PP5V_S0_GPUISENS
R8597
1K
1%
1/16W
MF-LF
402
88
CRITICAL
R8596 1
=PP5V_S0_GPUVCORE
=PPVIN_S0_GPUVCORE
330uF
20%
2.5V-ESR9V 2
POLY
CASE-D2E-LF
5.11K
B340LBXF
1/16W
1%
MF-LF 402 2
Vout(low)
= 0.6V * (1 + Ra/Rb)
88
=PPVCORE_S0_GPU_BBP
=PPVOUT_S0_GPUBBP_LDO
88
88
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
85
110
8
Page Notes
U8400
M56P
BGA
100mA (Preliminary)
C8690
C8691
C8692
22uF
1uF
0.1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
16V
X5R
402
K18
K15
M23
R10
V10
BBP
BBN
AC14
=PNBB_S0_GPU
P19
R15
=PPVCORE_S0_GPU
14.2A @ 445/452MHz Core/Mem Clk for VDDC+VDDCI
R17
R18
C8600
C8601
C8604
C8605
C8606
C8607
C8608
C8609
C8610
R19
22uF
22uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
T16
20%
6.3V
X5R
805
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
T17
T18
U15
U16
U17
C8611
1uF
2
10%
6.3V
CERM
402
C8612
1uF
2
C8613
1uF
10%
6.3V
CERM
402
C8614
1uF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C8615
1uF
2
10%
6.3V
CERM
402
C8616
V14
1uF
V15
10%
6.3V
CERM
402
5%
1/10W
MF-LF
603
VDDC
(1.0V/1.2V)
V16
R8630 1
88 87
88
M6
M7
M8
M9
M24
M28
M32
N3
N7
N8
P1
P5
P6
P7
P15
V18
P17
W14
R3
W15
R6
W19
R14
AC11
R16
AC12
T10
AD11
T15
PPVCORE_S0_GPU_VDDCI
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
Y23
AC17
P14
P18
91 88
(7 OF 7)
OMIT
=PPBB_S0_GPU
88
T19
C8630
C8631
C8632
C8633
K14
U1
C8634
P16
U5
T14
22uF
1uF
1uF
1uF
1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
T23
U19
U6
U7
VDDCI
(1.0V/1.2V)
U8
W10
U9
W17
U10
=PP1V8R2V0_S0_FB_GPU
U14
U18
V3
A9
C8650
22uF
20%
6.3V
X5R
805
C8651
22uF
2
20%
6.3V
X5R
805
C8652
22uF
2
20%
6.3V
X5R
805
C8653
22uF
2
20%
6.3V
X5R
805
C8655
1uF
2
C8656
1uF
10%
6.3V
CERM
402
C8661
10%
6.3V
CERM
402
C8662
C8657
1uF
2
10%
6.3V
CERM
402
C8663
C8658
1uF
2
10%
6.3V
CERM
402
C8664
C8659
1uF
2
10%
6.3V
CERM
402
C8665
C8660
A12
K23
F18
V6
1uF
A15
A2
F19
V17
A18
A8
F21
V19
A21
A11
F22
A24
A13
F24
A30
A16
F27
Y1
C1
A19
F30
Y5
10%
6.3V
CERM
402
C8666
1uF
1uF
1uF
1uF
1uF
C32
A22
G13
Y6
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
F32
A25
G16
Y7
H13
A31
G19
AA4
H19
B1
G20
AA6
C8667
C8668
C8669
C8670
C8671
B32
G21
AC9
J10
C4
G22
AC10
C8672
J11
C5
G25
AD6
J13
C6
H1
AD7
J18
C9
H5
AD8
J19
C10
H7
AD9
J20
C15
H16
AD10
C18
H20
AD13
C20
H21
C21
H28
1uF
1uF
1uF
1uF
1uF
1uF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
J32
1
W18
1uF
J1
W16
VSS
C8673
C8674
C8675
C8676
C8677
C8678
K11
VSS
VDDR1
(1.8V/2.0V)
AD14
AD15
1uF
1uF
1uF
1uF
1uF
1uF
K13
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
K19
C24
H32
K20
C27
J3
AD17
K21
D11
J6
AE8
K24
D30
J9
AE14
C8679
C8680
C8681
C8682
E5
J12
AE15
L24
E8
J16
AE16
L32
E9
J21
AE17
1uF
1uF
1uF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
AD16
L23
1uF
2
VSS
C8683
1uF
2
M1
E12
J24
AF14
M10
E13
J28
AF16
N9
E16
J30
AG11
N10
E19
K10
AG16
P8
E25
K12
AG23
P9
E28
K16
AH10
P10
E30
K17
AH11
R1
E32
K27
AH16
R9
F3
K30
AJ10
V1
F6
L1
AK16
Y8
F10
L6
AL1
AL13
Y9
F13
L7
Y10
F15
L29
AA1
F16
M3
SYNC_DATE=(MASTER)
AM2
AM13
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
86
110
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89 5
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89 5
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89 5
IO
IO
89
IO
89
IO
89
IO
89
IO
89
IO
IO
89
IO
89
IO
89
IO
89
IO
89
IO
IO
89 5
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89
IO
89 5
IO
89
IO
89
IO
89
IO
89
IO
89
IO
B
1%
1/16W
MF-LF
402
R8712
40.2
IO
89
89
=PP1V8R2V0_S0_FB_GPU
40.2
IO
89
89 5
IO
89
89
IO
89 5
1%
1/16W
MF-LF
402
89
IO
89
IO
FB_A_DQ<0>
FB_A_DQ<1>
FB_A_DQ<2>
FB_A_DQ<3>
FB_A_DQ<4>
FB_A_DQ<5>
FB_A_DQ<6>
FB_A_DQ<7>
FB_A_DQ<8>
FB_A_DQ<9>
FB_A_DQ<10>
FB_A_DQ<11>
FB_A_DQ<12>
FB_A_DQ<13>
FB_A_DQ<14>
FB_A_DQ<15>
FB_A_DQ<16>
FB_A_DQ<17>
FB_A_DQ<18>
FB_A_DQ<19>
FB_A_DQ<20>
FB_A_DQ<21>
FB_A_DQ<22>
FB_A_DQ<23>
FB_A_DQ<24>
FB_A_DQ<25>
FB_A_DQ<26>
FB_A_DQ<27>
FB_A_DQ<28>
FB_A_DQ<29>
FB_A_DQ<30>
FB_A_DQ<31>
FB_A_DQ<32>
FB_A_DQ<33>
FB_A_DQ<34>
FB_A_DQ<35>
FB_A_DQ<36>
FB_A_DQ<37>
FB_A_DQ<38>
FB_A_DQ<39>
FB_A_DQ<40>
FB_A_DQ<41>
FB_A_DQ<42>
FB_A_DQ<43>
FB_A_DQ<44>
FB_A_DQ<45>
FB_A_DQ<46>
FB_A_DQ<47>
FB_A_DQ<48>
FB_A_DQ<49>
FB_A_DQ<50>
FB_A_DQ<51>
FB_A_DQ<52>
FB_A_DQ<53>
FB_A_DQ<54>
FB_A_DQ<55>
FB_A_DQ<56>
FB_A_DQ<57>
FB_A_DQ<58>
FB_A_DQ<59>
FB_A_DQ<60>
FB_A_DQ<61>
FB_A_DQ<62>
FB_A_DQ<63>
GPU_MVREFD0
GPU_MVREFS0
R8711 1
C8711
100
1%
1/16W
MF-LF
402
100
0.1uF
10%
16V
X5R
402
R8713
2
2
M30
L31
L30
H30
G31
G30
F31
M27
M29
L28
L27
J27
H29
G29
G27
M26
L26
M25
L25
J25
G28
H27
H26
F26
G26
H25
H24
H23
H22
J23
J22
E23
D22
D23
E22
E20
F20
D19
D18
B19
B18
C17
B17
C14
B14
C13
B13
D17
E18
E17
F17
E15
E14
F14
D13
H18
H17
G18
G17
G15
G14
H14
J14
C31
C30
A27
C8713
A28
0.1uF
1%
1/16W
MF-LF
402
M31
BGA
(4 OF 7)
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15
MEMORY INTERFACE A
IO
89
M56P
BGA
(3 OF 7)
MVREFD_0
MVREFS_0
(1.8V/
VDDRH0 2.0V)
VSSRH0
DQMA_0*
DQMA_1*
DQMA_2*
DQMA_3*
DQMA_4*
DQMA_5*
DQMA_6*
DQMA_7*
READ STROBE
IO
89
R8710
OMIT
U8400
WRITE STROBE
89 5
88 87 86
OMIT
U8400
M56P
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
QSA_0*
QSA_1*
QSA_2*
QSA_3*
QSA_4*
QSA_5*
QSA_6*
QSA_7*
CLKA0
CLKA0*
CSA0_0*
CSA0_1*
D26
89
F28
89
D28
89
D25
E24
89
E26
89
D27
89
F25
89
C26
89
B26
89
D29
89
B27
89
E27
E29
89
B25
89
C25
89
H31
89
J29
89
J26
89
G23
89
E21
89
B15
89
D14
89
J17
89
J31
89 5
K29
89 5
K25
89 5
F23
89 5
D20
89 5
B16
89 5
D16
89 5
H15
89 5
FB_A_MA<0>
FB_A_MA<1>
FB_A_MA<2>
89 5 FB_A_MA<3>
FB_A_MA<4>
FB_A_MA<5>
FB_A_MA<6>
FB_A_MA<7>
FB_A_MA<8>
FB_A_MA<9>
FB_A_MA<10>
FB_A_MA<11>
TP_FB_A_MA12
FB_A_BA<2>
FB_A_BA<0>
FB_A_BA<1>
K28
89 5
K26
89 5
G24
89 5
D21
89 5
C16
89 5
D15
89 5
J15
89 5
D31
89 5
E31
89 5
89 5
C28
FB_A_WDQS<0>
FB_A_WDQS<1>
FB_A_WDQS<2>
FB_A_WDQS<3>
FB_A_WDQS<4>
FB_A_WDQS<5>
FB_A_WDQS<6>
FB_A_WDQS<7>
IO
OUT
90
IO
90
IO
OUT
OUT
90
IO
OUT
90
IO
90
IO
OUT
OUT
90 5
IO
90
IO
OUT
90
IO
OUT
90
IO
OUT
90
IO
OUT
90
IO
OUT
90
IO
OUT
90
OUT
IO
IO
90
IO
IO
90
IO
IO
90
IO
IO
90
IO
IO
90
IO
IO
90
IO
IO
90
IO
IO
90 5
IO
90
IO
IN
90
IO
IN
90
IO
IN
90
IO
IN
90
IO
IN
90
IO
IN
90
IO
IN
90 5
IO
IN
90
IO
OUT
90
IO
OUT
90
IO
90
IO
OUT
90
IO
OUT
90
IO
90 5
OUT
OUT
OUT
FB_A_CLK_P<0>
FB_A_CLK_N<0>
FB_A_CS_L<0>
OUT
OUT
OUT
B30
89 5
FB_A_CKE<0>
OUT
B28
89 5
FB_A_RAS_L<0>
OUT
CASA0*
C29
89 5
FB_A_CAS_L<0>
OUT
WEA0*
B31
89 5
FB_A_WE_L<0>
OUT
IO
90
IO
90
IO
90
IO
90
IO
90
IO
90
IO
90 5
IO
90
IO
90
IO
CLKA1
CLKA1*
B20
89 5
C19
89 5
B23
89 5
FB_A_CLK_P<1>
FB_A_CLK_N<1>
FB_A_CS_L<1>
OUT
88 87 86
R8720
40.2
CKEA1
C22
89 5
FB_A_CKE<1>
RASA1*
B24
89 5
FB_A_RAS_L<1>
CASA1*
B22
89 5
FB_A_CAS_L<1>
OUT
WEA1*
B21
89 5
FB_A_WE_L<1>
OUT
ODTA1
D24
TP_FB_A_ODT<1>
OUT
OUT
OUT
1%
1/16W
MF-LF
402
90
IO
IO
90 5
IO
90
IO
90
IO
90
IO
90
IO
90
IO
90
IO
90
IO
OUT
NC
IO
IO
OUT
IO
90
90
=PP1V8R2V0_S0_FB_GPU
90
90
TP_FB_A_ODT<0> OUT
F29
R8722
40.2
1%
1/16W
MF-LF
402
GPU_MVREFD1
GPU_MVREFS1
R8721 1
100
1%
1/16W
MF-LF
402
C8721
100
0.1uF
10%
16V
X5R
402
R8723
2
2
PP1V8R2V0_S0_GPU_VDDRH1
C8723
L8715
=PP1V8R2V0_S0_FB_GPU
10%
16V
X5R
402
GPU_TEST_MCLK
GPU_TEST_YCLK
GPU_MEMTEST
2
0402
88 87 86
C8715
FERR-220-OHM
1
PP1V8R2V0_S0_GPU_VDDRH0
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
VOLTAGE=1.8V
=PP1V8R2V0_S0_FB_GPU
5%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
VOLTAGE=1.8V
1
0402
1
C8716
C8725
C8726
1uF
1uF
1uF
1uF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C12
B11
C11
C8
B7
C7
B6
F12
D12
E11
F11
F9
D8
D7
F7
G12
G11
H12
H11
H9
E7
F8
G8
G6
G7
H8
J8
K8
L8
K9
L9
K5
L4
K4
L5
N5
N6
P4
R4
P2
R2
T3
T2
W3
W2
Y3
Y2
T4
R5
T5
T6
V5
W5
W6
Y4
R8
T8
R7
T7
V7
W7
W8
W9
B3
C3
F1
AA5
AA2
AA7
DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
MVREFD_1
MVREFS_1
(1.8V/
VDDRH1 2.0V)
VSSRH1
TEST_MCLK
TEST_YCLK
MEMTEST
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15
G4
90
E6
90
E4
90
H4
J5
90
G5
90
F4
90
H6
90
G3
90
G2
90
D4
90
F2
90
F5
90
H2
90
H3
90
DQMB_0*
DQMB_1*
DQMB_2*
DQMB_3*
DQMB_4*
DQMB_5*
DQMB_6*
DQMB_7*
B8
90
D9
90
G9
90
K7
90
M5
90
V2
90
W4
90
T9
90
QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7
B9
90 5
D10
90 5
H10
90 5
K6
90 5
N4
90 5
U2
90 5
U4
90 5
V8
90 5
QSB_0*
QSB_1*
QSB_2*
QSB_3*
QSB_4*
QSB_5*
QSB_6*
QSB_7*
B10
90 5
E10
90 5
G10
90 5
J7
90 5
M4
90 5
U3
90 5
V4
90 5
V9
90 5
CLKB0
CLKB0*
B4
90 5
B5
90 5
FB_B_CLK_P<0>
FB_B_CLK_N<0>
CSB0_0*
CSB0_1*
D2
90 5
FB_B_CS_L<0>
4.7K
5%
1/16W
MF-LF
402
FB_B_DQM_L<0>
FB_B_DQM_L<1>
FB_B_DQM_L<2>
FB_B_DQM_L<3>
FB_B_DQM_L<4>
FB_B_DQM_L<5>
FB_B_DQM_L<6>
FB_B_DQM_L<7>
FB_B_RDQS<0>
FB_B_RDQS<1>
FB_B_RDQS<2>
FB_B_RDQS<3>
FB_B_RDQS<4>
FB_B_RDQS<5>
FB_B_RDQS<6>
FB_B_RDQS<7>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
FB_B_WDQS<0>
FB_B_WDQS<1>
FB_B_WDQS<2>
FB_B_WDQS<3>
FB_B_WDQS<4>
FB_B_WDQS<5>
FB_B_WDQS<6>
FB_B_WDQS<7>
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
CKEB0
C2
90 5
FB_B_CKE<0>
OUT
RASB0*
E2
90 5
FB_B_RAS_L<0>
OUT
CASB0*
D3
90 5
FB_B_CAS_L<0>
OUT
WEB0*
B2
90 5
FB_B_WE_L<0>
OUT
ODTB0
D6
TP_FB_B_ODT<0>
OUT
CLKB1
CLKB1*
N2
90 5
P3
90 5
FB_B_CLK_P<1>
FB_B_CLK_N<1>
CSB1_0*
CSB1_1*
K2
90 5
FB_B_CS_L<1>
OUT
OUT
OUT
NC
K3
CKEB1
L3
90 5
FB_B_CKE<1>
RASB1*
J2
90 5
FB_B_RAS_L<1>
CASB1*
L2
90 5
FB_B_CAS_L<1>
OUT
WEB1*
M2
90 5
FB_B_WE_L<1>
OUT
ODTB1
J4
TP_FB_B_ODT<1>
OUT
DRAM_RST
OUT
NC
E3
AA3
88
OUT
FB_DRAM_RST
OUT
OUT
R8733
4.7K
2
1
R8730
FB_B_MA<0>
FB_B_MA<1>
FB_B_MA<2>
90 5 FB_B_MA<3>
FB_B_MA<4>
FB_B_MA<5>
FB_B_MA<6>
FB_B_MA<7>
FB_B_MA<8>
FB_B_MA<9>
FB_B_MA<10>
FB_B_MA<11>
TP_FB_B_MA12
FB_B_BA<2>
FB_B_BA<0>
FB_B_BA<1>
D5
4.7K
L8725
FERR-220-OHM
B12
E1
0.1uF
1%
1/16W
MF-LF
402
R8731
87 86
88
IO
90
NC
ODTA0
IO
90
OUT
FB_B_DQ<0>
FB_B_DQ<1>
FB_B_DQ<2>
FB_B_DQ<3>
FB_B_DQ<4>
FB_B_DQ<5>
FB_B_DQ<6>
FB_B_DQ<7>
FB_B_DQ<8>
FB_B_DQ<9>
FB_B_DQ<10>
FB_B_DQ<11>
FB_B_DQ<12>
FB_B_DQ<13>
FB_B_DQ<14>
FB_B_DQ<15>
FB_B_DQ<16>
FB_B_DQ<17>
FB_B_DQ<18>
FB_B_DQ<19>
FB_B_DQ<20>
FB_B_DQ<21>
FB_B_DQ<22>
FB_B_DQ<23>
FB_B_DQ<24>
FB_B_DQ<25>
FB_B_DQ<26>
FB_B_DQ<27>
FB_B_DQ<28>
FB_B_DQ<29>
FB_B_DQ<30>
FB_B_DQ<31>
FB_B_DQ<32>
FB_B_DQ<33>
FB_B_DQ<34>
FB_B_DQ<35>
FB_B_DQ<36>
FB_B_DQ<37>
FB_B_DQ<38>
FB_B_DQ<39>
FB_B_DQ<40>
FB_B_DQ<41>
FB_B_DQ<42>
FB_B_DQ<43>
FB_B_DQ<44>
FB_B_DQ<45>
FB_B_DQ<46>
FB_B_DQ<47>
FB_B_DQ<48>
FB_B_DQ<49>
FB_B_DQ<50>
FB_B_DQ<51>
FB_B_DQ<52>
FB_B_DQ<53>
FB_B_DQ<54>
FB_B_DQ<55>
FB_B_DQ<56>
FB_B_DQ<57>
FB_B_DQ<58>
FB_B_DQ<59>
FB_B_DQ<60>
FB_B_DQ<61>
FB_B_DQ<62>
FB_B_DQ<63>
IO
90 5
CKEA0
C23
IO
OUT
RASA0*
CSA1_0*
CSA1_1*
IO
90
90
FB_A_RDQS<0>
FB_A_RDQS<1>
FB_A_RDQS<2>
FB_A_RDQS<3>
FB_A_RDQS<4>
FB_A_RDQS<5>
FB_A_RDQS<6>
FB_A_RDQS<7>
89 5
90 5
OUT
FB_A_DQM_L<0>
FB_A_DQM_L<1>
FB_A_DQM_L<2>
FB_A_DQM_L<3>
FB_A_DQM_L<4>
FB_A_DQM_L<5>
FB_A_DQM_L<6>
FB_A_DQM_L<7>
K31
B29
OUT
10%
16V
X5R
402
MEMORY INTERFACE B
READ STROBE
WRITE STROBE
8
Page Notes
5%
1/16W
MF-LF
402
R8732
243
1%
1/16W
MF-LF
402
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
87
110
M56 GPIOS
=PP3V3_S0_GPU_VDDR3
88 91
ONLY ON IN RUN
94 91
59
PP1V0R1V2_S0_GPU
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
VOLTAGE=1.2V
=PPVCORE_S0_GPU_REG
=PPVCORE_S0_GPU
=PPVCORE_S0_GPU_BBP
85
PP5V_S0_GPUVCORE_VCC
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
VOLTAGE=5V
10 1
1/10W
R8800
86 91
GPU_GPIO_1
10K1
1/16W
R8802
402 MF-LF 5%
85
91
=PP1V2_S0_PCIE_GPU_VDDR 84
=PP1V2_S0_PCIE_GPU_PVDD 84
=PPVIO_S0_PCIE 84
=PP1V2_S0_REG 77
=PP1V2_S0_GPU_VDDPLL 91
PPBB_S0_GPU
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
VOLTAGE=1.2V
GPU_GPIO_2
NOSTUFF2 R8803
10K1
1/16W
91
GPU_GPIO_3
91
GPU_GPIO_4
402 MF-LF 5%
NOSTUFF2 R8804
1
10K
1/16W
402 MF-LF 5%
NOSTUFF2 R8805
10K1
1/16W
402 MF-LF 5%
=PPVOUT_S0_GPUBBP_LDO 85
=PPBB_S0_GPU 86
PNBB_S0_GPU
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=0
=PNVOUT_S0_GPUBBN_REG 85
=PNBB_S0_GPU 86
PP3V3_S0
=PP3V3_S0_GPUBBP
=PP3V3_S0_GPUBBCTL
=PP3V3_DDC_DVI 97
=PP3V3_S0_LCD 94
=PP3V3_S0_GPU_VDDR3 88 91
=PP3V3_S0_GPU 6 91 93
=PP3V3_S0_GPUBBN
=PP3V3_S0_GPU_CLOCKS
=PP3V3_DDC_LCD 94
=PP3V3_GPU 94
77 11 6
5%
R8813
402 MF-LF 5%
85
GPUVCORE_VCC
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
VOLTAGE=5V
PP1V2_GPU_IO_S0
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
VOLTAGE=1.2V
76 61 59 41 26 11 10 6
=PP5V_S0_GPUVCORE
603 MF-LF
1/16W
85
10K1
GPU_GPIO_0
91
GPU_GPIO_5
91
GPU_GPIO_6
1/16W
R8806
402 MF-LF 5%
NOSTUFF2 R8807
10K1
1/16W
402 MF-LF 5%
TP_GPU_GPIO_7
MAKE_BASE=TRUE
91
GPU_GPIO_8
10K1
97
91
GPU_GPIO_9
91
GPU_GPIO_13
=PP2V5_S0_GPU_PVDD 91
=PP2V5_S0_GPU_VDD25 91
=PP2V5_S0_GPU_VDDC_CT 91
=PP2V5_S0_GPU 93
GPU_GPIO_12
91
GPU_GPIO_11
91
GPU_GPIO_10
91
NOSTUFF
2 R8809
10K1
402 MF-LF 5%
NOSTUFF R8812
2
10K1
1/16W
402 MF-LF 5%
ATI_FB_256M
2 R8810
10K 1
1/16W
402 MF-LF 5%
NOSTUFF2 R8811
10K1
1/16W
402 MF-LF 5%
ATI_FB_256M
91
GPU_GPIO_24
GPU_GPIO_14
91
TP_GPU_GPIO_17
MAKE_BASE=TRUE
GPU_GPIO_17
91
TP_GPU_VGA_R
MAKE_BASE=TRUE
GPU_VGA_R
TP_GPU_VGA_G
MAKE_BASE=TRUE
GPU_VGA_G
93
TP_GPU_VGA_B
MAKE_BASE=TRUE
GPU_VGA_B
93
=PP1V8_S0_FB_VDD 89 90
=PP1V8R3V3_S0_GPU_VDDR4 91
=PP1V8R3V3_S0_GPU_VDDR5 91
=PP1V8_S0_FB_VDDQ 89 90
PP1V8_S0 78
=PP1V8R2V0_S0_FB_GPU 86 87
TP_GPU_GPIO_14
MAKE_BASE=TRUE
402 MF-LF 5%
1/16W
91
GPU_GPIO_7
NOSTUFF
2 R8808
1/16W
NC_GPU_GPIO_10
MAKE_BASE=TRUE
PP2V5_S0
PP1V8R2V0_S0_FB_GPU
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
VOLTAGE=1.8V
10K1
10K1
1/16W
R8830
402 MF-LF 5%
TP_GPU_VGA_HSYNC
MAKE_BASE=TRUE
GPU_VGA_HSYNC
93
TP_GPU_VGA_VSYNC
MAKE_BASE=TRUE
GPU_VGA_VSYNC
93
TP_GPU_TV_Y
MAKE_BASE=TRUE
GPU_TV_Y
93
TP_GPU_TV_COMP
MAKE_BASE=TRUE
GPU_TV_COMP
93
TP_GPU_TV_C
MAKE_BASE=TRUE
GPU_TV_C
TP_GPU_DDC_B_CLK
MAKE_BASE=TRUE
91
GPU_GPIO_27
91
GPU_GPIO_28
TP_GPU_DDC_B_DATA
MAKE_BASE=TRUE
ATI_FB_HYNIX
2 R8831
10K1
1/16W
93
93
GPU_DDC_B_CLK
93
GPU_DDC_B_DATA
93
402 MF-LF 5%
B
83 81 80 79 78 77 11 6 5
PP12V_S5
=PPVIN_S0_GPUVCORE
85
10K1
1/16W
R8832
402 MF-LF 5%
TMDS_PANEL
6
PP12V_S0
=PP12V_GPU
91
GPU_GPIO_29
10K1
1/16W
94
R8833
402 MF-LF 5%
GPU_VCORE_LOW
MAKE_BASE=TRUE
97 75 6
PP5V_S0
=PP5V_S0_GPUBBCTL
=PP5V_S0_DVI_DDC
=PP5V_S0_GPUISENS
GPU_GPIO_15
10K1
1/16W
97
91
R8850
402 MF-LF
5%
85
85
GPUVCORE_EN
87
33 1
1/16W
R8801
402 MF-LF 5%
FB_DRAM_RST
MAKE_BASE=TRUE
PM_SLP_S3_L 6
DRAM_RST
23 58 77 79
GPU MISC
5 89 90
5
CRITICAL
90 89 88
C8902
C8903
C8904
0.1uF
0.1uF
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
VDD3
M1
M12
V2
L8910
V11
FERR-220-OHM
1
F1
F12
PP1V8_FB_A0_VDDA0
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
L8915
FERR-220-OHM
1
PP1V8_FB_A0_VDDA1
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
C8910
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
U8900.J1
C8915
0.1uF
U8900.J12
IN
22uF
20%
6.3V
X5R
805
C8921
C8922
C8924
C8925
C8926
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
R8930
R8932
2.37K
2.37K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R8933
5.49K
V10
FERR-220-OHM
VSSA0
J1
VSSA1
J12
B4
FERR-220-OHM
B9
C4
VDDQ3
VSSQ3
B12
C9
VDDQ4
VDDQ5
VSSQ4
VSSQ5
D1
D9
E9
VDDQ8
VSSQ8
G2
VSSQ9
VSSQ10
G11
J9
VDDQ11
VSSQ11
L11
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
R8940 1
PP1V8_FB_A1_VDDA1
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
IN
22uF
20%
6.3V
X5R
805
C8971
C8972
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
87 5
87 5
87 5
87 5
87 5
IN
OUT
OUT
OUT
OUT
IN
IN
87 5
IN
87 5
IN
89 87
IN
89 87
89 87
IN
IN
10%
16V
X5R
402
0.1uF
10%
16V
X5R
402
121
FB_A_CKE<0>
FB_A_CLK_P<0>
FB_A_CLK_N<0>
FB_A_CS_L<0>
FB_A_WE_L<0>
FB_A_CAS_L<0>
FB_A_RAS_L<0>
V3
VSSA0
J1
VSSA1
J12
K1
VDDA0
VDDA1
A1
VDDQ0
VSSQ0
B1
A12
VDDQ1
VDDQ2
VSSQ1
VSSQ2
B4
C1
C4
VDDQ3
VSSQ3
B12
C9
VDDQ4
VDDQ5
VSSQ4
VSSQ5
D1
VDDQ6
VDDQ7
VSSQ6
VSSQ7
D9
E4
E9
VDDQ8
VSSQ8
G2
D4
D12
VDDQ9
VDDQ10
VSSQ9
VSSQ10
G11
J4
J9
VDDQ11
VSSQ11
L11
N1
VSSQ12
VSSQ13
P1
L2
VSSQ14
VDDQ14
VSSQ14
P9
VDDQ15
VDDQ16
VSSQ15
VSSQ16
P12
N12
VDDQ15
VDDQ16
VSSQ15
VSSQ16
P12
VDDQ17
VDDQ18
VSSQ17
VSSQ18
T4
R8980
2.37K
2.37K
R9
VDDQ17
VDDQ18
VSSQ17
VSSQ18
T4
T9
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R12
VDDQ19
VSSQ19
T12
V1
VDDQ20
VDDQ21
R12
VDDQ19
V1
VDDQ20
VDDQ21
H1
VREF0
H12
VREF1
VSSQ19
R1
T12
R8982
R4
FB_A1_VREF0
V12
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
FB_A1_VREF1
H1
VREF0
H12
VREF1
B9
VDDQ14
V10
N12
T1
L12
N9
R8981
R8983
5.49K
1%
1/16W
MF-LF
402 2
R8992 1
DM0
E3
87
FBGA
DM1
E10
87
K10
A2
A3
(1 OF 2)
DM2
DM3
N10
87
N3
87
H2
A4
A5
K3
A6
L4
A7
A8/AP
DQ1
DQ2
B2
B3
87
C2
87
DQ3
C3
87
DQ4
DQ5
E2
87
F3
87
DQ6
F2
L9
87
CKE
DQ7
DQ8
G3
H9
B11
87
J11
CK
DQ9
B10
87
J10
CK*
CS*
DQ10
DQ11
C11
87
C10
87
DQ12
DQ13
E11
87
F10
87
DQ14
F11
87
DQ15
DQ16
G10
A9
ZQ
MF
M11
87
V4
SEN
DQ17
L10
87
V9
RESET
DQ18
DQ19
N11
87
M10
87
DQ20
R11
87
DQ21
DQ22
R10
T11
87
T10
87
M2
87
F9
WE*
CAS*
H10
RAS*
D10
P10
P3
FB_A_BA<0>
FB_A_BA<1>
FB_A_BA<2>
A9
DQ0
87
A10
A11
D3
FB_A_WDQS<0>
FB_A_WDQS<3>
FB_A_WDQS<2>
FB_A_WDQS<1>
5%
1/16W
MF-LF
402
2
U8900
A4
FB_A_RDQS<0>
FB_A_RDQS<3>
FB_A_RDQS<2>
FB_A_RDQS<1>
OMIT
RDQS0
RDQS1
RDQS2
RDQS3
D2
WDQS0
DQ23
DQ24
D11
WDQS1
DQ25
L3
87
P11
DQ26
DQ27
N2
87
P2
WDQS2
WDQS3
M3
87
R2
87
BA0
DQ28
G9
DQ29
DQ30
R3
T2
87
DQ31
T3
87
G4
BA1
H3
BA2
TP_U8900_J2
J2
TP_U8900_J3
J3
RFU1
RFU2
R8991
1K
A1
H4
DRAM_RST
FB_A_DQM_L<0>
FB_A_DQM_L<3>
FB_A_DQM_L<2>
FB_A_DQM_L<1>
FB_A_DQ<2>
FB_A_DQ<4>
FB_A_DQ<3>
FB_A_DQ<7>
FB_A_DQ<1>
FB_A_DQ<5>
87 5 FB_A_DQ<0>
FB_A_DQ<6>
FB_A_DQ<28>
FB_A_DQ<30>
FB_A_DQ<29>
FB_A_DQ<27>
FB_A_DQ<31>
FB_A_DQ<25>
FB_A_DQ<26>
87 5 FB_A_DQ<24>
FB_A_DQ<21>
FB_A_DQ<23>
FB_A_DQ<19>
FB_A_DQ<20>
FB_A_DQ<22>
87 5 FB_A_DQ<16>
FB_A_DQ<18>
FB_A_DQ<17>
FB_A_DQ<13>
FB_A_DQ<14>
FB_A_DQ<12>
FB_A_DQ<15>
FB_A_DQ<11>
87 5 FB_A_DQ<8>
FB_A_DQ<10>
FB_A_DQ<9>
IN
89 87
IN
IN
89 87
IN
IN
89 87
IN
IN
89 87 5
IN
89 87
IN
IO
IO
IO
IO
IO
IO
IO
89 87
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
89 87
IN
5.49K
1%
1/16W
MF-LF
402 2
A0
F4
VSS6
VSS7
N4
K9
M4
VDD6
VDD7
P9
H11
K11
100
L1
G1
P4
CRITICAL
1%
1/16W
MF-LF
402
2
K2
1%
1/16W
MF-LF
402
G12
VSS4
VSS5
N9
K4
243
VSS3
N4
R8947
M9
R8949
C8976
FBGA
(2 OF 2)
VDDQ12
VDDQ13
FB_A_MA<0>
FB_A_MA<1>
FB_A_MA<2>
FB_A_MA<3>
FB_A_MA<4>
FB_A_MA<5>
FB_A_MA<6>
FB_A_MA<7>
FB_A_MA<8>
FB_A_MA<9>
FB_A_MA<10>
FB_A_MA<11>
R8948
10%
16V
X5R
402
2
1
C8981
P4
T1
T9
C8983
0.1uF
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
R8994 1
1%
1/16W
MF-LF
402
C8975
0.1uF
121
A10
P1
R8990 1
FB_A0_ZQ
FB_A0_MF
FB_A0_SEN
90 89 88 5
0.1uF
10%
16V
X5R
402
K4J52324QC-BC20
89 87
0.1uF
MFHIGH
IN
C8974
10%
16V
X5R
402
C8933
16MX32-GDDR3-500MHZ
IN
89 87 5
MFHIGH
89 87
A3
VSS1
VSS2
VSSQ12
VSSQ13
MFHIGH
IN
C8973
VSS0
K12
C12
0.1uF
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
2
U8900.J12
10%
16V
X5R
402
121
60.4
U8900.J1
0.1uF
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
2
10%
16V
X5R
402
10%
16V
X5R
402
121
121
0.1uF
2
0.1uF
1%
1/16W
MF-LF
402
R8945
C8965
10%
16V
X5R
402
OMIT
U8950
VDDQ12
VDDQ13
R8946 1
C8960
10%
16V
X5R
402
60.4
5%
1/16W
MF-LF
402
2
IN
C8931
R8943
VDD4
VDD5
M12
0.1uF
1%
1/16W
MF-LF
402
1
M1
E12
C8970
L2
121
R8941
VDD3
=PP1V8_S0_FB_VDDQ
1%
1/16W
MF-LF
402
1K
89 87
F12
E1
121
1%
1/16W
MF-LF
402
PP1V8_FB_A1_VDDA0
121
89 87
R8944 1
F1
VDD1
VDD2
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
1%
1/16W
MF-LF
402 2
R8942 1
0.1uF
90 89 88
VDDQ9
VDDQ10
C8954
0.1uF
L8965
D12
J4
C8953
10%
16V
X5R
402
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
D4
VSSQ6
VSSQ7
0.1uF
VDD0
V11
VSSQ1
VSSQ2
VDDQ6
VDDQ7
C8952
10%
16V
X5R
402
A2
A11
V2
VDDQ1
VDDQ2
E4
0.1uF
L8960
C1
V12
5.49K
1%
1/16W
MF-LF
402 2
V3
L12
C8951
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
R8931
VSS6
VSS7
A12
FB_A0_VREF1
VDD6
VDD7
B1
R9
FB_A0_VREF0
L1
20%
6.3V
X5R
805
VSSQ0
R4
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
VSS4
VSS5
22uF
VDDQ0
N1
VDD4
VDD5
C8950
A1
R1
1
G12
G1
VDDA1
C12
C8923
VSS3
K12
E12
1
FBGA
(2 OF 2)
VDDA0
=PP1V8_S0_FB_VDDQ
C8920
A10
K1
E1
90 89 88
A3
VSS1
VSS2
R8996 1
60.4
1%
1/16W
MF-LF
402
2
1
R8993
121
R8995
60.4
1%
1/16W
MF-LF
402
2
1%
1/16W
MF-LF
402
2
R8997
121
CRITICAL
1%
1/16W
MF-LF
402
FB_A_MA<0>
FB_A_MA<1>
FB_A_MA<2>
FB_A_MA<3>
FB_A_MA<4>
FB_A_MA<5>
FB_A_MA<6>
FB_A_MA<7>
FB_A_MA<8>
FB_A_MA<9>
FB_A_MA<10>
FB_A_MA<11>
OMIT
K9
A0
U8950
DM0
E3
87
H11
A1
FBGA
DM1
E10
87
K10
A2
A3
(1 OF 2)
DM2
DM3
N10
87
N3
87
M9
H2
A4
A5
K3
A6
L4
A7
A8/AP
K4
K2
M4
A9
K4J52324QC-BC20
0.1uF
VSS0
MFHIGH
C8901
OMIT
U8900
16MX32-GDDR3-500MHZ
20%
6.3V
X5R
805
VDD1
VDD2
=PP1V8_S0_FB_VDD
IO
IN
IO
87 5
IN
IO
87 5
IN
IO
87 5
IO
87 5
IN
IO
87 5
IN
IO
87 5
IN
IN
FB_A_CKE<1>
FB_A_CLK_P<1>
FB_A_CLK_N<1>
FB_A_CS_L<1>
FB_A_WE_L<1>
FB_A_CAS_L<1>
FB_A_RAS_L<1>
IO
IO
IO
IO
IO
IO
IO
90 89 88 5
87 5
87 5
87 5
87 5
IN
OUT
OUT
OUT
OUT
FB_A_RDQS<4>
FB_A_RDQS<7>
FB_A_RDQS<6>
FB_A_RDQS<5>
87 5
IO
87 5
IO
87 5
IN
IO
87 5
IN
89 87
IN
IO
IO
IO
89 87
89 87
IN
IN
IN
IN
243
5%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
100
87
F2
DQ9
B10
87
J10
CK*
CS*
DQ10
DQ11
C11
87
C10
87
DQ12
DQ13
E11
87
DQ14
F11
87
DQ15
DQ16
G10
87
A9
ZQ
MF
M11
87
V4
SEN
DQ17
L10
87
V9
RESET
DQ18
DQ19
N11
87
M10
87
DQ20
R11
DQ21
DQ22
R10
87
T11
87
T10
87
F9
WE*
CAS*
H10
RAS*
RDQS0
RDQS1
RDQS2
RDQS3
F10
D2
WDQS0
DQ23
DQ24
D11
WDQS1
DQ25
L3
87
P11
DQ26
DQ27
N2
87
P2
WDQS2
WDQS3
M3
87
R2
87
BA0
DQ28
G9
DQ29
DQ30
R3
87
T2
87
DQ31
T3
87
BA1
H3
BA2
TP_U8950_J2
J2
TP_U8950_J3
J3
RFU1
RFU2
IO
R8999
F3
DQ6
CK
G4
R8998
87
J11
P3
DQ4
DQ5
E2
87
P10
87
87
D10
FB_A_BA<0>
FB_A_BA<1>
FB_A_BA<2>
C3
B11
D3
FB_A_WDQS<4>
FB_A_WDQS<7>
FB_A_WDQS<6>
FB_A_WDQS<5>
87
DQ3
G3
IO
IO
87
C2
DQ7
DQ8
A4
DRAM_RST
B3
CKE
H4
IO
DQ1
DQ2
H9
F4
FB_A1_ZQ
FB_A1_MF
FB_A1_SEN
B2
L9
IO
87 5
DQ0
87
A10
A11
K11
MFHIGH
22uF
VDD0
IN
MFHIGH
C8900
A2
A11
1
Page Notes
CRITICAL
=PP1V8_S0_FB_VDD
K4J52324QC-BC20
IN
16MX32-GDDR3-500MHZ
90 89 88
K4J52324QC-BC20
16MX32-GDDR3-500MHZ
M2
FB_A_DQM_L<4>
FB_A_DQM_L<7>
FB_A_DQM_L<6>
FB_A_DQM_L<5>
FB_A_DQ<36>
FB_A_DQ<34>
FB_A_DQ<37>
FB_A_DQ<33>
FB_A_DQ<35>
FB_A_DQ<38>
87 5 FB_A_DQ<32>
FB_A_DQ<39>
FB_A_DQ<61>
FB_A_DQ<59>
FB_A_DQ<60>
FB_A_DQ<58>
FB_A_DQ<57>
87 5 FB_A_DQ<56>
FB_A_DQ<62>
FB_A_DQ<63>
FB_A_DQ<50>
FB_A_DQ<49>
FB_A_DQ<53>
FB_A_DQ<51>
87 5 FB_A_DQ<48>
FB_A_DQ<55>
FB_A_DQ<52>
FB_A_DQ<54>
87 5 FB_A_DQ<40>
FB_A_DQ<42>
FB_A_DQ<41>
FB_A_DQ<43>
FB_A_DQ<47>
FB_A_DQ<45>
FB_A_DQ<46>
FB_A_DQ<44>
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
SYNC_MASTER=(MASTER)
IO
IO
SYNC_DATE=(MASTER)
IO
IO
IO
5%
1/16W
MF-LF
402
SIZE
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
89
110
5
CRITICAL
90 89 88
C9002
C9003
C9004
0.1uF
0.1uF
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
VDD3
M1
M12
V2
L9010
V11
FERR-220-OHM
1
F1
F12
PP1V8_FB_B0_VDDA0
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
L9015
FERR-220-OHM
1
PP1V8_FB_B0_VDDA1
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
C9010
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
U9000.J1
C9015
0.1uF
U9000.J12
IN
22uF
20%
6.3V
X5R
805
C9021
C9022
C9024
C9025
C9026
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
R9030
R9032
2.37K
2.37K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R9033
5.49K
V10
FERR-220-OHM
VSSA0
J1
VSSA1
J12
B4
FERR-220-OHM
B9
C4
VDDQ3
VSSQ3
B12
C9
VDDQ4
VDDQ5
VSSQ4
VSSQ5
D1
D9
E9
VDDQ8
VSSQ8
G2
VSSQ9
VSSQ10
G11
J9
VDDQ11
VSSQ11
L11
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
R9040 1
PP1V8_FB_B1_VDDA1
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
IN
22uF
20%
6.3V
X5R
805
C9071
C9072
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
IN
87 5
87 5
87 5
87 5
87 5
87 5
IN
OUT
OUT
OUT
OUT
IN
IN
87 5
IN
87 5
IN
90 87
IN
90 87
90 87
IN
IN
10%
16V
X5R
402
0.1uF
10%
16V
X5R
402
121
FB_B_CKE<0>
FB_B_CLK_P<0>
FB_B_CLK_N<0>
FB_B_CS_L<0>
FB_B_WE_L<0>
FB_B_CAS_L<0>
FB_B_RAS_L<0>
V3
VSSA0
J1
VSSA1
J12
K1
VDDA0
VDDA1
A1
VDDQ0
VSSQ0
B1
A12
VDDQ1
VDDQ2
VSSQ1
VSSQ2
B4
C1
C4
VDDQ3
VSSQ3
B12
C9
VDDQ4
VDDQ5
VSSQ4
VSSQ5
D1
VDDQ6
VDDQ7
VSSQ6
VSSQ7
D9
E4
E9
VDDQ8
VSSQ8
G2
D4
D12
VDDQ9
VDDQ10
VSSQ9
VSSQ10
G11
J4
J9
VDDQ11
VSSQ11
L11
N1
VSSQ12
VSSQ13
P1
L2
VSSQ14
VDDQ14
VSSQ14
P9
VDDQ15
VDDQ16
VSSQ15
VSSQ16
P12
N12
VDDQ15
VDDQ16
VSSQ15
VSSQ16
P12
VDDQ17
VDDQ18
VSSQ17
VSSQ18
T4
R9080
2.37K
2.37K
R9
VDDQ17
VDDQ18
VSSQ17
VSSQ18
T4
T9
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R12
VDDQ19
VSSQ19
T12
V1
VDDQ20
VDDQ21
R12
VDDQ19
V1
VDDQ20
VDDQ21
H1
VREF0
H12
VREF1
VSSQ19
R1
T12
R9082
R4
FB_B1_VREF0
V12
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
FB_B1_VREF1
H1
VREF0
H12
VREF1
B9
VDDQ14
V10
N12
T1
L12
N9
R9081
R9083
5.49K
1%
1/16W
MF-LF
402 2
R9092 1
DM0
E3
87
FBGA
DM1
E10
87
K10
A2
A3
(1 OF 2)
DM2
DM3
N10
87
N3
87
H2
A4
A5
K3
A6
L4
A7
A8/AP
DQ1
DQ2
B2
B3
87
C2
87
DQ3
C3
87
DQ4
DQ5
E2
87
F3
87
DQ6
F2
L9
87
CKE
DQ7
DQ8
G3
H9
B11
87
J11
CK
DQ9
B10
87
J10
CK*
CS*
DQ10
DQ11
C11
87
C10
87
DQ12
DQ13
E11
87
F10
87
DQ14
F11
87
DQ15
DQ16
G10
A9
ZQ
MF
M11
87
V4
SEN
DQ17
L10
87
V9
RESET
DQ18
DQ19
N11
87
M10
87
DQ20
R11
87
DQ21
DQ22
R10
T11
87
T10
87
M2
87
F9
WE*
CAS*
H10
RAS*
D10
P10
P3
FB_B_BA<0>
FB_B_BA<1>
FB_B_BA<2>
A9
DQ0
87
A10
A11
D3
FB_B_WDQS<0>
FB_B_WDQS<3>
FB_B_WDQS<2>
FB_B_WDQS<1>
5%
1/16W
MF-LF
402
2
U9000
A4
FB_B_RDQS<0>
FB_B_RDQS<3>
FB_B_RDQS<2>
FB_B_RDQS<1>
OMIT
RDQS0
RDQS1
RDQS2
RDQS3
D2
WDQS0
DQ23
DQ24
D11
WDQS1
DQ25
L3
87
P11
DQ26
DQ27
N2
87
P2
WDQS2
WDQS3
M3
87
R2
87
BA0
DQ28
G9
DQ29
DQ30
R3
T2
87
DQ31
T3
87
G4
BA1
H3
BA2
TP_U9000_J2
J2
TP_U9000_J3
J3
RFU1
RFU2
R9091
1K
A1
H4
DRAM_RST
FB_B_DQM_L<0>
FB_B_DQM_L<3>
FB_B_DQM_L<2>
FB_B_DQM_L<1>
FB_B_DQ<2>
FB_B_DQ<4>
FB_B_DQ<3>
FB_B_DQ<7>
FB_B_DQ<1>
FB_B_DQ<5>
87 5 FB_B_DQ<0>
FB_B_DQ<6>
FB_B_DQ<28>
FB_B_DQ<30>
FB_B_DQ<29>
FB_B_DQ<27>
FB_B_DQ<31>
FB_B_DQ<25>
FB_B_DQ<26>
87 5 FB_B_DQ<24>
FB_B_DQ<21>
FB_B_DQ<23>
FB_B_DQ<19>
FB_B_DQ<20>
FB_B_DQ<22>
87 5 FB_B_DQ<16>
FB_B_DQ<18>
FB_B_DQ<17>
FB_B_DQ<13>
FB_B_DQ<14>
FB_B_DQ<12>
FB_B_DQ<15>
FB_B_DQ<11>
87 5 FB_B_DQ<8>
FB_B_DQ<10>
FB_B_DQ<9>
IN
90 87
IN
IN
90 87
IN
IN
90 87
IN
IN
90 87 5
IN
90 87
IN
IO
IO
IO
IO
IO
IO
IO
90 87
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
90 87
IN
5.49K
1%
1/16W
MF-LF
402 2
A0
F4
VSS6
VSS7
N4
K9
M4
VDD6
VDD7
P9
H11
K11
100
L1
G1
P4
CRITICAL
1%
1/16W
MF-LF
402
2
K2
1%
1/16W
MF-LF
402
G12
VSS4
VSS5
N9
K4
243
VSS3
N4
R9047
M9
R9049
C9076
FBGA
(2 OF 2)
VDDQ12
VDDQ13
FB_B_MA<0>
FB_B_MA<1>
FB_B_MA<2>
FB_B_MA<3>
FB_B_MA<4>
FB_B_MA<5>
FB_B_MA<6>
FB_B_MA<7>
FB_B_MA<8>
FB_B_MA<9>
FB_B_MA<10>
FB_B_MA<11>
R9048
10%
16V
X5R
402
2
1
C9081
P4
T1
T9
C9083
0.1uF
0.1uF
10%
16V
X5R
402
10%
16V
X5R
402
R9094 1
1%
1/16W
MF-LF
402
C9075
0.1uF
121
A10
P1
R9090 1
FB_B0_ZQ
FB_B0_MF
FB_B0_SEN
90 89 88 5
0.1uF
10%
16V
X5R
402
K4J52324QC-BC20
90 87
0.1uF
MFHIGH
IN
C9074
10%
16V
X5R
402
C9033
16MX32-GDDR3-500MHZ
IN
90 87 5
MFHIGH
90 87
A3
VSS1
VSS2
VSSQ12
VSSQ13
MFHIGH
IN
C9073
VSS0
K12
C12
0.1uF
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
2
U9000.J12
10%
16V
X5R
402
121
60.4
U9000.J1
0.1uF
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
2
10%
16V
X5R
402
10%
16V
X5R
402
121
121
0.1uF
2
0.1uF
1%
1/16W
MF-LF
402
R9045
C9065
10%
16V
X5R
402
OMIT
U9050
VDDQ12
VDDQ13
R9046 1
C9060
10%
16V
X5R
402
60.4
5%
1/16W
MF-LF
402
2
IN
C9031
R9043
VDD4
VDD5
M12
0.1uF
1%
1/16W
MF-LF
402
1
M1
E12
C9070
L2
121
R9041
VDD3
=PP1V8_S0_FB_VDDQ
1%
1/16W
MF-LF
402
1K
90 87
F12
E1
121
1%
1/16W
MF-LF
402
PP1V8_FB_B1_VDDA0
121
90 87
R9044 1
F1
VDD1
VDD2
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
1%
1/16W
MF-LF
402 2
R9042 1
0.1uF
90 89 88
VDDQ9
VDDQ10
C9054
0.1uF
L9065
D12
J4
C9053
10%
16V
X5R
402
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
D4
VSSQ6
VSSQ7
0.1uF
VDD0
V11
VSSQ1
VSSQ2
VDDQ6
VDDQ7
C9052
10%
16V
X5R
402
A2
A11
V2
VDDQ1
VDDQ2
E4
0.1uF
L9060
C1
V12
5.49K
1%
1/16W
MF-LF
402 2
V3
L12
C9051
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
R9031
VSS6
VSS7
A12
FB_B0_VREF1
VDD6
VDD7
B1
R9
FB_B0_VREF0
L1
20%
6.3V
X5R
805
VSSQ0
R4
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
VSS4
VSS5
22uF
VDDQ0
N1
VDD4
VDD5
C9050
A1
R1
1
G12
G1
VDDA1
C12
C9023
VSS3
K12
E12
1
FBGA
(2 OF 2)
VDDA0
=PP1V8_S0_FB_VDDQ
C9020
A10
K1
E1
90 89 88
A3
VSS1
VSS2
R9096 1
60.4
1%
1/16W
MF-LF
402
2
1
R9093
121
R9095
60.4
1%
1/16W
MF-LF
402
2
1%
1/16W
MF-LF
402
2
R9097
121
CRITICAL
1%
1/16W
MF-LF
402
FB_B_MA<0>
FB_B_MA<1>
FB_B_MA<2>
FB_B_MA<3>
FB_B_MA<4>
FB_B_MA<5>
FB_B_MA<6>
FB_B_MA<7>
FB_B_MA<8>
FB_B_MA<9>
FB_B_MA<10>
FB_B_MA<11>
OMIT
K9
A0
U9050
DM0
E3
87
H11
A1
FBGA
DM1
E10
87
K10
A2
A3
(1 OF 2)
DM2
DM3
N10
87
N3
87
M9
H2
A4
A5
K3
A6
L4
A7
A8/AP
K4
K2
M4
A9
K4J52324QC-BC20
0.1uF
VSS0
MFHIGH
C9001
OMIT
U9000
16MX32-GDDR3-500MHZ
20%
6.3V
X5R
805
VDD1
VDD2
=PP1V8_S0_FB_VDD
IO
IN
IO
87 5
IN
IO
87 5
IN
IO
87 5
IO
87 5
IN
IO
87 5
IN
IO
87 5
IN
IN
FB_B_CKE<1>
FB_B_CLK_P<1>
FB_B_CLK_N<1>
FB_B_CS_L<1>
FB_B_WE_L<1>
FB_B_CAS_L<1>
FB_B_RAS_L<1>
IO
IO
IO
IO
IO
IO
IO
90 89 88 5
87 5
87 5
87 5
87 5
IN
OUT
OUT
OUT
OUT
FB_B_RDQS<4>
FB_B_RDQS<7>
FB_B_RDQS<6>
FB_B_RDQS<5>
87 5
IN
IO
87 5
IN
IO
87 5
IN
IO
87 5
IN
90 87
IN
IO
IO
IO
90 87
90 87
IN
IN
243
5%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
100
F3
87
DQ6
F2
DQ9
B10
87
J10
CK*
CS*
DQ10
DQ11
C11
87
C10
87
DQ12
DQ13
E11
87
DQ14
F11
87
DQ15
DQ16
G10
87
A9
ZQ
MF
M11
87
V4
SEN
DQ17
L10
87
V9
RESET
DQ18
DQ19
N11
87
M10
87
DQ20
R11
DQ21
DQ22
R10
87
T11
87
T10
87
M2
87
F9
WE*
CAS*
H10
RAS*
RDQS0
RDQS1
RDQS2
RDQS3
F10
D2
WDQS0
DQ23
DQ24
D11
WDQS1
DQ25
L3
P11
DQ26
DQ27
N2
87
P2
WDQS2
WDQS3
M3
87
R2
87
BA0
DQ28
G9
DQ29
DQ30
R3
87
T2
87
DQ31
T3
87
BA1
H3
BA2
TP_U9050_J2
J2
TP_U9050_J3
J3
RFU1
RFU2
IO
R9099
87
CK
G4
R9098
DQ4
DQ5
E2
J11
P3
87
87
P10
C3
87
D10
FB_B_BA<0>
FB_B_BA<1>
FB_B_BA<2>
DQ3
B11
D3
FB_B_WDQS<4>
FB_B_WDQS<7>
FB_B_WDQS<6>
FB_B_WDQS<5>
87
G3
IO
IO
87
C2
DQ7
DQ8
A4
DRAM_RST
B3
CKE
H4
IO
DQ1
DQ2
H9
F4
FB_B1_ZQ
FB_B1_MF
FB_B1_SEN
B2
L9
IO
87 5
DQ0
87
A10
A11
K11
MFHIGH
22uF
VDD0
IN
MFHIGH
C9000
A2
A11
1
Page Notes
CRITICAL
=PP1V8_S0_FB_VDD
K4J52324QC-BC20
IN
16MX32-GDDR3-500MHZ
90 89 88
K4J52324QC-BC20
16MX32-GDDR3-500MHZ
FB_B_DQM_L<4>
FB_B_DQM_L<7>
FB_B_DQM_L<6>
FB_B_DQM_L<5>
FB_B_DQ<36>
FB_B_DQ<34>
FB_B_DQ<37>
FB_B_DQ<33>
FB_B_DQ<35>
FB_B_DQ<38>
87 5 FB_B_DQ<32>
FB_B_DQ<39>
FB_B_DQ<61>
FB_B_DQ<59>
FB_B_DQ<60>
FB_B_DQ<58>
FB_B_DQ<57>
87 5 FB_B_DQ<56>
FB_B_DQ<62>
FB_B_DQ<63>
FB_B_DQ<51>
FB_B_DQ<50>
FB_B_DQ<49>
FB_B_DQ<54>
87 5 FB_B_DQ<48>
FB_B_DQ<55>
FB_B_DQ<52>
FB_B_DQ<53>
FB_B_DQ<45>
87 5 FB_B_DQ<40>
FB_B_DQ<43>
FB_B_DQ<41>
FB_B_DQ<47>
FB_B_DQ<42>
FB_B_DQ<46>
FB_B_DQ<44>
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
SYNC_MASTER=(MASTER)
IO
IO
SYNC_DATE=(MASTER)
IO
IO
IO
5%
1/16W
MF-LF
402
SIZE
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
90
110
8
Page Notes
=PP3V3_S0_GPU
OMIT
U8400
BGA
(6 OF 7)
95
95
95
95
95
95
88
95
95
88
88
88
95
95
95
95
95
88
GPU_GPIO_18
GPU_GPIO_19
GPU_GPIO_20
GPU_GPIO_21
GPU_GPIO_22
GPU_GPIO_23
GPU_GPIO_24
GPU_GPIO_25
GPU_GPIO_26
GPU_GPIO_27
GPU_GPIO_28
GPU_GPIO_29
GPU_GPIO_30
GPU_GPIO_31
GPU_GPIO_32
GPU_GPIO_33
GPU_GPIO_34
AE13
AF13
AF9
AG7
AE10
AE9
AF7
AF8
AH6
AF10
AG10
AH9
AJ8
AH8
AG9
AH7
AG8
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
=PP3V3_S0_GPU_VDDR3
Typically <50mA
AA9
AB9
C9100
22uF
20%
6.3V
X5R
805
C9101
1uF
2
C9102
1uF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C9103
AB10
1uF
AC19
10%
6.3V
CERM
402
AC20
R9190
499
M56P
VREFG
AC8
ATI_VREFG
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7_BLON
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
AD4
GPU_GPIO_0
GPU_GPIO_1
GPU_GPIO_2
GPU_GPIO_3
GPU_GPIO_4
GPU_GPIO_5
GPU_GPIO_6
GPU_GPIO_7
GPU_GPIO_8
GPU_GPIO_9
GPU_GPIO_10
GPU_GPIO_11
GPU_GPIO_12
GPU_GPIO_13
GPU_GPIO_14
GPU_GPIO_15
GPU_GPIO_16
GPU_GPIO_17
AD2
AD1
AD3
AC1
AC2
AC3
AB2
AC6
AC5
AC4
AB3
AB4
AB5
AD5
AB8
AA8
AB7
GENERICA
GENERICB
GENERICC
GENERICD
AK22
PANEL
DIGON
CONTROL VARY_BL
AE11
VDDR3
(3.3V)
AD18
AD19
GPU_GENERICA
GPU_GENERICB
GPU_GENERICC
GPU_GENERICD
AF23
AE23
AD23
88 94
88
88
88
C9191
D
R9191
499
0.1uF
10%
16V
X5R
402
1%
1/16W
MF-LF
402
2
2
1%
1/16W
MF-LF
402
88
88
88
88
88
88
88
88
88
88
88
88
92
88
95
95
95
AD20
88
=PP2V5_S0_GPU_VDD25
70mA total for VDD25
K22
AD12
GPU_DIGON
GPU_VARY_BL
94
95
6 94
L10
C9110
22uF
88
1uF
20%
6.3V
X5R
805
C9111
10%
6.3V
CERM
402
C9112
AA10
0.1uF
AC13
10%
16V
X5R
402
VDD25
(2.5V)
AC16
AC18
NC0
AB6
NC
NC_DVOVMODE_0
NC_DVOVMODE_1
AK4
NC
NC
DVPCLK
AG1
ATI_DVPCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
AF2
ATI_DVPCNTL<0>
ATI_DVPCNTL<1>
ATI_DVPCNTL<2>
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
AG2
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
AE6
=PP2V5_S0_GPU_VDDC_CT
AL4
22uF
L9120
=PP1V8R3V3_S0_GPU_VDDR4
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.12 MM
C9120
22uF
L9125
10%
6.3V
CERM
402
C9121
C9122
0.1uF
10%
6.3V
CERM
402
10%
16V
X5R
402
AJ5
AK5
AL5
VDDR4
(1.8V/3.3V)
AM5
PP1V8R3V3_S0_GPU_VDDR5_F
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.12 MM
0402
AE2
AE3
C9125
22uF
20%
6.3V
X5R
805
L9130
C9126
1uF
10%
6.3V
CERM
402
C9127
AE4
0.1uF
AE5
10%
16V
X5R
402
VDDR5
(1.8V/3.3V)
FERR-220-OHM
1
PP1V2_S0_GPU_VDDPLL
20mA
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
0402
C9130
C9131
22uF
1uF
1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
6.3V
CERM
402
(PP2V5_S0_GPU_PVDD_F)
(GND_GPU_PVSS)
C9132
(PP1V0R1V2_S0_GPU_MPVDD)
(GND_GPU_MPVSS)
L9135
AC15
VDDPLL (1.2V)
AJ14
PVDD
PVSS
AH14
A6
A5
MPVDD
MPVSS
(2.5V)
(2.5V)
FERR-220-OHM
=PP2V5_S0_GPU_PVDD
PP2V5_S0_GPU_PVDD_F
92
100mA
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.12 MM
0402
C9135
22uF
20%
6.3V
X5R
805
C9136
1uF
10%
6.3V
CERM
402
C9137
GPU_XTALIN
GPU_XTALOUT
TP_U8400_AG14
AM26
XTALIN
XTALOUT
AG14
PLLTEST
AL26
=PP1V2_S0_GPU_VDDPLL
88
Typically <50mA
FERR-220-OHM
1
88
10%
6.3V
CERM
402
1uF
20%
6.3V
X5R
805
=PP1V8R3V3_S0_GPU_VDDR5
1uF
PP1V8R3V3_S0_GPU_VDDR4_F
2
0402
88
C9117
Typically <50mA
FERR-220-OHM
1
1uF
20%
6.3V
X5R
805
88
C9116
C9115
AF1
AF3
ATI_DVPDATA<0>
ATI_DVPDATA<1>
ATI_DVPDATA<2>
ATI_DVPDATA<3>
ATI_DVPDATA<4>
ATI_DVPDATA<5>
ATI_DVPDATA<6>
ATI_DVPDATA<7>
ATI_DVPDATA<8>
ATI_DVPDATA<9>
ATI_DVPDATA<10>
ATI_DVPDATA<11>
AG3
AH2
AH3
AJ2
AJ1
AK2
AK1
AK3
AL2
AL3
AM3
ATI_DVPDATA<12>
ATI_DVPDATA<13>
ATI_DVPDATA<14>
ATI_DVPDATA<15>
ATI_DVPDATA<16>
ATI_DVPDATA<17>
ATI_DVPDATA<18>
ATI_DVPDATA<19>
ATI_DVPDATA<20>
ATI_DVPDATA<21>
ATI_DVPDATA<22>
ATI_DVPDATA<23>
AF4
AF5
AG4
AJ3
AH4
AJ4
AG5
AH5
AF6
AE7
AG6
THERMAL
DIODE
DPLUS
DMINUS
AG12
AH12
ATI_TDIODE_P
ATI_TDIODE_N
ROM
ROMCS*
AC7
TP_ATI_ROMCS_L
TEST
TESTEN
AG22
88 86
10%
16V
X5R
402
PPVCORE_S0_GPU_MPVDD
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
61
61
R9195
1K
0402
95
ATI_TESTEN
1
FERR-220-OHM
1
95
0.1uF
2
L9140
=PPVCORE_S0_GPU
95
5%
1/16W
MF-LF
402
20mA
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
SYNC_MASTER=(MASTER)
C9140
C9141
C9142
22uF
1uF
0.1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
16V
X5R
402
SYNC_DATE=(MASTER)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
91
110
8
Page Notes
I28
34
CK410_27M_SPREAD
MAKE_BASE=TRUE
GPU_GPIO_16
91
C
R92501
287
34
CK410_27M_NONSPREAD
1%
1/16W
MF-LF
402
I26
GPU_CLK27M
R9202
GPU_XTALIN
91
162
1%
1/16W
MF-LF
402 2
GPU CLOCKS
SYNC_MASTER=BOZEMAN
SYNC_DATE=05/21/2005
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
92
110
Page Notes
Power aliases required by this page:
- =PP2V5_S0_GPU
- =PP1V8R2V5_S0_GPU_LVDDR
Signal aliases required by this page:
(NONE)
94 93
LVDS_L_CLK_P
TMDS_PANEL
1
R9370
100
5%
1/16W
MF-LF
402 2
94 93
94 93
LVDS_L_CLK_N
LVDS_L_DATA_P<0>
TMDS_PANEL
R93711
100
5%
1/16W
MF-LF
402 2
L9300
2
PP2V5_S0_GPU_TPVDD
OMIT
20mA peak
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
VOLTAGE=2.5V
0402
94 93
U8400
C9300
L9305
C9301
1uF
22uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
C9302
AM8
AL8
PP2V5_S0_GPU_TXVDDR
150mA peak
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
0402
AK6
C9305
L9310
C9307
AL6
22uF
1uF
0.1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
16V
X5R
402
AM6
C9306
AK7
AK8
PP2V5_S0_GPU_AVDD
65mA peak
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
0402
AM7
C9310
20%
6.3V
X5R
805
C9311
1uF
10%
6.3V
CERM
402
C9312
0.1uF
AL25
10%
16V
X5R
402
AM25
L9315
0402
20mA peak
1
C9316
C9317
22uF
1uF
0.1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
16V
X5R
402
AK25
AVSS
AK23
AVSSQ
L9320
AL23
VDD1DI (2.5V)
VSS1DI
AL22
RSET
AM23
130mA peak
93
ATI_RSET
C9320
PP2V5_S0_GPU_A2VDD
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.125 MM
VOLTAGE=2.5V
C9322
AL16
22uF
1uF
0.1uF
20%
6.3V
X5R
805
10%
6.3V
CERM
402
10%
16V
X5R
402
AM16
C9321
A2VDD
(2.5V)
AL17
L9325
AM17
A2VSS
FERR-220-OHM
NC
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
AK13
0402
20mA peak
C9325
20%
6.3V
X5R
805
C9326
1uF
22uF
2
10%
6.3V
CERM
402
C9327
93
ATI_R2SET
NC_A2VDDQ
A2VSSQ
AJ17
VDD2DI (2.5V)
VSS2DI
AK14
R2SET
AE19
LPVDD (2.5V)
LPVSS
AJ16
L9330
0.1uF
2
AL14
97
AL9
97
TX0P
TX0M
TX1P
TX1M
TX2P
TX2M
AL10
97
AK10
97
TX3P
TX3M
TX4P
TX4M
TX5P
TX5M
AM11
97
AL11
97
AM12
97
AL12
97
AJ9
95
AK9
95
AJ11
95
AK11
95
AJ12
95
AK12
95
AK24
88
AM24
88
AL24
88
AJ23
88
AJ22
88
R2
G2
B2
AK15
97
AM15
97
AL15
97
H2SYNC
V2SYNC
AF15
97
AG15
97
Y
C
AJ15
88
AJ13
COMP
PP2V5_S0_GPU_LPVDD
20mA peak
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
0402
AE18
C9330
20%
6.3V
X5R
805
C9331
1uF
22uF
10%
6.3V
CERM
402
C9332
1uF
AC21
10%
6.3V
CERM
402
AC22
AD21
L9345
AD22
FERR-220-OHM
1
0402
AE20
PP2V5_S0_GPU_LVDDR
MIN_LINE_WIDTH=0.35 MM
MIN_NECK_WIDTH=0.125 MM
VOLTAGE=2.5V
200mA peak
AE21
LVDDR
(2.5V)
AE22
C9340
22uF
20%
6.3V
X5R
805
R
G
B
HSYNC
VSYNC
C9345
20%
6.3V
X5R
805
1uF
22uF
2
C9341
10%
6.3V
CERM
402
C9342
0.1uF
2
10%
16V
X5R
402
C9346
0.1uF
2
10%
16V
X5R
402
C9347
AF19
0.1uF
AF20
10%
16V
X5R
402
AF17
AF18
AF22
AG17
AG19
LVSSR
AH17
AH19
AJ19
R9350
93
R9351
499
715
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
93
97
IN
GPU_HPD
AF11
HPD1
MONITOR
IDENTIFICATION
AK17
ATI_RSET
ATI_R2SET
5%
1/16W
MF-LF
402 2
OUT
OUT
TMDS_DATA_P<0>
TMDS_DATA_N<0>
TMDS_DATA_P<1>
TMDS_DATA_N<1>
TMDS_DATA_P<2>
TMDS_DATA_N<2>
OUT
OUT
94 93
LVDS_L_DATA_N<1>
94 93
LVDS_L_DATA_P<2>
OUT
TMDS_PANEL
OUT
R93731
OUT
100
5%
1/16W
MF-LF
402 2
OUT
TMDS_DATA_P<3>
TMDS_DATA_N<3>
TMDS_DATA_P<4>
TMDS_DATA_N<4>
TMDS_DATA_P<5>
TMDS_DATA_N<5>
OUT
94 93
OUT
OUT
OUT
OUT
GPU_VGA_R
GPU_VGA_G
GPU_VGA_B
OUT
OUT
OUT
GPU_VGA_HSYNC
GPU_VGA_VSYNC
OUT
OUT
GPU_R2
GPU_G2
GPU_B2
OUT
OUT
OUT
OUT
OUT
88
GPU_TV_Y
GPU_TV_C
AH15
88
GPU_TV_COMP
TXCLK_UP
TXCLK_UN
AJ21
94
AK21
94
LVDS_U_CLK_P
LVDS_U_CLK_N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
AG18
94
AH18
94
AK20
94
AJ20
94
AG20
94
AH20
94
AH21
94
AG21
94
LVDS_U_DATA_P<0>
LVDS_U_DATA_N<0>
LVDS_U_DATA_P<1>
LVDS_U_DATA_N<1>
LVDS_U_DATA_P<2>
LVDS_U_DATA_N<2>
LVDS_U_DATA_P<3>
LVDS_U_DATA_N<3>
TXCLK_LP
TXCLK_LN
AM18
AL18
94
93
94
93
LVDS_L_CLK_P
LVDS_L_CLK_N
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
AL19
94
93
LVDS_L_DATA_P<0>
LVDS_L_DATA_N<0>
LVDS_L_DATA_P<1>
LVDS_L_DATA_N<1>
LVDS_L_DATA_P<2>
LVDS_L_DATA_N<2>
LVDS_L_DATA_P<3>
LVDS_L_DATA_N<3>
OUT
Composite/S-Video
VGA
Component
OUT
Y
C
G
R
Y
Pr
OUT
Comp
Pb
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
=PP3V3_S0_GPU
97 91 88 6
DDC1CLK
DDC1DATA
94
93
94
93
94
93
AK19
AM20
AL20
AL21
94
93
94
93
AJ18
94
AK18
94
AM21
AH23
97
AH22
97
DDC2CLK
DDC2DATA
AG13
88
AH13
88
DDC3CLK
DDC3DATA
AF12
94
93
AE12
94
93
OUT
OUT
R9390 1
OUT
4.7K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
OUT
OUT
R9391 1
4.7K
OUT
GPU_DDC_C_CLK
GPU_DDC_C_DATA
94 93
OUT
94 93
OUT
OUT
OUT
GPU_DDC_A_CLK
GPU_DDC_A_DATA
IO
IO
SYNC_MASTER=(MASTER)
GPU_DDC_B_CLK
GPU_DDC_B_DATA
IO
GPU_DDC_C_CLK
GPU_DDC_C_DATA
IO
SYNC_DATE=(MASTER)
IO
IO
DRAWING NUMBER
SHT
NONE
REV.
051-7148
SCALE
LVDS_L_DATA_N<2>
OUT
GPU_H2SYNC
GPU_V2SYNC
AF21
100
TMDS_CLK_P
TMDS_CLK_N
FERR-220-OHM
10%
16V
X5R
402
LVDS
AM9
FERR-220-OHM
0402
PP2V5_S0_GPU_VDD2DI
DAC (CRT)
C9315
AVDD
(2.5V)
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
R93721
TXCP
TXCM
AJ24
FERR-220-OHM
1
TXVSSR
AL7
22uF
PP2V5_S0_GPU_VDD1DI
TXVDDR
(2.5V)
AJ7
FERR-220-OHM
TPVDD (2.5V)
TPVSS
AJ6
TMDS_PANEL
(5 OF 7)
10%
6.3V
CERM
402
FERR-220-OHM
1
LVDS_L_DATA_N<0>
LVDS_L_DATA_P<1>
BGA
1uF
2
94 93
M56P
INTEGRATED TMDS
DAC2 (TV/CRT2)
88
FERR-220-OHM
=PP2V5_S0_GPU
13
OF
93
110
INVERTER INTERFACE
R9491
94 88
=PP12V_GPU
5%
1/8W
MF-LF
805
R9490
88
=PP3V3_S0_LCD
NOSTUFF
C9400
NOSTUFF
R9400
0.1UF
5%
1/8W
MF-LF
805
94 88
=PP12V_GPU
C9450
5%
1/16W
MF-LF
402 2
LCD_PWREN_L_RC
R9401
1
29.4K
L9400
6
PP3V3_LCD_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
5
2
GPU_DIGON
R94701
100K
5%
1/16W
MF-LF
402 2
94
20%
50V
CERM
402
Q9400
LCD_PWM
PANEL_ID
10UF
10%
16V
CERM
1210
518S0331
2
Q9401
2N7002
91 6
94
C9420
M-ST-SM
2
94
SM
87437-0443-BLK
1
PP3V3R12V_LCD_CONN
0.001uF
TSOP-LF
SI3443DV
C9401
3 NOSTUFF
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
FERR-250-OHM
1%
1/16W
MF-LF
402
LCD_PWREN_L
J9401
10%
35V 2
X7R
805
NOSTUFF
10%
50V
X7R
603-1
NOSTUFF
CRITICAL
1UF
100K
94 88
=PP3V3_DDC_LCD
SOT23-LF
S
2
R9410 1
100K
5%
1/16W
MF-LF
402 2
R9411
100K
5%
1/16W
MF-LF
2 402
C9410
0.001uF
20%
50V
CERM
402
R9450
2
91 88
GPU_GPIO_0
47
PANEL_ID
94
5%
1/16W
MF-LF
402
GPU_DDC_C_CLK
GPU_DDC_C_DATA
88
=PP3V3_GPU
C9470
0.1UF
20%
2 10V
CERM
402
91
GPU_VARY_BL
SDF9400
5%
1/16W
MF-LF
2 402
F-ST-SM
93
93
93
93
93
93
93
93
94 93
94 88
94
LVDS_U_CLK_P
LVDS_U_DATA_P<3>
LVDS_L_DATA_P<0>
LVDS_L_DATA_N<1>
LVDS_L_DATA_P<2>
LVDS_L_CLK_P
LVDS_L_DATA_P<3>
GPU_DDC_C_CLK
=PP3V3_DDC_LCD
PP3V3R12V_LCD_CONN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LCD_PWM
94
5%
1/16W
MF-LF
402
R94741
10K
5%
1/16W
MF-LF
402 2
NOSTUFF
R9473
0
2
5%
1/16W
MF-LF
402
53307-3072
93
R9475
47
LCD_PWM_R
3 MC74VHC1G08
SOT23-5-LF
CRITICAL
10K
J9402
LVDS_U_DATA_N<0>
LVDS_U_DATA_N<1>
LVDS_U_DATA_N<2>
U9470
R9472
93
NOSTUFF
1
STDOFF-3MMOD4.6MMH-1.35-TH
GPU_PWM_RST_L
LVDS_U_DATA_P<0> 93
LVDS_U_DATA_P<1> 93
LVDS_U_DATA_P<2> 93
LVDS_U_CLK_N 93
LVDS_U_DATA_N<3> 93
LVDS_L_DATA_N<0> 93
LVDS_L_DATA_P<1> 93
LVDS_L_DATA_N<2> 93
LVDS_L_CLK_N 93
LVDS_L_DATA_N<3> 93
GPU_DDC_C_DATA
PP3V3R12V_LCD_CONN
PP3V3R12V_LCD_CONN
93 94
94
94
SYNC_MASTER=BOZEMAN
SDF9401
STDOFF-3MMOD4.6MMH-1.35-TH
SYNC_DATE=04/27/2005
1
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
94
110
TMDS_DATA_P<3>
93
TP_TMDS_DATA_N<3>
MAKE_BASE=TRUE
TMDS_DATA_N<3>
93
TP_TMDS_DATA_P<4>
MAKE_BASE=TRUE
TMDS_DATA_P<4>
93
TP_TMDS_DATA_N<4>
MAKE_BASE=TRUE
TMDS_DATA_N<4>
93
TP_TMDS_DATA_P<5>
MAKE_BASE=TRUE
TMDS_DATA_P<5>
93
TP_TMDS_DATA_N<5>
MAKE_BASE=TRUE
TMDS_DATA_N<5>
93
TP_ATI_DVPDATA<23>
MAKE_BASE=TRUE
ATI_DVPDATA<23>
91
TP_GPU_GPIO<34>
MAKE_BASE=TRUE
GPU_GPIO_34
91
TP_ATI_DVPDATA<22>
MAKE_BASE=TRUE
ATI_DVPDATA<22>
91
TP_GPU_GPIO<33>
MAKE_BASE=TRUE
GPU_GPIO_33
91
TP_ATI_DVPDATA<21>
MAKE_BASE=TRUE
ATI_DVPDATA<21>
91
TP_GPU_GPIO<32>
MAKE_BASE=TRUE
GPU_GPIO_32
91
TP_ATI_DVPDATA<20>
MAKE_BASE=TRUE
ATI_DVPDATA<20>
91
TP_GPU_GPIO<31>
MAKE_BASE=TRUE
GPU_GPIO_31
91
TP_ATI_DVPDATA<19>
MAKE_BASE=TRUE
ATI_DVPDATA<19>
91
TP_GPU_GPIO<30>
MAKE_BASE=TRUE
NO_TEST=TRUE
GPU_GPIO_30
91
TP_ATI_DVPDATA<18>
MAKE_BASE=TRUE
ATI_DVPDATA<18>
91
TP_ATI_DVPDATA<17>
MAKE_BASE=TRUE
ATI_DVPDATA<17>
91
TP_ATI_DVPDATA<16>
MAKE_BASE=TRUE
ATI_DVPDATA<16>
91
TP_ATI_DVPDATA<15>
MAKE_BASE=TRUE
ATI_DVPDATA<15>
91
TP_GPU_GPIO<26>
MAKE_BASE=TRUE
GPU_GPIO_26
91
TP_ATI_DVPDATA<14>
MAKE_BASE=TRUE
ATI_DVPDATA<14>
91
TP_GPU_GPIO<25>
MAKE_BASE=TRUE
GPU_GPIO_25
91
TP_ATI_DVPDATA<13>
MAKE_BASE=TRUE
ATI_DVPDATA<13>
91
TP_ATI_DVPDATA<12>
MAKE_BASE=TRUE
ATI_DVPDATA<12>
91
TP_GPU_GPIO<23>
MAKE_BASE=TRUE
GPU_GPIO_23
91
TP_ATI_DVPDATA<11>
MAKE_BASE=TRUE
ATI_DVPDATA<11>
91
TP_GPU_GPIO<22>
MAKE_BASE=TRUE
GPU_GPIO_22
91
TP_ATI_DVPDATA<10>
MAKE_BASE=TRUE
ATI_DVPDATA<10>
91
TP_GPU_GPIO<21>
MAKE_BASE=TRUE
GPU_GPIO_21
91
TP_ATI_DVPDATA<9>
MAKE_BASE=TRUE
ATI_DVPDATA<9>
91
TP_GPU_GPIO<20>
MAKE_BASE=TRUE
GPU_GPIO_20
91
TP_ATI_DVPDATA<8>
MAKE_BASE=TRUE
ATI_DVPDATA<8>
91
TP_GPU_GPIO<19>
MAKE_BASE=TRUE
GPU_GPIO_19
91
TP_ATI_DVPDATA<7>
MAKE_BASE=TRUE
ATI_DVPDATA<7>
91
TP_GPU_GPIO<18>
MAKE_BASE=TRUE
GPU_GPIO_18
91
TP_ATI_DVPDATA<6>
MAKE_BASE=TRUE
ATI_DVPDATA<6>
91
TP_GPU_GENERICA
MAKE_BASE=TRUE
GPU_GENERICA
91
TP_ATI_DVPDATA<5>
MAKE_BASE=TRUE
ATI_DVPDATA<5>
91
TP_GPU_GENERICB
MAKE_BASE=TRUE
GPU_GENERICB
91
TP_ATI_DVPDATA<4>
MAKE_BASE=TRUE
ATI_DVPDATA<4>
91
TP_GPU_GENERICC
MAKE_BASE=TRUE
GPU_GENERICC
91
TP_ATI_DVPDATA<3>
MAKE_BASE=TRUE
ATI_DVPDATA<3>
91
TP_ATI_DVPDATA<2>
MAKE_BASE=TRUE
ATI_DVPDATA<2>
91
TP_ATI_DVPDATA<1>
MAKE_BASE=TRUE
ATI_DVPDATA<1>
91
TP_ATI_DVPDATA<0>
MAKE_BASE=TRUE
ATI_DVPDATA<0>
91
ATI_DVPCLK
91
TP_ATI_DVPCNTL<0>
MAKE_BASE=TRUE
ATI_DVPCNTL<0>
91
TP_ATI_DVPCNTL<1>
MAKE_BASE=TRUE
ATI_DVPCNTL<1>
91
TP_ATI_DVPCNTL<2>
MAKE_BASE=TRUE
ATI_DVPCNTL<2>
91
TP_TMDS_DATA_P<3>
MAKE_BASE=TRUE
TP_ATI_DVPCLK
MAKE_BASE=TRUE
M56 TPS
A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7148
95
OF
13
110
ALTERNATE FOR
PART NUMBER
740S0044
740S0028
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
L9710
F9710
CRITICAL
L9700
R9701
182
88
SYM_VER-1
TMDS_CONN_DN<0>
0.5AMP-13.2V
2
=PP5V_S0_DVI_DDC 1
SM-LF
97
PP5V_S0_DDC
PP5V_S0_DDC_FUSE
VOLTAGE=5V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
F9710
FUSE
VOLTAGE=5V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
400-OHM-EMI
2
SM-1
DIFFERENTIAL_PAIR=TMDS_CONN_D0
2012H
1%
1/16W
MF-LF
402 2
90-OHM-300MA
88 75 6
TMDS_CONN_DP<0>
PP5V_S0
3V LEVEL SHIFTERS
97
DIFFERENTIAL_PAIR=TMDS_CONN_D0
NO_TEST=TRUE
DIFFERENTIAL_PAIR=TMDS_DATA_0
93
PART NUMBER
CRITICAL
TMDS_DATA_N<0>
88
R9710
L9701
4
R9706
J9710
CRITICAL
SYM_VER-1
MINI-DVI
1
182
2012H
TMDS_CONN_DN<1>
97
90-OHM-300MA
TMDS_CONN_DP<1>
97
97
DIFFERENTIAL_PAIR=TMDS_CONN_D1
NO_TEST=TRUE
DIFFERENTIAL_PAIR=TMDS_DATA_1
97
TMDS_DATA_P<1>
DVI_HPD_UF
DVI_DDC_CLK_UF
DVI_DDC_DATA_UF
TMDS_DATA_N<2>
93
DIFFERENTIAL_PAIR=TMDS_DATA_2
CRITICAL
SYM_VER-1
L9702
R9707
182
97
TMDS_CONN_DN<2>
97
17
18
10
27
19
11
28
20
12
29
30
22
14
31
97
TMDS_CONN_DP<2>
97
97
DIFFERENTIAL_PAIR=TMDS_CONN_D2
NO_TEST=TRUE
DIFFERENTIAL_PAIR=TMDS_DATA_2
TMDS_CONN_DN<2>
97
100
DVI_DDC_CLK_UF
TMDS_CONN_DN<1>
97
VGA_G
VGA_VSYNC
97
C9711
TMDS_CLK_N
93
DIFFERENTIAL_PAIR=TMDS_CLK
97
VGA_R
32
24
16
DVI_DDC_CLK3 D
97
97
97
TMDS_CONN_DP<0>
97
TMDS_CONN_DN<0>
97
L9703
1%
1/16W
MF-LF
402 2
C9700
165-OHM
100
TMDS_CONN_CLKP
97
97
TMDS_CONN_CLKN
6 D
DVI_DDC_DATA
TMDS_CONN_CLKN
C9713
5%
50V
CERM
402
S 1
TMDS_CONN_CLKP
GPU_DDC_A_DATA
93
R9714
DVI_HPD_UF
1
20K
GPU_HPD
5%
1/16W
MF-LF
402
C9710
0.01uF
20%
50V
CERM
603
97
DIFFERENTIAL_PAIR=TMDS_CONN_CLK
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
97
GND_CHASSIS_VGA
4
D9700
CASE425
R9722
C9714
100pF
5%
50V
CERM
402
5%
1/16W
MF-LF
402
93
MMSZ4681XXG
97
DIFFERENTIAL_PAIR=TMDS_CONN_CLK
R97171
5%
50V
CERM 2
402
100pF
2
CRITICAL
SYM_VER-1
SM-LF
TMDS_CK_TERM
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
1
NO_TEST=TRUE
22PF
10K
G
SOT-363
R9713
DVI_DDC_DATA_UF
34
33
90.9
93
R9721
2N7002DW-X-F
100K
R9716
GPU_DDC_A_CLK
1
S 4
Q9711
5%
50V
CERM
402
15
TMDS_DATA_P<2>
5%
1/16W
MF-LF
2 402
SOT-363
5%
1/16W
MF-LF
402
100pF
TMDS_CONN_DP<1>
2N7002DW-X-F
R9711
R9720
10K
Q9711
97
13
90-OHM-300MA
TMDS_CONN_DP<2>
26
DIFFERENTIAL_PAIR=TMDS_CONN_D2
2012H
1%
1/16W
MF-LF
402 2
VGA_B
VGA_HSYNC
25
5%
1/16W
MF-LF
2 402
F-ST-SM4
97
DIFFERENTIAL_PAIR=TMDS_CONN_D1
1%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402
R9712
4.7K
4.7K
TMDS_DATA_N<1>
93
DIFFERENTIAL_PAIR=TMDS_DATA_1
93
=PP3V3_DDC_DVI
TMDS_DATA_P<0>
1
93
TABLE_ALT_HEAD
93
DIFFERENTIAL_PAIR=TMDS_DATA_0
DVI INTERFACE
NO_TEST=TRUE
90.9
1%
1/16W
MF-LF
402 2
TMDS_CLK_P
93
DIFFERENTIAL_PAIR=TMDS_CLK
97 93 91 88 6
=PP3V3_S0_GPU
1
C9750
0.1UF
20%
2 10V
CERM
402
B
ANALOG FILTERING
93
GPU_V2SYNC
FL9740
LCFILTER
R9750
SM-LF
4
1
GPU_VSYNC_BUF
33
2
VGA_VSYNC
97
5%
1/16W
MF-LF
402
32
3
CRITICAL
U9750
74AHC1G32
SM-220MHZ-LF
93
GPU_B2
1
R9740
75
93
1%
1/16W
MF-LF
402
FL9741
LCFILTER
97
VGA_G
97
C9740
3.3pF
CRITICAL
SM-220MHZ-LF
GPU_G2
VGA_B
0.25%
50V
CERM
402
97 93 91 88 6
=PP3V3_S0_GPU
PLACE R9750 & R9751 CLOSE TO DVI CONNECTOR
1
R9741
75
2
93
FL9742
LCFILTER
1%
1/16W
MF-LF
402
CRITICAL
0.25%
50V
CERM
402
R9742
VGA_R
97
5
1
75
20%
10V
2 CERM
402
C9741
3.3pF
SM-220MHZ-LF
1
GPU_R2
C9742
93
3.3pF
1%
1/16W
MF-LF
402
C9751
0.1UF
GPU_H2SYNC
0.25%
50V
CERM
402
U9751
74AHC1G32
SM-LF
4
32
3
R9751
1
GPU_HSYNC_BUF
33
VGA_HSYNC
SYNC_MASTER=BOZEMAN
SYNC_DATE=04/14/2005
97
5%
1/16W
MF-LF
402
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7148
13
OF
97
110
8
Title:
Design:
Date:
Basenet Report
m38a
Jun 21 19:41:15 2006
0V7_REF
1V0_REF
1V2REG_BOOT
1V2REG_ITH
1V2REG_ITH_RC
1V2REG_MODE
1V2REG_PGOOD
1V2REG_RT
1V2REG_RUNSS
1V2REG_SGND
1V2REG_SW
1V2REG_SW_FIL
1V2REG_VBIAS
1V2REG_VFB
1V3_REF
1V05REG_NB_BOOT
1V05REG_NB_BOOT_R
1V05REG_NB_COMP
1V05REG_NB_COMP_R
1V05REG_NB_FB
1V05REG_NB_FB_R
1V05REG_NB_FS_DIS
1V05REG_NB_GND
1V05REG_NB_LDO_DR
1V05REG_NB_LDO_FB
1V05REG_NB_LGATE
1V05REG_NB_PVCC5
1V05REG_NB_SNUB
1V05REG_NB_SWITCHNOD
E
1V05REG_NB_UGATE
1V05REG_NB_VCC5
1V5REG_PCIE_BOOT
1V5REG_PCIE_BOOT_R
1V5REG_PCIE_COMP
1V5REG_PCIE_COMP_R
1V5REG_PCIE_FB
1V5REG_PCIE_FB_R
1V5REG_PCIE_FS_DIS
1V5REG_PCIE_GND
1V5REG_PCIE_LDO_DR
1V5REG_PCIE_LDO_FB
1V5REG_PCIE_LGATE
1V5REG_PCIE_PVCC5
1V5REG_PCIE_SNUB
1V5REG_PCIE_SWITCHNO
DE
1V5REG_PCIE_UGATE
1V5REG_PCIE_VCC5
1V6_REF
1V8REG_DDR_BOOT
1V8REG_DDR_BOOT_R
1V8REG_DDR_COMP
1V8REG_DDR_COMP_R
1V8REG_DDR_FB
1V8REG_DDR_FB_R
1V8REG_DDR_FS_DIS
1V8REG_DDR_GND
1V8REG_DDR_LDO_DR
1V8REG_DDR_LDO_FB
1V8REG_DDR_LGATE
1V8REG_DDR_PVCC5
1V8REG_DDR_SNUB
1V8REG_DDR_SWITCHNOD
E
1V8REG_DDR_UGATE
1V8REG_DDR_VCC5
1V8REG_GPU_BOOT
1V8REG_GPU_BOOT_R
1V8REG_GPU_COMP
1V8REG_GPU_COMP_R
1V8REG_GPU_FB
1V8REG_GPU_FB_R
1V8REG_GPU_FS_DIS
1V8REG_GPU_GND
1V8REG_GPU_LDO_DR
1V8REG_GPU_LDO_FB
1V8REG_GPU_LGATE
1V8REG_GPU_PVCC5
1V8REG_GPU_SNUB
1V8REG_GPU_SWITCHNOD
E
1V8REG_GPU_UGATE
1V8REG_GPU_VCC5
2V5REG_ITH
2V5REG_ITH_RC
2V5REG_MODE
2V5REG_RT
2V5REG_SGND
2V5REG_SW
2V5REG_VFB
5V_REG_IN
=I2C_HD_TEMP_SCL
=I2C_HD_TEMP_SDA
=I2C_MEM_SCL
=I2C_MEM_SDA
0V7_REF - @m38a_lib.M38A
1V0_REF - @m38a_lib.M38A
1V2REG_BOOT - @m38a_lib.M38A
1V2REG_ITH - @m38a_lib.M38A
1V2REG_ITH_RC - @m38a_lib.M38A
1V2REG_MODE - @m38a_lib.M38A
1V2REG_PGOOD - @m38a_lib.M38A
1V2REG_RT - @m38a_lib.M38A
1V2REG_RUNSS - @m38a_lib.M38A
1V2REG_SGND - @m38a_lib.M38A
1V2REG_SW - @m38a_lib.M38A
1V2REG_SW_FIL - @m38a_lib.M38A
1V2REG_VBIAS - @m38a_lib.M38A
1V2REG_VFB - @m38a_lib.M38A
1V3_REF - @m38a_lib.M38A
1V05REG_NB_BOOT - @m38a_lib.M38A
1V05REG_NB_BOOT_R - @m38a_lib.M38A
1V05REG_NB_COMP - @m38a_lib.M38A
1V05REG_NB_COMP_R - @m38a_lib.M38A
1V05REG_NB_FB - @m38a_lib.M38A
1V05REG_NB_FB_R - @m38a_lib.M38A
1V05REG_NB_FS_DIS - @m38a_lib.M38A
1V05REG_NB_GND - @m38a_lib.M38A
1V05REG_NB_LDO_DR - @m38a_lib.M38A
1V05REG_NB_LDO_FB - @m38a_lib.M38A
1V05REG_NB_LGATE - @m38a_lib.M38A
1V05REG_NB_PVCC5 - @m38a_lib.M38A
1V05REG_NB_SNUB - @m38a_lib.M38A
1V05REG_NB_SWITCHNODE @m38a_lib.M38A
1V05REG_NB_UGATE - @m38a_lib.M38A
1V05REG_NB_VCC5 - @m38a_lib.M38A
1V5REG_PCIE_BOOT - @m38a_lib.M38A
1V5REG_PCIE_BOOT_R - @m38a_lib.M38A
1V5REG_PCIE_COMP - @m38a_lib.M38A
1V5REG_PCIE_COMP_R - @m38a_lib.M38A
1V5REG_PCIE_FB - @m38a_lib.M38A
1V5REG_PCIE_FB_R - @m38a_lib.M38A
1V5REG_PCIE_FS_DIS - @m38a_lib.M38A
1V5REG_PCIE_GND - @m38a_lib.M38A
1V5REG_PCIE_LDO_DR - @m38a_lib.M38A
1V5REG_PCIE_LDO_FB - @m38a_lib.M38A
1V5REG_PCIE_LGATE - @m38a_lib.M38A
1V5REG_PCIE_PVCC5 - @m38a_lib.M38A
1V5REG_PCIE_SNUB - @m38a_lib.M38A
1V5REG_PCIE_SWITCHNODE @m38a_lib.M38A
1V5REG_PCIE_UGATE - @m38a_lib.M38A
1V5REG_PCIE_VCC5 - @m38a_lib.M38A
1V6_REF - @m38a_lib.M38A
1V8REG_DDR_BOOT - @m38a_lib.M38A
1V8REG_DDR_BOOT_R - @m38a_lib.M38A
1V8REG_DDR_COMP - @m38a_lib.M38A
1V8REG_DDR_COMP_R - @m38a_lib.M38A
1V8REG_DDR_FB - @m38a_lib.M38A
1V8REG_DDR_FB_R - @m38a_lib.M38A
1V8REG_DDR_FS_DIS - @m38a_lib.M38A
1V8REG_DDR_GND - @m38a_lib.M38A
1V8REG_DDR_LDO_DR - @m38a_lib.M38A
1V8REG_DDR_LDO_FB - @m38a_lib.M38A
1V8REG_DDR_LGATE - @m38a_lib.M38A
1V8REG_DDR_PVCC5 - @m38a_lib.M38A
1V8REG_DDR_SNUB - @m38a_lib.M38A
1V8REG_DDR_SWITCHNODE @m38a_lib.M38A
1V8REG_DDR_UGATE - @m38a_lib.M38A
1V8REG_DDR_VCC5 - @m38a_lib.M38A
1V8REG_GPU_BOOT - @m38a_lib.M38A
1V8REG_GPU_BOOT_R - @m38a_lib.M38A
1V8REG_GPU_COMP - @m38a_lib.M38A
1V8REG_GPU_COMP_R - @m38a_lib.M38A
1V8REG_GPU_FB - @m38a_lib.M38A
1V8REG_GPU_FB_R - @m38a_lib.M38A
1V8REG_GPU_FS_DIS - @m38a_lib.M38A
1V8REG_GPU_GND - @m38a_lib.M38A
1V8REG_GPU_LDO_DR - @m38a_lib.M38A
1V8REG_GPU_LDO_FB - @m38a_lib.M38A
1V8REG_GPU_LGATE - @m38a_lib.M38A
1V8REG_GPU_PVCC5 - @m38a_lib.M38A
1V8REG_GPU_SNUB - @m38a_lib.M38A
1V8REG_GPU_SWITCHNODE @m38a_lib.M38A
1V8REG_GPU_UGATE - @m38a_lib.M38A
1V8REG_GPU_VCC5 - @m38a_lib.M38A
2V5REG_ITH - @m38a_lib.M38A
2V5REG_ITH_RC - @m38a_lib.M38A
2V5REG_MODE - @m38a_lib.M38A
2V5REG_RT - @m38a_lib.M38A
2V5REG_SGND - @m38a_lib.M38A
2V5REG_SW - @m38a_lib.M38A
2V5REG_VFB - @m38a_lib.M38A
5V_REG_IN - @m38a_lib.M38A
=I2C_HD_TEMP_SCL - @m38a_lib.M38A
=I2C_ODD_TEMP_SCL - @m38a_lib.M38A
=SMB_THRM_CLK - @m38a_lib.M38A
SMB_B_S0_CLK - @m38a_lib.M38A
SMB_GPU_NB_THRM_CLK @m38a_lib.M38A
SMB_B_S0_CLK - @m38a_lib.M38A
=SMB_THRM_CLK - @m38a_lib.M38A
=I2C_ODD_TEMP_SCL - @m38a_lib.M38A
=I2C_HD_TEMP_SDA - @m38a_lib.M38A
=I2C_ODD_TEMP_SDA - @m38a_lib.M38A
=SMB_THRM_DATA - @m38a_lib.M38A
SMB_B_S0_DATA - @m38a_lib.M38A
SMB_GPU_NB_THRM_DATA @m38a_lib.M38A
SMB_B_S0_DATA - @m38a_lib.M38A
=SMB_THRM_DATA - @m38a_lib.M38A
=I2C_ODD_TEMP_SDA - @m38a_lib.M38A
=I2C_MEM_SCL - @m38a_lib.M38A
=SMB_AIRPORT_CLK - @m38a_lib.M38A
SMB_CK410_CLK - @m38a_lib.M38A
SMB_CLK - @m38a_lib.M38A
SMB_CK410_CLK - @m38a_lib.M38A
=SMB_AIRPORT_CLK - @m38a_lib.M38A
=I2C_MEM_SDA - @m38a_lib.M38A
79A3
79A5 80A5 81A5 81B3
77B5
77B6
77B6
77B6
77B5
77B6
77B6
77A8
77B5
77B4
77B6
77B6
80B3
81C6
81C5
81C6
81C5
81C5
81C3
81C7
81B7
81C7
81C7
81C6
81D7
81C3
81C5
81D6
81D7
80C6
80C5
80C6
80C5
80C5
80C3
80C7
80B7
80C7
80C7
80C6
80D7
80C3
80C5
6
=SMB_AIRPORT_DATA - @m38a_lib.M38A
SMB_CK410_DATA - @m38a_lib.M38A
SMB_DATA - @m38a_lib.M38A
SMB_CK410_DATA - @m38a_lib.M38A
=SMB_AIRPORT_DATA - @m38a_lib.M38A
=PP0V9_S0_MEMVTT_LDO =PP0V9_S0_MEMVTT_LDO @m38a_lib.M38A
=PP0V9_S0_MEM_TERM - @m38a_lib.M38A
PP0V9_S0 - @m38a_lib.M38A
=PP0V9_S0_MEM_TERM - @m38a_lib.M38A
=PP1V2_S0_GPU_VDDPLL =PP1V2_S0_GPU_VDDPLL @m38a_lib.M38A
=PPVIO_S0_PCIE - @m38a_lib.M38A
=PP1V2_S0_REG - @m38a_lib.M38A
=PP1V2_S0_PCIE_GPU_PVDD @m38a_lib.M38A
=PP1V2_S0_PCIE_GPU_VDDR @m38a_lib.M38A
PP1V2_GPU_IO_S0 - @m38a_lib.M38A
=PPVIO_S0_PCIE - @m38a_lib.M38A
=PP1V2_S0_REG - @m38a_lib.M38A
=PP1V2_S0_PCIE_GPU_VDDR @m38a_lib.M38A
=PP1V2_S0_PCIE_GPU_PVDD @m38a_lib.M38A
=PP1V2_S3_ENET
=PP1V2_S3_ENET - @m38a_lib.M38A
PP1V2_S3_ENET - @m38a_lib.M38A
=PP1V2_S3_LAN
=PP1V2_S3_LAN - @m38a_lib.M38A
PP1V2_S3 - @m38a_lib.M38A
=PP1V8_S0_FB_VDD
=PP1V8_S0_FB_VDD - @m38a_lib.M38A
=PP1V8_S0_FB_VDDQ - @m38a_lib.M38A
=PP1V8R2V0_S0_FB_GPU @m38a_lib.M38A
PP1V8_S0 - @m38a_lib.M38A
=PP1V8R3V3_S0_GPU_VDDR5 @m38a_lib.M38A
=PP1V8R3V3_S0_GPU_VDDR4 @m38a_lib.M38A
PP1V8_S0 - @m38a_lib.M38A
PP1V8R2V0_S0_FB_GPU @m38a_lib.M38A
=PP1V8_S0_FB_VDDQ - @m38a_lib.M38A
=PP1V8R3V3_S0_GPU_VDDR5 @m38a_lib.M38A
=PP1V8R3V3_S0_GPU_VDDR4 @m38a_lib.M38A
=PP1V8R2V0_S0_FB_GPU @m38a_lib.M38A
=PP1V8_S3_MEM_NB
=PP1V8_S3_MEM_NB - @m38a_lib.M38A
=PP1V8_S0_MEMVTT - @m38a_lib.M38A
PP1V8_S3 - @m38a_lib.M38A
=PP1V8_S3_MEM - @m38a_lib.M38A
80D6
80D7
79B3
79D6
79D5
79C6
79C5
79C5
79C3
79C7
79C7
79C7
79C7
79C6
79D7
79C3
79C5
PP1V8_S3 - @m38a_lib.M38A
=PP1V8_S3_MEM - @m38a_lib.M38A
=PP1V8_S0_MEMVTT - @m38a_lib.M38A
=PP2V5_S0_NB_VCCA_3G =PP2V5_S0_NB_VCCA_3GBG BG
@m38a_lib.M38A
=PP2V5_S0_GPU - @m38a_lib.M38A
PP2V5_S0 - @m38a_lib.M38A
=PP2V5_S0_GPU_VDD25 @m38a_lib.M38A
=PP2V5_S0_GPU_VDDC_CT @m38a_lib.M38A
=PP2V5_S0_GPU_PVDD - @m38a_lib.M38A
PP2V5_S0 - @m38a_lib.M38A
=PP2V5_S0_GPU_VDDC_CT @m38a_lib.M38A
=PP2V5_S0_GPU_VDD25 @m38a_lib.M38A
=PP2V5_S0_GPU_PVDD - @m38a_lib.M38A
=PP2V5_S0_GPU - @m38a_lib.M38A
=PP2V5_S3_ENET
=PP2V5_S3_ENET - @m38a_lib.M38A
PP2V5_S3_ENET - @m38a_lib.M38A
=PP3V3_S0_NB
=PP3V3_S0_NB - @m38a_lib.M38A
79D6
79D7
78C6
78C5
78B6
78B5
78B5
78B3
78B7
78B7
78C7
78B7
78B6
78C7
78B3
78B5
=PP3V3_DDC_DVI - @m38a_lib.M38A
=PP3V3_DDC_LCD - @m38a_lib.M38A
=PP3V3_GPU - @m38a_lib.M38A
PP3V3_S0 - @m38a_lib.M38A
=PP3V3_S0_GPU - @m38a_lib.M38A
=PP3V3_S0_GPU_VDDR3 @m38a_lib.M38A
=PP3V3_S0_LCD - @m38a_lib.M38A
=PP3V3_S0_2V5REG - @m38a_lib.M38A
=PP3V3_S0_AIRPORT - @m38a_lib.M38A
=PP3V3_S0_PCI - @m38a_lib.M38A
=PP3V3_S0_AUDIO - @m38a_lib.M38A
78C6
78C7
77D2
77D2
77D3
77D3
77C2
77D2
77D2
68A4
59C1
59C1
10C3
58B5
59C1
66B6
66B4
59C1
59C2 59D1
61C3
58B5
10C3
59C1
59C1
59C1
10C3
58B5
59C1
59C2 59D1
59C1
66B4
66B6
66B4
59C1
59C2 59D1
61C3
58B5
10C3
59C1
27D6
27D6
27D6
23D5
27D6
27D6
27D6
59C2
59C1
66B4
28A6
53B4
33B6
27B8
33B6
53B4
28A6
59D1
29A6
27D7
29A6
27C6 53B4
27D6 33B6
23D5 27B8 27D7
27D6 33B6
27C6 53B4
6D4 31B3
=PP3V3_S0_TPM - @m38a_lib.M38A
=PP3V3_S0_SB_VCCLAN3_3 @m38a_lib.M38A
=PP3V3_S0_SB_VCC3_3_PCI @m38a_lib.M38A
=PP3V3_S0_SB_VCC3_3_IDE @m38a_lib.M38A
=PP3V3_S0_SB_VCC3_3 @m38a_lib.M38A
=PP3V3_S0_SB_PM - @m38a_lib.M38A
=PP3V3_S0_SB_PCI - @m38a_lib.M38A
=PP3V3_S0_SB_GPIO - @m38a_lib.M38A
=PP3V3_S0_SB_3V3_1V5_VCCHDA @m38a_lib.M38A
=PP3V3_S0_SB - @m38a_lib.M38A
=PP3V3_S0_PCI - @m38a_lib.M38A
=PP3V3_S0_PATA - @m38a_lib.M38A
=PP3V3_S0_ODD_TSENS @m38a_lib.M38A
=PP3V3_S0_NB_VCC_HV @m38a_lib.M38A
=PP3V3_S0_NB_TVDAC - @m38a_lib.M38A
=PP3V3_S0_NB_PM - @m38a_lib.M38A
=PP3V3_S0_LCD - @m38a_lib.M38A
=PP3V3_S0_IMVP - @m38a_lib.M38A
=PP3V3_S0_HD_TSENS - @m38a_lib.M38A
=PP3V3_S0_GPU_CLOCKS @m38a_lib.M38A
=PP3V3_S0_GPUBBP - @m38a_lib.M38A
=PP3V3_S0_GPUBBN - @m38a_lib.M38A
=PP3V3_S0_GPUBBCTL - @m38a_lib.M38A
=PP3V3_S0_GPU - @m38a_lib.M38A
6D4 30D4
6D6 79A3
6D4 30D4
88C6 91B8
84A2 88C6
77A3 88C6
84C8 88D6
84C8 88D6
88D8
84A2 88C6
77A3 88C6
84C8 88D6
84C8 88D6
41A8 41D6
42B5
6D3 42B8
6D4 77B3
88B6 89D5
88B6 89D5
86B8 87A5
88B6
78B2 88B6
88B6 91B7
42B5
=PP3V3_S0_FAN - @m38a_lib.M38A
=PP3V3_S0_CK410 - @m38a_lib.M38A
=PP3V3_S0_AUDIO - @m38a_lib.M38A
88B6 91B7
78B2 88B6
88B8
88B6 89D5 89D8 90D5 90D8
88B6 91B7
=PP3V3_S3_1V2REG
88B6 91B7
86B8 87A5 87A8 87B5 87B8
88B6
6D3 6D3 14C2 16B6 19B8
19D7
6D3 31C7
5D2 6D4 79C2
5C4 6D3 28B2 28C8 28D3
28D6 29B2 29D3 29D6
5D2 6D4 79C2
5C4 6D3 28B2 28C8 28D3
28D6 29B2 29D3 29D6
6D3 31C7
6B4 17D6 19A8 19C7
=PP3V3_S0_AIRPORT - @m38a_lib.M38A
=PP3V3_S0_2V5REG - @m38a_lib.M38A
=PP3V3_GPU - @m38a_lib.M38A
=PP3V3_DDC_LCD - @m38a_lib.M38A
=PP3V3_DDC_DVI - @m38a_lib.M38A
=PP3V3_S3_1V2REG - @m38a_lib.M38A
PP3V3_S3 - @m38a_lib.M38A
=PP3V3_S3_BT - @m38a_lib.M38A
=PP3V3_S3_TPM - @m38a_lib.M38A
=PP3V3_S3_ENET - @m38a_lib.M38A
PP3V3_S3 - @m38a_lib.M38A
=PP3V3_S3_VGASYNC - @m38a_lib.M38A
=PP3V3_S3_USB - @m38a_lib.M38A
=PP3V3_S3_TPM - @m38a_lib.M38A
=PP3V3_S3_ENET - @m38a_lib.M38A
=PP3V3_S5_DEBUG
88B6 93C8
6B6 11B8 11C8 77D1 88C8
88B6 91C6
=PP3V3_S3_BT - @m38a_lib.M38A
=PP3V3_S5_DEBUG - @m38a_lib.M38A
=PP3V3_S5_ROM - @m38a_lib.M38A
PP3V3_S5 - @m38a_lib.M38A
88B6 91C6
88B6 91A8
6B6 11B8 11C8 77D1 88C8
88B6 91C6
=PP3V3_S5_SMC - @m38a_lib.M38A
88B6 91C6
=PP3V3_S5_SB_IO - @m38a_lib.M38A
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA @m38a_lib.M38A
=PP3V3_S5_SB_VCCSUS3_3_USB @m38a_lib.M38A
=PP3V3_S5_SB_VCCSUS3_3 @m38a_lib.M38A
=PP3V3_S5_SB_PM - @m38a_lib.M38A
=PP3V3_S5_SB_USB - @m38a_lib.M38A
=PP3V3_S5_SB - @m38a_lib.M38A
=PP3V3_S5_FW - @m38a_lib.M38A
88B6 91A8
88B6 93C8
41D5 41D6 42C4
42C4 43D8
6A4 14C7 14D6 19C7 20A4
20B4 20B4
88C6 97D2
88C6 94A7 94C7
88C6 94B3
6B6 6D8 10D2 11B8 26B7
26C6 41D8 59D3 61C3 76D6
88C8
6A7 88C6 91D2 93A1 97A5
97B5
88C6 88D3 91C6
PP3V3_S5 - @m38a_lib.M38A
=PP3V3_S5_SMC - @m38a_lib.M38A
88C6 94C8
6A4 77D4
6A4 53C2
6A4 44D5
6A4 68A5 68D7 72A6 72C8
72D5 73B8 74B5 74C5 74D6
6A4 75D8
6A4 33C8 33D3 33D8 34D4
6A4 28A7 29A3 29A7
6A4 67C7 67D4
6A4 24C3 25C4
=PP3V3_S5_SB_VCCSUS3_3_USB @m38a_lib.M38A
=PP3V3_S5_SB_VCCSUS3_3 @m38a_lib.M38A
=PP3V3_S5_SB_USB - @m38a_lib.M38A
=PP3V3_S5_SB_PM - @m38a_lib.M38A
=PP3V3_S5_SB_IO - @m38a_lib.M38A
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA @m38a_lib.M38A
=PP3V3_S5_SB - @m38a_lib.M38A
=PP3V3_S0_IMVP - @m38a_lib.M38A
=PP3V3_S0_CK410 - @m38a_lib.M38A
=PPSPD_S0_MEM - @m38a_lib.M38A
=PP3V3_S0_TPM - @m38a_lib.M38A
=PP3V3_S0_SB_3V3_1V5_VCCHDA @m38a_lib.M38A
=PP3V3_S0_ODD_TSENS 6A4 66B4
@m38a_lib.M38A
=PP3V3_S0_HD_TSENS - @m38a_lib.M38A 6B4 66B5
=PP3V3_S0_FAN - @m38a_lib.M38A
6B4 59A8 59B7 65B7 65C7
66C7
=PP3V3_S0_PATA - @m38a_lib.M38A
6B4 38D3
=PP3V3_S0_SB_PM - @m38a_lib.M38A
6B4 26D4
=PP3V3_S0_SB_PCI - @m38a_lib.M38A
6B4 26D1
=PP3V3_S0_SB_VCC3_3_IDE 6B4 24C3 25B3
@m38a_lib.M38A
=PP3V3_S0_SB_VCC3_3_PCI 6B4 24B3 25A3
@m38a_lib.M38A
=PP3V3_S0_SB_VCC3_3 6B4 24B5 24B5 25B8 25C6
@m38a_lib.M38A
=PP3V3_S0_NB_VCC_HV 6B4 17C6 19A8 19C7
@m38a_lib.M38A
=PP3V3_S0_SB_GPIO - @m38a_lib.M38A 6B4 21C3 21D3 23B3 23D5
=PP3V3_S0_SB_VCCLAN3_3 6A4 24D3 25D3
@m38a_lib.M38A
=PP3V3_S0_SB - @m38a_lib.M38A
6B4 22B5 25D8 27C6
PP3V3_S0 - @m38a_lib.M38A
6B6 6D8 10D2 11B8 26B7
26C6 41D8 59D3 61C3 76D6
88C8
=PPSPD_S0_MEM - @m38a_lib.M38A
6A4 28A7 29A3 29A7
=PP3V3_S5_ROM - @m38a_lib.M38A
=PP3V3_S5_FW - @m38a_lib.M38A
=PP5V_S0_AUDIO
=PP5V_S0_DEBUG
=PP5V_S0_GPUVCORE
=PP5V_S0_MEMVTT
=PP5V_S0_AUDIO - @m38a_lib.M38A
PP5V_S0_AUDIO - @m38a_lib.M38A
=PP5V_S0_DEBUG - @m38a_lib.M38A
=PP5V_S0_DVI_DDC - @m38a_lib.M38A
=PP5V_S0_GPUISENS - @m38a_lib.M38A
PP5V_S0 - @m38a_lib.M38A
=PP5V_S0_SB - @m38a_lib.M38A
=PP5V_S0_PATA - @m38a_lib.M38A
PP5V_S0 - @m38a_lib.M38A
=PP5V_S0_SB - @m38a_lib.M38A
=PP5V_S0_PATA - @m38a_lib.M38A
=PP5V_S0_GPUISENS - @m38a_lib.M38A
=PP5V_S0_GPUBBCTL - @m38a_lib.M38A
=PP5V_S0_DVI_DDC - @m38a_lib.M38A
=PP5V_S0_GPUVCORE - @m38a_lib.M38A
GPUVCORE_VCC - @m38a_lib.M38A
=PP5V_S0_MEMVTT - @m38a_lib.M38A
PP5V_S3 - @m38a_lib.M38A
=PP5V_S3_BNDI - @m38a_lib.M38A
=PP5V_S3_USB - @m38a_lib.M38A
PP5V_S3 - @m38a_lib.M38A
26D4
26D1
21C3 21D3 23B3 23D5
24C3 25C4
6B4
6A4
6B4
6A4
22D8
11B5 23D1
22C6 27C6
24C3
=PP12V_GPU
=PP5V_S3_USB - @m38a_lib.M38A
=PP5V_S3_BNDI - @m38a_lib.M38A
=PP5V_S5_SB - @m38a_lib.M38A
PP5V_S5 - @m38a_lib.M38A
=PP12V_GPU - @m38a_lib.M38A
PP12V_S0 - @m38a_lib.M38A
=PP12V_S0_FAN - @m38a_lib.M38A
PP12V_S0 - @m38a_lib.M38A
=PP12V_S0_FAN - @m38a_lib.M38A
=PP12V_S0_AUDIO_SPKR =PP12V_S0_AUDIO_SPKRAMP AMP
@m38a_lib.M38A
PP12V_S0_AUDIO_SPKRAMP @m38a_lib.M38A
=PP12V_S5_CPU
=PP12V_S5_CPU - @m38a_lib.M38A
=PPVIN_S0_GPUVCORE - @m38a_lib.M38A
PP12V_S5 - @m38a_lib.M38A
6C3 47C8
6C3 47D3
6D1 25C8
5D2 6D2 6D7 59A5 79B3
79B3 80B3 81B3 83C3
88B6 94C3 94D7
6A6 6D8 88B8
6A4 65B6 65D7 66D6
6A6 6D8 88B8
6A4 65B6 65D7 66D6
6A4 72D8
6A5
6C1 76D8
85D7 88B6
5D2 6C2 6D7 11A8 11C7
11D7 77C8 77D8 78C7 79D7
80D7 81D7 83C5 83C5 88B8
=PP12V_S5_FW - @m38a_lib.M38A
6C1 46D7
PP12V_S5 - @m38a_lib.M38A
5D2 6C2 6D7 11A8 11C7
11D7 77C8 77D8 78C7 79D7
80D7 81D7 83C5 83C5 88B8
=PPVIN_S0_GPUVCORE - @m38a_lib.M38A 85D7 88B6
=PP12V_S5_FW - @m38a_lib.M38A
6C1 46D7
=PP12V_S5_FW_PHY
=PP12V_S5_FW_PHY - @m38a_lib.M38A
44C2 46D5
PP12V_FW - @m38a_lib.M38A
46D6
=PPBB_S0_GPU
=PPBB_S0_GPU - @m38a_lib.M38A
86D6 88C6
=PPVCORE_S0_GPU - @m38a_lib.M38A
86D8 88D6 91A7
PP1V0R1V2_S0_GPU - @m38a_lib.M38A
59B4 88D8
=PPVCORE_S0_GPU_REG 85C1 88D6
@m38a_lib.M38A
PPBB_S0_GPU - @m38a_lib.M38A
88C8
PP1V0R1V2_S0_GPU - @m38a_lib.M38A
59B4 88D8
=PPVOUT_S0_GPUBBP_LDO 85A6 88C6
@m38a_lib.M38A
=PPVCORE_S0_GPU_REG 85C1 88D6
@m38a_lib.M38A
=PPVCORE_S0_GPU_BBP 85A8 88D6
@m38a_lib.M38A
=PPVCORE_S0_GPU - @m38a_lib.M38A
86D8 88D6 91A7
=PPVCORE_S0_CPU
=PPVCORE_S0_CPU - @m38a_lib.M38A
6D4 8B6 8D7 8D8 9B8
PPVCORE_CPU - @m38a_lib.M38A
5D2 6D6 75A4 75D1 76B3
ACZ_BITCLK
ACZ_BITCLK - @m38a_lib.M38A
21C7 68D7
ACZ_RST_L
ACZ_RST_L - @m38a_lib.M38A
21C7 68C7
ACZ_SDATAIN<0>
ACZ_SDATAIN<0> - @m38a_lib.M38A
21C7 68D7
ACZ_SDATAIN_CHIP
ACZ_SDATAIN_CHIP - @m38a_lib.M38A
68C6
ACZ_SDATAOUT
ACZ_SDATAOUT - @m38a_lib.M38A
21C7 68D7
ACZ_SYNC
ACZ_SYNC - @m38a_lib.M38A
21C7 68D7
AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_N 34B4 34C2 53C6
_N
@m38a_lib.M38A
AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_P 34B4 34C2 53C6
_P
@m38a_lib.M38A
AIRPORT_CONN_CLK
AIRPORT_CONN_CLK - @m38a_lib.M38A
53B5
AIRPORT_CONN_DATA
AIRPORT_CONN_DATA - @m38a_lib.M38A 53B5
AIRPORT_RST_L
AIRPORT_RST_L - @m38a_lib.M38A
6B7 53C5
AIRPORT_WAKE_L
AIRPORT_WAKE_L - @m38a_lib.M38A
53C6
ALL_SYS_PWRGD
ALL_SYS_PWRGD - @m38a_lib.M38A
26D5 58D7 77D4
ALS_GAIN
ALS_GAIN - @m38a_lib.M38A
58B5 59C6
NC_ALS_GAIN - @m38a_lib.M38A
59C5
ALS_LEFT
ALS_LEFT - @m38a_lib.M38A
58A7 59D5
TP_ALS_LEFT - @m38a_lib.M38A
59D3
ALS_RIGHT
ALS_RIGHT - @m38a_lib.M38A
58A7 59D5
TP_ALS_RIGHT - @m38a_lib.M38A
59D3
ATI_DVPCLK
ATI_DVPCLK - @m38a_lib.M38A
91C3 95A6
TP_ATI_DVPCLK - @m38a_lib.M38A
95A8
ATI_DVPCNTL<0>
ATI_DVPCNTL<0> - @m38a_lib.M38A
91C3 95A6
ATI_DVPCNTL<1>
ATI_DVPCNTL<1> - @m38a_lib.M38A
91B3 95A6
ATI_DVPCNTL<2>
ATI_DVPCNTL<2> - @m38a_lib.M38A
91B3 95A6
ATI_DVPDATA<0>
ATI_DVPDATA<0> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<1>
ATI_DVPDATA<1> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<2>
ATI_DVPDATA<2> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<3>
ATI_DVPDATA<3> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<4>
ATI_DVPDATA<4> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<5>
ATI_DVPDATA<5> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<6>
ATI_DVPDATA<6> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<7>
ATI_DVPDATA<7> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<8>
ATI_DVPDATA<8> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<9>
ATI_DVPDATA<9> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<10>
ATI_DVPDATA<10> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<11>
ATI_DVPDATA<11> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<12>
ATI_DVPDATA<12> - @m38a_lib.M38A
91B3 95B6
ATI_DVPDATA<13>
ATI_DVPDATA<13> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<14>
ATI_DVPDATA<14> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<15>
ATI_DVPDATA<15> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<16>
ATI_DVPDATA<16> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<17>
ATI_DVPDATA<17> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<18>
ATI_DVPDATA<18> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<19>
ATI_DVPDATA<19> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<20>
ATI_DVPDATA<20> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<21>
ATI_DVPDATA<21> - @m38a_lib.M38A
91B3 95C6
ATI_DVPDATA<22>
ATI_DVPDATA<22> - @m38a_lib.M38A
91A3 95C6
ATI_DVPDATA<23>
ATI_DVPDATA<23> - @m38a_lib.M38A
91A3 95C6
ATI_R2SET
ATI_R2SET - @m38a_lib.M38A
93A8 93B5
ATI_RSET
ATI_RSET - @m38a_lib.M38A
93A8 93B5
ATI_TDIODE_N
ATI_TDIODE_N - @m38a_lib.M38A
61C5 91A3
ATI_TDIODE_P
ATI_TDIODE_P - @m38a_lib.M38A
61C5 91A3
ATI_TESTEN
ATI_TESTEN - @m38a_lib.M38A
91A3
ATI_VREFG
ATI_VREFG - @m38a_lib.M38A
91D3
AUDLINDETH
AUDLINDETH - @m38a_lib.M38A
74D5
AUDSAMPCPN
AUDSAMPCPN - @m38a_lib.M38A
72C4
AUDSAMPCPP
AUDSAMPCPP - @m38a_lib.M38A
72C4
AUDSAMPINLN
AUDSAMPINLN - @m38a_lib.M38A
72D6
AUDSAMPINLP
AUDSAMPINLP - @m38a_lib.M38A
72C6
AUDSAMPINRN
AUDSAMPINRN - @m38a_lib.M38A
72C6
AUDSAMPINRP
AUDSAMPINRP - @m38a_lib.M38A
72C6
AUDSAMPOURTP
AUDSAMPOURTP - @m38a_lib.M38A
72C4
AUDSAMPOUTLN
AUDSAMPOUTLN - @m38a_lib.M38A
72C4
AUDSAMPOUTLP
AUDSAMPOUTLP - @m38a_lib.M38A
72C4
AUDSAMPOUTRN
AUDSAMPOUTRN - @m38a_lib.M38A
72C4
AUD_4V5_SHDN_L
AUD_4V5_SHDN_L - @m38a_lib.M38A
68A5
AUD_ANALOG_FILT_1
AUD_ANALOG_FILT_1 - @m38a_lib.M38A 68C4
AUD_ANALOG_FILT_2
AUD_ANALOG_FILT_2 - @m38a_lib.M38A 68C4
AUD_BI_PORT_A_L
AUD_BI_PORT_A_L - @m38a_lib.M38A
68C1 74B8
AUD_BI_PORT_A_R
AUD_BI_PORT_A_R - @m38a_lib.M38A
68C1 74B8
AUD_BI_PORT_B_L
AUD_BI_PORT_B_L - @m38a_lib.M38A
68B2 68C1 74A3
AUD_BI_PORT_B_R - @m38a_lib.M38A
68B1 68C1
AUD_BI_PORT_C_L
AUD_BI_PORT_C_L - @m38a_lib.M38A
68C7 72D8
AUD_BI_PORT_C_R
AUD_BI_PORT_C_R - @m38a_lib.M38A
68C7 72C8
AUD_BI_PORT_F_L
AUD_BI_PORT_F_L - @m38a_lib.M38A
68C1 74C8
AUD_BI_PORT_F_R
AUD_BI_PORT_F_R - @m38a_lib.M38A
68C1 74C8
AUD_BYPASS
AUD_BYPASS - @m38a_lib.M38A
68C4
AUD_DEBOUNCE
AUD_DEBOUNCE - @m38a_lib.M38A
72B7
AUD_GPIO_0
AUD_GPIO_0 - @m38a_lib.M38A
68C7 72B8
100
AUD_GPIO_1
AUD_GPIO_2
AUD_LI_DET_EMI
AUD_LI_DET_H
AUD_LI_DET_JACK
AUD_LI_GND_EMI
AUD_LI_GND_JACK
AUD_LI_L
AUD_LI_L_EMI
AUD_LI_L_JACK
AUD_LI_R
AUD_LI_R_EMI
AUD_LI_R_JACK
AUD_LO_DET1_1
AUD_LO_DET1_INV
AUD_LO_DET2_1
AUD_LO_GND_JACK
AUD_LO_L
AUD_LO_L_EMI
AUD_LO_L_JACK
AUD_LO_R
AUD_LO_R_EMI
AUD_LO_R_JACK
AUD_LO_TIP
AUD_LO_TIP_EMI
AUD_LO_TIP_JACK
AUD_LO_TYPE
AUD_LO_TYPE_EMI
AUD_LO_TYPE_JACK
AUD_MAX9714_CHOLD
AUD_MAX9714_VREG
AUD_MIC_INTERCON
AUD_MIC_IN_N
AUD_MIC_IN_N_CONN
AUD_MIC_IN_N_EMI
AUD_MIC_IN_P
AUD_MIC_IN_P_CONN
AUD_MIC_IN_P_EMI
AUD_MIC_P1
AUD_NC_40
AUD_NC_43
AUD_PORT_A_DET_L
AUD_PORT_A_L1
AUD_PORT_A_L2
AUD_PORT_A_R1
AUD_PORT_A_R2
AUD_PORT_E_DET_L
AUD_PORT_F_DET_L
AUD_PORT_F_L1
AUD_PORT_F_R1
AUD_SAMP_FS1
AUD_SAMP_FS2
AUD_SAMP_G1
AUD_SAMP_G2
AUD_SAMP_INL_N
AUD_SAMP_INL_P
AUD_SAMP_INR_N
AUD_SAMP_INR_P
AUD_SAMP_SHDN_L
AUD_SENSE_A
AUD_SENSE_B
AUD_SPDIFIN_JACK
AUD_SPDIF_GND_IN
AUD_SPDIF_GND_OUT
AUD_SPDIF_IN
AUD_SPDIF_OUT
AUD_SPDIF_OUT_CHIP
AUD_SPKR_OUTL_N
AUD_SPKR_OUTL_P
AUD_SPKR_OUTR_N
AUD_SPKR_OUTR_P
AUD_TYPE_DET_EN
AUD_VREF_FILT
AUD_VREF_PORT_B
BAL_IN_COM
BAL_IN_L
BAL_IN_R
BAT_1
BAT_2
BEEP
BIOS_REC
BOOT_LPC_SPI_L
C8509_P1
CK410_27M_NONSPREAD
CK410_27M_SPREAD
CK410_CLK14P3M_TIMER
CK410_CPU0_N
CK410_CPU0_P
CK410_CPU1_N
CK410_CPU1_P
CK410_CPU2_ITP_SRC10
_N
CK410_CPU2_ITP_SRC10
_P
CK410_DOT96_27M_NONS
PREAD_P
CK410_DOT96_27M_SPRE
AD_N
CK410_FSA
CK410_FSB_TEST_MODE
CK410_FSC
CK410_IREF
CK410_LVDS_N
CK410_LVDS_P
CK410_PCI1_CLK
CK410_PCI2_CLK
CK410_PCI3_CLK
CK410_PCI4_CLK
CK410_PCI5_FCTSEL1
CK410_PCIF0_CLK
CK410_PCIF1_ITP_EN
CK410_PD_VTT_PWRGD_L
CK410_REF1_FCTSEL0
CK410_SRC1_N
CK410_SRC1_P
CK410_SRC2_N
7
AUD_GPIO_1 - @m38a_lib.M38A
AUD_GPIO_2 - @m38a_lib.M38A
AUD_LI_DET_EMI - @m38a_lib.M38A
AUD_LI_DET_H - @m38a_lib.M38A
AUD_LI_DET_JACK - @m38a_lib.M38A
AUD_LI_GND_EMI - @m38a_lib.M38A
AUD_LI_GND_JACK - @m38a_lib.M38A
AUD_LI_L - @m38a_lib.M38A
AUD_LI_L_EMI - @m38a_lib.M38A
AUD_LI_L_JACK - @m38a_lib.M38A
AUD_LI_R - @m38a_lib.M38A
AUD_LI_R_EMI - @m38a_lib.M38A
AUD_LI_R_JACK - @m38a_lib.M38A
AUD_LO_DET1_1 - @m38a_lib.M38A
AUD_LO_DET1_INV - @m38a_lib.M38A
AUD_LO_DET2_1 - @m38a_lib.M38A
AUD_LO_GND_JACK - @m38a_lib.M38A
AUD_LO_L - @m38a_lib.M38A
AUD_LO_L_EMI - @m38a_lib.M38A
AUD_LO_L_JACK - @m38a_lib.M38A
AUD_LO_R - @m38a_lib.M38A
AUD_LO_R_EMI - @m38a_lib.M38A
AUD_LO_R_JACK - @m38a_lib.M38A
AUD_LO_TIP - @m38a_lib.M38A
AUD_LO_TIP_EMI - @m38a_lib.M38A
AUD_LO_TIP_JACK - @m38a_lib.M38A
AUD_LO_TYPE - @m38a_lib.M38A
AUD_LO_TYPE_EMI - @m38a_lib.M38A
AUD_LO_TYPE_JACK - @m38a_lib.M38A
AUD_MAX9714_CHOLD - @m38a_lib.M38A
AUD_MAX9714_VREG - @m38a_lib.M38A
AUD_MIC_INTERCON - @m38a_lib.M38A
AUD_MIC_IN_N - @m38a_lib.M38A
AUD_MIC_IN_N_CONN - @m38a_lib.M38A
AUD_MIC_IN_N_EMI - @m38a_lib.M38A
AUD_MIC_IN_P - @m38a_lib.M38A
AUD_MIC_IN_P_CONN - @m38a_lib.M38A
AUD_MIC_IN_P_EMI - @m38a_lib.M38A
AUD_MIC_P1 - @m38a_lib.M38A
AUD_NC_40 - @m38a_lib.M38A
AUD_NC_43 - @m38a_lib.M38A
AUD_PORT_A_DET_L - @m38a_lib.M38A
AUD_PORT_A_L1 - @m38a_lib.M38A
AUD_PORT_A_L2 - @m38a_lib.M38A
AUD_PORT_A_R1 - @m38a_lib.M38A
AUD_PORT_A_R2 - @m38a_lib.M38A
AUD_PORT_E_DET_L - @m38a_lib.M38A
AUD_PORT_F_DET_L - @m38a_lib.M38A
AUD_PORT_F_L1 - @m38a_lib.M38A
AUD_PORT_F_R1 - @m38a_lib.M38A
AUD_SAMP_FS1 - @m38a_lib.M38A
AUD_SAMP_FS2 - @m38a_lib.M38A
AUD_SAMP_G1 - @m38a_lib.M38A
AUD_SAMP_G2 - @m38a_lib.M38A
AUD_SAMP_INL_N - @m38a_lib.M38A
AUD_SAMP_INL_P - @m38a_lib.M38A
AUD_SAMP_INR_N - @m38a_lib.M38A
AUD_SAMP_INR_P - @m38a_lib.M38A
AUD_SAMP_SHDN_L - @m38a_lib.M38A
AUD_SENSE_A - @m38a_lib.M38A
AUD_SENSE_B - @m38a_lib.M38A
AUD_SPDIFIN_JACK - @m38a_lib.M38A
AUD_SPDIF_GND_IN - @m38a_lib.M38A
AUD_SPDIF_GND_OUT - @m38a_lib.M38A
AUD_SPDIF_IN - @m38a_lib.M38A
AUD_SPDIF_OUT - @m38a_lib.M38A
AUD_SPDIF_OUT_CHIP - @m38a_lib.M38A
AUD_SPKR_OUTL_N - @m38a_lib.M38A
AUD_SPKR_OUTL_P - @m38a_lib.M38A
AUD_SPKR_OUTR_N - @m38a_lib.M38A
AUD_SPKR_OUTR_P - @m38a_lib.M38A
AUD_TYPE_DET_EN - @m38a_lib.M38A
AUD_VREF_FILT - @m38a_lib.M38A
AUD_VREF_PORT_B - @m38a_lib.M38A
BAL_IN_COM - @m38a_lib.M38A
BAL_IN_L - @m38a_lib.M38A
BAL_IN_R - @m38a_lib.M38A
BAT_1 - @m38a_lib.M38A
BAT_2 - @m38a_lib.M38A
BEEP - @m38a_lib.M38A
BIOS_REC - @m38a_lib.M38A
BOOT_LPC_SPI_L - @m38a_lib.M38A
C8509_P1 - @m38a_lib.M38A
CK410_27M_NONSPREAD @m38a_lib.M38A
CK410_27M_SPREAD - @m38a_lib.M38A
GPU_GPIO_16 - @m38a_lib.M38A
CK410_CLK14P3M_TIMER @m38a_lib.M38A
CK410_CPU0_N - @m38a_lib.M38A
CK410_CPU0_P - @m38a_lib.M38A
CK410_CPU1_N - @m38a_lib.M38A
CK410_CPU1_P - @m38a_lib.M38A
CK410_CPU2_ITP_SRC10_N @m38a_lib.M38A
CK410_CPU2_ITP_SRC10_P @m38a_lib.M38A
CK410_DOT96_27M_NONSPREAD_P @m38a_lib.M38A
CK410_DOT96_27M_SPREAD_N @m38a_lib.M38A
CK410_FSA - @m38a_lib.M38A
CK410_FSB_TEST_MODE @m38a_lib.M38A
CK410_FSC - @m38a_lib.M38A
CK410_IREF - @m38a_lib.M38A
CK410_LVDS_N - @m38a_lib.M38A
TP_CK410_LVDS_N - @m38a_lib.M38A
CK410_LVDS_P - @m38a_lib.M38A
TP_CK410_LVDS_P - @m38a_lib.M38A
CK410_PCI1_CLK - @m38a_lib.M38A
CK410_PCI2_CLK - @m38a_lib.M38A
CK410_PCI3_CLK - @m38a_lib.M38A
CK410_PCI4_CLK - @m38a_lib.M38A
CK410_PCI5_FCTSEL1 - @m38a_lib.M38A
CK410_PCIF0_CLK - @m38a_lib.M38A
CK410_PCIF1_ITP_EN - @m38a_lib.M38A
CK410_PD_VTT_PWRGD_L @m38a_lib.M38A
VR_PWRGD_CK410_L - @m38a_lib.M38A
CK410_REF1_FCTSEL0 - @m38a_lib.M38A
CK410_SRC1_N - @m38a_lib.M38A
CK410_SRC1_P - @m38a_lib.M38A
CK410_SRC2_N - @m38a_lib.M38A
68C7
68B7
73D6
73D4
73D7
73D6
73D7
73D4
73D6
73D7
73D4
73D6
73D7
74A4
74B3
74B4
73B4
73B8
73B7
73B4
73A8
73A7
73B4
73B8
73B7
73B4
73B8
73B7
73B4
72C4
72C5
74A4
73C4
47C2
73C3
73C4
47C2
73C3
74A4
68C4
68B4
74B2
74B7
74B7
74B7
74B7
74B1
74D4
74C7
74C7
72A6
72A6
72A6
72A6
72C5
72C5
72C5
72C5
72C5
68C1
68C1
73D7
73C7
73A3
68C1
68D1
68D4
72C1
72C1
72C1
72C1
74B3
68C4
68C1
68C7
68C7
68C7
26C8
26C8
68C6
23A6
22B3
85C5
34A4
74C5
68C7
CK410_SRC2_P
CK410_SRC3_N
CK410_SRC3_P
CK410_SRC4_N
CK410_SRC4_P
CK410_SRC5_N
CK410_SRC5_P
CK410_SRC6_N
CK410_SRC6_P
CK410_SRC7_N
CK410_SRC7_P
CK410_SRC8_N
CK410_SRC8_P
CK410_SRC_CLKREQ1_L
74D6
74C5
74C5
74B2
CK410_SRC_CLKREQ3_L
74B5
CK410_SRC_CLKREQ6_L
CK410_SRC_CLKREQ8_L
74B5
74B5
74A5
74A6
73C2
74A6
73C2
74C4
74C3
74C4
74C3
74D4
74D3
74D4
74D3
72C5
72C5
72C5
72C5
74C5 74D7
74C5 74D6 74D7
73D4
73B8
73D2
73D2
73D2
73D2
CK410_USB48_FSA
CK410_XTAL_IN
CK410_XTAL_OUT
CLK_NB_OE_L
CPU_A20M_L
CPU_BSEL<0>
CPU_BSEL<1>
CPU_BSEL<2>
CPU_COMP<0>
CPU_COMP<1>
CPU_COMP<2>
CPU_COMP<3>
CPU_DCIN_SENSE
CPU_DCIN_SENSE_R
CPU_DPRSTP_L
CPU_DPSLP_L
CPU_FERR_L
CPU_GTLREF
CPU_HS_ZH607
CPU_HS_ZH608
CPU_HS_ZH609
CPU_HS_ZH610
CPU_IGNNE_L
CPU_INIT_L
CPU_INTR
CPU_NMI
CPU_PROCHOT_L
CPU_PSI_L
CPU_PWRGD
CPU_RCIN_L
CPU_SENSE_I_R
CPU_SMI_L
CPU_STPCLK_L
CPU_TEST1
CPU_TEST2
CPU_THERMD_EXT_N
CPU_THERMD_EXT_P
CPU_THERMD_N
CPU_THERMD_P
CPU_THERMTRIP_R
CPU_VCCSENSE_N
CPU_VCCSENSE_P
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
CPU_VID<6>
CPU_XDP_CLK_N
CPU_XDP_CLK_P
74A2
74A7
74A7
74A7
CRB_SV_DET
CRT_BLUE
CK410_SRC2_P - @m38a_lib.M38A
CK410_SRC3_N - @m38a_lib.M38A
CK410_SRC3_P - @m38a_lib.M38A
CK410_SRC4_N - @m38a_lib.M38A
CK410_SRC4_P - @m38a_lib.M38A
CK410_SRC5_N - @m38a_lib.M38A
CK410_SRC5_P - @m38a_lib.M38A
CK410_SRC6_N - @m38a_lib.M38A
CK410_SRC6_P - @m38a_lib.M38A
CK410_SRC7_N - @m38a_lib.M38A
CK410_SRC7_P - @m38a_lib.M38A
CK410_SRC8_N - @m38a_lib.M38A
CK410_SRC8_P - @m38a_lib.M38A
CK410_SRC_CLKREQ1_L @m38a_lib.M38A
CK410_SRC_CLKREQ3_L @m38a_lib.M38A
CK410_SRC_CLKREQ6_L @m38a_lib.M38A
CK410_SRC_CLKREQ8_L @m38a_lib.M38A
CK410_USB48_FSA - @m38a_lib.M38A
CK410_XTAL_IN - @m38a_lib.M38A
CK410_XTAL_OUT - @m38a_lib.M38A
CLK_NB_OE_L - @m38a_lib.M38A
CPU_A20M_L - @m38a_lib.M38A
CPU_BSEL<0> - @m38a_lib.M38A
CPU_BSEL<1> - @m38a_lib.M38A
CPU_BSEL<2> - @m38a_lib.M38A
CPU_COMP<0> - @m38a_lib.M38A
CPU_COMP<1> - @m38a_lib.M38A
CPU_COMP<2> - @m38a_lib.M38A
CPU_COMP<3> - @m38a_lib.M38A
CPU_DCIN_SENSE - @m38a_lib.M38A
CPU_DCIN_SENSE_R - @m38a_lib.M38A
CPU_DPRSTP_L - @m38a_lib.M38A
CPU_DPSLP_L - @m38a_lib.M38A
CPU_FERR_L - @m38a_lib.M38A
CPU_GTLREF - @m38a_lib.M38A
CPU_HS_ZH607 - @m38a_lib.M38A
CPU_HS_ZH608 - @m38a_lib.M38A
CPU_HS_ZH609 - @m38a_lib.M38A
CPU_HS_ZH610 - @m38a_lib.M38A
CPU_IGNNE_L - @m38a_lib.M38A
CPU_INIT_L - @m38a_lib.M38A
CPU_INTR - @m38a_lib.M38A
CPU_NMI - @m38a_lib.M38A
CPU_PROCHOT_L - @m38a_lib.M38A
CPU_PSI_L - @m38a_lib.M38A
CPU_PWRGD - @m38a_lib.M38A
CPU_RCIN_L - @m38a_lib.M38A
CPU_SENSE_I_R - @m38a_lib.M38A
CPU_SMI_L - @m38a_lib.M38A
CPU_STPCLK_L - @m38a_lib.M38A
CPU_TEST1 - @m38a_lib.M38A
CPU_TEST2 - @m38a_lib.M38A
CPU_THERMD_EXT_N - @m38a_lib.M38A
CPU_THERMD_EXT_P - @m38a_lib.M38A
CPU_THERMD_N - @m38a_lib.M38A
CPU_THERMD_P - @m38a_lib.M38A
CPU_THERMTRIP_R - @m38a_lib.M38A
CPU_VCCSENSE_N - @m38a_lib.M38A
CPU_VCCSENSE_P - @m38a_lib.M38A
CPU_VID<0> - @m38a_lib.M38A
CPU_VID<1> - @m38a_lib.M38A
CPU_VID<2> - @m38a_lib.M38A
CPU_VID<3> - @m38a_lib.M38A
CPU_VID<4> - @m38a_lib.M38A
CPU_VID<5> - @m38a_lib.M38A
CPU_VID<6> - @m38a_lib.M38A
CPU_XDP_CLK_N - @m38a_lib.M38A
FSB_CLK_XDP_N - @m38a_lib.M38A
CPU_XDP_CLK_P - @m38a_lib.M38A
FSB_CLK_XDP_P - @m38a_lib.M38A
CRB_SV_DET - @m38a_lib.M38A
CRT_BLUE - @m38a_lib.M38A
=PPVCORE_S0_NB - @m38a_lib.M38A
34A4 92C5
91C3 92C3
33A4 34D6
CRT_BLUE_L - @m38a_lib.M38A
CRT_IREF - @m38a_lib.M38A
CRT_GREEN_L - @m38a_lib.M38A
CRT_GREEN - @m38a_lib.M38A
PP2V5_S0_NB_VCCA_CRTDAC @m38a_lib.M38A
CRT_RED - @m38a_lib.M38A
CRT_RED_L - @m38a_lib.M38A
PP1V05_S0 - @m38a_lib.M38A
=PP1V05_S0_CPU - @m38a_lib.M38A
33C4
33C4
33C4
33C4
33C4
=PPVCORE_S0_SB - @m38a_lib.M38A
=PP1V05_S0_SB_CPU_IO @m38a_lib.M38A
=PP1V05_S0_NB_VTT - @m38a_lib.M38A
=PP1V05_S0_FSB_NB - @m38a_lib.M38A
23C5
58C7 60C4
92C7
34B6
34B6
34B6
34B6
34B6
33C4 34B6
PP2V5_S0_NB_VCCA_CRTDAC @m38a_lib.M38A
PP1V05_S0 - @m38a_lib.M38A
CRT_RED_L - @m38a_lib.M38A
CRT_RED - @m38a_lib.M38A
CRT_IREF - @m38a_lib.M38A
CRT_GREEN_L - @m38a_lib.M38A
CRT_GREEN - @m38a_lib.M38A
CRT_BLUE_L - @m38a_lib.M38A
=PPVCORE_S0_SB - @m38a_lib.M38A
=PPVCORE_S0_NB - @m38a_lib.M38A
33A4 34A6
33A4 34A6
34B8 34C4
33C6 34A8
34A8
33B6
33B4
34A4
33B4
34A4
33B6
33B6
33B6
33B6
33B6
33B8
33B8
26A8
34D4
26A7
33A4
33B4
33B4
33B4
75C6
34C6
34A6
34A6
34A6
34A6
=PP1V05_S0_SB_CPU_IO @m38a_lib.M38A
=PP1V05_S0_NB_VTT - @m38a_lib.M38A
=PP1V05_S0_NB - @m38a_lib.M38A
=PP1V05_S0_FSB_NB - @m38a_lib.M38A
34A6
34C6
34C6
34C6
34C6
34D6
34B6
34B6
33A4
=PP1V05_S0_CPU - @m38a_lib.M38A
CRT_DDC_CLK
CRT_DDC_DATA
DEBUG_RST_L
DMI_IRCOMP_R
DMI_N2S_N<0>
DMI_N2S_N<1>
DMI_N2S_N<2>
CRT_DDC_CLK - @m38a_lib.M38A
TP_CRT_DDC_CLK - @m38a_lib.M38A
CRT_DDC_DATA - @m38a_lib.M38A
TP_CRT_DDC_DATA - @m38a_lib.M38A
DEBUG_RST_L - @m38a_lib.M38A
DMI_IRCOMP_R - @m38a_lib.M38A
DMI_N2S_N<0> - @m38a_lib.M38A
DMI_N2S_N<1> - @m38a_lib.M38A
DMI_N2S_N<2> - @m38a_lib.M38A
33B4
33B4
33B4
33B4
33B4
33B4
33B4
33B4
33B4
33B4
33B4
33A4
33A4
33B4
34A6
34D3
34D3
34B6
34B6
34B6
34B6
34B6
34B6
34D3
34D3
34A6
34A6
34D8
DMI_N2S_N<3>
DMI_N2S_P<0>
DMI_N2S_P<1>
DMI_N2S_P<2>
DMI_N2S_P<3>
DMI_S2N_N<0>
DMI_S2N_N<1>
DMI_S2N_N<2>
DMI_S2N_N<3>
DMI_S2N_P<0>
DMI_S2N_P<1>
DMI_S2N_P<2>
DMI_S2N_P<3>
DVI_DDC_CLK
DVI_DDC_CLK_UF
DVI_DDC_DATA
DVI_DDC_DATA_UF
DVI_HPD_UF
ENET_C4106_2
ENET_C4107_2
ENET_C4117_1
ENET_C4118_1
ENET_CLK100M_PCIE_N
DMI_N2S_N<3> - @m38a_lib.M38A
DMI_N2S_P<0> - @m38a_lib.M38A
DMI_N2S_P<1> - @m38a_lib.M38A
DMI_N2S_P<2> - @m38a_lib.M38A
DMI_N2S_P<3> - @m38a_lib.M38A
DMI_S2N_N<0> - @m38a_lib.M38A
DMI_S2N_N<1> - @m38a_lib.M38A
DMI_S2N_N<2> - @m38a_lib.M38A
DMI_S2N_N<3> - @m38a_lib.M38A
DMI_S2N_P<0> - @m38a_lib.M38A
DMI_S2N_P<1> - @m38a_lib.M38A
DMI_S2N_P<2> - @m38a_lib.M38A
DMI_S2N_P<3> - @m38a_lib.M38A
DVI_DDC_CLK - @m38a_lib.M38A
DVI_DDC_CLK_UF - @m38a_lib.M38A
DVI_DDC_DATA - @m38a_lib.M38A
DVI_DDC_DATA_UF - @m38a_lib.M38A
DVI_HPD_UF - @m38a_lib.M38A
ENET_C4106_2 - @m38a_lib.M38A
ENET_C4107_2 - @m38a_lib.M38A
ENET_C4117_1 - @m38a_lib.M38A
ENET_C4118_1 - @m38a_lib.M38A
ENET_CLK100M_PCIE_N @m38a_lib.M38A
ENET_CLK100M_PCIE_P ENET_CLK100M_PCIE_P @m38a_lib.M38A
ENET_CTRL12
ENET_CTRL12 - @m38a_lib.M38A
TP_ENET_CTRL12 - @m38a_lib.M38A
ENET_CTRL25
ENET_CTRL25 - @m38a_lib.M38A
ENET_GATED_RST_L
ENET_GATED_RST_L - @m38a_lib.M38A
ENET_RST_L - @m38a_lib.M38A
ENET_LED_ACT_L
ENET_LED_ACT_L - @m38a_lib.M38A
ENET_LED_LINK10_100_ ENET_LED_LINK10_100_L L
@m38a_lib.M38A
ENET_LED_LINK1000_L ENET_LED_LINK1000_L @m38a_lib.M38A
ENET_LED_LINK_L
ENET_LED_LINK_L - @m38a_lib.M38A
ENET_LOM_DIS_L
ENET_LOM_DIS_L - @m38a_lib.M38A
ENET_MDI_N<0>
ENET_MDI_N<0> - @m38a_lib.M38A
ENET_MDI_N<1>
ENET_MDI_N<1> - @m38a_lib.M38A
ENET_MDI_N<2>
ENET_MDI_N<2> - @m38a_lib.M38A
ENET_MDI_N<3>
ENET_MDI_N<3> - @m38a_lib.M38A
ENET_MDI_P<0>
ENET_MDI_P<0> - @m38a_lib.M38A
ENET_MDI_P<1>
ENET_MDI_P<1> - @m38a_lib.M38A
ENET_MDI_P<2>
ENET_MDI_P<2> - @m38a_lib.M38A
ENET_MDI_P<3>
ENET_MDI_P<3> - @m38a_lib.M38A
ENET_MDI_R_N<0>
ENET_MDI_R_N<0> - @m38a_lib.M38A
ENET_MDI_R_N<1>
ENET_MDI_R_N<1> - @m38a_lib.M38A
ENET_MDI_R_N<2>
ENET_MDI_R_N<2> - @m38a_lib.M38A
ENET_MDI_R_N<3>
ENET_MDI_R_N<3> - @m38a_lib.M38A
ENET_MDI_R_P<0>
ENET_MDI_R_P<0> - @m38a_lib.M38A
ENET_MDI_R_P<1>
ENET_MDI_R_P<1> - @m38a_lib.M38A
ENET_MDI_R_P<2>
ENET_MDI_R_P<2> - @m38a_lib.M38A
ENET_MDI_R_P<3>
ENET_MDI_R_P<3> - @m38a_lib.M38A
ENET_PU_VDDO_TTL0
ENET_PU_VDDO_TTL0 - @m38a_lib.M38A
ENET_PU_VDDO_TTL1
ENET_PU_VDDO_TTL1 - @m38a_lib.M38A
ENET_RSET
ENET_RSET - @m38a_lib.M38A
ENET_VPD_CLK
ENET_VPD_CLK - @m38a_lib.M38A
ENET_VPD_DATA
ENET_VPD_DATA - @m38a_lib.M38A
ENET_XTALI
ENET_XTALI - @m38a_lib.M38A
ENET_XTALO
ENET_XTALO - @m38a_lib.M38A
F0_GATESLOWDN
F0_GATESLOWDN - @m38a_lib.M38A
F0_RCFEEDBK
F0_RCFEEDBK - @m38a_lib.M38A
F0_VOLTAGE8R5
F0_VOLTAGE8R5 - @m38a_lib.M38A
F1_GATESLOWDN
F1_GATESLOWDN - @m38a_lib.M38A
F1_RCFEEDBK
F1_RCFEEDBK - @m38a_lib.M38A
F1_VOLTAGE8R5
F1_VOLTAGE8R5 - @m38a_lib.M38A
F2_GATESLOWDN
F2_GATESLOWDN - @m38a_lib.M38A
F2_RCFEEDBK
F2_RCFEEDBK - @m38a_lib.M38A
F2_VOLTAGE8R5
F2_VOLTAGE8R5 - @m38a_lib.M38A
FAN_0_OUT
FAN_0_OUT - @m38a_lib.M38A
FAN_0_PWR
FAN_0_PWR - @m38a_lib.M38A
FAN_1_OUT
FAN_1_OUT - @m38a_lib.M38A
FAN_1_PWR
FAN_1_PWR - @m38a_lib.M38A
FAN_2_OUT
FAN_2_OUT - @m38a_lib.M38A
FAN_2_PWR
FAN_2_PWR - @m38a_lib.M38A
FAN_TACH0
FAN_TACH0 - @m38a_lib.M38A
FAN_TACH1
FAN_TACH1 - @m38a_lib.M38A
FAN_TACH2
FAN_TACH2 - @m38a_lib.M38A
FB_A0_MF
FB_A0_MF - @m38a_lib.M38A
FB_A0_SEN
FB_A0_SEN - @m38a_lib.M38A
FB_A0_VREF0
FB_A0_VREF0 - @m38a_lib.M38A
FB_A0_VREF1
FB_A0_VREF1 - @m38a_lib.M38A
FB_A0_ZQ
FB_A0_ZQ - @m38a_lib.M38A
FB_A1_MF
FB_A1_MF - @m38a_lib.M38A
FB_A1_SEN
FB_A1_SEN - @m38a_lib.M38A
FB_A1_VREF0
FB_A1_VREF0 - @m38a_lib.M38A
FB_A1_VREF1
FB_A1_VREF1 - @m38a_lib.M38A
FB_A1_ZQ
FB_A1_ZQ - @m38a_lib.M38A
FB_A_BA<0>
FB_A_BA<0> - @m38a_lib.M38A
FB_A_BA<1>
FB_A_BA<1> - @m38a_lib.M38A
FB_A_BA<2>
FB_A_BA<2> - @m38a_lib.M38A
FB_A_CAS_L<0>
FB_A_CAS_L<0> - @m38a_lib.M38A
FB_A_CAS_L<1>
FB_A_CAS_L<1> - @m38a_lib.M38A
FB_A_CKE<0>
FB_A_CKE<0> - @m38a_lib.M38A
FB_A_CKE<1>
FB_A_CKE<1> - @m38a_lib.M38A
FB_A_CLK_N<0>
FB_A_CLK_N<0> - @m38a_lib.M38A
FB_A_CLK_N<1>
FB_A_CLK_N<1> - @m38a_lib.M38A
FB_A_CLK_P<0>
FB_A_CLK_P<0> - @m38a_lib.M38A
FB_A_CLK_P<1>
FB_A_CLK_P<1> - @m38a_lib.M38A
FB_A_CS_L<0>
FB_A_CS_L<0> - @m38a_lib.M38A
FB_A_CS_L<1>
FB_A_CS_L<1> - @m38a_lib.M38A
FB_A_DQ<0>
FB_A_DQ<0> - @m38a_lib.M38A
FB_A_DQ<1>
FB_A_DQ<1> - @m38a_lib.M38A
FB_A_DQ<2>
FB_A_DQ<2> - @m38a_lib.M38A
FB_A_DQ<3>
FB_A_DQ<3> - @m38a_lib.M38A
FB_A_DQ<4>
FB_A_DQ<4> - @m38a_lib.M38A
FB_A_DQ<5>
FB_A_DQ<5> - @m38a_lib.M38A
FB_A_DQ<6>
FB_A_DQ<6> - @m38a_lib.M38A
FB_A_DQ<7>
FB_A_DQ<7> - @m38a_lib.M38A
FB_A_DQ<8>
FB_A_DQ<8> - @m38a_lib.M38A
FB_A_DQ<9>
FB_A_DQ<9> - @m38a_lib.M38A
FB_A_DQ<10>
FB_A_DQ<10> - @m38a_lib.M38A
FB_A_DQ<11>
FB_A_DQ<11> - @m38a_lib.M38A
FB_A_DQ<12>
FB_A_DQ<12> - @m38a_lib.M38A
FB_A_DQ<13>
FB_A_DQ<13> - @m38a_lib.M38A
FB_A_DQ<14>
FB_A_DQ<14> - @m38a_lib.M38A
FB_A_DQ<15>
FB_A_DQ<15> - @m38a_lib.M38A
FB_A_DQ<16>
FB_A_DQ<16> - @m38a_lib.M38A
FB_A_DQ<17>
FB_A_DQ<17> - @m38a_lib.M38A
FB_A_DQ<18>
FB_A_DQ<18> - @m38a_lib.M38A
FB_A_DQ<19>
FB_A_DQ<19> - @m38a_lib.M38A
FB_A_DQ<20>
FB_A_DQ<20> - @m38a_lib.M38A
FB_A_DQ<21>
FB_A_DQ<21> - @m38a_lib.M38A
33B4 34D8
33B4 53C6
33A4 34D8
33A4 34C6
33C6
33C6
14B6 33B4
5C8 7C7 21C4
7B4 34B8
7B4 34A8
7B4 34A8
7B2
7B2
7B2
7B2
76D7
76C7
7B3 21C4 75C6
7B3 21C4
7C7 21C2
5D4 7B4
9D4
9D3 66A4 66A6 66B4 66B6
9D3
9D2
5C8 7C7 21C4
5C8 7D6 21C4
5C8 7C7 21C4
5C8 7C7 21C4
7C6 59A8 59C7
7A3 75C6
7B3 21C4
21C4
76D7
5C8 7C7 21C4
5C8 7C7 21C4
7B4
7B4
10B6
10B6
7C6 10C6
7C6 10C6
21C2
8B6 75A4
8B6 75A4
8B7 75C7
8B7 75C7
8B7 75C7
8B7 75C7
8B7 75C7
8B7 75C7
8B7 75D7
11B3 34B3
34B4 34C2
11B3 34B3
34B4 34C2
23B6 23C3
13B5 19D4
6D4 16C8 16D3 19B6 19D5
19D7
13B5 19D4
13B5 19D4
13B5 19D4
13B5 19D4
17D6 19D4
13B5 19D4
13B5 19D4
6D6 34A8 34B8 34C7 81C2
5D4 6D4 7B5 7B7 7D5 7D5
8C7 9C8 9C8 11B3 11C5
6D4 24D3 25D3
6D4 21C1 21C1 24C3 25C3
6D4 17D3 19B8 19D7
5D4 6D4 12A7 12B7 12C2
19D7
17D6 19D4
6D6 34A8 34B8 34C7 81C2
13B5 19D4
13B5 19D4
13B5 19D4
13B5 19D4
13B5 19D4
13B5 19D4
6D4 24D3 25D3
6D4 16C8 16D3 19B6 19D5
19D7
6D4 21C1 21C1 24C3 25C3
6D4 17D3 19B8 19D7
6D4 19D7
5D4 6D4 12A7 12B7 12C2
19D7
5D4 6D4 7B5 7B7 7D5 7D5
8C7 9C8 9C8 11B3 11C5
13B5 19C4
19C5
13B5 19C4
19C5
6B7 60C4
22C2
5B8 14B4 22D2
14B4 22D2
14B4 22D2
14B4 22D2
5B8 14B4 22D2
14B4 22D2
14B4 22D2
14B4 22D2
5C7 14B4 22D2
14B4 22D2
14B4 22D2
14B4 22D2
5C7 14B4 22D2
14B4 22D2
14B4 22D2
14B4 22D2
97D2
97D3 97D5
97C2
97C3 97D5
97C3 97D5
41D2
41D2
41B2
41B2
5D5 34A4 34B2 41C5
5D5 34A4 34B2 41C5
41C7 42B8
42B7
41C7 42C6
41C5 42D2
6B7 42D3
41C8
41C8
41C8
41C8
41C7
41C2 43C7
41C2 43C7
41C2 43C7
41C2 43B7
41C2 43C7
41C2 43C7
41C2 43C7
41C2 43C7
5B4 43C6
5B4 43C6
5B4 43C6
5B4 43B6
5B4 43C6
5B4 43C6
5B4 43C6
5B4 43C6
41C5
41C5
41C7
41A2 41C4
41A2 41C4
41B5
41B5
65D5
65C5
65D6
65B5
65B5
65B6
66D4
66C5
66D5
65C4
65C4
65B4
65B3
66C4
66C3
65C7
65A7
66C7
89A7
89A7
89C7
89C7
89A7
89A4
89A4
89C4
89C4
89A4
87D5 89A5 89A8
87D5 89A5 89A8
87D5 89A5 89A8
5B6 87B5 89A8
5A6 87B5 89A5
5B6 87B5 89B8
5A6 87B5 89B5
5B6 87B5 89B8
5A6 87B5 89B5
5B6 87B5 89B8
5A6 87B5 89B5
5B6 87B5 89B8
5A6 87B5 89B5
5B6 5D6 87D7 89B6
87D7 89B6
87D7 89B6
87D7 89B6
87D7 89B6
87D7 89B6
87D7 89B6
87D7 89B6
5A6 5D6 87D7 89A6
87D7 89A6
87D7 89A6
87D7 89A6
87D7 89A6
87D7 89A6
87D7 89A6
87D7 89A6
5A6 5D6 87D7 89A6
87D7 89A6
87C7 89A6
87C7 89A6
87C7 89A6
87C7 89A6
FB_A_DQ<22>
FB_A_DQ<23>
FB_A_DQ<24>
FB_A_DQ<25>
FB_A_DQ<26>
FB_A_DQ<27>
FB_A_DQ<28>
FB_A_DQ<29>
FB_A_DQ<30>
FB_A_DQ<31>
FB_A_DQ<32>
FB_A_DQ<33>
FB_A_DQ<34>
FB_A_DQ<35>
FB_A_DQ<36>
FB_A_DQ<37>
FB_A_DQ<38>
FB_A_DQ<39>
FB_A_DQ<40>
FB_A_DQ<41>
FB_A_DQ<42>
FB_A_DQ<43>
FB_A_DQ<44>
FB_A_DQ<45>
FB_A_DQ<46>
FB_A_DQ<47>
FB_A_DQ<48>
FB_A_DQ<49>
FB_A_DQ<50>
FB_A_DQ<51>
FB_A_DQ<52>
FB_A_DQ<53>
FB_A_DQ<54>
FB_A_DQ<55>
FB_A_DQ<56>
FB_A_DQ<57>
FB_A_DQ<58>
FB_A_DQ<59>
FB_A_DQ<60>
FB_A_DQ<61>
FB_A_DQ<62>
FB_A_DQ<63>
FB_A_DQM_L<0>
FB_A_DQM_L<1>
FB_A_DQM_L<2>
FB_A_DQM_L<3>
FB_A_DQM_L<4>
FB_A_DQM_L<5>
FB_A_DQM_L<6>
FB_A_DQM_L<7>
FB_A_MA<0>
FB_A_MA<1>
FB_A_MA<2>
FB_A_MA<3>
FB_A_DQ<22> - @m38a_lib.M38A
FB_A_DQ<23> - @m38a_lib.M38A
FB_A_DQ<24> - @m38a_lib.M38A
FB_A_DQ<25> - @m38a_lib.M38A
FB_A_DQ<26> - @m38a_lib.M38A
FB_A_DQ<27> - @m38a_lib.M38A
FB_A_DQ<28> - @m38a_lib.M38A
FB_A_DQ<29> - @m38a_lib.M38A
FB_A_DQ<30> - @m38a_lib.M38A
FB_A_DQ<31> - @m38a_lib.M38A
FB_A_DQ<32> - @m38a_lib.M38A
FB_A_DQ<33> - @m38a_lib.M38A
FB_A_DQ<34> - @m38a_lib.M38A
FB_A_DQ<35> - @m38a_lib.M38A
FB_A_DQ<36> - @m38a_lib.M38A
FB_A_DQ<37> - @m38a_lib.M38A
FB_A_DQ<38> - @m38a_lib.M38A
FB_A_DQ<39> - @m38a_lib.M38A
FB_A_DQ<40> - @m38a_lib.M38A
FB_A_DQ<41> - @m38a_lib.M38A
FB_A_DQ<42> - @m38a_lib.M38A
FB_A_DQ<43> - @m38a_lib.M38A
FB_A_DQ<44> - @m38a_lib.M38A
FB_A_DQ<45> - @m38a_lib.M38A
FB_A_DQ<46> - @m38a_lib.M38A
FB_A_DQ<47> - @m38a_lib.M38A
FB_A_DQ<48> - @m38a_lib.M38A
FB_A_DQ<49> - @m38a_lib.M38A
FB_A_DQ<50> - @m38a_lib.M38A
FB_A_DQ<51> - @m38a_lib.M38A
FB_A_DQ<52> - @m38a_lib.M38A
FB_A_DQ<53> - @m38a_lib.M38A
FB_A_DQ<54> - @m38a_lib.M38A
FB_A_DQ<55> - @m38a_lib.M38A
FB_A_DQ<56> - @m38a_lib.M38A
FB_A_DQ<57> - @m38a_lib.M38A
FB_A_DQ<58> - @m38a_lib.M38A
FB_A_DQ<59> - @m38a_lib.M38A
FB_A_DQ<60> - @m38a_lib.M38A
FB_A_DQ<61> - @m38a_lib.M38A
FB_A_DQ<62> - @m38a_lib.M38A
FB_A_DQ<63> - @m38a_lib.M38A
FB_A_DQM_L<0> - @m38a_lib.M38A
FB_A_DQM_L<1> - @m38a_lib.M38A
FB_A_DQM_L<2> - @m38a_lib.M38A
FB_A_DQM_L<3> - @m38a_lib.M38A
FB_A_DQM_L<4> - @m38a_lib.M38A
FB_A_DQM_L<5> - @m38a_lib.M38A
FB_A_DQM_L<6> - @m38a_lib.M38A
FB_A_DQM_L<7> - @m38a_lib.M38A
FB_A_MA<0> - @m38a_lib.M38A
FB_A_MA<1> - @m38a_lib.M38A
FB_A_MA<2> - @m38a_lib.M38A
FB_A_MA<3> - @m38a_lib.M38A
FB_A_MA<4>
FB_A_MA<5>
FB_A_MA<6>
FB_A_MA<7>
FB_A_MA<8>
FB_A_MA<9>
FB_A_MA<10>
FB_A_MA<11>
FB_A_RAS_L<0>
FB_A_RAS_L<1>
FB_A_RDQS<0>
FB_A_RDQS<1>
FB_A_RDQS<2>
FB_A_RDQS<3>
FB_A_RDQS<4>
FB_A_RDQS<5>
FB_A_RDQS<6>
FB_A_RDQS<7>
FB_A_WDQS<0>
FB_A_WDQS<1>
FB_A_WDQS<2>
FB_A_WDQS<3>
FB_A_WDQS<4>
FB_A_WDQS<5>
FB_A_WDQS<6>
FB_A_WDQS<7>
FB_A_WE_L<0>
FB_A_WE_L<1>
FB_B0_MF
FB_B0_SEN
FB_B0_VREF0
FB_B0_VREF1
FB_B0_ZQ
FB_B1_MF
FB_B1_SEN
FB_B1_VREF0
FB_B1_VREF1
FB_B1_ZQ
FB_B_BA<0>
FB_B_BA<1>
FB_B_BA<2>
FB_B_CAS_L<0>
FB_B_CAS_L<1>
FB_B_CKE<0>
FB_B_CKE<1>
FB_B_CLK_N<0>
FB_B_CLK_N<1>
FB_B_CLK_P<0>
FB_B_CLK_P<1>
FB_B_CS_L<0>
FB_B_CS_L<1>
FB_B_DQ<0>
FB_B_DQ<1>
FB_B_DQ<2>
FB_B_DQ<3>
FB_B_DQ<4>
FB_B_DQ<5>
FB_B_DQ<6>
FB_B_DQ<7>
FB_B_DQ<8>
FB_B_DQ<9>
FB_B_DQ<10>
FB_B_DQ<11>
FB_B_DQ<12>
FB_B_DQ<13>
FB_B_DQ<14>
FB_B_DQ<15>
FB_B_DQ<16>
FB_B_DQ<17>
FB_A_MA<4> - @m38a_lib.M38A
FB_A_MA<5> - @m38a_lib.M38A
FB_A_MA<6> - @m38a_lib.M38A
FB_A_MA<7> - @m38a_lib.M38A
FB_A_MA<8> - @m38a_lib.M38A
FB_A_MA<9> - @m38a_lib.M38A
FB_A_MA<10> - @m38a_lib.M38A
FB_A_MA<11> - @m38a_lib.M38A
FB_A_RAS_L<0> - @m38a_lib.M38A
FB_A_RAS_L<1> - @m38a_lib.M38A
FB_A_RDQS<0> - @m38a_lib.M38A
FB_A_RDQS<1> - @m38a_lib.M38A
FB_A_RDQS<2> - @m38a_lib.M38A
FB_A_RDQS<3> - @m38a_lib.M38A
FB_A_RDQS<4> - @m38a_lib.M38A
FB_A_RDQS<5> - @m38a_lib.M38A
FB_A_RDQS<6> - @m38a_lib.M38A
FB_A_RDQS<7> - @m38a_lib.M38A
FB_A_WDQS<0> - @m38a_lib.M38A
FB_A_WDQS<1> - @m38a_lib.M38A
FB_A_WDQS<2> - @m38a_lib.M38A
FB_A_WDQS<3> - @m38a_lib.M38A
FB_A_WDQS<4> - @m38a_lib.M38A
FB_A_WDQS<5> - @m38a_lib.M38A
FB_A_WDQS<6> - @m38a_lib.M38A
FB_A_WDQS<7> - @m38a_lib.M38A
FB_A_WE_L<0> - @m38a_lib.M38A
FB_A_WE_L<1> - @m38a_lib.M38A
FB_B0_MF - @m38a_lib.M38A
FB_B0_SEN - @m38a_lib.M38A
FB_B0_VREF0 - @m38a_lib.M38A
FB_B0_VREF1 - @m38a_lib.M38A
FB_B0_ZQ - @m38a_lib.M38A
FB_B1_MF - @m38a_lib.M38A
FB_B1_SEN - @m38a_lib.M38A
FB_B1_VREF0 - @m38a_lib.M38A
FB_B1_VREF1 - @m38a_lib.M38A
FB_B1_ZQ - @m38a_lib.M38A
FB_B_BA<0> - @m38a_lib.M38A
FB_B_BA<1> - @m38a_lib.M38A
FB_B_BA<2> - @m38a_lib.M38A
FB_B_CAS_L<0> - @m38a_lib.M38A
FB_B_CAS_L<1> - @m38a_lib.M38A
FB_B_CKE<0> - @m38a_lib.M38A
FB_B_CKE<1> - @m38a_lib.M38A
FB_B_CLK_N<0> - @m38a_lib.M38A
FB_B_CLK_N<1> - @m38a_lib.M38A
FB_B_CLK_P<0> - @m38a_lib.M38A
FB_B_CLK_P<1> - @m38a_lib.M38A
FB_B_CS_L<0> - @m38a_lib.M38A
FB_B_CS_L<1> - @m38a_lib.M38A
FB_B_DQ<0> - @m38a_lib.M38A
FB_B_DQ<1> - @m38a_lib.M38A
FB_B_DQ<2> - @m38a_lib.M38A
FB_B_DQ<3> - @m38a_lib.M38A
FB_B_DQ<4> - @m38a_lib.M38A
FB_B_DQ<5> - @m38a_lib.M38A
FB_B_DQ<6> - @m38a_lib.M38A
FB_B_DQ<7> - @m38a_lib.M38A
FB_B_DQ<8> - @m38a_lib.M38A
FB_B_DQ<9> - @m38a_lib.M38A
FB_B_DQ<10> - @m38a_lib.M38A
FB_B_DQ<11> - @m38a_lib.M38A
FB_B_DQ<12> - @m38a_lib.M38A
FB_B_DQ<13> - @m38a_lib.M38A
FB_B_DQ<14> - @m38a_lib.M38A
FB_B_DQ<15> - @m38a_lib.M38A
FB_B_DQ<16> - @m38a_lib.M38A
FB_B_DQ<17> - @m38a_lib.M38A
87C7 89A6
87C7 89A6
5A6 5D6 87C7 89A6
87C7 89A6
87C7 89A6
87C7 89B6
87C7 89B6
87C7 89B6
87C7 89B6
87C7 89A6
5A6 5D6 87C7 89B2
87C7 89B3
87C7 89B3
87C7 89B3
87C7 89B3
87C7 89B3
87C7 89B3
87C7 89B3
5A6 5D6 87C7 89A2
87C7 89A3
87C7 89A3
87C7 89A3
87B7 89A3
87B7 89A3
87B7 89A3
87B7 89A3
5A6 5D6 87B7 89A2
87B7 89A3
87B7 89A3
87B7 89A3
87B7 89A3
87B7 89A3
87B7 89A3
87B7 89A3
5A6 5D6 87B7 89A2
87B7 89A3
87B7 89B3
87B7 89B3
87B7 89B3
87B7 89B3
87B7 89A3
87B7 89A3
87D5 89B6
87C5 89B6
87C5 89B6
87C5 89B6
87C5 89B3
87C5 89B3
87C5 89B3
87C5 89B3
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
5A6 5B6 5D6 87D5 89B5
89B8
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
87D5 89B5 89B8
5B6 87B5 89A8
5A6 87B5 89A5
5D6 87C5 89A8
5D6 87C5 89A8
5D6 87C5 89A8
5D6 87C5 89A8
5D6 87C5 89A5
5D6 87C5 89A5
5D6 87C5 89A5
5D6 87C5 89A5
5B6 87C5 89A8
5B6 87C5 89A8
5B6 87C5 89A8
5B6 87C5 89A8
5A6 87C5 89A5
5A6 87C5 89A5
5A6 87C5 89A5
5A6 87C5 89A5
5B6 87B5 89A8
5A6 87B5 89A5
90A7
90A7
90C7
90C7
90A7
90A4
90A4
90C4
90C4
90A4
87D1 90A5 90A8
87D1 90A5 90A8
87D1 90A5 90A8
5B5 87B1 90A8
5A5 87B1 90A5
5B5 87B1 90B8
5A5 87B1 90B5
5B5 87B1 90B8
5A5 87B1 90B5
5B5 87B1 90B8
5A5 87B1 90B5
5B5 87B1 90B8
5A5 87B1 90B5
5B5 5D6 87D3 90B6
87D3 90B6
87D3 90B6
87D3 90B6
87D3 90B6
87D3 90B6
87D3 90B6
87D3 90B6
5A5 5D6 87D3 90A6
87D3 90A6
87D3 90A6
87D3 90A6
87D3 90A6
87D3 90A6
87D3 90A6
87D3 90A6
5A5 5D6 87D3 90A6
87D3 90A6
101
FB_B_DQ<18>
FB_B_DQ<19>
FB_B_DQ<20>
FB_B_DQ<21>
FB_B_DQ<22>
FB_B_DQ<23>
FB_B_DQ<24>
FB_B_DQ<25>
FB_B_DQ<26>
FB_B_DQ<27>
FB_B_DQ<28>
FB_B_DQ<29>
FB_B_DQ<30>
FB_B_DQ<31>
FB_B_DQ<32>
FB_B_DQ<33>
FB_B_DQ<34>
FB_B_DQ<35>
FB_B_DQ<36>
FB_B_DQ<37>
FB_B_DQ<38>
FB_B_DQ<39>
FB_B_DQ<40>
FB_B_DQ<41>
FB_B_DQ<42>
FB_B_DQ<43>
FB_B_DQ<44>
FB_B_DQ<45>
FB_B_DQ<46>
FB_B_DQ<47>
FB_B_DQ<48>
FB_B_DQ<49>
FB_B_DQ<50>
FB_B_DQ<51>
FB_B_DQ<52>
FB_B_DQ<53>
FB_B_DQ<54>
FB_B_DQ<55>
FB_B_DQ<56>
FB_B_DQ<57>
FB_B_DQ<58>
FB_B_DQ<59>
FB_B_DQ<60>
FB_B_DQ<61>
FB_B_DQ<62>
FB_B_DQ<63>
FB_B_DQM_L<0>
FB_B_DQM_L<1>
FB_B_DQM_L<2>
FB_B_DQM_L<3>
FB_B_DQM_L<4>
FB_B_DQM_L<5>
FB_B_DQM_L<6>
FB_B_DQM_L<7>
FB_B_MA<0>
FB_B_MA<1>
FB_B_MA<2>
FB_B_MA<3>
FB_B_DQ<18> - @m38a_lib.M38A
FB_B_DQ<19> - @m38a_lib.M38A
FB_B_DQ<20> - @m38a_lib.M38A
FB_B_DQ<21> - @m38a_lib.M38A
FB_B_DQ<22> - @m38a_lib.M38A
FB_B_DQ<23> - @m38a_lib.M38A
FB_B_DQ<24> - @m38a_lib.M38A
FB_B_DQ<25> - @m38a_lib.M38A
FB_B_DQ<26> - @m38a_lib.M38A
FB_B_DQ<27> - @m38a_lib.M38A
FB_B_DQ<28> - @m38a_lib.M38A
FB_B_DQ<29> - @m38a_lib.M38A
FB_B_DQ<30> - @m38a_lib.M38A
FB_B_DQ<31> - @m38a_lib.M38A
FB_B_DQ<32> - @m38a_lib.M38A
FB_B_DQ<33> - @m38a_lib.M38A
FB_B_DQ<34> - @m38a_lib.M38A
FB_B_DQ<35> - @m38a_lib.M38A
FB_B_DQ<36> - @m38a_lib.M38A
FB_B_DQ<37> - @m38a_lib.M38A
FB_B_DQ<38> - @m38a_lib.M38A
FB_B_DQ<39> - @m38a_lib.M38A
FB_B_DQ<40> - @m38a_lib.M38A
FB_B_DQ<41> - @m38a_lib.M38A
FB_B_DQ<42> - @m38a_lib.M38A
FB_B_DQ<43> - @m38a_lib.M38A
FB_B_DQ<44> - @m38a_lib.M38A
FB_B_DQ<45> - @m38a_lib.M38A
FB_B_DQ<46> - @m38a_lib.M38A
FB_B_DQ<47> - @m38a_lib.M38A
FB_B_DQ<48> - @m38a_lib.M38A
FB_B_DQ<49> - @m38a_lib.M38A
FB_B_DQ<50> - @m38a_lib.M38A
FB_B_DQ<51> - @m38a_lib.M38A
FB_B_DQ<52> - @m38a_lib.M38A
FB_B_DQ<53> - @m38a_lib.M38A
FB_B_DQ<54> - @m38a_lib.M38A
FB_B_DQ<55> - @m38a_lib.M38A
FB_B_DQ<56> - @m38a_lib.M38A
FB_B_DQ<57> - @m38a_lib.M38A
FB_B_DQ<58> - @m38a_lib.M38A
FB_B_DQ<59> - @m38a_lib.M38A
FB_B_DQ<60> - @m38a_lib.M38A
FB_B_DQ<61> - @m38a_lib.M38A
FB_B_DQ<62> - @m38a_lib.M38A
FB_B_DQ<63> - @m38a_lib.M38A
FB_B_DQM_L<0> - @m38a_lib.M38A
FB_B_DQM_L<1> - @m38a_lib.M38A
FB_B_DQM_L<2> - @m38a_lib.M38A
FB_B_DQM_L<3> - @m38a_lib.M38A
FB_B_DQM_L<4> - @m38a_lib.M38A
FB_B_DQM_L<5> - @m38a_lib.M38A
FB_B_DQM_L<6> - @m38a_lib.M38A
FB_B_DQM_L<7> - @m38a_lib.M38A
FB_B_MA<0> - @m38a_lib.M38A
FB_B_MA<1> - @m38a_lib.M38A
FB_B_MA<2> - @m38a_lib.M38A
FB_B_MA<3> - @m38a_lib.M38A
FB_B_MA<4>
FB_B_MA<5>
FB_B_MA<6>
FB_B_MA<7>
FB_B_MA<8>
FB_B_MA<9>
FB_B_MA<10>
FB_B_MA<11>
FB_B_RAS_L<0>
FB_B_RAS_L<1>
FB_B_RDQS<0>
FB_B_RDQS<1>
FB_B_RDQS<2>
FB_B_RDQS<3>
FB_B_RDQS<4>
FB_B_RDQS<5>
FB_B_RDQS<6>
FB_B_RDQS<7>
FB_B_WDQS<0>
FB_B_WDQS<1>
FB_B_WDQS<2>
FB_B_WDQS<3>
FB_B_WDQS<4>
FB_B_WDQS<5>
FB_B_WDQS<6>
FB_B_WDQS<7>
FB_B_WE_L<0>
FB_B_WE_L<1>
FB_DRAM_RST
FB_B_MA<4> - @m38a_lib.M38A
FB_B_MA<5> - @m38a_lib.M38A
FB_B_MA<6> - @m38a_lib.M38A
FB_B_MA<7> - @m38a_lib.M38A
FB_B_MA<8> - @m38a_lib.M38A
FB_B_MA<9> - @m38a_lib.M38A
FB_B_MA<10> - @m38a_lib.M38A
FB_B_MA<11> - @m38a_lib.M38A
FB_B_RAS_L<0> - @m38a_lib.M38A
FB_B_RAS_L<1> - @m38a_lib.M38A
FB_B_RDQS<0> - @m38a_lib.M38A
FB_B_RDQS<1> - @m38a_lib.M38A
FB_B_RDQS<2> - @m38a_lib.M38A
FB_B_RDQS<3> - @m38a_lib.M38A
FB_B_RDQS<4> - @m38a_lib.M38A
FB_B_RDQS<5> - @m38a_lib.M38A
FB_B_RDQS<6> - @m38a_lib.M38A
FB_B_RDQS<7> - @m38a_lib.M38A
FB_B_WDQS<0> - @m38a_lib.M38A
FB_B_WDQS<1> - @m38a_lib.M38A
FB_B_WDQS<2> - @m38a_lib.M38A
FB_B_WDQS<3> - @m38a_lib.M38A
FB_B_WDQS<4> - @m38a_lib.M38A
FB_B_WDQS<5> - @m38a_lib.M38A
FB_B_WDQS<6> - @m38a_lib.M38A
FB_B_WDQS<7> - @m38a_lib.M38A
FB_B_WE_L<0> - @m38a_lib.M38A
FB_B_WE_L<1> - @m38a_lib.M38A
FB_DRAM_RST - @m38a_lib.M38A
DRAM_RST - @m38a_lib.M38A
FSB_ADSTB_L<0>
FSB_ADSTB_L<1>
FSB_ADS_L
FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_BNR_L
FSB_BPRI_L
FSB_ADSTB_L<0> - @m38a_lib.M38A
FSB_ADSTB_L<1> - @m38a_lib.M38A
FSB_ADS_L - @m38a_lib.M38A
FSB_A_L<3> - @m38a_lib.M38A
FSB_A_L<4> - @m38a_lib.M38A
FSB_A_L<5> - @m38a_lib.M38A
FSB_A_L<6> - @m38a_lib.M38A
FSB_A_L<7> - @m38a_lib.M38A
FSB_A_L<8> - @m38a_lib.M38A
FSB_A_L<9> - @m38a_lib.M38A
FSB_A_L<10> - @m38a_lib.M38A
FSB_A_L<11> - @m38a_lib.M38A
FSB_A_L<12> - @m38a_lib.M38A
FSB_A_L<13> - @m38a_lib.M38A
FSB_A_L<14> - @m38a_lib.M38A
FSB_A_L<15> - @m38a_lib.M38A
FSB_A_L<16> - @m38a_lib.M38A
FSB_A_L<17> - @m38a_lib.M38A
FSB_A_L<18> - @m38a_lib.M38A
FSB_A_L<19> - @m38a_lib.M38A
FSB_A_L<20> - @m38a_lib.M38A
FSB_A_L<21> - @m38a_lib.M38A
FSB_A_L<22> - @m38a_lib.M38A
FSB_A_L<23> - @m38a_lib.M38A
FSB_A_L<24> - @m38a_lib.M38A
FSB_A_L<25> - @m38a_lib.M38A
FSB_A_L<26> - @m38a_lib.M38A
FSB_A_L<27> - @m38a_lib.M38A
FSB_A_L<28> - @m38a_lib.M38A
FSB_A_L<29> - @m38a_lib.M38A
FSB_A_L<30> - @m38a_lib.M38A
FSB_A_L<31> - @m38a_lib.M38A
FSB_BNR_L - @m38a_lib.M38A
FSB_BPRI_L - @m38a_lib.M38A
87C3 90A6
87C3 90A6
87C3 90A6
87C3 90A6
87C3 90A6
87C3 90A6
5A5 5C6 87C3 90A6
87C3 90A6
87C3 90A6
87C3 90B6
87C3 90B6
87C3 90B6
87C3 90B6
87C3 90A6
5A5 5C6 87C3 90B2
87C3 90B3
87C3 90B3
87C3 90B3
87C3 90B3
87C3 90B3
87C3 90B3
87C3 90B3
5A5 5C6 87C3 90A2
87C3 90A3
87C3 90A3
87C3 90A3
87B3 90A3
87B3 90A3
87B3 90A3
87B3 90A3
5A5 5C6 87B3 90A2
87B3 90A3
87B3 90A3
87B3 90A3
87B3 90A3
87B3 90A3
87B3 90A3
87B3 90A3
5A5 5C6 87B3 90A2
87B3 90A3
87B3 90B3
87B3 90B3
87B3 90B3
87B3 90B3
87B3 90A3
87B3 90A3
87D1 90B6
87C1 90B6
87C1 90B6
87C1 90B6
87C1 90B3
87C1 90B3
87C1 90B3
87C1 90B3
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
5A5 5B5 5C6 87D1 90B5
90B8
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
87D1 90B5 90B8
5B5 87B1 90A8
5A5 87B1 90A5
5C6 87C1 90A8
5C6 87C1 90A8
5C6 87C1 90A8
5C6 87C1 90A8
5C6 87C1 90A5
5C6 87C1 90A5
5C6 87C1 90A5
5C6 87C1 90A5
5B5 87C1 90A8
5B5 87C1 90A8
5B5 87C1 90A8
5B5 87C1 90A8
5A5 87C1 90A5
5A5 87C1 90A5
5A5 87C1 90A5
5A5 87C1 90A5
5B5 87B1 90A8
5A5 87B1 90A5
87A1 88A8
5A5 5A6 5B5 5B6 88A6 89A5
89A8 90A5 90A8
5D7 5D8 7D7 12C4
5D7 5D8 7C7 12C4
7D6 12C4
7D7 12D4
7D7 12D4
7D7 12D4
5D7 5D8 7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12D4
7D7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
5D7 5D8 7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
7C7 12C4
5C7 7D6 12C4
7D6 12C4
FSB_BREQ0_L
FSB_CLK_CPU_N
FSB_CLK_CPU_P
FSB_CLK_NB_N
FSB_CLK_NB_P
FSB_CPURST_L
FSB_DBSY_L
FSB_DEFER_L
FSB_DINV_L<0>
FSB_DINV_L<1>
FSB_DINV_L<2>
FSB_DINV_L<3>
FSB_DPWR_L
FSB_DRDY_L
FSB_DSTBN_L<0>
FSB_DSTBN_L<1>
FSB_DSTBN_L<2>
FSB_DSTBN_L<3>
FSB_DSTBP_L<0>
FSB_DSTBP_L<1>
FSB_DSTBP_L<2>
FSB_DSTBP_L<3>
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
FSB_HITM_L
FSB_HIT_L
FSB_IERR_L
FSB_LOCK_L
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
FSB_RS_L<0>
FSB_RS_L<1>
FSB_RS_L<2>
FSB_SLPCPU_L
FSB_TRDY_L
FWH_INIT_L
FWH_MFG_MODE
FW_A_TPA_N
FW_A_TPA_P
FW_A_TPBIAS
FW_A_TPB_N
FW_A_TPB_P
FW_B_TPA_N
FW_B_TPA_P
FW_B_TPBIAS
FW_B_TPB_N
FW_B_TPB_P
FW_CARDBUS_L
FW_CONTENDER
FW_CPS
FSB_BREQ0_L - @m38a_lib.M38A
FSB_CLK_CPU_N - @m38a_lib.M38A
FSB_CLK_CPU_P - @m38a_lib.M38A
FSB_CLK_NB_N - @m38a_lib.M38A
FSB_CLK_NB_P - @m38a_lib.M38A
FSB_CPURST_L - @m38a_lib.M38A
FSB_DBSY_L - @m38a_lib.M38A
FSB_DEFER_L - @m38a_lib.M38A
FSB_DINV_L<0> - @m38a_lib.M38A
FSB_DINV_L<1> - @m38a_lib.M38A
FSB_DINV_L<2> - @m38a_lib.M38A
FSB_DINV_L<3> - @m38a_lib.M38A
FSB_DPWR_L - @m38a_lib.M38A
FSB_DRDY_L - @m38a_lib.M38A
FSB_DSTBN_L<0> - @m38a_lib.M38A
FSB_DSTBN_L<1> - @m38a_lib.M38A
FSB_DSTBN_L<2> - @m38a_lib.M38A
FSB_DSTBN_L<3> - @m38a_lib.M38A
FSB_DSTBP_L<0> - @m38a_lib.M38A
FSB_DSTBP_L<1> - @m38a_lib.M38A
FSB_DSTBP_L<2> - @m38a_lib.M38A
FSB_DSTBP_L<3> - @m38a_lib.M38A
FSB_D_L<0> - @m38a_lib.M38A
FSB_D_L<1> - @m38a_lib.M38A
FSB_D_L<2> - @m38a_lib.M38A
FSB_D_L<3> - @m38a_lib.M38A
FSB_D_L<4> - @m38a_lib.M38A
FSB_D_L<5> - @m38a_lib.M38A
FSB_D_L<6> - @m38a_lib.M38A
FSB_D_L<7> - @m38a_lib.M38A
FSB_D_L<8> - @m38a_lib.M38A
FSB_D_L<9> - @m38a_lib.M38A
FSB_D_L<10> - @m38a_lib.M38A
FSB_D_L<11> - @m38a_lib.M38A
FSB_D_L<12> - @m38a_lib.M38A
FSB_D_L<13> - @m38a_lib.M38A
FSB_D_L<14> - @m38a_lib.M38A
FSB_D_L<15> - @m38a_lib.M38A
FSB_D_L<16> - @m38a_lib.M38A
FSB_D_L<17> - @m38a_lib.M38A
FSB_D_L<18> - @m38a_lib.M38A
FSB_D_L<19> - @m38a_lib.M38A
FSB_D_L<20> - @m38a_lib.M38A
FSB_D_L<21> - @m38a_lib.M38A
FSB_D_L<22> - @m38a_lib.M38A
FSB_D_L<23> - @m38a_lib.M38A
FSB_D_L<24> - @m38a_lib.M38A
FSB_D_L<25> - @m38a_lib.M38A
FSB_D_L<26> - @m38a_lib.M38A
FSB_D_L<27> - @m38a_lib.M38A
FSB_D_L<28> - @m38a_lib.M38A
FSB_D_L<29> - @m38a_lib.M38A
FSB_D_L<30> - @m38a_lib.M38A
FSB_D_L<31> - @m38a_lib.M38A
FSB_D_L<32> - @m38a_lib.M38A
FSB_D_L<33> - @m38a_lib.M38A
FSB_D_L<34> - @m38a_lib.M38A
FSB_D_L<35> - @m38a_lib.M38A
FSB_D_L<36> - @m38a_lib.M38A
FSB_D_L<37> - @m38a_lib.M38A
FSB_D_L<38> - @m38a_lib.M38A
FSB_D_L<39> - @m38a_lib.M38A
FSB_D_L<40> - @m38a_lib.M38A
FSB_D_L<41> - @m38a_lib.M38A
FSB_D_L<42> - @m38a_lib.M38A
FSB_D_L<43> - @m38a_lib.M38A
FSB_D_L<44> - @m38a_lib.M38A
FSB_D_L<45> - @m38a_lib.M38A
FSB_D_L<46> - @m38a_lib.M38A
FSB_D_L<47> - @m38a_lib.M38A
FSB_D_L<48> - @m38a_lib.M38A
FSB_D_L<49> - @m38a_lib.M38A
FSB_D_L<50> - @m38a_lib.M38A
FSB_D_L<51> - @m38a_lib.M38A
FSB_D_L<52> - @m38a_lib.M38A
FSB_D_L<53> - @m38a_lib.M38A
FSB_D_L<54> - @m38a_lib.M38A
FSB_D_L<55> - @m38a_lib.M38A
FSB_D_L<56> - @m38a_lib.M38A
FSB_D_L<57> - @m38a_lib.M38A
FSB_D_L<58> - @m38a_lib.M38A
FSB_D_L<59> - @m38a_lib.M38A
FSB_D_L<60> - @m38a_lib.M38A
FSB_D_L<61> - @m38a_lib.M38A
FSB_D_L<62> - @m38a_lib.M38A
FSB_D_L<63> - @m38a_lib.M38A
FSB_HITM_L - @m38a_lib.M38A
FSB_HIT_L - @m38a_lib.M38A
FSB_IERR_L - @m38a_lib.M38A
FSB_LOCK_L - @m38a_lib.M38A
FSB_REQ_L<0> - @m38a_lib.M38A
FSB_REQ_L<1> - @m38a_lib.M38A
FSB_REQ_L<2> - @m38a_lib.M38A
FSB_REQ_L<3> - @m38a_lib.M38A
FSB_REQ_L<4> - @m38a_lib.M38A
FSB_RS_L<0> - @m38a_lib.M38A
FSB_RS_L<1> - @m38a_lib.M38A
FSB_RS_L<2> - @m38a_lib.M38A
FSB_SLPCPU_L - @m38a_lib.M38A
FSB_TRDY_L - @m38a_lib.M38A
FWH_INIT_L - @m38a_lib.M38A
SMC_CPU_INIT_3_3_L - @m38a_lib.M38A
FWH_MFG_MODE - @m38a_lib.M38A
FW_A_TPA_N - @m38a_lib.M38A
FW_PORT0_TPA_N - @m38a_lib.M38A
FW_A_TPA_P - @m38a_lib.M38A
FW_PORT0_TPA_P - @m38a_lib.M38A
FW_A_TPBIAS - @m38a_lib.M38A
FW_A_TPB_N - @m38a_lib.M38A
FW_PORT0_TPB_N - @m38a_lib.M38A
FW_A_TPB_P - @m38a_lib.M38A
FW_PORT0_TPB_P - @m38a_lib.M38A
FW_B_TPA_N - @m38a_lib.M38A
FW_PORT1_TPA_N - @m38a_lib.M38A
FW_B_TPA_P - @m38a_lib.M38A
FW_PORT1_TPA_P - @m38a_lib.M38A
FW_B_TPBIAS - @m38a_lib.M38A
FW_B_TPB_N - @m38a_lib.M38A
FW_PORT1_TPB_N - @m38a_lib.M38A
FW_B_TPB_P - @m38a_lib.M38A
FW_PORT1_TPB_P - @m38a_lib.M38A
FW_CARDBUS_L - @m38a_lib.M38A
FW_CONTENDER - @m38a_lib.M38A
FW_CPS - @m38a_lib.M38A
FW_C_TPA_N
FW_C_TPA_P
FW_C_TPBIAS
FW_C_TPB_N
FW_C_TPB_P
FW_PC0
FW_PC1
FW_PC2
FW_PORT0_TPA_FL_N
FW_PORT0_TPA_FL_P
FW_PORT0_TPB_FL_N
FW_PORT0_TPB_FL_P
FW_PORT1_TPA_FL_N
FW_PORT1_TPA_FL_P
FW_PORT1_TPB_FL_N
FW_PORT1_TPB_FL_P
FW_R0
FW_R1
FW_RESET_L
FW_ROM_CLK
FW_SE
FW_SM
FW_TEST
FW_TPA_C<0>
FW_TPA_C<1>
FW_VP
FW_XTAL_X0
FW_XTAL_XI
FW_XTAL_XR
GATE_3V3_S3
GATE_5V_S3
GND_AUDIO
GND_AUDIO_CODEC
FW_C_TPA_N - @m38a_lib.M38A
TP_FW_C_TPA_N - @m38a_lib.M38A
FW_C_TPA_P - @m38a_lib.M38A
TP_FW_C_TPA_P - @m38a_lib.M38A
FW_C_TPBIAS - @m38a_lib.M38A
TP_FW_C_TPBIAS - @m38a_lib.M38A
FW_C_TPB_N - @m38a_lib.M38A
TP_FW_C_TPB_N - @m38a_lib.M38A
FW_C_TPB_P - @m38a_lib.M38A
TP_FW_C_TPB_P - @m38a_lib.M38A
FW_PC0 - @m38a_lib.M38A
FW_PC1 - @m38a_lib.M38A
FW_PC2 - @m38a_lib.M38A
FW_PORT0_TPA_FL_N - @m38a_lib.M38A
FW_PORT0_TPA_FL_P - @m38a_lib.M38A
FW_PORT0_TPB_FL_N - @m38a_lib.M38A
FW_PORT0_TPB_FL_P - @m38a_lib.M38A
FW_PORT1_TPA_FL_N - @m38a_lib.M38A
FW_PORT1_TPA_FL_P - @m38a_lib.M38A
FW_PORT1_TPB_FL_N - @m38a_lib.M38A
FW_PORT1_TPB_FL_P - @m38a_lib.M38A
FW_R0 - @m38a_lib.M38A
FW_R1 - @m38a_lib.M38A
FW_RESET_L - @m38a_lib.M38A
FW_ROM_CLK - @m38a_lib.M38A
FW_SE - @m38a_lib.M38A
FW_SM - @m38a_lib.M38A
FW_TEST - @m38a_lib.M38A
FW_TPA_C<0> - @m38a_lib.M38A
FW_TPA_C<1> - @m38a_lib.M38A
FW_VP - @m38a_lib.M38A
FW_XTAL_X0 - @m38a_lib.M38A
FW_XTAL_XI - @m38a_lib.M38A
FW_XTAL_XR - @m38a_lib.M38A
GATE_3V3_S3 - @m38a_lib.M38A
GATE_5V_S3 - @m38a_lib.M38A
GND_AUDIO - @m38a_lib.M38A
GND_AUDIO_CODEC - @m38a_lib.M38A
44C3 46B8
46B7
44C3 46B8
46B7
44C4 46B8
46B7
44C3 46A8
46A7
44C3 46A8
46A7
44B3
44B3
44B3
46C2
46C2
46C2
46C2
46B2
46B2
46B2
46B2
44C4
44C4
44C2 44C3
44B4
44B3
44B3
44B3
46B8
46B7
46D4
44D2 44D3
44D2 44D3
44D2
83B4
83C4
6C2 74D2
68A5 68B7
73A8 73D4
74A7 74B5
74C5 74C6
73A7
GPU_GPIO_8
GPU_GPIO_9
GPU_GPIO_10
GPU_GPIO_11
GPU_GPIO_12
GPU_GPIO_13
GPU_GPIO_14
GPU_GPIO_15
GPU_GPIO_17
68D2
74A2
74B7
74D1
72B8 72C8
74A3 74A5
74C1 74C3
74D5
47C2 73C2
6C2 72B1 74D3
72A6 72B2 72B5 72D2 72D8
74C3
47B2 47D1
6B2 73C7
GPU_GPIO_18
GPU_GPIO_19
GPU_GPIO_20
GPU_GPIO_21
GPU_GPIO_22
GPU_GPIO_23
GPU_GPIO_24
GPU_GPIO_25
GPU_GPIO_26
GPU_GPIO_27
GPU_GPIO_28
GPU_GPIO_29
GPU_GPIO_30
GPU_GPIO_31
GPU_GPIO_32
GPU_GPIO_33
GPU_GPIO_34
GPU_H2SYNC
GPU_HPD
GPU_HSYNC_BUF
GPU_MEMTEST
GPU_MVREFD0
GPU_MVREFD1
GPU_MVREFS0
GPU_MVREFS1
GPU_PCIE_CALI
GPU_PCIE_CALRN
GPU_PCIE_CALRP
GPU_PWM_RST_L
GPU_R2
GPU_TEST_MCLK
GPU_TEST_YCLK
GPU_TV_C
GPU_TV_COMP
6B2
GPU_TV_Y
GPU_V2SYNC
GPU_VARY_BL
GPU_VGA_B
59B2
58B2 58C4 59A3 59B3 76B2
76B6 76C5 85C1
GPUISENS_NEG - @m38a_lib.M38A
85D3
GPUISENS_NTC - @m38a_lib.M38A
85D3
GPUISENS_POS - @m38a_lib.M38A
85D3
GPUISENS_RC - @m38a_lib.M38A
85D3
GPUVCORE_BOOT - @m38a_lib.M38A
85C5
GPUVCORE_COMP - @m38a_lib.M38A
85C7
GPUVCORE_COMP_R - @m38a_lib.M38A
85C7
GPUVCORE_EN - @m38a_lib.M38A
85C8 88A8
GPUVCORE_FB - @m38a_lib.M38A
85C7
GPUVCORE_FCCM - @m38a_lib.M38A
85C7
GPUVCORE_FSET - @m38a_lib.M38A
85C7
GPUVCORE_IOUT - @m38a_lib.M38A
59C5 85D1
SMC_GPU_ISENSE - @m38a_lib.M38A
58D5 59C6
GPUVCORE_ISEN - @m38a_lib.M38A
85C5
GPUVCORE_LG - @m38a_lib.M38A
85C5
GPUVCORE_PGOOD - @m38a_lib.M38A
77A4 85C8
GPUVCORE_PHASE - @m38a_lib.M38A
85C5
GPUVCORE_UG - @m38a_lib.M38A
85C5
GPU_B2 - @m38a_lib.M38A
93B3 97B8
GPU_CLK27M - @m38a_lib.M38A
92C6
GPU_XTALIN - @m38a_lib.M38A
91A5 92C5
GPU_CLK100M_PCIE_N - @m38a_lib.M38A 5C6 34A4 34B2 84A5
GPU_CLK100M_PCIE_P - @m38a_lib.M38A 5C6 34A4 34B2 84A5
GPU_DDC_A_CLK - @m38a_lib.M38A
93A3 97D1
GPU_DDC_A_DATA - @m38a_lib.M38A
93A3 97C1
GPU_DDC_B_CLK - @m38a_lib.M38A
88B1 93A3
TP_GPU_DDC_B_CLK - @m38a_lib.M38A
88B3
GPU_DDC_B_DATA - @m38a_lib.M38A
88B1 93A3
TP_GPU_DDC_B_DATA - @m38a_lib.M38A 88B3
GPU_DDC_C_CLK - @m38a_lib.M38A
93A1 93A3 94A7 94C7
GPU_DDC_C_DATA - @m38a_lib.M38A
93A1 93A3 94A6 94C7
GPU_DIGON - @m38a_lib.M38A
6A7 91C3 94C8
GPU_G2 - @m38a_lib.M38A
93B3 97A8
GPU_GENERICA - @m38a_lib.M38A
91C3 95B4
TP_GPU_GENERICA - @m38a_lib.M38A
95B6
GPU_GENERICB - @m38a_lib.M38A
91C3 95B4
TP_GPU_GENERICB - @m38a_lib.M38A
95B6
GPU_GENERICC - @m38a_lib.M38A
91C3 95B4
TP_GPU_GENERICC - @m38a_lib.M38A
95B6
GPU_GENERICD - @m38a_lib.M38A
91C3
GPU_GPIO_0 - @m38a_lib.M38A
88D5 91D3 94C3
GPU_GPIO_1 - @m38a_lib.M38A
88D5 91D3
GPU_GPIO_2 - @m38a_lib.M38A
88D5 91D3
GPU_GPIO_3 - @m38a_lib.M38A
88D5 91D3
GPU_GPIO_4 - @m38a_lib.M38A
88C5 91D3
GPU_GPIO_5 - @m38a_lib.M38A
88C5 91D3
GPU_GPIO_6 - @m38a_lib.M38A
88C5 91D3
GPU_GPIO_7 - @m38a_lib.M38A
88C3 91D3
GPU_VGA_R
GPU_VGA_VSYNC
GPU_VSYNC_BUF
GPU_XTALOUT
I2C_ALS_SCL
I2C_ALS_SDA
IDE_CSEL_PD
IDE_DASP_L
IDE_DASP_L_DS
IDE_IOCS16_PU
IDE_IRQ14
IDE_PDA<0>
IDE_PDA<1>
IDE_PDA<2>
IDE_PDCS1_L
IDE_PDCS3_L
IDE_PDD<0>
IDE_PDD<1>
IDE_PDD<2>
IDE_PDD<3>
IDE_PDD<4>
IDE_PDD<5>
IDE_PDD<6>
IDE_PDD<7>
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
IDE_PDDACK_L
IDE_PDDREQ
IDE_PDIORDY
IDE_PDIOR_L
IDE_PDIOW_L
IDE_RESET_L
IMVP6_BOOT1
IMVP6_BOOT2
IMVP6_COMP
IMVP6_COMP_RC
IMVP6_DFB
IMVP6_DROOP
IMVP6_FB
IMVP6_FB2
IMVP6_FET_RC1
IMVP6_FET_RC2
IMVP6_ISEN1
IMVP6_ISEN2
IMVP6_LGATE1
IMVP6_LGATE2
IMVP6_NTC
IMVP6_NTC_R
IMVP6_OCSET
IMVP6_PHASE1
IMVP6_PHASE2
IMVP6_RBIAS
IMVP6_RTN
IMVP6_SOFT
TP_GPU_GPIO_7 - @m38a_lib.M38A
GPU_GPIO_8 - @m38a_lib.M38A
GPU_GPIO_9 - @m38a_lib.M38A
GPU_GPIO_10 - @m38a_lib.M38A
NC_GPU_GPIO_10 - @m38a_lib.M38A
GPU_GPIO_11 - @m38a_lib.M38A
GPU_GPIO_12 - @m38a_lib.M38A
GPU_GPIO_13 - @m38a_lib.M38A
GPU_GPIO_14 - @m38a_lib.M38A
TP_GPU_GPIO_14 - @m38a_lib.M38A
GPU_GPIO_15 - @m38a_lib.M38A
GPU_VCORE_LOW - @m38a_lib.M38A
GPU_GPIO_17 - @m38a_lib.M38A
TP_GPU_GPIO_17 - @m38a_lib.M38A
GPU_GPIO_18 - @m38a_lib.M38A
GPU_GPIO_19 - @m38a_lib.M38A
GPU_GPIO_20 - @m38a_lib.M38A
GPU_GPIO_21 - @m38a_lib.M38A
GPU_GPIO_22 - @m38a_lib.M38A
GPU_GPIO_23 - @m38a_lib.M38A
GPU_GPIO_24 - @m38a_lib.M38A
GPU_GPIO_25 - @m38a_lib.M38A
GPU_GPIO_26 - @m38a_lib.M38A
GPU_GPIO_27 - @m38a_lib.M38A
GPU_GPIO_28 - @m38a_lib.M38A
GPU_GPIO_29 - @m38a_lib.M38A
GPU_GPIO_30 - @m38a_lib.M38A
GPU_GPIO_31 - @m38a_lib.M38A
GPU_GPIO_32 - @m38a_lib.M38A
GPU_GPIO_33 - @m38a_lib.M38A
GPU_GPIO_34 - @m38a_lib.M38A
GPU_H2SYNC - @m38a_lib.M38A
GPU_HPD - @m38a_lib.M38A
GPU_HSYNC_BUF - @m38a_lib.M38A
GPU_MEMTEST - @m38a_lib.M38A
GPU_MVREFD0 - @m38a_lib.M38A
GPU_MVREFD1 - @m38a_lib.M38A
GPU_MVREFS0 - @m38a_lib.M38A
GPU_MVREFS1 - @m38a_lib.M38A
GPU_PCIE_CALI - @m38a_lib.M38A
GPU_PCIE_CALRN - @m38a_lib.M38A
GPU_PCIE_CALRP - @m38a_lib.M38A
GPU_PWM_RST_L - @m38a_lib.M38A
GPU_R2 - @m38a_lib.M38A
GPU_TEST_MCLK - @m38a_lib.M38A
GPU_TEST_YCLK - @m38a_lib.M38A
GPU_TV_C - @m38a_lib.M38A
TP_GPU_TV_C - @m38a_lib.M38A
GPU_TV_COMP - @m38a_lib.M38A
TP_GPU_TV_COMP - @m38a_lib.M38A
GPU_TV_Y - @m38a_lib.M38A
TP_GPU_TV_Y - @m38a_lib.M38A
GPU_V2SYNC - @m38a_lib.M38A
GPU_VARY_BL - @m38a_lib.M38A
GPU_VGA_B - @m38a_lib.M38A
TP_GPU_VGA_B - @m38a_lib.M38A
GPU_VGA_G - @m38a_lib.M38A
TP_GPU_VGA_G - @m38a_lib.M38A
GPU_VGA_HSYNC - @m38a_lib.M38A
TP_GPU_VGA_HSYNC - @m38a_lib.M38A
GPU_VGA_R - @m38a_lib.M38A
TP_GPU_VGA_R - @m38a_lib.M38A
GPU_VGA_VSYNC - @m38a_lib.M38A
TP_GPU_VGA_VSYNC - @m38a_lib.M38A
GPU_VSYNC_BUF - @m38a_lib.M38A
GPU_XTALOUT - @m38a_lib.M38A
I2C_ALS_SCL - @m38a_lib.M38A
SMB_A_S3_CLK - @m38a_lib.M38A
I2C_ALS_SDA - @m38a_lib.M38A
SMB_A_S3_DATA - @m38a_lib.M38A
IDE_CSEL_PD - @m38a_lib.M38A
IDE_DASP_L - @m38a_lib.M38A
IDE_DASP_L_DS - @m38a_lib.M38A
IDE_IOCS16_PU - @m38a_lib.M38A
IDE_IRQ14 - @m38a_lib.M38A
IDE_PDA<0> - @m38a_lib.M38A
IDE_PDA<1> - @m38a_lib.M38A
IDE_PDA<2> - @m38a_lib.M38A
IDE_PDCS1_L - @m38a_lib.M38A
IDE_PDCS3_L - @m38a_lib.M38A
IDE_PDD<0> - @m38a_lib.M38A
IDE_PDD<1> - @m38a_lib.M38A
IDE_PDD<2> - @m38a_lib.M38A
IDE_PDD<3> - @m38a_lib.M38A
IDE_PDD<4> - @m38a_lib.M38A
IDE_PDD<5> - @m38a_lib.M38A
IDE_PDD<6> - @m38a_lib.M38A
IDE_PDD<7> - @m38a_lib.M38A
IDE_PDD<8> - @m38a_lib.M38A
IDE_PDD<9> - @m38a_lib.M38A
IDE_PDD<10> - @m38a_lib.M38A
IDE_PDD<11> - @m38a_lib.M38A
IDE_PDD<12> - @m38a_lib.M38A
IDE_PDD<13> - @m38a_lib.M38A
IDE_PDD<14> - @m38a_lib.M38A
IDE_PDD<15> - @m38a_lib.M38A
IDE_PDDACK_L - @m38a_lib.M38A
IDE_PDDREQ - @m38a_lib.M38A
IDE_PDIORDY - @m38a_lib.M38A
IDE_PDIOR_L - @m38a_lib.M38A
IDE_PDIOW_L - @m38a_lib.M38A
IDE_RESET_L - @m38a_lib.M38A
IMVP6_BOOT1 - @m38a_lib.M38A
IMVP6_BOOT2 - @m38a_lib.M38A
IMVP6_COMP - @m38a_lib.M38A
IMVP6_COMP_RC - @m38a_lib.M38A
IMVP6_DFB - @m38a_lib.M38A
IMVP6_DROOP - @m38a_lib.M38A
IMVP6_FB - @m38a_lib.M38A
IMVP6_FB2 - @m38a_lib.M38A
IMVP6_FET_RC1 - @m38a_lib.M38A
IMVP6_FET_RC2 - @m38a_lib.M38A
IMVP6_ISEN1 - @m38a_lib.M38A
IMVP6_ISEN2 - @m38a_lib.M38A
IMVP6_LGATE1 - @m38a_lib.M38A
IMVP6_LGATE2 - @m38a_lib.M38A
IMVP6_NTC - @m38a_lib.M38A
IMVP6_NTC_R - @m38a_lib.M38A
IMVP6_OCSET - @m38a_lib.M38A
IMVP6_PHASE1 - @m38a_lib.M38A
IMVP6_PHASE2 - @m38a_lib.M38A
IMVP6_RBIAS - @m38a_lib.M38A
IMVP6_RTN - @m38a_lib.M38A
IMVP6_SOFT - @m38a_lib.M38A
88C5
88C5 91D3
88C5 91C3
88C3 91C3
88C5
88B5 91C3
88C5 91C3
88C5 91C3
88C1 91C3
88C3
88B4 91C3
88B5
88C1 91C3
88C3
91D5 95B4
91D5 95B4
91D5 95B4
91D5 95B4
91D5 95B4
91D5 95B4
88B5 91D5
91D5 95C4
91D5 95C4
88B5 91D5
88B5 91D5
88B5 91C5
91C5 95C4
91C5 95C4
91C5 95C4
91C5 95C4
91C5 95C4
93B3 97A4
93A5 97C1
97A4
87A3
87B7
87B3
87B7
87B3
84A3
84A3
84A3
6C7 94B3
93B3 97A8
87A3
87A3
88B1 93B3
88B3
88B1 93B3
88B3
88B1 93B3
88B3
93B3 97B4
91C3 94B4
88C1 93C3
88C3
88C1 93C3
88C3
88B1 93B3
88B3
88C1 93C3
88C3
88B1 93B3
88B3
97B4
91A5
59C1 59C8
58B5 59C2 59D1
59C1 59C8
58B5 59C2 59D1
38C3
38C3
38B3
38C1
21B6 38C4
21B5 38C3
21B5 38C3
21B5 38C1
21B5 38C3
21B5 38C1
21C5 38C3
21B5 38C3
21B5 38D3
21B5 38D3
21B5 38D3
21B5 38D3
21B5 38D3
21B5 38D3
21B5 38D1
5C8 21B5 38D1
21B5 38D1
21B5 38D1
21B5 38D1
21B5 38D1
21B5 38D1
21B5 38C1
21B6 38C1
21B6 38C4
5C8 21B6 38C4
5C8 21B6 38C1
21B6 38C3
23C3 38D3 38D6
75A8 75C5
75A6 75C5
75A4 75B6
75B7
75A4 75B5
75A4 75B4
75A4 75B6
75A4 75B6
75A8 75C2
75A6 75B2
75A8 75C5
75A6 75C5
75A8 75C5
75A6 75C5
75C7
75C7
75A4 75B5
75A8 75C5
75A6 75C5
75A4 75B6
75A4 75B5
75A4 75C6
102
IMVP6_UGATE1
IMVP6_UGATE2
IMVP6_VDIFF
IMVP6_VDIFF_RC
IMVP6_VO
IMVP6_VO_R
IMVP6_VR_TT
IMVP6_VSEN
IMVP6_VSUM
IMVP6_VSUM_R1
IMVP6_VSUM_R2
IMVP6_VW
IMVP_DPRSLPVR
IMVP_PGD_IN
IMVP_VID<0>
IMVP_VID<1>
IMVP_VID<2>
IMVP_VID<3>
IMVP_VID<4>
IMVP_VID<5>
IMVP_VID<6>
IMVP_VR_ON
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
INT_SERIRQ
ISENSE_CAL_EN
ITPRESET_L
ITP_TDO
ITS_ALIVE
ITS_PLUGGED_IN
KBC_MDE
LCD_PWM
LCD_PWM_R
LCD_PWREN_L
LCD_PWREN_L_RC
LCD_SHOULD_ON
LED_PP1V05_S0_N
LED_PP1V05_S0_P
LED_PP1V5_S0_N
LED_PP1V5_S0_P
LED_PP1V8_S3_N
LED_PP1V8_S3_P
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
LVDS_A_CLK_N
IMVP6_UGATE1 - @m38a_lib.M38A
IMVP6_UGATE2 - @m38a_lib.M38A
IMVP6_VDIFF - @m38a_lib.M38A
IMVP6_VDIFF_RC - @m38a_lib.M38A
IMVP6_VO - @m38a_lib.M38A
IMVP6_VO_R - @m38a_lib.M38A
IMVP6_VR_TT - @m38a_lib.M38A
IMVP6_VSEN - @m38a_lib.M38A
IMVP6_VSUM - @m38a_lib.M38A
IMVP6_VSUM_R1 - @m38a_lib.M38A
IMVP6_VSUM_R2 - @m38a_lib.M38A
IMVP6_VW - @m38a_lib.M38A
IMVP_DPRSLPVR - @m38a_lib.M38A
IMVP_PGD_IN - @m38a_lib.M38A
IMVP_VID<0> - @m38a_lib.M38A
IMVP_VID<1> - @m38a_lib.M38A
IMVP_VID<2> - @m38a_lib.M38A
IMVP_VID<3> - @m38a_lib.M38A
IMVP_VID<4> - @m38a_lib.M38A
IMVP_VID<5> - @m38a_lib.M38A
IMVP_VID<6> - @m38a_lib.M38A
IMVP_VR_ON - @m38a_lib.M38A
INT_PIRQA_L - @m38a_lib.M38A
INT_PIRQB_L - @m38a_lib.M38A
INT_PIRQC_L - @m38a_lib.M38A
INT_PIRQD_L - @m38a_lib.M38A
INT_SERIRQ - @m38a_lib.M38A
ISENSE_CAL_EN - @m38a_lib.M38A
ITPRESET_L - @m38a_lib.M38A
ITP_TDO - @m38a_lib.M38A
ITS_ALIVE - @m38a_lib.M38A
ITS_PLUGGED_IN - @m38a_lib.M38A
KBC_MDE - @m38a_lib.M38A
LCD_PWM - @m38a_lib.M38A
LCD_PWM_R - @m38a_lib.M38A
LCD_PWREN_L - @m38a_lib.M38A
LCD_PWREN_L_RC - @m38a_lib.M38A
LCD_SHOULD_ON - @m38a_lib.M38A
LED_PP1V05_S0_N - @m38a_lib.M38A
LED_PP1V05_S0_P - @m38a_lib.M38A
LED_PP1V5_S0_N - @m38a_lib.M38A
LED_PP1V5_S0_P - @m38a_lib.M38A
LED_PP1V8_S3_N - @m38a_lib.M38A
LED_PP1V8_S3_P - @m38a_lib.M38A
LPC_AD<0> - @m38a_lib.M38A
LPC_AD<1> - @m38a_lib.M38A
LPC_AD<2> - @m38a_lib.M38A
LPC_AD<3> - @m38a_lib.M38A
LPC_FRAME_L - @m38a_lib.M38A
LVDS_A_CLK_N - @m38a_lib.M38A
TP_LVDS_A_CLK_N - @m38a_lib.M38A
LVDS_A_CLK_P - @m38a_lib.M38A
TP_LVDS_A_CLK_P - @m38a_lib.M38A
LVDS_A_DATA_N<0> - @m38a_lib.M38A
LVDS_A_DATA_N<1> - @m38a_lib.M38A
LVDS_A_DATA_N<2> - @m38a_lib.M38A
LVDS_A_DATA_P<0> - @m38a_lib.M38A
LVDS_A_DATA_P<1> - @m38a_lib.M38A
LVDS_A_DATA_P<2> - @m38a_lib.M38A
LVDS_BKLTCTL - @m38a_lib.M38A
TP_LVDS_BKLTCTL - @m38a_lib.M38A
LVDS_BKLTEN - @m38a_lib.M38A
TP_LVDS_BKLTEN - @m38a_lib.M38A
LVDS_B_CLK_N - @m38a_lib.M38A
TP_LVDS_B_CLK_N - @m38a_lib.M38A
LVDS_B_CLK_P - @m38a_lib.M38A
TP_LVDS_B_CLK_P - @m38a_lib.M38A
LVDS_B_DATA_N<0> - @m38a_lib.M38A
LVDS_B_DATA_N<1> - @m38a_lib.M38A
LVDS_B_DATA_N<2> - @m38a_lib.M38A
LVDS_B_DATA_P<0> - @m38a_lib.M38A
LVDS_B_DATA_P<1> - @m38a_lib.M38A
LVDS_B_DATA_P<2> - @m38a_lib.M38A
LVDS_CLKCTLA - @m38a_lib.M38A
TP_LVDS_CLKCTLA - @m38a_lib.M38A
LVDS_CLKCTLB - @m38a_lib.M38A
TP_LVDS_CLKCTLB - @m38a_lib.M38A
LVDS_DDC_CLK - @m38a_lib.M38A
TP_LVDS_DDC_CLK - @m38a_lib.M38A
LVDS_DDC_DATA - @m38a_lib.M38A
TP_LVDS_DDC_DATA - @m38a_lib.M38A
LVDS_IBG - @m38a_lib.M38A
TP_LVDS_IBG - @m38a_lib.M38A
LVDS_L_CLK_N - @m38a_lib.M38A
LVDS_L_CLK_P - @m38a_lib.M38A
LVDS_L_DATA_N<0> - @m38a_lib.M38A
LVDS_L_DATA_N<1> - @m38a_lib.M38A
LVDS_L_DATA_N<2> - @m38a_lib.M38A
LVDS_L_DATA_N<3> - @m38a_lib.M38A
LVDS_L_DATA_P<0> - @m38a_lib.M38A
LVDS_L_DATA_P<1> - @m38a_lib.M38A
LVDS_L_DATA_P<2> - @m38a_lib.M38A
LVDS_L_DATA_P<3> - @m38a_lib.M38A
LVDS_U_CLK_N - @m38a_lib.M38A
LVDS_U_CLK_P - @m38a_lib.M38A
LVDS_U_DATA_N<0> - @m38a_lib.M38A
LVDS_U_DATA_N<1> - @m38a_lib.M38A
LVDS_U_DATA_N<2> - @m38a_lib.M38A
LVDS_U_DATA_N<3> - @m38a_lib.M38A
LVDS_U_DATA_P<0> - @m38a_lib.M38A
LVDS_U_DATA_P<1> - @m38a_lib.M38A
LVDS_U_DATA_P<2> - @m38a_lib.M38A
LVDS_U_DATA_P<3> - @m38a_lib.M38A
LVDS_VDDEN - @m38a_lib.M38A
TP_LVDS_VDDEN - @m38a_lib.M38A
LVDS_VREFH - @m38a_lib.M38A
TP_LVDS_VREFH - @m38a_lib.M38A
LVDS_VREFL - @m38a_lib.M38A
TP_LVDS_VREFL - @m38a_lib.M38A
MEMVTT_VREF - @m38a_lib.M38A
MEM_A_A<0> - @m38a_lib.M38A
MEM_A_A<13..0> - @m38a_lib.M38A
MEM_A_A<1> - @m38a_lib.M38A
MEM_A_A<2> - @m38a_lib.M38A
MEM_A_A<3> - @m38a_lib.M38A
MEM_A_A<4> - @m38a_lib.M38A
MEM_A_A<5> - @m38a_lib.M38A
MEM_A_A<6> - @m38a_lib.M38A
MEM_A_A<7> - @m38a_lib.M38A
MEM_A_A<8> - @m38a_lib.M38A
MEM_A_A<9> - @m38a_lib.M38A
MEM_A_A<10> - @m38a_lib.M38A
MEM_A_A<11> - @m38a_lib.M38A
MEM_A_A<12> - @m38a_lib.M38A
LVDS_A_CLK_P
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
LVDS_BKLTCTL
LVDS_BKLTEN
LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
LVDS_CLKCTLA
LVDS_CLKCTLB
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_IBG
LVDS_L_CLK_N
LVDS_L_CLK_P
LVDS_L_DATA_N<0>
LVDS_L_DATA_N<1>
LVDS_L_DATA_N<2>
LVDS_L_DATA_N<3>
LVDS_L_DATA_P<0>
LVDS_L_DATA_P<1>
LVDS_L_DATA_P<2>
LVDS_L_DATA_P<3>
LVDS_U_CLK_N
LVDS_U_CLK_P
LVDS_U_DATA_N<0>
LVDS_U_DATA_N<1>
LVDS_U_DATA_N<2>
LVDS_U_DATA_N<3>
LVDS_U_DATA_P<0>
LVDS_U_DATA_P<1>
LVDS_U_DATA_P<2>
LVDS_U_DATA_P<3>
LVDS_VDDEN
LVDS_VREFH
LVDS_VREFL
MEMVTT_VREF
MEM_A_A<0>
MEM_A_A<13..0>
MEM_A_A<1>
MEM_A_A<2>
MEM_A_A<3>
MEM_A_A<4>
MEM_A_A<5>
MEM_A_A<6>
MEM_A_A<7>
MEM_A_A<8>
MEM_A_A<9>
MEM_A_A<10>
MEM_A_A<11>
MEM_A_A<12>
7
75A8
75A6
75A4
75B7
75A4
75B4
75C7
75A4
75A4
75A8
75A6
75A4
75C6
75C6
75C6
75C7
75C7
75C7
75C7
75C7
75C7
58D7
22A7
22A7
22A7
22A7
23C8
58B7
11B3
11B3
6A7
6A7
58C2
94B1
94B2
94C8
94C7
6A6
81A4
81A4
80A3
80A4
79A4
79A4
21D4
21D4
21D4
21D4
21C5
13D5
19D1
13C5
19D1
13C5
13C5
13C5
13C5
13C5
13C5
13D5
19C1
13D5
19C1
13C5
19D1
13C5
19D1
13C5
13C5
13C5
13C5
13C5
13C5
13D5
19C1
13D5
19C1
13D5
19C1
13D5
19C1
13D5
19C1
93A3
93A3
93A3
93A3
93A3
93A3
93A3
93A3
93A3
93A3
93B3
93B3
93B3
93B3
93B3
93B3
93B3
93B3
93B3
93B3
13D5
19C1
13D5
19C1
13D5
19C1
31B4
15C5
30C6
15C5
15C5
15B5
15B5
15B5
15B5
15B5
15B5
15B5
15B5
15B5
15B5
75C5
75C5
75B6
75B4
75B5
75C5
75C2
75B2
75B6
77D5
75C6
26D2
26D2
26D2
26D2 44B5
58C7 60C1 67C6
76A8
94C3
58D7
58D7
58C7
58C7
58C7
19D2
60C4
60C4
60C1
60C1
60C4
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19C2
19C2
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19C2
19C2
19C2
19C2
19C2
93D2
93D2
93C2
93C2
93C2
94A6
93D2
93C2
93C2
94A7
94B6
94A7
94B7
94B7
94B7
94A6
94B6
94B6
94B6
94A7
19C2
94A6
94A7
94A6
94A7
94A6
94A7
94A6
94A7
19C2
19C2
28B3
28B6
28B3
28B6
28B3
28B6
28C3
28C3
28C6
28C6
28B6
28C3
28C6
67C6
67C6
67C6
67C6
67C6
MEM_A_A<13>
MEM_A_BS<0>
MEM_A_BS<2..0>
MEM_A_BS<1>
MEM_A_BS<2>
MEM_A_CAS_L
MEM_A_DM<0>
MEM_A_DM<1>
MEM_A_DM<2>
MEM_A_DM<3>
MEM_A_DM<4>
MEM_A_DM<5>
MEM_A_DM<6>
MEM_A_DM<7>
MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<2>
MEM_A_DQ<3>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<6>
MEM_A_DQ<7>
MEM_A_DQ<8>
MEM_A_DQ<9>
MEM_A_DQ<10>
MEM_A_DQ<11>
MEM_A_DQ<12>
MEM_A_DQ<13>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<17>
MEM_A_DQ<18>
MEM_A_DQ<19>
MEM_A_DQ<20>
MEM_A_DQ<21>
MEM_A_DQ<22>
MEM_A_DQ<23>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<26>
MEM_A_DQ<27>
MEM_A_DQ<28>
MEM_A_DQ<29>
MEM_A_DQ<30>
MEM_A_DQ<31>
MEM_A_DQ<32>
MEM_A_DQ<33>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<36>
MEM_A_DQ<37>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<42>
MEM_A_DQ<43>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<46>
MEM_A_DQ<47>
MEM_A_DQ<48>
MEM_A_DQ<49>
MEM_A_DQ<50>
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>
MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_N<4>
MEM_A_DQS_N<5>
MEM_A_DQS_N<6>
MEM_A_DQS_N<7>
MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_A_DQS_P<4>
MEM_A_DQS_P<5>
MEM_A_DQS_P<6>
MEM_A_DQS_P<7>
MEM_A_RAS_L
MEM_A_WE_L
MEM_B_A<0>
MEM_B_A<1>
MEM_B_A<2>
MEM_B_A<3>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<10>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
MEM_B_BS<0>
MEM_B_BS<2..0>
MEM_B_BS<1>
MEM_B_BS<2>
MEM_B_CAS_L
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
MEM_B_DQ<0>
MEM_A_A<13> - @m38a_lib.M38A
MEM_A_BS<0> - @m38a_lib.M38A
MEM_A_BS<2..0> - @m38a_lib.M38A
MEM_A_BS<1> - @m38a_lib.M38A
MEM_A_BS<2> - @m38a_lib.M38A
MEM_A_CAS_L - @m38a_lib.M38A
MEM_A_DM<0> - @m38a_lib.M38A
MEM_A_DM<1> - @m38a_lib.M38A
MEM_A_DM<2> - @m38a_lib.M38A
MEM_A_DM<3> - @m38a_lib.M38A
MEM_A_DM<4> - @m38a_lib.M38A
MEM_A_DM<5> - @m38a_lib.M38A
MEM_A_DM<6> - @m38a_lib.M38A
MEM_A_DM<7> - @m38a_lib.M38A
MEM_A_DQ<0> - @m38a_lib.M38A
MEM_A_DQ<1> - @m38a_lib.M38A
MEM_A_DQ<2> - @m38a_lib.M38A
MEM_A_DQ<3> - @m38a_lib.M38A
MEM_A_DQ<4> - @m38a_lib.M38A
MEM_A_DQ<5> - @m38a_lib.M38A
MEM_A_DQ<6> - @m38a_lib.M38A
MEM_A_DQ<7> - @m38a_lib.M38A
MEM_A_DQ<8> - @m38a_lib.M38A
MEM_A_DQ<9> - @m38a_lib.M38A
MEM_A_DQ<10> - @m38a_lib.M38A
MEM_A_DQ<11> - @m38a_lib.M38A
MEM_A_DQ<12> - @m38a_lib.M38A
MEM_A_DQ<13> - @m38a_lib.M38A
MEM_A_DQ<14> - @m38a_lib.M38A
MEM_A_DQ<15> - @m38a_lib.M38A
MEM_A_DQ<16> - @m38a_lib.M38A
MEM_A_DQ<17> - @m38a_lib.M38A
MEM_A_DQ<18> - @m38a_lib.M38A
MEM_A_DQ<19> - @m38a_lib.M38A
MEM_A_DQ<20> - @m38a_lib.M38A
MEM_A_DQ<21> - @m38a_lib.M38A
MEM_A_DQ<22> - @m38a_lib.M38A
MEM_A_DQ<23> - @m38a_lib.M38A
MEM_A_DQ<24> - @m38a_lib.M38A
MEM_A_DQ<25> - @m38a_lib.M38A
MEM_A_DQ<26> - @m38a_lib.M38A
MEM_A_DQ<27> - @m38a_lib.M38A
MEM_A_DQ<28> - @m38a_lib.M38A
MEM_A_DQ<29> - @m38a_lib.M38A
MEM_A_DQ<30> - @m38a_lib.M38A
MEM_A_DQ<31> - @m38a_lib.M38A
MEM_A_DQ<32> - @m38a_lib.M38A
MEM_A_DQ<33> - @m38a_lib.M38A
MEM_A_DQ<34> - @m38a_lib.M38A
MEM_A_DQ<35> - @m38a_lib.M38A
MEM_A_DQ<36> - @m38a_lib.M38A
MEM_A_DQ<37> - @m38a_lib.M38A
MEM_A_DQ<38> - @m38a_lib.M38A
MEM_A_DQ<39> - @m38a_lib.M38A
MEM_A_DQ<40> - @m38a_lib.M38A
MEM_A_DQ<41> - @m38a_lib.M38A
MEM_A_DQ<42> - @m38a_lib.M38A
MEM_A_DQ<43> - @m38a_lib.M38A
MEM_A_DQ<44> - @m38a_lib.M38A
MEM_A_DQ<45> - @m38a_lib.M38A
MEM_A_DQ<46> - @m38a_lib.M38A
MEM_A_DQ<47> - @m38a_lib.M38A
MEM_A_DQ<48> - @m38a_lib.M38A
MEM_A_DQ<49> - @m38a_lib.M38A
MEM_A_DQ<50> - @m38a_lib.M38A
MEM_A_DQ<51> - @m38a_lib.M38A
MEM_A_DQ<52> - @m38a_lib.M38A
MEM_A_DQ<53> - @m38a_lib.M38A
MEM_A_DQ<54> - @m38a_lib.M38A
MEM_A_DQ<55> - @m38a_lib.M38A
MEM_A_DQ<56> - @m38a_lib.M38A
MEM_A_DQ<57> - @m38a_lib.M38A
MEM_A_DQ<58> - @m38a_lib.M38A
MEM_A_DQ<59> - @m38a_lib.M38A
MEM_A_DQ<60> - @m38a_lib.M38A
MEM_A_DQ<61> - @m38a_lib.M38A
MEM_A_DQ<62> - @m38a_lib.M38A
MEM_A_DQ<63> - @m38a_lib.M38A
MEM_A_DQS_N<0> - @m38a_lib.M38A
MEM_A_DQS_N<1> - @m38a_lib.M38A
MEM_A_DQS_N<2> - @m38a_lib.M38A
MEM_A_DQS_N<3> - @m38a_lib.M38A
MEM_A_DQS_N<4> - @m38a_lib.M38A
MEM_A_DQS_N<5> - @m38a_lib.M38A
MEM_A_DQS_N<6> - @m38a_lib.M38A
MEM_A_DQS_N<7> - @m38a_lib.M38A
MEM_A_DQS_P<0> - @m38a_lib.M38A
MEM_A_DQS_P<1> - @m38a_lib.M38A
MEM_A_DQS_P<2> - @m38a_lib.M38A
MEM_A_DQS_P<3> - @m38a_lib.M38A
MEM_A_DQS_P<4> - @m38a_lib.M38A
MEM_A_DQS_P<5> - @m38a_lib.M38A
MEM_A_DQS_P<6> - @m38a_lib.M38A
MEM_A_DQS_P<7> - @m38a_lib.M38A
MEM_A_RAS_L - @m38a_lib.M38A
MEM_A_WE_L - @m38a_lib.M38A
MEM_B_A<0> - @m38a_lib.M38A
MEM_B_A<1> - @m38a_lib.M38A
MEM_B_A<2> - @m38a_lib.M38A
MEM_B_A<3> - @m38a_lib.M38A
MEM_B_A<4> - @m38a_lib.M38A
MEM_B_A<5> - @m38a_lib.M38A
MEM_B_A<6> - @m38a_lib.M38A
MEM_B_A<7> - @m38a_lib.M38A
MEM_B_A<8> - @m38a_lib.M38A
MEM_B_A<9> - @m38a_lib.M38A
MEM_B_A<10> - @m38a_lib.M38A
MEM_B_A<11> - @m38a_lib.M38A
MEM_B_A<12> - @m38a_lib.M38A
MEM_B_A<13> - @m38a_lib.M38A
MEM_B_BS<0> - @m38a_lib.M38A
MEM_B_BS<2..0> - @m38a_lib.M38A
MEM_B_BS<1> - @m38a_lib.M38A
MEM_B_BS<2> - @m38a_lib.M38A
MEM_B_CAS_L - @m38a_lib.M38A
MEM_B_DM<0> - @m38a_lib.M38A
MEM_B_DM<1> - @m38a_lib.M38A
MEM_B_DM<2> - @m38a_lib.M38A
MEM_B_DM<3> - @m38a_lib.M38A
MEM_B_DM<4> - @m38a_lib.M38A
MEM_B_DM<5> - @m38a_lib.M38A
MEM_B_DM<6> - @m38a_lib.M38A
MEM_B_DM<7> - @m38a_lib.M38A
MEM_B_DQ<0> - @m38a_lib.M38A
15B5 28B3
15D5 28B6
30C6
15D5 28B3
15D5 28C6
15D5 28B6 30B6
15D5 28D3
15D5 28D3
15D5 28C3
15C5 28C6
15C5 28B3
15C5 28A6
15C5 28A3
15C5 28A6
15D7 28D6
15D7 28D6
15D7 28D6
15D7 28D6
15D7 28D3
15D7 28D3
15D7 28D3
5B7 15D7 28D3
15C7 28D6
15C7 28D6
15C7 28D6
15C7 28D6
15C7 28D3
15C7 28D3
5B7 15C7 28D3
15C7 28D3
5B7 15C7 28C6
15C7 28C6
15C7 28C6
15C7 28C6
15C7 28C3
15C7 28C3
15C7 28C3
15C7 28C3
15C7 28C6
5B7 15C7 28C6
15C7 28C6
15C7 28C6
15C7 28C3
15C7 28C3
15C7 28C3
15C7 28C3
15C7 28B6
15C7 28B6
15B7 28B6
15B7 28B6
15B7 28B3
15B7 28B3
15B7 28B3
5B7 15B7 28B3
15B7 28B6
15B7 28B6
15B7 28A6
15B7 28A6
15B7 28B3
15B7 28B3
15B7 28A3
5B7 15B7 28A3
15B7 28A6
15B7 28A6
15B7 28A6
15B7 28A6
15B7 28A3
15B7 28A3
5B7 15B7 28A3
15B7 28A3
15B7 28A6
15B7 28A6
15B7 28A6
5B7 15B7 28A6
15A7 28A3
15A7 28A3
15A7 28A3
15A7 28A3
5B7 15C5 28D6
5B7 15C5 28D6
5B7 15C5 28C6
5B7 15C5 28C3
5B7 15C5 28B6
5B7 15C5 28B3
5B7 15C5 28A6
5B7 15C5 28A3
5B7 15C5 28D6
5B7 15C5 28D6
5B7 15C5 28C6
5B7 15C5 28C3
5B7 15C5 28B6
5B7 15C5 28A3
5B7 15C5 28A6
5B7 15C5 28A3
15B5 28B3 30B6
15B5 28B6 30B6
15C2 29B3 30B5
15C2 29B6 30B5
15C2 29B3 30B5
15B2 29B6 30B5
15B2 29B3 30B5
15B2 29B6 30B5
15B2 29C3 30B5
15B2 29C3 30B5
15B2 29C6 30B5
15B2 29C6 30B5
15B2 29B6 30B5
15B2 29C3 30A5
15B2 29C6 30A5
15B2 29B3 30A5
15D2 29B6
30A6
15D2 29B3
15D2 29C6
15D2 29B6 30A6
15D2 29D3
15D2 29D3
15D2 29C3
15C2 29C6
15C2 29B3
15C2 29A6
15C2 29A3
15C2 29A6
15D4 29D6
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<51>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>
MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>
MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_RAS_L
MEM_B_SPD_SA1
MEM_B_WE_L
MEM_CKE<0>
MEM_CKE<3..0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>
MEM_CLK_N<0>
MEM_CLK_N<1>
MEM_CLK_N<2>
MEM_CLK_N<3>
MEM_CLK_P<0>
MEM_CLK_P<1>
MEM_CLK_P<2>
MEM_CLK_P<3>
MEM_CS_L<0>
MEM_CS_L<3..0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
MEM_ODT<0>
MEM_ODT<3..0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3>
MEM_RCOMP
MEM_RCOMP_L
MEM_VREF
MEM_VREF_NB_0
MEM_VREF_NB_1
NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>
NB_CFG<3>
NB_CFG<4>
NB_CFG<5>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
NB_CFG<9>
NB_CFG<10>
NB_CFG<11>
NB_CFG<12>
NB_CFG<13>
MEM_B_DQ<1> - @m38a_lib.M38A
MEM_B_DQ<2> - @m38a_lib.M38A
MEM_B_DQ<3> - @m38a_lib.M38A
MEM_B_DQ<4> - @m38a_lib.M38A
MEM_B_DQ<5> - @m38a_lib.M38A
MEM_B_DQ<6> - @m38a_lib.M38A
MEM_B_DQ<7> - @m38a_lib.M38A
MEM_B_DQ<8> - @m38a_lib.M38A
MEM_B_DQ<9> - @m38a_lib.M38A
MEM_B_DQ<10> - @m38a_lib.M38A
MEM_B_DQ<11> - @m38a_lib.M38A
MEM_B_DQ<12> - @m38a_lib.M38A
MEM_B_DQ<13> - @m38a_lib.M38A
MEM_B_DQ<14> - @m38a_lib.M38A
MEM_B_DQ<15> - @m38a_lib.M38A
MEM_B_DQ<16> - @m38a_lib.M38A
MEM_B_DQ<17> - @m38a_lib.M38A
MEM_B_DQ<18> - @m38a_lib.M38A
MEM_B_DQ<19> - @m38a_lib.M38A
MEM_B_DQ<20> - @m38a_lib.M38A
MEM_B_DQ<21> - @m38a_lib.M38A
MEM_B_DQ<22> - @m38a_lib.M38A
MEM_B_DQ<23> - @m38a_lib.M38A
MEM_B_DQ<24> - @m38a_lib.M38A
MEM_B_DQ<25> - @m38a_lib.M38A
MEM_B_DQ<26> - @m38a_lib.M38A
MEM_B_DQ<27> - @m38a_lib.M38A
MEM_B_DQ<28> - @m38a_lib.M38A
MEM_B_DQ<29> - @m38a_lib.M38A
MEM_B_DQ<30> - @m38a_lib.M38A
MEM_B_DQ<31> - @m38a_lib.M38A
MEM_B_DQ<32> - @m38a_lib.M38A
MEM_B_DQ<33> - @m38a_lib.M38A
MEM_B_DQ<34> - @m38a_lib.M38A
MEM_B_DQ<35> - @m38a_lib.M38A
MEM_B_DQ<36> - @m38a_lib.M38A
MEM_B_DQ<37> - @m38a_lib.M38A
MEM_B_DQ<38> - @m38a_lib.M38A
MEM_B_DQ<39> - @m38a_lib.M38A
MEM_B_DQ<40> - @m38a_lib.M38A
MEM_B_DQ<41> - @m38a_lib.M38A
MEM_B_DQ<42> - @m38a_lib.M38A
MEM_B_DQ<43> - @m38a_lib.M38A
MEM_B_DQ<44> - @m38a_lib.M38A
MEM_B_DQ<45> - @m38a_lib.M38A
MEM_B_DQ<46> - @m38a_lib.M38A
MEM_B_DQ<47> - @m38a_lib.M38A
MEM_B_DQ<48> - @m38a_lib.M38A
MEM_B_DQ<49> - @m38a_lib.M38A
MEM_B_DQ<50> - @m38a_lib.M38A
MEM_B_DQ<51> - @m38a_lib.M38A
MEM_B_DQ<52> - @m38a_lib.M38A
MEM_B_DQ<53> - @m38a_lib.M38A
MEM_B_DQ<54> - @m38a_lib.M38A
MEM_B_DQ<55> - @m38a_lib.M38A
MEM_B_DQ<56> - @m38a_lib.M38A
MEM_B_DQ<57> - @m38a_lib.M38A
MEM_B_DQ<58> - @m38a_lib.M38A
MEM_B_DQ<59> - @m38a_lib.M38A
MEM_B_DQ<60> - @m38a_lib.M38A
MEM_B_DQ<61> - @m38a_lib.M38A
MEM_B_DQ<62> - @m38a_lib.M38A
MEM_B_DQ<63> - @m38a_lib.M38A
MEM_B_DQS_N<0> - @m38a_lib.M38A
MEM_B_DQS_N<1> - @m38a_lib.M38A
MEM_B_DQS_N<2> - @m38a_lib.M38A
MEM_B_DQS_N<3> - @m38a_lib.M38A
MEM_B_DQS_N<4> - @m38a_lib.M38A
MEM_B_DQS_N<5> - @m38a_lib.M38A
MEM_B_DQS_N<6> - @m38a_lib.M38A
MEM_B_DQS_N<7> - @m38a_lib.M38A
MEM_B_DQS_P<0> - @m38a_lib.M38A
MEM_B_DQS_P<1> - @m38a_lib.M38A
MEM_B_DQS_P<2> - @m38a_lib.M38A
MEM_B_DQS_P<3> - @m38a_lib.M38A
MEM_B_DQS_P<4> - @m38a_lib.M38A
MEM_B_DQS_P<5> - @m38a_lib.M38A
MEM_B_DQS_P<6> - @m38a_lib.M38A
MEM_B_DQS_P<7> - @m38a_lib.M38A
MEM_B_RAS_L - @m38a_lib.M38A
MEM_B_SPD_SA1 - @m38a_lib.M38A
MEM_B_WE_L - @m38a_lib.M38A
MEM_CKE<0> - @m38a_lib.M38A
MEM_CKE<3..0> - @m38a_lib.M38A
MEM_CKE<1> - @m38a_lib.M38A
MEM_CKE<2> - @m38a_lib.M38A
MEM_CKE<3> - @m38a_lib.M38A
MEM_CLK_N<0> - @m38a_lib.M38A
MEM_CLK_N<1> - @m38a_lib.M38A
MEM_CLK_N<2> - @m38a_lib.M38A
MEM_CLK_N<3> - @m38a_lib.M38A
MEM_CLK_P<0> - @m38a_lib.M38A
MEM_CLK_P<1> - @m38a_lib.M38A
MEM_CLK_P<2> - @m38a_lib.M38A
MEM_CLK_P<3> - @m38a_lib.M38A
MEM_CS_L<0> - @m38a_lib.M38A
MEM_CS_L<3..0> - @m38a_lib.M38A
MEM_CS_L<1> - @m38a_lib.M38A
MEM_CS_L<2> - @m38a_lib.M38A
MEM_CS_L<3> - @m38a_lib.M38A
MEM_ODT<0> - @m38a_lib.M38A
MEM_ODT<3..0> - @m38a_lib.M38A
MEM_ODT<1> - @m38a_lib.M38A
MEM_ODT<2> - @m38a_lib.M38A
MEM_ODT<3> - @m38a_lib.M38A
MEM_RCOMP - @m38a_lib.M38A
MEM_RCOMP_L - @m38a_lib.M38A
MEM_VREF - @m38a_lib.M38A
MEM_VREF_NB_0 - @m38a_lib.M38A
MEM_VREF_NB_1 - @m38a_lib.M38A
NB_BSEL<0> - @m38a_lib.M38A
NB_BSEL<1> - @m38a_lib.M38A
NB_BSEL<2> - @m38a_lib.M38A
NB_CFG<3> - @m38a_lib.M38A
NB_CFG<4> - @m38a_lib.M38A
NB_CFG<5> - @m38a_lib.M38A
NB_CFG<6> - @m38a_lib.M38A
NB_CFG<7> - @m38a_lib.M38A
NB_CFG<8> - @m38a_lib.M38A
NB_CFG<9> - @m38a_lib.M38A
NB_CFG<10> - @m38a_lib.M38A
NB_CFG<11> - @m38a_lib.M38A
NB_CFG<12> - @m38a_lib.M38A
NB_CFG<13> - @m38a_lib.M38A
15D4 29D6
15D4 29D6
15D4 29D6
15D4 29D3
15D4 29D3
5A7 15D4 29D3
15D4 29D3
5A7 15C4 29D6
15C4 29D6
15C4 29D6
15C4 29D6
15C4 29D3
15C4 29D3
15C4 29D3
15C4 29D3
15C4 29C6
15C4 29C6
15C4 29C6
15C4 29C6
15C4 29C3
15C4 29C3
15C4 29C3
5A7 15C4 29C3
15C4 29C6
5A7 15C4 29C6
15C4 29C6
15C4 29C6
15C4 29C3
15C4 29C3
15C4 29C3
15C4 29C3
15C4 29B6
15C4 29B6
15B4 29B6
15B4 29B6
15B4 29B3
15B4 29B3
5A7 15B4 29B3
15B4 29B3
15B4 29B6
15B4 29B6
15B4 29A6
15B4 29A6
5A7 15B4 29B3
15B4 29B3
15B4 29A3
15B4 29A3
5A7 15B4 29A6
15B4 29A6
15B4 29A6
15B4 29A6
15B4 29A3
15B4 29A3
15B4 29A3
15B4 29A3
15B4 29A6
15B4 29A6
15B4 29A6
15B4 29A6
15A4 29A3
15A4 29A3
5A7 15A4 29A3
15A4 29A3
5A7 15C2 29D6
5A7 15C2 29D6
5A7 15C2 29C6
5A7 15C2 29C3
5A7 15C2 29B6
5A7 15C2 29B3
5A7 15C2 29A6
5A7 15C2 29A3
5A7 15C2 29D6
5A7 15C2 29D6
5A7 15C2 29C6
5A7 15C2 29C3
5A7 15C2 29B6
5A7 15C2 29A3
5A7 15C2 29A6
5A7 15C2 29A3
15B2 29B3 30A6
29A4
15B2 29B6 30A6
14C4 28C6
30D6
14C4 28C3
14C4 29C6
14C4 29C3
14D4 28D3
14D4 28A3
14D4 29A3
14D4 29D3
14D4 28D3
14D4 28A3
14D4 29A3
14D4 29D3
14C4 28B3
30D6
14C4 28B6
14C4 29B3
14C4 29B6
14C4 28B3
30D6
14C4 28B6
14C4 29B3
14C4 29B6
14C4
14C4
5C4 28C7 28D6 29D6
5B7 14C4 19B6
5B7 14C4 19B7
14C6 34B8
14C6 34B8
14C6 34A8
14C6
14C6
14C6 20C7
14C6
14C6 20C7
14C6
14C6 20B7
14C6
14C6
14C6
14C6
NB_CFG<14>
NB_CFG<15>
NB_CFG<16>
NB_CFG<17>
NB_CFG<18>
NB_CFG<19>
NB_CFG<20>
NB_CLK100M_GCLKIN_N
NB_CLK100M_GCLKIN_P
NB_FSB_VREF
NB_FSB_XRCOMP
NB_FSB_XSCOMP
NB_FSB_XSWING
NB_FSB_YRCOMP
NB_FSB_YSCOMP
NB_FSB_YSWING
NB_RST_IN_L
NB_RST_IN_L_R
NB_SB_SYNC_L
NB_TV_DCONSEL0
NB_TV_DCONSEL1
NB_VCCSM_LF1
NB_VCCSM_LF2
NB_VCCSM_LF4
NB_VCCSM_LF5
NB_VTTLF_CAP1
NB_VTTLF_CAP2
NB_VTTLF_CAP3
NC_AUD_BI_PORT_D_L
NC_AUD_BI_PORT_D_R
NC_AUD_BI_PORT_E_L
NC_AUD_BI_PORT_E_R
NC_AUD_VREF_PORT_A
NC_AUD_VREF_PORT_C
NC_AUD_VREF_PORT_D
NC_FW_NU1
NC_FW_NU2
NC_JE350_13
NC_SMC_P20
NC_SMC_P21
NC_SMC_P22
NC_SMC_P23
NC_SMC_P26
NC_SMC_P27
NC_VOL_DOWN
NC_VOL_UP
NC_VREG_POK
ODD_PWR_EN_L
P0V48_SMC_LSREF
PANEL_ID
PATA_PWR_EN_L
PCIE_A_D2R_C_N
PCIE_A_D2R_C_P
PCIE_A_D2R_N
PCIE_A_D2R_P
PCIE_A_R2D_C_N
PCIE_A_R2D_C_P
PCIE_A_R2D_N
PCIE_A_R2D_P
PCIE_B_D2R_N
PCIE_B_D2R_P
PCIE_B_R2D_C_N
PCIE_B_R2D_C_P
PCIE_B_R2D_N
PCIE_B_R2D_P
PCIE_C_D2R_N
PCIE_C_D2R_P
PCIE_C_R2D_C_N
PCIE_C_R2D_C_P
PCIE_D_D2R_N
PCIE_D_D2R_P
PCIE_D_R2D_C_N
PCIE_D_R2D_C_P
PCIE_E_D2R_N
PCIE_E_D2R_P
PCIE_E_R2D_C_N
PCIE_E_R2D_C_P
PCIE_F_D2R_N
PCIE_F_D2R_P
PCIE_F_R2D_C_N
PCIE_F_R2D_C_P
PCIE_WAKE_L
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
NB_CFG<14> - @m38a_lib.M38A
NB_CFG<15> - @m38a_lib.M38A
NB_CFG<16> - @m38a_lib.M38A
NB_CFG<17> - @m38a_lib.M38A
NB_CFG<18> - @m38a_lib.M38A
NB_CFG<19> - @m38a_lib.M38A
NB_CFG<20> - @m38a_lib.M38A
NB_CLK100M_GCLKIN_N @m38a_lib.M38A
NB_CLK100M_GCLKIN_P @m38a_lib.M38A
NB_FSB_VREF - @m38a_lib.M38A
NB_FSB_XRCOMP - @m38a_lib.M38A
NB_FSB_XSCOMP - @m38a_lib.M38A
NB_FSB_XSWING - @m38a_lib.M38A
NB_FSB_YRCOMP - @m38a_lib.M38A
NB_FSB_YSCOMP - @m38a_lib.M38A
NB_FSB_YSWING - @m38a_lib.M38A
NB_RST_IN_L - @m38a_lib.M38A
NB_RST_IN_L_R - @m38a_lib.M38A
NB_SB_SYNC_L - @m38a_lib.M38A
NB_TV_DCONSEL0 - @m38a_lib.M38A
NB_TV_DCONSEL1 - @m38a_lib.M38A
NB_VCCSM_LF1 - @m38a_lib.M38A
NB_VCCSM_LF2 - @m38a_lib.M38A
NB_VCCSM_LF4 - @m38a_lib.M38A
NB_VCCSM_LF5 - @m38a_lib.M38A
NB_VTTLF_CAP1 - @m38a_lib.M38A
NB_VTTLF_CAP2 - @m38a_lib.M38A
NB_VTTLF_CAP3 - @m38a_lib.M38A
NC_AUD_BI_PORT_D_L - @m38a_lib.M38A
NC_AUD_BI_PORT_D_R - @m38a_lib.M38A
NC_AUD_BI_PORT_E_L - @m38a_lib.M38A
NC_AUD_BI_PORT_E_R - @m38a_lib.M38A
NC_AUD_VREF_PORT_A - @m38a_lib.M38A
NC_AUD_VREF_PORT_C - @m38a_lib.M38A
NC_AUD_VREF_PORT_D - @m38a_lib.M38A
NC_FW_NU1 - @m38a_lib.M38A
NC_FW_NU2 - @m38a_lib.M38A
NC_JE350_13 - @m38a_lib.M38A
NC_SMC_P20 - @m38a_lib.M38A
SMC_P20 - @m38a_lib.M38A
NC_SMC_P21 - @m38a_lib.M38A
SMC_P21 - @m38a_lib.M38A
NC_SMC_P22 - @m38a_lib.M38A
SMC_P22 - @m38a_lib.M38A
NC_SMC_P23 - @m38a_lib.M38A
SMC_P23 - @m38a_lib.M38A
NC_SMC_P26 - @m38a_lib.M38A
SMC_P26 - @m38a_lib.M38A
NC_SMC_P27 - @m38a_lib.M38A
SMC_P27 - @m38a_lib.M38A
NC_VOL_DOWN - @m38a_lib.M38A
NC_VOL_UP - @m38a_lib.M38A
NC_VREG_POK - @m38a_lib.M38A
ODD_PWR_EN_L - @m38a_lib.M38A
SB_GPIO5 - @m38a_lib.M38A
P0V48_SMC_LSREF - @m38a_lib.M38A
PANEL_ID - @m38a_lib.M38A
PATA_PWR_EN_L - @m38a_lib.M38A
PCIE_A_D2R_C_N - @m38a_lib.M38A
PCIE_A_D2R_C_P - @m38a_lib.M38A
PCIE_A_D2R_N - @m38a_lib.M38A
PCIE_A_D2R_P - @m38a_lib.M38A
PCIE_A_R2D_C_N - @m38a_lib.M38A
PCIE_A_R2D_C_P - @m38a_lib.M38A
PCIE_A_R2D_N - @m38a_lib.M38A
PCIE_A_R2D_P - @m38a_lib.M38A
PCIE_B_D2R_N - @m38a_lib.M38A
PCIE_B_D2R_P - @m38a_lib.M38A
PCIE_B_R2D_C_N - @m38a_lib.M38A
PCIE_B_R2D_C_P - @m38a_lib.M38A
PCIE_B_R2D_N - @m38a_lib.M38A
PCIE_B_R2D_P - @m38a_lib.M38A
PCIE_C_D2R_N - @m38a_lib.M38A
TP_PCIE_C_D2R_N - @m38a_lib.M38A
PCIE_C_D2R_P - @m38a_lib.M38A
TP_PCIE_C_D2R_P - @m38a_lib.M38A
PCIE_C_R2D_C_N - @m38a_lib.M38A
TP_PCIE_C_R2D_C_N - @m38a_lib.M38A
PCIE_C_R2D_C_P - @m38a_lib.M38A
TP_PCIE_C_R2D_C_P - @m38a_lib.M38A
PCIE_D_D2R_N - @m38a_lib.M38A
TP_PCIE_D_D2R_N - @m38a_lib.M38A
PCIE_D_D2R_P - @m38a_lib.M38A
TP_PCIE_D_D2R_P - @m38a_lib.M38A
PCIE_D_R2D_C_N - @m38a_lib.M38A
TP_PCIE_D_R2D_C_N - @m38a_lib.M38A
PCIE_D_R2D_C_P - @m38a_lib.M38A
TP_PCIE_D_R2D_C_P - @m38a_lib.M38A
PCIE_E_D2R_N - @m38a_lib.M38A
TP_PCIE_E_D2R_N - @m38a_lib.M38A
PCIE_E_D2R_P - @m38a_lib.M38A
TP_PCIE_E_D2R_P - @m38a_lib.M38A
PCIE_E_R2D_C_N - @m38a_lib.M38A
TP_PCIE_E_R2D_C_N - @m38a_lib.M38A
PCIE_E_R2D_C_P - @m38a_lib.M38A
TP_PCIE_E_R2D_C_P - @m38a_lib.M38A
PCIE_F_D2R_N - @m38a_lib.M38A
TP_PCIE_F_D2R_N - @m38a_lib.M38A
PCIE_F_D2R_P - @m38a_lib.M38A
TP_PCIE_F_D2R_P - @m38a_lib.M38A
PCIE_F_R2D_C_N - @m38a_lib.M38A
TP_PCIE_F_R2D_C_N - @m38a_lib.M38A
PCIE_F_R2D_C_P - @m38a_lib.M38A
TP_PCIE_F_R2D_C_P - @m38a_lib.M38A
PCIE_WAKE_L - @m38a_lib.M38A
PCI_AD<0> - @m38a_lib.M38A
PCI_AD<1> - @m38a_lib.M38A
PCI_AD<2> - @m38a_lib.M38A
PCI_AD<3> - @m38a_lib.M38A
PCI_AD<4> - @m38a_lib.M38A
PCI_AD<5> - @m38a_lib.M38A
PCI_AD<6> - @m38a_lib.M38A
PCI_AD<7> - @m38a_lib.M38A
PCI_AD<8> - @m38a_lib.M38A
PCI_AD<9> - @m38a_lib.M38A
PCI_AD<10> - @m38a_lib.M38A
PCI_AD<11> - @m38a_lib.M38A
PCI_AD<12> - @m38a_lib.M38A
PCI_AD<13> - @m38a_lib.M38A
PCI_AD<14> - @m38a_lib.M38A
PCI_AD<15> - @m38a_lib.M38A
PCI_AD<16> - @m38a_lib.M38A
14C6
14C6
14C6 20C5
14C6
14C6 20B5
14C6 20B5
14B6 20A5
5C7 14C4 34B4 34C2
5C7 14C4 34B4 34C2
5D4 12C4
12A6
12A6
12A6
12A6
12A6
12A6
6B7 14B7
5C7 14B6
14B6 22A6
14D6
14C6
16B4
16B4
16B8
16B8
17A4
17A4
17B4
68C7
68C7
68C1
68C1
68C1
68C1
68C1
44B3
44B3
47B1
59D5
58D7 59D6
59D5
58D7 59D6
59D5
58D7 59D6
59D5
58D7 59D6
59D5
58D7 59D6
59D5
58D7 59D6
68C7
68C7
68A3
22A6 26C3
26C2
59A8 59B7
94C2 94C3
23B3 23C3
41D5
41D5
5B8 22D4 41D4
5C8 22D4 41D4
22D4 41C3
22D4 41C3
41C5
41C5
5B8 22D4 53C7
5B8 22D4 53C7
22D4 53B7
22D4 53B7
53B6
53B6
22D4 54D8
54D6
22D4 54D8
54D6
22D4 54D8
54D6
22D4 54D8
54D6
22D4 54C8
54C6
22D4 54C8
54C6
22D4 54D8
54D6
22D4 54D8
54D6
22C4 54C8
54C6
22C4 54C8
54C6
22C4 54C8
54C6
22C4 54C8
54C6
22C4 54B8
54B6
22C4 54B8
54B6
22C4 54C8
54C6
22C4 54B8
54B6
23C8 41C4 53C7
22B7 44D5
22B7 44D5
22B7 44D5
22B7 44D5
22B7 44D5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
22B7 44C5
103
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
PCI_CLK_FW
PCI_CLK_PORT80
PCI_CLK_SB
PCI_CLK_SMC
PCI_CLK_TPM
PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
PCI_DEVSEL_L
PCI_FRAME_L
PCI_GNT1_L
PCI_IDSEL
PCI_IRDY_L
PCI_LOCK_L
PCI_PAR
PCI_PERR_L
PCI_PME_FW_L
PCI_REQ0_L
PCI_REQ1_L
PCI_REQ2_L
PCI_REQ3_L
PCI_RST_FW_L
PCI_RST_L
PCI_SERR_L
PCI_STOP_L
PCI_TRDY_L
PEG_COMP
PEG_D2R_C_N<0>
PEG_D2R_C_N<1>
PEG_D2R_C_N<2>
PEG_D2R_C_N<3>
PEG_D2R_C_N<4>
PEG_D2R_C_N<5>
PEG_D2R_C_N<6>
PEG_D2R_C_N<7>
PEG_D2R_C_N<8>
PEG_D2R_C_N<9>
PEG_D2R_C_N<10>
PEG_D2R_C_N<11>
PEG_D2R_C_N<12>
PEG_D2R_C_N<13>
PEG_D2R_C_N<14>
PEG_D2R_C_N<15>
PEG_D2R_C_P<0>
PEG_D2R_C_P<1>
PEG_D2R_C_P<2>
PEG_D2R_C_P<3>
PEG_D2R_C_P<4>
PEG_D2R_C_P<5>
PEG_D2R_C_P<6>
PEG_D2R_C_P<7>
PEG_D2R_C_P<8>
PEG_D2R_C_P<9>
PEG_D2R_C_P<10>
PEG_D2R_C_P<11>
PEG_D2R_C_P<12>
PEG_D2R_C_P<13>
PEG_D2R_C_P<14>
PEG_D2R_C_P<15>
PEG_D2R_N<0>
PEG_D2R_N<1>
PEG_D2R_N<2>
PEG_D2R_N<3>
PEG_D2R_N<4>
PEG_D2R_N<5>
PEG_D2R_N<6>
PEG_D2R_N<7>
PEG_D2R_N<8>
PEG_D2R_N<9>
PEG_D2R_N<10>
PEG_D2R_N<11>
PEG_D2R_N<12>
PEG_D2R_N<13>
PEG_D2R_N<14>
PEG_D2R_N<15>
PEG_D2R_P<0>
PEG_D2R_P<1>
PEG_D2R_P<2>
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P<5>
PEG_D2R_P<6>
PEG_D2R_P<7>
PEG_D2R_P<8>
PEG_D2R_P<9>
PEG_D2R_P<10>
PEG_D2R_P<11>
PEG_D2R_P<12>
PEG_D2R_P<13>
PEG_D2R_P<14>
PEG_D2R_P<15>
PEG_R2D_C_N<0>
PEG_R2D_C_N<1>
PEG_R2D_C_N<2>
PEG_R2D_C_N<3>
PEG_R2D_C_N<4>
PEG_R2D_C_N<5>
PEG_R2D_C_N<6>
PEG_R2D_C_N<7>
PEG_R2D_C_N<8>
PEG_R2D_C_N<9>
PEG_R2D_C_N<10>
PEG_R2D_C_N<11>
PEG_R2D_C_N<12>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_N<15>
PEG_R2D_C_P<0>
7
PCI_AD<17> - @m38a_lib.M38A
PCI_AD<18> - @m38a_lib.M38A
PCI_AD<19> - @m38a_lib.M38A
PCI_AD<20> - @m38a_lib.M38A
PCI_AD<21> - @m38a_lib.M38A
PCI_AD<22> - @m38a_lib.M38A
PCI_AD<23> - @m38a_lib.M38A
PCI_AD<24> - @m38a_lib.M38A
PCI_AD<25> - @m38a_lib.M38A
PCI_AD<26> - @m38a_lib.M38A
PCI_AD<27> - @m38a_lib.M38A
PCI_AD<28> - @m38a_lib.M38A
PCI_AD<29> - @m38a_lib.M38A
PCI_AD<30> - @m38a_lib.M38A
PCI_AD<31> - @m38a_lib.M38A
PCI_CLK_FW - @m38a_lib.M38A
PCI_CLK_PORT80 - @m38a_lib.M38A
PCI_CLK_SB - @m38a_lib.M38A
PCI_CLK_SMC - @m38a_lib.M38A
PCI_CLK_TPM - @m38a_lib.M38A
PCI_C_BE_L<0> - @m38a_lib.M38A
PCI_C_BE_L<1> - @m38a_lib.M38A
PCI_C_BE_L<2> - @m38a_lib.M38A
PCI_C_BE_L<3> - @m38a_lib.M38A
PCI_DEVSEL_L - @m38a_lib.M38A
PCI_FRAME_L - @m38a_lib.M38A
PCI_GNT1_L - @m38a_lib.M38A
PCI_IDSEL - @m38a_lib.M38A
PCI_IRDY_L - @m38a_lib.M38A
PCI_LOCK_L - @m38a_lib.M38A
PCI_PAR - @m38a_lib.M38A
PCI_PERR_L - @m38a_lib.M38A
PCI_PME_FW_L - @m38a_lib.M38A
PCI_REQ0_L - @m38a_lib.M38A
PCI_REQ1_L - @m38a_lib.M38A
PCI_REQ2_L - @m38a_lib.M38A
PCI_REQ3_L - @m38a_lib.M38A
PCI_RST_FW_L - @m38a_lib.M38A
PCI_RST_L - @m38a_lib.M38A
PCI_SERR_L - @m38a_lib.M38A
PCI_STOP_L - @m38a_lib.M38A
PCI_TRDY_L - @m38a_lib.M38A
PEG_COMP - @m38a_lib.M38A
PEG_D2R_C_N<0> - @m38a_lib.M38A
PEG_D2R_C_N<1> - @m38a_lib.M38A
PEG_D2R_C_N<2> - @m38a_lib.M38A
PEG_D2R_C_N<3> - @m38a_lib.M38A
PEG_D2R_C_N<4> - @m38a_lib.M38A
PEG_D2R_C_N<5> - @m38a_lib.M38A
PEG_D2R_C_N<6> - @m38a_lib.M38A
PEG_D2R_C_N<7> - @m38a_lib.M38A
PEG_D2R_C_N<8> - @m38a_lib.M38A
PEG_D2R_C_N<9> - @m38a_lib.M38A
PEG_D2R_C_N<10> - @m38a_lib.M38A
PEG_D2R_C_N<11> - @m38a_lib.M38A
PEG_D2R_C_N<12> - @m38a_lib.M38A
PEG_D2R_C_N<13> - @m38a_lib.M38A
PEG_D2R_C_N<14> - @m38a_lib.M38A
PEG_D2R_C_N<15> - @m38a_lib.M38A
PEG_D2R_C_P<0> - @m38a_lib.M38A
PEG_D2R_C_P<1> - @m38a_lib.M38A
PEG_D2R_C_P<2> - @m38a_lib.M38A
PEG_D2R_C_P<3> - @m38a_lib.M38A
PEG_D2R_C_P<4> - @m38a_lib.M38A
PEG_D2R_C_P<5> - @m38a_lib.M38A
PEG_D2R_C_P<6> - @m38a_lib.M38A
PEG_D2R_C_P<7> - @m38a_lib.M38A
PEG_D2R_C_P<8> - @m38a_lib.M38A
PEG_D2R_C_P<9> - @m38a_lib.M38A
PEG_D2R_C_P<10> - @m38a_lib.M38A
PEG_D2R_C_P<11> - @m38a_lib.M38A
PEG_D2R_C_P<12> - @m38a_lib.M38A
PEG_D2R_C_P<13> - @m38a_lib.M38A
PEG_D2R_C_P<14> - @m38a_lib.M38A
PEG_D2R_C_P<15> - @m38a_lib.M38A
PEG_D2R_N<0> - @m38a_lib.M38A
PEG_D2R_N<1> - @m38a_lib.M38A
PEG_D2R_N<2> - @m38a_lib.M38A
PEG_D2R_N<3> - @m38a_lib.M38A
PEG_D2R_N<4> - @m38a_lib.M38A
PEG_D2R_N<5> - @m38a_lib.M38A
PEG_D2R_N<6> - @m38a_lib.M38A
PEG_D2R_N<7> - @m38a_lib.M38A
PEG_D2R_N<8> - @m38a_lib.M38A
PEG_D2R_N<9> - @m38a_lib.M38A
PEG_D2R_N<10> - @m38a_lib.M38A
PEG_D2R_N<11> - @m38a_lib.M38A
PEG_D2R_N<12> - @m38a_lib.M38A
PEG_D2R_N<13> - @m38a_lib.M38A
PEG_D2R_N<14> - @m38a_lib.M38A
PEG_D2R_N<15> - @m38a_lib.M38A
PEG_D2R_P<0> - @m38a_lib.M38A
PEG_D2R_P<1> - @m38a_lib.M38A
PEG_D2R_P<2> - @m38a_lib.M38A
PEG_D2R_P<3> - @m38a_lib.M38A
PEG_D2R_P<4> - @m38a_lib.M38A
PEG_D2R_P<5> - @m38a_lib.M38A
PEG_D2R_P<6> - @m38a_lib.M38A
PEG_D2R_P<7> - @m38a_lib.M38A
PEG_D2R_P<8> - @m38a_lib.M38A
PEG_D2R_P<9> - @m38a_lib.M38A
PEG_D2R_P<10> - @m38a_lib.M38A
PEG_D2R_P<11> - @m38a_lib.M38A
PEG_D2R_P<12> - @m38a_lib.M38A
PEG_D2R_P<13> - @m38a_lib.M38A
PEG_D2R_P<14> - @m38a_lib.M38A
PEG_D2R_P<15> - @m38a_lib.M38A
PEG_R2D_C_N<0> - @m38a_lib.M38A
PEG_R2D_C_N<1> - @m38a_lib.M38A
PEG_R2D_C_N<2> - @m38a_lib.M38A
PEG_R2D_C_N<3> - @m38a_lib.M38A
PEG_R2D_C_N<4> - @m38a_lib.M38A
PEG_R2D_C_N<5> - @m38a_lib.M38A
PEG_R2D_C_N<6> - @m38a_lib.M38A
PEG_R2D_C_N<7> - @m38a_lib.M38A
PEG_R2D_C_N<8> - @m38a_lib.M38A
PEG_R2D_C_N<9> - @m38a_lib.M38A
PEG_R2D_C_N<10> - @m38a_lib.M38A
PEG_R2D_C_N<11> - @m38a_lib.M38A
PEG_R2D_C_N<12> - @m38a_lib.M38A
PEG_R2D_C_N<13> - @m38a_lib.M38A
PEG_R2D_C_N<14> - @m38a_lib.M38A
PEG_R2D_C_N<15> - @m38a_lib.M38A
PEG_R2D_C_P<0> - @m38a_lib.M38A
22B7 44C5
22B7 44C5
22A7 44C6
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44C5
22A7 44B5
34C4 44B5
34B4 60C1
5C8 22A6 34B4
34C4 58C7
34C4 67C6
22B6 44B5
22B6 44B5
22B6 44B5
22B6 44B5
22A6 26D2 44B5
22A7 26D2 44B5
22B6 44B5
44B5
22A6 26D2 44B5
22A6 26D2
22A6 44B5
22A6 26D2 44B5
22B5 44B5
22B6 26D2
22B6 26D2 44B5
22B6 26D2
22B6 26D2
44A7 44B5
22A6 44A8
22A6 26D2 44B5
22A6 26D2 44B5
22A6 26D2 44B5
13D3
84D3
84D3
84D3
84D3
84C3
84C3
84C3
84C3
84C3
84C3
84B3
84B3
84B3
84B3
84B3
84B3
84D3
84D3
84D3
84D3
84D3
84C3
84C3
84C3
84C3
84C3
84B3
84B3
84B3
84B3
84B3
84B3
13D3 84B1
13D3 84B1
13D3 84B1
13D3 84B1
13D3 84B1
13D3 84B1
13D3 84C1
13D3 84C1
13D3 84C1
13D3 84C1
13C3 84C1
13C3 84C1
13C3 84D1
13C3 84D1
13C3 84D1
13C3 84D1
13C3 84B1
13C3 84B1
13C3 84B1
13C3 84B1
13C3 84B1
13C3 84B1
13C3 84C1
13C3 84C1
13C3 84C1
13C3 84C1
13C3 84C1
13C3 84D1
13C3 84D1
13C3 84D1
13C3 84D1
13C3 84D1
13C3 84B5
13C3 84B5
13C3 84B5
13B3 84B5
13B3 84B5
13B3 84B5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84D5
13B3 84D5
13B3 84D5
13B3 84D5
13B3 84B5
PEG_R2D_C_P<1>
PEG_R2D_C_P<2>
PEG_R2D_C_P<3>
PEG_R2D_C_P<4>
PEG_R2D_C_P<5>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_P<8>
PEG_R2D_C_P<9>
PEG_R2D_C_P<10>
PEG_R2D_C_P<11>
PEG_R2D_C_P<12>
PEG_R2D_C_P<13>
PEG_R2D_C_P<14>
PEG_R2D_C_P<15>
PEG_R2D_N<0>
PEG_R2D_N<1>
PEG_R2D_N<2>
PEG_R2D_N<3>
PEG_R2D_N<4>
PEG_R2D_N<5>
PEG_R2D_N<6>
PEG_R2D_N<7>
PEG_R2D_N<8>
PEG_R2D_N<9>
PEG_R2D_N<10>
PEG_R2D_N<11>
PEG_R2D_N<12>
PEG_R2D_N<13>
PEG_R2D_N<14>
PEG_R2D_N<15>
PEG_R2D_P<0>
PEG_R2D_P<1>
PEG_R2D_P<2>
PEG_R2D_P<3>
PEG_R2D_P<4>
PEG_R2D_P<5>
PEG_R2D_P<6>
PEG_R2D_P<7>
PEG_R2D_P<8>
PEG_R2D_P<9>
PEG_R2D_P<10>
PEG_R2D_P<11>
PEG_R2D_P<12>
PEG_R2D_P<13>
PEG_R2D_P<14>
PEG_R2D_P<15>
PEG_RESET_L
PLT_RST_L
PM_BATLOW_L
PM_BMBUSY_L
PM_CLKRUN_L
PEG_R2D_C_P<1> - @m38a_lib.M38A
PEG_R2D_C_P<2> - @m38a_lib.M38A
PEG_R2D_C_P<3> - @m38a_lib.M38A
PEG_R2D_C_P<4> - @m38a_lib.M38A
PEG_R2D_C_P<5> - @m38a_lib.M38A
PEG_R2D_C_P<6> - @m38a_lib.M38A
PEG_R2D_C_P<7> - @m38a_lib.M38A
PEG_R2D_C_P<8> - @m38a_lib.M38A
PEG_R2D_C_P<9> - @m38a_lib.M38A
PEG_R2D_C_P<10> - @m38a_lib.M38A
PEG_R2D_C_P<11> - @m38a_lib.M38A
PEG_R2D_C_P<12> - @m38a_lib.M38A
PEG_R2D_C_P<13> - @m38a_lib.M38A
PEG_R2D_C_P<14> - @m38a_lib.M38A
PEG_R2D_C_P<15> - @m38a_lib.M38A
PEG_R2D_N<0> - @m38a_lib.M38A
PEG_R2D_N<1> - @m38a_lib.M38A
PEG_R2D_N<2> - @m38a_lib.M38A
PEG_R2D_N<3> - @m38a_lib.M38A
PEG_R2D_N<4> - @m38a_lib.M38A
PEG_R2D_N<5> - @m38a_lib.M38A
PEG_R2D_N<6> - @m38a_lib.M38A
PEG_R2D_N<7> - @m38a_lib.M38A
PEG_R2D_N<8> - @m38a_lib.M38A
PEG_R2D_N<9> - @m38a_lib.M38A
PEG_R2D_N<10> - @m38a_lib.M38A
PEG_R2D_N<11> - @m38a_lib.M38A
PEG_R2D_N<12> - @m38a_lib.M38A
PEG_R2D_N<13> - @m38a_lib.M38A
PEG_R2D_N<14> - @m38a_lib.M38A
PEG_R2D_N<15> - @m38a_lib.M38A
PEG_R2D_P<0> - @m38a_lib.M38A
PEG_R2D_P<1> - @m38a_lib.M38A
PEG_R2D_P<2> - @m38a_lib.M38A
PEG_R2D_P<3> - @m38a_lib.M38A
PEG_R2D_P<4> - @m38a_lib.M38A
PEG_R2D_P<5> - @m38a_lib.M38A
PEG_R2D_P<6> - @m38a_lib.M38A
PEG_R2D_P<7> - @m38a_lib.M38A
PEG_R2D_P<8> - @m38a_lib.M38A
PEG_R2D_P<9> - @m38a_lib.M38A
PEG_R2D_P<10> - @m38a_lib.M38A
PEG_R2D_P<11> - @m38a_lib.M38A
PEG_R2D_P<12> - @m38a_lib.M38A
PEG_R2D_P<13> - @m38a_lib.M38A
PEG_R2D_P<14> - @m38a_lib.M38A
PEG_R2D_P<15> - @m38a_lib.M38A
PEG_RESET_L - @m38a_lib.M38A
PLT_RST_L - @m38a_lib.M38A
PM_BATLOW_L - @m38a_lib.M38A
PM_BMBUSY_L - @m38a_lib.M38A
PM_CLKRUN_L - @m38a_lib.M38A
PM_DPRSLPVR
PM_EXTTS_L<0>
PM_DPRSLPVR - @m38a_lib.M38A
PM_EXTTS_L<0> - @m38a_lib.M38A
DIMM_OVERTEMP_L - @m38a_lib.M38A
PM_LAN_ENABLE - @m38a_lib.M38A
PM_PWRBTN_L - @m38a_lib.M38A
PM_PWROK - @m38a_lib.M38A
PM_RI_L - @m38a_lib.M38A
PM_RSMRST_L - @m38a_lib.M38A
PM_SB_PWROK - @m38a_lib.M38A
PM_SLP_S3 - @m38a_lib.M38A
PM_SLP_S3_L - @m38a_lib.M38A
PM_LAN_ENABLE
PM_PWRBTN_L
PM_PWROK
PM_RI_L
PM_RSMRST_L
PM_SB_PWROK
PM_SLP_S3
PM_SLP_S3_L
PM_SLP_S4
PM_SLP_S4_L
PM_SLP_S5_L
PM_STPCPU_L
PM_STPPCI_L
PM_SUS_STAT_L
PM_SYSRST_L
PM_THRMTRIP_L
PM_THRM_L
POWER_BUTTON_L
PP0V9_S0_PGOOD
PP1V2_S0_GPU_VDDPLL
PP1V05_S0_PGOOD
PP1V5_S0_NB_3GPLL_F
PP1V5_S0_NB_VCC3G
PP1V5_S0_NB_VCCA_3GP
LL
PP1V5_S0_NB_VCCA_DPL
LA
PP1V5_S0_NB_VCCA_DPL
LB
PP1V5_S0_NB_VCCA_HPL
L
PP1V5_S0_NB_VCCA_MPL
L
PP1V5_S0_PGOOD
PP1V5_S0_SB_R
PP1V5_S0_SB_VCC1_5_B
PP1V5_S0_SB_VCCDMIPL
L
PP1V8R2V0_S0_GPU_VDD
RH0
PP1V8R2V0_S0_GPU_VDD
RH1
PP1V8R3V3_S0_GPU_VDD
R4_F
PP1V8R3V3_S0_GPU_VDD
R5_F
PP1V8_FB_A0_VDDA0
PP1V8_FB_A0_VDDA1
PP1V8_FB_A1_VDDA0
PP1V8_FB_A1_VDDA1
PP1V8_FB_B0_VDDA0
PP1V8_FB_B0_VDDA1
PP1V8_FB_B1_VDDA0
PP1V8_FB_B1_VDDA1
PP1V8_S3_PGOOD
PP2V5 S0_PGOOD
PP2V5_ENET_CTAP
PP2V5_S0_GPU_A2VDD
PP2V5_S0_GPU_AVDD
PP2V5_S0_GPU_LPVDD
PP2V5_S0_GPU_LVDDR
MEMVTT_EN - @m38a_lib.M38A
PM_SLP_S4 - @m38a_lib.M38A
PM_SLP_S4_L - @m38a_lib.M38A
PM_SLP_S5_L - @m38a_lib.M38A
PM_STPCPU_L - @m38a_lib.M38A
PM_STPPCI_L - @m38a_lib.M38A
PM_SUS_STAT_L - @m38a_lib.M38A
PM_SYSRST_L - @m38a_lib.M38A
PM_THRMTRIP_L - @m38a_lib.M38A
PM_THRM_L - @m38a_lib.M38A
POWER_BUTTON_L - @m38a_lib.M38A
PP0V9_S0_PGOOD - @m38a_lib.M38A
PP1V2_S0_GPU_VDDPLL @m38a_lib.M38A
PP1V05_S0_PGOOD - @m38a_lib.M38A
PP1V5_S0_NB_3GPLL_F @m38a_lib.M38A
PP1V5_S0_NB_VCC3G - @m38a_lib.M38A
PP1V5_S0_NB_VCCA_3GPLL @m38a_lib.M38A
PP1V5_S0_NB_VCCA_DPLLA @m38a_lib.M38A
TP_NB_VCCA_DPLLA - @m38a_lib.M38A
PP1V5_S0_NB_VCCA_DPLLB @m38a_lib.M38A
TP_NB_VCCA_DPLLB - @m38a_lib.M38A
PP1V5_S0_NB_VCCA_HPLL @m38a_lib.M38A
PP1V5_S0_NB_VCCA_MPLL @m38a_lib.M38A
PP1V5_S0_PGOOD - @m38a_lib.M38A
PP1V5_S0_SB_R - @m38a_lib.M38A
PP1V5_S0_SB_VCC1_5_B @m38a_lib.M38A
PP1V5_S0_SB_VCCDMIPLL @m38a_lib.M38A
PP1V8R2V0_S0_GPU_VDDRH0 @m38a_lib.M38A
PP1V8R2V0_S0_GPU_VDDRH1 @m38a_lib.M38A
PP1V8R3V3_S0_GPU_VDDR4_F @m38a_lib.M38A
PP1V8R3V3_S0_GPU_VDDR5_F @m38a_lib.M38A
PP1V8_FB_A0_VDDA0 - @m38a_lib.M38A
PP1V8_FB_A0_VDDA1 - @m38a_lib.M38A
PP1V8_FB_A1_VDDA0 - @m38a_lib.M38A
PP1V8_FB_A1_VDDA1 - @m38a_lib.M38A
PP1V8_FB_B0_VDDA0 - @m38a_lib.M38A
PP1V8_FB_B0_VDDA1 - @m38a_lib.M38A
PP1V8_FB_B1_VDDA0 - @m38a_lib.M38A
PP1V8_FB_B1_VDDA1 - @m38a_lib.M38A
PP1V8_S3_PGOOD - @m38a_lib.M38A
PP2V5 S0_PGOOD - @m38a_lib.M38A
PP2V5_ENET_CTAP - @m38a_lib.M38A
PP2V5_S0_GPU_A2VDD - @m38a_lib.M38A
PP2V5_S0_GPU_AVDD - @m38a_lib.M38A
PP2V5_S0_GPU_LPVDD - @m38a_lib.M38A
PP2V5_S0_GPU_LVDDR - @m38a_lib.M38A
13B3 84B5
13B3 84B5
13B3 84B5
13B3 84B5
13B3 84B5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84C5
13B3 84D5
13A3 84D5
13A3 84D5
13A3 84D5
13A3 84D5
84D4
84D4
84D4
84D4
84C4
84C4
84C4
84C4
84C4
84C4
84B4
84B4
84B4
84B4
84B4
84B4
84D4
84D4
84D4
84D4
84D4
84C4
84C4
84C4
84C4
84C4
84B4
84B4
84B4
84B4
84B4
84B4
6B7 84A5
6C8 22A6
23C1 58B7
14B6 23C5
5B8 23C8 44B5 58C5 60C4
67C6
14B7 23C3 75C7
14B7 58B7 59C5
28C3 29C3 59C6
23C3 58D7
23C3 58D7
77C5
23D5
23C1 58D7
23C3 26D6
77D7 78B8 80C8 81C8
6C8 23C3 58C5 77D8 79A7
88A6
31B5 79A6
77A8 77C7 79C8 83C6
23C3 58C5 77C8
23C3 58C5
23C8 33C4
23C8 33C4
23C5 58C5 60C1 67C6
5B8 23C5 26C3 58B7
7C6 14B6 21C2 59C7
10D3 23C8 58B7
5D1 59C8
77D6 79A2
91B6
PP2V5_S0_GPU_PVDD_F
PP2V5_S0_GPU_TPVDD
PP2V5_S0_GPU_TXVDDR
PP2V5_S0_GPU_VDD1DI
PP2V5_S0_GPU_VDD2DI
PP3V3R12V_LCD_CONN
PP3V3_AUDIO_SPDIF_EM
I
PP3V3_AUDIO_SPDIF_JA
CK
PP3V3_AVCC_SMC
PP3V3_AVREF_SMC
PP3V3_FW_ESD
PP3V3_FW_ESD_F
PP3V3_INTERCON
PP3V3_LCD_SW
PP3V3_S0_CK410_VDD48
PP3V3_S0_CK410_VDDA
PP3V3_S0_CK410_VDD_C
PU_SRC
PP3V3_S0_CK410_VDD_P
CI
PP3V3_S0_CK410_VDD_R
EF
PP3V3_S0_IMVP6_3V3
PP3V3_S5_FW_VDDA
PP3V3_S5_SB_RTC
PP3V3_SO_2V5REG_R
PP3V3_TPM_3VSB
PP4V5_AUDIO_ANALOG
PP5V_BNDI_LE340
PP5V_S0_DDC
PP5V_S0_DDC_FUSE
PP5V_S0_GPUVCORE_VCC
PP5V_S0_IMVP6_VDD
PP5V_S0_SB_V5REF
PP5V_S3_BNDI
PP5V_S5_SB_V5REF_SUS
PP5V_USB2_PORT0
PP5V_USB2_PORT0_F
PP5V_USB2_PORT1
PP5V_USB2_PORT1_F
PP5V_USB2_PORT2
PP5V_USB2_PORT2_F
PP12V_AUD_SPKRAMP_PL
ANE
PP12V_L7502
PP12V_S5_CPU_REG
PPFW_PORT0_VP
PPFW_PORT0_VP_FL
PPFW_PORT1_VP_FL
PPVCORE_S0_GPU_MPVDD
PPVCORE_S0_GPU_VDDCI
PPVIN_S5_IMVP6_VIN
PPV_3V3_AUDIO_CODEC
Q4201_3
Q5950_1
R6000_1
R6001_1
R6002_1
R6003_2
R7504_1
R7507_1
R8599_2
RSMRST_PWRGD
SATA_A_D2R_N
77D6 81B2
19A5
SATA_A_D2R_P
17D6 19A3
17D6 19A3
SATA_A_R2D_C_N
SATA_A_R2D_C_P
17C6 19C4
SATA_C_D2R_C_N
SATA_C_D2R_C_P
SATA_C_D2R_N
SATA_C_D2R_P
SATA_C_DET_L
SATA_C_PWR_EN_L
SATA_C_R2D_C_N
SATA_C_R2D_C_P
SATA_C_R2D_N
SATA_C_R2D_P
SATA_RBIAS_N
19C5
17C6 19C4
19C5
17C6 19C6
17C6 19C6
77D6 80B2
25A7
22C1 24D5 25B7
24B5 25A6
87A7
SB_A20GATE
SB_ACZ_BITCLK
SB_ACZ_RST_L
SB_ACZ_SDATAOUT
SB_ACZ_SYNC
SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR
SB_CLK100M_DMI_N
SB_CLK100M_DMI_P
SB_CLK100M_SATA_N
SB_CLK100M_SATA_OE_L
87B3
91B6
91B6
89D7
89D7
89D4
89D4
90D7
90D7
90D4
90D4
79B2
77C6 77D3
43D7
93B7
93C7
93B7
93B7
SB_CLK100M_SATA_P
SB_CRT_TVOUT_MUX
SB_GPIO2
SB_GPIO3
SB_GPIO4
SB_GPIO19
SB_GPIO21
SB_GPIO26
SB_GPIO29
SB_GPIO30
SB_GPIO31
PP2V5_S0_GPU_PVDD_F @m38a_lib.M38A
PP2V5_S0_GPU_TPVDD - @m38a_lib.M38A
PP2V5_S0_GPU_TXVDDR @m38a_lib.M38A
PP2V5_S0_GPU_VDD1DI @m38a_lib.M38A
PP2V5_S0_GPU_VDD2DI @m38a_lib.M38A
PP3V3R12V_LCD_CONN - @m38a_lib.M38A
PP3V3_AUDIO_SPDIF_EMI @m38a_lib.M38A
PP3V3_AUDIO_SPDIF_JACK @m38a_lib.M38A
PP3V3_AVCC_SMC - @m38a_lib.M38A
PP3V3_AVREF_SMC - @m38a_lib.M38A
PP3V3_FW_ESD - @m38a_lib.M38A
PP3V3_FW_ESD_F - @m38a_lib.M38A
PP3V3_INTERCON - @m38a_lib.M38A
PP3V3_LCD_SW - @m38a_lib.M38A
PP3V3_S0_CK410_VDD48 @m38a_lib.M38A
PP3V3_S0_CK410_VDDA @m38a_lib.M38A
PP3V3_S0_CK410_VDD_CPU_SRC @m38a_lib.M38A
PP3V3_S0_CK410_VDD_PCI @m38a_lib.M38A
PP3V3_S0_CK410_VDD_REF @m38a_lib.M38A
PP3V3_S0_IMVP6_3V3 - @m38a_lib.M38A
PP3V3_S5_FW_VDDA - @m38a_lib.M38A
PP3V3_S5_SB_RTC - @m38a_lib.M38A
PP3V3_SO_2V5REG_R - @m38a_lib.M38A
PP3V3_TPM_3VSB - @m38a_lib.M38A
PP4V5_AUDIO_ANALOG - @m38a_lib.M38A
PP5V_BNDI_LE340 - @m38a_lib.M38A
PP5V_S0_DDC - @m38a_lib.M38A
PP5V_S0_DDC_FUSE - @m38a_lib.M38A
PP5V_S0_GPUVCORE_VCC @m38a_lib.M38A
PP5V_S0_IMVP6_VDD - @m38a_lib.M38A
PP5V_S0_SB_V5REF - @m38a_lib.M38A
PP5V_S3_BNDI - @m38a_lib.M38A
PP5V_S5_SB_V5REF_SUS @m38a_lib.M38A
PP5V_USB2_PORT0 - @m38a_lib.M38A
PP5V_USB2_PORT0_F - @m38a_lib.M38A
PP5V_USB2_PORT1 - @m38a_lib.M38A
PP5V_USB2_PORT1_F - @m38a_lib.M38A
PP5V_USB2_PORT2 - @m38a_lib.M38A
PP5V_USB2_PORT2_F - @m38a_lib.M38A
PP12V_AUD_SPKRAMP_PLANE @m38a_lib.M38A
PP12V_L7502 - @m38a_lib.M38A
PP12V_S5_CPU_REG - @m38a_lib.M38A
PPFW_PORT0_VP - @m38a_lib.M38A
PPFW_PORT1_VP - @m38a_lib.M38A
PPFW_PORTS_VP - @m38a_lib.M38A
PPFW_PORT0_VP_FL - @m38a_lib.M38A
PPFW_PORT1_VP_FL - @m38a_lib.M38A
PPVCORE_S0_GPU_MPVDD @m38a_lib.M38A
PPVCORE_S0_GPU_VDDCI @m38a_lib.M38A
PPVIN_S5_IMVP6_VIN - @m38a_lib.M38A
PPV_3V3_AUDIO_CODEC @m38a_lib.M38A
Q4201_3 - @m38a_lib.M38A
Q5950_1 - @m38a_lib.M38A
R6000_1 - @m38a_lib.M38A
R6001_1 - @m38a_lib.M38A
R6002_1 - @m38a_lib.M38A
R6003_2 - @m38a_lib.M38A
R7504_1 - @m38a_lib.M38A
R7507_1 - @m38a_lib.M38A
R8599_2 - @m38a_lib.M38A
RSMRST_PWRGD - @m38a_lib.M38A
SATA_A_D2R_N - @m38a_lib.M38A
TP_SATA_A_D2R_N - @m38a_lib.M38A
SATA_A_D2R_P - @m38a_lib.M38A
TP_SATA_A_D2R_P - @m38a_lib.M38A
SATA_A_R2D_C_N - @m38a_lib.M38A
TP_SATA_A_R2D_N - @m38a_lib.M38A
SATA_A_R2D_C_P - @m38a_lib.M38A
TP_SATA_A_R2D_P - @m38a_lib.M38A
SATA_C_D2R_C_N - @m38a_lib.M38A
SATA_C_D2R_C_P - @m38a_lib.M38A
SATA_C_D2R_N - @m38a_lib.M38A
SATA_C_D2R_P - @m38a_lib.M38A
SATA_C_DET_L - @m38a_lib.M38A
SATA_C_PWR_EN_L - @m38a_lib.M38A
SATA_C_R2D_C_N - @m38a_lib.M38A
SATA_C_R2D_C_P - @m38a_lib.M38A
SATA_C_R2D_N - @m38a_lib.M38A
SATA_C_R2D_P - @m38a_lib.M38A
SATA_RBIAS_N - @m38a_lib.M38A
SATA_RBIAS_P - @m38a_lib.M38A
SATA_RBIAS - @m38a_lib.M38A
SATA_RBIAS_P - @m38a_lib.M38A
SATA_RBIAS - @m38a_lib.M38A
SB_A20GATE - @m38a_lib.M38A
SB_ACZ_BITCLK - @m38a_lib.M38A
SB_ACZ_RST_L - @m38a_lib.M38A
SB_ACZ_SDATAOUT - @m38a_lib.M38A
SB_ACZ_SYNC - @m38a_lib.M38A
SB_CLK14P3M_TIMER - @m38a_lib.M38A
SB_CLK48M_USBCTLR - @m38a_lib.M38A
SB_CLK100M_DMI_N - @m38a_lib.M38A
SB_CLK100M_DMI_P - @m38a_lib.M38A
SB_CLK100M_SATA_N - @m38a_lib.M38A
SB_CLK100M_SATA_OE_L @m38a_lib.M38A
SB_CLK100M_SATA_P - @m38a_lib.M38A
SB_CRT_TVOUT_MUX - @m38a_lib.M38A
SB_GPIO2 - @m38a_lib.M38A
SB_GPIO3 - @m38a_lib.M38A
SB_GPIO4 - @m38a_lib.M38A
SB_GPIO19 - @m38a_lib.M38A
SB_GPIO21 - @m38a_lib.M38A
SB_GPIO26 - @m38a_lib.M38A
SB_GPIO29 - @m38a_lib.M38A
SB_GPIO30 - @m38a_lib.M38A
SB_GPIO31 - @m38a_lib.M38A
91A6
93C7
93C7
93C8
93B8
94A6 94A6 94A7 94C5
73B7
73B5 73D8
58D3
58D2 59A3
46A5 46A6 46B5 46C5 46D5
46A7
72C7
94C6
33D5
33C6
33D6
33D5
33C5
75D6
44D5 45C6
5D2 21D6 24B3 25A3 26D7
77D3
59C5 67C4
68A2 68D2 74C4 74D8
47D3
97D4
97D5
85D7 88D8
75D6
24D5 25D7
47B2 47D1
24D5 25C7
47D6
47D4
47C6
47C5
47B6
47B4
72D5
76D7
75C3 75D4 75D7 76C8 76D6
46D2
46B2 46D1
46D3
46C2
46B2
91A6
86C7
75D6
68D6
42D6
60A7
60A6
60A6
60A6
60A5
75A8 75C1
75A6 75B1
85C4
58D7 76D1
21B6 38A6
38A5
21B6 38A6
38A5
21B6 38A6
38A5
21B6 38A6
38A5
38B8
38B8
21B6 38B6
21B6 38B6
23D2 38B5
23A3 23B3
21B6 38B6
21B6 38B6
38B8
38B8
21B6 38C7
21B6 38C7
38C7
21B6 38C7
38C7
21C4
21C6
21C6
21C6
21C6
5B8 23D3 34D4
5B8 23D3 34C4
5B8 22C2 34A4 34C2
5B8 22C2 34A4 34C2
5C8 21B6 34B4 34C2
23C3 33B4
5C8 21B6 34B4 34C2
22B5
22A6 26C2
22A6 26C2
22A6 26C2
23D3
23D3
23C7
22C4 22D8
22C4 22D8
22C4 22D8
SB_GPIO37
SB_INTVRMEN
SB_RTC_RST_L
SB_RTC_X1
SB_RTC_X2
SB_SM_INTRUDER_L
SB_SPKR
SC_RX_L
SC_TX_L
SDVO_CTRLCLK
SB_GPIO37 - @m38a_lib.M38A
SB_INTVRMEN - @m38a_lib.M38A
SB_RTC_RST_L - @m38a_lib.M38A
SB_RTC_X1 - @m38a_lib.M38A
SB_RTC_X2 - @m38a_lib.M38A
SB_SM_INTRUDER_L - @m38a_lib.M38A
SB_SPKR - @m38a_lib.M38A
SC_RX_L - @m38a_lib.M38A
SC_TX_L - @m38a_lib.M38A
SDVO_CTRLCLK - @m38a_lib.M38A
TP_SDVO_CTRLCLK - @m38a_lib.M38A
SDVO_CTRLDATA
SDVO_CTRLDATA - @m38a_lib.M38A
TP_SDVO_CTRLDATA - @m38a_lib.M38A
SMB_ALERT_L
SMB_ALERT_L - @m38a_lib.M38A
SMB_BSA_CLK
SMB_BSA_CLK - @m38a_lib.M38A
SMB_BSA_DATA
SMB_BSA_DATA - @m38a_lib.M38A
SMB_BSB_CLK
SMB_BSB_CLK - @m38a_lib.M38A
SMB_BSB_DATA
SMB_BSB_DATA - @m38a_lib.M38A
SMB_LINK_ALERT_L
SMB_LINK_ALERT_L - @m38a_lib.M38A
SMC_ADAPTER_EN
SMC_ADAPTER_EN - @m38a_lib.M38A
TP_SMC_ADAPTER_EN - @m38a_lib.M38A
SMC_ANALOG_ID
SMC_ANALOG_ID - @m38a_lib.M38A
NC_SMC_ANALOG_ID - @m38a_lib.M38A
SMC_BATT_CHG_EN
SMC_BATT_CHG_EN - @m38a_lib.M38A
NC_SMC_BATT_CHG_EN - @m38a_lib.M38A
SMC_BATT_ISENSE
SMC_BATT_ISENSE - @m38a_lib.M38A
UNUSED_SMC_SENSE - @m38a_lib.M38A
SMC_FWIRE_ISENSE - @m38a_lib.M38A
UNUSED_SMC_SENSE - @m38a_lib.M38A
SMC_FWIRE_ISENSE - @m38a_lib.M38A
SMC_BATT_ISET
SMC_BATT_ISET - @m38a_lib.M38A
NC_SMC_BATT_ISET - @m38a_lib.M38A
SMC_BATT_TRICKLE_EN_ SMC_BATT_TRICKLE_EN_L L
@m38a_lib.M38A
NC_SMC_BATT_TRICKLE_EN_L @m38a_lib.M38A
SMC_BATT_VSET
SMC_BATT_VSET - @m38a_lib.M38A
NC_SMC_BATT_VSET - @m38a_lib.M38A
SMC_BC_ACOK
SMC_BC_ACOK - @m38a_lib.M38A
SMC_BS_ALRT_L
SMC_BS_ALRT_L - @m38a_lib.M38A
SMC_CASE_OPEN
SMC_CASE_OPEN - @m38a_lib.M38A
SMC_CPU_ISENSE
SMC_CPU_ISENSE - @m38a_lib.M38A
SMC_CPU_RESET_3_3_L SMC_CPU_RESET_3_3_L @m38a_lib.M38A
SMC_CPU_VSENSE
SMC_CPU_VSENSE - @m38a_lib.M38A
SMC_DCIN_ISENSE
SMC_DCIN_ISENSE - @m38a_lib.M38A
SMC_EXCARD_CP
SMC_EXCARD_CP - @m38a_lib.M38A
SMC_EXCARD_PWR_EN
SMC_EXCARD_PWR_EN - @m38a_lib.M38A
TP_SMC_EXCARD_PWR_EN @m38a_lib.M38A
SMC_EXCARD_PWR_OC_L SMC_EXCARD_PWR_OC_L @m38a_lib.M38A
SMC_EXTAL
SMC_EXTAL - @m38a_lib.M38A
SMC_EXTSMI_L
SMC_EXTSMI_L - @m38a_lib.M38A
SMC_FAN_0_CTL
SMC_FAN_0_CTL - @m38a_lib.M38A
FAN_RPM0 - @m38a_lib.M38A
SMC_FAN_0_TACH
SMC_FAN_0_TACH - @m38a_lib.M38A
SMC_FAN_1_CTL
SMC_FAN_1_CTL - @m38a_lib.M38A
FAN_RPM1 - @m38a_lib.M38A
SMC_FAN_1_TACH
SMC_FAN_1_TACH - @m38a_lib.M38A
SMC_FAN_2_CTL
SMC_FAN_2_CTL - @m38a_lib.M38A
FAN_RPM2 - @m38a_lib.M38A
SMC_FAN_2_TACH
SMC_FAN_2_TACH - @m38a_lib.M38A
SMC_FAN_3_CTL
SMC_FAN_3_CTL - @m38a_lib.M38A
TP_SMC_FAN_3_CTL - @m38a_lib.M38A
SMC_FAN_3_TACH
SMC_FAN_3_TACH - @m38a_lib.M38A
TP_SMC_FAN_3_TACH - @m38a_lib.M38A
SMC_FWE
SMC_FWE - @m38a_lib.M38A
SMC_GPU_VSENSE
SMC_GPU_VSENSE - @m38a_lib.M38A
SMC_LID
SMC_LID - @m38a_lib.M38A
SMC_LRESET_L
SMC_LRESET_L - @m38a_lib.M38A
SMC_MANUAL_RST_L
SMC_MANUAL_RST_L - @m38a_lib.M38A
SMC_MD1
SMC_MD1 - @m38a_lib.M38A
SMC_MEM_ISENSE
SMC_MEM_ISENSE - @m38a_lib.M38A
NC_SMC_MEM_ISENSE - @m38a_lib.M38A
SMC_NB_ISENSE
SMC_NB_ISENSE - @m38a_lib.M38A
NC_SMC_NB_ISENSE - @m38a_lib.M38A
SMC_NMI
SMC_NMI - @m38a_lib.M38A
SMC_ODD_DETECT
SMC_ODD_DETECT - @m38a_lib.M38A
SMC_ONOFF_L
SMC_ONOFF_L - @m38a_lib.M38A
SMC_PB7
SMC_PB7 - @m38a_lib.M38A
TP_SMC_PB7 - @m38a_lib.M38A
SMC_PBUS_VSENSE
SMC_PBUS_VSENSE - @m38a_lib.M38A
SMC_PBUS_VSENSE_R
SMC_PBUS_VSENSE_R - @m38a_lib.M38A
SMC_PF0
SMC_PF0 - @m38a_lib.M38A
TP_SMC_PF0 - @m38a_lib.M38A
SMC_PF1
SMC_PF1 - @m38a_lib.M38A
TP_SMC_PF1 - @m38a_lib.M38A
SMC_PM_G2_EN
SMC_PM_G2_EN - @m38a_lib.M38A
TP_PM_G2_EN - @m38a_lib.M38A
SMC_PROCHOT
SMC_PROCHOT - @m38a_lib.M38A
SMC_PROCHOT_3_3_L
SMC_PROCHOT_3_3_L - @m38a_lib.M38A
SMC_RCIN_L
SMC_RCIN_L - @m38a_lib.M38A
SMC_REF_GATE1
SMC_REF_GATE1 - @m38a_lib.M38A
SMC_REF_GATE2
SMC_REF_GATE2 - @m38a_lib.M38A
SMC_REF_IN
SMC_REF_IN - @m38a_lib.M38A
SMC_RSTGATE_L
SMC_RSTGATE_L - @m38a_lib.M38A
SMC_RST_L
SMC_RST_L - @m38a_lib.M38A
SMC_RUNTIME_SCI_L
SMC_RUNTIME_SCI_L - @m38a_lib.M38A
SMC_RX_L
SMC_RX_L - @m38a_lib.M38A
SMC_SB_NMI
SMC_SB_NMI - @m38a_lib.M38A
SMC_SMB_0_CLK
SMC_SMB_0_CLK - @m38a_lib.M38A
TP_SMC_SMB_0_CLK - @m38a_lib.M38A
SMC_SMB_0_DATA
SMC_SMB_0_DATA - @m38a_lib.M38A
TP_SMC_SMB_0_DATA - @m38a_lib.M38A
SMC_SYS_ISET
SMC_SYS_ISET - @m38a_lib.M38A
NC_SMC_SYS_ISET - @m38a_lib.M38A
SMC_SYS_KBDLED
SMC_SYS_KBDLED - @m38a_lib.M38A
TP_SMC_SYS_KBDLED - @m38a_lib.M38A
SMC_SYS_LED
SMC_SYS_LED - @m38a_lib.M38A
SMC_SYS_LED_16B
SMC_SYS_LED_16B - @m38a_lib.M38A
SMC_SYS_VSET
SMC_SYS_VSET - @m38a_lib.M38A
NC_SMC_SYS_VSET - @m38a_lib.M38A
SMC_TCK
SMC_TCK - @m38a_lib.M38A
SMC_TDI
SMC_TDI - @m38a_lib.M38A
SMC_TDO
SMC_TDO - @m38a_lib.M38A
SMC_THRMTRIP
SMC_THRMTRIP - @m38a_lib.M38A
SMC_TMS
SMC_TMS - @m38a_lib.M38A
SMC_TPM_GPIO
SMC_TPM_GPIO - @m38a_lib.M38A
SMC_TPM_PP
SMC_TPM_PP - @m38a_lib.M38A
SMC_TPM_RESET_L
SMC_TPM_RESET_L - @m38a_lib.M38A
SMC_TRST_L
SMC_TRST_L - @m38a_lib.M38A
SMC_TX_L
SMC_TX_L - @m38a_lib.M38A
SMC_VCL
SMC_VCL - @m38a_lib.M38A
2
23D3
21D6
21D6
21D6
21D6
21D6
23C5
58C5
58C5
14B6
19A1
14B6
19A1
23C5
58B5
58B5
58C5
58C7
23D5
58D5
59D3
58A7
59C5
58D7
59D5
58D5
59B5
58D5
59B5
58D5
58B5
59D5
58D7
1
26C7
26D7
26D7
26C7
59B6 59C4
59B4 59B6
19A2
19A2
59D1
59D1
59D1
59D1
59D5
59C6
59D6
59B6
59B5 59B6
59B6
59B5 59B6
59B6
59D6
59D6
59D5
58B5
59D5
58C5
58C5
58C5
58D5
58B5
59D6
58D5
58D5
58B7
58B7
59C3
76B2
76D5
59C4
59C5
59B4
59B4
59C1
76D2
59A7
58B7 59C4
58C3 59B8
23B8 58B7
58B7 65D8
65D7
58B7 65C8
58B7 65B8
65B7
58B7 65A8
58B7 66C7
66C7
58B7 66C8
58B7 59C5
59C3
58B7 59C5
59C3
58B5 59B4
58D5 59B3
58B5 59C1
6C7 58C7
5D1 59D8
58C1 60C3
58A7 59B6
59B5
58A7 59B6
59B5
58C1 60C2
58B7 59C4
58C5 59B7 59C4
59C5 59C5
59C3 59C3
58D5 76C6
76C8
58B5 59D5
59D3
58B5 59D5
59D3
58D5 59D5
59D3
58B5 59C7
58D5 59A7
21C3 58C7
59A5
59A4
59A4
58D7
58C3 59D7 60C2
23C8 58B7
5D1 58C7 59B4 59B5 60C2
23C3 58D7
58C7 59D1
59D1
58C5 59D1
59D1
58B5 59D6
59D5
58C7 59D5
59D3
58C7 60A8
58C7 60A8
58B5 59D6
59D5
5D1 58C5 59B4 60C2
5D1 58B5 59B4 60C2
5D1 58B5 59B4 60C3
58B5 59C7
5D1 58B5 59B4 60C3
58D5 59B6
58C7 59A6
58B7 59C6 67B7
5D1 58C1 60C3
5D1 58C7 59B4 59B5 60C3
58D3
104
8
SMC_WAKE_SCI_L
SMC_XDP_TCK
SMC_XDP_TCK_3_3
SMC_XDP_TDO_3_3_L
SMC_XDP_TMS_L
SMC_XDP_TRST_L
SMC_XTAL
SMLINK<0>
SMLINK<1>
SMS_INT_L
SMS_ONOFF_L
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SPARE_SRC3_N
SPARE_SRC3_P
SPARE_SRC7_N
SPARE_SRC7_P
SPI_ARB
SPI_CE_L
SPI_HOLD_L
SPI_SCLK
SPI_SCLK_R
SPI_SI
SPI_SI_R
SPI_SO
SPI_SO_R
SPI_WP_L
SPKRAMP_MUTE
SPKRAMP_SS
SUS_CLK_SB
SV_SET_UP
SW_RST_BTN_L
SW_RST_DEBNC
SYS_LED_BRT_D
SYS_LED_C
SYS_LED_CTL_B
SYS_LED_CTL_C
SYS_LED_CTL_D
SYS_ONEWIRE
SYS_POWERFAIL_L
SYS_PWRUP_L
THERM_DX_N
THERM_DX_P
THRM_ALERT_L
THRM_THM
TMDS_CK_TERM
TMDS_CLK_N
TMDS_CLK_P
TMDS_CONN_CLKN
TMDS_CONN_CLKP
TMDS_CONN_DN<0>
TMDS_CONN_DN<1>
TMDS_CONN_DN<2>
TMDS_CONN_DP<0>
TMDS_CONN_DP<1>
TMDS_CONN_DP<2>
TMDS_DATA_N<0>
TMDS_DATA_N<1>
TMDS_DATA_N<2>
TMDS_DATA_N<3>
TMDS_DATA_N<4>
TMDS_DATA_N<5>
TMDS_DATA_P<0>
TMDS_DATA_P<1>
TMDS_DATA_P<2>
TMDS_DATA_P<3>
TMDS_DATA_P<4>
TMDS_DATA_P<5>
TPM_BADD
TPM_GPIO1
TPM_GPIO2
TPM_LRESET_L
TPM_PP
TPM_RST_L
TPM_XTALI
TPM_XTALO
TP_ATI_ROMCS_L
TP_AZ_DOCK_EN_L
TP_AZ_DOCK_RST_L
TP_CLK14P3M_SPARE
TP_CPU_A32_L
TP_CPU_A33_L
TP_CPU_A34_L
TP_CPU_A35_L
TP_CPU_A36_L
TP_CPU_A37_L
TP_CPU_A38_L
TP_CPU_A39_L
TP_CPU_APM0_L
TP_CPU_APM1_L
TP_CPU_CPUSLP_L
TP_CPU_EXTBREF
TP_CPU_HFPLL
TP_CPU_SPARE0
TP_CPU_SPARE1
TP_CPU_SPARE2
TP_CPU_SPARE3
TP_CPU_SPARE4
TP_CPU_SPARE5
TP_CPU_SPARE6
TP_CPU_SPARE7
TP_FB_A_MA12
TP_FB_A_ODT<0>
TP_FB_A_ODT<1>
TP_FB_B_MA12
TP_FB_B_ODT<0>
TP_FB_B_ODT<1>
TP_FW_CNA
TP_FW_LKON
TP_FW_LPS
TP_FW_MPCIACT_L
TP_FW_NANDTREE
TP_FW_ROM_AD
TP_FW_VAUX_PRES
TP_LVDS_VBG
TP_MEM_A_A<14>
TP_MEM_A_A<15>
TP_MEM_B_A<14>
TP_MEM_B_A<15>
7
SMC_WAKE_SCI_L - @m38a_lib.M38A
SMC_XDP_TCK - @m38a_lib.M38A
SMC_XDP_TCK_3_3 - @m38a_lib.M38A
SMC_XDP_TDO_3_3_L - @m38a_lib.M38A
SMC_XDP_TMS_L - @m38a_lib.M38A
SMC_XDP_TRST_L - @m38a_lib.M38A
SMC_XTAL - @m38a_lib.M38A
SMLINK<0> - @m38a_lib.M38A
SMLINK<1> - @m38a_lib.M38A
SMS_INT_L - @m38a_lib.M38A
SMS_ONOFF_L - @m38a_lib.M38A
SMS_X_AXIS - @m38a_lib.M38A
NC_SMS_X_AXIS - @m38a_lib.M38A
SMS_Y_AXIS - @m38a_lib.M38A
NC_SMS_Y_AXIS - @m38a_lib.M38A
SMS_Z_AXIS - @m38a_lib.M38A
NC_SMS_Z_AXIS - @m38a_lib.M38A
SPARE_SRC3_N - @m38a_lib.M38A
SPARE_SRC3_P - @m38a_lib.M38A
SPARE_SRC7_N - @m38a_lib.M38A
SPARE_SRC7_P - @m38a_lib.M38A
SPI_ARB - @m38a_lib.M38A
SPI_CE_L - @m38a_lib.M38A
SPI_HOLD_L - @m38a_lib.M38A
SPI_SCLK - @m38a_lib.M38A
SPI_SCLK_R - @m38a_lib.M38A
SPI_SI - @m38a_lib.M38A
SPI_SI_R - @m38a_lib.M38A
SPI_SO - @m38a_lib.M38A
SPI_SO_R - @m38a_lib.M38A
SPI_WP_L - @m38a_lib.M38A
SPKRAMP_MUTE - @m38a_lib.M38A
SPKRAMP_SS - @m38a_lib.M38A
SUS_CLK_SB - @m38a_lib.M38A
SMC_SUS_CLK - @m38a_lib.M38A
SV_SET_UP - @m38a_lib.M38A
SW_RST_BTN_L - @m38a_lib.M38A
SW_RST_DEBNC - @m38a_lib.M38A
SYS_LED_BRT_D - @m38a_lib.M38A
SYS_LED_C - @m38a_lib.M38A
SYS_LED_CTL_B - @m38a_lib.M38A
SYS_LED_CTL_C - @m38a_lib.M38A
SYS_LED_CTL_D - @m38a_lib.M38A
SYS_ONEWIRE - @m38a_lib.M38A
SYS_POWERFAIL_L - @m38a_lib.M38A
SYS_PWRUP_L - @m38a_lib.M38A
THERM_DX_N - @m38a_lib.M38A
THERM_DX_P - @m38a_lib.M38A
THRM_ALERT_L - @m38a_lib.M38A
THRM_THM - @m38a_lib.M38A
TMDS_CK_TERM - @m38a_lib.M38A
TMDS_CLK_N - @m38a_lib.M38A
TMDS_CLK_P - @m38a_lib.M38A
TMDS_CONN_CLKN - @m38a_lib.M38A
TMDS_CONN_CLKP - @m38a_lib.M38A
TMDS_CONN_DN<0> - @m38a_lib.M38A
TMDS_CONN_DN<1> - @m38a_lib.M38A
TMDS_CONN_DN<2> - @m38a_lib.M38A
TMDS_CONN_DP<0> - @m38a_lib.M38A
TMDS_CONN_DP<1> - @m38a_lib.M38A
TMDS_CONN_DP<2> - @m38a_lib.M38A
TMDS_DATA_N<0> - @m38a_lib.M38A
TMDS_DATA_N<1> - @m38a_lib.M38A
TMDS_DATA_N<2> - @m38a_lib.M38A
TMDS_DATA_N<3> - @m38a_lib.M38A
TMDS_DATA_N<4> - @m38a_lib.M38A
TMDS_DATA_N<5> - @m38a_lib.M38A
TMDS_DATA_P<0> - @m38a_lib.M38A
TMDS_DATA_P<1> - @m38a_lib.M38A
TMDS_DATA_P<2> - @m38a_lib.M38A
TMDS_DATA_P<3> - @m38a_lib.M38A
TMDS_DATA_P<4> - @m38a_lib.M38A
TMDS_DATA_P<5> - @m38a_lib.M38A
TPM_BADD - @m38a_lib.M38A
TPM_GPIO1 - @m38a_lib.M38A
TPM_GPIO2 - @m38a_lib.M38A
TPM_LRESET_L - @m38a_lib.M38A
TPM_PP - @m38a_lib.M38A
TPM_RST_L - @m38a_lib.M38A
TPM_XTALI - @m38a_lib.M38A
TPM_XTALO - @m38a_lib.M38A
TP_ATI_ROMCS_L - @m38a_lib.M38A
TP_AZ_DOCK_EN_L - @m38a_lib.M38A
TP_AZ_DOCK_RST_L - @m38a_lib.M38A
TP_CLK14P3M_SPARE - @m38a_lib.M38A
TP_CPU_A32_L - @m38a_lib.M38A
TP_CPU_A33_L - @m38a_lib.M38A
TP_CPU_A34_L - @m38a_lib.M38A
TP_CPU_A35_L - @m38a_lib.M38A
TP_CPU_A36_L - @m38a_lib.M38A
TP_CPU_A37_L - @m38a_lib.M38A
TP_CPU_A38_L - @m38a_lib.M38A
TP_CPU_A39_L - @m38a_lib.M38A
TP_CPU_APM0_L - @m38a_lib.M38A
TP_CPU_APM1_L - @m38a_lib.M38A
TP_CPU_CPUSLP_L - @m38a_lib.M38A
TP_CPU_EXTBREF - @m38a_lib.M38A
TP_CPU_HFPLL - @m38a_lib.M38A
TP_CPU_SPARE0 - @m38a_lib.M38A
TP_CPU_SPARE1 - @m38a_lib.M38A
TP_CPU_SPARE2 - @m38a_lib.M38A
TP_CPU_SPARE3 - @m38a_lib.M38A
TP_CPU_SPARE4 - @m38a_lib.M38A
TP_CPU_SPARE5 - @m38a_lib.M38A
TP_CPU_SPARE6 - @m38a_lib.M38A
TP_CPU_SPARE7 - @m38a_lib.M38A
TP_FB_A_MA12 - @m38a_lib.M38A
TP_FB_A_ODT<0> - @m38a_lib.M38A
TP_FB_A_ODT<1> - @m38a_lib.M38A
TP_FB_B_MA12 - @m38a_lib.M38A
TP_FB_B_ODT<0> - @m38a_lib.M38A
TP_FB_B_ODT<1> - @m38a_lib.M38A
TP_FW_CNA - @m38a_lib.M38A
TP_FW_LKON - @m38a_lib.M38A
TP_FW_LPS - @m38a_lib.M38A
TP_FW_MPCIACT_L - @m38a_lib.M38A
TP_FW_NANDTREE - @m38a_lib.M38A
TP_FW_ROM_AD - @m38a_lib.M38A
TP_FW_VAUX_PRES - @m38a_lib.M38A
TP_LVDS_VBG - @m38a_lib.M38A
TP_MEM_A_A<14> - @m38a_lib.M38A
TP_MEM_A_A<15> - @m38a_lib.M38A
TP_MEM_B_A<14> - @m38a_lib.M38A
TP_MEM_B_A<15> - @m38a_lib.M38A
23C1 58D5
58C7
58B5 59A5
58B7 59A5
58C7
58C7
58C3 59B8
23D5
23D5
23C3 26C2
58A5 59B4
58B7 59B6
59B5
58B7 59B6
59B5
58A7 59B6
59B5
34D2
34D2
34D2
34D2
22C6 58D5
22C6 58B5
63C4
22C6 58D5
63C4
22C6 58D5
63C3
22C6 58D5
63C3
63C4
72B5
72B4
23C3 59B5
58C5 59B6
23B6 23C3
5D1 26C6
26C4
60B8
60A6
60B7
60B6
60A6
58B7 59B4
6D8 76D2
6C7
10B5 10C5
10B5 10C5
10D3
10C4
97C8
93C3 97C8
93C3 97C8
97C4 97C7
97C4 97C7
97C4 97D7
97C4 97D7
97C7 97D4
97C4 97D7
97C4 97D7
97C7 97D4
93C3 97D8
93C3 97D8
93C3 97C8
93C3 95D6
93C3 95D6
93C3 95D6
93C3 97D8
93C3 97C8
93C3 97C8
93C3 95D6
93C3 95D6
93C3 95D6
67C4
59B5 67C6
59B5 67C6
6B7 67B7
59A5 67C6
67B6
59B7 67C6
59B7 67C6
91A3
23C5
23C5
34C4
7C7
7B7
7B7
7B7
7B7
7B7
7B7
7B7
7B7
7B7
21C4
7B6
7B7
7B6
7B6
7B6
7B6
7B6
7B6
7B6
7B6
87D5
87B5
87B5
87D1
87B1
87B1
44B3
44B3
44B3
44B3
44B3
44B3
44B3
13D5
28C3
28C3
5B4 29C3
5B4 29C3
58B5
63C7
63C7
63C1
63C1
60C1
TP_NB_TESTIN_L
TP_NB_XOR_FSB2_H7
TP_NB_XOR_LVDS_A34
TP_NB_XOR_LVDS_A35
TP_NB_XOR_LVDS_D27
TP_NB_XOR_LVDS_D28
TP_PCI_CLK_SPARE
TP_PCI_GNT0_L
TP_PCI_GNT2_L
TP_PCI_GNT3_L
TP_PCI_GNT4_L
TP_PCI_PME_L
TP_SB_ACZ_SDIN1
TP_SB_ACZ_SDIN2
TP_SB_DRQ0_L
TP_SB_GPIO6
TP_SB_GPIO23
TP_SB_GPIO25_DO_NOT_
USE
TP_SB_GPIO38
TP_SB_RSVD9
TP_SB_SATALED_L
TP_SB_XOR_AD5
TP_SB_XOR_AD9
TP_SB_XOR_AE5
TP_SB_XOR_AE9
TP_SB_XOR_AG4
TP_SB_XOR_AG8
TP_SB_XOR_AH4
TP_SB_XOR_AH8
TP_SB_XOR_T5
TP_SB_XOR_U3
TP_SB_XOR_U5
TP_SB_XOR_U7
TP_SB_XOR_V3
TP_SB_XOR_V4
TP_SB_XOR_V6
TP_SB_XOR_V7
TP_SB_XOR_W1
TP_SB_XOR_W3
TP_SB_XOR_Y1
TP_SB_XOR_Y2
TP_U8400_AG14
TP_U8900_J2
TP_U8900_J3
TP_U8950_J2
TP_U8950_J3
TP_U9000_J2
TP_U9000_J3
TP_U9050_J2
TP_U9050_J3
TSENSE_GPU_DXP
TSENSE_NB_DXP
TSENSE_NB_GPU_DXN
TV_DACA_OUT
TP_NB_TESTIN_L - @m38a_lib.M38A
TP_NB_XOR_FSB2_H7 - @m38a_lib.M38A
TP_NB_XOR_LVDS_A34 - @m38a_lib.M38A
TP_NB_XOR_LVDS_A35 - @m38a_lib.M38A
TP_NB_XOR_LVDS_D27 - @m38a_lib.M38A
TP_NB_XOR_LVDS_D28 - @m38a_lib.M38A
TP_PCI_CLK_SPARE - @m38a_lib.M38A
TP_PCI_GNT0_L - @m38a_lib.M38A
TP_PCI_GNT2_L - @m38a_lib.M38A
TP_PCI_GNT3_L - @m38a_lib.M38A
TP_PCI_GNT4_L - @m38a_lib.M38A
TP_PCI_PME_L - @m38a_lib.M38A
TP_SB_ACZ_SDIN1 - @m38a_lib.M38A
TP_SB_ACZ_SDIN2 - @m38a_lib.M38A
TP_SB_DRQ0_L - @m38a_lib.M38A
TP_SB_GPIO6 - @m38a_lib.M38A
TP_SB_GPIO23 - @m38a_lib.M38A
TP_SB_GPIO25_DO_NOT_USE @m38a_lib.M38A
TP_SB_GPIO38 - @m38a_lib.M38A
TP_SB_RSVD9 - @m38a_lib.M38A
TP_SB_SATALED_L - @m38a_lib.M38A
TP_SB_XOR_AD5 - @m38a_lib.M38A
TP_SB_XOR_AD9 - @m38a_lib.M38A
TP_SB_XOR_AE5 - @m38a_lib.M38A
TP_SB_XOR_AE9 - @m38a_lib.M38A
TP_SB_XOR_AG4 - @m38a_lib.M38A
TP_SB_XOR_AG8 - @m38a_lib.M38A
TP_SB_XOR_AH4 - @m38a_lib.M38A
TP_SB_XOR_AH8 - @m38a_lib.M38A
TP_SB_XOR_T5 - @m38a_lib.M38A
TP_SB_XOR_U3 - @m38a_lib.M38A
TP_SB_XOR_U5 - @m38a_lib.M38A
TP_SB_XOR_U7 - @m38a_lib.M38A
TP_SB_XOR_V3 - @m38a_lib.M38A
TP_SB_XOR_V4 - @m38a_lib.M38A
TP_SB_XOR_V6 - @m38a_lib.M38A
TP_SB_XOR_V7 - @m38a_lib.M38A
TP_SB_XOR_W1 - @m38a_lib.M38A
TP_SB_XOR_W3 - @m38a_lib.M38A
TP_SB_XOR_Y1 - @m38a_lib.M38A
TP_SB_XOR_Y2 - @m38a_lib.M38A
TP_U8400_AG14 - @m38a_lib.M38A
TP_U8900_J2 - @m38a_lib.M38A
TP_U8900_J3 - @m38a_lib.M38A
TP_U8950_J2 - @m38a_lib.M38A
TP_U8950_J3 - @m38a_lib.M38A
TP_U9000_J2 - @m38a_lib.M38A
TP_U9000_J3 - @m38a_lib.M38A
TP_U9050_J2 - @m38a_lib.M38A
TP_U9050_J3 - @m38a_lib.M38A
TSENSE_GPU_DXP - @m38a_lib.M38A
TSENSE_NB_DXP - @m38a_lib.M38A
TSENSE_NB_GPU_DXN - @m38a_lib.M38A
TV_DACA_OUT - @m38a_lib.M38A
TV_DACB_OUT - @m38a_lib.M38A
TV_DACC_OUT - @m38a_lib.M38A
TV_IRTNA - @m38a_lib.M38A
TV_IRTNB - @m38a_lib.M38A
TV_IRTNC - @m38a_lib.M38A
TV_IREF - @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVBG @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVDACC @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVDACB @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVDACA @m38a_lib.M38A
PP1V5_S0_NB_VCCD_TVDAC @m38a_lib.M38A
PP1V5_S0_NB_VCCD_QTVDAC @m38a_lib.M38A
=PP1V5_S0_AIRPORT - @m38a_lib.M38A
PP1V5_S0 - @m38a_lib.M38A
=PP1V5_S0_SB - @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A_USB_CORE @m38a_lib.M38A
=PP1V5_S0_SB_VCCUSBPLL @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A_ATX @m38a_lib.M38A
=PP1V5_S0_SB_VCCSATAPLL @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A_ARX @m38a_lib.M38A
=PP1V5_S0_NB_3GPLL - @m38a_lib.M38A
=PP1V5_S0_NB_PLL - @m38a_lib.M38A
=PP1V5_S0_NB_VCCAUX @m38a_lib.M38A
=PP1V5_S0_NB_VCCD_HMPLL @m38a_lib.M38A
=PP1V5_S0_NB_PCIE - @m38a_lib.M38A
=PP1V5_S0_CPU - @m38a_lib.M38A
TV_IRTNC - @m38a_lib.M38A
TV_IRTNB - @m38a_lib.M38A
TV_IRTNA - @m38a_lib.M38A
TV_IREF - @m38a_lib.M38A
TV_DACC_OUT - @m38a_lib.M38A
TV_DACB_OUT - @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVDACC @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVDACB @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVDACA @m38a_lib.M38A
PP3V3_S0_NB_VCCA_TVBG @m38a_lib.M38A
PP1V5_S0_NB_VCCD_TVDAC @m38a_lib.M38A
PP1V5_S0_NB_VCCD_QTVDAC @m38a_lib.M38A
PP1V5_S0 - @m38a_lib.M38A
=PP1V5_S0_SB_VCCUSBPLL @m38a_lib.M38A
=PP1V5_S0_SB_VCCSATAPLL @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A_USB_CORE @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A_ATX @m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A_ARX -
14D6
14D6
14C6
14C6
14C6
14C6
5B4 34C4
22B6
22B6
22B6
22B6
22A6
21C6
21C6
21D4
23C5
21D5
23C3
23C3
22A6
21C6
22A7
22A7
22A7
22A6
22A7
22A6
22A7
22A6
21C6
21C6
21C6
21C6
21C6
21C6
21C6
21C6
21C6
21C6
21C6
21C6
91A5
89A7
89A7
89A4
89A4
90A7
90A7
90A4
90A4
61C5
61B5
61B5
13C5
13C5
13C5
13C5
13C5
13C5
13C5
17C6
U600_3
U600_6
U600_8
U600_11
U650_4
U2698_4
U3100_VDDQ
U6100_VCC
U7400_CEXT
U8595_1
USB_A_N
USB_A_OC_L
USB_A_P
USB_B_N
USB_B_OC_L
USB_B_P
USB_CAMERA_N
USB_CAMERA_P
USB_C_N
USB_C_OC_L
USB_C_P
USB_D_N
USB_D_OC_L
USB_D_P
USB_E_N
USB_E_OC_L
USB_E_P
USB_F_N
USB_F_P
USB_G_N
USB_G_P
USB_H_N
USB_H_P
USB_IR_N
USB_IR_P
USB_PORT0_N
USB_PORT0_P
USB_PORT1_N
USB_PORT1_P
USB_PORT2_N
USB_PORT2_P
USB_RBIAS_PN
VGA_B
VGA_G
VGA_HSYNC
VGA_R
VGA_VSYNC
VMAIN_AVLBL
VREG_FB
VR_PWRGD_CK410
VR_PWRGOOD_DELAY
XDP_BPM_L<0>
XDP_BPM_L<1>
XDP_BPM_L<2>
XDP_BPM_L<3>
XDP_BPM_L<4>
XDP_BPM_L<5>
XDP_DBRESET_L
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_L
ZH701P1
ZH702P1
ZH703P1
ZH704P1
19B1
19B1
19B1
19B1
19B1
19B1
19B1
19B1
17C6 19B1
17C6 19B1
17C6 19B1
17C6 19B1
17B6 19A1
6C4
6C6
6C4
6C4
53D3
11A7 11B7 11B7 80C2
25A8 25C8
24A3 25C1
@m38a_lib.M38A
=PP1V5_S0_SB_VCC1_5_A @m38a_lib.M38A
=PP1V5_S0_SB - @m38a_lib.M38A
=PP1V5_S0_NB_VCCD_HMPLL @m38a_lib.M38A
=PP1V5_S0_NB_VCCAUX @m38a_lib.M38A
=PP1V5_S0_NB_TVDAC - @m38a_lib.M38A
=PP1V5_S0_NB_PLL - @m38a_lib.M38A
=PP1V5_S0_NB_PCIE - @m38a_lib.M38A
=PP1V5_S0_NB_3GPLL - @m38a_lib.M38A
=PP1V5_S0_NB - @m38a_lib.M38A
=PP1V5_S0_CPU - @m38a_lib.M38A
=PP1V5_S0_AIRPORT - @m38a_lib.M38A
U600_3 - @m38a_lib.M38A
U600_6 - @m38a_lib.M38A
U600_8 - @m38a_lib.M38A
U600_11 - @m38a_lib.M38A
U650_4 - @m38a_lib.M38A
U2698_4 - @m38a_lib.M38A
U3100_VDDQ - @m38a_lib.M38A
U6100_VCC - @m38a_lib.M38A
U7400_CEXT - @m38a_lib.M38A
U8595_1 - @m38a_lib.M38A
USB_A_N - @m38a_lib.M38A
USB_A_OC_L - @m38a_lib.M38A
USB_A_P - @m38a_lib.M38A
USB_B_N - @m38a_lib.M38A
USB_B_OC_L - @m38a_lib.M38A
USB_B_P - @m38a_lib.M38A
USB_CAMERA_N - @m38a_lib.M38A
USB_CAMERA_P - @m38a_lib.M38A
USB_C_N - @m38a_lib.M38A
USB_C_OC_L - @m38a_lib.M38A
USB_C_P - @m38a_lib.M38A
USB_D_N - @m38a_lib.M38A
USB_D_OC_L - @m38a_lib.M38A
USB_D_P - @m38a_lib.M38A
USB_E_N - @m38a_lib.M38A
USB_E_OC_L - @m38a_lib.M38A
USB_E_P - @m38a_lib.M38A
USB_F_N - @m38a_lib.M38A
USB_F_P - @m38a_lib.M38A
USB_G_N - @m38a_lib.M38A
USB_BT_N - @m38a_lib.M38A
USB_G_P - @m38a_lib.M38A
USB_BT_P - @m38a_lib.M38A
USB_H_N - @m38a_lib.M38A
USB_H_P - @m38a_lib.M38A
USB_IR_N - @m38a_lib.M38A
USB_IR_P - @m38a_lib.M38A
USB_PORT0_N - @m38a_lib.M38A
USB_PORT0_P - @m38a_lib.M38A
USB_PORT1_N - @m38a_lib.M38A
USB_PORT1_P - @m38a_lib.M38A
USB_PORT2_N - @m38a_lib.M38A
USB_PORT2_P - @m38a_lib.M38A
USB_RBIAS_PN - @m38a_lib.M38A
VGA_B - @m38a_lib.M38A
VGA_G - @m38a_lib.M38A
VGA_HSYNC - @m38a_lib.M38A
VGA_R - @m38a_lib.M38A
VGA_VSYNC - @m38a_lib.M38A
VMAIN_AVLBL - @m38a_lib.M38A
VREG_FB - @m38a_lib.M38A
VR_PWRGD_CK410 - @m38a_lib.M38A
VR_PWRGOOD_DELAY - @m38a_lib.M38A
XDP_BPM_L<0> - @m38a_lib.M38A
XDP_BPM_L<1> - @m38a_lib.M38A
XDP_BPM_L<2> - @m38a_lib.M38A
XDP_BPM_L<3> - @m38a_lib.M38A
XDP_BPM_L<4> - @m38a_lib.M38A
XDP_BPM_L<5> - @m38a_lib.M38A
XDP_DBRESET_L - @m38a_lib.M38A
XDP_TCK - @m38a_lib.M38A
XDP_TDI - @m38a_lib.M38A
XDP_TDO - @m38a_lib.M38A
XDP_TMS - @m38a_lib.M38A
XDP_TRST_L - @m38a_lib.M38A
ZH701P1 - @m38a_lib.M38A
ZH702P1 - @m38a_lib.M38A
ZH703P1 - @m38a_lib.M38A
ZH704P1 - @m38a_lib.M38A
17C6 19B1
17B6 19A1
6C6 11A7 11B7 11B7 80C2
6C4 24A5 25B6
6C4 24B5 25D6
6C4 24A3 25B1
6C4 24A5 25C6
6C4 24B5 25D6
105
8
Title:
Design:
Date:
C85A0
C600
C601
C602
C603
C604
C610
C650
C699
C0800
C0801
C900
C901
C902
C903
C904
C905
C906
C907
C908
C909
C910
C911
C912
C913
C914
C915
C916
C917
C918
C919
C920
C921
C922
C923
C924
C925
C926
C928
C929
C930
C931
C932
C934
C935
C936
C937
C938
C939
C940
C941
C942
C943
C944
C945
C946
C950
C951
C952
C953
C1000
C1001
C1100
C1150
C1151
C1152
C1153
C1154
C1155
C1156
C1157
C1158
C1159
C1160
C1199
C1211
C1226
C1236
C1610
C1611
C1612
C1613
C1614
C1615
C1620
C1621
C1711
C1712
C1713
C1900
C1901
C1902
C1903
C1904
C1905
C1906
C1907
C1914
C1915
C1916
C1918
C1934
C1935
C1936
C1937
C1965
C1966
C1967
C1968
C1970
C1971
C1972
C1975
C1976
C1981
C1982
C2500
C2501
C2502
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASE-C1
CAP_402
CAP_603
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_402
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_P_CASE-C1
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_P_CASE-C1
CAP_P_CASE-C1
CAP_805-1
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_805
CAP_402
CAP_603
CAP_603
CAP_402
CAP_P_CASE-C1
CAP_P_SMB2
CAP_805-1
CAP_805-1
CAP_805-1
CAP_402
CAP_603
CAP_603
CAP_P_SMB2
CAP_402
CAP_402
7
C2503
C2504
C2505
C2506
C2507
C2508
C2509
C2510
C2511
C2512
C2513
C2514
C2515
C2516
C2517
C2518
C2519
C2520
C2521
C2522
C2523
C2524
C2525
C2526
C2527
C2528
C2529
C2530
C2531
C2532
C2533
C2534
C2605
C2607
C2608
C2609
C2610
C2611
C2698
C2699
C2800
C2801
C2802
C2803
C2804
C2810
C2811
C2812
C2813
C2814
C2815
C2816
C2817
C2818
C2819
C2820
C2821
C2850
C2851
C2852
C2900
C2908
C2909
C2910
C2911
C2912
C2913
C2914
C2915
C2916
C2917
C2918
C2919
C2920
C2921
C2922
C2923
C2950
C2951
C2952
C3004
C3005
C3006
C3007
C3008
C3009
C3010
C3011
C3013
C3014
C3015
C3030
C3033
C3035
C3100
C3101
C3102
C3105
C3109
C3110
C3301
C3302
C3303
C3304
C3305
C3306
C3307
C3308
C3309
C3310
C3311
C3312
C3314
C3315
C3316
C3317
C3389
C3390
C3800
C3801
C3802
C3803
C3804
C3805
m38a[85D1]
m38a[6C7]
m38a[6A3]
m38a[6A3]
m38a[6A3]
m38a[6A4]
m38a[6C7]
m38a[6A7]
m38a[6D7]
m38a[8B5]
m38a[8B5]
m38a[9B6]
m38a[9B6]
m38a[9A6]
m38a[9A6]
m38a[9A6]
m38a[9A6]
m38a[9A6]
m38a[9B5]
m38a[9B7]
m38a[9B5]
m38a[9B7]
m38a[9B7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A5]
m38a[9A7]
m38a[9A7]
m38a[9B7]
m38a[9A7]
m38a[9A7]
m38a[9B7]
m38a[9B6]
m38a[9B5]
m38a[9A6]
m38a[9A5]
m38a[9A6]
m38a[9B7]
m38a[9B7]
m38a[9B7]
m38a[9B6]
m38a[9B6]
m38a[9A5]
m38a[9C7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A7]
m38a[9A6]
m38a[9A6]
m38a[9D4]
m38a[9D3]
m38a[9D3]
m38a[9D2]
m38a[10C6]
m38a[10D4]
m38a[11A3]
m38a[11D7]
m38a[11D7]
m38a[11D7]
m38a[11C7]
m38a[11C7]
m38a[11C7]
m38a[11B7]
m38a[11B7]
m38a[11B7]
m38a[11B7]
m38a[11A7]
m38a[11B2]
m38a[12C3]
m38a[12B6]
m38a[12A6]
m38a[16B5]
m38a[16B4]
m38a[16B4]
m38a[16B8]
m38a[16B8]
m38a[16B6]
m38a[16B5]
m38a[16B5]
m38a[17A3]
m38a[17A3]
m38a[17B3]
m38a[19B5]
m38a[19B5]
m38a[19B5]
m38a[19B4]
m38a[19B4]
m38a[19B4]
m38a[19B3]
m38a[19B3]
m38a[19A8]
m38a[19A7]
m38a[19A8]
m38a[19A7]
m38a[19C7]
m38a[19C7]
m38a[19C7]
m38a[19C7]
m38a[19B8]
m38a[19B7]
m38a[19B7]
m38a[19B7]
m38a[19A5]
m38a[19A4]
m38a[19A4]
m38a[19A4]
m38a[19A4]
m38a[19B6]
m38a[19B8]
m38a[25B8]
m38a[25A6]
m38a[25D4]
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASE-C2
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_805-1
CAP_P_SMC-LF
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_805-1
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
m38a[25D8]
m38a[25C8]
m38a[25B7]
m38a[25B7]
m38a[25B7]
m38a[25A6]
m38a[25B8]
m38a[25C1]
m38a[25D6]
m38a[25B1]
m38a[25C6]
m38a[25C6]
m38a[25B6]
m38a[25D3]
m38a[25D6]
m38a[25D4]
m38a[25D3]
m38a[25B6]
m38a[25C3]
m38a[25B3]
m38a[25B4]
m38a[25B3]
m38a[25B3]
m38a[25A4]
m38a[25A3]
m38a[25A3]
m38a[25A3]
m38a[25A3]
m38a[25D1]
m38a[25C1]
m38a[25C1]
m38a[25D1]
m38a[26C7]
m38a[26D5]
m38a[26D8]
m38a[26D8]
m38a[26C7]
m38a[26B7]
m38a[26C4]
m38a[26C5]
m38a[28D6]
m38a[28B2]
m38a[28B2]
m38a[28B1]
m38a[28B1]
m38a[28B2]
m38a[28B2]
m38a[28B1]
m38a[28B1]
m38a[28B2]
m38a[28B2]
m38a[28B1]
m38a[28B1]
m38a[28B2]
m38a[28B2]
m38a[28B1]
m38a[28B1]
m38a[28D6]
m38a[28A6]
m38a[28A6]
m38a[29D6]
m38a[29B2]
m38a[29B2]
m38a[29B1]
m38a[29B1]
m38a[29B2]
m38a[29B2]
m38a[29B1]
m38a[29B1]
m38a[29B2]
m38a[29B2]
m38a[29B1]
m38a[29B1]
m38a[29B2]
m38a[29B2]
m38a[29B1]
m38a[29B1]
m38a[29D6]
m38a[29A7]
m38a[29A6]
m38a[30B4]
m38a[30D4]
m38a[30B3]
m38a[30D3]
m38a[30A3]
m38a[30A4]
m38a[30D4]
m38a[30D3]
m38a[30A4]
m38a[30A4]
m38a[30A3]
m38a[30C4]
m38a[30C3]
m38a[30C3]
m38a[31C4]
m38a[31B6]
m38a[31B4]
m38a[31B4]
m38a[31C5]
m38a[31B6]
m38a[33D6]
m38a[33D6]
m38a[33D6]
m38a[33D6]
m38a[33D4]
m38a[33D4]
m38a[33C4]
m38a[33D4]
m38a[33D4]
m38a[33D3]
m38a[33C6]
m38a[33C6]
m38a[33D8]
m38a[33D7]
m38a[33D7]
m38a[33D4]
m38a[33C7]
m38a[33C7]
m38a[38B7]
m38a[38B7]
m38a[38B7]
m38a[38B7]
m38a[38C3]
m38a[38C2]
C3806
C4101
C4102
C4103
C4104
C4105
C4106
C4107
C4110
C4111
C4112
C4113
C4115
C4116
C4117
C4118
C4126
C4127
C4128
C4129
C4130
C4131
C4132
C4133
C4134
C4135
C4136
C4137
C4138
C4139
C4140
C4150
C4200
C4201
C4202
C4203
C4204
C4205
C4206
C4209
C4210
C4300
C4301
C4304
C4305
C4401
C4402
C4410
C4412
C4500
C4501
C4502
C4503
C4504
C4505
C4506
C4507
C4508
C4509
C4510
C4515
C4520
C4521
C4522
C4523
C4609
C4610
C4611
C4612
C4613
C4615
C4616
C4620
C4621
C4622
C4623
C4625
C4626
C4650
C4654
C4660
C4664
C4700
C4710
C4712
C4713
C4720
C4722
C4723
C4730
C4732
C4733
C4742
C4743
C4750
C4751
C4752
C4796
C4797
C4798
C4799
C5300
C5301
C5304
C5305
C5306
C5307
C5308
C5309
C5310
C5311
C5312
C5313
C5314
C5800
C5801
C5802
C5803
C5804
C5805
C5806
C5807
C5820
C5900
CAP_805-2
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1210
CAP_402
CAP_1210
CAP_1206-1
CAP_402
CAP_1210
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_P_B2
CAP_402
CAP_402
CAP_P_B2
CAP_402
CAP_402
CAP_P_B2
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-2
CAP_402
CAP_805-2
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_805-1
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
m38a[38C1]
m38a[41D7]
m38a[41D6]
m38a[41D6]
m38a[41D6]
m38a[41D5]
m38a[41D2]
m38a[41D2]
m38a[41D4]
m38a[41D4]
m38a[41C4]
m38a[41C4]
m38a[41B5]
m38a[41B5]
m38a[41B2]
m38a[41B2]
m38a[41A8]
m38a[41A8]
m38a[41A8]
m38a[41A8]
m38a[41A7]
m38a[41A7]
m38a[41A7]
m38a[41A6]
m38a[41A6]
m38a[41A5]
m38a[41A5]
m38a[41A5]
m38a[41A4]
m38a[41A4]
m38a[41B3]
m38a[41D5]
m38a[42D8]
m38a[42D7]
m38a[42D7]
m38a[42D6]
m38a[42D6]
m38a[42C5]
m38a[42C5]
m38a[42B7]
m38a[42B6]
m38a[43D7]
m38a[43D6]
m38a[43C6]
m38a[43B6]
m38a[44D1]
m38a[44C1]
m38a[44D6]
m38a[44D1]
m38a[45D4]
m38a[45D3]
m38a[45D3]
m38a[45C6]
m38a[45C4]
m38a[45C5]
m38a[45C5]
m38a[45C5]
m38a[45D5]
m38a[45D5]
m38a[45D5]
m38a[45D6]
m38a[45D5]
m38a[45D4]
m38a[45D3]
m38a[45D3]
m38a[46D5]
m38a[46D4]
m38a[46D4]
m38a[46C4]
m38a[46C4]
m38a[46C2]
m38a[46B2]
m38a[46B4]
m38a[46B4]
m38a[46A4]
m38a[46A4]
m38a[46A2]
m38a[46A2]
m38a[46C7]
m38a[46B8]
m38a[46C7]
m38a[46B7]
m38a[47C8]
m38a[47D6]
m38a[47D5]
m38a[47D4]
m38a[47C6]
m38a[47C4]
m38a[47C4]
m38a[47B5]
m38a[47A4]
m38a[47A4]
m38a[47D1]
m38a[47D1]
m38a[47B6]
m38a[47C6]
m38a[47D6]
m38a[47C7]
m38a[47D2]
m38a[47B2]
m38a[47B2]
m38a[53B7]
m38a[53B7]
m38a[53D5]
m38a[53D5]
m38a[53D4]
m38a[53C4]
m38a[53C5]
m38a[53C4]
m38a[53C4]
m38a[53C3]
m38a[53D4]
m38a[53C5]
m38a[53C4]
m38a[59B8]
m38a[59B8]
m38a[58D3]
m38a[58D2]
m38a[58D2]
m38a[58D2]
m38a[58D1]
m38a[58D2]
m38a[58C3]
m38a[59D8]
C5901
C5902
C5903
C5919
C5940
C5941
C5942
C5943
C5951
C6000
C6001
C6002
C6003
C6100
C6101
C6301
C6308
C6309
C6311
C6312
C6500
C6501
C6502
C6503
C6504
C6505
C6600
C6601
C6602
C6650
C6651
C6652
C6653
C6654
C6655
C6700
C6701
C6702
C6703
C6704
C6705
C6800
C6801
C6802
C6803
C6804
C6805
C6806
C6807
C6810
C6812
C6813
C6821
C6822
C6823
C6825
C6826
C6830
C6833
C6835
C6836
C7200
C7201
C7202
C7203
C7204
C7205
C7206
C7207
C7208
C7209
C7210
C7211
C7212
C7213
C7214
C7215
C7216
C7217
C7218
C7219
C7221
C7223
C7317
C7318
C7326
C7400
C7401
C7402
C7403
C7404
C7405
C7406
C7407
C7408
C7415
C7416
C7417
C7418
C7419
C7424
C7435
C7500
C7501
C7502
C7503
C7504
C7505
C7506
C7507
C7508
C7509
C7510
C7511
C7512
C7513
C7514
C7515
C7516
C7517
C7518
C7521
C7526
C7527
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_805
CAP_603
CAP_805
CAP_P_6.3X11-TH-LF1
CAP_P_6.3X11-TH-LF1
CAP_603
CAP_805
CAP_P_SM-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_P_6.3X5.5-SM
CAP_P_6.3X5.5-SM
CAP_P_SMA-LF
CAP_805
CAP_805
CAP_P_SMA-LF
CAP_P_SMA-LF
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_6.3X8-SM
CAP_1210
CAP_805
CAP_1210
CAP_805
CAP_805
CAP_805
CAP_805
CAP_603-1
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_P_6.3X8-SM
CAP_603
CAP_603
CAP_402
CAP_1210
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_6.3X5.5-SM
CAP_P_6.3X5.5-SM
CAP_P_SMA-LF
CAP_P_SMA-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_603-1
CAP_402
CAP_P_6.3X8-SM
CAP_402
CAP_P_TH-MCZ
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1210
CAP_1210
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_P_SM-3
CAP_P_SM-3
CAP_402
CAP_603
CAP_603
m38a[59D8]
m38a[59B7]
m38a[59A8]
m38a[59B4]
m38a[59A4]
m38a[59A3]
m38a[59A3]
m38a[59A5]
m38a[60B6]
m38a[60D4]
m38a[60D4]
m38a[60D4]
m38a[60D4]
m38a[61B5]
m38a[61B5]
m38a[63C2]
m38a[63C5]
m38a[63C6]
m38a[63C2]
m38a[63D3]
m38a[65D5]
m38a[65D5]
m38a[65B4]
m38a[65B5]
m38a[65C4]
m38a[65B3]
m38a[66D4]
m38a[66C5]
m38a[66C3]
m38a[66B5]
m38a[66A5]
m38a[66B3]
m38a[66A3]
m38a[66B4]
m38a[66B2]
m38a[67C4]
m38a[67C4]
m38a[67C3]
m38a[67C3]
m38a[59B7]
m38a[59B7]
m38a[68D6]
m38a[68D6]
m38a[68D4]
m38a[68D3]
m38a[68B4]
m38a[68B3]
m38a[68B3]
m38a[68B3]
m38a[68B3]
m38a[68B4]
m38a[68B3]
m38a[68C6]
m38a[68A5]
m38a[68A4]
m38a[68A3]
m38a[68A2]
m38a[68D4]
m38a[68B3]
m38a[68D6]
m38a[68D3]
m38a[72D5]
m38a[72D5]
m38a[72D4]
m38a[72D3]
m38a[72D6]
m38a[72C6]
m38a[72C6]
m38a[72C6]
m38a[72C4]
m38a[72B4]
m38a[72B3]
m38a[72B2]
m38a[72B2]
m38a[72B2]
m38a[72B5]
m38a[72C6]
m38a[72C6]
m38a[72D6]
m38a[72D5]
m38a[72D4]
m38a[72B7]
m38a[72D3]
m38a[73B4]
m38a[73B4]
m38a[73C7]
m38a[74B4]
m38a[74D5]
m38a[74A4]
m38a[74B7]
m38a[74B6]
m38a[74C7]
m38a[74C6]
m38a[74D8]
m38a[74D7]
m38a[74A8]
m38a[74A8]
m38a[74A8]
m38a[74A5]
m38a[74A4]
m38a[74C3]
m38a[74A3]
m38a[75C4]
m38a[75C2]
m38a[75B4]
m38a[75C1]
m38a[75B1]
m38a[75C8]
m38a[75B7]
m38a[75B7]
m38a[75C2]
m38a[75D1]
m38a[75C8]
m38a[75B2]
m38a[75C2]
m38a[75B7]
m38a[75B8]
m38a[75C4]
m38a[75B4]
m38a[75D2]
m38a[75D2]
m38a[75A6]
m38a[75D6]
m38a[75C5]
106
C7528
C7529
C7530
C7531
C7532
C7533
C7534
C7535
C7550
C7551
C7590
C7592
C7596
C7597
C7598
C7599
C7612
C7633
C7700
C7703
C7704
C7706
C7709
C7710
C7711
C7712
C7750
C7751
C7752
C7753
C7754
C7755
C7756
C7757
C7797
C7798
C7799
C7800
C7801
C7802
C7803
C7804
C7805
C7806
C7807
C7809
C7810
C7811
C7813
C7814
C7817
C7900
C7901
C7902
C7903
C7906
C7907
C7908
C7909
C7910
C7911
C7912
C7913
C7980
C7992
C7998
C8000
C8001
C8002
C8003
C8004
C8005
C8006
C8009
C8010
C8011
C8012
C8014
C8015
C8016
C8099
C8100
C8101
C8102
C8103
C8106
C8107
C8108
C8109
C8110
C8111
C8112
C8114
C8115
C8190
C8192
C8198
C8199
C8398
C8399
C8400
C8401
C8402
C8405
C8406
C8407
C8410
C8411
C8412
C8413
C8420
C8421
C8422
C8423
C8424
C8425
C8426
C8427
C8428
C8429
C8430
C8431
C8432
C8433
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_1210
CAP_1210
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_805
CAP_402
CAP_402
CAP_805
CAP_805
CAP_402
CAP_402
CAP_603
CAP_402
CAP_1210
CAP_P_SM-LF
CAP_603
CAP_603
CAP_402
CAP_603
CAP_805-1
CAP_P_CASE-D2E-LF
CAP_402
CAP_402
CAP_402
CAP_1206
CAP_402
CAP_P_CASE-D2E-LF
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_1206
CAP_P_SM-3
CAP_1210
CAP_P_CASE-D2E-LF
CAP_1206
CAP_402
CAP_603
CAP_P_CASE-D2E-LF
CAP_1210
CAP_P_CASE-D2E-LF
CAP_603
CAP_402
CAP_1206
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_P_TH-MCZ
CAP_1210
CAP_805-1
CAP_P_CASE-D2E-LF
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_1206
CAP_1210
CAP_1210
CAP_1210
CAP_P_CASE-D2E-LF
CAP_805-1
CAP_P_CASE-D2E-LF
CAP_603
CAP_1210
CAP_402
CAP_603
CAP_603
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
7
m38a[75B5]
m38a[75B5]
m38a[75D6]
m38a[75B5]
m38a[75B6]
m38a[75B6]
m38a[75B5]
m38a[75D5]
m38a[75D1]
m38a[75D1]
m38a[75C3]
m38a[75B3]
m38a[75D6]
m38a[75D1]
m38a[75D1]
m38a[76D6]
m38a[76B2]
m38a[76C7]
m38a[77D2]
m38a[77C2]
m38a[77C2]
m38a[77D2]
m38a[77D1]
m38a[77D5]
m38a[77D5]
m38a[77D4]
m38a[77A4]
m38a[77B5]
m38a[77B5]
m38a[77B6]
m38a[77B6]
m38a[77B4]
m38a[77B3]
m38a[77A7]
m38a[77B4]
m38a[77B7]
m38a[77A3]
m38a[78C3]
m38a[78C4]
m38a[78C6]
m38a[78B6]
m38a[78C6]
m38a[78C4]
m38a[78B2]
m38a[78B3]
m38a[78B3]
m38a[78B4]
m38a[78B5]
m38a[78B4]
m38a[78B5]
m38a[78B2]
m38a[79D6]
m38a[79D5]
m38a[79C5]
m38a[79C7]
m38a[79C5]
m38a[79C3]
m38a[79C5]
m38a[79C4]
m38a[79D4]
m38a[79D3]
m38a[79C3]
m38a[79C2]
m38a[79B3]
m38a[79D6]
m38a[79C3]
m38a[80D3]
m38a[80C3]
m38a[80D6]
m38a[80C3]
m38a[80C4]
m38a[80C4]
m38a[80D6]
m38a[80C6]
m38a[80C4]
m38a[80C5]
m38a[80C5]
m38a[80D4]
m38a[80D3]
m38a[80C2]
m38a[80C2]
m38a[81D6]
m38a[81C5]
m38a[81C5]
m38a[81C7]
m38a[81C5]
m38a[81C3]
m38a[81C5]
m38a[81C4]
m38a[81D4]
m38a[81D3]
m38a[81D3]
m38a[81C3]
m38a[81C2]
m38a[81C3]
m38a[81D6]
m38a[81D3]
m38a[81A5]
m38a[83B4]
m38a[83C4]
m38a[84C7]
m38a[84C7]
m38a[84C7]
m38a[84B7]
m38a[84B7]
m38a[84B7]
m38a[84B6]
m38a[84B7]
m38a[84B7]
m38a[84B7]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84D5]
m38a[84C5]
m38a[84C5]
m38a[84C5]
m38a[84C5]
m38a[84C5]
C8434
C8435
C8436
C8437
C8438
C8439
C8440
C8441
C8442
C8443
C8444
C8445
C8446
C8447
C8448
C8449
C8450
C8451
C8455
C8456
C8457
C8458
C8459
C8460
C8461
C8462
C8463
C8464
C8465
C8466
C8467
C8468
C8469
C8470
C8471
C8472
C8473
C8474
C8475
C8476
C8477
C8478
C8479
C8480
C8481
C8482
C8483
C8484
C8485
C8486
C8500
C8501
C8502
C8506
C8507
C8508
C8509
C8521
C8522
C8530
C8531
C8532
C8540
C8541
C8542
C8543
C8590
C8592
C8595
C8598
C8599
C8600
C8601
C8604
C8605
C8606
C8607
C8608
C8609
C8610
C8611
C8612
C8613
C8614
C8615
C8616
C8630
C8631
C8632
C8633
C8634
C8650
C8651
C8652
C8653
C8655
C8656
C8657
C8658
C8659
C8660
C8661
C8662
C8663
C8664
C8665
C8666
C8667
C8668
C8669
C8670
C8671
C8672
C8673
C8674
C8675
C8676
C8677
C8678
C8679
C8680
C8681
C8682
C8683
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1210
CAP_1210
CAP_1210
CAP_805
CAP_805
CAP_P_CASE-D2E-LF
CAP_P_CASE-D2E-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1206
CAP_805
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_805
CAP_805
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
m38a[84C5]
m38a[84C5]
m38a[84C5]
m38a[84C5]
m38a[84C5]
m38a[84C5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84B5]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84D2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84C2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[84B2]
m38a[85D6]
m38a[85D6]
m38a[85D6]
m38a[85C8]
m38a[85C7]
m38a[85C7]
m38a[85C5]
m38a[85C4]
m38a[85C5]
m38a[85D4]
m38a[85D4]
m38a[85D4]
m38a[85C2]
m38a[85C2]
m38a[85C2]
m38a[85C2]
m38a[85D3]
m38a[85C2]
m38a[85D1]
m38a[85D2]
m38a[85C4]
m38a[86C7]
m38a[86C7]
m38a[86C7]
m38a[86C6]
m38a[86C6]
m38a[86C6]
m38a[86C5]
m38a[86C5]
m38a[86C5]
m38a[86C7]
m38a[86C6]
m38a[86C6]
m38a[86C6]
m38a[86C5]
m38a[86C5]
m38a[86C6]
m38a[86C6]
m38a[86C5]
m38a[86C5]
m38a[86C5]
m38a[86B7]
m38a[86B7]
m38a[86B7]
m38a[86B6]
m38a[86B6]
m38a[86B6]
m38a[86B6]
m38a[86B5]
m38a[86B5]
m38a[86B5]
m38a[86B6]
m38a[86B6]
m38a[86B6]
m38a[86B5]
m38a[86B5]
m38a[86B5]
m38a[86B6]
m38a[86B6]
m38a[86B6]
m38a[86B5]
m38a[86B5]
m38a[86B5]
m38a[86B6]
m38a[86B6]
m38a[86B6]
m38a[86B5]
m38a[86B5]
m38a[86B5]
m38a[86A6]
m38a[86A6]
m38a[86A6]
m38a[86A5]
m38a[86A5]
C8690
C8691
C8692
C8711
C8713
C8715
C8716
C8721
C8723
C8725
C8726
C8900
C8901
C8902
C8903
C8904
C8910
C8915
C8920
C8921
C8922
C8923
C8924
C8925
C8926
C8931
C8933
C8950
C8951
C8952
C8953
C8954
C8960
C8965
C8970
C8971
C8972
C8973
C8974
C8975
C8976
C8981
C8983
C9000
C9001
C9002
C9003
C9004
C9010
C9015
C9020
C9021
C9022
C9023
C9024
C9025
C9026
C9031
C9033
C9050
C9051
C9052
C9053
C9054
C9060
C9065
C9070
C9071
C9072
C9073
C9074
C9075
C9076
C9081
C9083
C9100
C9101
C9102
C9103
C9110
C9111
C9112
C9115
C9116
C9117
C9120
C9121
C9122
C9125
C9126
C9127
C9130
C9131
C9132
C9135
C9136
C9137
C9140
C9141
C9142
C9191
C9300
C9301
C9302
C9305
C9306
C9307
C9310
C9311
C9312
C9315
C9316
C9317
C9320
C9321
C9322
C9325
C9326
C9327
C9330
C9331
C9332
C9340
C9341
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_805
CAP_402
m38a[86D5]
m38a[86D5]
m38a[86D5]
m38a[87B7]
m38a[87B7]
m38a[87A7]
m38a[87A6]
m38a[87B4]
m38a[87B4]
m38a[87A4]
m38a[87A3]
m38a[89D7]
m38a[89D7]
m38a[89D7]
m38a[89D7]
m38a[89D6]
m38a[89D7]
m38a[89D6]
m38a[89C8]
m38a[89C8]
m38a[89C7]
m38a[89C7]
m38a[89C7]
m38a[89C7]
m38a[89C6]
m38a[89C7]
m38a[89C6]
m38a[89D4]
m38a[89D4]
m38a[89D4]
m38a[89D3]
m38a[89D3]
m38a[89D3]
m38a[89D3]
m38a[89C5]
m38a[89C4]
m38a[89C4]
m38a[89C4]
m38a[89C4]
m38a[89C3]
m38a[89C3]
m38a[89C3]
m38a[89C3]
m38a[90D7]
m38a[90D7]
m38a[90D7]
m38a[90D7]
m38a[90D6]
m38a[90D7]
m38a[90D6]
m38a[90C8]
m38a[90C8]
m38a[90C7]
m38a[90C7]
m38a[90C7]
m38a[90C7]
m38a[90C6]
m38a[90C7]
m38a[90C6]
m38a[90D4]
m38a[90D4]
m38a[90D4]
m38a[90D3]
m38a[90D3]
m38a[90D3]
m38a[90D3]
m38a[90C5]
m38a[90C4]
m38a[90C4]
m38a[90C4]
m38a[90C4]
m38a[90C3]
m38a[90C3]
m38a[90C3]
m38a[90C3]
m38a[91C5]
m38a[91C5]
m38a[91C5]
m38a[91C5]
m38a[91C5]
m38a[91C5]
m38a[91C5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91B5]
m38a[91A6]
m38a[91A6]
m38a[91A5]
m38a[91A6]
m38a[91A6]
m38a[91A5]
m38a[91A6]
m38a[91A6]
m38a[91A5]
m38a[91D2]
m38a[93C6]
m38a[93C6]
m38a[93C5]
m38a[93C6]
m38a[93C6]
m38a[93C5]
m38a[93C6]
m38a[93C6]
m38a[93C5]
m38a[93B8]
m38a[93B8]
m38a[93B7]
m38a[93B6]
m38a[93B6]
m38a[93B5]
m38a[93B8]
m38a[93B8]
m38a[93B7]
m38a[93B6]
m38a[93B6]
m38a[93B5]
m38a[93A6]
m38a[93A6]
C9342
C9345
C9346
C9347
C9400
C9401
C9410
C9420
C9450
C9470
C9700
C9710
C9711
C9713
C9714
C9740
C9741
C9742
C9750
C9751
D2500
D2501
D2600
D2601
D4600
D4690
D4700
CAP_402
CAP_805
CAP_402
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_1210
CAP_805
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
DIODE_SCHOT_SOT23
DIODE_SCHOT_SOT23
DIODE_SCHOT_SOT23
DIODE_SCHOT_SOT23
DIODE_SMC
ZENER_SOT23
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_3P_A_SC75
DIODE_SOT23
DIODE_SOT23
DIODE_SCHOT_SMB
DIODE_SCHOT_SMB
DIODE_SOT23
DIODE_SCHOT_SMB
DIODE_SCHOT_SMB
DIODE_SCHOT_SMB
DIODE_SOT23
DIODE_SCHOT_SMB
ZENER_CASE425
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
DIODE_SCHOT_POWERDI123
DIODE_SCHOT_POWERDI123
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
SUPPR_TRANSIENT1_402
FUSE_MINISMD-LF
FUSE_MINISMD-LF
FUSE_SM-LF
FILTER_4P_2012
FILTER_4P_2012
FILTER_LC_SM-220MHZLF
FILTER_LC_SM-220MHZLF
FILTER_LC_SM-220MHZLF
FILTER_4P_2012
FILTER_4P_2012
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
CON_2RTSM_125_SM-2MT
-BLK-LF
CON_M12RT_D_THA_M-RT
-TH
CPU_YONAH_SKT_BGA
CPU_YONAH_SKT_BGA
CON_2RTSM_125_SM-2MT
-BLK-LF
CON_F28RT_S2MT_SM_FRT-SM
BATTERY_2P_SM
CON_F200RT_DDR2DIMM_
5MT_SM_F-RT-SM1
CON_F200RT_DDR2DIMM_
5MT_SM_F-RT-SM1
CON_F4ST_S2MT_SM_F-S
T-SM
CON_M2ST_S2MT_SM_M-S
T-SM
CON_F10ST_D_SMA_F-ST
-SM
CON_F52RT_D2MT_SM_FRT-SM
CON_F30STSM_5047_SM1
CON_M4RT_S2MT_SM_M-R
T-SM
CON_M5RT_S2MT_SMA_MRT-SM
CON_F4ST_S2MT_SM_F-S
T-SM
CON_M4RT_S2MT_SM_M-R
T-SM
CON_M4RT_S2MT_SM_M-R
T-SM
CON_F9ANG_4MT_OPTAUD
JCK_TH1_F-5.5-DEG-TH
D4701
D4702
D6500
D6501
D6502
D6503
D6600
D6601
D7500
D7501
D7599
D8520
D9700
DP4610
DP4611
DP4620
DP4621
DZ4700
DZ6800
DZ7300
DZ7301
DZ7302
DZ7311
DZ7313
DZ7314
DZ7315
DZ7323
DZ7324
DZ7325
DZ7326
DZ7380
F4602
F4701
F9710
FL4610
FL4620
FL9740
FL9741
FL9742
FLE011
FLE021
GV3801
GV3802
GV3803
GV3804
GV3805
GV3806
GV3807
GV3808
J3
J600
J0700
J0700
J1000
J1101
J2600
J2800
J2900
J2901
J2903
J4700
J5300
J6000
J6500
J6501
J6600
J6601
J6602
J7300
m38a[93A5]
m38a[93A6]
m38a[93A5]
m38a[93A5]
m38a[94C7]
m38a[94C6]
m38a[94C6]
m38a[94C5]
m38a[94C2]
m38a[94B2]
m38a[97C8]
m38a[97C3]
m38a[97D3]
m38a[97C2]
m38a[97C2]
m38a[97A7]
m38a[97A6]
m38a[97A6]
m38a[97B4]
m38a[97A4]
m38a[25C8]
m38a[25D8]
m38a[26D8]
m38a[26C8]
m38a[46D5]
m38a[46A6]
m38a[47C4]
m38a[47B4]
m38a[47A4]
m38a[65C4]
m38a[65B4]
m38a[65C4]
m38a[65B4]
m38a[66C4]
m38a[66C3]
m38a[75C3]
m38a[75B2]
m38a[76D6]
m38a[85C3]
m38a[97C1]
m38a[46D4 46D3]
m38a[46C4 46C3]
m38a[46B4 46B3]
m38a[46A4 46A3]
m38a[47C8]
m38a[68A4]
m38a[73C6]
m38a[73C5]
m38a[73C6]
m38a[73A7]
m38a[73A6]
m38a[73A6]
m38a[73A6]
m38a[73A5]
m38a[73C5]
m38a[73C3]
m38a[73C3]
m38a[73A7]
m38a[46D3]
m38a[47D3]
m38a[97D5]
m38a[46C3]
m38a[46B3]
m38a[97B7]
m38a[97A7]
m38a[97A7]
m38a[46C3]
m38a[46B3]
m38a[38A8]
m38a[38A7]
m38a[38A8]
m38a[38A7]
m38a[38A8]
m38a[38A7]
m38a[38A8]
m38a[38A7]
m38a[61B6]
m38a[6D7]
m38a[7C3 7D7]
m38a[8D4 8D8]
m38a[10B7]
m38a[11C2]
m38a[26C8]
m38a[28D5]
m38a[29D5]
m38a[59C7]
m38a[59C8]
m38a[47B1]
m38a[53C5]
m38a[60C3]
m38a[65D3]
m38a[65B2]
m38a[66C2]
m38a[66B5]
m38a[66B3]
m38a[73D8]
107
8
J7301
J7303
J9401
J9402
J9710
JC900
JC901
JD600
JE000
JE001
JE310
JE320
JE330
JE350
L1934
L1936
L1970
L1975
L2500
L2507
L3301
L3302
L4200
L4201
L4300
L4409
L4610
L4620
L4690
L4710
L4712
L4720
L4722
L4730
L4732
L4740
L4742
L4752
L6800
L6801
L7200
L7201
L7202
L7203
L7204
L7205
L7206
L7207
L7208
L7300
L7301
L7302
L7303
L7304
L7305
L7306
L7307
L7309
L7310
L7312
L7313
L7315
L7316
L7317
L7318
L7319
L7323
L7324
L7325
L7326
L7327
L7381
L7500
L7501
L7502
L7700
L7750
L7800
L7880
L7900
L8000
L8100
L8400
L8520
L8715
L8725
L8910
L8915
L8960
L8965
L9010
L9015
L9060
L9065
L9120
L9125
L9130
L9135
L9140
L9300
L9305
L9310
L9315
L9320
L9325
L9330
L9345
L9400
L9700
L9701
CON_M7RT_S2MT_SM_M-R
T-SM
CON_F9ANG_S4MT_TH1_F
-ANG-TH
CON_M4ST_S_SM_M-ST-S
M
CON_F30ST_D_SM_F-STSM
CON_DVI_F32ST_Q2MT_S
M_F-ST-SM4
CON_M7ST_SATA_SM_M-S
T-SM
CON_F50ST_D2MT_SM_FST-SM
CON_RJ45_10ANG_S3MT_
TH1_F-ANG-TH
CON_F6ST_S4MT_TH1_FST-TH
CON_F6ST_S4MT_TH1_FST-TH
CON_F4ST_USB_S3MT_TH
_F-ST-TH
CON_F4ST_USB_S3MT_TH
_F-ST-TH
CON_F4ST_USB_S3MT_TH
_F-ST-TH
CON_M14RT_S2MT_SM_MRT-SM
IND_0603
IND_0603
IND_1210
IND_0805
IND_SM-3
IND_1206
IND_0402-LF
IND_0402-LF
IND_0805
IND_0805
IND_SM
IND_0402
IND_1206-LF
IND_1206-LF
IND_SM-1
IND_SM
FILTER_4P_2012
IND_SM
FILTER_4P_2012
IND_SM
FILTER_4P_2012
IND_SM
FILTER_4P_2012
FILTER_4P_2012
IND_0402-LF
IND_0402-LF
IND_SM-1
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603
IND_0603
IND_0603
IND_0603
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_0603-LF
IND_SM
IND_SM
IND_TH-VERT-LF
IND_SM1-LF
IND_SM-LF
IND_3P_SM
IND_0603-LF
IND_3P_SM
IND_3P_SM
IND_IHLP
IND_0402
IND_IHLP
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_SM
FILTER_4P_2012H
FILTER_4P_2012H
7
m38a[73D1]
L9702
L9703
L9710
LED601
LED602
LED603
LED3800
LED5950
LED6000
LED7900
LED8000
LED8100
PP5E1
PP5E2
PP6A0
PP6A1
PP6A2
PP6A3
PP6A4
PP6A5
PP6A6
PP6A7
PP6A8
PP6A9
PP6B0
PP6B1
PP6B2
PP6B3
PP6B4
PP6B5
PP6B6
PP6B7
PP6B8
PP6B9
PP6C0
PP6C1
PP6C2
PP6C3
PP6C4
PP6C5
PP6C6
PP6C7
PP6C8
PP6D0
PP6D1
PP6D2
PP6D3
PP6D4
PP6D5
PP6D6
PP6D7
PP6D8
PP6D9
PP6E0
PP6E1
PP600
PP601
PP602
PP603
PP604
PP605
PP606
PP607
PP608
PP609
PP610
PP611
PP612
PP613
PP614
PP615
PP616
PP617
PP618
PP619
PP620
PP621
PP622
PP623
PP624
PP625
PP626
PP627
PP628
PP629
PP630
PP631
PP632
PP633
PP634
PP635
PP636
PP637
PP638
PP639
PP640
PP641
PP642
PP643
PP644
PP645
PP646
PP647
PP648
PP649
PP650
PP651
PP652
PP653
PP654
PP655
PP656
PP657
PP658
PP659
PP660
PP661
PP662
PP663
PP664
PP665
PP666
PP667
PP668
m38a[73B3]
m38a[94C2]
m38a[94B6]
m38a[97D5]
m38a[38B8]
m38a[38D2]
m38a[43C6]
m38a[46C2]
m38a[46B2]
m38a[47D4]
m38a[47B4]
m38a[47A4]
m38a[47C1]
m38a[19C7]
m38a[19C7]
m38a[19A5]
m38a[19A5]
m38a[25B8]
m38a[25A7]
m38a[33D7]
m38a[33D3]
m38a[42D7]
m38a[42B7]
m38a[43D7]
m38a[44D6]
m38a[46D2]
m38a[46B2]
m38a[46A6]
m38a[47D5]
m38a[47C5]
m38a[47C5]
m38a[47B5]
m38a[47B5]
m38a[47A5]
m38a[47D2]
m38a[47C2]
m38a[47B2]
m38a[68A5]
m38a[68D6]
m38a[72D6]
m38a[72C2]
m38a[72C2]
m38a[72C3]
m38a[72C3]
m38a[72D6]
m38a[72C6]
m38a[72C6]
m38a[72C6]
m38a[73D6]
m38a[73D6]
m38a[73D6]
m38a[73D6]
m38a[73D5]
m38a[73D5]
m38a[73D5]
m38a[73D5]
m38a[73C4]
m38a[73C4]
m38a[73C3]
m38a[73C3]
m38a[73B7]
m38a[73B7]
m38a[73A7]
m38a[73B7]
m38a[73B7]
m38a[73B5]
m38a[73B5]
m38a[73A5]
m38a[73B5]
m38a[73B5]
m38a[73A5]
m38a[75D1]
m38a[75B2]
m38a[76D8]
m38a[77D2]
m38a[77B4]
m38a[78B3]
m38a[73A7]
m38a[79C3]
m38a[80C3]
m38a[81C3]
m38a[84B7]
m38a[85C3]
m38a[87A7]
m38a[87A4]
m38a[89D7]
m38a[89D7]
m38a[89D4]
m38a[89D4]
m38a[90D7]
m38a[90D7]
m38a[90D4]
m38a[90D4]
m38a[91B6]
m38a[91B6]
m38a[91B7]
m38a[91A7]
m38a[91A7]
m38a[93C7]
m38a[93C7]
m38a[93C7]
m38a[93C7]
m38a[93B7]
m38a[93B7]
m38a[93B7]
m38a[93B7]
m38a[94C6]
m38a[97D7]
m38a[97D7]
FILTER_4P_2012H
FILTER_4P_SM-LF
IND_SM-1
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_3X2MM-SM
LED_NS3W315_ST-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
m38a[97C7]
m38a[97C7]
m38a[97D5]
m38a[6A8]
m38a[6A7]
m38a[6A6]
m38a[38B3]
m38a[60A6]
m38a[60A6]
m38a[79A4]
m38a[80A4]
m38a[81A4]
m38a[5B8]
m38a[5B8]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5A6]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B8]
m38a[5B6]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5D8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5C8]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5D6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
m38a[5C6]
PP673
PP674
PP675
PP676
PP677
PP678
PP679
PP680
PP681
PP682
PP683
PP684
PP685
PP686
PP687
PP688
PP689
PP690
PP691
PP692
PP693
PP694
PP695
PP696
PP697
PP698
PP699
PP700
PP701
PP702
PP1200
PP1201
PP1202
PP2800
PP2801
PP2802
PP4100
PP4101
PP8400
PP8401
PP8700
PP8701
PP8702
PP8703
PP8704
PP8705
PP8706
PP8707
PP8708
PP8709
PP8710
PP8711
PP8712
PP8713
PP8714
PP8715
PP8716
PP8720
PP8721
PP8722
PP8723
PP8724
PP8725
PP8726
PP8727
PP8728
PP8729
PP8730
PP8731
PP8732
PP8733
PP8734
PP8735
PP8736
PP8900
PP8901
PP8902
PP8903
PP8904
PP8905
PP8906
PP8907
PP8908
PP8909
PP8910
PP8911
PP8912
PP8913
PP8914
PP8915
PP8916
PP8920
PP8921
PP8922
PP8923
PP8924
PP8925
PP8926
PP8927
PP8928
PP8929
PP8930
PP8931
PP8932
PP8933
PP8934
PP8935
PP8936
PP9000
PP9001
PP9002
PP9003
PP9004
PP9005
PP9006
PP9007
PP9008
PP9009
PP9010
PP9011
PP9012
PP9013
PP9014
PP9015
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
TP_SM-TP50-TOP
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
m38a[5C6]
m38a[5C6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5B6]
m38a[5D3]
m38a[5D3]
m38a[5D3]
m38a[5D3]
m38a[5D3]
m38a[5D3]
m38a[5C3]
m38a[5C3]
m38a[5C3]
m38a[5D4]
m38a[5D4]
m38a[5C5]
m38a[5C5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5D5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5C5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5B5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5A5]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5B4]
m38a[5A4]
m38a[5A4]
PP9016
PP9020
PP9021
PP9022
PP9023
PP9024
PP9025
PP9026
PP9027
PP9028
PP9029
PP9030
PP9031
PP9032
PP9033
PP9034
PP9035
PP9036
Q4201
Q5901
Q5910
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
TRA_PBSS5540Z_SOT223
TRA_2N7002DW_SOT-363
TRA_SINGLE_MOSFET_PC
HN_SOT-23
TRA_2N7002_SOT23-LF
TRA_2N7002_SOT23-LF
TRA_2N7002_SOT23-LF
TRA_2N3906_SOT23-LF
TRA_NTHS5443T1_1206A
-03-LF
TRA_2N7002_SOT23-LF
TRA_NTHS5443T1_1206A
-03-LF
TRA_2N7002_SOT23-LF
TRA_NTHS5443T1_1206A
-03-LF
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
TRA_HAT2168H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2168H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2168H_LFPAK
TRA_HAT2168H_LFPAK
TRA_SI3446DV_TSOP-LF
TRA_2N7002DW_SOT-363
TRA_2N7002_SOT23-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_2N7002_SOT23-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_2N7002_SOT23-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_2N7002_SOT23-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_NTD60N02R_CASE36
9-LF
TRA_2N7002_SOT23-LF
TRA_IRF7413_SO-8
TRA_IRF7413_SO-8
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_HAT2168H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2165H_LFPAK
TRA_SI3443DV_TSOP-LF
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
Q5911
Q5950
Q5951
Q5952
Q6500
Q6502
Q6503
Q6505
Q6600
Q6602
Q7200
Q7400
Q7401
Q7402
Q7500
Q7501
Q7502
Q7503
Q7504
Q7505
Q7570
Q7572
Q7701
Q7703
Q7799
Q7800
Q7801
Q7802
Q7900
Q7901
Q7902
Q8000
Q8001
Q8003
Q8102
Q8103
Q8104
Q8300
Q8301
Q8302
Q8303
Q8520
Q8521
Q8522
Q9400
Q9401
Q9711
R75A0
R85A0
R600
R601
R602
R603
R605
R611
R612
R614
R615
R616
R617
R618
R619
R0701
R0702
R0703
R0704
R0705
R0706
R0707
R0712
R0716
R0717
R0718
R0719
R0720
R0721
R0722
R0730
R0802
R0803
R1000
R1001
R1002
R1005
R1017
R1018
R1019
R1100
R1101
R1102
R1103
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[5A4]
m38a[42C6]
m38a[59C7 59C7]
m38a[59A4]
m38a[59A4]
m38a[60A7]
m38a[60B7]
m38a[60B6]
m38a[65D4]
m38a[65D6]
m38a[65B4]
m38a[65B6]
m38a[66D4]
m38a[66C5]
m38a[72B6 72B7]
m38a[74B3 74B3]
m38a[74D5]
m38a[74B2 74B2]
m38a[75D3]
m38a[75D3]
m38a[75C3]
m38a[75B3]
m38a[75D3]
m38a[75B3]
m38a[75D2]
m38a[75C3]
m38a[77A3]
m38a[77C7 77D7]
m38a[77A7]
m38a[78C4]
m38a[78B4]
m38a[78B7]
m38a[79D4]
m38a[79C4]
m38a[79C7]
m38a[80D4]
m38a[80C4]
m38a[80C7]
m38a[81D4]
m38a[81C4]
m38a[81C7]
m38a[83C4]
m38a[83B4]
m38a[83B5]
m38a[83C5]
m38a[85D4]
m38a[85C4]
m38a[85C5]
m38a[94C7]
m38a[94C7]
m38a[97D2 97C2]
m38a[75C7]
m38a[85D1]
m38a[6A7]
m38a[6D8]
m38a[6A8]
m38a[6B1]
m38a[6A6]
m38a[6B7]
m38a[6B7]
m38a[6B7]
m38a[6B7]
m38a[6B7]
m38a[6B7]
m38a[6C7]
m38a[6C7]
m38a[7C6]
m38a[7D6]
m38a[7C5]
m38a[7C5]
m38a[7B4]
m38a[7B5]
m38a[7A4]
m38a[7A3]
m38a[7B1]
m38a[7B1]
m38a[7B1]
m38a[7B1]
m38a[7B7]
m38a[7B7]
m38a[7A7]
m38a[7A4]
m38a[8B7]
m38a[8A7]
m38a[10D3]
m38a[10D3]
m38a[10C6]
m38a[10D3]
m38a[10C6]
m38a[10B6]
m38a[10B6]
m38a[11B5]
m38a[11C5]
m38a[11B4]
m38a[11C5]
108
R1104
R1106
R1210
R1211
R1220
R1221
R1225
R1226
R1230
R1231
R1235
R1236
R1310
R1410
R1411
R1420
R1430
R1440
R1441
R1975
R1980
R1981
R1982
R1983
R2058
R2059
R2060
R2075
R2077
R2079
R2085
R2100
R2101
R2105
R2107
R2108
R2110
R2194
R2195
R2196
R2197
R2198
R2199
R2200
R2203
R2204
R2205
R2206
R2207
R2211
R2222
R2223
R2225
R2226
R2250
R2251
R2255
R2298
R2299
R2302
R2303
R2305
R2306
R2307
R2308
R2309
R2310
R2311
R2313
R2314
R2316
R2317
R2318
R2319
R2320
R2323
R2326
R2327
R2343
R2388
R2389
R2390
R2395
R2396
R2397
R2398
R2399
R2500
R2501
R2502
R2600
R2606
R2607
R2609
R2611
R2612
R2622
R2623
R2624
R2625
R2626
R2627
R2628
R2629
R2630
R2631
R2632
R2633
R2634
R2636
R2637
R2638
R2639
R2640
R2641
R2642
R2643
R2650
R2651
R2696
R2697
R2698
R2699
R2718
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
7
m38a[11B5]
m38a[11A3]
m38a[12C3]
m38a[12C3]
m38a[12B7]
m38a[12B7]
m38a[12B7]
m38a[12B7]
m38a[12A7]
m38a[12A7]
m38a[12A7]
m38a[12A7]
m38a[13D3]
m38a[14C3]
m38a[14C3]
m38a[14B6]
m38a[14B6]
m38a[14D6]
m38a[14D6]
m38a[19A4]
m38a[19B7]
m38a[19B7]
m38a[19B8]
m38a[19B8]
m38a[20B4]
m38a[20B4]
m38a[20A4]
m38a[20C7]
m38a[20B7]
m38a[20B7]
m38a[20C4]
m38a[21C3]
m38a[21C4]
m38a[21D6]
m38a[21C2]
m38a[21C2]
m38a[21C2]
m38a[21D4]
m38a[21C6]
m38a[21C6]
m38a[21C6]
m38a[21C6]
m38a[21C3]
m38a[22D7]
m38a[22C2]
m38a[22C2]
m38a[22C6]
m38a[22C5]
m38a[22C5]
m38a[22B3]
m38a[22D6]
m38a[22D6]
m38a[22D7]
m38a[22D5]
m38a[22D7]
m38a[22D6]
m38a[22D7]
m38a[22B5]
m38a[22B5]
m38a[23D3]
m38a[23D3]
m38a[23D3]
m38a[23B7]
m38a[23A7]
m38a[23B7]
m38a[23A7]
m38a[23A7]
m38a[23A7]
m38a[23A7]
m38a[23A7]
m38a[23D7]
m38a[23D7]
m38a[23D7]
m38a[23D2]
m38a[23D7]
m38a[23D5]
m38a[23D6]
m38a[23D6]
m38a[23D1]
m38a[23A3]
m38a[38D5]
m38a[23B3]
m38a[23D7]
m38a[23D6]
m38a[23D6]
m38a[23D8]
m38a[23C1]
m38a[25A8]
m38a[25C8]
m38a[25D8]
m38a[26C7]
m38a[26C7]
m38a[26C8]
m38a[26D7]
m38a[26D5]
m38a[26D5]
m38a[26D4]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26D2]
m38a[26C2]
m38a[26C2]
m38a[26C2]
m38a[26C2]
m38a[26C4]
m38a[26C1]
m38a[26B4]
m38a[26C3]
m38a[26C5]
m38a[26C5]
m38a[27B7]
R2719
R2750
R2751
R2800
R2801
R2900
R3001
R3009
R3011
R3025
R3035
R3100
R3101
R3300
R3301
R3302
R3303
R3304
R3400
R3401
R3402
R3403
R3404
R3405
R3406
R3407
R3408
R3409
R3410
R3411
R3412
R3413
R3414
R3415
R3416
R3417
R3418
R3419
R3420
R3421
R3422
R3423
R3424
R3429
R3430
R3431
R3432
R3433
R3434
R3435
R3436
R3437
R3438
R3439
R3440
R3441
R3442
R3443
R3444
R3445
R3446
R3451
R3452
R3453
R3454
R3455
R3456
R3457
R3458
R3459
R3460
R3461
R3462
R3463
R3470
R3471
R3485
R3486
R3487
R3488
R3489
R3490
R3491
R3492
R3493
R3494
R3495
R3496
R3497
R3498
R3499
R3824
R3851
R3852
R3853
R3857
R3858
R3859
R3897
R3899
R4101
R4102
R4103
R4104
R4105
R4106
R4117
R4118
R4119
R4120
R4122
R4123
R4130
R4131
R4150
R4151
R4202
R4300
R4350
R4351
R4352
R4353
R4354
R4355
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
m38a[27B7]
m38a[27C7]
m38a[27C7]
m38a[28C7]
m38a[28C7]
m38a[29A3]
m38a[30D4]
m38a[30D4]
m38a[30C4]
m38a[30C4]
m38a[30B4]
m38a[31C5]
m38a[31C5]
m38a[33B6]
m38a[33B7]
m38a[33D4]
m38a[33C4]
m38a[33C7]
m38a[34C5]
m38a[34B5]
m38a[34B5]
m38a[34C5]
m38a[34C5]
m38a[34C5]
m38a[34C5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34B5]
m38a[34A5]
m38a[34A5]
m38a[34A5]
m38a[34A5]
m38a[34A5]
m38a[34A5]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34C1]
m38a[34B1]
m38a[34B1]
m38a[34B1]
m38a[34B1]
m38a[34C4]
m38a[34B7]
m38a[34B8]
m38a[34B7]
m38a[34B8]
m38a[34B7]
m38a[34B7]
m38a[34B8]
m38a[34A7]
m38a[34A7]
m38a[34A7]
m38a[34A8]
m38a[34A7]
m38a[34A5]
m38a[34A5]
m38a[34D1]
m38a[34D1]
m38a[34D1]
m38a[34D1]
m38a[34D2]
m38a[34D2]
m38a[34D2]
m38a[34D2]
m38a[34D7]
m38a[34D7]
m38a[34D7]
m38a[34C5]
m38a[34D4]
m38a[34D5]
m38a[34D5]
m38a[38D2]
m38a[38D3]
m38a[38D2]
m38a[38D2]
m38a[38B3]
m38a[38B3]
m38a[38B2]
m38a[38B7]
m38a[38B5]
m38a[41D7]
m38a[41C7]
m38a[41C2]
m38a[41C2]
m38a[41C2]
m38a[41C2]
m38a[41B2]
m38a[41B2]
m38a[41B2]
m38a[41B2]
m38a[41A3]
m38a[41A2]
m38a[41C4]
m38a[41C4]
m38a[41C8]
m38a[41D7]
m38a[42D6]
m38a[43D7]
m38a[43C7]
m38a[43C7]
m38a[43C7]
m38a[43C7]
m38a[43C7]
m38a[43C7]
R4356
R4357
R4402
R4403
R4407
R4409
R4410
R4411
R4412
R4413
R4414
R4416
R4450
R4451
R4452
R4453
R4454
R4455
R4650
R4651
R4652
R4653
R4654
R4656
R4657
R4660
R4661
R4662
R4663
R4664
R4690
R4712
R4713
R4722
R4723
R4732
R4733
R4742
R4743
R4746
R4754
R4755
R5302
R5303
R5304
R5801
R5802
R5803
R5808
R5809
R5815
R5817
R5818
R5819
R5821
R5822
R5823
R5824
R5825
R5826
R5827
R5828
R5829
R5830
R5831
R5832
R5833
R5898
R5899
R5900
R5903
R5904
R5905
R5906
R5907
R5910
R5911
R5912
R5913
R5914
R5915
R5916
R5917
R5919
R5920
R5921
R5922
R5923
R5924
R5930
R5931
R5932
R5933
R5934
R5935
R5940
R5941
R5942
R5950
R5951
R5952
R5955
R5957
R5990
R5991
R5995
R6000
R6001
R6002
R6003
R6100
R6101
R6102
R6301
R6302
R6303
R6306
R6307
R6309
R6399
R6500
R6501
R6502
R6503
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_2512-1
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_805
m38a[43C7]
m38a[43B7]
m38a[44B3]
m38a[44B5]
m38a[44A7]
m38a[44B3]
m38a[44D2]
m38a[44D6]
m38a[44C1]
m38a[44C3]
m38a[44C3]
m38a[44A5]
m38a[44B3]
m38a[44B3]
m38a[44B3]
m38a[44B3]
m38a[44B3]
m38a[44B3]
m38a[46C8]
m38a[46C7]
m38a[46B8]
m38a[46B7]
m38a[46B7]
m38a[46D6]
m38a[46D6]
m38a[46C7]
m38a[46C7]
m38a[46B7]
m38a[46B7]
m38a[46B7]
m38a[46A7]
m38a[47C5]
m38a[47C5]
m38a[47B5]
m38a[47B5]
m38a[47A5]
m38a[47A5]
m38a[47C2]
m38a[47C2]
m38a[47D2]
m38a[47C2]
m38a[47B2]
m38a[53B4]
m38a[53B4]
m38a[53C6]
m38a[58C2]
m38a[58C2]
m38a[58C2]
m38a[59C3]
m38a[58C2]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59B3]
m38a[59C5]
m38a[59B3]
m38a[59C3]
m38a[59C3]
m38a[59C3]
m38a[59C3]
m38a[59B3]
m38a[58C2]
m38a[58D3]
m38a[59D7]
m38a[59D2]
m38a[59D2]
m38a[59D2]
m38a[59D2]
m38a[59B7]
m38a[59D2]
m38a[59D2]
m38a[59D2]
m38a[59D2]
m38a[59D2]
m38a[59D2]
m38a[59C2]
m38a[59C2]
m38a[59B4]
m38a[59B5]
m38a[59B5]
m38a[59B5]
m38a[59B5]
m38a[59B5]
m38a[59B6]
m38a[59B6]
m38a[59A7]
m38a[59A7]
m38a[59A6]
m38a[59A6]
m38a[59A3]
m38a[59A5]
m38a[59A4]
m38a[60A7]
m38a[60B7]
m38a[60B6]
m38a[60B7]
m38a[60A7]
m38a[60A7]
m38a[60A7]
m38a[59A5]
m38a[60A6]
m38a[60A6]
m38a[60A6]
m38a[60A5]
m38a[61C4]
m38a[61C5]
m38a[61C5]
m38a[63D4]
m38a[63D4]
m38a[63C2]
m38a[63C2]
m38a[63C5]
m38a[63C5]
m38a[63D2]
m38a[65C7]
m38a[65A7]
m38a[65D6]
m38a[65D5]
R6504
R6505
R6506
R6507
R6508
R6509
R6510
R6511
R6512
R6513
R6514
R6515
R6598
R6599
R6600
R6601
R6602
R6603
R6604
R6605
R6606
R6607
R6697
R6700
R6702
R6703
R6704
R6705
R6798
R6799
R6800
R6802
R6807
R6808
R6810
R6811
R6815
R7208
R7212
R7213
R7214
R7215
R7216
R7217
R7218
R7219
R7302
R7305
R7306
R7308
R7400
R7404
R7405
R7407
R7408
R7409
R7410
R7411
R7412
R7413
R7414
R7415
R7416
R7417
R7418
R7419
R7420
R7421
R7422
R7423
R7424
R7425
R7426
R7427
R7430
R7431
R7435
R7437
R7440
R7442
R7443
R7500
R7501
R7502
R7503
R7504
R7505
R7506
R7507
R7508
R7509
R7510
R7511
R7512
R7513
R7514
R7515
R7516
R7517
R7518
R7519
R7520
R7521
R7522
R7523
R7526
R7527
R7528
R7529
R7530
R7531
R7540
R7541
R7590
R7591
R7592
R7593
R7594
R7595
R7596
R7597
R7598
R7599
R7602
RES_805
RES_805
RES_402
RES_805
RES_805
RES_805
RES_1206
RES_402
RES_805
RES_805
RES_805
RES_805
RES_402
RES_402
RES_402
RES_805
RES_805
RES_805
RES_1206
RES_402
RES_805
RES_805
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_805
RES_402
RES_805
RES_805
RES_805
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_805
RES_402
RES_603
RES_1206
RES_1206
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
THERMISTER_402
RES_402
RES_402
RES_402
RES_402
THERMISTER_0603-LF
RES_603
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_2512-1
RES_402
m38a[65C5]
m38a[65D5]
m38a[65D6]
m38a[65B5]
m38a[65B5]
m38a[65B5]
m38a[65B6]
m38a[65B6]
m38a[65C5]
m38a[65B5]
m38a[65B4]
m38a[65C4]
m38a[65A7]
m38a[65C7]
m38a[66C7]
m38a[66D5]
m38a[66C4]
m38a[66D5]
m38a[66D5]
m38a[66D6]
m38a[66C5]
m38a[66C3]
m38a[66C8]
m38a[67C6]
m38a[67C4]
m38a[67C4]
m38a[67C2]
m38a[67C3]
m38a[67B6]
m38a[67B6]
m38a[68C6]
m38a[68A5]
m38a[68D7]
m38a[68D3]
m38a[68A3]
m38a[68A3]
m38a[68B7]
m38a[72A4]
m38a[72B8]
m38a[72B7]
m38a[72C5]
m38a[72C7]
m38a[72C5]
m38a[72B5]
m38a[72A5]
m38a[72B6]
m38a[73A3]
m38a[73C8]
m38a[73D4]
m38a[73B8]
m38a[74B4]
m38a[74D5]
m38a[74D5]
m38a[74B4]
m38a[74A4]
m38a[74B4]
m38a[74D2]
m38a[74C2]
m38a[74C2]
m38a[74B4]
m38a[74B7]
m38a[74B8]
m38a[74C7]
m38a[74C8]
m38a[74B6]
m38a[74B6]
m38a[74D5]
m38a[74D8]
m38a[74D7]
m38a[74B6]
m38a[74B6]
m38a[74A5]
m38a[74A4]
m38a[74A4]
m38a[74C1]
m38a[74C2]
m38a[74A3]
m38a[74C5]
m38a[74D2]
m38a[74D3]
m38a[74D3]
m38a[75C2]
m38a[75C2]
m38a[75B2]
m38a[75D2]
m38a[75C1]
m38a[75B2]
m38a[75B2]
m38a[75B1]
m38a[75B8]
m38a[75B8]
m38a[75B6]
m38a[75B7]
m38a[75D7]
m38a[75B7]
m38a[75B8]
m38a[75B4]
m38a[75B4]
m38a[75B5]
m38a[75B5]
m38a[75C7]
m38a[75D7]
m38a[75D7]
m38a[75A5]
m38a[75A5]
m38a[75C8]
m38a[75C8]
m38a[75A5]
m38a[75A5]
m38a[75B4]
m38a[75B4]
m38a[75C1]
m38a[75B1]
m38a[75C7]
m38a[75C7]
m38a[75C7]
m38a[75C7]
m38a[75C7]
m38a[75C7]
m38a[75D7]
m38a[76D6]
m38a[76D7]
m38a[76D7]
m38a[76D3]
109
R7612
R7620
R7623
R7630
R7631
R7632
R7640
R7691
R7700
R7701
R7704
R7705
R7706
R7707
R7708
R7710
R7750
R7751
R7752
R7753
R7754
R7757
R7793
R7794
R7798
R7799
R7800
R7801
R7802
R7803
R7804
R7805
R7812
R7840
R7892
R7901
R7902
R7903
R7904
R7905
R7906
R7910
R7911
R7912
R7913
R7914
R7915
R7940
R7991
R7992
R7999
R8000
R8001
R8002
R8003
R8004
R8005
R8007
R8010
R8011
R8012
R8040
R8092
R8099
R8101
R8102
R8103
R8104
R8105
R8107
R8110
R8140
R8190
R8191
R8192
R8198
R8199
R8300
R8301
R8302
R8303
R8495
R8496
R8497
R8502
R8503
R8504
R8505
R8506
R8507
R8508
R8510
R8521
R8522
R8588
R8590
R8591
R8592
R8593
R8594
R8596
R8597
R8598
R8599
R8630
R8710
R8711
R8712
R8713
R8720
R8721
R8722
R8723
R8730
R8731
R8732
R8733
R8800
R8801
R8802
R8803
R8804
R8805
R8806
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
THERMISTER_0603-LF
RES_402
RES_1206
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
7
m38a[76B2]
m38a[76D2]
m38a[76D1]
m38a[76C8]
m38a[76C8]
m38a[76C7]
m38a[76A7]
m38a[76C7]
m38a[77D3]
m38a[77D4]
m38a[77C4]
m38a[77C3]
m38a[77D2]
m38a[77D1]
m38a[77D1]
m38a[77D3]
m38a[77B4]
m38a[77A4]
m38a[77B4]
m38a[77A6]
m38a[77B7]
m38a[77B7]
m38a[77D7]
m38a[77C7]
m38a[77C7]
m38a[77D7]
m38a[78C7]
m38a[78B7]
m38a[78B3]
m38a[78B3]
m38a[78B4]
m38a[78B5]
m38a[78B3]
m38a[78C5]
m38a[78B7]
m38a[79C3]
m38a[79C4]
m38a[79C3]
m38a[79C5]
m38a[79D7]
m38a[79A4]
m38a[79B2]
m38a[79B3]
m38a[79B3]
m38a[79A2]
m38a[79A3]
m38a[79A3]
m38a[79D5]
m38a[79C7]
m38a[79C7]
m38a[79C3]
m38a[80C3]
m38a[80C7]
m38a[80C4]
m38a[80C3]
m38a[80C5]
m38a[80D7]
m38a[80A4]
m38a[80B2]
m38a[80B3]
m38a[80B3]
m38a[80C5]
m38a[80C7]
m38a[80C3]
m38a[81C3]
m38a[81C4]
m38a[81C3]
m38a[81C5]
m38a[81D7]
m38a[81A4]
m38a[81B3]
m38a[81C5]
m38a[81C3]
m38a[81C7]
m38a[81C7]
m38a[81A5]
m38a[81A5]
m38a[83B4]
m38a[83C5]
m38a[83B5]
m38a[83C4]
m38a[84A2]
m38a[84A2]
m38a[84A2]
m38a[85D6]
m38a[85D7]
m38a[85D7]
m38a[85C7]
m38a[85C8]
m38a[85D7]
m38a[85C7]
m38a[85C5]
m38a[85C3]
m38a[85C3]
m38a[85C5]
m38a[85C3]
m38a[85D3]
m38a[85D2]
m38a[85D3]
m38a[85D3]
m38a[85D3]
m38a[85D3]
m38a[85D2]
m38a[85C4]
m38a[86C7]
m38a[87B8]
m38a[87A8]
m38a[87B7]
m38a[87A7]
m38a[87B4]
m38a[87A4]
m38a[87B4]
m38a[87A4]
m38a[87A3]
m38a[87A3]
m38a[87A3]
m38a[87A1]
m38a[88D7]
m38a[88A7]
m38a[88D4]
m38a[88D4]
m38a[88D4]
m38a[88C4]
m38a[88C4]
R8807
R8808
R8809
R8810
R8811
R8812
R8813
R8830
R8831
R8832
R8833
R8850
R8930
R8931
R8932
R8933
R8940
R8941
R8942
R8943
R8944
R8945
R8946
R8947
R8948
R8949
R8980
R8981
R8982
R8983
R8990
R8991
R8992
R8993
R8994
R8995
R8996
R8997
R8998
R8999
R9030
R9031
R9032
R9033
R9040
R9041
R9042
R9043
R9044
R9045
R9046
R9047
R9048
R9049
R9080
R9081
R9082
R9083
R9090
R9091
R9092
R9093
R9094
R9095
R9096
R9097
R9098
R9099
R9190
R9191
R9195
R9202
R9250
R9350
R9351
R9370
R9371
R9372
R9373
R9390
R9391
R9400
R9401
R9410
R9411
R9450
R9470
R9472
R9473
R9474
R9475
R9490
R9491
R9701
R9706
R9707
R9710
R9711
R9712
R9713
R9714
R9716
R9717
R9720
R9721
R9722
R9740
R9741
R9742
R9750
R9751
RP2300
RP3000
RP3001
RP3002
RP3003
RP3004
RP3005
RP3006
RP3007
RP3008
RP3009
RP3010
RP3011
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
m38a[88C4]
m38a[88C4]
m38a[88C4]
m38a[88C4]
m38a[88B4]
m38a[88C4]
m38a[88D4]
m38a[88B4]
m38a[88B4]
m38a[88B4]
m38a[88B4]
m38a[88B4]
m38a[89C7]
m38a[89C7]
m38a[89C7]
m38a[89C7]
m38a[89B8]
m38a[89B8]
m38a[89B7]
m38a[89B7]
m38a[89B7]
m38a[89B7]
m38a[89B7]
m38a[89B7]
m38a[89A7]
m38a[89A7]
m38a[89C4]
m38a[89C4]
m38a[89C4]
m38a[89C4]
m38a[89B5]
m38a[89B4]
m38a[89B4]
m38a[89B4]
m38a[89B4]
m38a[89B4]
m38a[89B4]
m38a[89B4]
m38a[89A4]
m38a[89A4]
m38a[90C7]
m38a[90C7]
m38a[90C7]
m38a[90C7]
m38a[90B8]
m38a[90B8]
m38a[90B7]
m38a[90B7]
m38a[90B7]
m38a[90B7]
m38a[90B7]
m38a[90B7]
m38a[90A7]
m38a[90A7]
m38a[90C4]
m38a[90C4]
m38a[90C4]
m38a[90C4]
m38a[90B5]
m38a[90B4]
m38a[90B4]
m38a[90B4]
m38a[90B4]
m38a[90B4]
m38a[90B4]
m38a[90B4]
m38a[90A4]
m38a[90A4]
m38a[91D2]
m38a[91D2]
m38a[91A3]
m38a[92C6]
m38a[92C6]
m38a[93A8]
m38a[93A8]
m38a[93D1]
m38a[93D1]
m38a[93C1]
m38a[93C1]
m38a[93A1]
m38a[93A1]
m38a[94C8]
m38a[94C7]
m38a[94C6]
m38a[94C6]
m38a[94C2]
m38a[94C7]
m38a[94B3]
m38a[94B2]
m38a[94B2]
m38a[94B1]
m38a[94C6]
m38a[94D6]
m38a[97D8]
m38a[97D8]
m38a[97C8]
m38a[97D2]
m38a[97D2]
m38a[97D2]
m38a[97C2]
m38a[97C2]
m38a[97C8]
m38a[97C8]
m38a[97D1]
m38a[97D1]
m38a[97C2]
m38a[97A8]
m38a[97A8]
m38a[97A7]
m38a[97B3]
m38a[97A3]
m38a[23D5]
m38a[30B4 30C4
m38a[30C4 30A4
m38a[30A4 30A4
m38a[30C4 30C4
m38a[30C4 30C4
m38a[30B4 30A4
m38a[30B4 30B4
m38a[30C4 30C4
m38a[30C4 30C4
m38a[30B4 30B4
m38a[30B4 30B4
m38a[30B4 30A4
5
RP7200
SDF4700
SDF4701
SDF5300
SDF5301
SDF9400
SDF9401
SW2600
SW5900
SW5901
U600
U601
U650
U1000
U1200
U1200
U1200
U1200
U1200
U1200
U1200
U2100
U2100
U2100
U2100
U2601
U2603
U2698
U2699
U3100
U3301
U4101
U4102
U4400
U4700
U5800
U5900
U5940
U5999
U6100
U6301
U6700
U6800
U7200
U7400
U7500
U7501
U7700
U7710
U7711
U7712
U7750
U7800
U7900
U7901
U7901
U7901
U7910
U7910
U7910
U8000
U8100
U8400
U8400
U8400
U8400
U8400
U8500
U8595
U8900
U8950
U9000
U9050
U9470
U9750
U9751
VR6800
XC7200
XW601
XW602
XW604
XW605
XW5800
XW5900
XW6801
XW7201
XW7300
XW7307
XW7400
XW7440
XW7500
XW7501
XW7502
XW7503
XW7504
XW7598
XW7700
XW7750
XW7800
XW7900
30D4 30D4]
30A4 30D4]
30A4 30D4]
30C4 30D4]
30D4]
30A4 30D4]
30A4 30D4]
30C4 30C4]
30C4 30C4]
30C4 30C4]
30B4 30B4]
30B4 30B4]
RPAK4P_SM-LF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
SWI_TACT_4SM_EVQPH_S
M-LF
SWI_TACT_4SM_EVQPH_S
M-LF
SWI_TACT_4SM_EVQPH_S
M-LF
74LC125_TSSOP
SN74LVC1G04_SOT23-5
74AHC1G32_SM-LF
ADT7461_MSOP
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
SB_ICH7M_BGA
SB_ICH7M_BGA
SB_ICH7M_BGA
SB_ICH7M_BGA
MC74VHC1G08_SOT23-5LF
SN74LVC1G04_SOT23-5
MC74VHC1G08_SOT23-5LF
MAX6816_SOT143
LREG_BD3533FVM_MSOP8
CLK_GEN_CY284455_QFN
88E8053_QFN
EEPROM_M24C08_SO8
FW32306_TQFP
SWI_TPS2043_SOI
SMC_H8S2116_BGA
VDET_RN5VD_SOT23-5
VREF_REF3133_SOT23-3
COMPARATOR_LM393_SOI
-1-LF
MAX6695_UMAX
FLASH_SST25VF016B_SO
I_SOI
TPM_TSSOP
AUDIO_STAC92204XR_LQ
FP
MAX9714_QFN-LF
MAX9890_UCSP1
ISL6262_QFN
ZXCT1010_SOT23-5
LTC3411_MSOP-LF
MC74VHC1G08_SOT23-5LF
MC74VHC1G08_SOT23-5LF
MC74VHC1G08_SOT23-5LF
SN200505068_SOP
ISL6549_QFN
ISL6549_QFN
COMPARATOR_LM339A_SO
I-LF
COMPARATOR_LM339A_SO
I-LF
COMPARATOR_LM339A_SO
I-LF
COMPARATOR_LM339A_SO
I-LF
COMPARATOR_LM339A_SO
I-LF
COMPARATOR_LM339A_SO
I-LF
ISL6549_QFN
ISL6549_QFN
ATI_M56P_BGA
ATI_M56P_BGA
ATI_M56P_BGA
ATI_M56P_BGA
ATI_M56P_BGA
ISL6269_QFN
OPAMP_LMV2011_SOT235
SGRAM_16MX32_GDDR3_1
36H_FBGA
SGRAM_16MX32_GDDR3_1
36H_FBGA
SGRAM_16MX32_GDDR3_1
36H_FBGA
SGRAM_16MX32_GDDR3_1
36H_FBGA
MC74VHC1G08_SOT23-5LF
74AHC1G32_SM-LF
74AHC1G32_SM-LF
LREG_MAX1819_UCSP
MTGHOLE
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
m38a[72A4]
m38a[47A2]
m38a[47A2]
m38a[53A5]
m38a[53A5]
m38a[94B6]
m38a[94A6]
m38a[26C6]
m38a[59D8]
m38a[59B8]
m38a[6B7 6B7 6B7 6C7]
m38a[6C7]
m38a[6A7]
m38a[10D5]
m38a[12D5]
m38a[13D4]
m38a[14D5]
m38a[15D3 15D7]
m38a[16D2 16C8]
m38a[17D5]
m38a[18D4 18D7]
m38a[21D6]
m38a[22B7 22D3]
m38a[23D4]
m38a[24D4 24D7]
m38a[26D5]
m38a[26A7]
m38a[26C4]
m38a[26C5]
m38a[31C5]
m38a[33C5]
m38a[41D5]
m38a[41A3]
m38a[44D5]
m38a[47C7]
m38a[58A8 58C3 58C6 58D6]
m38a[59D8]
m38a[59A4]
m38a[59A8 59A8]
m38a[61C4]
m38a[63D3]
3
XW8000
XW8100
XW8500
Y2600
Y3301
Y4101
Y4400
Y5800
Y6700
ZH500
ZH501
ZH502
ZH503
ZH504
ZH505
ZH506
ZH507
ZH508
ZH509
ZH510
ZH511
ZH512
ZH513
ZH514
ZH515
ZH516
ZH517
ZH518
ZH519
ZH520
ZH521
ZH522
ZH523
ZH524
ZH525
ZH526
ZH527
ZH528
ZH529
ZH601
ZH602
ZH603
ZH604
ZH606
ZH607
ZH608
ZH609
ZH610
ZH611
SHORT_SM
SHORT_SM
SHORT_SM
CRYSTAL_4PIN_SM-LF
CRYSTAL_5X3.2-SM
CRYSTAL_SM-3-LF
CRYSTAL_HC49-USMD
CRYSTAL_SM-3
CRYSTAL_4PIN_SM-LF
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
m38a[80C6]
m38a[81C6]
m38a[85C6]
m38a[26D8]
m38a[33C7]
m38a[41B5]
m38a[44D2]
m38a[59B8]
m38a[59B7]
m38a[5C1]
m38a[5C1]
m38a[5C1]
m38a[5C1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5C1]
m38a[5C1]
m38a[5C1]
m38a[5C1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5C1]
m38a[5C1]
m38a[5C1]
m38a[5C1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[5B1]
m38a[6A3]
m38a[6A3]
m38a[6A3]
m38a[6B3]
m38a[6A1]
m38a[9D4]
m38a[9D3]
m38a[9D2]
m38a[9D2]
m38a[9C3]
m38a[67C5]
m38a[68D5]
m38a[72C5]
m38a[74C4]
m38a[75C6]
m38a[76D7]
m38a[77D3]
m38a[77D5]
m38a[77C5]
m38a[77D4]
m38a[77B6]
m38a[78C6]
m38a[79D6]
m38a[79A5]
m38a[80A4]
m38a[81A5]
m38a[79A3 79B3]
m38a[80B2]
m38a[81B3]
m38a[80D6]
m38a[81D6]
m38a[84C8 84D4]
m38a[86D4]
m38a[87D2 87D6]
m38a[91D4]
m38a[93C4]
m38a[85D6]
m38a[85D2]
m38a[89D6 89B6]
m38a[89D3 89B3]
m38a[90D6 90B6]
m38a[90D3 90B3]
m38a[94B2]
m38a[97B4]
m38a[97A4]
m38a[68A4]
m38a[72B3]
m38a[6C2]
m38a[6C2]
m38a[6A5]
m38a[6A5]
m38a[58B3]
m38a[59B1]
m38a[68B5]
m38a[72B2]
m38a[73C3]
m38a[73C6]
m38a[74A4]
m38a[74C2]
m38a[75A6]
m38a[75B2]
m38a[75B1]
m38a[75D2]
m38a[75D1]
m38a[76D7]
m38a[77C2]
m38a[77A5]
m38a[78B6]
m38a[79C6]
110