IFTXX M/B LA-3541P Schematic Block Diagram and Notes

A
ZZZ1
PJP1
PJP1
PCB
14W_DCIN
15W_DCIN
14W_45@
15W_45@
12/21 Add PJP1 for DCIN Cable on 45 Level

One for 14W DCIN , PN: DC301001Y00
Another for 15W DCIN , PN: DC301001V00
Compal Confidential
2
IFTxx Schematics Document

Intel Merom Processor with Crestline + DDRII + ICH8M
(With nVIDIA MXM/B)
2006-1-31
REV: 0.3
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Cover Page
Size
B
Date:
Document Number
Rev
0.3
IFTXX M/B LA-3541P Schematic

Sheet
Friday, February 09, 2007

E
of
53
Compal Confidential
Model Name : IFTXX
File Name : LA-3541P
Thermal Sensor
Intel Merom Processor
Fan Control
Clock Generator
ADM1032
page 4
ICS9LPRS365
page 4
uPGA-478 Package
page 16
page 4,5,6
FSB
667/800MHz
H_A#(3..35)
CRT & TV-out
H_D#(0..63)
page 19
LCD Conn.
Video Processor
page 18
page 18
LVDS
SDVO
LVDS
Memory BUS(DDRII)
Intel Crestline
Dual Channel
MXM II VGA/B
page 7,8,9,10,11,12,13
DMI
X4 mode
page 17
USB conn x2
TO M/B
page 33
3G/TV-Tuner
Robson page
LAN(GbE)
BCM5787M/5906
ENE CB1410
32
page 30
RJ45
page 31
CardBus
IDSEL:AD22
(PIRQG#,PIRQH#,
GNT#0, REQ#0)
CMOS Camera
33
Finger Print
Conn page 42
page 42
USB
3.3V 48MHz
3.3V 24.576MHz/48Mhz
3.3V 33 MHz
3.3V ATA-100
BGA-676
S-ATA
page 20,21,22,23
HD Audio
IDE
port 0
CDROM
Conn.
page 24
MDC 1.5
Conn
page 42
HDA Codec
ALC268
page 38
R5C833
page 28
1394
Conn.
page 28
S-ATA HDD
Conn. page 24
3 in 1
socket
Audio AMP
page 39
LPC BUS
page 29
RTC CKT.
SUPER I/O
ENE KB925
page 21
TPMpage
29
LPC47N217
page 34
Power On/Off CKT.
page 37
Card Reader
page 26
PCMCIA
Socket
page 26
Bluetooth
Conn page
Intel ICH8-M
PCI BUS
New Card MINI Card x3

WLAN,
Socket
USB conn x2
TO I/O/B
page 33
PCI-Express
IDSEL:AD20
(PIRQC#,PIRQD#,
GNT#2, REQ#2)
page 14,15
BANK 0, 1, 2, 3
1.8V DDRII 533/667
uFCBGA-1299
PCI-Express
200pin DDRII-SO-DIMM X2
page 41
Switch/B Conn.
page 37
Int.KBD
Touch Pad
page 35
page 36
page 35
DC/DC Interface CKT.

page 43
Power Circuit DC/DC

4
page 44,45,47,48
49,50,51
CHARGER
G-Sensor
I/O Conn.
FRONT LCD /B.
LID SW
BIOS
page 25
SCREW
page 40
page 36
page 37
2006/08/18
Issued Date
Compal Secret Data
page 46
2007/8/18
Deciphered Date
A
Title
Block Diagrams
Size
B
Date:
Document Number

Sheet
Thursday, February 08, 2007

E
of
53
Rev
0.2
Voltage Rails
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Power Plane
Description
S1
S3
S5
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+0.9VS ( Actual +0.9V )
0.9V switched power rail for DDR terminator
ON
ON
OFF
+1.05VS
1.05V switched power rail
ON
OFF
OFF
+1.25VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8V
1.8V power rail for DDR
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
Device
Address
Device
Address
+3VALW
3.3V always on power rail
ON
ON
ON*
Smart Battery
0001 011X b
ADI ADM1032
1001 100X b
+3VS
ON
OFF
OFF
EEPROM(24C16/02)
1010 000X b
NVIDIA NB8X
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
External PCI Devices

DEVICE
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
PIRQ
C,D
1394+Cardreader
AD22
G,H
+VALW
+V
+VS
Clock
ON
ON
HIGH
HIGH
HIGH
ON
ON
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
Vcc
Rb
ID1
ID0
IFT00 ( 00@ )
R284
R283
IFT01 ( 01@ )
R284
R281
IFL90 ( 10@ )
R694
R283
IFT91 ( 11@ )
R694
R281
Board ID
1
2
3
4
5
6
7
8
9
10
11
12
Structure
15W@
14W@
MIC ID Table
R
R785 Single MIC
R786 Array MIC
Structure
INT@
DUAL@
1101 001Xb
DDR DIMM0
1010 000Xb
DDR DIMM1
1010 010Xb
3.3V +/- 5%
47K +/- 5%
Rb
NA
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
47K(RB@)
R743
R743
R743
R743
R743
4.7K_0402_5%
H_14_C@
10K_0402_5%
H_14_MP
18K_0402_5%
H_15_B@
27K_0402_5%
H_15_C@
39K_0402_5%
H_15_MP@
R743
R743
R743
R743
R743
56K_0402_5%
L_14_B@
82K_0402_5%
L_14_C@
120K_0402_5%
L_14_MP@
220K_0402_5%
L_15_B@
470K_0402_5%
L_15_C@
Ra
4.7K +/- 5%
4.7K +/- 5%
10K +/- 5%
18K +/- 5%
27K +/- 5%
39K +/- 5%
56K +/- 5%
82K +/- 5%
120K +/- 5%
220K +/- 5%
470K +/- 5%
NA
V AD_BID min
0 V
0.274 V
0.553V
0.849V
1.129 V
1.415 V
1.712 V
2.020V
2.303 V
2.670 V
2.972 V
3.135 V
V AD_BID typ
0 V
0.300 V
0.578 V
0.913V
1.204 V
1.496 V
1.794 V
2.097 V
2.371 V
2.719 V
3.000 V
3.300 V
2006/08/18
2007/8/18
Deciphered Date
A
Ra BOM Structure
H_14_B@
H_14_C@
H_14_MP@
H_15_B@
H_15_C@
H_15_MP@
L_14_B@
L_14_C@
L_14_MP@
L_15_B@
L_15_C@
NA for L_15_MP
V AD_BID max
0 V
0.328 V
0.628 V
0.981 V
1.282 V
1.579 V
1.876 V
2.173 V
2.437 V
2.765 V
3.026 V
3.465 V
Compal Secret Data
Issued Date
Address
Clock Generator
(ICS9LPRS325AKLFT_MLF72)
Rb~ R740
Ra~ R743
BOARD ID Table
R
Ra (R743)
Rb (R740)
EC SM Bus2 address
Device
SKU ID Table
PROJECT ID Table
ICH8M SM Bus address
HIGH
Full ON
REQ/GNT #
AD20
EC SM Bus1 address
STATE
IDSEL #
CARD BUS CB1410
Title
Notes List
Size
B
Date:
Document Number
Rev
0.2

Sheet

E
of
53
H_A#[3..35]
H_A#[3..35]
Place close to CPU within 500mil
H_REQ#[0..4]
<7> H_REQ#[0..4]
JP36A
H_ADSTB#0
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
K3
H2
K2
J3
L1
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
H_ADSTB#1
H_A20M#
H_FERR#
H_IGNNE#
A6
A5
C4
A20M#
FERR#
IGNNE#
<21> H_STPCLK#
<21>
H_INTR
<21>
H_NMI
<21>
H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
H1
E2
G5
H_ADS#
H_BNR#
H_BPRI#
H5
F21
E1
H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>
F1
IERR#
INIT#
D20
B3
LOCK#
H4
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
HIT#
HITM#
G6
E4
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
D21
A24
B25
<7>
<7>
<7>
H_BR0#
<7>
H_INIT#
<21>
H_LOCK# <7>
H_RESET#
H_RS#0
H_RS#1
H_RS#2
CRB pull 75 Ohm
H_RESET# <7>
+1.05VS
12/13 NA for Intel recommend
Checklist recommend 39 Ohm

H_PREQ#
R559 1
2 @ 56_0402_5%
H_IERR#
R560 1
56_0402_5%
ITP_TMS
R562 1
56_0402_5%
ITP_TDI
R563 1
150_0402_1%
H_PROCHOT#
R565 1
56_0402_5%
ITP_TCK
R568 1
27.4_0402_1%
ITP_TRST#
R569 1
680_0402_5%
H_IERR#
H_TRDY# <7>
H_HIT#
H_HITM#
<7>
<7>
ADM1032
+3VS
C687
0.1U_0402_16V4Z
1
2
H_PREQ#
ITP_TCK
ITP_TDI
U38
1
C688
ITP_TMS
ITP_TRST#
ITP_DBRESET#
2200P_0402_50V7K
2
ITP_DBRESET# <22>
H_PROCHOT#
THERMAL
ICH
H_PROCHOT# <51>
VDD
SCLK
EC_SMB_CK2 <17,34>
THERMDA
D+
SDATA
EC_SMB_DA2 <17,34>
THERMDC
D-
ALERT#
THERM#
GND
Connect SB SYS_RESET# or just left NC
THERMDA
THERMDC
ADM1032ARMZ_MSOP8
C7
H_THERMTRIP# <8,21>
A22
A21
CLK_CPU_BCLK <16>
CLK_CPU_BCLK# <16>
F75383M_MSOP8
H CLK
BCLK[0]
BCLK[1]
12/21 Change D4,D5 from @ to mount
FAN1 Conn
D5 change from 1N4148 to SC100000Y10
12/27 change C28,C29 to 10U_0805
H_THERMDA, H_THERMDC routing together,

Trace width / Spacing = 10 / 10 mil
0208 Change D5 from SC100000Y10 to

SC1BAS16000
12/29 change D4 to SC1SS355010 (IEL10)

+5VS
C28
+5VS
10U_0805_10V4Z
2
<21>
<21>
<21>
BR0#
ADDR GROUP 1
<7>
DEFER#
DRDY#
DBSY#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
ADS#
BNR#
BPRI#
CONTROL
<7>
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP 0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
XDP/ITP SIGNALS
H_RS#[0..2]
<7> H_RS#[0..2]
RESERVED
<7>
U5
<34> EN_FAN1
1
2
3
4
+VCC_FAN1
EN_FAN1
D4
VEN
VIN
VO
VSET
GND
GND
GND
GND
8
7
6
5
1SS355_SOD323
Merom Ball-out Rev 1a

conn@
G993P1UF_SOP8
D5
1
BAS16_SOT23-3
C29 <BOM Structure>
10U_0805_10V4Z
1
2
+3VS
C30
1000P_0402_50V7K
1
2
R44
10K_0402_5%
40mil
JP6
+VCC_FAN1
<34> FAN_SPEED1
C31
1000P_0402_50V7K
1
2
3
1
2
3
4
5
GND
GND
2
A
ACES_85205-03001
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Merom (1/3)
Size
B
Date:
Document Number

Sheet
1
of
53
Rev
0
H_D#[0..63]
H_D#[0..63]
<7>
<7>
<7>
H_DSTBN#0
H_DSTBP#0
H_DINV#0
+1.05VS
R549
1K_0402_1%
<7>
<7>
<7>
Width=20 mil
R551
R553
GTL_REF
TEST1
1 @ 1K_0402_5%
TEST2
1 @ 1K_0402_5%
TEST3
T19 PAD
2 @ 0.1U_0402_16V4Z TEST4
TEST5
T20 PAD
TEST6
T21 PAD
2
2
C684 1
AD26
C23
D25
C24
AF26
AF1
A26
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
B22
B23
C21
<16> CPU_BSEL0
<16> CPU_BSEL1
<16> CPU_BSEL2
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DATA GRP 2
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
MISC
R556
2K_0402_1%
H_DSTBN#1
H_DSTBP#1
H_DINV#1
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
DATA GRP 1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
Close to CPU pin AD26

within 500mils.
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DATA GRP 3
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
JP36C
<7>
+CPU_CORE
JP36B
BSEL[0]
BSEL[1]
BSEL[2]
H_DSTBN#2 <7>
H_DSTBP#2 <7>
H_DINV#2 <7>
H_DSTBN#3 <7>
H_DSTBP#3 <7>
H_DINV#3 <7>
COMP0
COMP1
COMP2
COMP3
R550
R552
R554
R555
1
1
1
1
H_PWRGOOD
H_CPUSLP#
2
2
2
2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
H_DPRSTP# <8,21,51>
H_DPSLP# <21>
H_DPWR# <7>
H_PWRGOOD <21>
H_CPUSLP# <7>
H_PSI#
<51>

conn@
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
166
200
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE

conn@
+CPU_CORE
D
Place this cap more close to

B26/C26 rather than 10UF
+1.05VS
1
+ C677
330U_D2E_2.5VM_R9
20mils
+1.5VS
1
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
1
R557
<51>
<51>
<51>
<51>
<51>
<51>
<51>
C686
2 0.01U_0402_16V7K
2
100_0402_1%
C685
10U_0805_10V4Z
+CPU_CORE
VCCSENSE <51>
VSSSENSE <51>
R558 1
100_0402_1%
Length match within 25 mils.

The trace width/space/other is
20/7/25.
Close to CPU pin
within 500mils.
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Merom (2/3)
Size
B
Date:
Document Number
Rev
0

Sheet
1
of
53
+CPU_CORE
+CPU_CORE
3 x 330uF(9mOhm/3)
JP36D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
1
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

conn@
3 x 330uF(9mOhm/3)
C645 +
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
2
2
330U_D2E_2.5VM_R9
C643
C644
C648 +
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
2
2
330U_D2E_2.5VM_R9
C646
C647
South Side Secondary
North Side Secondary
+CPU_CORE
CRB no stuff. Reserved!

1
C649
C650
C651
C652
C653
C654
C655
C656
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Secondary Layer)

+CPU_CORE
C657
C658
C659
C660
C661
C662
C663
C664
9/25 10U checked. OK for use!
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on North side,Secondary Layer)

+CPU_CORE
C665
C666
C667
C668
C669
C670
C700
C701
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Primary Layer)

+CPU_CORE
C671
C672
C673
C674
C675
C676
C702
C703
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on North side,Primary Layer)
+CPU-CORE
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
C,uF
ESR, mohm
ESL,nH
6X330uF
9m ohm/6
1.8nH/6
32X22uF
3m ohm/32
0.6nH/32
32X10uF
3m ohm/32
0.6nH/32
+1.05VS
C678
C679
C680
C681
C682
C683
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Merom (3/3)
Size
B
Date:
Document Number
Rev
0

Sheet
1
of
53
1/2 change U37 PM part number to SA00001DJ90
+1.05VS
R539
221_0402_1%
H_SWNG
R540
100_0402_1%
0.1U_0402_16V4Z
C641
Near B3 pin
H_RCOMP
R541
24.9_0402_1%
+1.05VS
Route H_SCOMP and H_SCOMP# with

trace width, spacing and
impedance (55 ohm) same as FSB
data traces
layout note:
R542
R543
54.9_0402_1%
H_A#[3..35]
U37A
H_D#[0..63]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
54.9_0402_1%
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
HOST
<5>
+1.05VS
<4>
H_RESET#
<5> H_CPUSLP#
R544
H_SWNG
H_RCOMP
B3
C2
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
W1
W2
H_SCOMP
H_SCOMP#
H_RESET#
H_CPUSLP#
B6
E5
H_CPURST#
H_CPUSLP#
1K_0402_1%
H_VREF
R546
C642
B9
A9
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
K5
L2
AD13
AE13
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
M7
K3
AD2
AH11
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
L7
K2
AC2
AJ10
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
M14
E13
A11
H13
B12
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#_0
H_RS#_1
H_RS#_2
E12
D7
D8
H_RS#0
H_RS#1
H_RS#2
<4>
U37
965GM
GM@
1/2 change U37 GM part number to SA00000ZW80
H_ADS# <4>
H_ADSTB#0 <4>
H_ADSTB#1 <4>
H_BNR# <4>
H_BPRI# <4>
H_BR0#
<4>
H_DEFER# <4>
H_DBSY# <4>
CLK_MCH_BCLK <16>
CLK_MCH_BCLK# <16>
H_DPWR# <5>
H_DRDY# <4>
H_HIT#
<4>
H_HITM# <4>
H_LOCK# <4>
H_TRDY# <4>
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
H_DSTBP#0 <5>
H_DSTBP#1 <5>
H_DSTBP#2 <5>
H_DSTBP#3 <5>
H_REQ#[0..4]
H_RS#[0..2]
<4>
<4>
H_AVREF
H_DVREF
CRESTLINE_1p0
PM@
0.1U_0402_16V4Z
2K_0402_1%
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
within 100mil to Ball A9,B9
Compal Secret Data
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
2006/08/18
Issued Date
Deciphered Date
2007/8/18
4
Title
Crestline (1/7)-GTL
Size
B
Date:
Document Number

Sheet
1
of
53
Rev
0
U37B
MCH_CFG_16
MCH_CFG_19
MCH_CFG_20
<17,20,29,30,32,41> PLT_RST_BUF#
<4,21> H_THERMTRIP#
<22,51> PM_DPRSLPVR
PM_EXTTS#0
PM_EXTTS#1
R525
R527 1
100_0402_5%
2 0_0402_5%
GMCH_PWROK
MCH_RSTIN#
G41
L39
L36
J36
AW49
AV20
N20
G36
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
If THERMTRIP no used, left NC
Use VGATE for GMCH_PWROK
<22,34> ICH_POK
ICH_POK
1
R533
1
R535
GMCH_PWROK
2
@ 0_0402_5%
2
0_0402_5%
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
BE29
AY32
BD39
BG37
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
BG20
BK16
BG16
BE13
DDRA_SCS0#
DDRA_SCS1#
DDRB_SCS0#
DDRB_SCS1#
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
BH18
BJ15
BJ14
BE16
DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1
SM_RCOMP
SM_RCOMP#
BL15
BK14
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BK31
BL31
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
AR49
AW4
R514
3.01K_0402_1%
<14>
<14>
<15>
<15>
Layout Note:
SM_VREF trace
width and spacing
is 20/20.
<14>
<14>
<15>
<15>
<14>
<14>
<15>
<15>
C636
2.2U_0603_6.3V6K
0.01U_0402_16V7K
C637
+1.8V
+1.25VS
CLK_DREF_96M#
R518
CLK_DREF_SSC#
20mil
CLK_DREF_96M
CLK_DREF_96M#
CLK_DREF_SSC
CLK_DREF_SSC#
PEG_CLK
PEG_CLK#
K44
K45
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AN47
AJ38
AN42
AN46
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AM47
AJ39
AN41
AN45
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AJ46
AJ41
AM40
AM44
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AJ47
AJ42
AM39
AM43
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
CLK_DREF_96M <16>
CLK_DREF_96M# <16>
CLK_DREF_SSC <16>
CLK_DREF_SSC# <16>
CLK_DREF_96M
CLK_DREF_SSC
1K_0402_1%
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
<22>
<22>
<22>
<22>
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
<22>
<22>
<22>
<22>
0_0402_5%
0_0402_5%
0_0402_5%
011 = 667MT/s FSB

010 = 800MT/s FSB
0 = DMI x 2
1 = DMI x 4 * (Default)
0 = Lane Reversal Enable
1 = Normal Operation * (Default)
00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation * (Default)
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled * (Default)
0 = Normal Operation
*(Default)
1 = DMI Lane Reversal Enable
0 = Only PCIE or SDVO is operational.
* (Default)
1 = PCIE/SDVO are operating simu.
CFG[2:0]
CFG5
<22>
<22>
<22>
<22>
0_0402_5%
Strap Pin Table
CFG[19:18] have internal pull down
<22>
<22>
<22>
<22>
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
2
PM@
2
PM@
2
PM@
2
PM@
CFG[17:3] have internal pull up
CLK_MCH_3GPLL <16>
CLK_MCH_3GPLL# <16>
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
1
R574
1
R575
1
R576
1
R577
R520
0.1U_0402_16V4Z
2
1
B42
C42
H48
H47
1K_0402_1%
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
12/13 Modified from

+1.05VS to +1.25VS
by Intel recommend
C638
2.2U_0603_6.3V6K
0.01U_0402_16V7K
+1.8V
2 20_0402_1%
2 20_0402_1%
SM_VREF
SM_RCOMP_VOL
R515
1K_0402_1%
R516 1
R517 1
SM_RCOMP_VOH
C635
MUXING
DDR
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
<14>
<14>
<15>
<15>
CFG9
CFG[13:12]
CFG16
CFG19
CFG20
(PCIE/SDVO select)
0 = No SDVO Device Present
* (Default)
1 = SDVO Device Present

B
MCH_CFG_5
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
R521
@ 4.02K_0402_1%
R522
@ 4.02K_0402_1%
R523
@ 4.02K_0402_1%
R524
@ 4.02K_0402_1%
R526
@ 4.02K_0402_1%
R529
@ 4.02K_0402_1%
R530
@ 4.02K_0402_1%
R532
10K_0402_5%
R534
10K_0402_5%
MCH_CFG_9
E35
A39
C38
B39
E36
MCH_CFG_12
MCH_CFG_13
+1.25VS
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AM49
AK50
AT43
AN49
AM50
MCH_CFG_16
R528
1K_0402_1%
CL_CLK0 <22>
CL_DATA0 <22>
CL_PWROK <22>
CL_RST# <22>
CL_VREF
MCH_CFG_19
+3VS
MCH_CFG_20
C640 1
NC
VGATE
<22,51> VGATE
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
DDRA_CLK0#
DDRA_CLK1#
DDRB_CLK0#
DDRB_CLK1#
12/22 Change from 0805 to 0603
SDVO_CTRLDATA
PM
<22> PM_BMBUSY#
<5,21,51> H_DPRSTP#
<14> PM_EXTTS#0
<15> PM_EXTTS#1
AW30
BA23
AW25
AW23
R513
1K_0402_1%
MCH_CFG_12
MCH_CFG_13
CFG
MCH_CFG_9
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
<14>
<14>
<15>
<15>
MCH_CFG_5
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
DDRA_CLK0
DDRA_CLK1
DDRB_CLK0
DDRB_CLK1
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
AV29
BB23
BA25
AV23
R531
392_0402_1%
PM_EXTTS#0
+3VS
PM_EXTTS#1
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
H35
K36
G39
G40
TEST_1
TEST_2
A37
R32
SDVO_CTRL_CLK
SDVO_CTRL_DATA
MCH_CLKREQ#
0.1U_0402_16V4Z
2
<16> MCH_CLKSEL0
<16> MCH_CLKSEL1
<16> MCH_CLKSEL2
CLK
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
C639
DMI
9/20 Modify NB symbol for Pin BJ29/BE24/C48/D47
GRAPHICS VID
DDRA_SMA14
DDRB_SMA14
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
SA_MA_14
SB_MA_14
RSVD34
RSVD35
RSVD36
LVDSA_DATA#_3
LVDSA_DATA_3
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
ME
<14> DDRA_SMA14
<14,15> DDRB_SMA14
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
+1.8V
MISC
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
MCH_CLKREQ#
R536
MCH_CLKREQ# <16>
MCH_ICH_SYNC# <22>
SDVO_CTRL_CLK
R578
MCH_TEST_1
MCH_TEST_2
R537
R538
SDVO_CTRL_DATA
0_0402_5%
20K_0402_5%
R579
10K_0402_5%
1
1
@
@
2
2
0_0402_5%
A
0_0402_5%
CRESTLINE_1p0
PM@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Crestline (2/7)-DMI/DDR
Size Document Number
Custom
Rev
IFTXX M/B LA-3541P Schematic0
Date:
Sheet
1
of
53
DDRA_SDQ[0..63]
DDRA_SMA[0..13]
DDRB_SMA[0..13]
<15> DDRB_SMA[0..13]
MEMORY
SA_BS_0
SA_BS_1
SA_BS_2
BB19
BK19
BF29
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRA_SBS0 <14>
DDRA_SBS1 <14>
DDRA_SBS2 <14>
SA_CAS#
BL17
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
SA_RAS#
SA_RCVEN#
BE18
AY20
SA_WE#
BA19
DDRA_SCAS# <14>
SA_RCVEN#
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
DDRA_SRAS# <14>
PAD
T18
DDRA_SWE# <14>
CRESTLINE_1p0
PM@
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
U37E
SYSTEM
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
DDR
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
U37D
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
MEMORY
<14> DDRA_SMA[0..13]
DDRB_SDM[0..7]
<15> DDRB_SDM[0..7]
SB_BS_0
SB_BS_1
SB_BS_2
AY17
BG18
BG36
DDRB_SBS0 <15>
DDRB_SBS1 <15>
DDRB_SBS2 <15>
SB_CAS#
BE17
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
SB_RAS#
SB_RCVEN#
AV16
AY18
SB_WE#
BC17
SYSTEM
DDRB_SDQ[0..63]
<15> DDRB_SDQ[0..63]
DDRA_SDM[0..7]
<14> DDRA_SDM[0..7]
DDR
<14> DDRA_SDQ[0..63]
DDRB_SCAS# <15>
SB_RCVEN#
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
<15>
DDRB_SRAS# <15>
PAD
T17
DDRB_SWE# <15>
CRESTLINE_1p0
PM@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Crestline (3/7)-DDRII
Size
B
Date:
Document Number
Rev
0

Sheet
1
of
53
U37C
1
C792
2
100P_0402_50V8J
<18> GMCH_LCD_CLK
<18> GMCH_LCD_DATA
<18> GMCH_ENVDD
R493
CRB 2.37K_1% to GND
GM@
GMCH_TZCLKGMCH_TZCLK+
GMCH_TXCLKGMCH_TXCLK+
LVDS_IBG
2.4K_0402_1%
1
2
R588
GM@
0_0402_5%
GMCH_TZCLKGMCH_TZCLK+
GMCH_TXCLKGMCH_TXCLK+
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-
G51
E51
F49
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
<18> GMCH_TZOUT0+
<18> GMCH_TZOUT1+
<18> GMCH_TZOUT2+
GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+
G50
E50
F48
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
<18> GMCH_TXOUT0<18> GMCH_TXOUT1<18> GMCH_TXOUT2-
GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-
G44
B47
B45
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
<18> GMCH_TXOUT0+
<18> GMCH_TXOUT1+
<18> GMCH_TXOUT2+
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+
E44
A47
A45
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
E27
G27
K27
TVA_DAC
TVB_DAC
TVC_DAC
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
P33
TV_DCONSEL_0
TV_DCONSEL_1
2
R495
R496
TV_DCONSEL_0
TV_DCONSEL_1
GM@
GM@
150_0402_1%
150_0402_1%
GM@
150_0402_1%
TV
<18> GMCH_TZOUT0<18> GMCH_TZOUT1<18> GMCH_TZOUT2-
<19> GMCH_TV_COMPS
<19> GMCH_TV_LUMA
<19> GMCH_TV_CRMA
R494
L41
L43
N41
N40
D46
C45
D44
E42
LVDS
<18>
<18>
<18>
<18>
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
GRAPHICS
<18> GMCH_ENBKL
J40
H39
E39
E40
C37
D35
K40
PCI-EXPRESS
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_ENVDD
Change to 0Ohm when use PM chip

<19> GMCH_CRT_B
<19> GMCH_CRT_R
H32
G32
K29
J29
F29
E29
1
GM@ 150_0402_1%
1
GM@ 150_0402_1%
1
GM@ 150_0402_1%
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
2
GM@39_0402_1%
2
GM@39_0402_1%
R500
R501
0_0402_5% 0_0402_5%
PM@
PM@
C793
R502
1.3K_0402_1%
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
C604 1
C606 1
C608 1
C610 1
C612 1
C614 1
C616 1
C618 1
C620 1
C622 1
C624 1
C626 1
C628 1
C630 1
C632 1
C634 1
24.9_0402_1%
C603
2 PM@ 0.1U_0402_10V7K
C605
2 PM@ 0.1U_0402_10V7K
C607
2 PM@ 0.1U_0402_10V7K
C609
2 PM@ 0.1U_0402_10V7K
C611
2 PM@ 0.1U_0402_10V7K
C613
2 PM@ 0.1U_0402_10V7K
C615
2 PM@ 0.1U_0402_10V7K
C617
2 PM@ 0.1U_0402_10V7K
C619
2 PM@ 0.1U_0402_10V7K
C621
PM@
0.1U_0402_10V7K
2
C623
2 PM@ 0.1U_0402_10V7K
C625
PM@
0.1U_0402_10V7K
2
C627
2 PM@ 0.1U_0402_10V7K
C629
2 PM@ 0.1U_0402_10V7K
C631
2 PM@ 0.1U_0402_10V7K
C633
2 PM@ 0.1U_0402_10V7K
2 PM@ 0_0402_5%
GMCH_LCD_CLK
R589 1
2 PM@ 0_0402_5%
GMCH_CRT_B
2 PM@ 0_0402_5%
GMCH_LCD_DATA
R590 1
2 PM@ 0_0402_5%
GMCH_CRT_G
R582 1
2 PM@ 0_0402_5%
LCTLB_DATA
R591 1
2 PM@ 0_0402_5%
GMCH_CRT_R
R583 1
2 PM@ 0_0402_5%
LCTLA_CLK
R592 1
2 PM@ 0_0402_5%
GMCH_TV_COMPS
GMCH_CRT_CLK
R593 1
2 PM@ 0_0402_5%
GMCH_TV_LUMA
R504 1 GM@
2 2.2K_0402_5%
GMCH_LCD_DATA
R585 1
2 PM@ 0_0402_5%
GMCH_CRT_DATA
R594 1
2 PM@ 0_0402_5%
GMCH_TV_CRMA
R505 1 GM@
2 10K_0402_5%
LCTLB_DATA
R586 1
2 PM@ 0_0402_5%
TV_DCONSEL_0
R506 1 GM@
2 10K_0402_5%
LCTLA_CLK
R587 1
2 PM@ 0_0402_5%
TV_DCONSEL_1
TV_DCONSEL_0
2.2K_0402_5%
TV_DCONSEL_1
1
1
1
1
1
1
1
1
1
1
1
2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P13
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_P14
2
PCIE_MTX_C_GRX_P15
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
4
Issued Date
2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N3
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N4
2
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N7
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N8
2
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N11
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N12
2
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N15
PM@
2 PM@ 0_0402_5%
2.2K_0402_5%
CRESTLINE_1p0
R584 1
GM@
PCIE_GTX_C_MRX_P[0..15] <17>
GMCH_LCD_CLK
GM@
PCIE_GTX_C_MRX_N[0..15] <17>
PCIE_GTX_C_MRX_P[0..15]
2 2.2K_0402_5%
R510
PCIE_MTX_C_GRX_P[0..15] <17>
PCIE_GTX_C_MRX_N[0..15]
R503 1 GM@
R509
PCIE_MTX_C_GRX_N[0..15] <17>
PCIE_MTX_C_GRX_P[0..15]
R581 1
+3VS
+1.05VS
PCIE_MTX_C_GRX_N[0..15]
C794
R580 1
CRB 2.2K , Follow!
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
CRT_IREF
K33
G35
F33
C32
E33
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
20/25mils
1
R718
1
R719
100P_0402_50V8J
<19> GMCH_CRT_VSYNC
GMCH_CRT_CLK
GMCH_CRT_DATA
100P_0402_50V8J
<19> GMCH_CRT_CLK
<19> GMCH_CRT_DATA
<19> GMCH_CRT_HSYNC
1
R492
N43
M43
VGA
2
R497
2
R498
2
R499
<19> GMCH_CRT_G
PEG_COMP
PEG_COMPI
PEG_COMPO
Title
Crestline (4/7)-VGA/LVDS/TV
Size
B
Date:
Document Number
Rev

Sheet
1
10
of
53
U37G
R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
+VCC_AXG
B
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
9/19 change to 330u, 9/29 change to 220u

12/19 Modify C573 to correct description ( symbol change )
VCC: 1573mA
(220UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)
+1.05VS
1
C573
C574
C575
C577
Follow DG 1.1
VCC_SM: 3300mA
(330UF*1, 22UF*2, 0.1UF*1)
+1.8V
C578
9/14 add for reservation
1
1
C579
C580
C692
C581
C690
C691
330U_D2E_2.5VM
22U_0805_6.3V6M
1U_0603_10V4Z
2
2
2
2
@ 22U_0805_6.3V6M
4.7U_0805_10V4Z
@ 0.1U_0402_16V4Z
1U_0603_10V4Z
@
9/18 modify from +1.05VS to +VCC_AXG

VCC_AXG: 7700mA
(330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
+VCC_AXG
C582
9/18 Add for 965PM use
C583
1
+
C584 1
C585 1
C586
C587
C588 1
C589 1
R609
0_0805_5%
PM@
330U_D2E_2.5VM
22U_0805_6.3V6M
1U_0603_10V4Z
0.1U_0402_16V4Z
GM@ 2
GM@ 2
GM@
GM@ 2
GM@ 2
GM@ 2
GM@
GM@ 2
330U_D2E_2.5VM
10U_0805_10V4Z
0.47U_0603_16V4Z
0.1U_0402_16V4Z
VCC_AXM: 540mA
(22UF*2, 0.22UF*2, 0.1UF*2)
C590
C591
C592
C593
C594
AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
+1.05VS
+1.05VS
C595
22U_0805_6.3V6M
0.22U_0603_16V7K
0.1U_0402_16V4Z
2
2
2
2
0.22U_0603_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
9/29 +1.05VS_AXM change to +1.05VS
+1.05VS
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
POWER
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
A3
B2
C1
BL1
BL51
A51
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
+1.05VS
9/29
+1.05VS_AXM
change to
+1.05VS
B
+VCC_AXG
J6
CRESTLINE_1p0
PM@
2
PAD-OPEN 3x3m
@
1005 This is for GM@

Remember open stencil at GM@
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
1
C596
C597
C598
C599
C600
C601
C602
0.1U_0402_16V4Z
0.22U_0603_16V7K
0.47U_0603_16V4Z
1U_0603_10V4Z
2
2
0.1U_0402_16V4Z
0.22U_0603_16V7K
1U_0603_10V4Z
Issued Date
Compal Secret Data
CRESTLINE_1p0
PM@
2006/08/18
Deciphered Date
2007/8/18
Title

5
C576
220U_D2_2VMR15
0.22U_0603_16V7K
0.1U_0402_16V4Z
2
2
2
22U_0805_6.3V6M
0.22U_0603_16V7K
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
VSS NCTF
AW45
BC39
BE39
BD17
BD4
AW8
AT6
+1.05VS
VSS SCB
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
CRB 270uF , there is no 270u part.
VCC AXM
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC GFX NCTF
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
+1.8V
VCC SM
POWER
+VCC_AXG
VCC NCTF
VCC_13
U37F
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
VCC AXM NCTF
R30
VCC GFX
Replace 0 Ohm
by directly
connection
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC SM LF
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
VCC CORE
+1.05VS
Crestline (5/7)-VCC
Size
B
Date:
Document Number
Rev

Sheet
11
1
of
53
0.1U_0402_16V4Z
0.5_0603_1%
H49
VCCA_DPLLB
C520
0.1U_0402_16V4Z
+1.25VS_HPLL
AL2
VCCA_HPLL
+1.25VS_MPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
VCCA_PEG_BG: 5mA
(0.1UF*1)
0.1U_0402_16V4Z
L43 1
2 +1.25VS_A_PEGPLL
MBK1608121YZF_0603
1
C530
2
1
C529
R474
1_0603_5%
VCCA_PEG_PLL:
10U_0805_10V4Z
0.1U_0402_16V4Z
(0.1UF*1)
2
+1.25VS_A_SM
VCCA_SM: 640mA
+1.25VS
C522
22U_0805_6.3V6M
+1.25VS
+3VS_SYNC
1
R475
R476
0_0402_5%
GM@
C536
0.1U_0402_16V4Z
GM@
+1.25VS_A_SM_CK
0_0402_5%
PM@
+1.25VS
R479
0_0603_5% 1
C540
C546
C547
0.1U_0402_16V4Z
GM@ 2
B
GM@
0.022U_0402_16V7K
L46 1
2
MBK1608121YZF_0603
GM@
C552
0.1U_0402_16V4Z
GM@ 2
C553
GM@
0_0402_5%
PM@
C535
C541
C542
R572
VCCD_CRT
C549
C795
C554
10U_0805_10V4Z
2 GM@
0.1U_0402_16V4Z
2
+3VS_A_TVDAC
+1.8V
R483
1/05 Modified L54 to 100 Ohm _0603

+1.5VS_TVDAC
L53 1
2
MBK1608121YZF_0603
+1.5VS
C689
10U_0805_10V4Z
2
@
1/18 Change from PM@ to @

5
L54 1
100_0603_5%
GM@
BC29
BB29
VCCA_SM_CK_1
VCCA_SM_CK_2
C25
B25
C27
B27
B28
A28
VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2
M32
L29
VCCD_CRT
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
H42
VCCD_LVDS_1
VCCD_LVDS_2
0.1U_0402_16V4Z
2
1
1
1
C564
C565
C566
C567
C568
C569
R485
GM@
GM@
GM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0_0402_5%
2
2
2
2
10U_0805_10V4Z
PM@
GM@
0.022U_0402_16V7K
0.022U_0402_16V7K
0.022U_0402_16V7K
GM@
GM@
GM@
+1.5VS
+1.5VS_QDAC
VCCA_PEG_PLL: 100mA
(0.1UF*1)
+1.5VS_TVDAC
+1.25VS_A_PEGPLL
1
C555
VCCA_TV_DAC: 40mA each DAC (0.1UF*1, 0.022UF*1 for each DAC)
+3VS
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
VCCD_QDAC: 5mA
(0.1UF*1, 0.022UF*1)
C571
0.022U_0402_16V7K
1U_0402_6.3V4Z
GM@
1/05 Modified R488 to 1U_0402

4
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
AT23
AU28
AU24
AT29
AT25
AT30
VCC_AXD_NCTF
AR29
VTT: 850mA
(220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)
1
+
C514
C515
C516
VCC_AXD: 515mA
(22UF*1, 1UF*1)
R472
C524
1U_0603_10V4Z
+1.25VS_AXF
0_0603_5%
10U_0805_10V4Z
2
@
22U_0805_6.3V6M
VCC_AXF: 495mA
(10UF*1, 1UF*1)
C527
+1.25VS
C523
R473
+1.25VS
0_0603_5%
C528
10U_0805_10V4Z
2
1U_0603_10V4Z
+1.25VS
B23
B21
A21
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI
AJ50
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
BK24
BK23
BJ24
BJ23
C531
C537
22U_0805_6.3V6M
VCC_HV: 100mA
C40
B40
VCC_HV_1
VCC_HV_2
C545
220U_D2_2VMR15
2 GM@
2
GM@
1000P_0402_50V7K
AD51
W50
W51
V49
V50
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
C544
1
2
+1.8V
L44
MBK1608121YZF_0603
L45 1
2
MBK1608121YZF_0603
GM@
R480
0_0402_5%
PM@
+1.05VS_PEG: 1260mA (220UF*1, 10UF*1)
AH50
AH51
C550
1
R720
C551
2
+1.05VS
0_0805_5%
12/19 Modify C550 to correct

description ( symbol change
)
220U_D2_2VMR15
2
2
10U_0805_10V4Z
VTTLF_CAP1
A7
VTTLF_CAP2
F2
AH1 VTTLF_CAP3
VTTLF1
VTTLF2
VTTLF3
+1.8V
+1.05VS_PEG
1
VCC_RXR_DMI_1
VCC_RXR_DMI_2
1
2
C539
10U_0805_10V4Z
R478
2
1_0603_5%
0.1U_0402_16V4Z
+3VS
VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)
C538
+1.8V_TX_LVDS: 100mA
+1.8V_TX_LVDS
(220UF*1, 1000PF*1)
A43
VCC_TX_LVDS
VCC_DMI: 100mA (0.1UF*1)
0.1U_0402_16V4Z
2
+1.8V_SM_CK
+1.05VS_DMI: 100mA (220UF*1, 10UF*1)

+1.05VS_PEG
C556
C557
0.47U_0603_16V4Z
C558
C560
0.47U_0603_16V4Z
0.47U_0603_16V4Z
C562
C518
+1.25VS_AXD
+1.8V_LVDS
0_0402_5%
GM@
1
C561
C517
330U_D2E_2.5VM
4.7U_0805_10V4Z
0.47U_0603_16V4Z
2
4.7U_0805_10V4Z
2.2U_0603_6.3V6K
10U_0805_10V4Z
R484
+3VS
0_0402_5%
PM@
GM@
1U_0603_10V4Z
R488
D41
VCCD_LVDS: 150mA
(10UF*1, 0.1UF*1)
+1.05VS
C570
R486
RB751V_SOD323
0.1U_0402_16V4Z
2
+3VS
10_0603_5%
0_0402_5%
PM@
1/18 Add 0_0402 for PM use
C572
GM@
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
CRESTLINE_1p0
PM@
+1.5VS_QDAC
R488
0.1U_0402_16V4Z
GM@ 2
POWER
0_0402_5%
GM@
R573
0.1U_0402_16V4Z
0_0402_5%
2 0.022U_0402_16V7K
PM@
0206 Add
L52 1
2
MBK1608121YZF_0603
GM@
C563
AT22
AT21
AT19
AT18
AT17
AR17
AR16
VCCD_TVDAC / CRT: each 60mA (0.1UF*1, 0.022UF*1)

+1.5VS_TVDAC
+1.25VS
0_0402_5%
PM@
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
C543
VCCD_HPLL: 250mA (0.1UF*1)

R482
AW18
AV19
AU19
AU18
AU17
+3VS_A_TVDAC
C548
0.022U_0402_16V7K
+3VS
C534
VCCA_SM_CK: 35mA
(22UF*1, 1UF*2, 0.1UF*1)
R481
+3VS_DACBG
VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1)

L49 1
2
MBK1608121YZF_0603
GM@
22U_0805_6.3V6M
1U_0603_10V4Z
2
2
@
@
1U_0603_10V4Z
0.1U_0402_16V4Z
VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1) +3VS_CRTDAC

+3VS
C533
22U_0805_6.3V6M
4.7U_0805_10V4Z
2
2
@
22U_0805_6.3V6M
1U_0603_10V4Z
R477
(22UF*21, 4.7UF*1, 1UF*1)
2
0_0805_5% 1
C532
VCC_SYNC: 10mA (0.1UF*1)

+3VS
100mA
CRT
+1.25VS_DPLLB
VCCA_LVDS: 10mA
(0.1UF*1)
1000P_0402_50V7K
2
GM@
1
C526
+3VS
VCCA_DPLLA
VTTLF
+1.25VS_MPLL
L41 1
2
MBK1608121YZF_0603
R471
B49
+1.8V_TX_LVDS
C525
VCCA_MPLL:150mA
(10UF*1, 0.1UF*1)
+1.25VS_DPLLA
VTT
(470UF*1, 0.1UF*1)
VSSA_DAC_BG
HV
GM@ 2
VCCA_DAC_BG
B32
+3VS_DACBG
AXD
AXF
220U_D2_2VMR15
VCCA_DPLLA/B: 100mA GM@
C521
A30
SM CK
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
PEG
C512
VCCSYNC
DMI
22U_0805_6.3V6M
J32
A33
B33
PLL
+1.25VS
L39 1
2
MBK1608121YZF_0603
1
C511
+3VS_SYNC
+3VS_CRTDAC
+1.25VS_DPLLB
1
2
10U_FLC-453232-100K_0.25A_10%
1
@
C519 +
+1.05VS
U37H
A LVDS
12/13 Modified this block for Intel recommend

12/19 Add C773 and C774 for reservation
L42
+1.25VS_HPLL
C513
0.1U_0402_16V4Z
2 GM@
GM@
L62 1
2
MBK1608121YZF_0603
GM@
VCCA_HPLL: 50mA
(22UF*1, 0.1UF*1)
A PEG
L61 1
2
MBK1608121YZF_0603
GM@
A SM
A CK
PM@
C510
TV
0_0402_5%
+1.25VS
D TV/CRT
PM@
+1.25VS_DPLLA
L40 1
2
10U_FLC-453232-100K_0.25A_10%
@
0.1U_0402_16V4Z
0_0402_5%
VCCA_DPLLA/B: 100mA
(470UF*1, 0.1UF*1)
+1.25VS_DPLLA
C773
220U_D2_2VMR15
C521
10U_0805_6.3V6M
C513
LVDS
Close to VCC_HV (pin C40/B40)
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
3
Title
Crestline (6/7)-VCC
Size
B
Date:
Document Number
Rev

Sheet
1
12
of
53
U37I
U37J
A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
VSS
CRESTLINE_1p0
PM@
CRESTLINE_1p0
PM@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Crestline (7/7)-GND
Size
B
Date:
Document Number
Rev

Sheet
1
13
of
53
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0#
DDRA_SDQS0
<9> DDRA_SDQS0#
<9> DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
D
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
<9> DDRA_SDQS1#
<9> DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
<9> DDRA_SDQS2#
<9> DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
EC_TX_P80_DATA
<15,34> EC_TX_P80_DATA
DDRA_SDQ26
DDRA_SDQ27
DDRA_CKE0
<8> DDRA_CKE0
EC_RX_P80_CLK
DDRA_SBS2
<15,34> EC_RX_P80_CLK
<9> DDRA_SBS2
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
<9> DDRA_SBS0
<9> DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
<9> DDRA_SCAS#
<8> DDRA_SCS1#
DDRA_ODT1
<8> DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
<9> DDRA_SDQS4#
<9> DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
B
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
EC_RX_P80_CLK
R622 1
2 0_0402_5%
EC_RX_P80_CLK_R
<15> EC_RX_P80_CLK_R
DDRA_SDQS6#
DDRA_SDQS6
<9> DDRA_SDQS6#
<9> DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
D_CK_SDATA
D_CK_SCLK
<15,16> D_CK_SDATA
<15,16> D_CK_SCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
9/25 Change DIMM0 to SP070004Z00 (HBL50)
+3VS
C508
+DIMM_VREF
1
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM1
C484
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
1K_0402_1%
220P_0402_50V7K
2 @
DDRA_CLK0 <8>
DDRA_CLK0# <8>
DDRA_SDQ20
DDRA_SDQ21
R468 1
DDRA_SDM2
2 0_0402_5%
PM_EXTTS#0 <8>
+1.8V
DDRA_SDM[0..7]
<9> DDRA_SDM[0..7]
DDRA_SDQS3# <9>
DDRA_SDQS3 <9>
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
Layout Note:
Place near JP35
DDRA_SDQ[0..63]
<9> DDRA_SDQ[0..63]
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SMA[0..13]
<9> DDRA_SMA[0..13]
DDRA_SDQ22
DDRA_SDQ23
C486
C487
C488
C489
C490
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+0.9VS
DDRA_CKE1 <8>
DDRA_CKE0
DDRA_SBS2
DDRA_SMA14
1
2
RP39
4
3
56_0404_4P2R_5%
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA12
1
DDRA_SMA9
2
RP40
4
3
56_0404_4P2R_5%
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SMA8
DDRA_SMA5
1
2
RP41
4
3
56_0404_4P2R_5%
1
2
RP42
4
3
56_0404_4P2R_5%
DDRA_SMA10
1
DDRA_SBS0
2
RP43
4
3
56_0404_4P2R_5%
DDRA_SWE#
1
DDRA_SCAS#
2
RP44
4
3
56_0404_4P2R_5%
DDRA_SCS1#
1
DDRA_ODT1
2
RP45
4
3
56_0404_4P2R_5%
DDRA_SMA11
1
DDRA_SMA14
2
RP46
4
3
56_0404_4P2R_5%
+0.9VS
DDRA_SMA6
DDRA_SMA7
1
2
RP47
4
3
56_0404_4P2R_5%
DDRA_SMA2
DDRA_SMA4
1
2
RP48
4
3
56_0404_4P2R_5%
DDRA_SBS1
DDRA_SMA0
1
2
RP49
4
3
56_0404_4P2R_5%
DDRA_SCS0#
1
DDRA_SRAS#
2
RP50
4
3
56_0404_4P2R_5%
DDRA_SMA13
1
DDRA_ODT0
2
RP51
4
3
56_0404_4P2R_5%
DDRA_SBS1
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
DDRA_SMA3
DDRA_SMA1
DDRA_SBS1 <9>
DDRA_SRAS# <9>
DDRA_SCS0# <8>
DDRA_ODT0 <8>
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
<8> DDRA_SMA14
DDRA_SDQS5# <9>
DDRA_SDQS5 <9>
95.10.5 modify
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_CLK1 <8>
DDRA_CLK1# <8>
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# <9>
DDRA_SDQS7 <9>
DDRA_SDQ62
DDRA_SDQ63
<8,15> DDRB_SMA14
DDRA_CKE1
R469 1
R470 1
2 10K_0402_5%
2 10K_0402_5%
+1.8V
DDRB_SMA14
1
R748
1
R749
C491
0.1U_0402_16V4Z
C495
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C496
0.1U_0402_16V4Z
C500
0.1U_0402_16V4Z
C501
0.1U_0402_16V4Z
C493
0.1U_0402_16V4Z
C494
0.1U_0402_16V4Z
C497
0.1U_0402_16V4Z
C498
0.1U_0402_16V4Z
C499
0.1U_0402_16V4Z
C502
0.1U_0402_16V4Z
C503
0.1U_0402_16V4Z
C504
0.1U_0402_16V4Z
+0.9VS
C505
0.1U_0402_16V4Z
C506
0.1U_0402_16V4Z
C507
0.1U_0402_16V4Z
2
56_0402_5%
2
56_0402_5%
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Compal Secret Data

2006/08/18
C492
2007/8/18
Deciphered Date
4
+0.9VS
Layout Note:
Place these resistor
closely JP35,all
trace length Max=1.5"
C485
DDRA_SDQ14
DDRA_SDQ15
Issued Date
C483
R466
DIMM0 STD H:5.2mm (BOT)
0.1U_0402_16V4Z
2.2U_0603_6.3V6K 2
1K_0402_1%
20mils
DDRA_SDQ6
DDRA_SDQ7
Change PCB Footprint
C509
R465
+DIMM_VREF
DDRA_SDM0
P-TWO_A5652C-A0G16
A
+1.8V
DDRA_SDQ4
DDRA_SDQ5
+DIMM_VREF
+1.8V
JP35
+1.8V
Title
DDRII-SODIMM0
Size
B
Date:
Document Number
Rev

Sheet
1
14
of
53
9/25 Change DIMM1 to SP070006F00

+1.8V
+1.8V
+DIMM_VREF
JP34
+DIMM_VREF
DDRB_SDQ0
DDRB_SDQ1
1
<9> DDRB_SDQS0#
<9> DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
<9> DDRB_SDQS1#
<9> DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
<9> DDRB_SDQS2#
<9> DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
EC_TX_P80_DATA
2
DDRB_SDQ26
DDRB_SDQ27
<8> DDRB_CKE0
<14,34> EC_RX_P80_CLK
<9> DDRB_SBS2
DDRB_CKE0
EC_RX_P80_CLK
DDRB_SBS2
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
<9> DDRB_SBS0
<9> DDRB_SWE#
<9> DDRB_SCAS#
<8> DDRB_SCS1#
<8> DDRB_ODT1
DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
<9> DDRB_SDQS4#
<9> DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
EC_RX_P80_CLK_R
<14> EC_RX_P80_CLK_R
<9> DDRB_SDQS6#
<9> DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
<14,16> D_CK_SDATA
<14,16> D_CK_SCLK
D_CK_SDATA
D_CK_SCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDRB_SDQ4
DDRB_SDQ5
DDRB_SMA[0..13]
<9> DDRB_SMA[0..13]
DDRB_SDM0
C455
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
DDRB_CLK0 <8>
DDRB_CLK0# <8>
DDRB_CLK0?
DDRB_SDQ14
DDRB_SDQ15

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRB_SDQ20
DDRB_SDQ21
R462 1
DDRB_SDM2
0_0402_5%
2
Layout Note:
Place near JP34
PM_EXTTS#1 <8>
DDRB_SDQ22
DDRB_SDQ23
+1.8V
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
C461
DDRB_SDQS3# <9>
DDRB_SDQS3 <9>
+0.9VS
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
DDRB_CKE1 <8>
DDRB_SMA14
DDRB_SMA14 <8,14>
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SBS1
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_CKE0
DDRB_SBS2
1
2
RP25
4
3
56_0404_4P2R_5%
DDRB_SMA12
DDRB_SMA9
1
2
RP26
4
3
56_0404_4P2R_5%
DDRB_SMA8
DDRB_SMA5
1
2
RP27
4
3
56_0404_4P2R_5%
DDRB_SBS1 <9>
DDRB_SRAS# <9>
DDRB_SCS0# <8>
DDRB_SMA3
DDRB_SMA1
1
2
RP28
4
3
56_0404_4P2R_5%
DDRB_ODT0 <8>
DDRB_SMA10
DDRB_SBS0
1
2
RP29
4
3
56_0404_4P2R_5%
DDRB_SWE#
DDRB_SCAS#
1
2
RP30
4
3
56_0404_4P2R_5%
DDRB_SCS1#
DDRB_ODT1
1
2
RP31
4
3
56_0404_4P2R_5%
DDRB_SMA11
DDRB_CKE1
1
2
RP32
4
3
56_0404_4P2R_5%
DDRB_SMA6
DDRB_SMA7
1
2
RP33
4
3
56_0404_4P2R_5%
DDRB_SMA2
DDRB_SMA4
1
2
RP34
4
3
56_0404_4P2R_5%
DDRB_SBS1
DDRB_SMA0
1
2
RP35
4
3
56_0404_4P2R_5%
DDRB_SCS0#
DDRB_SRAS#
1
2
RP36
4
3
56_0404_4P2R_5%
DDRB_SMA13
DDRB_ODT0
1
2
RP37
4
3
56_0404_4P2R_5%
DDRB_SDQ36
DDRB_SDQ37
C463
C464
C465
2
+1.8V
C467
C468
C469
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C470
DDRB_SDM4
C462
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C466
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
C471
C472
C473
C474
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# <9>
DDRB_SDQS5 <9>
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK1 <8>
DDRB_CLK1# <8>
DDRB_SDM6
DDRB_CLK1?
DDRB_SDQ54
DDRB_SDQ55
C476
C477
C478
C479
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C480
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
+0.9VS
C475
C481
C482
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
DDRB_SDQS7# <9>
DDRB_SDQS7 <9>
DDRB_SDQ62
DDRB_SDQ63
R463
R464
1
1
2 10K_0402_5%
2 10K_0402_5%
Layout Note:
Place these resistor
closely JP35,all
trace length Max=1.5"
+3VS
DIMM1 STD H:9.2mm (BOT)

2006/08/18
Issued Date
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
2007/8/18
Deciphered Date
C
Compal Secret Data
2.2U_0603_6.3V6K
2
0.1U_0402_16V4Z
DDRB_SDM[0..7]
<9> DDRB_SDM[0..7]
P-TWO_A5692A-A0G16-N
C456
DDRB_SDQ[0..63]
<9> DDRB_SDQ[0..63]
Title
DDRII-SODIMM1
Size
B
Date:
Document Number
Rev

Sheet

E
15
of
53
PCI
MHz
L56
1
+3VS
+3VS
2
1
KC FBM-L11-201209-221LMAT_0805
200
100
166
100
33.3
CPU Driven
*(Default)
667MHz
10U_0805_10V4Z
0.1U_0402_16V4Z
KC FBM-L11-201209-221LMAT_0805
No Stuff
R401
R408
R417
Stuff
R401
R417
R447
No Stuff
R408
R430
R438
R408
R417
R447
0.1U_0402_16V4Z
R401
R430
R438
R430
R438
R447
C437
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R399
0.1U_0402_16V4Z
2.2K_0402_5%
C438
0.1U_0402_16V4Z
C439
0.1U_0402_16V4Z
C440
0.1U_0402_16V4Z
C441
0.1U_0402_16V4Z
C442
2.2K_0402_5%
0.1U_0402_16V4Z
D_CK_SDATA
3
Q39
2N7002_SOT23
+3VS
<22,32,33> ICH_SMBCLK
D_CK_SCLK
Q40
2N7002_SOT23
10/17 : Change P/N from SA0001GT00 to SA00001GT10
+3VM_CK505
2
1
56_0402_5%
@
1
2
+1.25VM_CK505
MCH_CLKSEL0 <8>
R403
1K_0402_5%
U35
2
9
16
61
VDD_PCI
VDD48
VDDPLL3
VDDREF
39
55
VDDSRC
VDDCPU
12
20
26
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
36
49
VDDSRC_IO
VDDCPU_IO
NC
48
SCLK
SDATA
64
63
D_CK_SCLK
D_CK_SDATA
PCI_STOP#
CPU_STOP#
38
37
PM_STP_PCI#
PM_STP_CPU#
CPU0
CPU0#
54
53
CLK_CPU_BCLK
CLK_CPU_BCLK#
CPU1_F
CPU1#_F
51
50
CLK_MCH_BCLK
CLK_MCH_BCLK#
R408
1K_0402_5%
@
<22> SATA_CLKREQ#
2 R412
PCI_CLK0 1
PCI0/CR#_A
<8> MCH_CLKREQ#
475_0402_1%1
2 R413
PCI_CLK1 3
PCI1/CR#_B
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
33_0402_5%
2
2
2
2
2
2
2
R416
R418
R419
R420
R422
R425
R426
PCI2_TME 4
PCI2/TME
PCI_CLK3 5
PCI3
+1.05VS
475_0402_1%1
SRC8/ITP
SRC8#/ITP#
47
46
CLK_PCIE_EXP
CLK_PCIE_EXP#
<26> CLK_PCI_PCM
<28> CLK_PCI_1394
<29> CLK_PCI_TPM
<34> CLK_PCI_EC
<41> CLK_PCI_SIO
<36> CLK_PCI_DB
<20> CLK_PCI_ICH
R417
FSB
1K_0402_5%
@
1
2
MCH_CLKSEL1 <8>
R424
1K_0402_5%
1
1
2
R427
0_0402_5%
1
1
1
1
1
1
1
SRC10#
SRC10
35
34
CLK_PCIE_LAN#
CLK_PCIE_LAN
27_SEL
PCI4/27_Select
SRC11/CR#_H
SRC11#/CR#_G
33
32
CLK_PCIE_NAND
CLK_PCIE_NAND#
ITP_EN
PCIF5/ITP_EN
CLK_XTAL_IN
R430
CLK_XTAL_OUT
0_0402_5%
@
60
X1
SRC9
SRC9#
30
31
CLK_PCIE_3G
CLK_PCIE_3G#
59
X2
D_CK_SCLK <14,15>
D_CK_SDATA <14,15>
PM_STP_PCI# <22>
PM_STP_CPU# <22>
CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>
C
1
2
R406
0_0402_5%
CPU_BSEL1
<22,32,33> ICH_SMBDATA
R401
<5>
C436
Need to update Symbol
No Stuff
CPU_BSEL0
C435
+1.25VM_CK505
Stuff
R402
2.2K_0402_5%
FSA 2
1
<5>
C434
+1.05VS
C433
L57
1
+1.25VS
Stuff
800MHz
C432
12/4 Modified from 0 Ohm to bead ( 3A rated )
FSB Frequency Selet:

D
C431
R398
33.3
2
C430
SRC
MHz
CPU
MHz
CLKSEL0
2
G
FSLA
CLKSEL1
2
G
FSLB
CLKSEL2
FSLC
+3VM_CK505
CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>
CLK_PCIE_EXP <33>
CLK_PCIE_EXP# <33>
CLK_PCIE_LAN# <30>
CLK_PCIE_LAN <30>
CLK_PCIE_NAND <32>
CLK_PCIE_NAND# <32>
CLK_PCIE_3G <32>
CLK_PCIE_3G# <32>
R431 1
SRC7/CR#_F
SRC7#/CR#_E
44
43
R_CLKREQ#_F R432 1
R_CLKREQ#_E R433 1
SRC6
SRC6#
41
40
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
SRC4
SRC4#
27
28
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
475_0402_1%
475_0402_1%
2
2
R434 1
+1.05VS
33_0402_5% 1
2 R436
FSA
10
USB_48MHZ/FSLA
FSB
57
FSLB/TEST MODE
22_0402_5% 1
22_0402_5% 1
2 R597
2 R441
FSC
62
REF0/FSLC/TEST_SEL
45
VDDSRC_IO
SRC3/CR#_C
SRC3#/CR#_D
24
25
CLK_PCIE_ICH
CLK_PCIE_ICH#
GNDSRC
SRC2/SATA
SRC2#/SATA#
21
22
CLK_PCIE_SATA
CLK_PCIE_SATA#
SRC1/SE1/27MHz_NonSS
SRC1#/SE2/27MHz_SS
17
18
CLK_PCIE0
CLK_PCIE0#
+3VS
EXP_CLKREQ# <33>
WLAN_CLKREQ# <32>
2 10K_0402_5%
+3VS
B
CLK_PCIE_WLAN <32>
CLK_PCIE_WLAN# <32>
<22> CLK_ICH_48M
2 10K_0402_5%
CPU_BSEL2
1
2
R444
0_0402_5%
MCH_CLKSEL2 <8>
<36,41> CLK_14M_SIO
<22> CLK_ICH_14M
R443
1K_0402_5%
<5>
1K_0402_5%
@
1
2
+1.25VM_CK505
1
FSC
R438
R442
2.2K_0402_5%
2
1
R447
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
0_0402_5%
@
For 27_SEL, 0 = Enable DOT96 & SRC1,
0.1U_0402_16V4Z
42
8
For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed
2
10K_0402_5%
PM@
11
GND48
15
GND
19
GND
52
GNDCPU
23
GNDSRC
29
GNDSRC
58
SRC0/DOT96
SRC0/DOT96#
CK_PWRGD/PD#
27_SEL
56
R_CLK_DOT
R_CLK_DOT#
1
1
1
1
2
2
2
2
GM@
GM@
@
@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R452
R453
R454
R455
1
1
1
1
2
2
2
2
GM@
GM@
PM@
PM@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CK_PWRGD
* Internal Pull-Up Resistor

** Internal Pull-Down Resistor
R459
R460
R461
10K_0402_5%
10K_0402_5%
GM@
10K_0402_5%
@
CLK_DREF_96M <8>
CLK_DREF_96M# <8>
CLK_PCIE_VGA <17>
CLK_PCIE_VGA# <17>
2006/08/04
Issued Date
C446
C447
C448
C449
C450
1 CLK_ICH_48M
@ 5P_0402_50V8C
1 CLK_ICH_14M
@ 4.7P_0402_50V8C
1 CLK_PCI_ICH
@ 4.7P_0402_50V8C
1 CLK_14M_SIO
@ 4.7P_0402_50V8C
1 CLK_PCI_PCM
@ 4.7P_0402_50V8C
1 CLK_PCI_EC
@ 4.7P_0402_50V8C
1 CLK_PCI_SIO
@ 4.7P_0402_50V8C
A
ICS9LPRS365/SA00001GT00
Compal Secret Data
C445
Place close to U35
2006/10/06
Deciphered Date
Routing the trace at least 10mil
CLK_DREF_SSC <8>
CLK_DREF_SSC# <8>
CLK_27M_VGA <17>
CLK_27M_VGA# <17>
C444
CK_PWRGD <22>
GNDREF
PCI2_TME
13
14
R450
R451
R713
R714
ICS9LPRS365
CLK_XTAL_OUT
12/1 Modified from 27P to 18P
10K_0402_5%
CLK_PCIE_SATA <21>
CLK_PCIE_SATA# <21>
GNDPCI
ITP_EN
R458
2
18P_0402_50V8J
1
C452
10K_0402_5%
@
R457
Y2
14.31818MHZ_16PF_DSX840GA
2
18P_0402_50V8J
R456
1
C451
A
CLK_XTAL_IN
+3VS
+3VS
CLK_PCIE_ICH <22>
CLK_PCIE_ICH# <22>
C443
1= Enable SRC0 & 27MHz
+3VS
CLK_MCH_3GPLL <8>
CLK_MCH_3GPLL# <8>
Title

Clock generator
Size
Document Number
Rev
0.1
IXXXX LA-3XXXP
Date:
Sheet

1
16
of
53
<10> PCIE_MTX_C_GRX_N[0..15]
<10> PCIE_MTX_C_GRX_P[0..15]
<10> PCIE_GTX_C_MRX_N[0..15]
<10> PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
9/13 modify this footprint from ACES_88990-2D08_230P to ACES_88990-2D28_230P
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
12/19 modify this footprint from ACES_88990-2D28_230P to QUASA_CA0330-230N20_230P

0208 : Modify this footprint from QUASA_CA0330-230N20_230P to QUASA_CA0330-230N20_230P-S
PCIE_GTX_C_MRX_P[0..15]
JP33B
D
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
JP33A
1
3
5
7
9
11
13
15
17
19
21
23
B+
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
GND
GND
GND
GND
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
RUNPWROK
5VRUN
GND
GND
GND
PEX_RX15#
PEX_RX15
GND
PEX_RX14#
PEX_RX14
GND
PEX_RX13#
PEX_RX13
GND
PEX_RX12#
PEX_RX12
GND
PEX_RX11#
PEX_RX11
GND
PEX_RX10#
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND
PEX_RX2#
PEX_RX2
GND
PRSNT2#
PEX_TX15#
PEX_TX15
GND
PEX_TX14#
PEX_TX14
GND
PEX_TX13#
PEX_TX13
GND
PEX_TX12#
PEX_TX12
GND
PEX_TX11#
PEX_TX11
GND
PEX_TX10#
PEX_TX10
GND
PEX_TX9#
PEX_TX9
GND
PEX_TX8#
PEX_TX8
GND
PEX_TX7#
PEX_TX7
GND
PEX_TX6#
PEX_TX6
GND
PEX_TX5#
PEX_TX5
GND
PEX_TX4#
PEX_TX4
GND
PEX_TX3#
PEX_TX3
GND
PEX_TX2#
PEX_TX2
2
4
6
8
10
12
14
16
18
20
22
24
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
+1.8VS
<16> CLK_PCIE_VGA#
<16> CLK_PCIE_VGA
SUSP#
+5VS
CLK_PCIE_VGA#
CLK_PCIE_VGA
<8,20,29,30,32,41> PLT_RST_BUF#
<28,33,34,41,43,48,49,50>
<4,34> EC_SMB_DA2
<4,34> EC_SMB_CK2
<19> VGA_CRT_HSYNC
<19> VGA_CRT_VSYNC
<19> VGA_DDC_CLK
<19> VGA_DDC_DATA
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
<16> CLK_27M_VGA#
<16> CLK_27M_VGA
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_DDC_CLK
VGA_DDC_DATA
CLK_27M_VGA#
CLK_27M_VGA
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
PEX_RX1#
GND
PEX_RX1
PEX_TX1#
GND
PEX_TX1
PEX_RX0#
GND
PEX_RX0
PEX_TX0#
GND
PEX_TX0
PEX_REFCLK#
PRSNT1#
PEX_REFCLK
TV_C/HDTV_Pr
CLK_REQ#
GND
PEX_RST#
TV_Y/HDTV_Y
RSVD
GND
RSVD
TV_CVBS/HDTV_Pb
SMB_DAT
GND
SMB_CLK
VGA_RED
THERM#
GND
VGA_HSYNC
VGA_GRN
VGA_VSYNC
GND
DDCA_CLK
VGA_BLU
DDCA_DAT
GND
IGP_UCLK#
LVDS_UCLK#
IGP_UCLK
LVDS_UCLK
GND
GND
RSVD
LVDS_UTX3#
RSVD
LVDS_UTX3
RSVD
GND
IGP_UTX2#
LVDS_UTX2#
IGP_UTX2
LVDS_UTX2
GND
GND
IGP_UTX1#
LVDS_UTX1#
IGP_UTX1
LVDS_UTX1
GND
GND
IGP_UTX0#
LVDS_UTX0#
IGP_UTX0
LVDS_UTX0
GND
GND
IGP_LCLK#/DVI_B_CLK#
LVDS_LCLK#
IGP_LCLK/DVI_B_CLK
LVDS_LCLK
DVI_B_HPD/GND
GND
RSVD
LVDS_LTX3#
RSVD
LVDS_LTX3
GND
GND
IGP_LTX2#/DVI_B_TX2#
LVDS_LTX2#
IGP_LTX2/DVI_B_TX2
LVDS_LTX2
GND
GND
LVDS_LTX1#
IGP_LTX1/DVI_B_TX1
LVDS_LTX1
GND
GND
LVDS_LTX0#
IGP_LTX0/DVI_B_TX0
LVDS_LTX0
DVI_A_HPD
GND
DVI_A_CLK#
DDCC_DAT
DVI_A_CLK
DDCC_CLK
GND
LVDS_PPEN
DVI_A_TX2#
LVDS_BL_BRGHT
DVI_A_TX2
LVDS_BLEN
GND
DDCB_DAT
DVI_A_TX1#
DDCB_CLK
DVI_A_TX1
2V5RUN
GND
GND
DVI_A_TX0#
3V3RUN
DVI_A_TX0
3V3RUN
GND
3V3RUN
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
VGA_TV_CRMA
VGA_TV_CRMA <19>
VGA_TV_LUMA
VGA_TV_LUMA <19>
VGA_TV_COMPS
VGA_TV_COMPS <19>
VGA_CRT_R
VGA_CRT_R <19>
VGA_CRT_G
VGA_CRT_G <19>
VGA_CRT_B
VGA_CRT_B <19>
TXCLKTXCLK+
TXCLKTXCLK+
<18>
<18>
TXOUT2TXOUT2+
TXOUT2TXOUT2+
<18>
<18>
TXOUT1TXOUT1+
TXOUT1TXOUT1+
<18>
<18>
TXOUT0TXOUT0+
TXOUT0TXOUT0+
<18>
<18>
TZCLKTZCLK+
TZCLKTZCLK+
<18>
<18>
TZOUT2TZOUT2+
TZOUT2TZOUT2+
<18>
<18>
TZOUT1TZOUT1+
TZOUT1TZOUT1+
<18>
<18>
TZOUT0TZOUT0+
TZOUT0TZOUT0+
<18>
<18>
I2CC_SDA
I2CC_SCL
ENVDD
I2CC_SDA <18>
I2CC_SCL <18>
ENVDD
<18>
VGA_ENBKL
VGA_ENBKL <18>
+2.5VS
+3VS
ACES_88990-2D08
ACES_88990-2D08
B+
C423
0.1U_0603_25V7K
PM@
+1.8VS
C424
4.7U_0805_10V4Z
PM@ 2
+3VS
C425
0.1U_0402_16V4Z
2 PM@
C426
4.7U_0805_10V4Z
PM@ 2
+2.5VS
C427
0.1U_0402_16V4Z
2 PM@
C428
0.1U_0402_16V4Z
2 PM@
+5VS
C429
0.1U_0402_16V4Z
2 PM@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
MXM Connector
Custom
Rev
Date:
Sheet
1
17
of
53
LCD POWER CIRCUIT

Routing Diagram
+3VS
+3VALW
+LCDVDD
W=60mils
MXMII Conn.
1
R385
100K_0402_5%
1 2
0.047U_0402_16V7K
3
2
R386
2
G
C410
C411
D
Q36
2N7002_SOT23
1
1K_0402_5%
LVDS
4.7U_0805_10V4Z
LVDS Bus
NB
R384
300_0603_5%
D
Q37
SI2301BDS_SOT23
Use Daisy chain to route
ENVDD
+LCDVDD
Q38
2N7002_SOT23
2
G
1
R388 1
<17>
GM@
2 0_0402_5%
PM@
0_0402_5%
2
R387 1
<10> GMCH_ENVDD
W=60mils
1
R389
100K_0402_5%
C412
4.7U_0805_10V4Z
2
C413
I2CC_SCL
I2CC_SDA
1
2
RP12
1
2
RP13
1
2
RP14
1
2
RP15
1
2
RP16
1
2
RP17
1
2
RP18
1
2
RP19
1
2
RP20
0.1U_0402_16V4Z
TXOUT0+
TXOUT0-
TXOUT1+
TXOUT1TXOUT2+
TXOUT2TXCLK+
TXCLKTZOUT0+
TZOUT0-
LCD/PANEL BD. Conn.

C
TZOUT1+
TZOUT1-
+3VS
JP31
1
C418
0.1U_0402_16V4Z
+LCDVDD
C419
10U_0805_10V4Z
TXOUT0TXOUT0+
<17>
<17>
TXOUT1TXOUT1+
<17>
<17>
TXOUT2TXOUT2+
<17>
<17>
TXCLKTXCLK+
L55 2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKTXCLK+
+LCDVDD_L
(60 MIL)
FBMA-L11-201209-221LMA30T_0805 +3VS
+LCDVDD_L
1
<17>
<17>
TXOUT0TXOUT0+
1
1
C420
C796
220P_0402_50V7K
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
Follow HEL80's pin definition

Except pin 29
TZOUT2+
TZOUT2-
TZOUT0- <17>
TZOUT0+ <17>
TZOUT1TZOUT1+
TZCLK+
TZCLK-
TZOUT1- <17>
TZOUT1+ <17>
TZOUT2TZOUT2+
GMCH_LCD_CLK
GMCH_LCD_DATA
0_0404_4P2R_5%
GMCH_TXOUT0+
GMCH_TXOUT00_0404_4P2R_5%
GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXCLK+
GMCH_TXCLK0_0404_4P2R_5%
GMCH_TZOUT0+
GMCH_TZOUT00_0404_4P2R_5%
GMCH_TZOUT1+
GMCH_TZOUT2+
GMCH_TZCLK+
GMCH_TZCLK0_0404_4P2R_5%
GMCH_LCD_CLK <10>
GMCH_LCD_DATA <10>
GMCH_TXOUT0+ <10>
GMCH_TXOUT0- <10>
GMCH_TXOUT1+ <10>
GMCH_TXOUT1- <10>
GMCH_TXOUT2+ <10>
GMCH_TXOUT2- <10>
GMCH_TXCLK+ <10>
GMCH_TXCLK- <10>
GMCH_TZOUT0+ <10>
GMCH_TZOUT0- <10>
TZCLKTZCLK+
I2CC_SDA
I2CC_SCL
GMCH_TZOUT2+ <10>
GMCH_TZOUT2- <10>
GMCH_TZCLK+ <10>
GMCH_TZCLK- <10>
<17>
<17>
12/18 modified from

220p @ to 470p mount
by EMI request
INVERTER Conn.
I2CC_SDA <17>
I2CC_SCL <17>
+3VS
GMCH_TZOUT1+ <10>
GMCH_TZOUT1- <10>
TZOUT2- <17>
TZOUT2+ <17>
TZCLKTZCLK+
GND1
GND2
ACES_88242-3001
ME@
0.1U_0402_16V4Z
TZOUT0TZOUT0+
4
3
GM@
4
3
GM@
4
3
GM@
4
3
GM@
4
3
GM@
4
3
GM@
4
3
GM@
4
3
GM@
4
3
GM@
C797
220P_0402_50V7K
JP37
0208 Add C796 , C797 for EMI
<34>
INVT_PWM
<34>
DAC_BRIG
+INVPWR_B+
DAC_BRIG
1
2
3
4
5
6
7
DISPOFF#
INVT_PWM
DISPOFF#
MOLEX_53780-0790
ME@
2
470P_0402_50V7K
2
470P_0402_50V7K
2
470P_0402_50V7K
+3VS
1
1
C415
1
C416
1
C417
R390
1
2
R610
2
R611
<10> GMCH_ENBKL
JEPICO Conn.
<17> VGA_ENBKL
1
GM@ 0_0402_5%
1
PM@ 0_0402_5%
DISPOFF#
ENBKL
ENBKL
<34>
BKOFF#
BKOFF#
4.7K_0402_5%
<34>
D38
2 RB751V_SOD323
R612
100K_0402_5%
+INVPWR_B+
JP50
<34>
<34>
<34>
<34>
AD3_SMADID1
AD2_SMADID0
RDB_SMMRSB
WRB_PWRSB
AD3_SMADID1
AD2_SMADID0
RDB_SMMRSB
WRB_PWRSB
1
2
3
4
5
6
1
2
3
4
GND1
GND2
L37 2
1
KC FBM-L11-201209-221LMAT_0805
B+
L38 2
1
KC FBM-L11-201209-221LMAT_0805
ACES_88231-0400
ME@
C421
0.1U_0603_50V4Z
C422
A
68P_0402_50V8K
2 @
12/22 Change to SE071680J80
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
5
Title
LVDS & DVI Connector

Size
B
Date:
Document Number
Rev

Sheet

1
18
of
53
+5VS
L64
KC FBM-L11-201209-221LMAT_0805
D32
D33
D34
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
0208 Add L64 for EMI
CRT Connector
+R_CRT_VCC
D31
12/15 Modified. Note L26~L30 are 0 Ohm resisters
Place closed to chipset
R354
R356
0_0603_5%
L28
0_0603_5%
0_0603_5%
L29
0_0603_5%
L31
0_0603_5%
JP29
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT_G_2
GM@ 0_0402_5%
CRT_B_1
R359
L30
R360
1
C388
R361
2
150_0402_1%
150_0402_1%
C389
2
2
10P_0402_50V8J
CRT_B_2
0_0603_5%
CRT_R_2
L27
CRT_G_1
GM@ 0_0402_5%
1
R358
2
1.1A_6VDC_FUSE
1
+3VS
CRT_R_1
L26
VGA_CRT_B
<17> VGA_CRT_B
<10> GMCH_CRT_B
RB411DT146_SOT23-3
GM@ 0_0402_5%
VGA_CRT_G
<17> VGA_CRT_G
<10> GMCH_CRT_G
W=40mils
C387
0.1U_0402_16V4Z
2
VGA_CRT_R
<17> VGA_CRT_R
<10> GMCH_CRT_R
+L_CRT_VCC 2
+CRT_VCC
W=40mils
F1
C390
C391
2
10P_0402_50V8J
C392
C393
1
1
2
2
@
@
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
@
150_0402_1%
C394
10P_0402_50V8J
2
C395
10P_0402_50V8J
2
C396
10P_0402_50V8J
+CRT_VCC
P
G
2
GM@ 0_0402_5%
1
R364
<10> GMCH_CRT_HSYNC
2
R362
1
10K_0402_5%
1
R658
2 CRT_HSYNC_1
39_0402_1%
1
L33
CRT_HSYNC_2
2
FCM1608C-121T_0603
CRT_VSYNC_2
2
FCM1608C-121T_0603
1
C400
10P_0402_50V8J
SN74AHCT1G125DCKR_SC70-5
SUYIN_7846S-15G2T-HI
ME@
2
100P_0402_50V8J
DSUB_12
1
U33
OE#
VGA_CRT_HSYNC
<17> VGA_CRT_HSYNC
1
L32
2
0.1U_0402_16V4Z
5
1
C398
C397
10P_0402_50V8J
C401
2
0.1U_0402_16V4Z
DSUB_15
2
1
R659
68P_0402_50V8K
2 CRT_VSYNC_1
39_0402_1%
12/22 Change to SE071680J80
SN74AHCT1G125DCKR_SC70-5
OE#
2
GM@ 0_0402_5%
1
R366
<10> GMCH_CRT_VSYNC
C402
U34
VGA_CRT_VSYNC
<17> VGA_CRT_VSYNC
68P_0402_50V8K
1
C403
C399
10P_0402_50V8J
+CRT_VCC
16
17
TV-OUT Conn.
D42
D43
DAN217_SC59
@
DAN217_SC59
@
+3VS
D35
D36
D37
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
+3VS
R367
0214 Modified from 4.7K to 2.2K
+3VS
VGA_TV_CRMA
<10> GMCH_TV_CRMA
L35
VGA_TV_COMPS
R382
R381
2
GM@ 0_0402_5%
L36
1
R380
2
FCM1608C-121T_0603
TV_CRMA_1
TV_COMPS_1
TV_LUMA_1
<17> VGA_TV_COMPS
<10> GMCH_TV_COMPS
2
FCM1608C-121T_0603
R383
1
C404
150_0402_1%
150_0402_1%
150_0402_1%
C405
C406
2
6P_0402_50V8K
6P_0402_50V8K
2
FCM1608C-121T_0603
C407
6P_0402_50V8K
2
C408
2
6P_0402_50V8K
C409
2.2K_0402_5%
3
6
7
5
2
4
1
8
9
2.2K_0402_5%
DSUB_12
DSUB_15
2
R371
1
GM@ 0_0402_5%
GMCH_CRT_DATA <10>
2
R372
1
GM@ 0_0402_5%
GMCH_CRT_CLK <10>
Q35
2N7002_SOT23
SUYIN_030107FR007SX08FU
ME@
6P_0402_50V8K
2
Q34
2N7002_SOT23
2
G
<17> VGA_TV_CRMA
2
GM@ 0_0402_5%
L34
VGA_DDC_CLK <17>
2
1
R378
VGA_TV_LUMA
2
GM@ 0_0402_5%
1
R375
VGA_DDC_DATA <17>
2
G
JP30
<10> GMCH_TV_LUMA
R369
<17> VGA_TV_LUMA
2.2K_0402_5%
2
R368
+3VS
+CRT_VCC
6P_0402_50V8K
R377
2.2K_0402_5%
+3VS
12/13 Modified from 4.7K to 2.2K by Intel recommend

4
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
Title
CRT & TV-OUT Connector

Size
B
Date:
Document Number
Rev

Sheet

E
19
of
53
10/17 : Change P/N from SA000010G00 to SA00001JU10

10/17 : FootPrint : SA000010G00
BOM : SA00001JU10
1/2 : Change U37 GM part number to SA00001JU80
+3VS
R326 1
2 8.2K_0402_5%
PCI_DEVSEL#
R327 1
2 8.2K_0402_5%
PCI_STOP#
R328 1
2 8.2K_0402_5%
PCI_TRDY#
U30B
R329 1
2 8.2K_0402_5%
PCI_FRAME#
R330 1
2 8.2K_0402_5%
PCI_PLOCK#
R331 1
2 8.2K_0402_5%
PCI_IRDY#
R332 1
2 8.2K_0402_5%
PCI_SERR#
R333 1
2 8.2K_0402_5%
PCI_PERR#
R334 1
2 8.2K_0402_5%
PCI_PIRQA#
R335 1
2 8.2K_0402_5%
PCI_PIRQB#
R336 1
2 8.2K_0402_5%
PCI_PIRQC#
R337 1
2 8.2K_0402_5%
PCI_PIRQD#
R338 1
2 8.2K_0402_5%
PCI_PIRQE#
R340 1
2 8.2K_0402_5%
PCI_PIRQF#
R341 1
2 8.2K_0402_5%
PCI_PIRQG#
R342 1
2 8.2K_0402_5%
PCI_PIRQH#
R343 1
2 8.2K_0402_5%
PCI_REQ#0
R344 1
2 8.2K_0402_5%
PCI_REQ#1
R345 1
2 8.2K_0402_5%
PCI_REQ#2
R346 1
2 8.2K_0402_5%
PCI_REQ#3
+3VS
<26> PCI_PIRQC#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
F9
B5
C5
A10
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
A4
D7
E18
C18
B19
F18
A11
C10
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
C/BE0#
C/BE1#
C/BE2#
C/BE3#
C17
E15
F16
E17
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
PCI_IRDY#
PCI_PAR
PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
AG24
B10
G7
PLT_RST#
CLK_PCI_ICH
PCI_PME#
PCI_REQ#0 <28>
PCI_GNT#0 <28>
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#2 <26>
PCI_GNT#2 <26>
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
<26,28>
<26,28>
<26,28>
<26,28>
PCI_IRDY# <26,28>
PCI_PAR <26,28>
PCI_DEVSEL# <26,28>
PCI_PERR# <26,28>
PCI_PLOCK#
PCI_SERR# <26,28>
PCI_STOP# <26,28>
PCI_TRDY# <26,28>
PCI_FRAME# <26,28>
Place closely pin B10

CLK_PCI_ICH
<26,28> PCI_AD[0..31]
R339
10_0402_5%
@
CLK_PCI_ICH <16>
PCI_PME# <34>
C386
10P_0402_50V8J
@
12/7 Let PLT_RST# all drived by U31
Interrupt I/F
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
F8
G11
F12
B3
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_PIRQG# <28>
PCI_PIRQH# <28>
ICH8M REV 1.0
A16 Swap Override Strap
2 1K_0402_5% PCI_GNT#0
@
2 1K_0402_5%
@
PCI_GNT#3
+3V_AND1
Low= A16 swap override Enable

High= Default*
5
2 1K_0402_5% PCI_GNT#3
@
PLT_RST#
R350
SPI_CS#1 <22>
1
R618
1
R619
2
0_0402_5%
2
@ 0_0402_5%
U31
NC7SZ08P5X_NL_SC70-5
@
Y 4
+3VS
+3VALW
PLT_RST_BUF# <8,17,29,30,32,41>
R348
R347
R349
PCI_GNT#0
SPI_CS#1
Boot BIOS Loaction
SPI
PCI
LPC*
2
0_0402_5%
2
0_0402_5%
2
@ 0_0402_5%
U32
@
Y 4
+3VS
+3VALW
PCI_RST# <24,26,28,33,34,36,41>
1
R620
1
R621
PCIRST#
100K_0402_5%
@
+3V_AND2
Update Footprint
1
R616
Boot BIOS Strap
2
0_0402_5%
1
R617
R352
100K_0402_5%
@
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
ICH8M(1/4)-PCI
Size
Document Number
Rev
0

Date:
Sheet
1
20
of
53
C381
15P_0402_50V8J
SM_INTRUDER#
2
1M_0402_5%
12/7 Modified X4 to SJ100001U00 10ppm
IN
32.768KHZ_12.5P_1TJS125BJ2A251
High = Internal VR Enable

D
R724
LAN100_SLP
2
330K_0402_1%
1
R297
20K_0402_5%
+RTCVCC
2
C382
2
J5
AG25
AF24
RTCX1
RTCX2
AF23
RTCRST#
SM_INTRUDER#
AD22
INTRUDER#
ICH_INTVRMEN
LAN100_SLP
AF25
AD21
INTVRMEN
LAN100_SLP
ICH_RTCX2
1
18P_0402_50V8J
ICH_RTCRST#
close to RAM door
+3VS
U30A
1
@ JOPEN
R309
C383
1U_0603_10V4Z
1
2
10K_0402_5%
Internal PU 15K, Can be reserved.

SB EDS-1 21762,2.0v1
SATA_LED#
10/11 Circuit reserved for EMI

C758
@ 1U_0603_10V4Z
1
2
U49
BIT_CLK
CLKIN
R763
NC
CLKOUT
NC
SSON
2
8
@ 10K_0402_5%
VDD
SS
GND
+1.5VS
R304
GLAN_COMP
2
24.9_0402_1%
HDA_BITCLK_ICH 1
R752
2 HDA_BITCLK_ICH
@ 22_0402_5%
2
+3VS
@ 10K_0402_5%
1
R762
1
5
R750
4
6
2 0_0402_5% BIT_CLK
HDA_SYNC_ICH
@ 10K_0402_5%
HDA_SYNC_ICH
2
33_0402_5%
2
33_0402_5%
<24> SATA_DTX_C_IRX_N0
<24> SATA_DTX_C_IRX_P0
HDA_BITCLK_AUDIO_R
2
1
0_0402_5%
R313
HDA_BITCLK_MDC_R
2
1
0_0402_5%
R305
1
R817
1
R818
<42> HDA_BITCLK_MDC
<42> HDA_RST_MDC#
<38> HDA_SDOUT_AUDIO
<42> HDA_SDOUT_MDC
LAN_TXD0
LAN_TXD1
LAN_TXD2
HDA_BITCLK_ICH
2
33_0402_5%
2
33_0402_5%
1
R316
1
R307
HDA_RST_ICH#
2
33_0402_5%
2
33_0402_5%
1
R317
1
R311
HDA_SDOUT_ICH
2
33_0402_5%
2
33_0402_5%
<16> CLK_PCIE_SATA#
<16> CLK_PCIE_SATA
R318
GLAN_DOCK#/GPIO13
GLAN_COMPI
GLAN_COMPO
AJ16
AJ15
AE14
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
AF6
AF5
AH5
AH6
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
AG3
AG4
AJ4
AJ3
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AF2
AF1
AE4
AE3
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AB7
AC6
SATA_CLKN
SATA_CLKP
AG1
AG2
SATARBIAS#
SATARBIAS
2 24.9_0402_1%
SATARBIAS
C4
LPC_FRAME#
LDRQ0#
LDRQ1#/GPIO23
G9
E6
LPC_DRQ0#
10mils width less than 500mils
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
1
1
1
56_0402_5%
56_0402_5%
56_0402_5%
D
<29,34,36,41>
<29,34,36,41>
<29,34,36,41>
<29,34,36,41>
LPC_FRAME# <29,34,36,41>
LPC_DRQ0#
LPC_DRQ0# <36,41>
A20GATE
A20M#
AF13
AG26
GATEA20
H_A20M#
DPRSTP#
DPSLP#
AF26
AE26
DPRSTP# R300 1
DPSLP#
R301 1
FERR#
AD24
H_FERR#
CPUPWRGD/GPIO49
AG29
H_PWRGOOD
IGNNE#
AF27
H_IGNNE#
INIT#
INTR
RCIN#
AE24
AC20
AH14
H_INIT#
H_INTR
KB_RST#
NMI
SMI#
AD23
AG28
H_NMI
H_SMI#
STPCLK#
AA24
H_STPCLK#
THRMTRIP#
AE27
THRMTRIP_ICH#
TP8
AA23
HDA_RST#
SATA_LED#
CLK_PCIE_SATA#
CLK_PCIE_SATA
FWH4/LFRAME#
HDA_BIT_CLK
HDA_SYNC
HDA_SDOUT
SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2
<38> HDA_RST_AUDIO#
D21
E20
C20
AE10
AG14
<35> SATA_LED#
<38> HDA_BITCLK_AUDIO
LAN_RXD0
LAN_RXD1
LAN_RXD2
AE13
IDE_HRESET#
<24> IDE_HRESET#
<42> HDA_SYNC_MDC
C21
B21
C22
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT_ICH
1
R315
1
R306
LAN_RSTSYNC
AJ17
AH17
AH15
AD13
<38> HDA_SDIN0
<42> HDA_SDIN1
<38> HDA_SYNC_AUDIO
GLAN_CLK
D22
D25
C25
HDA_RST_ICH#
@ ASM3P623S00BF-08TR_TSSOP8
R751
B24
AH21
+3VS
E5
F5
G8
F6
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
RTC
LPC
OUT
NC
LAN / GLAN
CPU
NC
IHDA
H_DPRSTP#
R293
H_DPSLP#
R295
H_FERR#
R296
IDE
R302
ICH_INTVRMEN
2
330K_0402_1%
+1.05VS
ICH_RTCX1
X4
SATA
R294
10M_0402_5%
2
1
R298
+3VS
12/1 Modified C381 from 18P to 15P
+RTCVCC
1 R299 10K_0402_5%
GATEA20 <34>
H_A20M# <4>
+3VS
0_0402_5% H_DPRSTP#
0_0402_5% H_DPSLP#
2
2
C791
100P_0402_50V8J
H_DPRSTP# <5,8,51>
H_DPSLP# <5>
H_FERR# <4>
H_PWRGOOD <5>
H_IGNNE# <4>
H_INIT#
H_INTR
<4>
<4>
H_NMI
H_SMI#
<4>
<4>
R303
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DA0
DA1
DA2
AA4
AA1
AB3
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
Y6
Y5
IDE_DCS1#
IDE_DCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
W4
W3
Y2
Y3
Y1
W5
IDE_DIOR#
IDE_DIOW#
IDE_DDACK#
IDE_IRQ
IDE_DIORDY
IDE_DDREQ
1 10K_0402_5%
KB_RST# <34>
+3VS
H_STPCLK# <4>
R308 1
2 24.9_0402_1%
IDE_DD[0..15]
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
2
R310
<24>
IDE_DA[0..2]
H_THERMTRIP#
H_THERMTRIP# <4,8>
1
56_0402_5%
+1.05VS
IDE_DIORDY
R312 1
2 4.7K_0402_5%
IDE_IRQ
R314 1
2 8.2K_0402_5%
+3VS
<24>
IDE_DCS1# <24>
IDE_DCS3# <24>
IDE_DIOR# <24>
IDE_DIOW# <24>
IDE_DDACK# <24>
IDE_IRQ <24>
IDE_DIORDY <24>
IDE_DDREQ <24>
ICH8M REV 1.0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
1
C384
1
C385
SATA_ITX_C_DRX_N0
2
3900P_0402_50V7K
SATA_ITX_C_DRX_P0
2
3900P_0402_50V7K
1
R319
1
R321
1
R322
1
R323
+3VS
R324
1K_0402_5%
@
<22>
ICH_TP3
R325
1K_0402_5%
@
BATT1
SATA_DTX_C_IRX_N1
2
1K_0402_5%
SATA_DTX_C_IRX_P1
2
1K_0402_5%
SATA_DTX_C_IRX_N2
2
1K_0402_5%
SATA_DTX_C_IRX_P2
2
1K_0402_5%
+RTCBATT
ML1220T13RE
@
BATT2
R722
1
D13
2
2
+CHGRTC
511_0603_1%
+RTCVCC
BAS40-04_SOT23
XOR Chain Entrance Strap

HDA_SDOUT
Description
RSVD
Enter XOR Chain
Normal Operation
Set PCIE port config bit 1
ML1220T13RE
45@
SATA_RXn/p need tie to ground when SATA port no used
C96
0.1U_0402_16V4Z
9/29 Checked. Same as HEL80's

Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
9/29 modified to follow ISKAA

+RTC_BATT
ICH_TP3
HDA_SDOUT_ICH
SATA_ITX_C_DRX_P0 <24>
close ICH8
Change BATT1 P/N : SP093PA0200 (Panasonic)

SP093MX0000 (MAXELL)
RTC Battery
SATA_ITX_C_DRX_N0 <24>
Title

ICH8M(2/4)-LAN,IDELPC,RTC
Size
B
Date:
Document Number
Rev
0

Wednesday, February 14, 2007
Sheet
1
21
of
53
ICH_SMLINK1
<34,44>
LINKALERT#
10K_0402_5%
R276 1
2
ITP_DBRESET#
1K_0402_5%
R277 1
2
ICH_PCIE_WAKE#
AH11
CLKRUN#/GPIO32
ICH_PCIE_WAKE#
SERIRQ
EC_THERM#
AE17
AF12
AC13
WAKE#
SERIRQ
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
1 ICH_VGATE
0_0402_5%
2
R275
VGATE
1
D45
ACIN
<34>
<34>
EC_SMI#
EC_SCI#
PAD
OCP#
D_ACIN
2
@ RB751V_SOD323
EC_SMI#
EC_SCI#
SATA_CLKREQ#
<16> SATA_CLKREQ#
PM_BATLOW#
GPIO39
GPIO48
<38>
10K_0402_5%
R728 1
2
PM_CLKRUN#
T15
10K_0402_5%
R274 1
2
8.2K_0402_5%
R278 2
1
STP_PCI#/GPIO15
STP_CPU#/GPIO25
GPIO39
SB_SPKR
SB_SPKR
AD9
<8> MCH_ICH_SYNC#
100K_0402_5%
R286 1
PM_DPRSLPVR
2
<21>
ICH_TP3
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
ICH8M REV 1.0
100K_0402_5%
ICH_VGATE
R287 1
2
LAN
+3VALW
NEW Card
RP2
5
6
7
8
4
3
2
1
USB_OC#2
USB_OC#1
USB_OC#4
USB_OC#5
Robson
10K_1206_8P4R_5%
R292
1
1
USB_OC#3
2
10K_0402_5%
USB_OC#8
2
10K_0402_5%
USB_OC#9
2
10K_0402_5%
CP_PE#
2
10K_0402_5%
3G
WLAN
+3VS
R284
R283
IFT01 ( 01 )
R284
R281
IFL90 ( 10 )
R694
R283
IFT91 ( 11 )
R694
R281
91@ 10K_0402_5%
R281 1
2
PWRBTN#
LAN_RST#
AH20
RSMRST#
AG27
CK_PWRGD
E1
CLPWROK
E3
SLP_M#
AJ25
CL_CLK0
CL_CLK1
F23
AE18
CL_DATA0
CL_DATA1
F22
AF19
CL_VREF0
CL_VREF1
D24
AH23
CL_RST#
AJ23
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
AJ27
AJ24
AF22
AG19
1
100_0402_1%
P27
P26
N29
N28
PERN1
PERP1
PETN1
PETP1
M27
M26
L29
L28
PERN2
PERP2
PETN2
PETP2
<33>
<33>
<33>
<33>
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
C373 2
C374 2
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
K27
K26
J29
J28
PERN3
PERP3
PETN3
PETP3
<32>
<32>
<32>
<32>
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4
C375 2
C376 2
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4
H27
H26
G29
G28
PERN4
PERP4
PETN4
PETP4
<32>
<32>
<32>
<32>
PCIE_PTX_C_IRX_N5
PCIE_PTX_C_IRX_P5
PCIE_ITX_C_PRX_N5
PCIE_ITX_C_PRX_P5
C377 2
C378 2
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
PCIE_PTX_C_IRX_N5
PCIE_PTX_C_IRX_P5
PCIE_ITX_PRX_N5
PCIE_ITX_PRX_P5
F27
F26
E29
E28
PERN5
PERP5
PETN5
PETP5
<32>
<32>
<32>
<32>
PCIE_PTX_C_IRX_N6
PCIE_PTX_C_IRX_P6
PCIE_ITX_C_PRX_N6
PCIE_ITX_C_PRX_P6
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
PCIE_PTX_C_IRX_N6
PCIE_PTX_C_IRX_P6
PCIE_ITX_PRX_N6
PCIE_ITX_PRX_P6
D27
D26
C29
C28
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
C23
B23
E22
SPI_CLK
SPI_CS0#
SPI_CS1#
D23
F21
SPI_MOSI
SPI_MISO
C379 2
C380 2
SPI_CS#1
<33> USB_OC#0
R284
10K_0402_5%
01@
R281
<37> USB_OC#4
<37> USB_OC#5
<33> USB_OC#6
<33>
CP_PE#
10K_0402_5%
01@
R283
1
C789
2
100P_0402_50V8J
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
CP_PE#
USB_OC#8
USB_OC#9
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
CK_PWRGD
2
R695
2
SLP_S5#
U9
4
PM_SLP_S5#
TC7SH08FUF_SSOP5
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
PAD
Issued Date
CL_PWROK <8>
T16
100P_0402_50V8J
ICH_POK
1
R270
2
10K_0402_5%
EC_RSMRST#R
1
R272
2
10K_0402_5%
C
CL_DATA0 <8>
+3VS
+3VS
CL_VREF0_ICH
CL_VREF1_ICH
R279
3.24K_0402_1%
CL_RST# <8>
R288
3.24K_0402_1%
@
CL_VREF0_ICH
R285 1
2 100K_0402_5%
C369
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V27
V26
U29
U28
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
DMI_MTX_IRX_N0 <8>
DMI_MTX_IRX_P0 <8>
DMI_ITX_MRX_N0 <8>
DMI_ITX_MRX_P0 <8>
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
DMI_MTX_IRX_N1 <8>
DMI_MTX_IRX_P1 <8>
DMI_ITX_MRX_N1 <8>
DMI_ITX_MRX_P1 <8>
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA29
AA28
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
DMI_MTX_IRX_N2 <8>
DMI_MTX_IRX_P2 <8>
DMI_ITX_MRX_N2 <8>
DMI_ITX_MRX_P2 <8>
CL_VREF1_ICH
1
R282
453_0402_1%
C372
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
DMI_MTX_IRX_N3 <8>
DMI_MTX_IRX_P3 <8>
DMI_ITX_MRX_N3 <8>
DMI_ITX_MRX_P3 <8>
CLK_PCIE_ICH#
CLK_PCIE_ICH
T26
T25
DMI_ZCOMP
DMI_IRCOMP
Y23
Y24
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USBRBIAS#
USBRBIAS
F2
F3
USBRBIAS
Q45
USB20_N9 <42>
USB20_P9 <42>
USB
3G/TV
New Card
WLAN
USB
USB
USB
CAMERA
BT
FP
1
2
R291
22.6_0402_1%
2007/8/18
Deciphered Date
EC_RSMRST#R
@ BAV99DW-7_SOT363
R636
@ 2.2K_0402_5%
@ MMBT3906_SOT23
1
2
+3VALW
R634
@ 4.7K_0402_5%
D44B
D44A @
BAV99DW-7_SOT363
R635
@ 2.2K_0402_5%
USB20_N8
USB20_P8
1
4
2
3
RP54
0_0404_4P2R_5%
15W@
USB20_N8_1
USB20_P8_1
USB20_P8
USB20_N8
1
4
2
3
RP55
0_0404_4P2R_5%
14W@
USB20_P8_2
USB20_N8_2
Compal Secret Data

2006/08/18
<34> EC_RSMRST#
+1.5VS
<33>
<33>
<32>
<32>
<33>
<33>
<32>
<32>
<37>
<37>
<37>
<37>
<33>
<33>
<42>
<42>
0_0402_5%
2
Within 500 mils
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
R289
453_0402_1%
@
R633
CLK_PCIE_ICH# <16>
CLK_PCIE_ICH <16>
R290 24.9_0402_1%
1
2
0.1U_0402_16V4Z
2
@
RSMRST circuit
3
C790
CK_PWRGD <16>
CL_CLK0 <8>
DMI_CLKN
DMI_CLKP
USB
PM_SLP_S5# <34>
1
ICH_POK
1
0_0402_5%
PM_SLP_M#
EC_RSMRST#R
Within 500 mils
PROJECT_ID1
0_0402_5%
ICH8M REV 1.0
10K_0402_5%
90@
SLP_S4#
PBTN_OUT# <34>
R796 2
PROJECT_ID0
10K_0402_5%
90@
PM_DPRSLPVR <8,51>
0.1U_0402_16V4Z
2
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2
R694
91@ 10K_0402_5%
R694 1
2
00@ 10K_0402_5%
R284 1
2
PBTN_OUT#
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
ID0
IFT00 ( 00 )
00@ 10K_0402_5%
R283 1
2
AE21
C370 2
C371 2
12/1 Modified
+3VS
BATLOW#
DPRSLPVR 2
R615
PM_BATLOW#
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
SPI not used, Left NC
AJ14
<30>
<30>
<30>
<30>
<20>
ID1
DPRSLPVR/GPIO16
ICH_POK <8,34>
R717
ICH_POK
R716
AE23
R715
AH27
PWROK
U30D
Not in CRB,Keep!
+3VALW
S4_STATE#/GPIO26
C2
PM_SLP_S3# <34>
1 2
10K_0402_5%
R273 1
2
AE20
AG18
0_0402_5%
0_0402_5%
1
1
C368
10P_0402_50V8J
@
T14
ICH_SMLINK0
SMBALERT#/GPIO11
PAD
<8,51>
AG22
PM_SLP_S3#
SLP_S4#
SLP_S5#
<30,32,33> ICH_PCIE_WAKE#
<26,28,29,34,36,41> SERIRQ
<34> EC_THERM#
ICH_RI#
10K_0402_5%
R271 1
2
EC_LID_OUT#
SUS_CLK
10K_0402_5%
R269 1
2
BMBUSY#/GPIO0
R627 2
R628 2
<28,29,34,41> PM_CLKRUN#
+3VALW
AG12
D3
AG23
AF21
AD18
C367
10P_0402_50V8J
@
PM_STP_PCI#
PM_STP_CPU#
<16> PM_STP_PCI#
<16> PM_STP_CPU#
PM_BMBUSY#
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
+3VS
CLK_ICH_14M <16>
CLK_ICH_48M <16>
GPIO48
SUS_STAT#/LPCPD#
SYS_RESET#
PCI-Express
Direct Media Interface
OCP#
10K_0402_5%
R727 1
2
<34> EC_LID_OUT#
F4
AD15
SPI
10K_0402_5%
R712 1
2
<8> PM_BMBUSY#
SUS_STAT#
ITP_DBRESET#
2 10K_0402_5%
D_ACIN
RI#
CLK_ICH_14M
CLK_ICH_48M
R265
10_0402_5%
@
<4> ITP_DBRESET#
AF17
AG9
G5
CLK14
CLK48
12/13 Add
<29,41> SUS_STAT#
ICH_RI#
PROJECT_ID1
PROJECT_ID0
MIC_ID
R268 1
2
100P_0402_50V8J
AJ12
AJ10
AF11
AG11
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
CLK_ICH_14M
SATA_CLKREQ#
10K_0402_5%
R693 1
2
2
1
C788
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
SATA
GPIO
PM_STP_CPU#
AJ26
AD19
AG21
AC17
AE19
SMB
PM_STP_PCI#
10K_0402_5%
R614 1
2
Place closely pin AC1
R264
10_0402_5%
@
U30C
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
Clocks
EC_THERM#
@ 10K_0402_5%
R613 1
2
MIC_ID
1
2
R786 DUAL@ 10K_0402_5%
R263
2.2K_0402_5%
Power MGT
8.2K_0402_5%
R267 1
2
R262
2.2K_0402_5%
SYS
GPIO
PM_CLKRUN#
Place closely pin B2

CLK_ICH_48M
8.2K_0402_5%
R266 1
2
INT@ 10K_0402_5%
R785 1
2
+3VS
1
SERIRQ
10K_0402_5%
R629 1
2
+3VALW
10K_0402_5%
R261 1
2
MISC
GPIO
Controller Link
+3VS
Title
USB20_N8_1 <36>
USB20_P8_1 <36>
USB20_P8_2 <36>
USB20_N8_2 <36>

ICH8M(3/4)-USB,GPIO,PCIE

Custom
Rev
0
Date:
Sheet
Wednesday, February 14, 2007

1
22
of
53
+3VS
Update Footprint
10_0402_5%
RB751V_SOD323
1
D30
R255
+ICH_V5REF_SUS
C335
0.1U_0402_16V4Z
(220UF*1, 22UF*2, 2.2UF*1)
L23 2
1
KC FBM-L11-201209-221LMAT_0805
1
+
C337
VCC1_5_B ~675mA
C338
C339
C340
220U_D2_2VMR15
22U_0805_6.3V6M
2
2
2
22U_0805_6.3V6M 2.2U_0603_6.3V6K
+1.5VS_SATAPLL_ICH
L24 1
2
MBK1608121YZF_0603
+1.5VS
(10UF*1, 1UF*1)
1
C345
C344
10U_0805_10V4Z
2
1U_0603_10V4Z
+1.5VS
C352
C353
1U_0603_10V4Z
1U_0603_10V4Z
close to AE7
close to AC1
VCC1_5_A ~1.56A
VCCUSBPLL ~10mA
+1.5VS
1
C757
C356
C357
2
0.1U_0402_16V4Z
PAD
PAD
TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2
+VCC_GLANPLL_R 1
+VCC_GLANPLL_ICH
2
+1.5VS
MBK1608121YZF_0603 1
R260
L25
C365
1_0603_5%
C364
VCCGLANPLL~23mA
(10UF*1, 1UF*1) 10U_0805_10V4Z
2
2.2U_0603_6.3V6K
VCCGLAN1_5 ~80mA
+1.5VS_PCIE_ICH
(220UF*1, 1UF*1)
AC1
AC2
AC3
AC4
AC5
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
AC10
AC9
VCC1_5_A[11]
VCC1_5_A[12]
AA5
AA6
VCC1_5_A[13]
VCC1_5_A[14]
G12
G17
H7
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
C366
VCC1_5_A[18]
VCC1_5_A[19]
D1
VCCUSBPLL
F1
L6
L7
M6
M7
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
W23
VCC1_5_A[25]
F17
G18
VCCLAN1_05[1]
VCCLAN1_05[2]
F19
G20
VCCLAN3_3[1]
VCCLAN3_3[2]
A24
VCCGLANPLL
A26
A27
B26
B27
B28
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
B25
VCCGLAN3_3
GLAN POWER
T10
T11
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
USB CORE
close to F1
+3VS
C361
AE7
AF7
AG7
AH7
AJ7
AC7
AD7
0.1U_0402_16V4Z
2
2
220U_D2_2VMR15
2
@
0.1U_0402_16V4Z
VCCLAN3_3 ~18mA
VCCSATAPLL
close to D1
AJ6
VCCA3GP
+1.5VS_PCIE_ICH
+1.5VS
CORE
+5VALW +3VALW
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
R29
VCC_DMI[1]
VCC_DMI[2]
AE28
AE29
V_CPU_IO[1]
V_CPU_IO[2]
AC23
AC24
VCC3_3[01]
AF29
VCC3_3[02]
AD2
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
AC8
AD8
AE8
AF8
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
AA3
U7
V7
W1
W6
W7
Y7
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
VCCHDA
AC12
VCCSUSHDA
AD11
C330
C331
(47UF*1, 0.047UF*1, 0.022UF*1)
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
+1.5VS_DMIPLL_ICH
+1.5VS_DMIPLL_R
L22 1
2
MBK1608121YZF_0603
1
(10UF*1,
C334
C333
10U_0805_10V4Z
2
0.01U_0402_16V7K
+1.05VS
C341
C342
C343
V_CPU_IO ~1mA
(4.7UF*1, 0.1UF*2)
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
close to AD2
+3VS
C346
C347
C348
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
close to AF29
VCC3_3 ~278mA
Add for Audio low voltage mode
close to AA3
+3VS
C349
C350
C351
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
VCCHDA~32mA
C354
0.1U_0402_16V4Z
+VCCSUS_HDA_ICH
VCCSusHDA~32mA
1
AC16 TP_VCCSUS1_5_ICH_1
PAD
T8
PAD
T9
VCCSUS1_5[2]
J7
TP_VCCSUS1_5_ICH_2
VCCSUS3_3[01]
C3
VCCSUS3_3
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06]
AC18
AC21
AC22
AG20
AH28
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
1
R637
C358
C359
C360
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
close to P6
R259
0_0603_5%
+3VALW
C355
0.1U_0402_16V4Z
2
+3VALW
0_0805_5%
VCCSus3_3~177mA
4.7U_0805_10V4Z
(0.1UF*1, 0.022UF*2)
close to AC18
C362
G22 TP_VCCCL1_05_ICH
F20
G21
VCCDMIPLL~23mA
4.7U_0805_10V4Z
VCCSUS1_5[1]
VCCCL3_3[1]
VCCCL3_3[2]
0.01UF*1)
+1.5VS
VCCDMI ~50mA
22U_0805_6.3V6M
2
T6
T7
A22
1_0603_5%
(22UF*1, 0.1UF*1)
PAD
PAD
VCCCL1_5
R254
+1.25VS
C336
TP_VCCSUS1_05_ICH_1
J6
AF20 TP_VCCSUS1_05_ICH_2
VCCCL1_05
VCC1_05 ~1.13A
+1.05VS
VCCSUS1_05[1]
VCCSUS1_05[2]
PAD
T12
1U_0603_10V4Z
@
C363
0.1U_0402_16V4Z
2 @
A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
+3VS
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
ICH8M REV 1.0

A
18mA
Compal Secret Data

2006/08/18
Issued Date
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
(0.1UF*1)
+3VS
4.7U_0805_10V4Z
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
+VCCCL1_5_INT_ICH
1mA ICH8M REV 1.0

5
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
VCCDMIPLL
VCCP_CORE
Update Footprint
0.1U_0402_16V4Z
1
V5REF_SUS
ATX
G4
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25
ARX
1mA
+ICH_V5REF
V5REF[1]
V5REF[2]
IDE
0.1U_0402_16V4Z
2
+ICH_V5REF_SUS
1U_0603_10V4Z
A16
T7
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
PCI
C329
RB751V_SOD323
C332
U30E
VCCRTC
VCCPSUS
C328
1mA
+ICH_V5REF
D29
100_0402_5%
U30F
AD25
+RTCVCC
R253
VCCPUSB
+5VS
Deciphered Date
2007/8/18
3
Title

Custom
Rev
0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet

1
23
of
53
14W ODD Conn.

Placea caps. near ODD CONN.
C314
1
C316
C318
U29
1U_0603_10V4Z
14W@
IDE_DD[0..15]
<21> IDE_DD[0..15]
1000P_0402_50V7K
14W@
C319
2 0.1U_0402_16V4Z
C317
10U_0805_10V4Z
14W@
<21> IDE_HRESET#
IDE_DA[0..2]
<21> IDE_DA[0..2]
<20,26,28,33,34,36,41> PCI_RST#
IDE_HRESET#
PCI_RST#
C315
+3VS
14W@
10U_0805_10V4Z
IDE_RST#
14W@
0.1U_0402_16V4Z
+5VS
Update Footprint
JP27
IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
IDE_DIOW#
IDE_DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
<21> IDE_DIOW#
<21> IDE_DIORDY
<21> IDE_IRQ
<21> IDE_DCS1#
+5VS
R251
2
475_0402_1%
IDE_CSEL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
IDE_DDREQ <21>
IDE_DIOR# <21>
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
IDE_DDACK# <21>
2 R250
+5VS
100K_0402_5%
SATA HDD Conn.
IDE_DCS3# <21>
+5VS
OCTEK_CDR-50DY1G
14W@
(NEW)
IDE_CSEL
Grounding for Master (When use SATA HDD)
Open or High for Slaver (Normal)
+5VS
+5VS
R252
IDE_LED#
100K_0402_5%
+3VS
0.1U_0402_16V4Z
C323
C324
1000P_0402_50V7K
10U_0805_10V4Z
1
C325
C326
1U_0603_10V4Z
C327
C322
0.1U_0402_16V4Z
2 @
2
10U_0805_10V4Z
15W ODD Conn.
IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
IDE_DIOW#
IDE_DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
IDE_CSEL
R662
R663
R664
R665
R666
R667
R668
R669
R670
R671
R672
R673
R674
R675
R676
R677
R678
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
R_IDE_RST#
R_IDE_DD7
R_IDE_DD6
R_IDE_DD5
R_IDE_DD4
R_IDE_DD3
R_IDE_DD2
R_IDE_DD1
R_IDE_DD0
R_IDE_DIOW#
R_IDE_DIORDY
R_IDE_IRQ
R_IDE_DA1
R_IDE_DA0
R_IDE_DCS1#
R_IDE_LED#
R_IDE_CSEL
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
R679
R680
R681
R682
R683
R684
R685
R686
R687
R688
R689
R690
R691
R692
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
R_IDE_DD8
R_IDE_DD9
R_IDE_DD10
R_IDE_DD11
R_IDE_DD12
R_IDE_DD13
R_IDE_DD14
R_IDE_DD15
R_IDE_DDREQ
R_IDE_DIOR#
R_IDE_DDACK#
R_IDE_PDIAG#
R_IDE_DA2
R_IDE_DCS3#
+5VS_ODD
15W@
0.1U_0402_16V4Z
1
C731
C730
1000P_0402_50V7K
15W@
JP28
JP41
R_IDE_RST#
R_IDE_DD7
R_IDE_DD6
R_IDE_DD5
R_IDE_DD4
R_IDE_DD3
R_IDE_DD2
R_IDE_DD1
R_IDE_DD0
R_IDE_DIOW#
R_IDE_DIORDY
R_IDE_IRQ
R_IDE_DA1
R_IDE_DA0
R_IDE_DCS1#
R_IDE_LED#
+5VS_ODD
R_IDE_CSEL
1U_0603_10V4Z
15W@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
R_IDE_DD8
R_IDE_DD9
R_IDE_DD10
R_IDE_DD11
R_IDE_DD12
R_IDE_DD13
R_IDE_DD14
R_IDE_DD15
R_IDE_DDREQ
R_IDE_DIOR#
<21> SATA_DTX_C_IRX_N0
<21> SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N0
1
C320
SATA_DTX_C_IRX_P0
1
C321
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
SATA_DTX_IRX_N0
2
3900P_0402_50V7K
SATA_DTX_IRX_P0
2
3900P_0402_50V7K
+5VS
R_IDE_PDIAG#
R_IDE_DA2
R_IDE_DCS3#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
R_IDE_DDACK#
+5VS_ODD
GND
A+
AGND
BB+
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SUYIN_127043FB022S338ZR_RV
ME@
+5VS_ODD
1
R778
1
R779
2
15W@ 0_1206_5%
2
15W@ 0_1206_5%
C734
Issued Date
Compal Secret Data
12/4 Change J7 to 2x0 Ohm 1/4w resistors
10U_0805_10V4Z
15W@
<21> SATA_ITX_C_DRX_P0
<21> SATA_ITX_C_DRX_N0
(NEW)
C733
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
Change Library
+5VS
C732
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
OCTEK_CDR-50DY1G
15W@
15W@
10U_0805_10V4Z
1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2006/08/18
2007/8/18
Deciphered Date
C
Title
HDD & ODD Connector

Size
B
Document Number
Rev
Date:

G
Sheet
24
H
of
53
0206 => Note : Change BOM structure from HS@ to G-SENSOR@
Q32
SI2301BDS_SOT23
G_SENSOR@
+3VS_ITES
9/19 modified from +EC_AVCC to +3VALW
0.1U_0402_16V4Z
2 G_SENSOR@
1U_0603_10V4Z
2 G_SENSOR@
+3VS_ITES_R
+3VALW
G_SENSOR@
47_0402_5%
C311
C752
1
2
10U_0805_6.3V6M
2 G_SENSOR@
2
G
C310
0.1U_0402_16V4Z
G_SENSOR@
C309
1
1
R245
R243
<34>
C308
1U_0603_10V4Z
2 G_SENSOR@
C
100K_0402_5%
G_SENSOR@
ITES_EN#
+3VALW
R246
<34>
ITES_ST
D28
2/1 change R247/R249 from 10k to 0 Ohm
10K_0402_5%
G_SENSOR@
U28
2 RB751V_SOD323
ST
ST
14
15
Vs
Vs
G_SENSOR@
R248
100K_0402_5%
@
3
5
6
7
COM
COM
COM
COM
Xout
Yout
12
10
NC
NC
NC
NC
NC
NC
NC
1
4
8
9
11
13
16
X
Y
G_SENSOR@
2 0_0402_5%
2 0_0402_5%
G_SENSOR@
R247 1
R249 1
C312
ITES_VSENSE_X <34>
ITES_VSENSE_Y <34>
0.1U_0402_16V4Z
2
G_SENSOR@
C313
0.1U_0402_16V4Z
2 G_SENSOR@
ADXL322JCP-REEL_LFCSP16P_4*4
G_SENSOR@
2006/08/05
Issued Date
Compal Secret Data
2007/08/05
Deciphered Date
5
Title
CH7315A&HDMI Connector
Size
B
Date:
Document Number
Rev
0.1
LA-3541P
Sheet
Tuesday, February 13, 2007

1
25
of
53
+S1_VCC
+3VS
IDSEL:AD20
(PIRQC#/D#,
GNT#2,
REQ#2)
1
2
R641
@ 10_0402_5%
C710
@ 15P_0402_50V8J
1
R643
MS_PWREN#
G4
J4
K1
K3
L1
L2
L3
M1
M2
PCI_REQ#2
A1
B1
CLK_PCI_PCM H1
L8
L11
2
PCMCIA@ 10K_0402_5%
PCI_AD20
PCMCIA@
F4
1
2
R644
100_0402_5%
K8
<20> PCI_PIRQC#
R645 1
SD_PULLHIGH N9
2
0_0402_5%
K9
@
N10
<22,28,29,34,36,41> SERIRQ
SM_CD#
L10
5IN1_LED#
N11
M11
SDOC#
J9
NEED CHECK
PCI_RST#
M10
VCCA2
VCCA1
B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
B7
A11
E11
H13
S1_REG#
S1_A12
S1_A8
S1_CE1#
PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
C5
D5
S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
1
2
R642
S1_BVD1 PCMCIA@
S1_WP
RIOUT#_PME#
SUSPEND#
CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
D11
S1_A19
CINT#/READY_IREQ#
D6
S1_RDY#
SPKROUT
CAUDIO/BVD2_SPKR#
M9
B5
PCM_SPK#
S1_BVD2
A4
L12
D9
C6
A2
E10
J13
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14
IDSEL
CBLOCK#/A19
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14
GRST#
W=40mil
C706
SM_CD#
43K_0402_5%
E7
VCC_SD
1
R647 @
5IN1_LED#
10K_0402_5%
E8
F8
G7
SDCD#
SDWP/SMWPD#
SDPWREN33#
1
R648 @
SDOC#
10K_0402_5%
H5
SDCLKI
F6
E5
E6
F7
F5
G6
SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4
G5
GND_SD
C717
PCMCIA@
0.1U_0402_16V4Z
C719
PCMCIA@
0.1U_0402_16V4Z
C720
PCMCIA@
0.1U_0402_16V4Z
SMBSY#
SMCD#
SMWP#
SMCE#
H7
J8
H8
E9
G9
H9
G8
F9
H6
J7
J6
J5
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
C716
PCMCIA@
4.7U_0805_10V4Z
MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3
0.1U_0402_16V4Z
PCMCIA@ 2
0.1U_0402_16V4Z
PCMCIA@
1
1
C723
C724
0.1U_0402_16V4Z
PCMCIA@
1
1
C725
C726
1
C727
0.1U_0402_16V4Z
PCMCIA@
0.1U_0402_16V4Z
PCMCIA@
3
4
VCCD0
VCCD1
VPPD0
VPPD1
1
2
15
14
3.3V
3.3V
OC
C705
0.1U_0402_16V4Z
2 PCMCIA@
VCCD0#
VCCD1#
VPPD0
VPPD1
CP2211FD3_SSOP16
PCMCIA@
PCMCIA Socket
JP40
S1_A[0..25]
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_A[0..25]
S1_D[0..15]
S1_D[0..15]
+S1_VCC
+S1_VPP
S1_A16
33_0402_5%
PCM_SPK# <38>
+S1_VCC
C711
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
1
C712
10U_0805_10V4Z
PCMCIA@ 2
0.1U_0402_16V4Z
2 PCMCIA@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
GND
GND
D3
CD1#
D4
D11
D5
D12
D6
D13
D7
D14
CE1#
D15
A10
CE2#
OE#
VS1#
A11
IORD#
A9
IOWR#
A8
A17
A13
A18
A14
A19
WE#
A20
IREQ#
A21
VCC
VCC
VPP1
VPP2
A16
A22
A15
A23
A12
A24
A7
A25
A6
VS2#
A5
RESET
A4
WAIT#
A3
INPACK#
A2
REG#
A1
SPKR#
A0
STSCHG#
D0
D8
D1
D9
D2
D10
IOIS16#
CD2#
GND
GND
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
GND
GND
71
72
GND
GND
S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#
+S1_VCC
+S1_VPP
FOX_WZ21131-G2-8F_LT
PCMCIA@
S1_CD2#
C713
12/27 change JP40 footprint to FOX_1CA4A501-A2-4F_68P_LT-S
2
+S1_VPP
10P_0402_50V8K
PCMCIA@ 1
C714
C715
10U_0805_10V4Z
PCMCIA@ 2
1
0.1U_0402_16V4Z
2 PCMCIA@
S1_CD1#
C718
S1_OE#
S1_WP
10/17 : FootPrint : SA007140B10

BOM : SA014100310
S1_RST
1
R649
2
R650
1
R651
1
R652
1
R653
2
PCMCIA@
1
PCMCIA@
2
PCMCIA@
2
PCMCIA@
2
PCMCIA@
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
4
+S1_VCC
CB1410 P/N: SA014100310
Issued Date
Compal Secret Data
0.1U_0402_16V4Z
PCMCIA@
2006/08/04
2006/10/06
Deciphered Date
A
+S1_VPP
5V
5V
R640
10K_0402_5%
PCMCIA@
0.1U_0402_16V4Z
PCMCIA@
S1_CE2#
0.1U_0402_16V4Z
PCMCIA@
1
1
C721
C722
C709
10U_0805_10V4Z
PCMCIA@ 2
40mil
10
SHDN
S1_CE1#
+3VS
5
C707
6
0.1U_0402_16V4Z
2 PCMCIA@
W=40mil
C708
1
2
R638 PCMCIA@ 10K_0402_5%
1
2
R639 PCMCIA@ 10K_0402_5%
1
VPP
+3VS
10P_0402_50V8K
PCMCIA@ 1
CB1410BFB0 LFBGA 144P

PCMCIA@
D3
H2
L4
M8
K11
F12
C10
B6
+S1_VCC
1
SD/MMC/MS/SM
1
R646 @
10U_0805_10V4Z
PCMCIA@ 2
+3VS
+3VS
VCCD1#
13
12
11
40mil
GND
CBE3#
CBE2#
CBE1#
CBE0#
12V
E1
J3
N1
N5
PCI_RST#
<20,24,28,33,34,36,41> PCI_RST#
<20,28> PCI_FRAME#
<20,28> PCI_IRDY#
<20,28> PCI_TRDY#
<20,28> PCI_DEVSEL#
<20,28> PCI_STOP#
<20,28> PCI_PERR#
<20,28> PCI_SERR#
<20,28> PCI_PAR
<20> PCI_REQ#2
<20> PCI_GNT#2
<16> CLK_PCI_PCM
+3VS
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
VCC
VCC
VCC
16
CLK_PCI_PCM
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
VCCD0#
40mil
U43
+S1_VCC
PCMCIA Power Control
PCI_CBE#[0..3]
C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8
CARDBUS
PCI_AD[0..31]
<20,28> PCI_AD[0..31]
<20,28> PCI_CBE#[0..3]
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
+5VS
PCI Interface
A7
G13
M12
N12
VPPD1
VPPD0
VCCD1#
VCCD0#
M13
N13
VPPD0
VPPD1
VCCD0#
VCCD1#
U44
Title
PCMCIA_ENE CB1410
Custom IFTXX LA-3541P
Date:
G
Rev
0.1
Sheet
26
H
of
53
Title
<Title>
Size
A
Date:
5
Document Number
<Doc>
2
Rev
<RevCode>
Sheet
27
of
1
53
+3VS
115
116
2
@ 0_0402_5%
12/1 Modified
AGND
AGND
AGND
AGND
AGND
97
MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
80
79
78
77
76
75
74
73
88
84
82
81
93
90
91
89
92
87
85
83
SDCD#_XDCD0#
MSCD#_XDCD1
MSEN
XDEN
58
55
MSEN
XDEN
XI
XO
94
95
R5C832XI
R5C832XO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
SERIRQ
<22,26,29,34,36,41>
PAD
T4
PAD
T5
833@
C269
1
C256
10U_0805_10V4Z
C255
0.01U_0402_16V7K
C254
0.1U_0402_16V4Z
C253
0.01U_0402_16V7K
MSCCLK
MDIO10
SDCDAT0
MMCDAT
MSCDAT0
MDIO11
SDCDAT1
MSCDAT1
MDIO12
SDCDAT2
MSCDAT2
MDIO13
SDCDAT3
MSCDAT3
MDIO15
MDIO16
MDIO17
MDIO18
UDIO3
UDIO4
MSEN
Pull-up
Pull-up
Pull-up
XDEN
Pull-low
Function
Enable
SD,MS,MMC Card
Layout Note: Place close to R5C832

and Shield GND for SD_CLK
X3
R208
R209
R210
R211
XDEN
R213 1 833@
833@
R5C832XO
2
833@
18P_0402_50V8J
R217 2
SDDATA1_MSDATA1
12/1 Modified from 15P to 18P
Q27
2N7002_SOT23
@
SDDATA2_MSDATA2
+3VS
+VCC_3IN1
R656
833@
100K_0402_5%
C273
10U_0805_10V4Z
GND
RT9701-PB_SOT23-5
833@
VIN
VOUT
VIN/CE VOUT
10K_0402_5%
10K_0402_5%
10K_0402_5%
100K_0402_5%
2 10K_0402_5%
SD_MSDATA1
3
833@ R219 2
1 0_0402_5%
833@
SD_MSDATA2
SD_MSDATA1 <29>
SD_MSDATA2 <29>
1
R221
1
5
2
2
2
2
+5VS
U48
833@
833@
833@
833@
1 0_0402_5%
Q28
2N7002_SOT23
@
3
4
1
1
1
1
Solve MS Duo Adaptor short problem
40mil
0.1U_0402_16V4Z
833@ 2
MSEN
UDIO3
UDIO4
UDIO5
24.576MHz_16P_1BG24576CKIA
C271
1
833@
C272
1U_0603_10V4Z
1
2
MSBS
MMCCLK
R5C832XI
2
833@
18P_0402_50V8J
Layout Note: Shield GND for

CBS_CCLK_INTERNAL and CBS_CCLK
4
13
22
28
54
62
63
68
118
122
R224
5.1K_0603_1%
C276
270P_0402_50V7K
MMCCMD
1
833@
1
833@
2
@ 10K_0402_5%
SDCD#_XDCD0#
2
G
Q30
2N7002_SOT23
@
833@
833@
2
1
833@
100K_0402_5%
833@
R227
56.2_0603_1%
2
1
1
2
L20
R226
56.2_0603_1%
1
2
1
833@
SDCCMD
SDCCLK
1
2
C268
833@ 0.01U_0402_16V7K
SERIRQ
TP_UDIO1
TP_UDIO2
UDIO3
UDIO4
UDIO5
Z3008
C277
4.7P_0402_50V8C
1 @
1
833@
MDIO08
MDIO09
833@
R228
1
833@

and Shield GND for SDCLK_MSCLK
and Shield GND for FIL0,REXT,VREF
SDPWR0_MSPWR_XDPWR
+3VS
10_0402_5%
@
1
833@
MSEXTCK
Function set pin define
Layout Note: C268,C270,R125 Place close to R5C832
C275
R225
MSLED#
+3VS
CLK_PCI_1394
MMCLED#
MDIO14
SDCMD_MSBS <29>
SDCLK_MSCLK <29>
SDDATA0_MSDATA0 <29>
+VCC_3IN1
SDLED#
MSWR
MDIO19
SDCMD_MSBS
SDCLK_MSCLK
SDDATA0_MSDATA0
SDDATA1_MSDATA1
SDDATA2_MSDATA2
SDDATA3_MSDATA3
R5C832_TQFP128~D
832@
C267
1000P_0402_50V7K
SDWP#_XDRB# <29>
C266
1000P_0402_50V7K
SDWP#_XDRB#
SDPWR0_MSPWR_XDPWR
C265
0.1U_0402_16V4Z
833@
SDCD#_XDCD0# <29>
MSCD#_XDCD1 <29>
C264
0.1U_0402_16V4Z
BLM21A601SPT_0805
833@
MDIO06
MMCPWR
2
C263
22U_0805_6.3V6M
+3VS
SDPWR1
MDIO07
+3V_PHY
WCM2012F2SF-121T04_0805
@
833@
R229
R230
R231
R232
CBS_GRST#
1
1
1
1
833@
833@
833@
833@
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1
833@
C280
0.33U_0603_16V4Z
C279
0.01U_0402_16V7K
2
1
833@
R234
56.2_0603_1%
2
833@
R233
56.2_0603_1%
L21
1U_0603_10V4Z
833@
12/22 Change from 10u_1206 to 10u_0805

IEEE1394TPA+/- and IEEE1394TPB+/Same Wire Length
JP25
IEEE1394_TPBN0
IEEE1394_TPBP0
IEEE1394_TPAN0
IEEE1394_TPAP0
C278
A
L19
96
101
100
72
60
56
65
59
57
C260
0.47U_0603_16V4Z
IEEE1394_TPBP0
IEEE1394_TPBN0
C259
0.47U_0603_16V4Z
105
104
C258
0.01U_0402_16V7K
TPBP0
TPBN0
C257
0.01U_0402_16V7K
IEEE1394_TPAP0
IEEE1394_TPAN0
C262
10U_0805_10V4Z
109
108
UDIO0/SERIRQ#
UDIO1
UDIO2
UDIO3
UDIO4
UDIO5
HWSPND#
TEST
111
107
103
102
99
TPAP0
TPAN0
FIL0
REXT
VREF
INTA#
INTB#
69
66
IEEE1394_TPBIAS0
SDPWR0
MDIO05
1
R218
SUSP#
PCICLK
PCIRST#
GBRST#
CLKRUN#
PME#
113
SDWP#
MDIO04
2 0_0402_5%
R5_PME#
121
119
71
117
70
TPBIAS0
1
833@
MDIO03
CBS_GRST#
2 10K_0402_5%
1
2
R216 833@10K_0402_5%
+3VS
<17,33,34,41,43,48,49,50>
R214 1 833@
<34>
R5_PME#
<20> PCI_PIRQG#
<20> PCI_PIRQH#
REQ#
GNT#
1
833@
1
833@
R212 1
124
123
86
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
MSCD#
2
G
<16> CLK_PCI_1394
<20,24,26,33,34,36,41> PCI_RST#
<22,29,34,41> PM_CLKRUN#
PCI_REQ#0
PCI_GNT#0
<20> PCI_REQ#0
<20> PCI_GNT#0
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
+3VS
1
833@
1
833@
Layout Note: Shield GND for CLK_PCI_1394
33
23
25
24
29
26
8
30
31
67
1
833@
1
833@
1
2
R207 100_0402_5%
<20,26> PCI_PERR#
<20,26> PCI_SERR#
PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#
CBS_IDSEL
PCI_PERR#
PCI_SERR#
C/BE3#
C/BE2#
C/BE1#
C/BE0#
1
833@
1
833@
C274
0.1U_0402_16V4Z
7
21
35
45
1
833@
+3V_PHY
MS Card
PIN Name
MDIO02
16
34
64
114
120
98
106
110
112
MMC Card
PIN Name
MMCCD#
MDIO01
+3VS
833@
PCI_AD22
PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
61
SD Card
PIN Name
SDCD#
MDIO
PIN Name
MDIO00
12/15 Modified 10u X6S to Y5V
<20,26>
<20,26>
<20,26>
<20,26>
<20,26>
<20,26>
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
1
833@
R215
10K_0603_1%
<20,26>
<20,26>
<20,26>
<20,26>
VCC_3V
VCC_MD3V
1
833@
1/22 Change U23 R5C833 from

SA00001HX00 ES2 sample to
SA00001HX10 ES3
VCC_RIN
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
10
20
27
32
41
128
833@
R5C832
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
C270
0.01U_0402_16V7K
R5C833
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C261
0.01U_0402_16V7K
U23
125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
C252
10U_0805_10V4Z
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C251
0.01U_0402_16V7K
U23
<20,26> PCI_AD[0..31]
SD,MMC,MS muti-function pin define
2
G
1
2
3
4
TPBTPB+
TPATPA+
GND
GND
GND
GND
5
6
7
8
SUYIN_020115FB004S512ZL
ME@
Layout Note: Shield GND for

IEEE1394_TPA and TPB
WCM2012F2SF-121T04_0805
@
1
833@
IEEE1394_TPBIAS0
12/22 Change from X5R to Y5V

Compal Secret Data
Issued Date
2006/08/04
Deciphered Date
2006/10/06
5
Title

1394+3 in 1 Card

Custom XXXXX LA-3541P
Date:
Rev
0.1
Monday, February 12, 2007
Sheet
1
28
of
53
3 in 1 Card Reader
D
JP24
<28>
<28>
<28>
<28>
<28>
<28>
<28>
<28>
+VCC_3IN1
SDDATA0_MSDATA0
SD_MSDATA1
SD_MSDATA2
SDDATA3_MSDATA3
SDCLK_MSCLK
SDWP#_XDRB#
SDCMD_MSBS
SDCD#_XDCD0#
SDDATA0_MSDATA0
SD_MSDATA1
SD_MSDATA2
SDDATA3_MSDATA3
SDCLK_MSCLK R198 1
SDWP#_XDRB#
SDCMD_MSBS
SDCD#_XDCD0#
2 22_0402_5%
SDCLK
2 22_0402_5%
MSCLK
SDDATA1_MSDATA1
<28> SDDATA1_MSDATA1
SDCLK_MSCLK R199 1
MSCD#_XDCD1
SDDATA0_MSDATA0
SDCMD_MSBS
SDDATA3_MSDATA3
SDDATA2_MSDATA2
<28> MSCD#_XDCD1
<28> SDDATA2_MSDATA2
6
9
10
2
3
7
11
4
1
5
8
VDD_SD
DAT0_SD
DAT1_SD
DAT2_SD
CD/DAT3_SD
CLK_SD
WP_SD
CMD_SD
CD_SD
VSS_SD
VSS_SD
19
13
14
16
18
20
15
17
21
12
22
23
VCC_MS
VCC_MS
SCLK_MS
INS_MS
SDIO_MS
BS_MS
RESERVED_MS
RESERVED_MS
VSS_MS
VSS_MS
GND
GND
PROCO_MDR019-C0-1202
ME@
12/15 Add. Place close to U22 and JP47
For A30
+3VS
+3VALW
TPM 1.2
+3VS
2
TPM Conn. For C38
C772
0.1U_0402_16V4Z
26
23
20
17
21
22
16
27
15
7
5
LPCPD#
TESTB1/BADD
TEST1
28
9
8
XTALO
XTALI
14
13
TPM_XTALO
TPM_XTALI
TPM
SLB 9635 TT 1.1
LCLK
LFRAME#
GPIO2
LRESET#
GPIO
SERIRQ
CLKRUN#
PP
NC
NC
NC
4
11
18
25
GND
GND
GND
GND
CLK_PCI_TPM
<16> CLK_PCI_TPM
LPC_FRAME#
<21,34,36,41> LPC_FRAME#
PLT_RST_BUF#
<8,17,20,30,32,41> PLT_RST_BUF#
SERIRQ
<22,26,28,34,36,41> SERIRQ
PM_CLKRUN#
<22,28,34,41> PM_CLKRUN#
1
2
+3VS
R204
TPM@ 4.7K_0402_5%
LAD0
LAD1
LAD2
LAD3
TPM_TEST1
0 = 02Eh
* 1 = 04Eh
SUS_STAT# <22,41>
R202 1
+3VS
0_0402_5%
JP47
R203
4.7K_0402_5%
@
2
6
SUS_STAT#
SERIRQ
TPM_TEST1
PLT_RST_BUF#
PM_CLKRUN#
R206
TPM@
10M_0402_5%
2
1
2
1
C249
@ 15P_0402_50V8J
LPC_AD0
LPC_AD1
LPC_FRAME#
CLK_PCI_TPM
LPC_AD2
LPC_AD3
SLB-9635-TT-1.2_TSSOP28
TPM@
C248
TPM@
15P_0402_50V8J
2
4
6
8
10
12
14
16
18
20
ACES_88019-2000
ME@
+3VS
TPM_XTALI
1
3
5
7
9
11
13
15
17
19
1
3
12
CLK_PCI_TPM
R205
@ 10_0402_5%
+3VS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
R201
4.7K_0402_5%
TPM@
Base I/O Address

SUS_STAT#
<21,34,36,41>
<21,34,36,41>
<21,34,36,41>
<21,34,36,41>
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
VDD
VDD
VDD
U22
VSB
24
19
10
+3VS
X2
1
IN
NC
OUT
NC
C739
10U_0805_10V4Z
2 @
TPM@ 32.768KHZ_12.5P_1TJS125BJ2A251
TPM_XTALO
C250
TPM@
15P_0402_50V8J
Place this cap close to pin 6 and pin 9

12/1 Modified C248 and C250 from 18P to 15P
12/15 Modified C739 to @
Compal Secret Data
2006/08/04
Issued Date
2006/10/06
Deciphered Date
5
Title

INDICATE LED

Date:
Rev
0.1
Sheet
1
29
of
53
Layout Notice : Place as close

chip as possible.
Layout Notice : 1.2V filter. Place as close

chip as possible.
+1.2V_LAN
+3V_LAN
+3VALW
U20
<34>
C220
C775
U20
close to pins 38, 45, and 52

+LAN_AVDD
2
C222
0.1U_0402_16V4Z
<16> CLK_PCIE_LAN#
C223
<16> CLK_PCIE_LAN
0.1U_0402_16V4Z
R177 1
+LAN_BIASVDD
1
C226
2 10K_0402_5%
28
PCIE_REFCLK_N
29
PCIE_REFCLK_P
11
CLKREQ
TRD0_N
TRD0_P
TRD1_N
TRD1_P
TRD2_N
TRD2_P
TRD3_N
TRD3_P
+3VS
0.1U_0402_16V4Z
R179
+3VS
(CLKREQ#) and (ENERGY_DET) are

only supported in BCM5787M
R180
+3V_LAN
R183
2
@ 1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
1
1
4.7U_0805_6.3V6K
L16
2
1
FBM-L11-160808-601LMT_0603 2
C233
4.7U_0805_6.3V6K
L17
2
1
FBM-L11-160808-601LMT_0603 2
C237
4.7U_0805_6.3V6K
L18
2
1
FBM-L11-160808-601LMT_0603 1
C239
4.7U_0805_6.3V6K
+GPHY_PLLVDD
+AVDDL
2
<22> PCIE_ITX_C_PRX_N2
C230
<22> PCIE_ITX_C_PRX_P2
0.1U_0402_16V4Z
C231 1
0.1U_0402_10V7K
C232 1
0.1U_0402_10V7K
<22> PCIE_PTX_C_IRX_N2
PCIE_MRX_C_LTX_N2
PCIE_MRX_C_LTX_P2
VMAIN_PRSNT
54
VAUX_PRSNT
59
ENERGY_DET
35
GPHY_PLLVDD
32
PCIE_RXD_N
31
PCIE_RXD_P
25
PCIE_TXD_N
PCIE_TXD_P
<8,17,20,29,32,41> PLT_RST_BUF#
10
PERST
12
WAKE
C219
0.1U_0402_16V4Z
C218
0.1U_0402_16V4Z
C217
0.1U_0402_16V4Z
C216
0.1U_0402_16V4Z
1
D
C234
0.1U_0402_16V4Z
+PCIE_PLLVDD
2
C238
Change R311,R312 from 4.7k to 47k
+3V_LAN
R186 1
2 @ 47K_0402_5%
58
SMB_CLK
+3V_LAN
R187 1
2 @ 47K_0402_5%
57
SMB_DATA
SCLK(EECLK)
SI
SO(EEDATA)
CS
1
R189
1
R190
+PCIE_VDD
2
C240
2
@ 4.7K_0402_5%
2
@ 4.7K_0402_5%
0.1U_0402_16V4Z
+3V_LAN
1
R191
REGCTL12
REGCTL25
RDAC
+2.5V_LAN
5
13
20
34
55
60
+1.2V_LAN
BIASVDD
PCIE_PLLVDD
PCIE_VDD
PCIE_VDD
36
30
27
33
AVDD
AVDD
AVDD
38
45
52
+LAN_AVDD
AVDDL
AVDDL
AVDDL
AVDDL
39
44
46
51
+AVDDL
GPIO2
GPIO_2
PCIE_GND
27P_0402_50V8J
5906@
25MHZ_20PF_6X25000017
GND
24
10U_0805_10V4Z
+3V_LAN
9/14 change from

1.24K to 1K (By
broadcom James)
1
2
C235
0.1U_0402_16V4Z
1
2
C236
4.7U_0805_10V4Z
Q26
MBT35200MT1G_TSOP6
CTL25
+LAN_BIASVDD
+2.5V_LAN
+PCIE_PLLVDD
+PCIE_VDD
B
Notice : 4.7u 6.3V

capactor Thickness
1.25mm
Layout Notice : Filter

place as close chip
as possible.
69
XTALI
C228
0.1U_0402_16V4Z
REG_GND
C246
22U_0805_6.3V6M
XTALO
16
5787@
C245
22
XTALO
Y1
C241
XTALI
1.24K_0402_1%
C244
1
200_0603_1%
Q25
MMJT9435T1G_SOT223
0.1U_0402_16V4Z
XTALO
2
R192
CTL12
CTL25
2
1K_0402_5%
5906@
VDDP
VDDP
GPIO_1(SERIAL_DI)
21
14
18
37
1
R185
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
No CIS Symbol
CTL12
C227
17
68
GPIO_0(SERIAL_DO)
UART_MODE
12/25 remove R178, short directly
R185
+XTALVDD
+3V_LAN
XTALI
2 4.7U_0805_10V4Z
+1.2V_LAN
LAN_CLK
SI
LAN_DATA
CS#
65
63
64
62
2 0.1U_0402_16V4Z
C225 1
LINKLED# <31>
ACTIVITY# <31>
23
6
15
19
56
61
0_0402_5%
0_0402_5%
0_0402_5%
2
2
2
XTALVDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
2
0_0402_5%
LAN_WP
2
@ 0_0402_5%
2 R181 1
1 R182 1
67 R184 1
66
C224 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
R188
+3V_LAN
LAN_TX0- <31>
LAN_TX0+ <31>
LAN_RX1- <31>
LAN_RX1+ <31>
LAN_TX2- <31>
LAN_TX2+ <31>
LAN_TX3- <31>
LAN_TX3+ <31>
12/19 change from @ to mount

LINKLED
SPD100LED
SPD1000LED
TRAFFICLED
+GPHY_PLLVDD
2
LAN_TX0LAN_TX0+
LAN_RX1LAN_RX1+
LAN_TX2LAN_TX2+
LAN_TX3LAN_TX3+
LOW PWR
53
26
<22> PCIE_PTX_C_IRX_P2
41
40
42
43
48
47
49
50
L15
2
1
FBM-L11-160808-601LMT_0603 2
C229
5787 is already A2 version
+1.2V_LAN
C
0.1U_0402_16V4Z
12/26 change 5906 pn to SA00001I010 (A2)
0.1U_0402_16V4Z
L14
2
1
FBM-L11-160808-601LMT_0603
1
2
5
6
C221
0.1U_0402_16V4Z
1
L13
2
1
FBM-L11-160808-601LMT_0603
EN_WOL
+XTALVDD
2
2
4
L12
2
1
FBM-L11-160808-601LMT_0603
C215
0.1U_0402_16V4Z
C214
0.1U_0402_16V4Z
5787@
C213
0.1U_0402_16V4Z
5787M
C212
0.1U_0402_16V4Z
C211
0.1U_0402_16V4Z
C210
4.7U_0805_6.3V6K
C206
0.1U_0402_16V4Z
C205
0.1U_0402_16V4Z
C204
0.1U_0402_16V4Z
+2.5V_LAN
C203
0.1U_0402_16V4Z
6
5
Q59
2
@
1
SI3456BDV-T1-E3_TSOP6
Layout Notice : Filter place as close

chip as possible.
C202
4.7U_0805_10V4Z
L11 1
2
KC FBM-L11-201209-221LMAT_0805
C242
27P_0402_50V8J
+3V_LAN
LAN_CLK
R194
4.7K_0402_5%
SI
R193
4.7K_0402_5%
C243
0.1U_0402_16V4Z
CS#
U21
8
7
6
5
LAN_WP
LAN_CLK
LAN_DATA
A
VCC
WP
SCL
SDA
A0
A1
NC
GND
1
2
3
4
1
R195
2
R196
1
R197
4.7K_0402_5%
1
5787@
2
5787@
4.7K_0402_5%
4.7K_0402_5%
AT24C02_SO8
Compal Secret Data
Issued Date
2006/08/04
2006/10/06
Deciphered Date
Title
BCM5787MKML
2

Custom
Date:
Rev
0.1
XXXXX LA-3541P
Sheet

1
30
of
53
+2.5V_LAN
12/27 Change L10 to SM010032020

1
12/27 Add R815

L10
R815
MBK1608121YZF_0603
@
0_0603_5%
Change T2 from SP050002130 to SP050002140

2
C189 1
T2
2 0.1U_0402_16V4Z
C190 1
C191 1
C192 1
<30>
LAN_TX0+
<30>
LAN_TX0-
TCT1
LAN_TX0+ 2
TD1+
LAN_TX0-
LAN_RX1+
<30>
LAN_RX1-
2 0.1U_0402_16V4Z
5787@
LAN_TX2+
<30>
LAN_TX2-
TCT
24
MCT0
MX1+
23
MDO0+
TD1-
MX1-
22
MDO0-
TCT2
MCT2
21
MCT1
LAN_RX1+
TD21+
MX2+
20
MDO1+
LAN_RX1-
TD2-
MX2-
19
MDO1-
TCT3
MCT3
18
LAN_TX2+ 8
TD3+
MX3+
17
MDO2+
MDO2-
2 0.1U_0402_16V4Z
5787@
<30>
MCT1
2 0.1U_0402_16V4Z
<30>
1:1
LAN_TX2-
1:1
1:1
TD3-
MX3-
16
10
TCT4
MCT4
15
TD4+
MX4+
14
MDO3+
MX4-
13
MDO3-
<30>
LAN_TX3+
LAN_TX3+ 11
<30>
LAN_TX3-
LAN_TX3- 12
1:1
TD4-
1 R163
2
75_0402_5%
2
75_0402_5%
1 R164
2
75_0402_5%
1 R165
5787@
2
75_0402_5%
1 R166
5787@
RJ45_PR
350u_24HST1041A-3-LF
5787@
T3
LAN_TX0+
LAN_TX0TCT
TCT
LAN_RX1+
LAN_RX1-
1
2
3
4
5
6
7
8
RD+
RDCT
NC
NC
CT
TD+
TD-
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
MDO0+
MDO0MCT0
Lan Conn.
MCT1
MDO1+
MDO1-
350uH_NS0013LF
5906@
2
C193
<30> ACTIVITY#
ACTIVITY#
1
R167
JP23
1
68P_0402_50V8K
+3V_LAN
2
300_0402_5%
10mil
Change T1 from SP050001210 to SP050001210

Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF
B
LAN_TX3- 2
R168
LAN_TX3+ 2
R169
1
@ 49.9_0402_1%
1
@ 49.9_0402_1%
C194
1
2@ 0.1U_0402_16V4Z
<30> LINKLED#
LINKLED#
1
@ 49.9_0402_1%
1
@ 49.9_0402_1%
C196
1
2@ 0.1U_0402_16V4Z
LAN_RX1- 2
1
R173 5906@ 49.9_0402_1%
LAN_RX1+ 2
1
R174 5906@ 49.9_0402_1%
C200
1
2 0.1U_0402_16V4Z
5906@
LAN_TX0- 2
1
R175 5906@ 49.9_0402_1%
LAN_TX0+ 2
1
R176 5906@ 49.9_0402_1%
C201
1
2 0.1U_0402_16V4Z
5906@
2
C195
PR4-
MDO3+
PR4+
MDO1-
PR2-
MDO2-
PR3-
MDO2+
PR3+
MDO1+
PR2+
MDO0-
PR1-
MDO0+
PR1+
1
68P_0402_50V8K
RJ45_PR
near LAN controller
16
SHLD1
15
10
Green LED-
Green LED+
SHLD2
14
SHLD1
13
TYCO_3-440470-4
ME@
C197
LANGND
0.1U_0402_16V4Z
1
2
1
1
1000P_1206_2KV7K
C198
C199
4.7U_0805_10V4Z
2
2
Compal Secret Data
2006/08/04
2006/10/06
Deciphered Date
4
SHLD2
Issued Date
Amber LED-
+3V_LAN
LAN_TX22
R171
LAN_TX2+ 2
R172
Amber LED+
11
MDO3-
210mil
300_0402_5%
1
R170
12
Title

LAN CONTROLLER

Date:
Rev
0.1
Sheet

1
31
of
53
NAND mini Card(Robson support)

+3VS
Mini-Express Card for 3G Or TV Tuner
+1.5VS
+3VS
1
1
1
C175
0.01U_0402_16V7K
2 ROBSON@
C176
0.1U_0402_16V4Z
2 ROBSON@
C177
4.7U_0805_10V4Z
2 ROBSON@
C178
4.7U_0805_10V4Z
2 ROBSON@
C179
0.01U_0402_16V7K
2 ROBSON@
C180
+1.5VS
C169
4.7U_0805_10V4Z
C170
0.1U_0402_16V4Z
+3VALW
C171
4.7U_0805_10V4Z
C172
0.1U_0402_16V4Z
C173
0.1U_0402_16V4Z
C174
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2 ROBSON@
JP19
+3VS
3G_CLKREQ#
2
10K_0402_5%
<16> CLK_PCIE_3G#
<16> CLK_PCIE_3G
+3VS
+1.5VS
JP20
<16> CLK_PCIE_NAND#
<16> CLK_PCIE_NAND
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
PLT_RST_BUF#
PLT_RST_BUF# <8,17,20,29,30,41>
2005/09/27 modified.
Base on OPTION GTM351E Datasheet Rev0.1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
+3VS
+1.5VS
MINI2_OFF#
PLT_RST_BUF#
+3VALW
ICH_SMBCLK
ICH_SMBDATA
USB20_N1 <22>
USB20_P1 <22>
(WWAN_LED#)
+3VS
53
GND1
R737
2
Vcc 3.3V +/- 8%

Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA
10K_0402_5%
FOX_AS0B226-S56N-7F
ME@
MINI2_OFF#
1
ROBSON@
1
2 ROB_CLKREQ#
R660
10K_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
D
Q50
2N7002_SOT23
2
G
3G_ON#
3G_ON#
<34>
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
R661
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
ICH_PCIE_WAKE#
FOX_AS0B226-S56N-7F
ME@
Mini-Express Card for WLAN

+3VS
L60
53
GND1
C182
0.1U_0402_16V4Z
C183
4.7U_0805_10V4Z
C184
R162
R726
ICH_SMBCLK <16,22,33>
ICH_SMBDATA <16,22,33>
KILL_SW#
10K_0402_5%
USB20_N3 <22>
USB20_P3 <22>
KILL_SW# <34,37>
WLAN_LED# <37,42>
Q49
2N7002_SOT23
2
G
RF_ON#
RF_ON#
4
5
WLAN_LED#
<34>
SW2
1BS003-1210L_3P
14W@
R725
C185
0.1U_0402_16V4Z
2
100K_0402_5%
+5VS
+3VALW
C186
4.7U_0805_10V4Z
0.1U_0402_16V4Z
12/19 Change SW2 to correct symbol (by EMI)
Compal Secret Data
2006/08/05
2007/08/05
Deciphered Date
B
100K_0402_5%
14W@
MINI_RF_OFF#
Issued Date
ICH_SMBCLK
ICH_SMBDATA
+3VALW
+1.5VS
0.01U_0402_16V7K
+3VALW
2
MINI_RF_OFF#
PLT_RST_BUF#
+3VS
C181
D23
DAN217_SC59
@
+3VS
C187
0.01U_0402_16V7K
+3VALW
12/13 Add
FOX_AS0B226-S56N-7F
ME@
12/28 modified to @
G1
G2
54
Kill SWITCH
1
2
3
GND2
KC FBM-L11-201209-221LMAT_0805
1
2
3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
<16> CLK_PCIE_WLAN#
<16> CLK_PCIE_WLAN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
<36> WLAN_ACTIVE
<36> BT_ACTIVE
<16> WLAN_CLKREQ#
MINI_VCC
+1.5VS
***
JP22
ICH_PCIE_WAKE#
WLAN_ACTIVE
BT_ACTIVE
WLAN_CLKREQ#
Title

Mini-Card/3G/FeliCa/FP
Size
Document Number
Rev
0.1
LA-3541P
Date:
Sheet

E
32
of
53
New Card Socket (Left/TOP)
New Card Power Switch
JP15
U16
7
8
Aux_out
20
11
OC#
23
RCLKEN
PERST#
22
9
C148
RCLKEN1
PERST1#
+3VS
+3VS
C154
10U_0805_10V4Z
2 NEWCARD@
C155
10U_0805_10V4Z
2 NEWCARD@
10K_0402_5%
NEWCARD@
C156
10K_0402_5%
NEWCARD@
Update Footprint
CLKREQ1#
RCLKEN1 2
G
10U_0805_10V4Z
2 NEWCARD@
C151
C152
1
+1.5VS_CARD1
PERST1#
CLKREQ1#
CP_PE#
<22>
CP_PE#
<16> CLK_PCIE_EXP#
<16> CLK_PCIE_EXP
1
+1.5VS
+3VS
R153
TPS2231PWPR_PWP24
NEWCARD@
C150
CP_USB#
+3VS_CARD1
+3VALW
C149
USB20_N2
USB20_P2
+3VALW_CARD1
R154
+3VS
<22>
<22>
Imax = 0.75A
10U_0805_10V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
2
NEWCARD@ 2
NEWCARD@ 2
NEWCARD@ 2
NEWCARD@ 2
NEWCARD@ 2 NEWCARD@
+1.5VS_CARD1
Q21
2N7002_SOT23
NEWCARD@
C153
0.1U_0402_16V4Z
2 NEWCARD@
CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#
1.5Vout1
1.5Vout2
C147
+1.5VS_CARD1
Imax = 1.35A
U17
G Vcc
14
15
4
3
2
GND
1.5Vin1
1.5Vin2
16
17
+3VALW_CARD1
40mil
+3VS_CARD1
Imax = 0.275A
NC1
NC2
NC3
NC4
NC5
NEWCARD@
2 100K_0402_5% CP_USB#
2 100K_0402_5% CP_PE#
SUSP#
NEWCARD@
SYSON
PCI_RST#
R151 1
R152 1
<17,28,34,41,43,48,49,50> SUSP#
<34,43,48> SYSON
<20,24,26,28,34,36,41> PCI_RST#
+3VALW
18
19
1
10
12
13
24
+1.5VS
40mil
+3VALW_CARD1
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
27
28
EXP_CLKREQ# <16>
GND
GND
FOX_1CH4110C_LT
NEWCARD@
NEWCARD@
3.3Vaux_in
+3VS_CARD1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
3.3Vout1
3.3Vout2
21
+3VALW
3.3Vin1
3.3Vin2
5
6
+3VS
60mils
12/7 Let pin 28 dummy by EMI request
Update Footprint
(NEW)
12/13 Let pin 27 dummy by layout request
12/27 change JP 15 footprint to FOX_1CX41201_26P_LT-S

2
USB CONN. 1
USB CONN. 2
+USB_VCCA
+USB_VCCB
W=80mils
+USB_VCCA
+
W=80mils
+USB_VCCB
1
1
C158
150U_D_6.3VM
2 HS@
C160
470P_0402_50V7K
2 HS@
C159
2
150U_D_6.3VM
C161
470P_0402_50V7K
JP16
USB20_N0
USB20_P0
<22> USB20_N0
<22> USB20_P0
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
JP17
USB20_N6
USB20_P6
<22> USB20_N6
<22> USB20_P6
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G565ZR
ME@
ME@
D21
1
USB20_P0
D22
GND
I/O
VCC
I/O
+USB_VCCA
+USB_VCCA
+USB_VCCB
USB20_N0
USB20_P6
1
R794
@ PRTR5V0U2X_SOT143
2
A30@ 0_1206_5%
GND
I/O
VCC
I/O
+USB_VCCB
USB20_N6
@ PRTR5V0U2X_SOT143
SUYIN_020173MR004G533ZR_4P
SUYIN_020173MR004G533ZR_4P
12/19 Add
+5VALW
+USB_VCCA
+3VALW
+3VALW
+5VALW
R156
+USB_VCCB
C157
4.7U_0805_10V4Z
HS@ 2
G528_SO8
HS@
8
7
6
5
10K_0402_5%
1
2
3
4
USB_OC#0 <22>
1
C694
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
10K_0402_5%
8
7
6
5
USB_OC#6 <22>
G528_SO8
C162
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2 @
4
R157
U40
OUT
OUT
OUT
FLG
GND
IN
IN
EN#
U18
1
2
3
4
C163
0.1U_0402_16V4Z
2 @
<34> USB1_ON#
<34> USB2_ON#
9/17 modified this block
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
Title
NEW CARD & USB Connector

Size
B
Date:
Document Number
Rev
0

Sheet

E
33
of
53
+3VALW
+3VALW
12/25 Modified
1
R125
<20>
PCI_PME#
1
R127
2
@ 0_0402_5%
EC_PME#
2
R126
1
@ 4.7K_0402_5%
2
0_0402_5%
KSO[0..15]
1
R136
FRD#SPI_SO
2
@ 100K_0402_1%
1
R138
FSEL#SPICS#
2
@ 100K_0402_1%
1
R139
<35>
KSO[0..15]
<35>
KSI[0..7]
KSI[0..7]
+3VALW
<35> NOVO_BTN#
KSO17
2
@ 10K_0402_5%
<4,17>
<4,17>
<36,45>
<36,45>
2
R766
2
R770
2
R771
1
R814
DATA_GUEST
1
10K_0402_5%
CLK_GUEST
1
10K_0402_5%
ACK_GUEST
1
10K_0402_5%
SYNAPTICS@
EC_TX_P80_DATA
EC_RX_P80_CLK
PWR_LED#
NUM_LED#
CHARGE_LED0#
CHARGE_LED1#
CAPS_LED#
SCROLL_LED#
SYSON
EC_RSMRST#
BKOFF#
PM_SLP_S3#
EC_LID_OUT#
PM_SLP_S5#
EC_SMI#
BT_ON#
LID_SW#
SUSP#
PBTN_OUT#
EC_PME#
1
C771
+3VS
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
C142
1
R145
1
R146
EC DEBUG PORT
JP14
+3VALW
EC_TX_P80_DATA
EC_RX_P80_CLK
1
2
3
4
1
2
3
4
34
35
38
40
99
101
100
102
104
4
7
8
16
17
18
19
20
21
22
23
140
138
1
84
97
135
136
144
MB_ID
FSTCHG
FRD#SPI_SO
FWR#SPI_SI
FSEL#SPICS#
41
43
29
36
45
46
EC_ON
KILL_SW#
EC_THERM#
ON/OFF#
ICH_POK
RF_ON#
81
82
83
137
142
143
RCIRRX
ENBKL
ADP_I
VR_ON
SPI_CLK
ACIN
Address
BUS
SM BUS
EC ON/ GPIO1B
AC IN/ GPIO1C
ECTHERM#/GPIO11
ONOFF/GPIO18
PCMRST#/GPIO1E
WL OFF#/GPIO1F
XCLKO
XCLKI
C146
0.1U_0402_16V4Z
2 @
<36> SPI_CLK_R
<36> SPI_SI
SPI_CS#
1
R107
SPI_CLK_R 1
R108
SPI_SI
1
R109
FSEL#SPICS#
2
0_0402_5%
SPI_CLK
2
0_0402_5%
FWR#SPI_SI
2
0_0402_5%
ALI/MH#/GPIO40
FSTCHG/GPIO41
VR ON/ GPIO42
GPIO57/GPIO57
GPIO58/GPIO58
GPIO59/GPIO59
KB925QFA1 LQFP 144P
EC_ON
<37,46>
KILL_SW# <32,37>
EC_THERM# <22>
ON/OFF# <37>
ICH_POK <8,22>
RF_ON# <32>
C767
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
EMAIL_BTN#
2
R134
Q_CHARGE_15W#
2
R698
1
10K_0402_5%
1
10K_0402_5%
R732
P_USB_AUDIO#
R733
EC_MUTE#
TP_CLK
R135
TP_DATA
AD3_SMADID1_R
R809
EC_SMB_CK1
R810
AD2_SMADID0_R
R811
EC_SMB_DA1
R812
R747
10K_0402_5%
RCIRRX
ENBKL
<37>
<18>
VR_ON
<51>
C776
100P_0402_50V8J
1
10K_0402_5%
1
10K_0402_5%
2
@ 10K_0402_5%
AD3_SMADID1 <18>
0_0402_5%
2
@ 0_0402_5%
2
0_0402_5%
2
@ 0_0402_5%
+5VS
2
4.7K_0402_5%
2
4.7K_0402_5%
AD2_SMADID0 <18>
R143
XCLKO 1
2 XCLKI
@ 20M_0603_5%
C144
1
1
R131
R137
<22,44>
100P_0402_50V8J
100P_0402_50V8J
R128
WWW_USER_BTN# 2
R130
1
10K_0402_5%
1
10K_0402_5%
C145
X1
32.768KHZ_12.5PF_Q13MC14610002
0206 => Change EC part number to SA00001HZ20
12/18 Change EC part number to SA00001HZ10

From ver. A1 to B0
2/1 Update X1 to correct symbol

Compal Secret Data
2006/08/04
Issued Date
KB925 pin 139 is used for XCLKO, Pin 140 NC
Q_CHARGE_VIDEO#
FSTCHG <46>
FRD#SPI_SO <36>
C766
2
4.7K_0402_5%
+3VALW
RDB_SMMRSB <18>
WRB_PWRSB <18>
Q_CHARGE_LED# <35>
USB1_ON# <33>
MUTE_LED# <35>
POWER_USB_LED# <35>
USB2_ON# <33>
USB3_ON# <37>
USB4_ON# <37>
CAMERA_ON# <42>
MDC_ON# <42>
CHGSEL <46>
3G_ON# <32>
MUTE_LED1# <35,38>
ACIN
C787
1
R129
MUTE_BTN#
<30>
<46>
KB925 SPI STRAP PIN
KBA0
MUTE_BTN# <35>
WWW_USER_BTN# <35>
BATT_IN
EMAIL_BTN# <35>
Q_CHARGE_15W# <35>
P_USB_15W# <35>
Q_CHARGE_VIDEO# <35>
P_USB_AUDIO# <35>
ADP_I
C786
ITES_EN# <25>
ITES_ST <25>
CLK_GUEST <35>
DATA_GUEST <35>
TP_CLK <36>
TP_DATA <36>
EN_WOL
C785
+3VALW
100P_0402_50V8J
KB925 should use Data code 06361 which has fixed bonding issue
EN_WOL
AD3_SMADID1_R
AD2_SMADID0_R
RDB_SMMRSB
WRB_PWRSB
Q_CHARGE_LED#
USB1_ON#
MUTE_LED#
POWER_USB_LED#
USB2_ON#
USB3_ON#
USB4_ON#
CAMERA_ON#
MDC_ON#
CHGSEL
3G_ON#
MUTE_LED1#
INVT_PWM <18>
BEEP#
<38>
ACK_GUEST <35>
ACOFF
<44,46>
FAN_SPEED1 <4>
EAPD
<38,39>
100P_0402_50V8J
SELIO2#/ GPIO43
SELIO#/ GPIO50
FRD#/RD#
FWR#/WR#
FSEL#/SELMEM#
Data
BUS
C784
100P_0402_50V8J
MUTE_BTN#
WWW_USER_BTN#
BATT_IN
EMAIL_BTN#
Q_CHARGE_15W#
P_USB_15W#
Q_CHARGE_VIDEO#
P_USB_AUDIO#
KBA0
C783
100P_0402_50V8J
125
126
128
130
131
132
133
134
111
112
113
114
115
116
117
118
119
120
121
122
123
124
110
109
108
107
106
98
XCLKO
<36> SPI_CS#
2
2
75
ADB0/D0
ADB1/D1
ADB2/D2
ADB3/ D3
ADB4/D4
ADB5/D5
ADB6/D6
ADB7/D7
KBA0/A0
KBA1/A1
KBA2/A2
KBA3/A3
KBA4/A4
KBA5/A5
KBA6/A6
KBA7/A7
KBA8/A8
KBA9/A9
KBA10/A10
KBA11/A11
KBA12/A12
KBA13/A13
KBA14/A14
KBA15/A15
KBA16/A16
KBA17/A17
KBA18/A18
KBA19/A19
EC_RSMRST#/ GPIO02
BKOFF#/GPIO03
PM SLP S3#/GPIO04
EC LID OUT#/GPIO06
PM SLP S05#/ GPIO07
EC SMI#/GPIO08
EC SWI#/GPIO09
LID SW#/ GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC PME#/GPIO0D
ACES_85205-0400
ME@
ITES_EN#
ITES_ST
CLK_GUEST
DATA_GUEST
TP_CLK
TP_DATA
PCM_SPK#/EMAIL_LED#/ GPIO16
SB_SPKR/PWR_SUSP_LED#/ GPIO17
PWRLED#/ GPIO19
NUMLED#/ GPIO1A
BATT CHGI LED#/ E51CS#
BATT LOW LED#/ E51MR0
CAPS LED#/ E51TMR1
ARROW LED#/ E51 INT0
SYSON/GPIO56/ E51 INT1
C143
@ 100P_0402_50V8J
91
92
93
94
95
96
2
@ 100P_0402_50V8J
XCLKI
@ 100P_0402_50V8J
EC SMD2/ GPIO47/SDA2
EC SMC2/GPIO46/SCL2
EC SMD1/GPIO44/SDA1
EC SMC1/GPIO44/SCL1
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1
<22> EC_RSMRST#
<18> BKOFF#
<22> PM_SLP_S3#
<22> EC_LID_OUT#
<22> PM_SLP_S5#
<22> EC_SMI#
<36> BT_ON#
<37>
LID_SW#
<17,28,33,41,43,48,49,50> SUSP#
<22> PBTN_OUT#
ACK_GUEST
2
100K_0402_1%
CYPRESS@
88
87
86
85
2 KSO17
0_0402_5%
<14,15> EC_RX_P80_CLK
<35,37,42> PWR_LED#
<35> NUM_LED#
<37,42> CHARGE_LED0#
<35> CAPS_LED#
<35> SCROLL_LED#
<33,43,48> SYSON
+5VALW
R133
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
DAC_BRIG <18>
EN_FAN1 <4>
IREF
<46>
EC_MUTE# <39>
FAN/PWM
PS2 interface
15P_0402_50V8J
R5_PME#
key Matrix
scan
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
EC URXD/KSO16/GPIO48
EC UTXD/KSO17/GPIO49
INVT_PWM
BEEP#
ACK_GUEST
ACOFF
FAN_SPEED1
EAPD
ICH_POK
PBTN_OUT#
EN_FAN1
<28>
ISP MODE SUPPORT
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
89
90
25
27
30
31
32
33
C782
OSC
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
INVT_PWM/GPIO0F/PWM1
BEEP#/GPIO10/PWM2
OUT BEEP/GPIO12/PWM3
ACOFF/GPIO18/PWM4
FAN SPEED1/GPIO14/FANFB1
FAN SPEED2/GPIO15/FANFB2
ITES_VSENSE_X <25>
ITES_VSENSE_Y <25>
C781
NC
2
1
R124
10K_0402_5%
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPI032
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPI035
KSI6/GPIO36
KSI7/GPIO37
+3VALW
63
64
65
66
67
68
69
70
C780
3G_LED#
C779
OSC
<42>
DAC_BRIG
EN_FAN1
IREF
EC_MUTE#
NC
1
R122
1
R734
76
78
79
80
0.1U_0402_16V4Z
<22> EC_SCI#
<22,28,29,41> PM_CLKRUN#
DAC_BRIG/DA0/GPIO3D
EN DFAN1/DA1/GPIO3D
IREF2/DA2
EN DFAN2/DA3/ GPIO3F
DA output or GPO
PWR
BATT_TEMP <45>
15P_0402_50V8J
C141
<20,24,26,28,33,36,41> PCI_RST#
ECAGND
2
1
C139 0.01U_0402_16V7K
BATT_OVP <46>
2
47K_0402_5%
4.7K_0402_5%
H_14_B@
1
R120
BATT_TEMP
BATT_OVP
ITES_VSENSE_X
ITES_VSENSE_Y
139
129
103
13
28
39
+3VALW
R743
Ra
2
71
72
73
74
BATTEMP/AD0/GPIO38
BATT OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD BID0/AD3/GPIO3B
AD INtput or GPI
AGND
<16> CLK_PCI_EC
GA20/ GPIO00/GA20
KBRST#/GPIO01/KBRST#
SERIRQ
LPC_FRAME# / LFRAME#
LPC AD3/LAD3
LPC AD2/LAD2
Host
LPC AD1/LAD1 INTERFACE
LPC AD0/LAD0
CLK_PCI_EC/PCICLK
PCIRST#
EC RST#/ ECRST#
EC SCI#/SCI#/GPIO0E
PM_CLKRUN#/ CLKRUN#
77
1
10_0402_5%
1
2
3
5
6
9
10
12
14
15
42
24
44
ECAGND
2
R119@
@ 22P_0402_50V8J
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
CLK_PCI_EC
PCI_RST#
EC_RST#
EC_SCI#
2
@ 0_0402_5%
2
0_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
GND
GND
GND
GND
GND
GND
C140
2
1
C777
0.1U_0402_16V4Z
100P_0402_50V8J
U15
<21>
GATEA20
<21>
KB_RST#
<22,26,28,29,36,41> SERIRQ
<21,29,36,41> LPC_FRAME#
<21,29,36,41> LPC_AD3
<21,29,36,41> LPC_AD2
<21,29,36,41> LPC_AD1
<21,29,36,41> LPC_AD0
EC_RSMRST#
BEEP#
SYSON
EC_SCI#
EC_THERM#
SERIRQ
47K_0402_5%
RB@
MB_ID
EC_AVCC / AVCC
R740
Rb
11
26
37
105
127
141
C138
1000P_0402_50V7K
C137
1000P_0402_50V7K
C136
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
C134
0.1U_0402_16V4Z
C133
0.1U_0402_16V4Z
1
2
+EC_AVCC
FBM-11-160808-601-T_0603 2
1
C132
C131
0.1U_0402_16V4Z
1000P_0402_50V7K
1 ECAGND 2
1
2
L9
FBM-11-160808-601-T_0603
VCC/ EC VCC
VCC / EC VCC
VCC / EC VCC
VCC / EC VCC
VCC
VCC
+3VALW
100P_0402_50V8J
+EC_AVCC
L8
2006/10/06
Deciphered Date
3
Title

ENE-KB925

Custom
IEL10 LA-3451P
Date:
Rev
0.1
Sheet
1
34
of
53
INT_KBD Conn.
For IFT10
For IFL90
JP13
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
JP43
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
G1
G2
ACES_85201-2405N
ME@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
GND
GND
KSI[0..7]
For IFT00
KSI[0..7]
KSO[0..15]
<34>
KSO[0..15] <34>
JP44
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
GND
GND
27
26
ACES_88502-2501
ME@
27
26
KSI0
C106 1
100P_0402_50V8J
KSO4
C107 1
100P_0402_50V8J
KSI1
C109 1
100P_0402_50V8J
KSO5
C110 1
100P_0402_50V8J
KSI2
C111 1
100P_0402_50V8J
KSO6
C112 1
100P_0402_50V8J
KSI3
C113 1
100P_0402_50V8J
KSO7
C114 1
100P_0402_50V8J
KSI4
C115 1
100P_0402_50V8J
KSO8
C116 1
100P_0402_50V8J
KSI5
C117 1
100P_0402_50V8J
KSO9
C118 1
100P_0402_50V8J
KSI6
C119 1
100P_0402_50V8J
KSO10
C120 1
100P_0402_50V8J
KSI7
C121 1
100P_0402_50V8J
KSO11
C122 1
100P_0402_50V8J
KSO0
C123 1
100P_0402_50V8J
KSO12
C124 1
100P_0402_50V8J
KSO1
C125 1
100P_0402_50V8J
KSO13
C126 1
100P_0402_50V8J
KSO2
C127 1
100P_0402_50V8J
KSO14
C128 1
100P_0402_50V8J
KSO3
C129 1
100P_0402_50V8J
KSO15
C130 1
100P_0402_50V8J
ACES_88502-2501
ME@
R787
Switch Board Conn.
<34> MUTE_LED#
@ 0_0402_5%
+3VS
+5VALW
R789
+5VALW
+3VALW
R764
R765
1
1
0_0402_5%
2
@ 0_0402_5%
+5VS
<21> SATA_LED#
<34> CAPS_LED#
<34> NUM_LED#
<34> SCROLL_LED#
<37> ON/OFFBTN#
SATA_LED#
CAPS_LED#
NUM_LED#
SCROLL_LED#
ON/OFFBTN#
FUNCTION_BTN1#
FUNCTION_BTN2#
FUNCTION_BTN3#
ACES_85201-2005
ME@
R706
D_NOVO_BTN#
R707
DATA_GUEST
<34> DATA_GUEST
R757
1
1
1
2
VALUE@ 0_0402_5%
2
HS@
0_0402_5%
2
HIGH@ 0_0402_5%
Q57
2N7002_SOT23
12/14 Add for MUTE_LED#
+3VALW
R699
10K_0402_5%
D50
D_P_USB_15W#
P_USB_15W#
51_ON#
P_USB_15W# <34>
51_ON#
<37,44>
Video Switch Board Conn.
+3VALW
+5VALW
FUNCTION_BTN1#
EMAIL_BTN#
2
1
Q58
2N7002_SOT23
DAN202UT106_SC70-3
<34> EMAIL_BTN#
2
G
2
G
3
<34> POWER_USB_LED#
<34> P_USB_AUDIO#
<34> Q_CHARGE_VIDEO#
<34,38> MUTE_LED1#
PWR_LED#
R_MUTE_LED#
POWER_USB_LED#
P_USB_AUDIO#
Q_CHARGE_VIDEO#
+VCC_LED
<34,37,42> PWR_LED#
ON/OFFBTN#
PWR_LED#
10K_0402_5%
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R_MUTE_LED#
1
0_0402_5%
2
R788
JP48
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R730
JP49
1
2
3
4
5
6
7
8
100K_0402_5%
<34> CLK_GUEST
MUTE_BTN#
<34> MUTE_BTN#
A
R760
ACK_GUEST
<34> ACK_GUEST
R761
1
1
2
HS@
0_0402_5%
2
HIGH@ 0_0402_5%
2
HS@
0_0402_5%
2
HIGH@ 0_0402_5%
FUNCTION_BTN2#
D51
D_NOVO_BTN#
FUNCTION_BTN3#
<34> Q_CHARGE_15W#
WWW_USER_BTN#
1
R758
CLK_GUEST
1
R759
<34> WWW_USER_BTN#
NOVO_BTN#
51_ON#
NOVO_BTN# <34>
<34> Q_CHARGE_LED#
51_ON#
Q_CHARGE_15W#
POWER_USB_LED#
D_P_USB_15W#
Q_CHARGE_LED#
<37,44>
DAN202UT106_SC70-3
1
2
3
4
5
6
GND
GND
ACES_85201-06051
ME@
12/4 Change D50/D51 to correct symbols

R758
R760
2006/08/18
Issued Date
0_0402_5%
0_0402_5%
VALUE@
VALUE@
Compal Secret Data
Deciphered Date
2007/8/18
4
Title
EC ENE KB910L(Reserved)
Size
B
Date:
Document Number
Rev

Sheet
1
35
of
53
+5VALW
EEPROM_VCC
EEPROM_VCC
1
0_0603_5%
@
2 0.1U_0402_16V4Z
100K_0402_5%
8
7
6
5
<34,45> EC_SMB_CK1
<34,45> EC_SMB_DA1
JP12
U12
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
C103
0.1U_0402_16V4Z
20mils
R111
100K_0402_5%
0206 => change PN to SA00001N800
<34>
<34>
U11
AT24C16AN-10SU-2-7_SO8
<BOM Structure>
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
12/28 Add
1
R141
1
R142
To TP/B Conn.
+3VALW
1
0_0603_5%
EEPROM_VCC
8M SPI ROM
R110
VCC
HOLD
<34>
SPI_CS#
SPI_CS#1
<34>
SPI_CLK_R
SPI_CLK_R
6 C
<34>
SPI_SI
SPI_SI 5
VSS
TP_CLK
TP_DATA
TP_CLK
TP_DATA
1
2
3
4
5
6
7
8
+5VS
1
2
3
4
5
6
GND
GND
ACES_85201-06051
TP_DATA
SPI_SO 2
R626
SST25LF080A_SO8-200mil
D
1
0_0402_5%
FRD#SPI_SO <34>
TP_CLK
+5VS
12/19 change pn to SA00001MP00 ( original part EOL )
2
R813
EEPROM_VCC
C105 1
2
R816
+3VALW
C104
12/25 change back to SA024160140 ( Samples can not on time )
D19
@
PSOT24C_SOT23
0.1U_0402_16V4Z
1
12/15 change from 15 to 0 ohm'
Update Footprint
Bluetooth Conn.
FOR LPC DEBUG PORT
Need to check BT pin definition again!

9/20 modified this block
+3VS
+5VS
For 15W BT Conn. located at Right corner
For 14W BT Conn. located at Left corner
JP57
1
2
3
4
5
6
7
8
9
10
GND
GND
R595
+BT_VCC
2
10K_0402_5%
D
Q43
2N7002_SOT23
2
G
1
2
3
4
5
6
7
8
9
10
USB20_P8_1
USB20_N8_1
BTON_LED
WLAN_ACTIVE
BT_ACTIVE
<22> USB20_P8_1
<22> USB20_N8_1
<37,42> BT_LED#
JP42
BT_LED#
<32> WLAN_ACTIVE
<32> BT_ACTIVE
R596
10K_0402_5%
JP56
1
2
3
4
5
6
7
8
GND1
GND2
1
2
3
4
5
6
7
8
BT_ACTIVE
WLAN_ACTIVE
BTON_LED
USB20_N8_2
USB20_P8_2
<22> USB20_N8_2
<22> USB20_P8_2
+BT_VCC_1
1
2
3
4
5
6
7
8
9
10
11
12
CLK_PCI_DB
CLK_PCI_DB <16>
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_AD0 <21,29,34,41>
LPC_AD1 <21,29,34,41>
LPC_AD2 <21,29,34,41>
LPC_AD3 <21,29,34,41>
LPC_FRAME# <21,29,34,41>
PCI_RST#
PCI_RST# <20,24,26,28,33,34,41>
1
ACES_85201-1005N
ME@
C765
0.1U_0402_16V7K
2 @
ACES_87212-0800
MOLEX_53780-0870
ME@
12/4 Change JP56 to SP070008R00

Copied from HBL50 JP36
FOR LPC SIO DEBUG PORT

+3VALW
1U_0603_10V4Z
2 15W@
<34>
BT_ON#
0.1U_0402_16V4Z
14W@
2
100K_0402_5%
14W@
1
R755
C760
1U_0603_10V4Z
2 14W@
W=40mils
Q56
SI2301BDS_SOT23
14W@
1
Q22
SI2301BDS_SOT23
15W@
C759
0.1U_0402_16V4Z
15W@
2
100K_0402_5%
15W@
1
R158
W=40mils
+BT_VCC
C167
4.7U_0805_10V4Z
15W@ 2
+BT_VCC_1
C168
0.1U_0402_16V4Z
15W@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
BT_ON#
C165
JP54
C164
<34>
+3VALW
C761
4.7U_0805_10V4Z
14W@
C762
0.1U_0402_16V4Z
14W@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+5VS
+3VS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
PCI_RST#
CLK_PCI_DB
SERIRQ
CLK_14M_SIO <16,41>
LPC_DRQ0# <21,41>
2
R769
SERIRQ
1
10K_0402_5%
<22,26,28,29,34,41>
ACES_85201-2005
ME@
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
BIOS, I/O Port & K/B Connector

Size
B
Date:
Document Number
Rev

Sheet
36
of
53
ON/OFF switch
TOP Side
J3
J4
12/4 Change D14 to correct symbols
1
@ JOPEN
1
@ JOPEN
0208 Add 220pF for EMI
+3VALW
Bottom Side
R99
A30 IO Conn.
Layout Notice:
C38 IO Conn.
100K_0402_5%
1
D14
ON/OFFBTN#
<35> ON/OFFBTN#
ON/OFF#
2
1
ON/OFF# <34>
51_ON#
51_ON#
<35,44>
DCD#
C7981
2 220P_0402_50V7K
DSR#
C7991
2 220P_0402_50V7K
RXD
C8001 <BOM
220P_0402_50V7K
2 Structure>
RTS#
C8011
2 220P_0402_50V7K
TXD
C8021
2 220P_0402_50V7K
CTS#
C8031
2 220P_0402_50V7K
DTR#
C8041
2 220P_0402_50V7K
RI#
C8051
2 220P_0402_50V7K
DAN202UT106_SC70-3
Power Button
USB20_P4 / USB20_N4 pair
1
C97
D16
RLZ20A_LL34
2
1000P_0402_50V7K
1
<BOM Structure>
0207 Add JP59 0209 Change Symbol for GND PAD
For 15W IO Conn.
For 14W IO Conn.
For C38 IO Conn.
1
EC_ON
S 2N7002_SOT23
R100
+USB_VCCD
Q18
2
G
<34,46> EC_ON
+USB_VCCC
D
+USB_VCCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
USB20_N4
USB20_P4
10K_0402_5%
2
USB20_N5
USB20_P5
Front LED Board

+3VALW
+5VS
+USB_VCCD
JP52
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
USB20_N4
USB20_P4
<22> USB20_N4
<22> USB20_P4
USB20_N5
USB20_P5
<22> USB20_N5
<22> USB20_P5
ACES_85201-1205_12P
ME@
+5VALW
JP53
+USB_VCCC
JP59
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
USB20_N4
USB20_P4
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
<41>
<41>
DCD#
DSR#
<41>
<41>
RXD
RTS#
<41>
<41>
TXD
CTS#
<41>
<41>
DTR#
RI#
DCD#
DSR#
RXD
RTS#
TXD
CTS#
DTR#
RI#
E&T_3703-E12N-03R
ME@
PWR_LED#
CHARGE_LED0#
CHARGE_LED1#
BT_LED#
<34,35,42> PWR_LED#
<36,42> BT_LED#
WLAN_LED#
KILL_SW#
LID_SW#
RCIRRX
<32,42> WLAN_LED#
<32,34> KILL_SW#
<34> RCIRRX
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G1
G2
To USB CONN. 3
To USB CONN. 4
+USB_VCCC
+USB_VCCD
W=80mils
+USB_VCCC
1
1
C740
2
W=80mils
+USB_VCCD
1
+
ACES_87213-1600G
ME@
JP51
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G1
G2
150U_D_6.3VM
C742
470P_0402_50V7K
C741
150U_D_6.3VM
2 @
C743
470P_0402_50V7K
2 @
3
ACES_87213-1600G
ME@
+USB_VCCC
+USB_VCCD
1
R795
Lid Switch
2
A30@ 0_1206_5%
12/19 Add
12/27 modified to A30@
+5VALW
+5VALW
+USB_VCCC
+USB_VCCD
U46
+VCC_LID
R655 1
2 100K_0402_5%
14W@
C744
4.7U_0805_10V4Z
0.1U_0402_16V4Z
14W@ 2
U47
OUT
OUT
OUT
FLG
8
7
6
5
USB_OC#4 <22>
1
C746
C745
4.7U_0805_10V4Z
@
LID_SW# <34>
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
USB_OC#5 <22>
G528_SO8
@
C747
0.1U_0402_16V4Z
2 @
<34> USB3_ON#
<34> USB4_ON#
C729
4
U45
A3212ELHLT-T_SOT23W-3
14W@
10P_0402_50V8J
1 14W@
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
1
2
3
4
0.1U_0402_16V4Z
2 @
OUTPUT
1
GND
C728
GND
IN
IN
EN#
G528_SO8
2
0_0402_5%
14W@
VDD
+3VALW
1
R654
1
2
3
4
Title
Power OK, Reset and RTC Circuit, TP

Size
B
Date:
Document Number
Rev
0

Sheet

E
37
of
53
+VDDA
+AVDD_AC97
100P_0402_50V8J
<39>
MIC2_L
<39>
MIC2_R
C74
C75 @ 1
<39>
<39>
MIC1_L
MIC1_R
1
DVDD
39
AMP_LEFT_HP
2.2U_0603_6.3V6K
MIC2_C_R
17
MIC2_R
HP_OUT_R
41
AMP_RIGHT_HP
2.2U_0603_6.3V6K
MIC1_C_L
MIC1_R
C85
2.2U_0603_6.3V6K
MIC1_C_R
MONO_IN
23
LINE1_L
NC
24
LINE1_R
DMIC_CLK
46
18
CD_L
NC
43
NC
44
CD_R
19
CD_GND
21
MIC1_L
BIT_CLK
22
MIC1_R
12
PCBEEP
SDATA_IN
C86 @ 1
2 100P_0402_50V8J
C87 @ 1
2 100P_0402_50V8J
<21> HDA_RST_AUDIO#
11
RESET#
<21> HDA_SYNC_AUDIO
10
SYNC
<21> HDA_SDOUT_AUDIO
MUTE_LED1#
SENSE_A
SENSE_B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
10K_0402_5%
C65
EC Beep
680P_0402_50V7K
<34> BEEP#
10P_0402_50V8J
2 @
AMP_LEFT <39>
C73
1
1U_0402_6.3V4Z
R77
1
2
560_0402_5%
0.01U_0402_16V7K
1 @
HDA_BITCLK_AUDIO
1
R82
2
33_0402_5%
HDA_SDIN0
1U_0402_6.3V4Z
R74
D
10K_0402_5%
C68
1U_0402_6.3V4Z
MONO_IN_1 1
MONO_IN
2
Q15
2
B
E
2SC2411K_SOT23
2
R76
2.4K_0402_5%
Need Update Footprint
C77
1
1U_0402_6.3V4Z
2 @
C80
<26> PCM_SPK#
29
R75
1
2
560_0402_5%
CardBus Beep
AMP_RIGHT_HP <39>
SDIN0
LINE1_VREFO
PCI Beep
AMP_LEFT_HP <39>
HDA_BITCLK_AUDIO
37
C67
1
1U_0402_6.3V4Z
C71
AMP_RIGHT <39>
C66
1
9/22 Update footprint, Need to check
100P_0402_50V8J
R78
1
2
560_0402_5%
@
R80
D12
10K_0402_5%
RB751V_SOD323
9/19 Realtek suggest

Add bypass schematic.
<21>
<21>
C
GPIO1
31
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
ACZ_VREF
JDREF
40
ACZ_JDREF
NC
33
AVSS1
AVSS2
26
42
10mil
10mil
10mil
+MIC1_VREFO_L
+MIC1_VREFO_R
+MIC2_VREFO
10mil
20K_0402_1%
ALC268-GR_LQFP48
1
1
C89
C90
C88
10U_0805_10V4Z
100P_0402_50V8J
100P_0402_50V8J
2
2
@
HDA_BITCLK_AUDIO
C768
DGND
AGND
15P_0402_50V8J
2 @
R85
10_0402_5%
@
SENSE A / B
SENSE FOR Ext. Mic.
Impedance
Codec Signals
Funnction
39.2K
PORT-A (PIN 39, 41)
HP
20K
PORT-B (PIN 21, 22)
MIC
10K
PORT-C (PIN 23, 24)
LINE IN
5.1K
PORT-D (PIN 35, 36)
LINE Out
39.2K
PORT-E (PIN 14, 15)
HP
Adjustable Output
SENSE_A
2
20K_0402_1%
SENSE FOR Solo Int. Mic.
20K
SENSE B
PORT-F (PIN 16, 17)
C92
MIC
C93
4.7U_0805_10V4Z
10K
PORT-G (PIN 43, 44)
+VDDA
U8
L7 1
+5VS_VDDA
2
FBMA-L11-160808-800LMT_0603
VIN
DELAY SENSE or ADJ
ERROR
CNOISE
SD
GND
VOUT
+VDDA
5
2
R86
R88
30K_0402_1%
C95
SENSE_B
2
20K_0402_1%
0.1U_0402_16V4Z
LINE Out
R89
10K_0402_1%
R87
PORT-H (PIN 45, 46)
C94
SI9182DH-AD_MSOP8
LINE IN
0.1U_0402_16V4Z
5.1K
C91
10P_0402_50V8J
2 @
Regulator for CODEC

+5VS
<39> MIC_SENSE
Sense Pin
4.7U_0805_10V4Z
10_0402_5%
@
R84
R780
EAPD
GPIO0
GPIO3
SENSE A
SENSE B
45
MONO_OUT
SDATA_OUT
2
3
13
34
C64
AMP_RIGHT
HP_OUT_L
20
C63
<22> SB_SPKR
LINE_OUT_R
C84
<34,39>
35
MIC2_L
2 100P_0402_50V8J
NC
LINE_OUT_L
16
2 100P_0402_50V8J
15
DVDD_IO
38
NC
C70
10P_0402_50V8J
AMP_LEFT
@
MIC2_C_L
<34,35> MUTE_LED1#
C62
2.2U_0603_6.3V6K
MIC1_L
36
2/01 Let them floating

C83 @ 1
C61
C72
14
2 100P_0402_50V8J
AVDD2
AVDD1
C69 @ 1
0.1U_0402_16V4Z
U7
25
0.1U_0402_16V4Z
C60
+3VS
20mil
C59
L6 1
2
FBMA-L11-160808-800LMT_0603
680P_0402_50V7K
C58
10U_0805_10V4Z
C57
R73
0.1U_0402_16V4Z
10U_0805_10V4Z
+3VS_DVDD
+VDDA
40mil
680P_0402_50V7K
L5 1
0.1U_0402_16V4Z
2
FBMA-L11-160808-800LMT_0603
1
1
C55
C56
HD Audio Codec
Moat Bridge
SENSE FOR HP
R94
R95
<39> HP_SENSE
R93
SENSE_A
1
39.2K_0402_1%
R96
R97
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
1
1
1
Compal Secret Data
Issued Date
2006/08/05
Deciphered Date
2007/08/05
3
Title
<Title>
HD Audio Codec ALC268

Custom
LA-3541P
Date:
Rev
0.1
Sheet
1
38
of
53
APA2056 SPK/HP Amplifier

+5VALW
AMPL
+5VS
R56
R57
AMP_RHPIN
2
4.7U_0805_10V4Z
AMP_LHPIN
2
C44
4.7U_0805_10V4Z
AMP_SD#
1 R768
2
1
0_0402_5%
C45
<38> AMP_RIGHT_HP
C43
R58
<38> AMP_LEFT_HP
3
5
R59
ROUT+
ROUT-
22
21
SPKR+
SPKR-
LOUT+
LOUT-
8
9
SPKL+
SPKL-
HP_R
HP_L
17
18
HP_R
HP_L
CVSS
15
VSS
16
AMP_EN#27
/AMP EN
2 100K_0402_5%
AMP_SD#24
HP EN
2
39K_0402_5%
2
39K_0402_5%
INR_H
INL_H
4
6
26
1 AMP_BEEP 28
0_0402_5%
AMP_CP+
12
AMP_CP14
2
1U_0805_10V7K
AMP_BIAS
25
2.2U_0603_6.3V6K
1
0.1U_0402_16V4Z
2
2
0.47U_0603_16V4Z R60
1
C46
C47
C49
<38>
MIC1_R
<38>
MIC1_L
MIC1_R
MIC1_L
JP55
INR_H
INL_H
C37
220P_0402_50V7K
<38>
2
1
VDD
19
11
20
10
PVDD
PVDD
HVDD
INR_A
INL_A
2 100K_0402_5%
2.2K_0402_5%
MIC_SENSE
<38> MIC_SENSE
U6
AMPR
2
1U_0603_10V4Z
2
1U_0603_10V4Z
10mil
R51
2.2K_0402_5%
HP_SENSE
C38
220P_0402_50V7K
2
HP_SENSE
HP_R
HP_L
/SD
BEEP
CP+
CP-
R61
2
23
7
13
GND
PGND
PGND
CGND
BIAS
CVSS
R62
0_0402_5%
@
C48
C50
0_0402_5%
@
10P_0402_50V8J
C51
ACES_87212-1200
ME@
10P_0402_50V8J
12/13 Modified this symbol for pin 13 and 14.

Do not re-copy this symbol for other use
IN_A Gain = 10dB (Internal Speaker)

IN_H Gain = 0dB (Headphone)
9/5 If implement AMP BEEP, Swap C155 and R79.

R79 change from 0 Ohm to 47K
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
1U_0805_10V7K
APA2056_TSSOP28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
C41
+MIC1_VREFO_R
R50
1U_0402_6.3V4Z
<38> AMP_LEFT
C36
C39
10mil
2
+3VALW
<38> AMP_RIGHT
@ 1.5K_0402_1%
2
@ 1.5K_0402_1%
2
C35
CVDD
R52
1
R53
1
10U_0805_10V4Z
C34
0.1U_0402_16V4Z
680P_0402_50V7K
C33
1/31 Modified
fo=1/(2*3.14*R*C)=106Hz
R=1.5K / C= 1uF
+MIC1_VREFO_L
W=40mil
12/15 Modified
12/1 Modified to X7R

12/27 C48 change PN to SE092105K80
12/1 Modified to X7R

12/27 C46 change PN to SE092105K80
<34>
EC_MUTE#
EC_MUTE#
2
R64
1
@ 0_0402_5%
EAPD
2
R65
1
0_0402_5%
12/7 Added for 15w" use
AMP_SD#
JP58
<34,38> EAPD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MIC_SENSE
MIC1_R
MIC1_L
HP_SENSE
HP_R
HP_L
SINGLE INT MIC/DUAL INT MIC

R790
2
1
@ 0_0402_5%
GND
GND
2
1
1
R70
RB751V_SOD323
DUAL@
MIC2_R_L
1
2
2
C52
3
4
ACES_88231-02001
DUAL@
2
2.2K_0402_5%
L58 1
2
MBK1608121YZF_0603
2
R781 @
1
220P_0402_50V7K
DUAL@
MIC_GND
D52
R71
R791
2
2
1
@ 0_0402_5%
MIC_L_3
1
0_0402_5%
+MIC2_VREFO
2
R804
1
0_0402_5%
MIC2_L_1
1
0_0402_5%
2
R802 @
1
0_0402_5%
MIC2_L
<38>
1/31 change JP9 following JP50
C769
JP9
SPKL+
SPKLSPKR+
SPKR-
0206 => Change R803,R804,R807,R808 from @ to mount

Change R801,R802,R805,R806 from mount to @
For EMI Request
1
2
PSOT05C-LF-T7 SOT-23-3
R700
R701
R702
R703
20mil
1
1
1
1
2
2
2
2
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
SPK_L1+
SPK_L1SPK_R1+
SPK_R1-
1
2
3
4
5
6
Speaker Conn.
2
D11
2
MIC2_L_2
1
0_0402_5%
2
R801 @
15P_0402_50V8J
2 @
0_0402_5%
INT@
2
R803
1
R72
2
2.2K_0402_5%
L59 1
2
MBK1608121YZF_0603
RB751V_SOD323
2
R807
MIC2_R_2
1
0_0402_5%
2
R808
1
0_0402_5%
2
R805 @
MIC2_R_1
1
0_0402_5%
2
R806 @
1
0_0402_5%
MIC2_R
<38>
1
2
3
4
GND1
GND2
ACES_88231-0400
ME@
1
2
MIC_L1
E&T_3703-E12N-03R
ME@
@
D54
+MIC2_VREFO
@
D53
DUAL@
D10
2/01 Add D52 for INT MIC use( PN:SCD0T05CA20 )

For EMI Request
D52 is a modified symbol
0208 => Change L57 , L58 from @ to mount
Change R781 , R782 from mount to @
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
D46
1
2
GND
GND
3
4
MIC2_R_R
2
C54
ACES_88231-02001
2
R782 @
1
220P_0402_50V7K
PSOT24C_SOT23
@
C770
D47
PSOT24C_SOT23
@
15P_0402_50V8J
2 @
MIC_GND
MIC_R_3
1
0_0402_5%
1
2
MIC_R1
0208 => Remove R797 , Add L63
For EMI Request
12/21 Place these parts close to CODEC (U7)
L63 1
2
MBK1608121YZF_0603
0_0603_5%
@
GNDA
2006/08/05
Issued Date
MIC_GND
Compal Secret Data
R798
2007/08/05
Deciphered Date
B
Title
AMP/VR/Audio Jack/MIC

Custom
LA-3541P
Date:
Rev
0.1
Sheet

E
39
of
53
H2
HOLEA
H14
HOLEA
H13
HOLEA
H12
HOLEA
H11
HOLEA
H9
HOLEA
H8
HOLEA
H7
HOLEA
H6
HOLEA
H16
HOLEA
H15
HOLEA
H5
HOLEA
H4
HOLEA
H3
HOLEA
12/18 Del H10 for layout request
H1
HOLEA
H_C125BC220D122
H31
HOLEA
H26
HOLEA
H25
HOLEA
H24
HOLEA
H23
HOLEA
H22
HOLEA
H21
HOLEA
H20
HOLEA
H19
HOLEA
H18
HOLEA
H17
HOLEA
95.10.5 add
H34
HOLEA
H_O122X220D122X220N
M7
HOLEA
CF9
@
CF10
@
CF8
@
CF7
@
CF6
@
CF5
@
FD6
@
CF4
@
1
CF3
FD5
@
CF23
@
M6
HOLEA
M5
HOLEA
FD4
@
CF2
@
CF11
M4
HOLEA
FD3
@
CF1
FD2
@
FD1
H33
HOLEA
H32
HOLEA
H30
HOLEA
H29
HOLEA
H28
HOLEA
H27
HOLEA
H_O220X368D220X368N
H_O122X220D122X220N
H_O236X295D236X295N
95.12.18 add for layout request
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
FAN & Screw Hole

Size
B
Date:
Document Number
Rev

Sheet
40
of
53
SUPER I/O SMsC LPC47N217
+3VS
R38
LPC_AD[0..3]
1
<21,29,34,36> LPC_AD[0..3]
1
10/19 : Change P/N from SA472170000 to SA472170010
SIO_GPIO11
SIO_SMI#
SIO_IRQ
+3VS
R32
1 217@
R33
R607 1 217@
2 10K_0402_5%
SUS_STAT#
2 10K_0402_5%
SIO_SMI#
2 10K_0402_5%
SIO_PME#
CLK14
IRRX
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#
41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61
CLOCK
23
24
25
27
28
29
30
31
32
33
34
35
36
40
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23
8
22
43
52
VSS
VSS
VSS
VSS
5
6
7
8
1 217@
10K_0402_5%
10K_0402_5%
VTR
VCC
VCC
VCC
VCC
POWER
Agilent IRRX unpop 10K

Vishay IRRX pop 10K
7
11
26
45
54
C25
217@
+3VS
R775
FORCEON
10K_0402_5%
@
FORCEOFF#
15P_0402_50V8J
2
@
C27
15P_0402_50V8J
2 @
10_0402_5%
@
R772
R774
10K_0402_5%
@
10K_0402_5%
@
R43
C26
C695
R773
10K_0402_5%
@
CLK_PCI_SIO
R42
C24
217@
C763
217@
C764
217@
R776 1
<17,28,33,34,43,48,49,50> SUSP#
R777 1
0.1U_0402_16V4Z
217@ 1
10K_0402_5%
@
+3VS
+3VS
CLK_14M_SIO
1
10K_0402_5%
U41
28
C1+
24
1
C1C2+
2
14
13
12
19
18
17
16
15
20
C2TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2
FORCEON
23
FORCEON
FORCEOFF#
22
C696
0.1U_0402_16V4Z
217@
1
2
C697
0.1U_0402_16V4Z
217@
1
DTR#1
RTS#1
TXD1
CTS#1
RI#1
RXD1
DCD#1
DSR#1
FORCEON
2
0_0402_5%
26
R40
+3VS
+3VS
VCC
R39
IRRX
RP56
10K_1206_8P4R_5%
217@
4
3
2
1
2
R756 217@
LPC47N217_STQFP64
217@
SIO_IRQ
37
38
39
IRRX2
IRTX2
IRMODE/IRRX3
FIR
1K_0402_5%
217@
0.1U_0402_16V4Z
CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#
0.1U_0402_16V4Z
PCI_RESET#
LPCPD#
19
20
21
6
R41
0.1U_0402_16V4Z
17
18
PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#
CLK_14M_SIO
<16,36> CLK_14M_SIO
SIO_RST#
SUS_STAT#
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
0.1U_0402_16V4Z
<22,28,29,34> PM_CLKRUN#
<16> CLK_PCI_SIO
<22,26,28,29,34,36> SERIRQ
LFRAME#
LDRQ#
62
63
64
1
2
3
4
5
SERIAL I/F
2 217@ 0_0402_5%
2 @ 0_0402_5%
<22,29> SUS_STAT#
15
16
LPC I/F
R36 1
R37 1
LPC_FRAME#
LPC_DRQ0#
RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#
PARALLEL I/F
<8,17,20,29,30,32> PLT_RST_BUF#
<20,24,26,28,33,34,36> PCI_RST#
LAD0
LAD1
LAD2
LAD3
GPIO
<21,29,34,36> LPC_FRAME#
<21,36> LPC_DRQ0#
10
12
13
14
Base I/O Address

*
0 = 02Eh
1 = 04Eh
SIO_GPIO11
U4
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
10K_0402_5%
@
V+
27
V-
TOUT1
TOUT2
TOUT3
RIN1
RIN2
RIN3
RIN4
RIN5
9
10
11
4
5
6
7
8
INVLD#
21
GND
25
C698
C699
1
217@ 0.1U_0402_16V4Z
1
217@ 0.1U_0402_16V4Z
DTR#
RTS#
TXD
CTS#
RI#
RXD
DCD#
DSR#
DTR#
RTS#
TXD
CTS#
RI#
RXD
DCD#
DSR#
<37>
<37>
<37>
<37>
<37>
<37>
<37>
<37>
FORCEOFF#
MAX3243CAI_SSOP28
217@
FORCEOFF#
2
0_0402_5%
AutoShutdown Mode :
FORCEOFF# = VCC, FORCEON = GND
4
12/15 Modified
Compal Secret Data
2005/05/26
Issued Date
9/18 modify this page following IGT1x

A
2006/07/26
Deciphered Date
B
Title

SUPER I/O LPC47N217
Size
Document Number
Rev
0.2
LA-3541P UMA
Date:
Sheet

E
41
of
53
MDC Conn.
Camera Conn
+5VS
C753
1
R25
2
33_0402_5%
20mil
1U_0603_10V4Z
Q52
SI2301BDS_SOT23
W=40mils
+5VS_CMOS
+5VS_CMOS
+MDC_VCC
GND
GND
GND
GND
GND
GND
<21> HDA_SYNC_MDC
<21> HDA_SDIN1
<21> HDA_RST_MDC#
2
4
6
8
10
12
<21> HDA_SDOUT_MDC
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
100K_0402_5%
JP2
1
3
5
7
9
11
1
R736
C754
<34> CAMERA_ON#
0.1U_0402_16V4Z
C693
HDA_BITCLK_MDC <21>
C16
@
22P_0402_50V8J
4.7U_0805_10V4Z
C755
1
4.7U_0805_10V4Z
@ 2
C17
0.1U_0402_16V4Z
C18
0.1U_0402_16V4Z
13
14
15
16
17
18
JP3
Connector for MDC Rev1.5
USB20_N7
USB20_P7
USB20_N7
USB20_P7
R783 1
R784 1
1
2
3
4
5
6
7
USB20_R_N7
USB20_R_P7
2 0_0603_5%
2 0_0603_5%
2
ACES_88018-124G
ME@
<22>
<22>
D1
@
PSOT24C_SOT23
1
2
3
4
5
GND1
GND2
ACES_88266-05001
ME@
12/13 Reserved for EMI request

12/18 modified
+3VALW
C748
3
C749
1U_0603_10V4Z
1/05 Modified D3 to SCA00000A00
Finger Print board
Q51
SI2301BDS_SOT23
1
2
100K_0402_5%
1
R735
<34> MDC_ON#
0.1U_0402_16V4Z
For EMI
0208 Remove D3 , Add D55 (SC300000G00)
W=40mils
+MDC_VCC
C750
4.7U_0805_10V4Z
D55
C751
I/O
VCC
I/O
GND
0.1U_0402_16V4Z
9/29 follow HEL80's
PRTR5V0U2X_SOT143
<BOM Structure>
<22>
<22>
USB20_P9
USB20_N9
JP4
USB20_P9
USB20_N9
1
2
3
4
5
6
7
8
+3VS
+5VS
1
4.7U_0805_10V4Z
@ 2
C19
LED
+5VALW
R28 14W@
820_0402_5%
1
2
1 LED1
1
2
3
4
5
6
GND
GND
ACES_85201-06051
ME@
C20
0.1U_0402_16V4Z
2/1 change JP4 pin 6 to +5VS for LTT FP use

PWR_LED# <34,35,37>
HT-191NB_BLUE_0603
14W@
+5VS
R27 14W@
820_0402_5%
1
2
1 LED2
3G_LED# <34>
HT-191NB_BLUE_0603
HS@
R31 14W@
1
2
430_0402_5%
LED3
4
2
+5VALW
R30 14W@
680_0402_5%
1
2
+5VALW
Amber
CHARGE_LED0# <34,37>
Blue
CHARGE_LED1# <34,37>
HT-297UD/CB _BLUE/AMB_0603
14W@
Blue&Amber
R709 14W@
1
2
430_0402_5%
LED4
4
2
+5VS
R708 14W@
680_0402_5%
1
2
+5VS
Amber
BT_LED# <36,37>
Blue
WLAN_LED# <32,37>
12/7 Modified LED footprint to LED_HT-297UD-CB_4P

12/15 Modified to correct LED symbol!
Issued Date
Compal Secret Data
HT-297UD/CB _BLUE/AMB_0603
14W@
2006/08/18
Deciphered Date
2007/8/18
Title
MDC/CIR & LED

Size
B
Date:
Document Number
Rev
0

Sheet
42
of
53
1/18 Change U3 PN from

SB000009580 to SB000005D80
+5VALW TO +5VS
+5VALW
+3VALW TO +3VS
+3VALW
+1.8V to +1.8VS
+5VS
+1.8V
+3VS
+1.8VS
U1
2 SUSP
G
Q2
2N7002_SOT23
@
C7
R17
C12
10U_0805_10V4Z
2
2
1U_0603_10V4Z
+VSB
C5
1
2
R738
47K_0402_5%
C13
2 SUSP
G
Q5
2N7002_SOT23
@
+VSB
2
Q53 G
2N7002_SOT23
1
2
3
4
S
S
S
G
C756
C10
C11
R18
10U_0805_10V4Z
2
PM@ 2
1U_0603_10V4Z
PM@
SUSP
0.1U_0603_25V7K
470_0603_5%
@
1.8VS_GATE
R19
33K_0402_5%
PM@
S
1
SUSP
0.1U_0603_25V7K
D
D
D
D
8
7
6
5
AO4468_SO8
PM@
10U_0805_10V4Z
2
PM@ 2
10U_0805_10V4Z
PM@
470_0603_5%
@
2 SUSP
G
Q6
2N7002_SOT23
@
C14
0.1U_0603_25V7K
2 PM@
2
G
Q7
S
2N7002_SOT23
PM@
3
SUSP
2
Q3 G
2N7002_SOT23
C6
R14
33K_0402_5%
1
2
3
4
S
S
S
G
AO4468_SO8
5VS_GATE
C9
D
D
D
D
10U_0805_10V4Z
2
2
10U_0805_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
C8
470_0603_5%
@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
R12
C2
U3
1 1
AO4468_SO8
+VSB
8
7
6
5
2
C1
C4
U2
1
2
3
4
S
S
S
G
D
D
D
D
C3
8
7
6
5
+5VALW
R11
100K_0402_5%
Q1
2N7002_SOT23
2
G
<33,34,48> SYSON
SYSON#
SYSON
2 SYSON#
G
Q12
2N7002_SOT23
@
2 SUSP
G
Q54
2N7002_SOT23
@
R15
100K_0402_5%
1
2 SYSON#
G
Q11
2N7002_SOT23
@
12/7 Modified
SUSP
Q4
2N7002_SOT23 1
2
G
SUSP#
1
<17,28,33,34,41,48,49,50>
SUSP
2 SUSP
G
Q10
2N7002_SOT23
@
2 SUSP
G
Q9
2N7002_SOT23
@
2 SUSP
G
Q8
2N7002_SOT23
@
+5VALW
R739
470_0603_5%
@
R24
470_0603_5%
@
R23
470_0603_5%
@
R22
470_0603_5%
@
+1.25VS
2
+1.8V
R21
470_0603_5%
@
+0.9VS
R20
470_0603_5%
@
+1.05VS
+2.5VS
+1.5VS
2
R13
100K_0402_5%
3
R16
100K_0402_5%
C778
100P_0402_50V8J
<50>
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
Title
DC Interface
Size
B
Date:
Document Number
Rev

Sheet

E
43
of
53
ACIN
Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
DC301001Y00
1
PR1
10_1206_5%
PR2
1K_1206_5%
1
2
PR3
1K_1206_5%
1
2
RLS4148_LL34-2
PR5
PC5
@10K_0402_1% @ 0.01U_0402_25V7K
1
2
1
2
1
PR10
10K_0402_1%
2
PR12
10K_0402_1%
1
2
ACIN
<22,34>
PACIN
<46>
PACIN
<34,46>
Vin Detector
ACOFF
PQ3
DTC115EUA_SC70-3
High 18.764 17.901 17.063

Low 17.745 16.9
16.03
3.3V
B+
RTCVREF
PQ2
DTC115EUA_SC70-3
PR17
10K_0402_1%
2
1
1
PR16
10K_0402_1%
PU1A
LM393DG_SO8
8
3
PC7
0.1U_0402_16V7K
PR8
1K_1206_5%
1
2
PD3
RLZ4.3B_LL34
2
1
PR11
84.5K_0402_1%
1
PR15
20K_0402_1%
2
PC6
1000P_0402_50V7K
VS
PR14
22K_0402_1%
1
2
PR4
1K_1206_5%
1
2
VS
PR9
1M_0402_1%
1
2
VIN
PQ1
TP0610K-T1-E3_SOT23-3
1
1
PR13
100K_0402_5%
1 2
PD2
VIN
2
1
PR7
100K_0402_5%
2
1
PR6
100K_0402_5%
1 2
PD1
RLZ24B_LL34
1
2
PC4
1000P_0402_50V7K
PC3
100P_0402_50V8J
PC2
100P_0402_50V8J
PJP1
1
PC1
1000P_0402_50V7K
ADPIN
@ SINGA_2DW-0268-B16
1 1
2 2
3 3
4 4
VIN
PL1
HCB4532KF-800T90_1812
1
2
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
VIN
PR18
2.2M_0402_5%
2
1
VL
PD4
(7A,280mils ,Via NO.=14)
+5VALW
PJ5
PAD-OPEN 3x3m
2
PC12
0.01U_0402_25V7K
2
1
PR28
499K_0402_1%
PR27
191K_0402_1%
1
D
PQ5
PR31
RHU002N06_SOT323-3
47K_0402_1%
2
2
1
G
PACIN <46>
(8A,320mils ,Via NO.= 16)
+0.9VSP
PR30
34K_0402_1%
2
1
RTCVREF
PU1B
LM393DG_SO8
+1.05VSP
PJ3
PAD-OPEN 3x3m
1
2
+1.05VS
PQ6
DTC115EUA_SC70-3
+5VALWP
(16A,800mils ,Via NO.= 24)
+0.9VS
+5VALWP
PJ4
PAD-OPEN 3x3m
1
2
+1.8VP
+1.5VS
2
1
PR32
66.5K_0402_1%
+1.5VSP
PJ2 PAD-OPEN 3x3m

1
2
+1.8V
RB715F_SOT323-3
PQ4
TP0610K-T1-E3_SOT23-3
PJ1
PAD-OPEN 3x3m
1
2
PRG++ 2
<46> ACON
PC14
1000P_0402_50V7K
<45,47> MAINPWON
1
2
2
PD6
1
PC11
0.1U_0603_25V7K
<35,37,46> 51_ON#
PR29
22K_0402_1%
1
2
PC10
0.22U_1206_25V7K
CHGRTCP
GND
2
1
2
PC9
4.7U_0805_6.3V6K
+CHGRTC
PR25
200_0805_5%
2
1
2
1
IN
2
1
PR26
100K_0402_5%
OUT
PC8
1U_0805_25V4Z
PU2
G920AT24U_SOT89-3
PR24
PR23
560_0603_5%
560_0603_5%
1
2 1
2
VS
VS
RLS4148_LL34-2
2
1
PR22
100K_0402_1%
2
1
PR20
68_1206_5%
2
1
PR21
68_1206_5%
BATT+
RTCVREF
PC13
0.1U_0603_25V7K
PD5
3.3V
2
1
PR19
499K_0402_1%
RLS4148_LL34-2

4
+3VALWP
PJ6
PAD-OPEN 3x3m
1
2

4
PJ7
+3VALW
+2.5VSP
+2.5VS
JUMP_43X79
+1.25VSP
PJ8
PAD-OPEN 3x3m
2
+1.25VS

A
+VSBP
PJ9
PAD-OPEN 3x3m
2
Issued Date
Compal Secret Data
+VSB
2005/10/17
Deciphered Date
2006/10/17
(0.3A,40mils ,Via NO.= 2)

B
Title
DCIN/DECTOR
Size
B
Date:
Document Number
Rev
0.2
Sheet

D
44
of
52
2/16 Change to 89 degree C for thermal request

BATT+
PH1 under CPU botten side :

CPU thermal protection at 85 degree C
Recovery at 70 degree C
PJP2
PR42
78.7K_0603_1%
1
2
PU3A
3 +
1
2
PR37
150K_0402_1%
MAINPWON <44,47>
1SS355TE-17_SOD323-2
PR43
2 150K_0402_1%
1
VL
1
PR45
150K_0402_1%
1
2
1
PR46
1K_0402_1%
PD8
LM358ADR_SO8
PC20
1U_0603_6.3V6M
+3VALWP
1
2
PR44
6.49K_0402_1%
PH1
100K_0603_1%_TH11-4H104FT
1
1
PC19
1000P_0402_50V7K
EC_SMB_DA1 <34,36>
1
PR41
100_0402_1%
2
2
1
PR40
100_0402_1%
PR39
1 442K_0603_1%
2
TM_REF1
EC_SMB_CK1 <34,36>
VL
VL
1
PR38
10K_0402_1%
VS
PC17
0.01U_0603_50V7K
PR36
1K_0402_1%
@ 100K_0402_5%
@ PR33
100K_0402_5%
+3VALWP
PC16
1000P_0603_50V7K
PR34
+3VALWP
CNT1
CNT2
EC_SMCA
EC_SMDA
TS_A
GND
PC15
1000P_0603_50V7K
PR35
0_0402_5%
1
2
BATT++
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
G1
G2
PL2
HCB4532KF-800T90_1812
1
2
DC040003600
BATT++
PC18
0.1U_0603_25V7K
BATT_TEMP <34>
PQ7
TP0610K-T1-E3_SOT23-3
PR50
0_0402_5%
2
SPOK
1
2
2
1
2
PC21
0.22U_1206_25V7K
PQ8
RHU002N06_SOT323-3
2
G
<47>
PC23
0.1U_0402_16V7K
1
2
PR49
100K_0402_5%
2
1
PR47
100K_0402_5%
PR48
22K_0402_1%
1
2
VL
+VSBP
1
PC22
0.1U_0603_25V7K
B+
Issued Date
Compal Secret Data
2005/10/17
Deciphered Date
2006/10/17
A
Title
BATTERY CONN. / OTP

Size
B
Date:
Document Number
Rev
0.1
Sheet

D
45
of
52
ADP_I = 19.9*Iadapter*Rsense
65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR69=39.2K, CP=3.079A

90W, Iadapter=0~4.74A, Current Sense=0.015ohm, PR69=28.7K, CP=4.263A
B+
CELLS
CSOP
21
ICOMP
CSIN
20
VCOMP
CSIP
19
ICM
PHASE
18
LX_CHG
PC27
2200P_0402_50V7K
2
1
D
D
D
D
G
S
S
S
PQ17
SI4800BDY-T1-E3_SO8
4
3
2
1
PR72
10K_0402_1%
12
16
ACLIM
VDDP
15
VADJ
LGATE
14
GND
PGND
13
PR67
PC41
BST_CHG 1
2 BST_CHGA 2
1
2.2_0603_5% PD10
0.1U_0603_25V7K
1SS355TE-17_SOD323-2
1
26251VDD
4.7_0603_5%
PR71
BATT+
PR65
0.02_2512_1%
PC45
4.7U_0805_6.3V6K
1
2
PR73
@ 274K_0402_1%
6251VREF
PQ21
@SI2301BDS-T1-E3_SOT23-3
PR212
100K_0402_1%
VS
BATT+
1
6251_EN
CHGSEL
1
13050mV
LOW
12.90V
12600mV
HIGH
12.60V
LM358ADR_SO8
PU3B
5
0
G
PR76
499K_0402_1%
PR78
105K_0402_1%
PC48
0.01U_0402_25V7K
OVP voltage :
LI-3S :13.50V--BATT-OVP=1.5V
BATT-OVP=0.111*BATT+
CV mode
PR77
10K_0402_1%
2
PC47
0.01U_0402_25V7K
<34> BATT_OVP
12/21
PR211
20K_0402_1%
PR75
340K_0402_1%
PC118
0.01U_0402_25V7K
2
1
CSON
PQ44 @
2SC2411K_SC59
2
B
PC46
0.01U_0402_25V7K
CC=0.6~3.4A
VCHLM=0.24V~1.36V
IREF=0.972*Icharge
IREF=0.5832V~3.3V
<34>
2800mAH 3S pack
PQ19
SI4800BDY-T1-E3_SO8
6251VDDP
DL_CHG
CHG
BOOT
DH_CHG
10UH_SIL1045RA-100PF_4.5A_30%
0_0402_5%
CHLIM
D
D
D
D
10
11
17
PL3
2
G
S
S
S
UGATE
If charge current is small,

you can change to 16uH choke.
5
6
7
8
VREF
39.2K_0402_1%
2
1
If this area float, Charge voltage is 4.2V/cell
Charging Voltage
CHGSEL
(0x15)
2
1
5
6
7
8
CSOP
<44>
PC43
10U_1206_25V6M
CSON
PC34
1U_0805_16V7K
1
2
PR61
2.2_0603_5%
2
1
PR62 18_0603_5%
PC37
0.1U_0603_25V7K
22
PQ15
RHU002N06_SOT323-3
2
PACIN
G
CSON
PC42
10U_1206_25V6M
EN
23
PR74
@ 100K_0402_1%
CP mode
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=0.5535V, Iinput=3.079A
where Vaclm=0.6667V, Iinput=4.263A
BATT Type
VIN
ISL6251AHAZ-T_QSOP24
6251VREF
<34,44>
PD9
2
1SS355TE-17_SOD323-2
0.1U_0603_25V7K
ACSET ACPRN
DTC115EUA_SC70-3
PQ20
PR69
6251VREF 1
4
3
2
1
1
2
ACOFF
<34,44>
PQ13
DTC115EUA_SC70-3
BATT+
IREF
0.1U_0402_16V7K
Be careful the
PR70
IREF voltage!!100K_0402_1%
6251DC_IN
2
24
<34>
PR68
143K_0402_1%
2
1
ACOFF
200K_0402_1%
PR141
1 PR64
2
100_0402_1%
PC40
1
2
PC44
1
ACON
ACON
2
1SS355TE-17_SOD323-2
DCIN
6251VREF
ADP_I
0.01U_0402_25V7K
PQ18
RHU002N06_SOT323-3
<34>
2
G
<44>
PC31
6251_EN
1 PR63
2
10K_0402_1%
1
2
PC39
100P_0402_50V8J
PR55
10K_0402_1%
EC_ON
<34,37>
PC32
VDD
2
PACIN
<44>
PR66
22K_0402_1%
PACIN 1
2
VIN
PD7
FSTCHG
3 EC_ON
PU4
1
1
2
PC36 6800P_0402_25V7K
PC38
1
2
PR52
47K_0402_1%
1
2
1 PR56
0.01U_0402_25V7K
PC26
0.1U_0603_25V7K
2
1
1
2
2
1
PR59
2
100K_0402_1%
CSON 1
8
7
6
5
RB715F_SOT323-3
PC35
@ 680P_0402_50V7K
PR60
150K_0402_1%
0.1U_0402_16V7K
2
PQ14
DTC115EUA_SC70-3
D
D
D
D
PQ9
PD17
2
S
S
S
G
12/21
PC97
0.1U_0603_25V7K
6251VDD
2 PR57
1
10K_0402_1%
PC56
1
2
1
PR58
0_0402_5%
PQ43
DTC115EUA_SC70-3
PR210
FSTCHG
CSIN
6251DC_IN
1SS355TE-17_SOD323-2
PD16
1
2
JUMP_43X118
CSIP
PR209
100K_0402_1%
PQ12
DTA144EUA_SC70-3
<34>
PJ14
1
VIN
PQ16
D
RHU002N06_SOT323-3
2
G
S
PQ42
TP0610K-T1-E3_SOT23-3
PC29
5600P_0402_25V7K
1
2
1
2
1
2
3
PC28
0.1U_0603_25V7K
1
2
PR54
200K_0402_1%
1
2
3
4
CHG_B+
PC25
10U_1206_25V6M
2
1
PQ11
PR53
47K_0402_1%
PR51
0.02_2512_1%
FDS4435BZ_SO8
PC24
10U_1206_25V6M
2
1
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
1
2
3
4
S
S
S
G
D
D
D
D
2.2U_0603_6.3V6K
8
7
6
5
VIN
FDS4435BZ_SO8
P3
FDS4435BZ_SO8
100K_0402_1%
P2
PQ10
PC33
0.1U_0603_25V7K
Normal 3S LI-ON Cells
Issued Date
Compal Secret Data
2006/05/18
Deciphered Date
2007/05/18
A
Title
CHARGER
Size
Document Number
Rev
1.0
CHARGER
Date:
Sheet
D
46
of
52
PJ15
JUMP_43X118
BST5B
PC49
0.1U_0402_16V7K
1
2
B+
PC50
0.1U_0402_16V7K
1
2
BST3B
B+++
B+++
CHP202UPT_SOT323-3
PD11
PQ23
SI4800BDY-T1-E3_SO8
5
6
7
8
D
D
D
D
G
S
S
S
4
3
2
1
5
6
7
8
4
3
2
1
2
PL6
28
26
24
27
22
DH3
1
2
PR95
6.49K_0402_1%
7
2
4.7UH_PCMC063T-4R7MN_5.5A_20%
D
D
D
D
PQ25
SI4810BDY-T1-E3_SO8
DL3
@
PC30
100P_0402_50V8J
<45>
G
S
S
S
2
PR87
0_0603_5%
BST3A
1
2
PR89
499K_0402_1%
11
10U_1206_25V6M
1
2
2
PR84
0_0603_5%
1
2
PR86
200K_0402_1%
1
2
PR85
200K_0402_1%
1
2
PR88
499K_0402_1%
PC54
0.1U_0402_16V7K
2
1
2
17
VCC
PRO#
TON
LDO3
LD05
3HG
LX3
+3VALWP
1
+
SPOK
PC63
220U_6.3V_M
2
1
2
PR98
10K_0402_1%
REF
ILIM3
4.7U_0805_6.3V6K
10
1
2
PR97
0_0402_5%
1
2
2
PR99
47K_0402_1%
1
2
PC65
0.22U_0603_16V7K
1
PR203
0_0402_5%
25
12
GND
6
4
3
PC67
0.047U_0603_16V7K
1
2
PC64
0.047U_0603_16V7K
@PR94
@PR94
10_0402_5%2
13
LX5
DL5
ILIM5
OUT5
PU6
FB5
BST3
N.C.MAX8734AEEI+_QSOP28 DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD
8734_VREF
PZD1
PR93
RLZ5.1B_LL34
47K_0402_1%
1
2 1
2
15
19
21
9
1
23
2
PR91
0_0402_5%
20
DH5
V+
BST5
16
VS
18
14
PC66
2
1
BST5A
8734_VREF
PC59
1U_0805_16V7K
2
PC60
4.7U_0805_6.3V6K
2
1
DL5
1 PC61
0.1U_0603_25V7K
PC58
1U_0805_25V4Z
VL
1
2
PR96
100K_0402_5%
+5V Ipeak = 6.66A ~ 10A
PQ24
SI4810BDY-T1-E3_SO8
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
2
1
2
PR90
10.5K_0402_1%
1
2
PR92
6.81K_0402_1%
PC62
150U_V_6.3VM_R18
+5VALWP
1
2
PL5
4.7UH_PCMC063T-4R7MN_5.5A_20%
2
1
PR82
4.7_1206_5%
1
2
PR80
47_0402_5%
DH5
LX5
PC55
2200P_0402_50V7K
PC57
2
1
2
PR79
0_0603_5%
1
PR83
0_0603_5%
2
1
PR81
4.7_1206_5%
B+++
5HG
VL
PQ22
SI4800BDY-T1-E3_SO8
D
D
D
D
S
S
S
G
1
2
3
4
PC53
1
10U_1206_25V6M
8
7
6
5
VFB=2V
+3.3V Ipeak = 6.66A ~ 10A
1
2
PC68
1U_0603_6.3V6M
MAINPWON <44,45>
Issued Date
Compal Secret Data
2005/10/17
Deciphered Date
2006/10/17
A
Title
+5VALWP/+3VALWP
Custom
Date:
Rev
0.1
Sheet

D
47
of
52
OZ813A_B+
PJ16
1
+3VALW
4.7U_1206_25V6K
+
2
PC88
330U_D2_2.5VY_R15M
2
1
2
PC78
4700P_0402_25V7K
2
1
1
2
PC72
330U_D2_2.5VY_R15M
PR104
51_0402_1%
+
2
OCP==>8A~~9.7A
Vripple==>40mV
C
PR202
2.8K_0402_1%
@
PC85
2.2U_0603_6.3V6K
1
PR117
51_0402_1%
2
1
+
PC87
220U_6.3V_M
OCP==>8A~~9.7A
PC92
2
1
1.8VS1P
Vripple==>40mV
3300P_0402_25V7K
1
2
PC95
4700P_0402_25V7K
2
5
6
7
8
PR124
@2.8K_0402_1%
4
3
2
1
G
S
S
S
PQ29
SI4810BDY-T1-E3_SO8
1.8VS1N
PC93
@ 0.1U_0402_16V7K
D
D
D
D
+1.8VP
PR120
PR121
100K_0402_1% 280K_0402_1%
1
2 1
2
PQ28
SI4800BDY-T1-E3_SO8
PL9
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
PC94
22P_0402_50V8J
4.7U_1206_25V6K
PC90
2
1
PC89
4.7U_1206_25V6K
2
1
5
6
7
8
D
D
D
D
G
S
S
S
4
3
2
1
@ 1K_0402_1%
DL_1.8V
DH_1.8V-2
PR119
0_0603_5%
1
2
2
PR118
0_0402_5%
+3VALW
OZ813A_B+
PC91
PR116
680P_0603_50V7K
4.7_1206_5%
2
1
2
1
1SS355TE-17_SOD323-2
PC84
0.1U_0402_16V7K
PR122
1
PC77
22P_0402_50V8J
G
S
S
S
+5VALW
LX1.8V
1.8VS1P
PC76
PR105
680P_0603_50V7K
4.7_1206_5%
2
1
2
1
5
6
7
8
+1.05VSP
1
PD13
BST_1.8V 1
7
8
9
10
11
12
1
2
1.8VS1N
2
2
2
PC72=>220UF/15m, Del PC88
1.05VS2N
1
2
VSET1
CS1N
CS1P
PGD1
LX1
HDR1
PC79
1U_0805_16V7K
PR123
0_0402_5%
1
2
B+
For discrete
PR106
PR107
100K_0402_1% 280K_0402_1%
1
2
1
2
PC75
3300P_0402_25V7K
1.05VS2P
1
2
2
1SS355TE-17_SOD323-2
+5VALW
DH_1.8V-1
PC86
1000P_0402_50V7K
4
3
2
1
1
2
PD12
OZ813LN_QFN24
PR115
150K_0402_1%
DL_1.05V
BST_1.05V 1
18
17
16
15
14
13
BST2
LDR2
VDDP
GDNP
LDR1
BST1
<33,34,43> SYSON
PC74
0.1U_0402_16V7K
24
23
22
21
20
19
25
GNDA
VSET2
CS2N
CS2P
PGD2
LX2
HDR2
ON/SKIP2
VIN
VREF
TSET
VDDA
ON/SKIP1
1.8SET
PR114
61.9K_0402_1%
PL8
1
2
1.8UH_SIL104R-1R8PF_9.5A_30%
D
D
D
D
1
2
PC83
0.01U_0402_25V7K
1
2
1.05VSET
VFB=2.75V
1
2
3
4
5
6
OZ813A_DREF
1
2
PR112
100K_0402_1%
1
2
PR113
75K_0402_1%
PC81
0.1U_0402_16V7K
2
1
PC80
0.022U_0402_16V7K
2
1
PR111
24K_0402_1%
1
2
PR110
0_0402_5%
2
1
PR109
1K_0402_1%
1
2
PU7
PC82
1U_0603_6.3V6M
DH_1.05V-2
PQ27
SI4810BDY-T1-E3_SO8
PC71
1000P_0402_50V7K
+5VALW
PR108
22_0402_1%
1
2
SUSP#
PQ26
SI4800BDY-T1-E3_SO8
LX_1.05V
1.05VSET
PC73
0.01U_0402_25V7K
<17,28,33,34,41,43,49,50>
PR103
0_0402_5%
2
1
PC69
1
2
G
S
S
S
4
3
2
1
PR101
@ 0_0402_5%
@
1
2
PR102
DH_1.05V-1
1
2
0_0603_5%
4.7U_1206_25V6K
PC70
2
1
5
6
7
8
D
D
D
D
1
PR100
1K_0402_1%
1.05VS2N
1.05VS2P
JUMP_43X118
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
1.05VSP/1.8VP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
48
of
52
PJ17
2
B+
D
JUMP_43X118
PHASE_1.5V
0_0603_5%
2
1 PR127
PC99
0_0603_5%
+5VALW
BOOT_1.5V
2
0.1U_0402_16V7K
PR128
0_0603_5%
13
14
15
VCC
FCCM
PVCC
12
LG
11
PGND
10
ISEN
1 PR129 2 6269_1.5V
4.7_0603_5%
1
2
4
3
2
1
BOOT
UG
PHASE
VIN
PGOOD
GND
1
PC104
2.2U_0603_6.3V6K
LG_1.5V
PL4
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
PR130
2
5
6
7
8
PR137
4.7_1206_5%
D
D
D
D
PQ31
SI4810BDY-T1-E3_SO8
OCP==>7A~~8.5A
+1.5VSP
Vripple==>40mV
PC112
220U_6.3V_M
2
2
4
3
2
1
ISEN_1.5V
1
PR134
4.42K_0402_1%
ISL6269ACRZ-T_QFN16_4X4
PR136
2.26K_0402_1%
PC105
680P_0603_50V7K
PC103
0.01U_0402_25V7K
PR133
57.6K_0402_1%
PR135
1.5K_0402_1%
+1.5VSP
PR132
49.9K_0402_1%
PC101
22P_0402_50V8J
+1.5VSP
1
G
S
S
S
COMP
EN
PC100
0.1U_0402_16V7K
@
0_0402_5%
VO
0_0402_5%
2
1
<17,28,33,34,41,43,48,50> SUSP#
FSET
PR131
C
FB
PC106
2.2U_0603_6.3V6K
6269_1.5V
PQ30
SI4800BDY-T1-E3_SO8
G
S
S
S
PU8
16
17
D
D
D
D
10K_0402_5%
5
6
7
8
PR125
PC96
4.7U_1206_25V6K
PR126
6269_1.5V
PC98
4.7U_1206_25V6K
PC102
6800P_0402_25V7K
PJ18
JUMP_43X79
@
+5VALW
PC108
1U_0603_6.3V6M
PC107
10U_0805_6.3V6M
PU12
3
4
+1.25VSP
OCP==>3A
1
1
2
APL5913-KAC-TRL_SO8
PR140
1.15K_0402_1%
PC111
22U_1206_6.3V6M
PC109
0.01U_0402_25V7K
PC110
0.1U_0402_16V7K
@
FB
EN
POK
GND
VOUT
VOUT
8
7
0_0402_5%
VCNTL
VIN
VIN
<17,28,33,34,41,43,48,50> SUSP#
PR138
1
6
5
9
PR139
2K_0402_1%
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
1.5VSP/1.25VP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
49
of
52
+3VS
D
PJ11
JUMP_43X79
Un-pop 2.5VSP for UMA and DIS sku
+5VS
PC123 @
10U_0805_6.3V6M
PC122
@
1U_0603_6.3V6M
PU9
VCNTL
VIN
VIN
8
7
EN
POK
VOUT
VOUT
3
4
FB
+2.5VSP
1
PC126
2
2.15K_0402_1%
APL5913-KAC-TRL_SO8
@
PC124
2
1
2
PC127
@0.1U_0402_16V7K
@ PR150
GND
<17,28,33,34,41,43,48,49> SUSP#
6
5
9
0.01U_0402_25V7K
22U_1206_6.3V6M
PR149
0_0402_5%
@ PR151
1K_0402_1%
PJ12
JUMP_43X118
+1.8V
PU10
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
PR152
1K_0402_1%
1
S
PR154
1K_0402_1%
2
G
PC131
22U_1206_6.3V6M
PC132
0.1U_0402_16V7K
PC129
1U_0603_6.3V6M
+0.9VSP
0_0402_5%
1
2
SUSP
APL5331KAC-TRL_SO8
PR153
<43>
+3VALW
1
VIN
PC128
10U_0805_6.3V6M
PQ34
RHU002N06_SOT323-3
PC130
0.1U_0402_16V7K
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
+2.5VSP/0.9VSP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
50
of
52
+5VS
CPU_B+
B+
PR155
33
D2
LX1
28
LX1__CPU
CPU_VID3
34
D3
DL1
26
DL1__CPU
<5>
CPU_VID4
35
D4
PGND1
27
<5>
CPU_VID5
36
D5
GND
18
<5>
CPU_VID6
37
D6
CSP1
17
TIME
CSN1
16
CSN1_CPU
CCV
FB
12
FB_CPU
<5>
11
REF
CCI
10
DPRSLPVR
DH2
21
DH2_CPU-1
BST2
20
BST2_CPU
LX2
22
LX2_CPU
DL2
24
DL2__CPU
PGND2
23
40
PSI
PWRGD
CLKEN
DPRSTP
D
D
D
D
G
S
S
S
PR183
1
4
3
2
1
0_0402_5%
1
2
<5>
VSSSENSE
VSSSENSE
2
1
PR187
3K_0603_1%
PC138
2200P_0402_50V7K
2
1
PC139
100U_25V_M
PC137
0.1U_0603_25V7K
2
1
100_0402_1%
PC148
4700P_0402_25V7K
@
PC149
470P_0603_50V8J
CPU_B+
PQ38
SI7686DP-T1-E3_SO8
2.2_0603_5%
PR195
1
2 DH2_CPU-2
PR197
@ 10_0402_5%
PR184
PC157
0.1U_0402_16V7K
3
2
1
PR196 10K_0402_1%
1
2
PC158
680P_0603_50V7K
4
3
2
1
DL2__CPU
G
S
S
S
4
3
2
1
PL15
0.36H_ETQP4LR36WFC_24A_20%
G
S
S
S
PQ40
SI4856DY-T1-E3_SO8
D
D
D
D
D
D
D
D
5
6
7
8
5
6
7
8
2
PR198
4.7_1206_5%
POUT
PC136
10U_1206_25V6M
2
1
1
PR192
100_0402_1%
PR189
20K_0402_1%
<4> H_PROCHOT#
PR194
4700P_0402_25V7K
@PR193
@
PR193
56_0402_5%
1
NTC PR186
@ 3K_0603_1%
PC151
2
1
+3VS
PR191
@ 10K_0402_5%
1
PR190
0_0402_5%
PC150
MAX8770GTL+_TQFN40
41
TP
POUT
VCCSENSE
PC147 @ 0.022U_0402_16V7K
CPU_VCC_SENSE
1
2
3.65K_0402_1%
2
2
GNDS
PR180
CSN2__CPU
13
15
0.22U_0603_16V7K
PR176
0_0402_5%
PR179 @ 3K_0603_1%
1
2
BSTM2_CPU
2
0_0402_5%
@ PR188
@PR188
1
2
1
14
CSN2
PR178 0_0402_5%
1
2
VR_ON
CSP2
VRHOT
<34>
SHDN
CLK_ENABLE#
1
VGATE
38
PR182
@ 2K_0402_1%
<8,22>
2
PR181
10K_0402_1%
PR185
0_0402_5%
CSP2_CPU
PC145
PQ37
SI4856DY-T1-E3_SO8
0_0402_5%
H_PSI#
+3VS
0.22U_0603_16V7K 39
CCI_CPU
PH2 NTC
2
10KB_0603_5%_ERTJ1VR103J <5>
1
2
<5,8,21> H_DPRSTP#
0_0402_5%
PC146
3.48K_0402_1%
PR172
2
1
PR199
2.1K_0402_1%
<8,22> PM_DPRSLPVR
499_0402_1%
1
PC144
CSP1__CPU
+CPU_CORE
CPU_VID2
<5>
+CPU_CORE
PL14
0.36H_ETQP4LR36WFC_24A_20%
2
1
<5>
PQ36
SI4856DY-T1-E3_SO8
10_0402_5%
1
DH1__CPU-1
29
PR171
DH1
PC156
2200P_0402_50V7K
2
1
D1
PC155
0.1U_0603_25V7K
2
1
32
PC154
10U_1206_25V6M
2
1
PC153
10U_1206_25V6M
2
1
PC152
10U_1206_25V6M
2
1
CPU_VID1
0.22U_0603_16V7K
PC142
BSTM1_CPU 1
2
<5>
0_0603_5%
PR162
2
PC143
680P_0603_50V7K 2.1K_0402_1%
PR168
1
2
BST1_CPU
PR166
4.7_1206_5%
2
1
30
3
2
1
BST1
5
6
7
8
D0
5
6
7
8
31
71.5K_0402_1%
1
7
PC135
10U_1206_25V6M
2
1
PR177
47P_0402_50V8J
1
PR175
CPU_VID0
PR173 2
PR174
<5>
DL1__CPU
PR170 0_0402_5%
TON
D
D
D
D
PR169 0_0402_5%
VDD
THRM
G
S
S
S
PR167 0_0402_5%
25
Vcc
4
3
2
1
PR165 0_0402_5%
+
2
2.2_0603_5%
PR159
1
2DH1_CPU-24
0_0603_5%
PR164 0_0402_5%
19
0.22U_0603_16V7K
PR163 0_0402_5%
VCC
PQ35
SI7686DP-T1-E3_SO8
PU11
NTC
100K_0402_5%
PR160
1
2
PR161 0_0402_5%
PC141
1U_0603_6.3V6M
200K_0402_1%
2 PR157 1
2
2
PR158
13K_0402_5%
PC140
2.2U_0603_6.3V6K
PC134
10U_1206_25V6M
2
1
0_1206_5%
PR156
10_0402_5%
PL13
HCB4532KF-800T90_1812
1
2
1
PC133
0.01U_0402_25V7K
5VS12
PR200
3.48K_0402_1%
1
2
NTC
1
PH3
2
10KB_0603_5%_ERTJ1VR103J
PQ39
SI4856DY-T1-E3_SO8
1
PR201 0_0402_5%
1
2
2005/10/17
Deciphered Date
2006/10/17
5
0.22U_0603_16V7K
Compal Secret Data
Issued Date
PC159
Title
+CPU_CORE
Custom
Date:
Rev
0.1
Sheet
1
51
of
52
Pre EVT
page
Reason for change
Modify list
P50
For H/W 0.9V sequence deamd
Delete PQ34
Modify Bead to Jump for costdown
PL1,PL2,PL4,PL7,PL10
Modify 10UH/X6S to 10UH/X5R for common source
PC53,PC57,PC96,PC116,PC134,PC135,PC136,PC152,PC153,PC154
Modify CH751H to RB751V for common source
PD10
Keep Batt_OVP to 1.5V
Change PR78 form 150K to 105K
Take out PC148 & PC150 form VTT tool test
Delete PC148 &PC150
Adjust PR183 to 39.2K for loadline
PR183
Modify CPU_High side form SI7840 to SI7686

for vender shortage
PQ35,PQ38
Modify PosCAP to Alu CAP for cost
PC63,PC87,PC99
DFX footprint issue, Modify RLS4148_LLDS2 to LL34
PD2,PD4
Add skip mode function form skip pin of 3/5V IC
PR203
ADD Battery in function in page 45
PR204,PR205,PR206,PR207,PR208,PC51,PC52,PQ41
Defence charger IC leakage current in page 46
PR57,PR209,PR210,PR211,PR212,PC118,PC97,PC56,PD16,PD17,PQ42,PQ43,PQ44
ADD Battery in and DC-IN Bead
PL1,PL2
DVT
95/12/28
PC30
ADD 100PF in SPOK PIN for noise but unpop

B
ADD CPU high side gate resister 2.2 OHM for EMI demand PR159,PR195
96/01/03
Change PR137 to L/F
PR137
Change PR95 form 6.81K to 6.49K for power loss
PR95
Disable battery in function, EC control
Modify 0.01U_0402 to 1000P_0402
PC1,PC4
Remove PR1 & PD1 for cost
PR1,PD1
Modify AO4407 to FDS4435 for UMA cost
PQ10,PQ11,PQ9
Modify RB751V to 1SS355 for cost
PD12,PD13,PD14,PD15,PD10
Remove 2.5VSP function for UMA
PR149,PR150,PR151,PC122,PC123,PC124,PC126,PC127,PU9
Change 1.05VSP High/Low side MOS for cost
PQ26,PQ27
Change 0.9UH to 1.8uH for 1.05vsp cost
PL8
Change PC72 330U/R9 to 330U/R15. and del PC88
PC72,PC88
Add PR207 280K_0402 and delete PR202
PR207,PR202
Modify PC139 for 100uH at 3000hurs
PC139
Modify charge Low side gate to SI4800BDY
PQ19
2005/10/17
Issued Date
Compal Secret Data
Deciphered Date
2006/10/17
3
Title
Power PIR
Custom
Date:
Rev
0.1
Sheet
1
52
of
52
page
Reason for change
96/01/03
DVT
96/01/19
DVT-2
96/01/19
PVT
Modify list
Disable battery in function, EC control
Modify 0.01U_0402 to 1000P_0402 for common design
PC1,PC4
Remove PR1 & PD1 for common design
PR1,PD1
Modify AO4407 to FDS4435 for UMA
PQ10,PQ11,PQ9
Modify RB751V to 1SS355 for common design
PD12,PD13,PD14,PD15,PD10
Remove 2.5VSP function for UMA sku
PR149,PR150,PR151,PC122,PC123,PC124,PC126,PU9
Change 1.05VSP High/Low side MOS for rating
PQ26(SI4800),PQ27(Si4810)
Change 0.9UH to 1.8uH for 1.05vsp rating
PL8
Change PC72
form 330U/R9 to 330U/R15. and del PC88 for rating
PC72,PC88
Add PR107 280K_0402 and delete PR202 for 1.05VSP OCP
PR107,PR202
Modify PC75 form 4700P to 3300P for 1.05VSP OCP
PC75
Modify PC139 for 100uH at 3000hurs
PC139
Modify charge Low MOS gate to SI4800BDY
PQ19
Disable CC-CV overshoot function , need verify it.
PQ44
0.9V sequence for H/W deamd

Change CPU low side mos to SI4856
Add PQ34
PQ36,PQ37,PQ39,PQ40
Chage 1.5V/1.25V dual to single and LDO portion
DEL
PR141,PR143,PR144,PR145,PR146,PR148,PC110,PC113,PC114,PC115,PC116,PC117,PC120,PC121,PL11,PL12,
PQ32,PQ33,PD14,PD15
ADD
PR125,PR126,PR136,PU12,PL4
Modify PR128,PR129,PR130,PR131,PR132,PR133,PR134,PR135,PR136,PR137,PR138,PR139,PR140
PC96,PC98,PC99,PC101,PC102,PC103,PC104,PC105,PC106,PC107,PC108,PC109,PC111,PC112
PU8
Combine PU5 LM358 and PU3 LM393
Del PU5,ADD PD8
Change PD5 form RB751 to RLS4148 for cost
PD5
Change 0.1U_0603 to 0.1U_0402 for cost
PC49,PC50,PC74,PC84,PC81
Remove PC147 for cost
PC147
Change PC128 form 10U_1206 to 10U_0805 for cost
PC128
96/02/16
PVT
Modify CPU OTP 85 degree C to 89 degree C for thermal request
PR42_78.7K,
PR38_10K
2005/10/17
Issued Date
Compal Secret Data
Deciphered Date
2006/10/17
5
Title
Power PIR
Custom
Date:
Rev
0.1
Sheet
1
52
of
52

IFTXX M/B LA-3541P Schematic Block Diagram and Notes

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12/21 Add PJP1 for DCIN Cable on 45 Level

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