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Proiectare VLSI

Evolutie, clasificari, tehnologii,


terminologie, principii

Proiectare VLSI
Curs: (2+1)C
Aplicatii: 1,5L (4C), 1L (4AIA - opt), 2L (4EA)
CURS
- http://alin.usv.ro
Link: Undergraduate courses
- Platforma educationala USV
http://portal.usv.ro/ael
APLICATII
http://www.eed.usv.ro/~iulia/labs.html

Istoria integrarii

SSI:
60, 10 porti*/chip (10)
MSI:
70, 100 -1000 porti/chip (102)
LSI:
80, 1000 10000 porti/chip (104)
VLSI:
90, 10k 100k porti/chip (105)
ULSI:
2000 1M 10M porti/chip (107)
WSI, SoC, 3D-IC (>107)

Poarta echivalenta = o structura NAND (NOR in


cazul IBM), realizata cu 4 tranzistoare.

Evolutia Tehnologiilor VLSI

Evolutia
performantelor
VLSI

Familii logice VLSI

Maturitatea tehnologiilor VLSI

Interfatarea familiilor VLSI

Performante VLSI

Gama tensiunilor de alimentare

Efectul tensiunii de alimentare


asupra vitezei de comutatie

Tehnologii Low-Voltage

Structura integrata VLSI


Upper
interconnect
layers on an
Intel 80486DX2
microprocessor
die

Obiectivele proiectarii VLSI

Viteza / performanta
Consum de putere cat mai mic
Arie ocupata redusa
Incapsulare adecvata

Structura generica a circuitelor VLSI


1.Transistoare
2. Conexiuni
nMOS

pMOS

design

Circuits
CMOS logic gates
[10] http://scale.engin.brown.edu/classes/EN1600S08/

Structura interna a unui circuit integrat

wires

transistors

inventatorii
circuitului
integrat
(1958)

Fiz. Robert Noyce

Jack Kilby, premiul Nobel 2000


[10] http://scale.engin.brown.edu/classes/EN1600S08/

Structura integrata VLSI

Quad core from


Intel: ~600 million
transistors in 286
mm2

Legea lui Moore: Numarul de tranzistioare dintr-un circuit integtrat


se dubleaza la fiecare 2ani !
[10] http://scale.engin.brown.edu/classes/EN1600S08/

Ordin de marime

Human Hair
~75 m
.

0.18 m
180 nm
feature

~40,000 (65-nm node) tranzistoare incap intr-o sectiune transversala

[C. Keast]
[10] http://scale.engin.brown.edu/classes/EN1600S08/

Tehnologii VLSI

Comparatie arhitecturi

Etapele principale de realizare a unui CI


1. idea (need)

3. design
system

4. analyze/
model
system

if satisfactory

2. write
specifications

5. Fabrication
6. test / work
as modeled?

[10] http://scale.engin.brown.edu/classes/EN1600S08/

Sinteza si analiza
VHDL / Verilog / SystemC
schema fizica

compilare/
sinteza

definire masca

realizare conexiuni

amplasare layout

[10] http://scale.engin.brown.edu/classes/EN1600S08/

Realizare circuit
tapeout

mask layout patterns

mask writer

masks
printing

test and
packaging
Dice (taiere
in cuburi)

chip

Die (stanta)

wafer
[10] http://scale.engin.brown.edu/classes/EN1600S08/

Structuri integrate VLSI

PLD

Structura de
principiu a unui
circuit generic
PLD

Caracteristici PLD

AND

OR

Fix

Programabil

PLA

Programabil

Programabil

PAL

Programabil

Fix

PROM

PLD Programmable Logic Devices

Principiul PLA/PAL

Implementarea unui sumator complet cu PLA


A Programmable Logic Array performs any function
in sum-of-products form.
Literals: inputs & complements
AND Plane
Products / Minterms: AND of literals
Outputs: OR of Minterms
Example: Full Adder

OR Plane

bc
ac

abc

abc
abc

s abc abc abc abc


cout ab bc ac

b
Inputs

S. Reda EN1600 SP08

Minterms

ab
abc

cout

Outputs

[10] http://scale.engin.brown.edu/classes/EN1600S08/

FPGA - principiu
FPGA Field
Programmable Gate
Arrays
Contin celule logice
programabile intern ca
si functie logica si
conexiuni
programabile pe
orizontala si verticala
Programabile sau
reprogramabile in
campul de lucru

Structura logica FPGA

Chip-ul FPGA

Elemente functionale tipice FPGA


Elemente logice / Logic Elements (LEs)
Conexiuni / Routing
Blocuri de intrare-iesire / Input-Output logic

Alte facilitati / Extra features


clocking
memory
memory interfaces
Multipliers
Etc.

Elementul logic FPGA generic

Programmable logic blocks (lookup tables)

a
b
c

Truth table

&
|
y = (a & b) | !c

Programmed LUT

a b c

SRAM cells

0
0
0
0
1
1
1
1

1
0
1
1
1
0
1
1

1
0
1
1
1
0
1
1

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

000
001
010
011
100
101
110
111

8:1 Multiplexer

Required function

abc

-Informatia programabila poate fi stocata in SRAM sau FLASH


-LUT uzuale au in mod tipic 4 intrari
[10] http://scale.engin.brown.edu/classes/EN1600S08/

Arhitectura FPGA tipica


a
b
c
d

4-input
LUT

y
mux
flip-flop
q

e
clock

Switch
box

Programmable
interconnect
Programmable
logic blocks

[10] http://scale.engin.brown.edu/classes/EN1600S08/

ASIC
ASIC-uri realizate initial pe arii de porti
(1980)

Channeled

Channelless

ASIC
ASIC realizat pe celule standard, avand
functionalitate predifinita si performante
cunoscute (1990)

ASICs
vs.
FPGAs

ASICs vs. FPGAs

Proiectarea cu FPGA vs. ASIC

DFT = Design For testability


http://www.xilinx.com/fpga/asic.htm

Proiectarea cu FPGA vs. ASIC

http://www.xilinx.com/

Programabilitate (1)

http://www.fpga-guide.com

Programabilitate (2)

Antifuzibil (antifuse) (1)


A programmable chip technology that
creates permanent, conductive paths
between transistors.
In contrast to "blowing fuses" in the
fusible link method, which opens a
circuit by breaking apart a conductive
path, the antifuse method closes
the circuit by "growing" a
conductive via.
Two metal layers sandwich a layer of
non-conductive, amorphous silicon.
When voltage is applied to this middle
layer, the amorphous silicon is turned
into polysilicon, which is conductive.

http://encyclopedia2.thefreedictionary.com/antifuse

Antifuzibil (antifuse) (2)


Procesul fizic de realizare a caii coductuctoare
(Actel)

Antifuzibil (Antifuse) (2)


Procesul fizic de realizare a caii coductuctoare
(Qick Logic)

Structura logica programabila, cu antifuzibile

EPROM

Tranzistor MOS cu
poarta flotanta

http://web.eecs.umich.edu/~prabal/teaching/eecs373-f10/readings/rom-eprom-eeprom-technology.pdf

EPROM / EEPROM
programable technology

EEPROM

Flash
- FLASH utilizeaza tranzistoare cu poarta flotanta ca si EEPROM
- Celule flash NOR sunt conectate in paralel si pot fi operate individual
- Celule flash NAND sunt conectate in serie, nu pot fi programate individual iar
citirea se face in serie
NOR FLASH

NAND FLASH

Comparatie NAND/NOR Flash

SRAM
Avantaje:
Reconfigurare dinamica
Densitate crescuta
Evolutie rapida odata cu tehnologiile de stocare
SRAM generale
Flexibilitate
Dezavantaje:
Volatile
Consum de energie ridicat

Configurare cu SRAM

Aproape toate famililiile FPGA folosesc SRAM

Celulele SRAM sunt utilizate in 3 moduri:


Implementare de functii logice LUT
Ca blocuri de memorie inglobate (buffer stocare)
Ca elemente de control comutatoarelor de configurare si a rutelor

Utilizare SRAM
MUX comandat cu
celule SRAM

Tranzistor de trecere
comandat cu SRAM

SRAM
1 bit
B0
SRAM
B1
SRAM

MUX

Nod de conectare si LUT cu SRAM

Matrice programabila de
comutatoare

Structura programabila cu SRAM

Programmable interconnects (global)

Switch
box

[10] http://scale.engin.brown.edu/classes/EN1600S08/

Programarea FPGA
Configuration data in
Configuration data out

= I/O pin/pad
= SRAM cell

[10] http://scale.engin.brown.edu/classes/EN1600S08/

Facilitati oferite de FPGA moderne

Etapele proiectarii unui sistem


digital
Descriere
comportamentala

Implementare
fizica
Sinteza

Descrierea unui circuit folosind mijloace adecvate


(HDLs)
Simulare logica
Sinteza functionala pe baza instrumentelor specifice
Simulare functionala
Implementare fizica
Testare

Niveluri de proiectare VLSI

Etape in proiectarea VLSI

Overview