Documente Academic
Documente Profesional
Documente Cultură
Time: 3 Hours
(100)
2. Design and implement half adder and full adder combinational circuits using basic
logic gates.
(100)
3. Design and implement half subtractor and full subtractor combinational circuits using
basic logic gates.
(100)
4. Design and implement 4-bit Binary to gray code converter and Gray to binary code
converter using basic logic gates.
(100)
5. Design and implement 4-bit BCD to excess-3 code converter and Excess-3 to BCD
code converter using basic logic gates.
(100)
(100)
(100)
8. Design and implement an 8-bit odd parity generator / checker using IC 74180. (100)
2/2
9. Design and implement an 8-bit even parity generator / checker using IC 74180. (100)
10. Design and implement multiplexer and demultiplexer using logic gates.
(100)
(100)
(100)
13. Design and implement 4-bit shift register under serial-in serial-out mode.
(100)
14. Design and implement 4-bit shift register under serial-in parallel-out mode.
(100)
15. Design and implement 4-bit shift register under parallel-in serial-out mode.
(100)
16. Design and implement 4-bit shift register under parallel-in parallel-out mode. (100)
17. Perform the simulation of half adder and full adder combinational circuits using
VHDL or Verilog HDL.
(100)
18. Perform the simulation of half subtractor and full subtractor combinational circuits
using VHDL or Verilog HDL.
(100)
19. Perform the simulation of 4-bit asynchronous (ripple) counter using VHDL or
Verilog HDL.
(100)
20. Perform the simulation of 4-bit Synchronous up/down counter using VHDL or
Verilog HDL.
(100)
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