Sunteți pe pagina 1din 38

A

Compal confidential
Brazos-Delhi 10AB

PWWBE LA-6849P Schematics Document


Mobile AMD APU ZACATE-FT1 + FCH Hudson-M1
3

2010-11-22 Rev. 1.0

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

of

38

Compal Confidential
Model Name : PWWBE
File Name : LA-6849P

Memory BUS(DDRIII)
Single Channel

AMD Zacate APU

LVDS

Fan Control

page 5

CRT

page 9,10

BANK 0, 1, 2, 3
1.5V DDRIII 1066/1333MHZ

FT1
BGA 413-Ball
19mm x 19mm

page 17

200pin DDRIII-SO-DIMM X2
1

RTL8105E 10/100M

PCIe 1x

RJ45

PCIe port 2
page 19

LAN

page 19

page 5,6,7,8
page 16

PCIe 1x

WLAN
PCIe port3
page 18

x4 UMI Gen. 1
2.5GT/s per lane

Hudson M1
BT Combo

IO/B-- USB Right

USB port 6
page 18

USB port 0,1

BGA 605-Ball
23mm x 23mm

page 18

USB

Card Reader
USB port7
page 20

Int. Camera

5V 480MHz

SATA port 0

USB port 5
5V 1.5GHz(150MB/s)

page 17

SATA port 1
5V 1.5GHz(150MB/s)

SATA HDD

page 18

SATA ODD

page 18

page 11,12,13,14,15
3

RTC CKT.

SPI ROM
page 24

Power On/Off CKT.


page 30

Power/B
LPC BUS

page 26

3.3V 33 MHz

page 25

DC/DC Interface CKT.

HD Audio

3.3V/1.5V 24MHz

HDA Codec
ALC259

Power Circuit DC/DC

page 21

page 27,28,29,30,31
32,33,34,35

Debug Port

ENE KB926 E0
page 23

page 24

Int.
MIC CONN
page 17

Touch Pad

Int.KBD

page 25

page 24

2010-09-09

2010-09-09

Deciphered Date

Title

Date:

SPK CONN
page 22

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

HP CONN
page 22

page 24

Compal Secret Data

Security Classification
Issued Date

MIC CONN
page 22

EC ROM

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010

Sheet
E

of

38

DESIGN CURRENT 0.1A

+3VL

DESIGN CURRENT 0.1A

+5VL

DESIGN CURRENT 1A

+3VALW

DESIGN CURRENT 3.5A

+5VALW

B+
RT8205EGQW

SUSP
N-CHANNEL
SI4800

DESIGN CURRENT 2A

+5VS

DESIGN CURRENT 330mA

+3V_LAN

DESIGN CURRENT 1.5A

+3VS

DESIGN CURRENT 1A

+LCD_VDD

DESIGN CURRENT 300mA

+2.5VS

DESIGN CURRENT 2.5A

+1.8VS

DESIGN CURRENT 0.3A

+1.1VALW

DESIGN CURRENT 3.5A

+1.1VS

DESIGN CURRENT 6A

+NB_CORE

DESIGN CURRENT 18A

+CPU_CORE0

DESIGN CURRENT 18A

+CPU_CORE1

DESIGN CURRENT 4A

+VDDNB

DESIGN CURRENT 5A

+1.5V

DESIGN CURRENT 1A

+1.5VS

DESIGN CURRENT 1A

+0.75VS

DESIGN CURRENT 1.5A

+1.05VS

WOL_EN#
P-CHANNEL
AO-3413
SUSP
N-CHANNEL
SI4800

ENVDD
P-CHANNEL
AO-3413

APL5508
PWWAE LC-Marseille AMD

SUSP#
MP2121DQ

POK
RT8209BGQW
VLDT_EN#
N-CHANNEL
IRF8113
VLDT_EN#
N-CHANNEL
IRF8113

VR_ON
B

ISL6265A

SYSON
RT8209BGQW

SUSP
N-CHANNEL
IRF8113
SUSP
APL5331KAC
VR_ON#

APL5331KAC

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


1

of

38

Voltage Rails
O : ON
X : OFF

+5VS

power
plane

+3VS
+1.8VS
+1.5VS

State

+B

+5VALW

+3VL

+3VALW

+5VL

+1.1VALW

+1.1VS
+1.5V

Platform

+1.05VS

CPU
APU FT1

Brazos

+0.75VS

SB
FCH M1

VGA
NA

EC

Comment

KB926

+AGP_CORE

+RTCVCC

+APU_VDDNB

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery


don't exist

@ : just reserve , no build


CONN@ : just reserve for Connector only
8105E_VC@: just reserve for 10/100 LAN VC version only
8105E_VB@: just reserve for 10/100 LAN VBversion only
HDT@:just reserve for JHDT connector
E240@ : AMD E240 1.5Ghz CPU only
E350@ : AMD E350 1.6Ghz CPU only

SMBUS Control Table


3

SOURCE

FCH SM Bus0 address

FCH SM Bus1 address

Power

Power

HEX

Device

Address

+3VS

DDR SO-DIMM 0 A0 H

1010 0000 b

+3VS

DDR SO-DIMM 1 A4 H

1010 0100 b

Device

HEX

Address

EC_SMB_CK1

KB926

EC_SMB_DA1

LCD_EDID_DATA
D_DDCCLK

Power

Device

Power

+3VL

Smart Battery 16H

HEX

Address

Device

HEX

0001 011X b

Address

D_DDCDATA
FCH_SMCLK0
FCH_SMDAT0
FCH_SMCLK1
FCH_SMDAT1

CRT
DDC
ROM

WLAN

LCD
DDC
ROM

APU

KB926

EC_SMB_DA2
LCD_EDID_CLK

EC SM Bus2 address

SODIMM
I / II

EC_SMB_CK2

EC SM Bus1 address

BATT

APU FT1

APU FT1

FCH M1

FCH M1

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

of

38

P_GPP_RXP0
P_GPP_RXN0

AB4
AC4

P_GPP_RXP1
P_GPP_RXN1

19 PCIE_PTX_C_IRX_P2
19 PCIE_PTX_C_IRX_N2

AA1
AA2

P_GPP_RXP2
P_GPP_RXN2

18 PCIE_PTX_C_IRX_P3
18 PCIE_PTX_C_IRX_N3

Y4
Y3

P_GPP_RXP3
P_GPP_RXN3

AA12
Y12

11 UMI_RX0P
11 UMI_RX0N

Y14

P_ZVDD_10

AA10
Y10

P_UMI_RXP1
P_UMI_RXN1

11 UMI_RX2P
11 UMI_RX2N

AB10
AC10

P_UMI_RXP2
P_UMI_RXN2

11 UMI_RX3P
11 UMI_RX3N

AC7
AB7

P_UMI_RXP3
P_UMI_RXN3

AB6
AC6

P_GPP_TXP1
P_GPP_TXN1

AB3
AC3

P_GPP_TXP2
P_GPP_TXN2

Y1
Y2

P_ZVSS

P_UMI_RXP0
P_UMI_RXN0

11 UMI_RX1P
11 UMI_RX1N

P_GPP_TXP0
P_GPP_TXN0

P_GPP_TXP3
P_GPP_TXN3

LAN

PCIE_ITX_PRX_P2 0.1U_0402_25V6
PCIE_ITX_PRX_N2 0.1U_0402_25V6

2
2

1 C1264
1 C1265

PCIE_ITX_C_PRX_P2 19
PCIE_ITX_C_PRX_N2 19

PCIE_ITX_PRX_P3 0.1U_0402_25V6
PCIE_ITX_PRX_N3 0.1U_0402_25V6
R994
AA14
1
2
1.27K_0402_1%

2
2

1 C1268
1 C1269

PCIE_ITX_C_PRX_P3 18
PCIE_ITX_C_PRX_N3 18

V3
V4

AB12
AC12

UMI_TX0P_C
UMI_TX0N_C

C1270 1
C1271 1

2 0.1U_0402_25V6
2 0.1U_0402_25V6

UMI_TX0P 11
UMI_TX0N 11

P_UMI_TXP1
P_UMI_TXN1

AC11
AB11

UMI_TX1P_C
UMI_TX1N_C

C1272 1
C1273 1

2 0.1U_0402_25V6
2 0.1U_0402_25V6

UMI_TX1P 11
UMI_TX1N 11

P_UMI_TXP2
P_UMI_TXN2

AA8
Y8

UMI_TX2P_C
UMI_TX2N_C

C1274 1
C1275 1

2 0.1U_0402_25V6
2 0.1U_0402_25V6

UMI_TX2P 11
UMI_TX2N 11

P_UMI_TXP3
P_UMI_TXN3

AB8
AC8

UMI_TX3P_C
UMI_TX3N_C

C1276 1
C1277 1

2 0.1U_0402_25V6
2 0.1U_0402_25V6

UMI_TX3P 11
UMI_TX3N 11

P_UMI_TXP0
P_UMI_TXN0

UMI I/F

+1.05VS

1
2 R993
2K_0402_1%

PCIE I/F

U1A
AA6
Y6

WLAN

Zacate-FT1_BGA_413P-T
@

U1

U1

E240

E350

E240@

E350@
+5VS

1A

1
1
2
3
4

23 EN_DFAN1

EN
VIN
VOUT
VSET

GND
GND
GND
GND

8
7
6
5

C1121
1000P_0402_25V8J

1
2
3

1
2
3

4
5

GND
GND

+FAN1

1
@

U31

+3VS

JFAN

R795
10K_0402_5%
2

C1119
10U_0805_6.3V6M

2
C1120
10U_0805_6.3V6M

+FAN1

ACES_85204-0300N
CONN@

FAN_SPEED1 23

APL5607KI-TRG_SO8

2
@
1

C1122
0.01U_0402_25V7K

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

of

38

U1E

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

9,10 DDR_A_DQS0
9,10 DDR_A_DQS#0
9,10 DDR_A_DQS1
9,10 DDR_A_DQS#1
9,10 DDR_A_DQS2
9,10 DDR_A_DQS#2
9,10 DDR_A_DQS3
9,10 DDR_A_DQS#3
9,10 DDR_A_DQS4
9,10 DDR_A_DQS#4
9,10 DDR_A_DQS5
9,10 DDR_A_DQS#5
9,10 DDR_A_DQS6
9,10 DDR_A_DQS#6
9,10 DDR_A_DQS7
9,10 DDR_A_DQS#7
9
9
9
9
10
10
10
10

+1.5V

R9981

2 1K_0402_5%

DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK3
DDR_B_CLK#3

9,10 DDR_RST#
9,10 MA_EVENT_L

MA_EVENT_L

9,10 DDR_CKE0
9,10 DDR_CKE1

M_ADD0
M_ADD1
M_ADD2
M_ADD3
M_ADD4
M_ADD5
M_ADD6
M_ADD7
M_ADD8
M_ADD9
M_ADD10
M_ADD11
M_ADD12
M_ADD13
M_ADD14
M_ADD15

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

R18
T18
F16

M_BANK0
M_BANK1
M_BANK2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

D15
B19
D21
H22
P23
V23
AB20
AA16

M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7

A16
B16
B20
A20
E23
E22
J22
J23
R22
P22
W22
V22
AC20
AC21
AB16
AC16

M_DQS_H0
M_DQS_L0
M_DQS_H1
M_DQS_L1
M_DQS_H2
M_DQS_L2
M_DQS_H3
M_DQS_L3
M_DQS_H4
M_DQS_L4
M_DQS_H5
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7

DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK3
DDR_B_CLK#3

M17
M16
M19
M18
N18
N19
L18
L17

M_CLK_H0
M_CLK_L0
M_CLK_H1
M_CLK_L1
M_CLK_H2
M_CLK_L2
M_CLK_H3
M_CLK_L3

DDR_RST#
MA_EVENT_L

L23
N17

M_RESET_L
M_EVENT_L

DDR_CKE0
DDR_CKE1

F15
E15

M_CKE0
M_CKE1

9
9
10
10

DDR_A_ODT0
DDR_A_ODT1
DDR_B_ODT0
DDR_B_ODT1

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMB#
DDR_CS1_DIMMB#
9,10 DDR_A_RAS#
9,10 DDR_A_CAS#
9,10 DDR_A_WE#

DDR_A_ODT0
DDR_A_ODT1
DDR_B_ODT0
DDR_B_ODT1

W19
V15
U19
W15

M0_ODT0
M0_ODT1
M1_ODT0
M1_ODT1

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMB#
DDR_CS1_DIMMB#

T17
W16
U17
V16

M0_CS_L0
M0_CS_L1
M1_CS_L0
M1_CS_L1

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

U18
V19
V17

M_RAS_L
M_CAS_L
M_WE_L

B14
A15
A17
D18
A14
C14
C16
D16

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15

C18
A19
B21
D20
A18
B18
A21
C20

DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23

C23
D23
F23
F22
C22
D22
F20
F21

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31

H21
H23
K22
K21
G23
H20
K20
K23

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39

N23
P21
T20
T23
M20
P20
R23
T22

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47

V20
V21
Y23
Y22
T21
U23
W23
Y21

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55

Y20
AB22
AC19
AA18
AA23
AA20
AB19
Y18

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63

AC17
Y16
AB14
AC14
AC18
AB18
AB15
AC15

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

M_VREF

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

DDR_A_D8 9,10
DDR_A_D9 9,10
DDR_A_D10 9,10
DDR_A_D11 9,10
DDR_A_D12 9,10
DDR_A_D13 9,10
DDR_A_D14 9,10
DDR_A_D15 9,10
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

+1.5V

R999
1K_0402_1%
+MEM_VREF

M23

9
9
10
10

M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

R17
H19
J17
H18
H17
G17
H15
G18
F19
E19
T19
F17
E18
W17
E16
G15

9,10 DDR_A_BS#0
9,10 DDR_A_BS#1
9,10 DDR_A_BS#2

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

R1000

M_ZVDDIO_MEM_S

M22

2 39.2_0402_1%

C1280

+1.5V

1000P_0402_50V7K

Zacate-FT1_BGA_413P-T

R1001
1K_0402_1%

C1281
0.1U_0402_16V4Z

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR SYSTEM MEMORY

9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10
9,10

Close to CPU within


1"

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Compal Electronics, Inc.


SCHEMATICS,
MB A6849
Size Document Number
Custom
4019BASheet 6 of 38
Monday, December 06, 2010
Date:
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

Rev
B

U1B

TDP1_TXP2
TDP1_TXN2

A10
B10

TDP1_TXP3
TDP1_TXN3

17 LCD_TXOUT2+
17 LCD_TXOUT2-

B5
A5

LTDP0_TXP0
LTDP0_TXN0

17 LCD_TXOUT1+
17 LCD_TXOUT1-

D6
C6

17 LCD_TXOUT0+
17 LCD_TXOUT0-

A6
B6

LTDP0_TXP2
LTDP0_TXN2

17 LCD_TXCLK+
17 LCD_TXCLK-

D8
C8

LTDP0_TXP3
LTDP0_TXN3

+3VS
R1016 1

2 1K_0402_5%

APU_ALERT#_R

11
11

APU_CLK
APU_CLK#

V2
V1

11
11

DISP_CLK
DISP_CLK#

D2
D1

R1017 1

2 1K_0402_5%

APU_PROCHOT#

R1018 1 @

2 1K_0402_5%

APU_SIC

R1020 1 @

2 1K_0402_5%

APU_SID

34
34

R1149 1
R1150 1

APU_PROCHOT#

R1151 1

13 APU_ALERT#

T26PAD

2
2

1
B

1K_0402_5%

10K_0402_5%

T25PAD

R1033

P3
P4

SIC
SID

T3
T4

RESET_L
PWROK

2
2
2
2
2
2
2

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

T13PAD
R1031 1

34 APU_VDD0_RUN_FB_L

R1032 1

34 APU_VDDNB_RUN_FB_L

1 H_THERMTRIP#

2 0_0402_5%
2 0_0402_5%

H_THERMTRIP# 12

SVC
SVD

APU_SIC
APU_SID
2 0_0402_5%
2 0_0402_5%

R1152 1
R1153 1
R1154 1
R1155 1
R1156 1
R1157 1
R1158 1

DISP_CLKIN_H
DISP_CLKIN_L

J1
J2

34 APU_VDDNB_RUN_FB_H
34 APU_VDD0_RUN_FB_H

Q165

APU_THERMTRIP#

R1025 1

CLKIN_H
CLKIN_L

APU_SVC
APU_SVD

2 0_0402_5%
APU_THERMTRIP#
2 0_0402_5% APU_ALERT#_R

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#

+3VS

R1064

APU_SVC
APU_SVD

LDT_RST#
H_PWRGD

11 LDT_RST#
11,34 H_PWRGD

LTDP0_TXP1
LTDP0_TXN1

U1
U2
T2

PROCHOT_L
THERMTRIP_L
ALERT_L

N2
N1
P1
P2
M4
M3
M1

TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L

F4
G1
F3

VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDIO_MEM_S_SENSE

F1

VSS_SENSE

B4
W11
V5

TEST

2 0_0402_5% APU_PROCHOT#

DP MISC

D10
C10

VGA DAC

TDP1_TXP1
TDP1_TXN1

DISPLAYPORT 0

R1021 1

11 H_PROCHOT#

B9
A9

APU_DBREQ#
APU_SVC
APU_SVD
LDT_RST#
H_PWRGD
TEST_25_L
TEST36

CLK

300_0402_5%
1K_0402_5%
1K_0402_5%
300_0402_5%
300_0402_5%
510_0402_1%
1K_0402_5%

SER

1
2
2
1
1
2
2

CTRL

R1005 2
R1007 1
R1008 1
R1009 2
R1011 2
R1012 1
R1013 1

TDP1_TXP0
TDP1_TXN0

JTAG

A8
B8

DISPLAYPORT 1

R1003

+1.8VS

H3

DP_BLON
DP_DIGON
DP_VARY_BL

G2
H2
H1

TDP1_AUXP
TDP1_AUXN

B2
C2

RSVD_1
RSVD_2
RSVD_3

2 150_0402_1%

1
DP_BLON

UMA_ENVDD 17

TDP1_HPD

C1

R1065 1

LTDP0_AUXP
LTDP0_AUXN

A3
B3

LCD_EDID_CLK
LCD_EDID_DATA

LTDP0_HPD

D3

R1015 1

R1002 1

2 100K_0402_5%

R1014 1

2 0_0402_5% @ GMCH_INVT_PWM

GMCH_INVT_PWM 17

R1004 1

2 0_0402_5%

UMA_ENBKL 23

R1006 1

2 0_0402_5% @

R1010 1

2 0_0402_5%

GMCH_INVT_PWM

2 100K_0402_5%

LCD_EDID_CLK 17
LCD_EDID_DATA 17
2 10K_0402_5%

All LCD panel control by APU

+3VS

C12
D13
A12
B12
A13
B13

UMA_CRT_R

UMA_CRT_R 16

R987

2 150_0402_1% UMA_CRT_R

UMA_CRT_G

UMA_CRT_G 16

R988

2 150_0402_1% UMA_CRT_G

UMA_CRT_B

UMA_CRT_B 16

R989

2 150_0402_1% UMA_CRT_B

DAC_HSYNC
DAC_VSYNC

E1
E2

UMA_CRT_HSYNC
UMA_CRT_VSYNC

UMA_CRT_HSYNC 16
UMA_CRT_VSYNC 16

DAC_SCL
DAC_SDA

F2
D4

UMA_CRT_CLK
UMA_CRT_DATA

UMA_CRT_CLK 16
UMA_CRT_DATA 16

DAC_ZVSS

D12

TEST4
TEST5
TEST6
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST31
TEST33_H
TEST33_L
TEST34_H
TEST34_L
TEST35
TEST36
TEST37

R1
R2
R6
T5
E4
K4
L1
L2
M2
K1
K2
L5
M5
M21
J18
J19
U15
T15
H4
N5
R5

DAC_RED
DAC_REDB
DAC_GREEN
DAC_GREENB
DAC_BLUE
DAC_BLUEB

TEST38
DMAACTIVE_L

R1019 1

2 499_0402_1%
PAD T3
PAD T4
PAD T5

TEST15
TEST_18
TEST_19
TEST25_H
TEST_25_L
TEST28_H
TEST28_L
TEST31
TEST33_H
TEST33_L
TEST34_H
TEST34_L
TEST35
TEST36
TEST37

PAD T6
PAD T7

@
R1022 1

2 1K_0402_5%

R1023 1
R1024 1
R1026 1

2 1K_0402_5%
2 1K_0402_5%
2 510_0402_1%

PAD T9
PAD T8
PAD T10
C1282
C1283
PAD T11
PAD T12

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

1
1

R1029 1

PAD T14

R1030 1

K3
T1

R1027 1
R1028 1

2 51_0402_1%
2 51_0402_1%

2 1K_0402_5%
@

2 1K_0402_5%

TEST35 for HDMI function

+1.8VS

TEST35

ALLOW_STOP# 11
R1034 1

2 1K_0402_5%

+1.8VS

Zacate-FT1_BGA_413P-T

MMBT3904_NL_SOT23-3
@ D94
2

DP_ZVSS

Disable

Enable

1
CH751H-40PT_SOD323-2

TR DMN66D0LDW-7 2N
R1035
10K_0402_5%

@
APU_SID

1
6
@
Q8A
DMN66D0LDW-7 2N_SOT363-6

1
R1050

EC_SMB_DA

1
R1040
1
R1044

+1.8VS

JHDT1

R1036

+1.8VS

Vgs(th): min 1.0V


Typ 1.6V
Max 2.0V

1K_0402_5%

+3VS

2
0_0402_5%
2
0_0402_5%

FCH_SID
EC_SMB_DA2

FCH_SID

12

EC_SMB_DA2 23

T0 FCH

HDT@
APU_TRST#

R1041 1

TO EC

R1042 2
R1045 2
R1047 2

2 0_0402_5% APU_TRST#_R
1 10K_0402_5%
1 10K_0402_5%
1 10K_0402_5%

2
0_0402_5%

1
3
5
7
9
11
13
15
17
19

1
3
5
7
9
11
13
15
17
19

CONN@
2
4
6
8
10
12
14
16
18
20

2
4
6
8
10
12
14
16
18
20

LDT_RST#_R
R1043 1 HDT@
APU_DBRDY_R R1046 1 HDT@
APU_DBREQ#_R R1048 1 HDT@

APU_TCK
R1037 2
1 1K_0402_5%
APU_TMS
R1038 2
1 1K_0402_5%
APU_TDI
R1039 2
1 1K_0402_5%
APU_TDO
H_PWRGD
2 0_0402_5% LDT_RST#
2 0_0402_5% APU_DBRDY
2 0_0402_5% APU_DBREQ# R1049 1
2 300_0402_5%
TEST_19
TEST_18

+1.8VS

ACES_88076-02001_20P
@

APU_SIC
A

4
@

EC_SMB_CK

Q8B
DMN66D0LDW-7 2N_SOT363-6
1
2
R1053
0_0402_5%

1
R1051
1
R1052

FCH_SIC
2
0_0402_5%
EC_SMB_CK2
2
0_0402_5%

FCH_SIC

12

EC_SMB_CK2 23

T0 FCH
A

TO EC

2010-09-09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010-09-09

Deciphered Date

Title

SCHEMATICS, MB A6849
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number

Rev
B

4019BA
Sheet

Monday, December 06, 2010


1

of

38

U1D

C1289
2

G16
G19
E17
J16
L16
L19
N16
R16
R19
W18
U16

VDDIO_MEM_S_1
VDDIO_MEM_S_2
VDDIO_MEM_S_3
VDDIO_MEM_S_4
VDDIO_MEM_S_5
VDDIO_MEM_S_6
VDDIO_MEM_S_7
VDDIO_MEM_S_8
VDDIO_MEM_S_9
VDDIO_MEM_S_10
VDDIO_MEM_S_11

2
1U_0402_6.3V6K

1U_0402_6.3V6K
1

C1290
2

C1285

2
1U_0402_6.3V6K

+1.8VS

1
2
FBMA-L11-201209-221LMA30T_0805
1
+

C1286
2

2
10U_0805_10V6K

C1291
220U_B2_2.5VM_R25M

+1.8VS_DAC

+1.8VS
L85
1
2
1 FBMA-L11-201209-221LMA30T_0805
C1293

W9

VDD_18_DAC

POWER

10U_0805_10V6K
2

+1.05VS
+1.05VS_VDDPL
1U_0402_6.3V6K

DIS PLL

200mA

U11

VDDPL_10

1
C1294
0.1U_0402_16V4Z

L86
1
2
FBMA-L11-201209-221LMA30T_0805

C1296

C1295
2

C1297
220U_B2_2.5VM_R25M

10U_0805_10V6K
2
+1.05VS_VDD

5500mA-->20mil0.1U_0402_16V4Z

PCIE/IO/DDR3 Phy

L87
1
2
FBMA-L11-201209-221LMA30T_0805

1U_0402_6.3V6K

U13
W13
V12
T12

VDD_10_1
VDD_10_2
VDD_10_3
VDD_10_4

C1298
0.1U_0402_16V4Z

DDR3

2000mA

C1284

C1292
1U_0402_6.3V6K

GPU AND NB CORE

+1.5V

DAC

VDDCR_NB_1
VDDCR_NB_2
VDDCR_NB_3
VDDCR_NB_4
VDDCR_NB_5
VDDCR_NB_6
VDDCR_NB_7
VDDCR_NB_8
VDDCR_NB_9
VDDCR_NB_10
VDDCR_NB_11
VDDCR_NB_12
VDDCR_NB_13
VDDCR_NB_14
VDDCR_NB_15
VDDCR_NB_16
VDDCR_NB_17
VDDCR_NB_18
VDDCR_NB_19
VDDCR_NB_20
VDDCR_NB_21
VDDCR_NB_22

8000mA

U8
W8
U6
U9
W6
T7
V7

VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4
VDD_18_5
VDD_18_6
VDD_18_7

150mA

E8
E11
E13
F9
F12
G11
G13
H9
H12
K11
K13
L10
L12
L14
M11
M12
M13
N10
N12
N14
P11
P13

+APU_VDDNB

CPU CORE

VDDCR_CPU_1
VDDCR_CPU_2
VDDCR_CPU_3
VDDCR_CPU_4
VDDCR_CPU_5
VDDCR_CPU_6
VDDCR_CPU_7
VDDCR_CPU_8
VDDCR_CPU_9
VDDCR_CPU_10
VDDCR_CPU_11
VDDCR_CPU_12
VDDCR_CPU_13
VDDCR_CPU_14
VDDCR_CPU_15

C1288
0.1U_0402_16V4Z
1U_0402_6.3V6K
1
1
1

L84

C1287
68P_0402_50V8J

4500mA

2000mA
TSense/PLL/DP/PCIE/IO

E5
E6
F5
F7
G6
G8
H5
H7
J6
J8
L7
M6
M8
N7
R8

+APU_CORE

+1.8VS_VDD

1
1
1
C1302
C1300
C1301
1U_0402_6.3V6K
10U_0805_10V6K
2
2
2

C1299
2

1
C1303
2

10U_0805_10V6K

DP Phy/IO

A4

0.1U_0402_16V4Z

+APU_CORE

10U_0805_10V6K
1

C1313
2

C1315

0.1U_0402_16V4Z

0.1U_0402_16V4Z
+1.5V

C1317
10U_0805_10V6K

+APU_CORE
0.1U_0402_16V4Z

C1309

180P_0402_50V8J
+APU_VDDNB

0.1U_0402_16V4Z

C1316
10U_0805_10V6K
2

1
C1308

180P_0402_50V8J

10U_0805_10V6K
1

1
C1314
10U_0805_10V6K
2

1
C1307

C1312
10U_0805_10V6K
2

+APU_VDDNB

180P_0402_50V8J

Close to U1.A4 pin

C1306

C1311

0.1U_0402_16V4Z

1
C1318
10U_0805_10V6K

1
C1319
10U_0805_10V6K

1
C1320
10U_0805_10V6K

1
C1321
10U_0805_10V6K

C1322
2

C1323
2

0.1U_0402_16V4Z
0.1U_0402_16V4Z

C1324
3

C1326
0.1U_0402_16V4Z

C1327

C1328

+APU_VDDNB

330U_D2_2V_Y

1
1

C1331
C1332
C1333
C1334
C1335
1U_0402_6.3V6K 1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K 1U_0402_6.3V6K
2
2
2
2
2

+APU_CORE

C1336

C1338 +

C1337
2

330U_D2_2V_Y

+1.8VS_VDD

+1.8VS_DAC

1
1

C1344 +

C1345 +

@
330U_D2_2V_Y

C1342

+1.05VS_VDDPL

1U_0402_6.3V6K

330U_D2_2V_Y

C1343

0.1U_0402_16V4Z
0.1U_0402_16V4Z

+APU_CORE

+APU_VDDNB

C1330
2

2
1U_0402_6.3V6K

1
C1346

1
C1347

1U_0402_6.3V6K

+1.5V

+1.5V

C1348
2

1U_0402_6.3V6K

1
C1349
10U_0805_10V6K

1
C1350
10U_0805_10V6K

C1351
C1352
C1353
C1354
1U_0402_6.3V6K 1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
2
2

1
C1355
180P_0402_50V8J

1
C1339
180P_0402_50V8J

1
C1340
180P_0402_50V8J

+APU_VDDNB

C1357
180P_0402_50V8J

+1.05VS_VDD

+1.5V

C1363

0.1U_0402_16V4Z

2200P_0402_50V7K

C1362

68P_0402_50V8J

2200P_0402_50V7K

C1361

C1360

68P_0402_50V8J

0.1U_0402_16V4Z
1
C1364

+3VS

1
C1358
180P_0402_50V8J

C1359
0.1U_0402_16V4Z

C1365

C1366
4

0.1U_0402_16V4Z

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

C1341
180P_0402_50V8J

1
C1356
180P_0402_50V8J

1
+APU_CORE

0.1U_0402_16V4Z

C1325
3

C1329

180P_0402_50V8J
C1305
1U_0402_6.3V6K

+APU_CORE
10U_0805_10V6K
1

C1304
@

N13
N20
N22
P10
P14
R4
R7
R20
T6
T9
T11
T13
U4
U5
U7
U12
U20
U22
V8
V9
V11
V13
W1
W2
W4
W5
W7
W12
W20
Y5
Y7
Y9
Y11
Y13
Y15
Y17
Y19
AA4
AA22
AB2
AB5
AB9
AB13
AB17
AB21
AC5
AC9
AC13
A11

500mA

Zacate-FT1_BGA_413P-T

C1310
10U_0805_10V6K

VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSSBG_DAC

Zacate-FT1_BGA_413P-T

+3VS

VDD_33

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49

GND

A7
B7
B11
B17
B22
C4
D5
D7
D9
D11
D14
B15
D17
D19
E7
E9
E12
E20
F8
F11
F13
G4
G5
G7
G9
G12
G20
G22
H6
H11
H13
J4
J5
J7
J20
K10
K14
L4
L6
L8
L11
L13
L20
L22
M7
N4
N6
N8
N11

+1.8VS_VDD
U1C

Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

of

38

+1.5V

+1.5V
JDDRL

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9

6,10 DDR_A_DQS#1
6,10 DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
6,10 DDR_A_DQS#2
6,10 DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

205

G1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

DDR_A_D4
DDR_A_D5
DDR_A_DQS#0 6,10
DDR_A_DQS0 6,10

DDR_A_D[0..63]

DDR_A_D6
DDR_A_D7

DDR_A_DM[0..7]

DDR_A_D[0..63]

6,10

DDR_A_DM[0..7]

6,10
1

DDR_A_D12
DDR_A_D13
DDR_A_MA[0..15]
DDR_A_DM1

DDR_A_MA[0..15] 6,10

DDR_RST# 6,10
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29

+1.5V
+1.5V
DDR_A_DQS#3 6,10
DDR_A_DQS3 6,10

DDR_A_D30
DDR_A_D31

R310
1K_0402_1%

R48
1K_0402_1%
1

DDR_A_D26
DDR_A_D27

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

DDR_A_DM0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

C627

DDR_A_D0
DDR_A_D1

1000P_0402_50V7K

C626

0.1U_0402_16V4Z

+VREF_DQ

+VREF_DQ

DDR_A_MA3
DDR_A_MA1
6
6

DDR_A_CLK0
DDR_A_CLK#0
DDR_A_MA10

6,10 DDR_A_BS#0
6,10 DDR_A_WE#
6,10 DDR_A_CAS#
DDR_A_MA13
6 DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33
6,10 DDR_A_DQS#4
6,10 DDR_A_DQS4
DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
6,10 DDR_A_DQS#6
6,10 DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59
R445
10K_0402_5%
1
2

R446
10K_0402_5%
2

C651

0.1U_0402_16V4Z

C650

+3VS

2.2U_0603_6.3V6K

DDR_A_DM7

2
1

206

G2

DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

< Close to JDDRH & JDDRL >

DDR_A_CLK1 6
DDR_A_CLK#1 6
DDR_A_BS#1 6,10
DDR_A_RAS# 6,10
DDR_CS0_DIMMA# 6
DDR_A_ODT0 6
DDR_A_ODT1 6
+VREF_CA
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45

+1.5V

0.1U_0402_16V4Z
2
C87

0.1U_0402_16V4Z

0.1U_0402_16V4Z
2

C88

C640

C641

1
0.1U_0402_16V4Z

DDR_A_DQS#5 6,10
DDR_A_DQS5 6,10

0.1U_0402_16V4Z
2
C642

1
0.1U_0402_16V4Z

C643
1

0.1U_0402_16V4Z
2
C644

1
0.1U_0402_16V4Z

C645
1

0.1U_0402_16V4Z
2
C646

C647

1
0.1U_0402_16V4Z

DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61

+0.75VS
DDR_A_DQS#7 6,10
DDR_A_DQS7 6,10

DDR_A_D62
DDR_A_D63

0.1U_0402_16V4Z
2
C665

MA_EVENT_L 6,10
FCH_SMDAT0 10,12
FCH_SMCLK0 10,12

C664

1
0.1U_0402_16V4Z

C961

2
4.7U_0603_6.3V6K

+0.75VS
4

TYCO_2-2013289-1
CONN@

Compal Secret Data

Security Classification

DIMM_A STD H:5.2 mm


<Address: A0 H>

2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

R315
1K_0402_1%

R49
1K_0402_1%

DDR_A_MA11
DDR_A_MA7
1

DDR_A_MA8
DDR_A_MA5

DDR_A_MA15
DDR_A_MA14

C649

DDR_A_MA12
DDR_A_MA9

+VREF_CA

DDR_CKE1 6,10

0.1U_0402_16V4Z

6,10 DDR_A_BS#2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

C648

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

1000P_0402_50V7K

6,10 DDR_CKE0

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

of

38

+1.5V

+1.5V
JDDRH

DDR_A_DM0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9

6,9 DDR_A_DQS#1
6,9 DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
6,9 DDR_A_DQS#2
6,9 DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27

6,9
2

DDR_CKE0

6,9 DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
6
6

DDR_B_CLK2
DDR_B_CLK#2
DDR_A_MA10

6,9 DDR_A_BS#0
6,9 DDR_A_WE#
6,9 DDR_A_CAS#
DDR_A_MA13
6 DDR_CS1_DIMMB#

DDR_A_D32
DDR_A_D33
6,9 DDR_A_DQS#4
6,9 DDR_A_DQS4
DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
6,9 DDR_A_DQS#6
6,9 DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
10K_0402_5%
R448 1
2
+3VS

C681
2.2U_0603_6.3V6K

CRB

1
C680

2
0.1U_0402_16V4Z

R449
10K_0402_5%

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

205

G1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

G2

206

DDR_A_D4
DDR_A_D5
DDR_A_DQS#0 6,9
DDR_A_DQS0 6,9

DDR_A_D[0..63]

DDR_A_D6
DDR_A_D7

DDR_A_DM[0..7]

DDR_A_D[0..63]

6,9

DDR_A_DM[0..7]

6,9
1

DDR_A_D12
DDR_A_D13
DDR_A_MA[0..15]

DDR_A_MA[0..15] 6,9

DDR_A_DM1
DDR_RST# 6,9
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3 6,9
DDR_A_DQS3 6,9
DDR_A_D30
DDR_A_D31

DDR_CKE1 6,9
DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_B_CLK3 6
DDR_B_CLK#3 6
DDR_A_BS#1 6,9
DDR_A_RAS# 6,9
DDR_CS0_DIMMB# 6
DDR_B_ODT0 6
DDR_B_ODT1 6
+VREF_CA
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

C679

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

1000P_0402_50V7K

C652 C653
2

DDR_A_D0
DDR_A_D1

C678

0.1U_0402_16V4Z

1000P_0402_50V7K

0.1U_0402_16V4Z

+VREF_DQ

DDR_A_DQS#5 6,9
DDR_A_DQS5 6,9
DDR_A_D46
DDR_A_D47

+1.5V

DDR_A_D52
DDR_A_D53

0.1U_0402_16V4Z
2

DDR_A_DM6

C666
1
0.1U_0402_16V4Z

DDR_A_D54
DDR_A_D55

0.1U_0402_16V4Z
2

C667
1

C668

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z
2

C669

C670

C671

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z
2

C672

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z
2

C673

C674

C677

1
0.1U_0402_16V4Z

DDR_A_D60
DDR_A_D61

C128 Co-layout with C86


DDR_A_DQS#7 6,9
DDR_A_DQS7 6,9

+0.75VS
+1.5V

DDR_A_D62
DDR_A_D63

0.1U_0402_16V4Z
2
C676

MA_EVENT_L 6,9
FCH_SMDAT0 9,12
FCH_SMCLK0 9,12

1
0.1U_0402_16V4Z

+0.75VS

C675
1

1
C925

2
4.7U_0603_6.3V6K

+1.5V
@

C86 + 330U_SX_2VY~D

C128
2

390U_2.5V_M_R10
4

Place near DIMM2

LOTES_AAA-DDR-111-K01
CONN@

only one 4.7k


Compal Secret Data

Security Classification

DIMM_B STD H:9.2 mm


<Address: A4 H>

2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

10

of

38

T15
PAD
150P_0402_50V8J
C1367 1
2

U22E

APU_CLK_R
APU_CLK#_R

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN

U29
U28

NB_DISP_CLKP
NB_DISP_CLKN

T26
T27

NB_HT_CLKP
NB_HT_CLKN

V21
T21

CPU_HT_CLKP
CPU_HT_CLKN

V23
T23

SLT_GFX_CLKP
SLT_GFX_CLKN

L29
L28

GPP_CLK0P
GPP_CLK0N

N29
N28
CLK_PCIE_MCARD2_R
CLK_PCIE_MCARD2#_R

M29
M28

GPP_CLK2P
GPP_CLK2N

19 CLK_PCIE_LAN
19 CLK_PCIE_LAN#

R1068 1
R1069 1

2 0_0402_5%
2 0_0402_5%

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

T25
V25

GPP_CLK3P
GPP_CLK3N

L24
L23

GPP_CLK4P
GPP_CLK4N

LAN

+3VALW

GPP_CLK6P
GPP_CLK6N

PLT_RST#

N26
N27

GPP_CLK7P
GPP_CLK7N

T29
T28

GPP_CLK8P
GPP_CLK8N

CLK_48M_CR
2
22_0402_5%

L25

14M_25M_48M_OSC

25M_CLK_X1

L26

25M_X1

PLT_RST# 18,19,23,24

R1071
8.2K_0402_5%

NC7SZ08P5X_NL_SC70-5

R1072

20 CLK_48M_CR_R

1
RC8

0_0402_5%

25M_CLK_X2

C1380
22P_0402_50V8J
2
1

L27

25M_X2

Y7

1
PAD T18
FCH_CLKRUN

AJ6
AG6
AG4
AJ4

34

FCH_32KHI

1 22P_0402_50V8J

NC

OSC

NC

OSC

R1060
20M_0402_5%

1 22P_0402_50V8J

FCH_32KHO

@
R1063
2
10K_0402_5%

@ PJ29
PASSWD_CLEAR#
R1159 1

2 10K_0402_5%

G21
H21
K19
G22
J24

ALLOW_STOP#
H_PROCHOT#
H_PWRGD

32K_X1

C1

FCH_32KHI

32K_X2

C2

FCH_32KHO

RTCCLK
INTRUDER_ALERT_L
VDDBT_RTC_G

D2
B2
B1

+3VS

Reserve PJ29 and add R1159 pull high on 10/26

JUMP_43X79

R1070 1
LPC_CLK1 15
LPC_AD0 18,23,24
LPC_AD1 18,23,24
LPC_AD2 18,23,24
LPC_AD3 18,23,24
LPC_FRAME# 18,23,24

2 22_0402_5%
2
C1378
1

CLK_PCI_EC

15,18,23,24

22P_0402_50V8J

SERIRQ 23,24

ALLOW_STOP# 7
H_PROCHOT# 7
H_PWRGD 7,34
3

LDT_RST#

LDT_RST# 7

RTC_CLK 23
+FCH_VBAT

+3VL
+RTCVCC_R

+RTCVCC

D92

+RTCBATT_R

2
R1074
1
1 120_0402_5%

R1075
1
2
120_0402_5%

C1382
2

25M_CLK_X2

2
1U_0402_6.3V6K

22P_0402_50V8J

J1
@ JUMP_43X39

+RTCBATT

1
R1076
3

C1383

H_PWRGD_L

C1377 2

PAD T17

C1381

25MHZ_20PF_7A25000012
2

Q164
2N7002_SOT23-3

HUDSON-M1_BGA_605P-T

R1073
1M_0402_5%

32.768KHZ_12.5PF_Q13MC14610002

25M_CLK_X1

RTC

Reserve U56 and put R1072 on 9/20

H_PWRGD

Y6

CLK_PCI_EC1
LPC_CLK1
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

ALLOW_LDTSTP/DMA_ACTIVE_L
PROCHOT_L
LDT_PG
LDT_STP_L
LDT_RST_L

15
15
15
15
15
15
15

C1376 2

H24
H25
J27
J26
H29
H28
G28
J25
AA18
AB19

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME_L
LDRQ0_L
LDRQ1_L/CLK_REQ6_L/GPIO49
SERIRQ/GPIO48

CPU

GPP_CLK5P
GPP_CLK5N

P29
P28

P25
M25
U56

A_RST#

C1379
2
1
0.1U_0402_16V4Z
2 B

INTE_L/GPIO32
INTF_L/GPIO33
INTG_L/GPIO34
INTH_L/GPIO35

LPC

18 CLK_PCIE_MCARD2
18 CLK_PCIE_MCARD2#

2 0_0402_5%
2 0_0402_5%

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29

2
JRTC1

1K_0402_5%

CHN202UPT_SC70-3

WLAN

GPP_CLK1P
GPP_CLK1N

R1066 1
R1067 1

CLOCK GENERATOR

M23
P23

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N

+3VS

R1057
10K_0402_5%

AA22
Y21
AA25
AA24
W23
V24
W24
W25

+1.8VS

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N

2 0_0402_5%
2 0_0402_5%

PCIE_CALRP
PCIE_CALRN

AA28
AA29
Y29
Y28
Y26
Y27
W28
W29

PAD T16

15
15
15
15

R1061 1
R1062 1

APU_CLK
APU_CLK#

DISP_CLK_R
DISP_CLK#_R

AD29
AD28

V2
AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
AC12
AD12
AJ5
AH6
AB12
AB11
AD7

PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

2 0_0402_5%
2 0_0402_5%

UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N

PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

7
7

590_0402_1%
2K_0402_1%

AE24
AE23
AD25
AD24
AC24
AC25
AB25
AB24

PCIRST_L
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0_L
CBE1_L
CBE2_L
CBE3_L
FRAME_L
DEVSEL_L
IRDY_L
TRDY_L
PAR
STOP_L
PERR_L
SERR_L
REQ0_L
REQ1_L/GPIO40
REQ2_L/CLK_REQ8_L/GPIO41
REQ3_L/CLK_REQ5_L/GPIO42
GNT0_L
GNT1_L/GPO44
GNT2_L/GPO45
GNT3_L/CLK_REQ7_L/GPIO46
CLKRUN_L
LOCK_L

W2
W1
W3
W4
Y1

R1058 1
R1059 1

DISP_CLK
DISP_CLK#

1
1

UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N

PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39

PCI I/F

7
7

2
2

PCIE_RST_L
A_RST_L

AD26
AD27
AC28
AC29
AB29
AB28
AB26
AB27

R1055
R1056

+PCIE_VDDR

UMI_RX0P_C
UMI_RX0N_C
UMI_RX1P_C
UMI_RX1N_C
UMI_RX2P_C
UMI_RX2N_C
UMI_RX3P_C
UMI_RX3N_C

UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

5
5
5
5
5
5
5
5

1
1
1
1
1
1
1
1

P1
L1

UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N

C1368 2
C1369 2
C1370 2
C1371 2
C1372 2
C1373 2
C1374 2
C1375 2

1 33_0402_5%

PCI EXPRESS I/F

5
5
5
5
5
5
5
5

R1054

PCI CLKS

A_RST#

0.1U_0402_16V4Z

SUYIN_060003HA002G202ZL

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA
Monday, December 06, 2010
E

Sheet

11

of

38

+3VALW

U22A

1
R1079

LAN_CLKREQ#
10K_0402_5%

@
2
R1081

1 EC_RSMRST#
100K_0402_5%

23

@
@
@
KB_RST#

KB_RST#

C1236
0.1U_0402_16V4Z

+3VALW

R1077 1

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD

PAD
PAD
PAD

T20
T19
T21

23

GATEA20

23
23

EC_SCI#
EC_SMI#

FCH_TEST0
FCH_TEST1
FCH_TEST2
GATEA20
EC_SCI#
EC_SMI#

2 10K_0402_5%
FCH_PCIE_WAKE
19 FCH_PCIE_WAKE
H_THERMTRIP#
NB_PWRGD

7 H_THERMTRIP#

EC_RSMRST#

23 EC_RSMRST#

LAN_CLKREQ#

19 LAN_CLKREQ#
+3VS

2.2K_0402_5% FCH_SMCLK0

R1083

2.2K_0402_5% FCH_SMDAT0

R1084

2.2K_0402_5%

NB_PWRGD

Change R1085 to 10 ohm and R1088 to 10pF on 11/22 for EMC request

USB_OC#0

18,23 USB_OC#0
1

10_0402_5%

R1086
21 AZ_SDOUT_HD
15 AZ_SDOUT_HD_R
21 AZ_SDIN0_HD

33_0402_5%

21 AZ_BITCLK_HD
1
10P_0402_50V8J

R1088
2

R1090
R1091

21 AZ_SYNC_HD
21 AZ_RST_HD#

1
1

2
2

33_0402_5%
33_0402_5%

G19

USB_FSD1P/GPIO186
USB_FSD1N

J10
H11

USB_FSD0P/GPIO185
USB_FSD0N

H9
J8

CLK_REQ4_L/SATA_IS0_L/GPIO64
CLK_REQ3_L/SATA_IS1_L/GPIO63
SMARTVOLT1/SATA_IS2_L/GPIO50
CLK_REQ0_L/SATA_IS3_L/GPIO60
SATA_IS4_L/FANOUT3/GPIO55
SATA_IS5_L/FANIN3/GPIO59
SPKR_GPIO66
SCL0_GPIO43
SDA0_GPIO47
SCL1_GPIO227
SDA1_GPIO228
CLK_REQ2_L/FANIN4_GPIO62
CLK_REQ1_L/FANOUT4_GPIO61
IR_LED_L/LLB_L/GPIO184
SMARTVOLT2/SHUTDOWN_L/GPIO51
DDR3_RST_L/GEVENT7_L
GBE_LED0/GPIO183
GBE_LED1/GEVENT9_L
GBE_LED2/GEVENT10_L
GBE_STAT0/GEVENT11_L
CLK_REQG_L/GPIO65_OSCIN

H3
D1
E4
D4
E8
F7
E7
F8

BLINK/USB_OC7_L/GEVENT18_L
USB_OC6_L/IR_TX1/GEVENT6_L
USB_OC5_L/IR_TX0/GEVENT17_L
USB_OC4_L/IR_RX0/GEVENT16_L
USB_OC3_L/AC_PRES/TDO/GEVENT15_L
USB_OC2_L/TCK/GEVENT14_L
USB_OC1_L/TDI/GEVENT13_L
USB_OC0_L/TRST_L/GEVENT12_L

M3
N1
L2
M2
M1
M4
N2
P2

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST_L

F11
E11

USB_HSD11P
USB_HSD11N

E14
E12

USB_HSD10P
USB_HSD10N

J12
J14

USB_HSD9P
USB_HSD9N

A13
B13

USB_HSD8P
USB_HSD8N

D13
C13

USB_HSD7P
USB_HSD7N

G12
G14

USB20_P7
USB20_N7

USB_HSD6P
USB_HSD6N

G16
G18

USB20_P6
USB20_N6

USB_HSD5P
USB_HSD5N

D16
C16

USB20_P5
USB20_N5

USB_HSD4P
USB_HSD4N

B14
A14

USB_HSD3P
USB_HSD3N

E18
E16

USB_HSD2P
USB_HSD2N

J16
J18

USB_HSD1P
USB_HSD1N

B17
A17

USB20_P1
USB20_N1

USB_HSD0P
USB_HSD0N

A16
B16

USB20_P0
USB20_N0

SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/GPIO199
EC_PWM3/EC_TIMER3/GPIO200

D25
F23
B26
E26
F25
E22
F22
E21

GPIO193
GPIO194
FCH_SIC
FCH_SID

KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208

G24
G25
E28
E29
D29
D28
C29
C28

GPIO201

2
2

1
10K_0402_5%
1
10K_0402_5%
1
10K_0402_5%

GBE_COL

GBE_MDIO
R1095
10K_0402_5%
@

GBE_CRS
GBE_RXERR
GBE_RXERR

KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226

B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22

+3VALW

R1099

1 CIR_EN#
10K_0402_5%

GBE_PHY_INTR

@
+3VALW

CIR_EN#

1
R1101
1
R1102
1
R1103

2 @
100K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%

EC_LID_OUT#
FCH_SIC
FCH_SID

E23
E24
F21
G29

PS2_DAT/SDA4/GPIO187
PS2_CLK/SCL4/GPIO188
SPI_CS2_L/GBE_STAT2/GPIO166
FC_RST_L/GPO160

D27
F28
F29
E27

PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192

EHCI13 / OHCI3

EHCI2 / OHCI2
USB20_P7 20
USB20_N7 20

USB-7 Card reader

USB20_P6 18
USB20_N6 18

USB-6 WLAN

USB20_P5 17
USB20_N5 17

USB-5 Int Camera


2

EHCI1 / OHCI1
<Wake Up support>
USB20_P1 18
USB20_N1 18

USB-1 Right side

USB20_P0 18
USB20_N0 18

USB-0 Right side

R1087 1
R1089 1
FCH_SIC
FCH_SID

FCH_EC_PWM2 15
FCH_EC_PWM3 15

GPIO201 for UMA and DIS option


+3VALW

GPIO201

R1100
10K_0402_5%

DIS

Pull up

UMA

DEFAULT

GPIO201

HUDSON-M1_BGA_605P-T
FCH_SMCLK1

2
2.2K_0402_5%
2
2.2K_0402_5%

Pull down

Toshiba AMD platform version

R1104
10K_0402_5%
2

1
R1105
1
R1106

SPI and LPC STRAP PIN

2 10K_0402_5%
2 10K_0402_5%
7
7

R1098

R1094
10K_0402_5%

35ohm

R1097

GBE_PHY_INTR

R1096

GBE_MDIO

1
10K_0402_5%
1
10K_0402_5%

GBE LAN

R1093

GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST_L
GBE_PHY_INTR

Close to SB within 1"

B12
A12

EMBEDDED CTRL

R1092
3

T1
T4
L6
L5
T9
U1
U3
T2
U2
T5
V5
P5
M5
P9
T7
P7
M7
P4
M9
V7

2
R1080

OHCI4

USB_HSD12P
USB_HSD12N

+3VALW
GBE_COL
GBE_CRS

USB_RCOMP 1
11.8K_0402_1%

USB_HSD13P
USB_HSD13N

RSMRST_L

HD AUDIO

R1085

A10

USB_RCOMP

USB OC

EC_LID_OUT#

23 EC_LID_OUT#

USBCLK/14M_25M_48M_OSC

USB 2.0

G1
AD19
AA16
AB21
AC18
AF20
AE19
AF19
AD22
AE22
F5
F4
AH21
AB18
E1
AJ21
H4
D5
D7
G5
K3
AA20

PCI_PME_L/GEVENT4_L
RI_L/GEVENT22_L
SPI_CS3_L/GBE_STAT1/GEVENT21_L
SLP_S3_L
SLP_S5_L
PWR_BTN_L
PWR_GOOD
SUS_STAT_L
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0_L
KBRST_L/GEVENT1_L
LPC_PME_L/GEVENT3_L
LPC_SMI_L/GEVENT23_L
GEVENT5_L
SYS_RESET_L/GEVENT19_L
WAKE_L/GEVENT8_L
IR_RX1/GEVENT20_L
THRMTRIP_L/SMBALERT_L/GEVENT2_L
NB_PWRGD

GPIO

R1082

PCH_SPKR
FCH_SMCLK0
FCH_SMDAT0
FCH_SMCLK1
FCH_SMDAT1

21
PCH_SPKR
9,10 FCH_SMCLK0
9,10 FCH_SMDAT0
18 FCH_SMCLK1
18 FCH_SMDAT1
18 CLKREQ_MCARD2#

J2
K1
D3
F1
H1
F2
H5
G6
B3
C4
F6
AD21
AE21
K2
J29
H2
J1
H6
F3
J6
AC19

USB 1.1

23
23
23
23

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD

FCH_PCIE_WAKE
10K_0402_5%

USB MISC

ACPI/WAKE UP EVENTS

1
R1078

FCH_SMDAT1

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

12

of

38

U22B

HDD

18 SATA_TX0+
18 SATA_TX018 SATA_RX018 SATA_RX0+

ODD

AJ8
AH8

SATA_RX0N
SATA_RX0P

AH10
AJ10

SATA_TX1P
SATA_TX1N

AG10
AF10

SATA_RX1N
SATA_RX1P

AG12
AF12

SATA_TX2P
SATA_TX2N

AJ12
AH12

SATA_RX2N
SATA_RX2P

AH14
AJ14

SATA_TX3P
SATA_TX3N

AG14
AF14

SATA_RX3N
SATA_RX3P

AG17
AF17

SATA_TX4P
SATA_TX4N

AJ17
AH17

SATA_RX4N
SATA_RX4P

AJ18
AH18

SATA_TX5P
SATA_TX5N

AH19
AJ19

SATA_RX5N
SATA_RX5P

18 SATA_STX_DRX_P1
18 SATA_STX_DRX_N1
18 SATA_SRX_C_DTX_N1
18 SATA_SRX_C_DTX_P1

Close to FCH within 1"

R1107 2
R1108 2

+1.1VS_SATA

1 1K_0402_1% SATA_CALRP
1 931_0402_1% SATA_CALRN

HW MONITOR

SATA_TX0P
SATA_TX0N

SATA_RX0SATA_RX0+

GPIOD

AH9
AJ9

SERIAL ATA

SATA_TX0+
SATA_TX0-

AB14
AA14

SATA_CALRP
SATA_CALRN

AD11

SATA_ACT_L/GPIO67

@ R1113
@R1113
1

+3VS

2 10K_0402_5%

T27PAD

T28PAD

SATA_X1

AD16

SATA_X2

SATA_X1

AC16

J5
E2
K4
K9
G2

SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1_L/GPIO165
ROM_RST_L/GPIO161

AH28
AG28
AF26

FC_OE_L/GPIOD145
FC_AVD_L/GPIOD146
FC_WE_L/GPIOD148
FC_CE1_L/GPIOD149
FC_CE2_L/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147

AF28
AG29
AG26
AF27
AE29
AF29
AH27

FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143

AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26

FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54

W5
W6
Y9

FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58

W7
V9
W8

TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT_L/GPIO174
TEMP_COMM
VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182

SPI ROM

SPI_SO
SPI_SI
SPI_CLK_FCH
SPI_SB_CS0#

SATA_X2

FC_CLK
FC_FBCLKOUT
FC_FBCLKIN

NC1
NC2

BT_OFF#

BT_OFF#

B6
A6
A5
B5
C7

TEMPIN0
TEMPIN1
TEMPIN2

R1109 1
R1110 1
R1111 1

A3
B4
A4
C5
A7
B7
B8
A8

ACIN_SB
GPIO176
GPIO177
GPIO178
GPIO179
GPIO180
GPIO181
GPIO182

18

2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
APU_ALERT# 7

1
R1112

2
150K_0402_5%

+3VALW

D93
R1114 1
R1115 1
R1119 1
R1116 1
R1120 1
R1117 1
R1118 1

2
2
2
2
2
2
2

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

ACIN

23,29

CH751H-40PT_SOD323-2

G27
Y2

HUDSON-M1_BGA_605P-T

SPI_CLK_FCH

+3VALW

R1121
0_0402_5%

VCC

HOLD

SPI_SB_CS0#

SPI_CLK_FCH

SPI_SI

C1385
68P_0402_50V8J

U55

20mils

VSS

4
2

C1384

@
1

22P_0402_50V8J

SPI_SO

SST25LF080A_SO8-200mil

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

13

of

38

U22D

979.4mA

2 1U_0402_6.3V6K
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

+1.1VS_SATA
L90
2
1
0_0805_5%

+1.1VS

2
C1405
C1406 1
C1409 1
C1410 1
C1411 1

1
2
2
2
2

22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z

VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7

M6
P8

VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8

534.5mA

10U_0805_10V6K
10U_0805_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z

+1.1V_USB

VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12

VDDCR_11_S_1
VDDCR_11_S_2

+VDDAN_1.1V_USB
C1423

C1422

1
2.2U_0603_6.3V6K
1
2.2U_0603_6.3V6K

2
2

88.6mA

C11
D11

F26
G26

A11
B11

+VDDCR_1.1V_USB

VDDPL_33_SYS

M21

+VDDPL_3.3V

VDDPL_11_SYS_S

L22

+VDDPL_1.1V

VDDPL_33_USB_S

F19

VDDAN_11_USB_S_1
VDDAN_11_USB_S_2

VDDAN_33_HWM_S
VDDXL_33_S

C1398

C1397

C1399

C1400
68P_0402_50V8J

1 C1415

+1.1VALW

L92
1
2
FBMA-L11-160808-221LMT_2P

0.1U_0402_16V4Z
2
2

C1419
C1420
C1421
17mA
2
1
1
11.4mA
10U_0603_6.3V6M
0.1U_0402_16V4Z
+3VALW

+AVDD_USB

D6

+3VS

L94

+VDDXL_3.3V

HUDSON-M1_BGA_605P-T

1
2
FBMA-L11-160808-221LMT_2P

5mA

VSSIO_USB_1
VSSIO_USB_2
VSSIO_USB_3
VSSIO_USB_4
VSSIO_USB_5
VSSIO_USB_6
VSSIO_USB_7
VSSIO_USB_8
VSSIO_USB_9
VSSIO_USB_10
VSSIO_USB_11
VSSIO_USB_12
VSSIO_USB_13
VSSIO_USB_14
VSSIO_USB_15
VSSIO_USB_16
VSSIO_USB_17
VSSIO_USB_18
VSSIO_USB_19
VSSIO_USB_20
VSSIO_USB_21
VSSIO_USB_22
VSSIO_USB_23
VSSIO_USB_24
VSSIO_USB_25
VSSIO_USB_26
VSSIO_USB_27
VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21
P20
M22
M24
M26
P22
P24
P26
T20
T22
T24
V20
J23

VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_4
VSSIO_PCIECLK_5
VSSIO_PCIECLK_6
VSSIO_PCIECLK_7
VSSIO_PCIECLK_8
VSSIO_PCIECLK_9
VSSIO_PCIECLK_10
VSSIO_PCIECLK_11
VSSIO_PCIECLK_12
VSSIO_PCIECLK_13

VSSPL_SYS

AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8

M20

1 C1412

1U_0402_6.3V6K

58mA

L20

1U_0402_6.3V6K

VDDCR_11_USB_S_1
VDDCR_11_USB_S_2

VDDIO_AZ_S

0_0603_5%

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

R1124

+3VS

C1407

A9
B10
K11
B9
D10
D12
D14
D17
E9
F9
F12
F14
F16
C9
G11
F18
D9
H12
H14
H16
H18
J11
J19
K12
K14
K16
K18
H19

C1408

165.2mA
+VDDIO_AZ

L93

49.5mA

A21
D21
B21
K10
L10
J9
T6
T8

M8

PLL

A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19

+1.1VALW

2
1
0_0805_5%

+1.1VALW

USB I/O

2
2
2
2
2

VDDIO_GBE_S_1
VDDIO_GBE_S_2

+3VALW

VDDPL_33_SATA

+AVDD_USB

2
1
0_0805_5%
C1413 1
C1414 1
C1416 1
C1417 1
C1418 1

AD14
AJ20
AF18
AH20
AG19
AE18
AD18
AE16

1354.2mA

L91

M10

L7
L9

+1.1V_CKVDD

V1

VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2

CORE S5

+3VALW

VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8

15.5mA

+VDDPL_3.3V_SATA
2

VDDPL_33_PCIE

2
0_0805_5%

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52

VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
VSSIO_PCIECLK_17
VSSIO_PCIECLK_18
VSSIO_PCIECLK_19
VSSIO_PCIECLK_20
VSSIO_PCIECLK_21
VSSIO_PCIECLK_22
VSSIO_PCIECLK_23
VSSIO_PCIECLK_24
VSSIO_PCIECLK_25
VSSIO_PCIECLK_26
VSSIO_PCIECLK_27

H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20

HUDSON-M1_BGA_605P-T

C1424

C1402 1
C1403 1
C1404 1

U26
V22
V26
V27
V28
V29
W22
W26

3.3V_S5 I/O

1115.6mA

GBE LAN

1
0_0805_5%
2
1
22U_0805_6.3V6M
C1401

SERIAL ATA

PCI EXPRESS

+1.1VS

AE28

22U_0805_6.3V6M

VDDRF_GBE_S
VDDIO_33_GBE_S

+1.1VS
L88

+PCIE_VDDR
L89

+1.1V_CKVDD

382.9mA

0.1U_0402_16V4Z

22.5mA

2
2
2
2

2
+1.1VS
0_0805_5%
2
C1387
C1389
1
C1392
1
C1393
1
C1394
1

0.1U_0402_16V4Z

VDDIO_18_FC_1
VDDIO_18_FC_2
VDDIO_18_FC_3
VDDIO_18_FC_4

K28
K29
J28
K26
J21
J20
K21
J22

VSSIO_SATA_1
VSSIO_SATA_2
VSSIO_SATA_3
VSSIO_SATA_4
VSSIO_SATA_5
VSSIO_SATA_6
VSSIO_SATA_7
VSSIO_SATA_8
VSSIO_SATA_9
VSSIO_SATA_10
VSSIO_SATA_11
VSSIO_SATA_12
VSSIO_SATA_13
VSSIO_SATA_14
VSSIO_SATA_15
VSSIO_SATA_16
VSSIO_SATA_17
VSSIO_SATA_18
VSSIO_SATA_19

GND

+VDDPL_3.3V_PCIE

CLKGEN I/O

AF22
AE25
AF24
AC22

2
0_0402_5%

FLASH I/O

1
R1122

VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8

1
R1123
10U_0805_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z

C1396

N13
R15
N17
U13
U17
V12
V18
W12
W18

1U_0402_6.3V6K

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

2
2
2

VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9

2.2U_0603_6.3V6K

1
1
1

VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
VDDIO_33_PCIGP_11
VDDIO_33_PCIGP_12

C1395

C1388
C1390
C1391

1 22U_0805_6.3V6M

CORE S0

C1386 2

PCI/GPIO I/O

AH1
V6
Y19
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19

+3VS

Y14
Y16
AB16
AC14
AE12
AE14
AF9
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ7
AJ11
AJ13
AJ16

+1.1VS_VDDC

POWER

U22C

1U_0402_6.3V6K

42mA

+3VS

L95
1
2
FBMA-L11-160808-221LMT_2P

+VDDPL_3.3V_PCIE
1

L96
1
2
FBMA-L11-160808-221LMT_2P

+VDDPL_3.3V
1

C1425
2.2U_0603_6.3V6K

C1426

47mA

2 2.2U_0603_6.3V6K
+1.1VALW
L97
1
2
FBMA-L11-160808-221LMT_2P

15.3mA

+3VALW
+3VS
L98
1
2
FBMA-L11-160808-221LMT_2P

+VDDPL_3.3V_SATA
1
1

C1428

R1125
+VDDIO_AZ

2
1

0_0603_5%

C200 near U22.M8

C1429

2.2U_0603_6.3V6K

65.3mA

+VDDPL_1.1V

C1427
2.2U_0603_6.3V6K
4

2 2.2U_0603_6.3V6K

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

14

of

38

REQUIRED STRAPS
AZ_SDOUT

PCI_CLK1

LOW POWER ALLOW PCIE


MODE
GEN2

PULL
HIGH
D

Check Internal PU/PD

PCI_CLK2

PCI_CLK3

WATCHDOG
TIMER
ENABLE

USE
DEBUG
STRAP

PCI_CLK4

CLK_PCI_EC LPC_CLK1

Inter CLK
Gen Mode

EC
ENABLE

GPIO200
(FCH_EC_PWM3)

CLOCKGEN
ENABLE

Disable

DEFAULT

Performance
MODE

PULL
LOW

FORCE PCIE
GEN1

WATCHDOG
TIMER
DISABLE

DEFAULT

DEFAULT

IGNORE
DEBUG
STRAP

DEFAULT

DEFAULT

EC
DISABLE

Inter CLK
Gen Mode

CLOCKGEN
DISABLE

Enable

DEFAULT

DEFAULT

Reserved

2.2k pull down

2.2k pull down

SPI

Not contact

2.2k pull down

LPC

2.2k pull down

Not contact

Reserved

Not contact

Not contact

GPIO200
(FCH_EC_PWM3)
+3VALW

+3VALW

DEFAULT

GPIO199
(FCH_EC_PWM2)
+3VALW

R1132
2.2K_0402_5%
2
1

R1131
2.2K_0402_5%
2
1

+3VS

R1130
10K_0402_5%
2
1

R1127
10K_0402_5%
2
1

R1126
10K_0402_5%
2
1

+3VS

R1129
10K_0402_5%
2
1

+3VS

R1128
10K_0402_5%
2
1

+3VALW

GPIO199
(FCH_EC_PWM2)

@
12 AZ_SDOUT_HD_R
11
PCI_CLK1
11
PCI_CLK2
11
PCI_CLK3
11
PCI_CLK4
11,18,23,24 CLK_PCI_EC
11
LPC_CLK1

LPC_CLK1
12 FCH_EC_PWM3
12 FCH_EC_PWM2

R1141
2.2K_0402_5%
2
1

R1140
2.2K_0402_5%
2
1

R1139
10K_0402_5%
2
1

R1138
10K_0402_5%
2
1

R1137
10K_0402_5%
2
1

R1136
10K_0402_5%
2
1

R1135
10K_0402_5%
2
1

R1134
10K_0402_5%
2
1

R1133
10K_0402_5%
2
1

DEBUG STRAPS
M1 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

USE FC PLL

USE DEFAULT
PCIE STRAPS

DEFAULT

BYPASS
PCI PLL

PULL
LOW

DISABLE PCI
MEM BOOT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

ENABLE ILA
AUTORUN

BYPASS
FC PLL

USE EEPROM
PCIE STRAPS

ENABLE PCI
MEM BOOT

+3VS

11
11
11
11
11
11
11

+3VS

PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23

@
A

2010-09-09

2010-09-09

Deciphered Date

Title

SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

R1148
2.2K_0402_5%
2
1

DISABLE ILA
AUTORUN

R1147
2.2K_0402_5%
2
1

USE PCI
PLL

PCI_AD23

R1146
2.2K_0402_5%
2
1

PCI_AD24

R1145
2.2K_0402_5%
2
1

PCI_AD25

R1144
2.2K_0402_5%
2
1

PCI_AD26

R1143
10K_0402_5%
2
1

PULL
HIGH

PCI_AD27

R1142
10K_0402_5%
2
1

Rev
B

4019BA
Sheet

Monday, December 06, 2010


1

15

of

38

+5VS
+R_CRT_VCC

D7

< CRT CONNECTOR >

+CRT_VCC
F1

2
1

2
1.1A_6V_MINISMDC110F-2

RB491D_SOT23-3

C237
0.1U_0402_16V4Z

D19
DAN217_SC59 @

D20
DAN217_SC59 @

D21
DAN217_SC59

JCRT

T29PAD

+3VS

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

RED_L
D_DDCDATA
GREEN_L

UMA_CRT_B

R98
150_0402_1%

UMA_CRT_G

R99
150_0402_1%

R100
150_0402_1%

C239
6P_0402_50V8K

C240
6P_0402_50V8K

L22
2 NBQ100505T-800Y-N_2P

L23
2 NBQ100505T-800Y-N_2P

L24
2 NBQ100505T-800Y-N_2P

+CRT_VCC
GREEN_L

VSYNC

T30PAD
D_DDCCLK

BLUE_L

C241
6P_0402_50V8K

HSYNC
BLUE_L

RED_L

C242
6P_0402_50V8K

C243
6P_0402_50V8K

G
G

16
17

ALLTO_C10532-11505-L_15P-T
CONN@
C244
6P_0402_50V8K

UMA_CRT_R

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

+CRT_VCC
2

2 0.1U_0402_16V4Z

R817
2 10K_0402_5%

7 UMA_CRT_HSYNC

P
OE#

5
1

C245 1

D_HSYNC

L25 1

2 10_0402_5%

HSYNC

L26 1

2 10_0402_5%

VSYNC

U5
SN74AHCT1G125GW_SOT353-5

< SYNC SIGNAL >

+CRT_VCC

7 UMA_CRT_VSYNC

P
OE#

5
1

C247
@
10P_0402_50V8J

2
Y

C248
10P_0402_50V8J

D_VSYNC

4
U6
SN74AHCT1G125GW_SOT353-5

+CRT_VCC
+3VS

R806
2K_0402_1%
2

R805
2K_0402_1%
Q32B
3 2N7002DW-T/R7_SOT363-6

7 UMA_CRT_DATA

+3VS

R825
4.7K_0402_5%

R824
4.7K_0402_5%

D_DDCDATA

C255
33P_0402_50V8K

< Display Data Channel >

+3VS
2

Q32A
6 2N7002DW-T/R7_SOT363-6

7 UMA_CRT_CLK

D_DDCCLK

C256
33P_0402_50V8K

C251
470P_0402_50V8J

FOR EMI

C252
470P_0402_50V8J

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

16

of

38

+LCD_VDD

31
32

LCD_EDID_CLK 7
LCD_EDID_DATA 7

2
R91
47K_0402_5%

INT_MIC_CLK 21
INT_MIC_DATA 21
BKOFF#

1 33_0402_5%

R200 1

Q33B

BKOFF# 23
7

2 10K_0402_5%

ENVDD 5

UMA_ENVDD

+LCDVDD_R

2 L12
1
0_0805_5%

1
+LCD_INV
2

+3VS

2A

C266
0.1U_0402_16V4Z

DMN66D0LDW-7 2N_SOT363-6

Q4
AO3413_SOT23-3

2
1
C260

INT_MIC_CLK
INT_MIC_DATA
INVT_PWM
BKOFF#_R
R983 2

W=60mils

W=60mils
Inrush current = 0A

0.1U_0402_16V4Z

LCD_TXOUT0+
LCD_TXOUT0LCD_TXOUT1+
LCD_TXOUT1LCD_TXOUT2+
LCD_TXOUT2LCD_TXCLK+
LCD_TXCLK-

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

AZC199-02SPR7G_SOT23-3

C259
2

7
7
7
7
7
7
7
7

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

Q33A
DMN66D0LDW-7 2N_SOT363-6

USB20_P5_L
USB20_N5_L

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

JLVDS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

0.01U_0402_25V7K

0.1U_0402_16V4Z

2
C265

2
1

+3VS_LVDS_CAM

C262
2

+LCD_VDD
1

@
C267
4.7U_0805_10V4Z

GND1
GND2

C152
680P_0402_50V7K
2
EMI

R896
100K_0402_5%

1
R808

R90
100K_0402_5%

+3VS

D84

0.1U_0402_16V4Z

W=20mils

+LCD_VDD

LCD/PANEL BD. Conn.


0_0603_5%

+3VS

R807
150_0402_5%
6 2
1

+3VS

C264
0.1U_0402_16V4Z

ACES_87242-3001-09
CONN@

1
R134

2
0_0402_5%
@

+LCD_INV

1
C268
68P_0402_50V8J
2

B+
L45
2
1
1 FBMA-L11-201209-221LMA30T_0805

L20
12
12

USB20_P5

USB20_N5

C27

USB20_P5_L

USB20_N5_L

1
R133

23 EC_INVT_PWM

R96

@
R23 1

10P_0402_50V8J

WCM-2012-900T_4P

C263
0.1U_0402_25V6
2

INT_MIC_CLK
2

10_0402_5%

Reserve C27, R231 for EMI

2
0_0402_5%

2 0_0402_5%

INVT_PWM

R897 1

2 0_0402_5%

R319
10K_0402_5%
2

7 GMCH_INVT_PWM

+3VS

LCD_EDID_CLK

2.2K_0402_5% 2

1 R117

LCD_EDID_DATA

2.2K_0402_5% 2

1 R118

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

17

of

38

SATA HDD Conn.


+5VS

Place closely JHDD SATA CONN.

1.2A
1

C1247
10U_0805_6.3V6M

C1248
0.1U_0402_16V4Z

+3VS

C1249
0.1U_0402_16V4Z

C1250
0.1U_0402_16V4Z

SSD HDD need 400mA for 3V(PHISON)

+3VS rail reserve for SSD


1

C1251
10U_0805_10V4Z

SATA ODD Conn


JODD

C1159
0.1U_0402_16V4Z
@

15
14
1

C1152
0.1U_0402_16V4Z
@

C1253
0.1U_0402_16V4Z
@

GND
GND

Close to JODD
GND
A+
AGND
BB+
GND

1
2
3
4
5
6
7

DP
+5V
+5V
MD
GND
GND

8
9
10
11
12
13

SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1

C1143 1
C1138 1

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

SATA_SRX_DTX_N1
SATA_SRX_DTX_P1

C1137 1
C1136 1

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

+5VS

+5VS

SANTA_206401-1_RV
CONN@

SATA_SRX_C_DTX_N1 13
SATA_SRX_C_DTX_P1 13

Place components closely ODD CONN.

1.1A
1

SATA_STX_DRX_P1 13
SATA_STX_DRX_N1 13

C1144
10U_0805_6.3V6M

C1145

C1146

10U_0805_6.3V6M 1U_0402_6.3V4Z
2

1
C1147
0.1U_0402_16V4Z

C1148
0.1U_0402_16V4Z

@
JHDD

Close to JHDD
C1153 1
C1154 1

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

SATA_C_RX0SATA_C_RX0+

C1155 1
C1156 1

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

USB Port 0 & Port1

SATA_TX0+ 13
SATA_TX0- 13

10
+5VS

USB_EN#

USB_EN#

1
2
3
4

8
7
6
5

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

R51
10K_0402_5%

@
For EMI request
1
1000P_0402_50V7K

2
C1157

Reserve for EMI request


R828 0_0402_5%
1
2
L82
12

USB20_P0

12

USB20_N0

USB_OC#0 12,23

APL3510BKI-TRG SOP8

C1158
4.7U_0805_10V4Z

12

USB20_N1

12

USB20_P1

USB20_N1_R

USB20_P1_R

13

11 CLK_PCIE_MCARD2#
11 CLK_PCIE_MCARD2
PLT_RST#
CLK_PCI_EC

5 PCIE_PTX_C_IRX_N3
5 PCIE_PTX_C_IRX_P3
5 PCIE_ITX_C_PRX_N3
5 PCIE_ITX_C_PRX_P3

WLAN/ WiFi
+3V_WLAN

20_0402_5%
E51_RXD_R
2
0_0402_5%

Debug card using

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

2N7002_SOT23-3
2
G

BT_OFF#

CM19
47P_0402_50V8J
@

Add R316 to bypass BT_OFF#;


change control pin from
BT_PWR# to BT_OFF# on 9/20
,reserve QM1

BT_CTRL

W=40mils

@
QM1

+USB_VCCA

W=40mils
R316 1

20_0402_5%

1
C342
0.1U_0402_16V4Z

C343
1000P_0402_50V7K

1
+ C339
220U_6.3V_M

+3V_WLAN
1 A

1
C340
0.1U_0402_16V4Z

JUSB2
C341
1000P_0402_50V7K

1
2
3
4

USB20_N1_R
USB20_P1_R

BT_CTRL

+USB_VCCA
CH751H-40PT_SOD323-2
2

LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
PLT_RST#

JUSB1

LPC_FRAME# 11,23,24
LPC_AD3 11,23,24
LPC_AD2 11,23,24
LPC_AD1 11,23,24
LPC_AD0 11,23,24

1
2
3
4

USB20_N0_R
USB20_P0_R

WL_OFF# 23
PLT_RST# 11,19,23,24

VCC
DD+
GND

CONN@
5
6
7
8

CONN@
5
6
7
8

GND
GND
GND
GND

ALLTOP C107L8-10405-L

D10

GND
GND
GND
GND

AZC199-02SPR7G_SOT23-3

ALLTOP C107L8-10405-L

D9
FCH_SMCLK1 12
FCH_SMDAT1 12

AZC199-02SPR7G_SOT23-3

USB20_N6 12
USB20_P6 12

BT_CTRL R50

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2 1K_0402_5% E51_RXD_R

2010-09-09

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FOX_AS0B226-S40N-7F
CONN@

Date:

VCC
DD+
GND

+1.5VS
1 A

@
DM2
1

JWLAN

12 CLKREQ_MCARD2#

SUSP#

23,26,31,32 SUSP#

+3V_WLAN

+3V_WLAN

2
8.2K_0402_5%

For SED

RM16 1
1
RM15

**If +3V_WLAN is +3VS, please


remove DM2

CM24
CM20
CM22
CM23
47P_0402_50V8J
2
2
2
2
@
0.01U_0402_25V7K 4.7U_0805_10V4Z

11,15,23,24 CLK_PCI_EC

2
2
2
2
0.01U_0402_25V7K 4.7U_0805_10V4Z

BT_PWR#

Disable

1
R259

0.1U_0402_16V4Z
1
1

CM17

Enable
BT_CRTL

+3V_WLAN

For SED

0.1U_0402_16V4Z
1
1

E51_TXD
E51_RXD

WCM-2012-900T_0805
1
2
R831 0_0402_5% @

+1.5VS

23
23

CLKREQ_MCARD2#

1
JUMP_43X79

R259 mounted on 9/20

CM18

BT
on module

BT
on module

2
@ PJ27

Short PJ27 for WLAN

CM21

USB20_N0_R

Slot#1 Half PCIe Mini Card-WLAN

USB20_P0_R

R830 0_0402_5%
1
2
L83

WLAN&BT Combo module circuits

+3VS

WCM-2012-900T_0805
1
2
R829 0_0402_5% @

SANTA_191201-1
CONN@

GND
GND

23
D91
RCLAMP0524P.TCT~D

24
23

+USB_VCCA

U48

+3VS

W=60mils

1.4A

+5VALW

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

+3VALW

SATA_RX0- 13
SATA_RX0+ 13

SATA_C_TX0+
SATA_C_TX0-

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA
Monday, December 06, 2010

Sheet
1

18

of

38

UL1
CL1
5 PCIE_PTX_C_IRX_P2

0.1U_0402_16V4Z

CL2

5 PCIE_PTX_C_IRX_N2

LAN_X1

HSOP

23

HSON

17
18

HSIP
HSIN

RL19

0_0402_5% LAN_CLKREQ#_R

16

CLKREQB

PLT_RST#

25

PERSTB

CLK_PCIE_LAN
CLK_PCIE_LAN#

19
20

REFCLK_P
REFCLK_N

11,18,23,24 PLT_RST#

YL1

22

PCIE_PTX_IRX_N2
PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2

5 PCIE_ITX_C_PRX_P2
5 PCIE_ITX_C_PRX_N2
12 LAN_CLKREQ#

PCIE_PTX_IRX_P2
0.1U_0402_16V4Z

LAN_X2

11 CLK_PCIE_LAN
11 CLK_PCIE_LAN#

25MHZ_20PF_7A25000012
1

CL26

27P_0402_50V8J

27P_0402_50V8J

LANWAKEB

26

ISOLATEB

DVDD33
DVDD33

27
39

14
15
38

NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT

AVDD33
AVDD33
AVDD33
AVDD33

12
42
47
48

EVDD10

21

2 1K_0402_5%
ENSWREG

2
2

RL7
15K_0402_5%

RTL8111E

NC

NC

Pin15

NC

Pin38

1K ohm Pull-high

13
29
41

28

+LAN_VDDREG

RTL8105E

DVDD10
DVDD10
DVDD10

CKXTAL2

RL22 1

Pin14

1
2
4
5
7
8
10
11

44

1K_0402_1%

ISOLATEB

MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3

LAN_X2

Reserve RL6 on10/19

@RL6
@
RL6

30
32

CKXTAL1

12 FCH_PCIE_WAKE

+3V_LAN

EECS/SCL
EEDI/SDA

43

ISOLATEB

+3VS

31
37
40

LAN_X1

CL27
2

LED3/EEDO
LED1/EESK
LED0

1
RL5

2
2.49K_0402_1%

33

ENSWREG

34
35

VDDREG
VDDREG

46

RSET

24
49

10K ohm PD

GND
PGND

+LAN_VDD10

RL2
RL1

LL1 8105E_VB@
+LAN_REGOUT
1
2
2.2UH +-5% NLC252018T-2R2J-N

1 10K_0402_5%
1 10K_0402_5%

2
2

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-

3
6
9
45

REGOUT

36

CL9
0.1U_0402_16V4Z

0.1U_0402_16V4Z
0.1U_0402_16V4Z

1
1

0.1U_0402_16V4Z

+LAN_VDD10

2
CL10
2
CL4
2
CL5
2
CL6

0.1U_0402_16V4Z

+LAN_EVDD10

2
0_0603_5%

AVDD10
AVDD10
AVDD10
AVDD10

8105E_VB@

+LAN_VDD10

+3V_LAN

Close to Pin 27,39,12,47,48

1
Layout Note: LL1 must be
CL13
within 200mil to Pin36,
CL13,CL9 must be within
4.7U_0603_6.3V6K
2
8105E_VB@
200mil to LL1
+LAN_REGOUT: Width =60mil

+3V_LAN

1
LL2
CL18
1U_0402_6.3V6K

+3V_LAN

CL17
0.1U_0402_16V4Z
1

Close to Pin 3,6,9,13,29,41,45


+LAN_VDD10

Close to Pin 21
0.1U_0402_16V4Z
+LAN_EVDD10

0.1U_0402_16V4Z

+LAN_VDD10

0.1U_0402_16V4Z
+3V_LAN
UL1

8105E_VB@
2
0_0603_5%

+LAN_REGOUT

+LAN_VDDREG

1
LL3
CL28
4.7U_0603_6.3V6K

RTL8105E-VC QFN _6X6


8105E_VC@

8105E_VB@

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

2
CL19
2
CL20
2
CL21
2
CL22

1
1
1

CL29

8105E_VB@

+3VALW TO +3V_LAN

LAN Conn.

+3V_LAN
+3VALW
2

+3VALW

QL1

1
@
2
2
47K_0402_5%
1
AO3413_SOT23
CL14
0.01U_0402_25V7K
@

0.1U_0402_16V4Z

3
1

1
RL16

ENSWREG
PJ28
JUMP_43X39
@

8105E_VC@

+3V_LAN

0_0402_5%

WOL_EN#

8105E_VB@
CL12

23

RL4

Vgs=-4.5V,Id=3A,Rds<97mohm
@

RL25
100K_0402_5%

RL23

JLAN CONN@

0_0402_5%

+3V_LAN
LAN_CLKREQ#

RL10 2

PR4-

PR4+

PR2-

PR3-

PR3+

RJ45_MIDI1+

PR2+

RJ45_MIDI0-

PR1-

RJ45_MIDI0+

PR1+

1 10K_0402_5%

Short PJ28 and reserve QL1,CL12,CL14 and RL25 on 10/18

CL3

10U_0805_6.3V6M

1
CL8

CL7

CL15

10U_0805_6.3V6M

1U_0402_6.3V6K

4.7U_0805_10V4Z

RJ45_MIDI1FCH_PCIE_WAKE

RL3

1 10K_0402_5%

WOL_EN#

23

WOL_EN

ISOLATEB
RL11

0_0402_5%

RL12

0_0402_5%

UL4
16
15
14
13
12
11
10
9

RJ45_MIDI1RJ45_MIDI1+

RJ45_MIDI0RJ45_MIDI0+

CL41 1000P_0402_50V7K
2
1

1
RL15

2
75_0402_1%

1
RL13

2
75_0402_1%

RJ45_GND

RJ45_GND

1
CL36

CL37
120P_0402_ 50VJ

CL38
4.7U_0603_6.3V6K

@
AZC199-02SPR7G_SOT23-3

CL34
0.1U_0402_25V6

LANGND
1

NS681610

10

2 1000P_1808_3KV7K

D13

Place these components


colsed to LAN chip

SHLD2
SANTA_130452-C

CL42 1000P_0402_50V7K
2
1

TX+
TXCT
NC
NC
CT
RX+
RX-

LAN_MDI0LAN_MDI0+

TD+
TDCT
NC
NC
CT
RD+
RD-

1
2
3
4
5
6
7
8

LAN_MDI1LAN_MDI1+

SHLD1

Compal Secret Data

Security Classification
2010-09-09

Issued Date

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

19

of

38

CC2
@
2 100P_0402_50V8J

RC1
6.19K_0402_1%
2
1

UC1

12
12

+3VS_CR
2
0_0805_5%

REFE

2
3

DM
DP

+V1_8

4
5
6

3V3_IN
CARD_3V3
V18

XD_CD#

+VCC_3IN1

CC1
4.7U_0805_10V4Z

CC3

CC4
1U_0402_6.3V6K
SDWP_MSCLK

8
9
10
11
12

SD_DATA1
SD_DATA0

SP1
SP2
SP3
SP4
SP5

25

0.1U_0402_16V4Z

1
RC4

+3VS

USB20_N7
USB20_P7

1
USB20_N7
USB20_P7

GPIO0

17

CLK_IN

24

XD_D7

23

SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6

22
21
20
19
18
16
15
14
13

EPAD

CLK_48M_CR_R

CLK_48M_CR_R 11

< 48MHz >

SD_DATA2_MS_DATA5
MS_DATA1_SD_DATA3
SDCMD
MS_DATA2_SDCLK

1
RC6

2 MS_DATA2_SDCLK_R
0_0402_5%

SDCD#

RTS5137-GR QFN 24P_4X4


2

for EMI request

CC7
@

10P_0402_50V8J
CC8

10P_0402_50V8J
CC9

10P_0402_50V8J

RC21

MS_DATA2_SDCLK

10_0402_5%
RC31

SDWP_MSCLK

10_0402_5%
RC71

CLK_48M_CR_R

10_0402_5%
@

< 2 in 1 Card Reader >


JREAD
1
2
3
4
5
6

MS_DATA1_SD_DATA3
SDCMD

D0
D1
D2
WP
CD

7
8
9
10
11

SD_DATA0
SD_DATA1
SD_DATA2_MS_DATA5
SDWP_MSCLK
SDCD#

GND1
GND2
GND3
GND4

12
13
14
15

D3
CMD
VSS1
VDD
CLK
VSS2

+VCC_3IN1

MS_DATA2_SDCLK_R
1

CC5
0.1U_0402_16V4Z

CC6
1U_0402_6.3V6K

TAITW_PSDAT3-09GLAS1N14N
CONN@

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
B

4019BA

Monday, December 06, 2010


D

Sheet

20

of

38

Codec

0.1U_0402_16V4Z
1
1
CA57

CA1

10U_0805_6.3V6M

1
CA8

0.1U_0402_16V4Z
2
+AVDD

35 mA

MIC1_R_R

17 INT_MIC_CLK

INT_MIC_CLK

CA21
1

2
4.7U_0805_10V4Z

1
CA22

2 NBQ100505T-800Y-N_2P

1
1
@

4.7U_0805_10V4Z
2

INT_MIC_DATA

17 INT_MIC_DATA

EC_MUTE#

23 EC_MUTE#

MONO_IN
2
100P_0402_50V8J

1
CA12

SENSE_A

Add AGND to speaker area for SPK traces on 11/19

EC control EC_MUTE# behavior:


High-state / low-state

1
2
CA15
2.2U_0603_6.3V6K
CA60 1

2 0.1U_0603_50V7K+MIC1_VREFO_L

CA47 1

2 0.1U_0603_50V7K

CA48 1

2 0.1U_0603_50V7K

CA49 1

2 0.1U_0603_50V7K

CA50 1

2 0.1U_0603_50V7K

1
RA27

Sense Pin

SENSE A

Impedance

45
44

MIC1_L
MIC1_R
MIC2_L
MIC2_R

HP_OUT_L
HP_OUT_R

GPIO0/DMIC_DATA

GPIO1/DMIC_CLK

PD#
RESET#

12

PCBEEP

13

SENSE A

18

CA4

CA5

RA4
RA5

32
33

SYNC

10

BCLK

2
10U_0805_10V4Z

PCI Beep
12

+5VS

CA13
1
2

RA8
1
2
47K_0402_5%

PCH_SPKR

SDATA_OUT

SDATA_IN

EAPD

47

SPDIFO

48

CA6

place close to chip

RA12

SPKR+
SPKR-

22
22

CA18
0.1U_0402_16V4Z

75_0402_1%
75_0402_1%

HP_L
HP_R

22
22

12

AZ_SDOUT_HD 12
AZ_SDIN0_HD_R

2
RA6

1
33_0402_5%

AZ_SDIN0_HD

12

place close to chip


20

MIC2_VREFO

29

+MIC2_VREFO

30
28

+MIC1_VREFO_R

CBP

35

CBN

VREF

27

AC_VREF

JDREF

19

AC_JDREF2 RA9

PVSS2
PVSS1
DVSS2
DVSS1

22
22

AZ_SYNC_HD

36

MIC1_VREFO_L

SPKL+
SPKL-

MONO_OUT

SENSE B

MONO_IN

0.1U_0402_16V4Z

AZ_BITCLK_HD 12

MIC1_VREFO_R
LDO_CAP

43
42
49
7

+MIC1_VREFO_R

CA23

34

AVSS1
AVSS2

26
37

1
CA14

1 20K_0402_1%
1

CPVEE

2
2.2U_0603_6.3V6K

+MIC1_VREFO_L

+MIC2_VREFO

10U_0805_6.3V6M
1
2

CA17

2
2
0.1U_0402_16V4Z

@
CA52
1U_0402_6.3V4Z

@
CA51
1U_0402_6.3V4Z

CA46
1U_0402_6.3V4Z
B

@
CA16
10U_0805_10V4Z

ALC259-GR_QFN48_7X7

place close to chip

DGND

AGND

2
0_0603_5%

Codec Signals

Function

39.2K

PORT-I (PIN 32, 33)

Headphone out

20K

PORT-B (PIN 21, 22)

Ext. MIC

10K

PORT-C (PIN 23, 24)

5.1K

25

SPK_OUT_R+
SPK_OUT_R-

31

46

39

SPK_OUT_L+
SPK_OUT_L-

LINE2_L
LINE2_R

RA22
4.7K_0402_5%

PVDD2

9
DVDD_IO

LINE1_L
LINE1_R

16
17

RA7
1
2
47K_0402_5%

EC_BEEP#

10K_0402_5%

14
15
21
22

CA3

2
2
2
2
10U_0805_6.3V6M 0.1U_0402_16V4Z
40
41

11

12 AZ_RST_HD#

EC_MUTE#

UA1

23
24

RA48
CA28
27P_0402_50V8J

10U_0805_6.3V6M 0.1U_0402_16V4Z 1
2
0_0603_5%

68 mA

2
1

22

2
10U_0805_10V4Z

23

RA3

DVDD

Ext. Mic

CA63

EC Beep

0.1U_0402_16V4Z
+5VS
1
1
CA62
@
@
CA58

CA7

RA11 @
1
2
0_0603_5%

1
@

0.1U_0402_16V4Z

Beep sound
D

+PVDD2
1
CA61

PVDD1

2
1
0_0402_5%

2
10U_0805_6.3V6M

place close to chip

+3VS_DVDD

MIC1_R_L

place close to chip

22

CA2

RA1

2
10U_0805_6.3V6M

2
RA20 0_0402_5%

+5VS
CA43

JA1
JUMP_43X39

+DVDD_IO

38

+1.5VS

0.1U_0402_16V4Z

AVDD2

2
RA19 0_0402_5%

AVDD1

0.1U_0402_16V4Z
1
1
CA44

CA56

2
10U_0805_6.3V6M
+3VS

+3VS

RA2
1
2
0_0603_5%

600 mA
+PVDD1

place close to chip


22

MIC_SENSE

22

NBA_PLUG

2
RA10

1
20K_0402_1%

RA21

39.2K_0402_1%

SENSE_A

(PIN 48)

SENSE B

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-H (PIN 20)

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010-09-09

Issued Date

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA
Monday, December 06, 2010

Sheet
1

21

of

38

Speaker Connector
D

placement near Audio Codec


21

SPKL+

SPKL+

RA30
2
1
0_0603_5%

SPK_L1
1

CA31

@
10U_0805_10V4Z
2
1

CA33
21

Ext.MIC/LINE IN JACK

CA32
1U_0402_6.3V4Z
@

10U_0805_10V4Z
2

RA34
2
1
0_0603_5%

SPKL-

SPKL-

SPK_L2
AZ5125-02S.R7G_SOT23-3

RA23
21

SPKR+

SPKR+

DA5
SPK_R1

2
1
0_0603_5%

CA36
21

3
2

2
1
1K_0402_5%
RA32

21 MIC1_R_L
JSPK

SPK_L1
SPK_L2
SPK_R1
SPK_R2

CA35
1U_0402_6.3V4Z
@

10U_0805_10V4Z
2

RA24
2
1
0_0603_5%

SPKR-

SPKR-

1 RA31
2.2K_0402_5%

1
2
3
4

SPK_R2

DA10

+MIC1_VREFO_R
MIC1_R

CA34
10U_0805_10V4Z
2

RA33
1K_0402_5%
2
1

21 MIC1_R_R

MIC1_L
1 RA29
2.2K_0402_5%

1
2
3
4

+MIC1_VREFO_L
C

ACES_85204-0400N
CONN@

3
1
2
AZ5125-02S.R7G_SOT23-3

HeadPhone/LINE Out JACK

JLINE
5

HP_L

3
6
2
1

LA12
DA8
CA53

CA54

10
9
8
7

FOX_JA63331-B39S4-7F
CONN@

1
3

1
2
6
3

21

LA10
1
2 HP_R_L
FBMA-L11-160808-221LMT_2P
1
2 HP_L_L
FBMA-L11-160808-221LMT_2P

HP_R

NBA_PLUG

21

7
8
GND
GND

21
B

CA11

AZ5125-02S.R7G_SOT23-3

0.1U_0402_16V4Z
100P_0402_50V8J

For EMI

100P_0402_50V8J

Ext.MIC/LINE IN JACK

JEXMIC

MIC1_L

LA13

10
9
8
7

FOX_JA63331-B39S4-7F
CONN@

DA9

1
2
6
3

3
6
2
1

LA8
1
2 MIC1_L_R
FBMA-L11-160808-221LMT_2P
1
2 MIC1_L_L
FBMA-L11-160808-221LMT_2P

MIC1_R

21 MIC_SENSE

7
8
GND
GND

1
3

CA55

CA59

CA30

AZ5125-02S.R7G_SOT23-3

0.1U_0402_16V4Z
100P_0402_50V8J
100P_0402_50V8J

For EMI

Compal Secret Data

Security Classification
2010-09-09

Issued Date

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
B

4019BA

Monday, December 06, 2010

Sheet
1

22

of

38

for EMI request

+3VL
+3VL

2
2
0.1U_0402_16V4Z

11,18,19,24 PLT_RST#

12

ECRST#
EC_SCI#

EC_SCI#

ECRST#

1
0.1U_0402_16V4Z

24

KSI[0..7]

24

KSO[0..17]

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

RP1
1
2
3
4

+3VS

8
7
6
5

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
28
28
7
7

2.2K_0804_8P4R_5%

EC_SMI#
1

EC_SMI#

C1237
@
B

7/6 For Power LED PWM function

19

EC_INVT_PWM
FAN_SPEED1

18
18
25
25
24

E51_TXD
E51_RXD
ON/OFFBTN#
PWR_LED#
NUM_LED#

E51_TXD
E51_RXD
ON/OFFBTN#
PWR_LED#
NUM_LED#

@ R991
@R991
@R992
@
R992
R990

0_0402_5%
0_0402_5%
0_0402_5%

122
123

R872 @
2CRY2

R246
100K_0402_5%

10M_0402_5%
2
Y5

18P_0402_50V8J

OSC

4
NC

OSC
NC

18P_0402_50V8J

C1200

63
64
65
66
75
76

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

68
70
71
72

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

83
84
85
86
87
88

PS2 Interface

C1206

EC_BEEP#
ACOFF

ACOFF

BATT_TEMPA

29

BATT_TEMPA 28

R208
2 100K_0402_5%

ADP_V

ADP_V

29

EN_DFAN1
IREF
CHGVADJ

ADP_I

29

C387
2 0.22U_0603_16V4Z

EN_DFAN1 5
IREF
29
CHGVADJ 29

EC_MUTE#
USB_EN#

EC_MUTE# 21
USB_EN# 18

TP_CLK
TP_DATA

+5VS

TP_CLK 25
TP_DATA 25

SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

97
98
99
109

VGATE
WOL_EN#
VLDT_EN
LID_SW#

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

119
120
126
128

EC_SI_SPI_SO
EC_SO_SPI_SI
SPI_CLK
SPI_CS#

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

73
74
89
90
91
92
93
95
121
127

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

100
101
102
103
104
105
106
107
108

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

110
112
114
115
116
117
118

V18R

124

VGATE
WOL_EN#
VLDT_EN
LID_SW#

SPI Device Interface


SPI Flash ROM

GPIO
SM Bus

GPI

FSTCHG
BATT_FULL_LED#
CAPS_LED#
BATT_CHG_LOW_LED#
SYSON
VR_ON
ACIN_D

1
R861
TP_DATA
1
R863

26,34
19
26
24

EC_SI_SPI_SO 24
EC_SO_SPI_SI 24
SPI_CLK 24
SPI_CS# 24

SYSON

FSTCHG 29
BATT_FULL_LED# 25
CAPS_LED# 24
BATT_CHG_LOW_LED# 25
SYSON

SB_PWRGD
BKOFF#
WL_OFF#
EC_ID

2
4.7K_0402_5%
2
4.7K_0402_5%

R867 330K_0402_5%
1
2
D26
2

26,34

ACIN

13,29

EC_RSMRST# 12
EC_LID_OUT# 12
EC_ON
25,26
SB_PWRGD 12
BKOFF# 17
WL_OFF# 18

SUSP#

R869 2

1 10K_0402_5%

VR_ON

R462 2

1 10K_0402_5%

7/7 Change ED_ID from pin 108 to pin 107

UMA_ENBKL 7
SUSP#
PBTN_OUT#
USB_OC#0

SUSP#
18,26,31,32
PBTN_OUT# 12
USB_OC#0 12,18

+EC_V18R
C448
4.7U_0805_10V4Z

KB926QFE0_LQFP128_14X14

+3VALW

@
R435
100K_0402_5%

EC_ID

EC ver.

KB926D3

KB926E0

EC_ID

R436
100K_0402_5%
A

1 100K_0402_5% E51_TXD
2 100K_0402_5% PLT_RST#

R783 1
2

C1238 @ 0.1U_0402_16V4Z

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010-09-09

Issued Date

For ESD request

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

CH751H-40PT_SOD323-2

32.768KHZ_12.5PF_Q13MC14610002

1
2
R866 10K_0402_5%

ACIN_D

26,31
VR_ON

EC_RSMRST#
EC_LID_OUT#
EC_ON

+3VL

R874 2

EC_BEEP# 21

TP_CLK

XCLK1
XCLK0

1
1

1
C1199

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

RTC_CLK

WOL_EN

17 EC_INVT_PWM
5 FAN_SPEED1

CRY1
CRY2
11

PM_SLP_S3#
PM_SLP_S5#

12 PM_SLP_S3#
12 PM_SLP_S5#
0.1U_0402_16V4Z

12

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

DA Output

77
78
79
80

KSO2

to avoid EC entry ENE test mode

+3VL

AD

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

KSO[0..17]

KSO1

2
47K_0402_5%
2
47K_0402_5%

MISC

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

KSI[0..7]

21
23
26
27

PWM Output

11
24
35
94
113

1
R862
1
R864

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

+3VL
C

12
13
37
20
38

18P_0402_50V8J

2
C1197

CLK_PCI_EC

11,15,18,24 CLK_PCI_EC
PLT_RST#

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC &

2
100P_0402_50V8J
2
100P_0402_50V8J

0.1U_0402_16V4Z

SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

11,24 SERIRQ
11,18,24 LPC_FRAME#
11,18,24 LPC_AD3
11,18,24 LPC_AD2
11,18,24 LPC_AD1
11,18,24 LPC_AD0

1
2
3
4
5
7
8
10

BATT_TEMPA
1
C1187
ACIN_D
1
C1189

C1198

R859
47K_0402_5%
2
1

GATEA20

GATEA20

KB_RST#

GND
GND
GND
GND
GND

12
12

CRY1

0.1U_0402_16V4Z

VCC
VCC
VCC
VCC
VCC
VCC

C1196
10P_0402_50V8J
@

+3VL

C1188
1
2

C1195
1000P_0402_50V7K

1
1
1000P_0402_50V7K
U52

C1194

C1193

67

C1192

AVCC

C1191
0.1U_0402_16V4Z

AGND

0.1U_0402_16V4Z
1
2

69

C1190

R855
10_0402_5%
@

0.1U_0402_16V4Z
1
1

9
22
33
96
111
125

CLK_PCI_EC

SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA
Monday, December 06, 2010

Sheet
1

23

of

38

LPC Debug Port

SPI Flash (256KB)


@

Lid SW

HOLD

23

SPI_CLK

SPI_CLK

23 EC_SO_SPI_SI

SERIRQ

R865
U54
APX9132ATI-TRL_SOT23-3

EC_SI_SPI_SO 23

VDD

VOUT

C1202
0.1U_0402_16V4Z

LID_SW#

H7

PLT_RST# 11,18,19,23

11,18,23 LPC_AD3

LPC_AD2 11,18,23

11,18,23 LPC_AD1

LPC_AD0 11,18,23

10

CLK_PCI_EC 11,15,18,23

47K_0402_5%

Please place the PAD under DDR DIMM.


+3VS

R102

220P_0402_25V8J

1K_0402_5%

23

1
C1203
10P_0402_50V8J

11,18,23 LPC_FRAME#

0.1U_0402_16V4Z
SPI_CS#

R97
11,23 +3VL

R103
@

VSS

GND

VCC

C1201

SPI_CS#

+3VALW

SERIRQ_R

23

0_0402_5%

R101

U13

20mils

+3V_LID

+3VL

0_0402_5%

W25X20BVSNIG SOIC 8P

@ DEBUG_PAD

R876
22_0402_5%

change R102 value to 1K and R103 to be 220pF cap on 11/22

2
@ R877
1

SPI_CLK

1
C1205

2
10P_0402_50V8J

C1204
22P_0402_50V8J

10_0402_5%

reserve for EMI, close to U13


reserve for EMI

KEYBOARD CONN.
Notice:KB Connector Pin Definition
Reversed with KB Membrane Pin Definition

KSI[0..7]
KSO[0..17]

KSI[0..7]

23

KSO[0..17] 23

JKB

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JKB34
KSO16

1
2
R881 300_0402_5%

+3VS

KSO17
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
JKB4
2
1
CAPS_LED# R882 300_0402_5%
NUM_LED#

ACES_88170-3400
CONN@

please close to JKB1


KSO16

1
C1207
1
C1208
KSO2
1
C1209
KSO1
1
C1210
KSO0
1
C1211
KSO4
1
C1212
KSO3
1
C1213
KSO5
1
C1214
KSO14
1
C1215
KSO6
1
C1216
KSO7
1
C1217
KSO13
1
C1218
KSO8
1
C1219
KSO9
1
C1220
KSO10
1
C1221
KSO11
1
C1222
KSO12
1
C1223
KSO15
1
C1224
KSI7
1
C1225
KSI2
1
C1226
KSI3
1
C1227
KSI4
1
C1228
KSI0
1
C1229
KSI5
1
C1230
KSI6
1
C1231
KSI1
1
C1232
CAPS_LED#
1
C1233
NUM_LED#
1
C1234
KSO17

2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J

+3VS
CAPS_LED# 23
NUM_LED# 23

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010-09-09

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA
Monday, December 06, 2010

Sheet

24

of

38

< Touch / B Connector >

+3VL

Q163A change part number from SB00000AR00 to SB00000DH00

on 9/15

Power Button

R883
51_ON#

100K_0402_5%

BTM side

< Power / B Connector >

Right Switch
SW4

R884
10K_0402_5%

23

JPOWER
1 1
2 2
3 3
4 4
5 G1
6 G2

ON/OFFBTN#

ON/OFFBTN#

For EMI request


D12

1
2
3
4
5
6

+5VS
23
23

TP_CLK
TP_DATA

TP_SWL
TP_SWR

Left Switch
D11

G7
G8

7
8

1
2
3
4
5
6

P-TWO_161021-06021_6P-T
CONN@

SW1
TP_SWL

JTOUCH

4
SMT1-05-A_4P

ACES_85201-0405N
CONN@

AZ5125-02S.R7G_SOT23-3

TP_SWR

EC_ON

23,26

6
5

SMT1-05-A_4P

C1235
0.1U_0402_25V6
@

27

Q163A
DMN66D0LDW-7 2N_SOT363-6

ON/OFFBTN#

6
5

1
3

@
SW6
1

debug phase using

AZ5125-02S.R7G_SOT23-3

4
6
5

SMT1-05-A_4P

Screw Hole
Vf=1.9V(typ),2.4V(max)
If=20mA(max)

H13
H_3P0
@

H14
H_3P0
@

H_3P0
@

H12
H_3P0
@

PWR_LED# 23

2 510_0402_5%

BATT_CHG_LOW_LED#

3 R773 1

2 510_0402_5%

BATT_FULL_LED# 23

YG
3

H2
H_2P7x3P2N
@

23

H16
H_2P7N
@

H_5P0N
@

YG

2 R774 1

+5VALW

2 510_0402_5%

H11
H_3P0
@

1
H1

D67
R768 1

H10
H_3P0
@

D70

+5VALW

H9
H_3P0
@

H_3P0
@

Vf=1.8V(typ),2.0V(max) for amber


Vf=1.8V(typ),2.0V(max) for green
If=20mA(max)

H8

H6

DC IN/ BATT CHARGE

POWER/SUSPEND LED

HT-110UYG5_YELLOW GREEN
HT-210UD5-UYG5_AMBER-YEL GRN

CPU

MINI CARD -- WLAN


H18
H_4P7
@

H19
H_3P3
@

H_3P3
@

H23
H_4P2x4P7
@

H22
H_4P2x4P7
@

H21
H_4P2
@

H20

PCB Fedical Mark PAD


1

FD3
@

FD4
@

FD2
@

FD1
@
B

ESD reserved
+5VS
+3VS

B+

+3VS

+1.1VS

ISPD
PJP1

C1258

0.1U_0402_25V6

0.1U_0402_25V6

C1262

0.1U_0402_25V6

C1263

C1261

C1260

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

C1259

0.1U_0402_25V6

C1257

ZZZ

PCB

DC-IN

PJP1
45@

PCB SKU LA-6849P & LS-6841P Rev10

Near H5

Near H11

Near H12

Near H8

Near H14

Near H13

Near R972

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010-09-09

2010-09-09

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA
Monday, December 06, 2010

Sheet
1

25

of

38

+1.5V

< +1.5V TO +1.5VS >

Q5
+5VS

Q2

C449

RUNON
2

SI4800BDY_SO8

C462
1U_0402_6.3V6K

C463
10U_0805_6.3V6M

4.7U_0805_10V4Z

R305
2

4.7U_0805_10V4Z
1.5VS_ENABLE

R285
750K_0402_5% +VSB

SUSP

C466

R286

2N7002DW-T/R7_SOT363-6
Q34B

0.01U_0402_25V7K
SUSP

< +1.1VALW TO +1.1VS >

BOOT_ON

+1.1VALW

8
7
6
5

R251
4.7U_0805_10V4Z

RUNON

SUSP

Q14A
2N7002DW-T/R7_SOT363-6

4.7U_0805_10V4Z

4.7U_0805_10V4Z

Q14B
2N7002DW-T/R7_SOT363-6

C475

R291
0.01U_0402_25V7K

1U_0402_6.3V6K

1 0_0402_5%

VGATE#

+ C158
@
390U_2.5V_M_R10
2

4
2

+VSB

C474

VLDT_EN#

BOOT_ON @
@R47
R47 2
1

C472

C476

R290
330K_0402_5%

R300
+VSB

470_0805_5%
Q12B

10M_0402_5%

0.01U_0402_25V7K
BOOT_ON

2
1

C471

470_0805_5%
R287
1 750K_0402_5%

1U_0402_6.3V6K

SI4800BDY_SO8

1
2
3

SUSP

1 0_0402_5%

C469

1 0_0402_5%

31

C468

4.7U_0805_10V4Z

1
2
3
4

Inrush current = 0A

C470

S
S
S
G

Q6
IRF8113PBF_SO8

Inrush current = 0A

R45 2

BOOT_ON @
@R46
R46 2

2N7002DW-T/R7_SOT363-6

Q12A
2N7002DW-T/R7_SOT363-6

Q3
D
D
D
D

+1.1VS

+3VS

+3VALW

2N7002DW-T/R7_SOT363-6

Q11A
2N7002DW-T/R7_SOT363-6

< +3VALW TO +3VS >

Q11B
10M_0402_5%

8
7
6
5

470_0805_5%

SI4800BDY_SO8

1U_0402_6.3V6K

C464

470_0805_5%
C450

4.7U_0805_10V4Z

1
2
3
4

S
S
S
G

Inrush current = 0A

1
2
3
4

S
S
S
G

C452

D
D
D
D

R250

Inrush current = 0A

D
D
D
D

8
7
6
5

8
7
6
5

+5VS

+5VALW

+1.5VS

< +5VALW TO +5VS >

< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >


+5VL

+5VL

@
R816
100K_0402_5%

Q15A
2N7002DW-T/R7_SOT363-6
2
SUSP#

VLDT_EN#

EC_ON#

@
Q16A
18,23,31,32
23

VLDT_EN

@
Q16B
2N7002DW-T/R7_SOT363-6
5
EC_ON

VLDT_EN 2

23,25

2N7002DW-T/R7_SOT363-6

Q15B
2N7002DW-T/R7_SOT363-6
5
SYSON

33

R815
100K_0402_5%

SUSP

SUSP

100K_0402_5%

SYSON#

R245

R814
100K_0402_5%

23,31

+5VL

+5VL

< Discharge circuit >

+5VL

2
2
470_0805_5%

470_0805_5%

R254
@

SUSP

D
Q23

2
G

S 2N7002_SOT23-3

EC_ON#

1
1

S 2N7002_SOT23-3

D
Q10

2
G

SUSP

D
Q17

2
G

470_0805_5%

R253
R258

2
6

SYSON#

@
Q35A
2N7002DW-T/R7_SOT363-6
2
VR_ON 23,34

S 2N7002_SOT23-3

Q22

2
G

S 2N7002_SOT23-3
@

VGATE

Q35B
2N7002DW-T/R7_SOT363-6
5

+1.1VALW

470_0805_5%

VGATE#
@

+1.8VS

R257

R803
@
100K_0402_5%

R802
@
100K_0402_5%

23,34

+0.75VS

+1.5V

+5VL

Compal Secret Data

Security Classification
Issued Date

2010-09-09

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

26

of

38

VIN

PD3
1

RLS4148_LL34-2

N1

RLS4148_LL34-2

VS

1
PR10
100K_0402_1%

PC6

0.22U_0603_25V7K
2

1
2

1
2

PC4
100P_0402_50V8J

@ SINGA_2DW-0005-B03

PC3
1000P_0402_50V7K

PC2
100P_0402_50V8J

PC1
1000P_0402_50V7K

PR9
68_1206_5%
2

PD4

BATT+

DC_IN_S2

2
5A_24V_0466005.NR

PR8
68_1206_5%

DC_IN_S1 1

PJP1

PQ4

TP0610K-T1-E3_SOT23-3

VIN
PL1
SMB3025500YA_2P
1
2

PF1

DC301001M80

PC5
0.1U_0603_25V7K

PR11
25

51_ON#

22K_0402_1%

@
2

+3VALWP

@ PJ2

PJ332
1 1

+3VALW

+VSBP

(5A,200mils ,Via NO.= 10)


OCP=8.6A

+5VALW

+3VL

+1.1VALW

(10A,600mils ,Via NO.= 10)


OCP=A

+1.8VSP

+1.5VP

@ PJ152
1 1

@ PJ102
+1.8VS

+1.05VSP

+1.05VS

JUMP_43X118

(2.15A,100mils ,Via NO.= 5)


OCP=A

@ PJ3
2

+1.1VALWP

JUMP_43X118

(5A,200mils ,Via NO.= 10)


OCP=7.9A

+VSB

(120mA,20mils ,Via NO.= 1)

JUMP_43X118

+3VLP

@ PJ112
1

@ PJ182

JUMP_43X118

@ PJ352
2

+5VALWP

JUMP_43X39

JUMP_43X118
3

(5.7A,240mils ,Via NO.= 12)


OCP=A
@ PJ76

+1.5V

JUMP_43X39

JUMP_43X118

(100mA,20mils ,Via NO.= 1)

(5A,200mils ,Via NO.= 10)


OCP=A

+0.75VSP

+0.75VS

JUMP_43X79

(0.5A,20mils ,Via NO.= 1)

@ PJ4
VL

@ PJ5

+5VL
+APU_VDDNBP

JUMP_43X39

+APU_VDDNB

JUMP_43X118

(100mA,20mils ,Via NO.= 1)

ACIN

(10A,400mils ,Via NO.= 20)


OCP=A

Precharge detector
Min.
typ.
Max.
H-->L 14.42V 14.74V 15.23V
L-->H 15.39V 15.88V 16.39V

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010


D

Sheet

27

of

38

VMB

@ PJP2
1

BATT+

BATT_P4
BATT_P5
EC_SMDA
EC_SMCA

SUYIN_200045MR009G171ZR

PC8
0.01U_0402_25V7K

PC7
1000P_0402_50V7K

PR14
1K_0402_1%

PH1 under CPU botten side :


CPU thermal protection at 95 degree C
Recovery at 56 degree C

7A_24VDC_429007.WRML

VL
1

PD6
PJSOT24C_SOT23-3

PD5
PJSOT24C_SOT23-3

2
1

PR15
19.6K_0402_1%

PC9
0.1U_0402_25V6

+3VL

PR16
6.49K_0402_1%
2
1

PR18
8.66K_0402_1%

GND
GND
GND
GND

BATT_S1

1
2
3
4
5
6
7
8
9

10
11
12
13

PL2
SMB3025500YA_2P
1
2

PF2
1
2
3
4
5
6
7
8
9

30

VS_ON

GND RHYST1

OT1 TMSNS2

OT2 RHYST2

VCC TMSNS1

BATT_TEMPA 23

PH1
100K_0402_1%_NCP15WF104F03RC
2

PR21
100_0402_1%
1

PR20
100_0402_1%

PU1

PR19
1K_0402_1%

G718TM1U_SOT23-8

EC_SMB_DA1 23

EC_SMB_CK1 23

PQ5
TP0610K-T1-E3_SOT23-3
3

B+

+VSBP

PR24
1

PR25
100K_0402_1%

1
2

1
2

VL

PC10
0.22U_0603_25V7K

2
1
PR23
100K_0402_1%

PC11 @
0.1U_0603_25V7K

22K_0402_1%

PR26
30,32

POK

PQ6
SSM3K7002FU_SC70-3

2
G

@ PC12
.1U_0402_16V7K

0_0402_5%

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010


D

Sheet

28

of

38

1
CSON

22

CSOP

21

PR2312
1 20_0402_5%
PC220
0.1U_0603_25V7K
1
2
PR232
2_0402_5%

CSIP

19

ICM

PHASE

18

LX_CHG

VREF

UGATE

17

DH_CHG

1.43K_0402_1%

1
2

5
6
7
8

BATT+
4

16

PR205
BST_CHG
1
2
0_0603_5%

10

ACLIM

VDDP

15

6251VDDP

11

VADJ

LGATE

14

DL_CHG

12

GND

PGND

13

0.1U_0603_25V7K
PD202
RB751V-40_SOD323-2
1
2 6251VDD

PR233
PC221
4.7U_0603_6.3V6M

4.7_0603_5%

PC206
680P_0603_50V7K
AO4466L_SO8

PC207
10U_1206_25V6M
2
1

BOOT

PC204
10U_1206_25V6M
2
1

CHLIM

3
0.02_1206_1%

PC203
10U_1206_25V6M
2
1

PC205
BST_CHGA 2
1

PC202
10U_1206_25V6M
2
1

6251aclim

PR235
1
2

PR206
4.7_1206_5%

PQ202

15K_0402_1%

PR223

1
2

0.01U_0402_25V7K

1
PR221
100K_0402_1%

PC216

ACOFF

6251VREF 1

PL202
AO4466L_SO8
1UH_PCMC063T-1R0MN_11A_20%
CHG
1
2

.1U_0402_16V7K

23

PQ213
DTC115EUA_SC70-3
ACOFF
2

6251VREF

PR222

PQ201

IREF

VCOMP

CSOP

1
2
47K_0402_1%

PC215
1
2

PR220
174K_0402_1%
2
1

6
PR219

23

10K_0402_1%

ADP_I

20

PR211
47K_0402_1%
1
2

CSIN

23

ICOMP

CSON

5
6
7
8

0.01U_0402_25V7K

6800P_0402_25V7K

PR218

PR229 20_0402_5%
1
2
PC219
0.047U_0402_16V7K
1
2
PR230
20_0402_5%

5
G

PACIN

PC214
1
2

CELLS

PQ212B
DMN66D0LDW-7_SOT363-6

1 1

EN

3
2
1

PC213
1
2

0.1U_0603_25V7K
ACPRN

PQ212A
DMN66D0LDW-7_SOT363-6

ACSET ACPRN

23

G
1

PC217
1000P_0402_25V8J
2
1

1 1

6251_EN

2BATT_ON

24

100K_0402_1%

100K_0402_1%

PC218
DCIN
2

VIN

PR238
PQ215
DTC115EUA_SC70-3

PR228
14.3K_0402_1%

DCIN

VDD

PR236
1
2
47K_0402_1%

6251VDD

1
PR217

PR213
150K_0402_1%

PQ211
DTC115EUA_SC70-3

BATT_ON

FSTCHG

PR227
10_1206_5%
PU200

23

PR216
10K_0402_1%
2
1

ACSETIN

PQ210
DTA144EUA_SC70-3

8
7
6
5

PR237
10K_0402_1%

PR226
191K_0402_1%

PD201
RB751V-40_SOD323-2

ACSETIN

1
PR212
200K_0402_1%

PC212
2.2U_0603_6.3V6K

1
3

PC210
0.1U_0603_25V7K
2
1

1
PR210
200K_0402_1%

PC211
5600P_0402_25V7K

PC236
10U_1206_25V6M
2
1

CSIP

VIN

1
2
3
PC235
10U_1206_25V6M
2
1

PQ207
AO4435L_SO8

CHG_B+

3
2
1

PL201
2
1
1.2UH_1231AS-H-1R2N=P3_2.9A_30%
CSIN
PC234
10U_1206_25V6M
2
1

B+

0.025_1206_1%
4

B340A_SMA2

8
7
6
5

PC233
4.7U_0805_25V6-K
2
1

1
2
3

PC232
4.7U_0805_25V6-K
2
1

PC231
4.7U_0805_25V6-K
2
1

VIN

PR215

P3

PQ204
AO4409L_SO8

PC239
10U_1206_25V6M
2
1

P2

PD203

PC238
10U_1206_25V6M
2
1

PC237
10U_1206_25V6M
2
1

ISL6251AHAZ-T_QSOP24

PR224
1

15.4K_0402_1%

23 CHGVADJ

PR225
31.6K_0402_1% 6251VDD

VIN

IREF=0.254V~3.048V

4V

VCHLIM need over 95mV

4.2V

1.882V

4.35V

3.2935V

PR240
47K_0402_1%

CHGVADJ

PR242
10K_0402_1%

1
PR246
309K_0402_1%

13,23

PR247
10K_0402_1%
1
2

PACIN

ADP_V

23

PR243
14.3K_0402_1%
2

High
Low 17.44V

18.089V

PC223
.1U_0402_16V7K

Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.0817V, Iinput=1.4526A

PR248
47K_0402_1%
2

ACPRN

CP mode
Vaclim=2.39*(20K//152K/(20K//152K+24.9K//152K))=1.0817V

Vin Detector

PQ214
DTC115EUA_SC70-3
1

ACIN

0V

PR241
10K_0402_1%
1
2

Vcell

CHGVADJ=(Vcell-4)*9.445

CC=0.25A~3A
IREF=1.096*Icharge

Iadapter=0~2.368A(45W) CP=Iadapter*0.92 CP=2.178A

Compal Secret Data

Security Classification
2010-09-09

Issued Date

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010

Sheet
1

29

of

38

2VREF_6182

PC363
1U_0603_10V6K

LL2

LL1

LX_5V

LG_3V

12

DRVL2

DRVL1

19

LG_5V

PC369

4.7U_0805_25V6K
2
1

4.7U_0805_25V6K
2
1

5
6
7
8
AO4466L_SO8

1 2

TPS51125ARGER_QFN24_4X4

+
PC356
680P_0603_50V7K

5
G

PR361

UP6182_B+

PQ360B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PC365
0.1U_0603_25V7K

2VREF_6182

Ipeak = 7 A

F = 305k Hz

AO4712L_SO8

VL
PC364
4.7U_0805_10V6K

VL

PR370
2
1
100K_0402_1%

Imax = 4.9 A
1

Total Capacitor = 150 uF


ESR = 35m Ohm

PR371
1
2
100K_0402_1%

0.1U_0402_10V7K

ESR = 35m Ohm

PQ361
DTC115EUA_SC70-3

PC370
2
1
@

PR372

2
A

Total Capacitor = 150 uF

2
1

VS

F = 245k Hz

VS_ON

42.2K_0402_1%

28

Compal Secret Data

Security Classification
2010-09-09

Issued Date

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Imax = 4.2 A

100K_0402_5%

1
D

ENTRIP2

ENTRIP1

PC362
1U_0402_6.3V6K

PQ360A

PC352
330U_6.3V_M

PR356
4.7_1206_5%

15mohm

Ipeak = 6 A

+5VALWP

PL352
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
1
2
PQ352

VCLK
18

13

PC355
2 0.1U_0603_25V7K

3
2
1

21
20

28,32

5
6
7
8

DRVH1

2
1
PC366

1
ENTRIP1

2
VFB1

VREF

DRVH2

11

VREG5

10

LX_3V

VIN

UG_3V

PR355
BST_5V 1
2
0_0603_5%
UG_5V

EN0

B+

VFB2

22

3
2
1

1
2
3

AO4712L_SO8

ENTRIP2

23

VBST1

PQ351

15mohm

PC336
680P_0603_50V7K

POK

PGOOD

PR360
499K_0402_1%
1
2

330U_6.3V_M

24

VBST2

VO1

VREG3

PR336

PC332

PC367
68P_0402_50V8J

4.7_1206_5%

PR357
150K_0402_1%
1
2

17

PQ332

UP6182_B+

BST_3V

16

8
7
6
5

+3VALWP

VO2

GND

PL332
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
1
2

SKIPSEL

PR335
1
2
0_0603_5%

P PAD

TONSEL

25

ENTRIP2

PU330

15

1
2
3

PC335
AO4466L_SO8
0.1U_0603_25V7K
1

PR337
150K_0402_1%
1
2

14

1
PC361

PQ331

PR365
19.6K_0402_1%
1
2

4.7U_0805_10V6K

8
7
6
5

PC368
4.7U_0805_25V6K

1
2
C

PC360
4.7U_0805_25V6K

+3VLP

PR363
20K_0402_1%
1
2
ENTRIP1

B+

PL331
HCB4532KF-800T90_1812
1
2

PR364
30K_0402_1%
1
2

UP6182_B+

PR362
13K_0402_1%
1
2

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010

Sheet
1

30

of

38

PU180
SY8033BDBC_DFN10_3X3

PVIN

SVIN

EN

LX

FB

LX_1.8VS

+1.8VSP

0.1U_0402_10V7K

2
FB_1.8VS

Ipeak = 2.15A

Imax = 1.505A

2
1
PR184
10K_0402_1%

ILIM = 4A
F = 1M Hz
Total Capacitor = 264 uF
ESR = 2.273m Ohm

PC185

PR183
20K_0402_1%

1
PR186
2
PC186

@ PR182
499K_0402_1%

150K_0402_1%

4.7_1206_5%

NC

TP

NC

2 EN_1.8VS

PR181

11

18,23,26,32 SUSP#

FB=0.6Volt

680P_0603_50V7K

1
2

PC184
22U_0805_6.3V6M

PC187
68P_0402_50V8J
2
1

JUMP_43X39

LX

PVIN

PC183
22U_0805_6.3V6M

10

PL182
1UH_PCMC063T-1R0MN_11A_20%
1
2

+5VALW

PG

@ PJ181

PC182
22U_0805_6.3V6M

B+

PC165
68P_0402_50V8J
2
1

PC163
4.7U_0805_25V6-K
2
1

5
6
7
8
PQ151
PR164
255K_0402_1%
1
2

PC164
4.7U_0805_25V6-K
2
1

PL151
HCB2012KF-121T50_0805
1
2

PR160

LX

12

LX_1.5V

VCC

ILIM

11

VDD

10

4
5

FB

PGOOD

VFB=0.75V

PR157
1
2
9.1K_0402_1%

DL

PQ152

+5VALW
DL_1.5V

PR156
4.7_1206_5%

1
+ PC152
330U_6.3V_M

PC162
4.7U_0805_10V6K

PC156
AO4712L_SO8 680P_0603_50V7K

Ipeak = 6A

G5603RU1U_TQFN14_3P5X3P5

PGND
8

AGND

PC161
4.7U_0603_6.3V6K

14

TP

BST

OUT

+1.5VP

0.1U_0603_25V7K

100_0603_5%

DH_1.5V

PL152
1UH_PCMC063T-1R0MN_11A_20%
1
2

13

TON

AO4466L_SO8

PC155
1
2

BST_1.5V-1
DH

PR161
1

+5VALW

EN_SKIP

PU150

15

1
2

PC160 @
.1U_0402_16V7K

PR155
1
2
0_0603_5%

BST_1.5V

3
2
1

0_0402_5%

5
6
7
8

SYSON

3
2
1

23,26

Imax = 4.2A
F = 313kHz
PR162
1

Total Capacitor = 440 uF

5.1K_0402_1%

ESR = 12.5m Ohm

PR163
5.1K_0402_1%

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010


D

Sheet

31

of

38

PL114
HCB2012KF-121T50_0805

FB

VDD

10

PGOOD

DL_1.1VALW

LX_1.1VALW

PQ114

4
1

PGND
8

AGND
7

DL

+5VALW

G5603RU1U_TQFN14_3P5X3P5

PC117
4.7U_0805_10V6K

AO4712L_SO8

+1.1VALWP

PC120
330U_6.3V_M

2
PR118
16.5K_0402_1%

11

PR119
4.7_1206_5%

12

ILIM

PC114
4.7U_0603_6.3V6K

3
2
1

LX

VCC

15
TP

OUT

0.1U_0603_25V7K

PC118
680P_0603_50V7K

13

5
6
7
8

DH_1.1VALW

DH

3
2
1

TON

PL113
1UH_PCMC063T-1R0MN_11A_20%
1
2

PC121
1

EN_SKIP

2
PR114
100_0603_1%
1
2

PU110

+5VALW

PC119
@.1U_0402_16V7K

B+

AO4466L_SO8

BST_1.1V ALW

BST

POK

4
PR120
0_0603_5%
1
2

14

PR111
0_0402_5%
1
2
1

28,30

PR121
255K_0402_1%
1
2

PQ113

PC111
4.7U_0805_25V6-K

5
6
7
8

PC113
4.7U_0805_25V6-K

1.1VALW_B+

Ipeak = 10A

Imax = 7A
2

F = 314kHz
Total Capacitor = 220 uF
ESR = 25m Ohm

PR112
4.7K_0402_1%
1
2

PR113
10K_0402_1%

+5VALW

PJ101
JUMP_43X118
@

PC92
22U_0805_6.3V6M

PC93
1U_0603_6.3V6M

2
APL5916KAI-TRL_SO8

+1.05VSP
PC91
22U_0805_6.3V6M

FB

PR90
100K_0402_1%

PC90
39P_0402_50V8J

EN
POK

3
4

2
PR92
1K_0402_1%

PR91
316K_0402_1%
2

@ PC94
0.01U_0402_25V7K

1
@

VOUT
VOUT

+3VS

8
7

VCNTL
VIN
VIN

0_0402_5%
1
2

PU100
6
5
9

PR93

18,23,26,31 SUSP#

GND

+1.1VALW

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010


D

Sheet

32

of

38

PJ75
JUMP_43X118
@

PU75
VIN

VCNTL

2
3

GND

NC

VREF

NC

VOUT

NC

TP

PC275
2

PR269
1K_0402_1%

+3VALW

PC277
4.7U_0805_6.3V6K

+1.5V

1U_0603_10V6K

+0.75VSP

PC278
.1U_0402_16V7K
2
1

1
2

PR274

1K_0402_1%

PQ262
SSM3K7002FU_SC70-3

@PC279
@
PC279
.1U_0402_16V7K

2
G
1

26 SUSP

G2992F1U_SO8
PR268
0_0402_5%
1
2

PC276
10U_0603_6.3V6M

For shortage changed

Compal Secret Data

Security Classification
2010-09-09

Issued Date

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010

Sheet
1

33

of

38

PL501
HCB2012KF-121T50_0805

CPU_B+
PC570
33P_0402_50V8J
2
1

PR574
2_0603_5%

UGATE0

34

UGATE0

SVD

PHASE0

33

PHASE0

SVC

PGND0

32

ENABLE

RBIAS

OCSET

LGATE1

29

VDIFF0

PGND1

28

ISL6265CHRTZ-T_TQFN48_6X6

LGATE0

31

PVCC

30

7 APU_VDD0_RUN_FB_L
2

PR545
10_0402_1%
1

PC588
2
1
0.1U_0603_16V7K

PC582
68U_25V_M_R0.44

PC575
1U_0603_16V6K

2
LGATE0

TP

PR581
1.54K_0402_1%

49

ISN1
24

23

22

21

20

19

18

17

16

15

ISN0

PC516
680P_0603_50V7K

ISN0

ISP0

VSEN1

VSEN0

0_0402_5%
PR544
1 RTN0

+1.5V

DIFF_0

@ PC583
68U_25V_M_R0.44

LGATE0

PR580
13K_0402_1%

PR542
0_0402_5%
2
1

+5VALW

PR516
4.7_1206_5%

ISP0
ISN0
PR541
0_0402_5%

10_0402_1%

7 APU_VDD0_RUN_FB_H

14

ISP0
2

13

VSEN1
PR543

ISP1

25

VW1

26

BOOT1

COMP1

UGATE1

VW0

FB1

COMP0

12

VDIFF1

11

VSEN1

27

RTN1

PHASE1

RTN0

FB0

VSEN0

10

3
2
1

PQ504
AO4726L_SO8

ISN0

PWROK

+APU_CORE

PC515
0.22U_0603_10V7K

5
6
7
8

BOOT0

+APU_CORE

37
UGATE_NB

39

38
PHASE_NB

40
PGND_NB

LGATE_NB

41

42
RTN_NB

OCSET_NB

44

45

43
VSEN_NB

FSET_NB

46

VCC

FB_NB

47

48
VIN

35

PR538
0_0402_5%

PR539
26.1K_0402_1%
2
1

36

BOOT0

PL503
2.2UH_PCMC063T-2R2MN_8A_20%
1
2

ISP0

BOOT_NB

PGOOD

AO4466L_SO8

1 2

VR_ON
PR540
90.9K_0402_1%
2
1

1
PR537
0_0402_5%2

OFS/VFIXEN

23,26

PC587
4.7U_0805_25V6-K
2
1

2
ISL6265_PWROK

APU_SVD
APU_SVC

PR515
2.2_0603_1%
BOOT0 1
2 1

7
7

BOOT_NB

3
2
1

H_PWRGD_L

2
@PR535
@
PR535 100K_0402_5%
2
PR536 100K_0402_5%

PHASE0

11

COMP_NB

PQ503

UGATE0
PU500

2
VGATE

1 2

LGATE_NB

1
2

2
23,26

CPU_B+

PHASE_NB

@PR534
@
PR534
105K_0402_1%

PC502
220U_D2_2VY_R15M

PHASE_NB

UGATE_NB

7,11 H_PWRGD

PC586
4.7U_0805_25V6-K
2
1

1
2

@PR530
@
PR530
105K_0402_1%

@ PR532
10K_0402_1%

PR533
105K_0402_1%

APU_VDDNB_RUN_FB_L

+APU_VDDNBP

+
PC506
680P_0603_50V7K

PC585
4.7U_0805_25V6-K
2
1

1
PR576
@ PR578
0_0402_5%
10_0402_5%
1
2
PR577
23.7K_0402_1%
2
1

PC574
0.1U_0603_25V7K

PR531
0_0402_5%

PC505
0.22U_0603_10V7K
4

APU_VDDNB_RUN_FB_H

2.2UH_PCMC063T-2R2MN_8A_20%
PQ502
PR506
AO4726L_SO8 4.7_1206_5%

5
6
7
8

+3VS

+
2

3
2
1

+5VS

+3VS

PR575
0_0402_5%
2
1

LGATE_NB

B+

PL502
1

PR505
2.2_0603_1%
BOOT_NB
1
2 1
PR573
@ 10_0402_5%
1
2+APU_VDDNBP

AO4466L_SO8

+
2

PHASE_NB

PR572
22K_0402_1%
2
1

PC571
0.1U_0603_16V7K

CPU_B+

UGATE_NB

PC573
1000P_0402_50V7K
2
1
1

+5VALW

PC572
1000P_0402_50V7K

3
2
1

PR571
2_0603_5%
1
2

5
6
7
8

PR570
44.2K_0402_1%

PC581
4.7U_0805_25V6-K
2
1

PQ501
2

PC580
4.7U_0805_25V6-K
2
1

5
6
7
8

0_0402_5%
PR546
1

VW0

PR550
PC550
255_0402_1% 4700P_0402_25V7K
2
1 2
1

COMP0

PC551
100P_0402_50V8J

PR551
1K_0402_1%
2
1

PR552
2

PC553
2
1

PC552
1000P_0402_50V7K

PR553
6.81K_0402_1%
2
1

2010-09-09

Issued Date
PR554
36.5K_0402_1%

Deciphered Date

2010-09-09

Title

Date:

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Security Classification

54.9K_0402_1% 1200P_0402_50V7K

SCHEMATICS, MB A6849
Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

34

of

38

Version Change List ( P. I. R. List ) for Power Circuit


Page#

Title

Date

Request
Owner

2010/08/01

POWER

Issue Description

Solution Description
Release

P31

BATTERY CONN / OTP

2010/09/02

POWER

Add PD5,PD6 (For ESD)

DVT

P32

CHARGER

2010/09/02

POWER

Add PR246,PR247,PR248,PC223 (ADP_V)

DVT

P33

3VALWP/5VALWP

2010/09/02

POWER

PR337,PR357 change to 121k

DVT

P33

3VALWP/5VALWP

2010/09/02

POWER

PR365 change to 19.6k

DVT

P34

1.8VSP/1.5VP

2010/09/02

POWER

PR181 change to 150k, PC185 0.1uF

DVT

P35

1.1VALWP/1.0VSP

2010/09/02

POWER

PR91 change to 316k(For 1.05VSP)

DVT

P35

1.1VALWP/1.0VSP

2010/09/02

POWER

PC90 change to 39pF(1.05VSP)

DVT

P37

ACPU_CORE

2010/09/02

POWER

Add PR578 10_0402_5% , PR573 unpop.

DVT

P37

ACPU_CORE

2010/09/02

POWER

PR577 change to 23.7k

DVT

P37

ACPU_CORE

2010/09/02

POWER

PR539 change to 26.1k

DVT

P37

ACPU_CORE

2010/09/02

POWER

PR540 change to 90.9k

DVT

P37

ACPU_CORE

2010/09/02

POWER

PC551 change to 100pF

DVT

P37

ACPU_CORE

2010/09/02

POWER

PR546 change to 0_0402_5%

DVT

P37

ACPU_CORE

2010/09/02

POWER

PR580 change to 6.98k

DVT

P37

ACPU_CORE

2010/09/02

POWER

PR581 change to 1.87k

DVT

P32

CHARGER

2010/09/06

POWER

Add PC207,PC239 10uF (EMI)

DVT

Compal Secret Data

Security Classification
Issued Date

2010-09-09

Deciphered Date

2010-09-09

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATICS, MB A6849
Rev
B

4019BA

Monday, December 06, 2010

Sheet

35

of

38

PIR (Product Improve Record)

Version change list (P.I.R. List)


Item
1

Reason for change


Change pull up voltage

H/W section
PG#

from +5VALW to +5VL

Page 1 of 1

Modify List

Date

26

Change Q15A,Q15B,Q16A,Q16B,Q35A,Q35B from +5VALW


to +5VL

2010/09/15
2010/09/15

Net VR_ON# is unused

26

Delete net

Sleep and Charge function unused

13

Delete R1119 & R1120 & net SLP_CHG_M3, & SLP_CHG_M4

VR_ON# on

9/15

2010/09/15

Change power from 1.0V to 1.05V

Net +1.0VS_VDDPL --->+1.05VS_VDDPL


Net +1.0VS_VDD --->+1.05VS_VDD

2010/09/15

Add debug card port on wlan connector

18

Add LPC_AD0,LPC_AD1,LPC_AD2,LPC_AD3,LPC_FRAME# on Jwlan

2010/09/15

Change H7 Pin

24

Connect H7

to LPC_CLK1

2010/09/15

Add debug card port on Jwlan

18

Pin19 => CLK_PCI_EC

2010/09/15

Change Q33A,Q33B,Q8A,Q8B,Q163

Ver#

10

7,17,25
12,23

12

Change H7 Pin

Pin1 from CLK_PCI_SIO

Pin17 => PLT_RST#

and

change part number from SB00000AR00 to SB00000DH00

2010/09/15

Add C1198,C1236,C1237

2010/09/15

Add R1149 to R1158

For EMS request

H_THERMTRIP#

14

Part Number

For EMS request

11

13

leakage risk

7
24

2010/09/15
Add Q165 and R1064 and @D94 to enable
H_THERMTRIP# on 9/18

Connect H7

Pin1 from LPC_CLK1 to

CLK_PCI_EC

2010/09/18
2010/09/20

23

Remove 75W_65W net name in UMA platform.

2010/09/20

18

USB_OC#0 add pull high R51 to +3VALW

2010/09/20

use VLDT_EN# to turn on +1.1VALW to +1.1VS

26

Reserve R46 and stuff R45

2010/09/20

use BT_OFF#

to control BT_CTRL

11

Delete

2010/09/20

use BT_OFF#

to control BT_CTRL

Remove 75W_65W net name in UMA platform.


USB_OC#0 add pull high 10K to +3VALW

15

16

17

Add

net BT_PWR#

net BT_OFF# on U22.Y9

13

2010/09/20

18

use BT_OFF#

18

Change control net from BT_PWR# to BT_OFF#


and add R316 bypass BT_OFF# & BT_CTRL,and
reserve QM1

19

For desigh change

26

Reserve Q16A,Q16B,Q35A,Q35B,R802
,R803,R815,R816

2010/09/20

20

For desigh change

18

Put R259

2010/09/20

21

For desigh change

11

Reserve U56 and put R1072

2010/09/20

HDMI unused

11

TEST35 pull down through R1029

2010/09/20

For desigh change

Reserve R1014 and R1006,put R1002 ,R1004,and R1010

2010/09/20

2010/09/23

22
23

to control BT_CTRL

2010/09/20

24

For desigh change

Remove R92 ,R93,and

R94 pull up and down resistor

25

For desigh change

13

Pull down GPIO178 and GPIO180 with R1119 & R1120

2010/09/23

26

For desigh change

19

Mount RL6 on 10/4

2010/10/04

27

For desigh change

25

Delete H3 and H5

2010/10/04

28

Change +3VL_LID power rail from +3VALW to +3VL

24

Add R97 and reserve R101;Add net name +3VL_LID

2010/10/13

29

Change +3VL_LAN
to +3VALW

19

Short PJ28 and reserve QL1,CL12,CL14 and RL25

2010/10/18

30

Use WOL_EN to enable ISOLATEB

19

Reserve RL6 on 10/4

2010/10/19

15

Change Q164 P/N to SB570020020

2010/10/19

15

Reserve PJ29 and add

R1159 pull high

2010/10/26

31

32

turn on pin from WOL_EN#

Change Q164 footprint to SOT23-3


Add clearing password feature controlled by bios

33

For mechanical desigh change

25

Delete H15

34

H7 debug port function unused

25

Add R103 and reserve

R102

2010/11/17

35

H7 debug port function unused

24

Change R102 value to 1K and R103 to be 220pF cap

2010/11/22

36

For EMS request

21

Change R1085 to 10 ohm and R1088 to 10pF

2010/11/22

37

Add AGND to speaker area for SPK traces

21

Add CA60 capacitor to short GND and AGND

2010/11/19

2010/10/27

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010-09-09

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Document Number

SCHEMATICS, MB A6849

Rev
B

4019BA

Date:

Monday, December 06, 2010


1

Sheet

36

of

38

Version Change List ( P. I. R. List ) for Power Circuit


Rev.

NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------1

2010 . 06 . 21 Release

2010 . 07.25 modification list

P 33

PC16 change to SE070104Z80

Defore material EOL

PVT

P 38

PU12 change to SA000022M80

Before material MP schedule will impact PWWAE MP schedule

PVT

P 33

Remove PD6 , PD8 @

ESD test fail

PVT

P 34

Add PC132 , remove PC130 , PC131 , PR69 , PC41 @

For EMI fail

PVT

P 35

Add PC51 , remove PC49 , PC46 , PC57 , PC58 , PR89 , PR90 @

For EMI fail

PVT

P 36

Add PC79 , PC91 , PC133 , remove PR100 , PR108 , PC68 , PC77 @

For EMI fail

PVT

P 38

Remove PR125 , PR139 , PR151 , PC106 , PC111 , PC117 @

For EMI fail

PVT

2010 . 08.10 modification list

P 37

Change PU9 , PU11 to SA053310110

UP7711 stop using from now on

Pre-MP

P 38

Add PC218 , PC219 , PC371

For VCORE Ripple

Pre-MP

P 32

Add PR8

For Precharge rising current

Pre-MP

P 32 , P 33

PQ1 , PQ2 , PQ6 change to SB900840003

SB906100210 material delivery had problem

Pre-MP

P 35

Change PU5 to SA000020C80

UPI product stop using

Pre-MP

2010 . 08.16 modification list

2010 . 08.17 modification list

P 34

Change PU4 to SA00001EP80

SA00003TK00 stop using

Pre-MP

P 38

Remove PR127 @

To solve +1.1VALW noise

Pre-MP

P 34

Remove PR193 , PQ39 @

For PWWAE MP use 25W CPU

Pre-MP

2010 . 08.23 modification list

Compal Secret Data

Security Classification
2010-09-09

Issued Date

2010-09-09

Deciphered Date

Title

Compal Electronics, Inc.


SCHEMATICS, MB A6849

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
B

4019BA
Sheet

Monday, December 06, 2010


E

37

of

38

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010-09-09

Deciphered Date

2010-09-09

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATICS, MB A6849
Document Number

Rev
B

4019BA

Date:

Monday, December 06, 2010


1

Sheet

38

of

38

S-ar putea să vă placă și