A

Compal Confidential
2

PEW72/82/92 M/B Schematics Document

Intel Penryn Processor with Cantiga + DDRIII + ICH9M

2010-07-09
REV:1.0

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Cover Page
Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Friday, July 09, 2010

Sheet
E

of

44

Compal Confidential
page 4

uPGA-478 Package
(Socket P) page

HDMI Conn.

LCD Conn.

page 19

Clock Generator

EMC 1402

ICS9LPRS387
page 4

667/800/1066MHz

H_D#(0..63)

CRT Conn.

page 17

page 18

Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2

Intel Cantiga

DMI
PCI-Express

BANK 0, 1, 2, 3

1.5V DDRIII 800/1066

USB conn x1

C-Link

Intel ICH9-M

USB port 0

Bluetooth
Conn

CMOS
Camera

page 28

page 28

page 17

3.3V 48MHz

WLAN

page 25

HD Audio

BGA-676
page 20,21,22,23

port 0

HDA Codec

page 26

page 27

Card Reader
Realtek RTS5137

USB

3.3V 24.576MHz/48Mhz
S-ATA

LAN Broadcom
BCM57780

page 14,15

page 7,8,9,10,11,12,13

TMDS

page 19

Dual Channel

uFCBGA-1329

LVDS

HDMI
Level Shift

MINI Card x1

page 16

4,5,6

FSB

H_A#(3..35)

Thermal Sensor

Intel Penryn Processor

Fan Control

Model Name : PEW72/82/92

File Name : LA6631P

ALC272X

Audio AMP

page 32

SATA HDD
Conn.

page 33

page 24

RJ45

Phone Jack x2

page 26

page 33

LPC BUS
3

ENE KB926 E0
RTC CKT.

Small Board

page 29

page 20

LS-6581P

USB/B Conn.
Power On/Off CKT.
page 31

Int.KBD

Touch Pad

page 28

page 30

page 30

LS-6582P

POWER/B Conn.
page 30

DC/DC Interface CKT.

BIOS

LS-6583P
page 34

page 30

ODD/B Conn.

page 24

Power Circuit DC/DC

4

page 35,36,37,38
39,40,41,42

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Block Diagrams
Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

of

44

SIGNAL

STATE

Voltage Rails

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

+VALW

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

S5

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

N/A

N/A

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

N/A

N/A

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

Full ON

Power Plane

Description

S1

S3

VIN

Adapter power supply (19V)

N/A

B+

AC or battery power rail for power circuit.

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+0.75VS

0.75V power rail for DDR

ON

OFF

OFF
OFF

+1.05VS

1.05V switched power rail

ON

OFF

+1.5V

1.5V power rail for DDR

ON

ON

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.8V

1.8V power rail for LVDS

ON

ON

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

Vcc
Ra/Rc/Re

+3V

3.3V power rail for SB

ON

ON

OFF

Board ID

+3V_LAN

3.3V power rail for LAN

ON

ON

ON

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

0
1
2
3
4
5
6
7

Board ID / SKU ID Table for AD channel

3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

BOARD ID Table
Board ID
0
1
2
3
4
5
6
7

External PCI Devices

Device

IDSEL#

EC SM Bus1 address
3

Device

Address

Smart Battery

0001 011X b

REQ#/GNT#

Interrupts

EC SM Bus2 address
Device

UHCI1

100 1100 b

EHCI1

UHCI2
UHCI3
UHCI4

ICH9M SM Bus address

Device

Address

Clock Generator
(ICS9LVRS387, RTM890N)

1101 001Xb

DDR DIMM1

1001 000Xb

DDR DIMM2

1001 010Xb

PCB Revision
0.1
0.2
0.3
1.0

BTO Item
GM45 B3
GM45 A1
GL40 B3
GM40 A1
Bluetooth

EHCI2

UHCI5
UHCI6

BOM Structure
GM@
GMA1@
GL@
GLA1@
BT@

PCIE table
PCIE port1

USB table

Address

SMSC EMC1402

BTO Option Table

Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11

MB USB Conn.
USB/B Conn.

PCIE port2

Wireless Card

PCIE port3

PCIE LAN

PCIE port4

CMOS Camera
Card Reader

PCIE port5
PCIE port6

USB/B Conn.

SATA table

Blue Tooth
Wireless Card

SATA port0

HDD

SATA port1

ODD

SATA port2
SATA port3
SATA port4

SATA port5

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Notes List
Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

of

44

H_REQ#[0..4]

FAN1 Conn

H_RS#[0..2]

H_RS#[0..2]

+5VS

JCPU1A

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

K3
H2
K2
J3
L1

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

21
21
21

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

A20M#
FERR#
IGNNE#

21
21
21
21

H_STPCLK#
H_INTR
H_NMI
H_SMI#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

M4
N5
T2
V3
B2
D2
D22
D3
F6

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]

CONTROL

H_ADS#
H_BNR#
H_BPRI#

H5
F21
E1

H_DEFER# 7
H_DRDY# 7
H_DBSY# 7

F1
D20
B3

LOCK#

H4

RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#

C1
F3
F4
G3
G2

HIT#
HITM#

G6
E4

H_BR0#

H_INIT#

21

29

EN_DFAN1

1
2
R51
330_0402_5%

1
2
3
4

+VCC_FAN1
VSET

H_LOCK# 7

EN
VIN
VOUT
VSET

GND
GND
GND
GND

D6 @
1SS355_SOD323-2

8
7
6
5

APL5607KI-TRG_SO8
C106
0.01U_0402_16V7K

20080430
Add soft-start for +5VS drop issue

H_HIT#
H_HITM#

7
7

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

XDP_BPM#5
XDP_TCK
XDP_TDI
@
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

PROCHOT#
THERMDA
THERMDC

D21
A24
B25

H_PROCHOT#
H_THERMDA
H_THERMDC

THERMTRIP#

D7 @
BAS16_SOT23-3
2

C122
10U_0805_10V6K
1
2

H_RESET# 7

H_TRDY#

U5

H_IERR#

H_RESET#
H_RS#0
H_RS#1
H_RS#2

+5VS

10U_0805_10V6K
2

+3VS

C121
1000P_0402_50V7K
1
2

R55
10K_0402_5%

40mil
2

IERR#
INIT#

7
7
7

29

JFAN1

+VCC_FAN1

1
2
3

FAN_SPEED1

C115
1000P_0402_50V7K

1
2
3

G1
G2

4
5

CONN@
ACES_85204-03001

2
PAD

T25

XDP_DBRESET# 22

THERMAL

ICH

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

ADDR GROUP_1

BR0#

XDP/ITP SIGNALS

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

DEFER#
DRDY#
DBSY#

C114
1

H1
E2
G5

+1.05VS

C7

H_THERMTRIP# 8,21

XDP_TDI

R43

54.9_0402_1%

XDP_TMS

R42

54.9_0402_1%

XDP_BPM#5

R16

54.9_0402_1%

H_PROCHOT#

R70

56_0402_5%

H_IERR#

R54

56_0402_5%

XDP_TRST#

R41

54.9_0402_1%

XDP_TCK

R17

54.9_0402_1%

left NC if no ITP
H CLK
BCLK[0]
BCLK[1]

A22
A21

RESERVED

H_ADSTB#0

ADS#
BNR#
BPRI#

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

ADDR GROUP_0

H_A#[3..35]

H_A#[3..35]

7 H_REQ#[0..4]
7

CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16

Layout Note:
H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil

39Ohm

Penryn
CONN@
+3VS

+1.05VS

C159
0.1U_0402_16V4Z
1
2

BSEL0

BCLK

266

200

166

OCP#

2200P_0402_50V7K
2

22

VDD

SMCLK

DP

SMDATA

DN

ALERT#

GND

C158

H_PROCHOT#

U9
H_THERMDA

R12
56_0402_5%
@

BSEL1

BSEL2

Q2
MMBT3904_SOT23-3
@

THERM#

H_THERMDC

EC_SMB_CK2 29
EC_SMB_DA2 29

2
R109
10K_0402_5%

+3VS

EMC1402-1-ACZL-TR_MSOP8

PCB
ZZZ

LA-6631P MB Rev0: DA60000IU00

LA-6631P MB Rev1: DA60000IU10

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DAZ0FZ00100

PCB PEW72 LA-6631P LS-6581P/6582P/6583P

5

2010/04/22

Issued Date

LA-6631P MB Rev1

Compal Electronics, Inc.

Compal Secret Data

Security Classification

LA-6631P MB with Small Board Rev1: DAZ0FZ00100

Title

Penryn (1/3) & FAN

Size
B
Date:

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

of

44

H_D#[0..63]

H_D#[0..63]

7
7
7

H_DSTBN#0
H_DSTBP#0
H_DINV#0

+1.05VS

7
7
7

R386
1K_0402_1%

R406
R405

Trace Close CPU < 0.5'

R387
2K_0402_1%

2
2

@
@

1
1
T2
C438 @1
2
0.1U_0402_16V4Z
T26
T27

GTL_REF0
1K_0402_5%
TEST1
1K_0402_5%
TEST2
TEST3
PAD @
TEST4
TEST5
PAD @
@
TEST6
PAD

Width=4 mil ,
Spacing: 15mil
(55Ohm)

H_DSTBN#1
H_DSTBP#1
H_DINV#1

16
16
16

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]

MISC

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

DATA GRP 2

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

DATA GRP 1

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

DATA GRP 3

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP 0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

JCPU1C

7
+CPU_CORE

JCPU1B

COMP[0]
COMP[1]
COMP[2]
COMP[3]

R26
U26
AA1
Y1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7

H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
COMP0
COMP1
COMP2
COMP3

R393
R394
R15
R14

1
1
1
1

H_PW RGOOD
H_CPUSLP#

2
2
2
2

27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%

H_DPRSTP# 8,21,42
H_DPSLP# 21
H_DPW R# 7
H_PW RGOOD 21
H_CPUSLP# 7
PSI#
42

Penryn
CONN@

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)
COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
Penryn
CONN@

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA[01]
VCCA[02]

B26
C26

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VCCSENSE

VSSSENSE

AE7

VSSSENSE

+CPU_CORE
D

+1.05VS

20mils
+1.5VS
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
1
R376

1
C156

C157
42
42
42 0.01U_0402_16V7K
2
2
42
42
10U_0805_10V6K
42
42
2
+CPU_CORE
100_0402_1%

VCCSENSE 42
VSSSENSE 42

1
R375

2
100_0402_1%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Penryn (2/3)
Size
B
Date:

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

of

44

+CPU_CORE

+CPU_CORE

2 x 330uF(6mOhm/2)
JCPU1D

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
Penryn
CONN@

1
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

2 x 330uF(6mOhm/2)

C98

C113

330U_D2E_2.5VM_R9
2

C107

330U_D2E_2.5VM_R9
2

C90

330U_D2E_2.5VM_R9
2

330U_D2E_2.5VM_R9
2
D

South Side Secondary

North Side Secondary

+CPU_CORE

1
1
1
1
1
1
1
C466
C451
C95
C111
C94
C93
C458
@
@
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C465

(Place these capacitors on South side,Secondary Layer)

+CPU_CORE

1
1
1
1
1
1
1
C103
C102
C92
C91
C457
C456
C96
@
@
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C108

(Place these capacitors on North side,Secondary Layer)

+CPU_CORE

1
C110
C109
@
@
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C112

C105

C104

C97

C440

C444

(Place these capacitors on South side,Primary Layer)

+CPU_CORE

1
1
1
1
1
1
1
C450
C442
C441
C469
C443
C468
C467
@
@
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C1208

(Place these capacitors on North side,Primary Layer)

+CPU-CORE
Decoupling
SPCAP,Polymer

C,uF

MLCC 0805 X5R

ESR, mohm

ESL,nH

4X330uF

6m ohm/4

1.8nH/6

32X22uF

3m ohm/32

0.6nH/32

32X10uF

3m ohm/32

0.6nH/32

+1.05VS

1
.

C13

C119

1
C120

C118

C78

C77

C79

330U_D2E_2.5VM_R9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Penryn (3/3)
Size
B
Date:

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

of

44

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+1.05VS

R126

221_0402_1%
H_SW ING

width=10mil
1

R125

100_0402_1%

C206
0.1U_0402_16V4Z

H_RCOMP

width=10mil
R395

24.9_0402_1%

H_SW ING
H_RCOMP

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
C5
E3

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP

+1.05VS

H_A#[3..35]

U23A

H_D#[0..63]

R139

4
5

H_RESET#
H_CPUSLP#

1K_0402_1%

width:spacing=10mil:20mil (<0.5")
R134

2K_0402_1%

HOST

H_RESET#
H_CPUSLP#

C12
E11

H_AVREF

A11
B11

H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPW R#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

H_ADS#
4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0#
4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 16
CLK_MCH_BCLK# 16
H_DPW R# 5
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

5
5
5
5

5
5
5
5

U23
B

H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_REQ#[0..4]

H_RS#[0..2]

AC82GM45_SLB94_B3_FCBGA1329

GM@

AC82GL40_SLB95_B3_FCBGA1329
GL@

C216
@
0.1U_0402_16V4Z

U23

within 100mil to Ball A9,B9

AC82GL40_SLGGM_A1_FCBGA1329
GLA1@

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Cantiga GMCH(1/7)-GTL
Size
B
Date:

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

of

44

+1.5V

U23B

MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
MCH_CFG_12
MCH_CFG_13

VGATE

@
1
R224
ICH_PWROK 1
R223

16,22,42 VGATE
22

ICH_PWROK

GMCH_PWROK
2
0_0402_5%
2
0_0402_5%

MCH_CFG_16
MCH_CFG_19
MCH_CFG_20

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

CFG

2 PM_EXTTS#0
10K_0402_5%
2 PM_EXTTS#1
10K_0402_5%
2 MCH_CLKREQ#
10K_0402_5%

1
R177
1
R202
1
R189

+3VS

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

R133 1

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

BA17
AY16
AV16
AR13

DDRA_SCS0#
DDRA_SCS1#
DDRB_SCS0#
DDRB_SCS1#

SA_ODT_0
SA_ODT_1
SB_ODT_O
SB_ODT_1

BD17
AY17
BF15
AY13

DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1

SM_RCOMP
SM_RCOMP#

BG22
BH21

SMRCOMP
SMRCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

BF28
BH28

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

AV42
AR36
BF17
BC36

SM_PWROK
SM_REXT
R366 1
SM_DRAMRST#

R368 1
R367 1

1
2
1

2.2U_0603_6.3V6K
2
3.01K_0402_1%

SM_DRAMRST# would be
needed for DDR3 only

14
14
15
15

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#

F43
E43

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AE41
AE37
AE47
AH39

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

AE35
AE43
AE46
AH42

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

AD35
AE44
AF46
AH43

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

+1.5V

+1.5V

2 80.6_0402_1%
2 80.6_0402_1%

2
B
E

2
B

Q33
MMBT3904_SOT23-3

Q34
MMBT3904_SOT23-3

1
2
R397
330_0402_5%

2
1

MCH_TSATN#

MCH_TSATN_EC# 29
1

R403
1K_0402_5%
R398
54.9_0402_1%

C418

1K_0402_1%

2.2U_0603_6.3V6K
2

20mil

SM_PWROK 31
2 499_0402_1%
C278

SM_DRAMRST# 14,15

CLK_DREF_96M 16
CLK_DREF_96M# 16
CLK_DREF_SSC 16
CLK_DREF_SSC# 16
CLK_MCH_3GPLL 16
CLK_MCH_3GPLL# 16

TSATN#

B12

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

22
22
22
22

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

22
22
22
22

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

22
22
22
22

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

22
22
22
22

CFG[2:0]

0 = DMI x 2
1 = DMI x 4

CFG5

CFG9

1 = iTPM Host Interface is Disabled

0 = Lane Reversal Enable
1 = Normal Operation * (Default)

CFG10

0 = PCIe Loopback Enable

1 = Disable * (Default)
00
01
10
11

CFG[13:12]

CL_RST#0 22

DDPC_CTRLDATA
MCH_CLKREQ#

AC82GL40_SLB95_B3_FCBGA1329
GL@

B28
B30
B29
C29
A28

L_DDC_DATA
DDPC_CTRLDATA

0 = Digital DisplayPort Disable

* (Default)
1 = Digital DisplayPort Device Present

MCH_CFG_5
MCH_CFG_6

C264 1

R182
511_0402_1%

MCH_CFG_7
MCH_CFG_9

0.1U_0402_16V4Z
2

MCH_CFG_10
MCH_CFG_12

MCH_TSATN#

MCH_CFG_13

HDA_BITCLK_MCH 21
HDA_RST_MCH# 21

1
HDA_SDOUT_MCH 21 R741
HDA_SYNC_MCH 21

2
33_0402_5%

HDA_SDIN1 21

MCH_CFG_20

2
R159
2
R163

@
@
@
@
@
@
@

1
2.21K_0402_1%
1
4.02K_0402_1%
1
2.21K_0402_1%
1
2.21K_0402_1%
1
2.21K_0402_1%
1
2.21K_0402_1%
1
2.21K_0402_1%
1
2.21K_0402_1%

1
4.02K_0402_1%
1
4.02K_0402_1%

+3VS

Compal Electronics, Inc.

Compal Secret Data

2010/04/22

Issued Date

2
R175
2
R142
2
R162
2
R158
2
R161
2
R154
2
R153
2
R155

MCH_CFG_19

Notice: Please check HDA power rail to select HDA controller.

Security Classification

R183
1K_0402_1%

PAD T19
SDVO_SCLK 19
SDVO_SDATA 19
MCH_CLKREQ# 16
MCH_ICH_SYNC# 22

HDA_BITCLK_MCH
HDA_RST_MCH#
HDA_SDIN1_MCH
HDA_SDOUT_MCH
HDA_SYNC_MCH

(Default)

0 = No SDVO Card Present

* (Default)
1 = SDVO Card Present
0 = LFP Disable
* (Default)
1 = LFP Card Present; PCIE disable

CL_VREF

= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation *

*(Default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled * (Default)
0 = Normal Operation
*(Default)
1 = DMI Lane Reversal Enable
0 = Only PCIE or SDVO is operational.
* (Default)
1 = PCIE/SDVO are operating simu.

ICH_PWROK

* (Default)

0 = iTPM Host Interface is enabled

CFG6

CFG20
(PCIE/SDVO select)

CL_CLK0 22
CL_DATA0 22

MCH_CFG_16
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

0.01U_0402_16V7K

011 = FSB667
010 = FSB800
000 = FSB1067

C34

N28
M28
G36
E36
K36
H36

C422

Strap Pin Table

+1.05VS

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

R222
1K_0402_1%

B33
B32
G33
F33
E33

AH37
AH36
AN36
AJ35
AH34

0.1U_0402_16V4Z
2

SDVO_CTRLDATA

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

R362

ME
MISC

R404
1K_0402_5%

+1.05VS

HDA

+3VS

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26

NC

+3VS

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47

CFG19

GFX_VR_EN

0.01U_0402_16V7K

SM_RCOMP_VOL

80 Ohm

For Cantiga

14
14
15
15

SM_VREF

CLK_DREF_96M
CLK_DREF_96M#
CLK_DREF_SSC
CLK_DREF_SSC#

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

R220
1K_0402_1%

B38
A38
E41
F41

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

C423

R369

14
14
15
15

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1

SM_RCOMP_VOH
1

C419

BC28
AY28
AY36
BB36

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

1K_0402_1%

14
14
15
15

DDRA_CLK0#
DDRA_CLK1#
DDRB_CLK0#
DDRB_CLK1#

R363

20,26,29 PLT_RST#
4,21 H_THERMTRIP#
22,42 PM_DPRSLPVR

R29
B7
N33
P32
AT40
AT11
T20
R32

PM

22 PM_SYNC#
5,21,42 H_DPRSTP#
14 PM_EXTTS#0
15 PM_EXTTS#1

AR24
AR21
AU24
AV20

DDR3

14
14
15
15

CFG16

PM_SYNC#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
GMCH_PWROK
2 100_0402_5% MCH_RSTIN#
H_THERMTRIP#
PM_DPRSLPVR

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GRAPHICS VID

16 MCH_CLKSEL0
16 MCH_CLKSEL1
16 MCH_CLKSEL2

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

DMI

DDRA_CLK0
DDRA_CLK1
DDRB_CLK0
DDRB_CLK1

RSVD22
RSVD23
RSVD24
RSVD25

CLK

BG23
BF23
BH18
BF18

RSVD20

AP24
AT21
AV24
AU20

AY21

RSVD15
RSVD16
RSVD17

RSVD

B31
B2
M1

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

All RSVD balls on GMCH should be left No

Connect.

COMPENSATION

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

DDR CLK/ CONTROL/

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

2011/04/22

Deciphered Date

Title

Cantiga GMCH(2/7)-DMI/DDR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

of

44

DDR_A_D[0..63]

15 DDR_B_D[0..63]

DDR_A_DM[0..7]

15 DDR_B_DM[0..7]

DDR_A_MA[0..14]

15 DDR_B_MA[0..14]

DDR_A_DQS#[0..7]

15 DDR_B_DQS#[0..7]

DDR_B_DM[0..7]
DDR_B_MA[0..14]

DDR_B_DQS#[0..7]

U23D

U23E

SA_BS_0
SA_BS_1
SA_BS_2

BD21
BG18
AT25

DDR_A_BS0 14
DDR_A_BS1 14
DDR_A_BS2 14

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

DDR_A_RAS# 14
DDR_A_CAS# 14
DDR_A_W E# 14

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

A
MEMORY

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

SYSTEM

AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

DDR

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

14
14
14
14
14
14
14
14

AC82GL40_SLB95_B3_FCBGA1329
GL@

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

DDR_B_BS0 15
DDR_B_BS1 15
DDR_B_BS2 15

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

DDR_B_RAS# 15
DDR_B_CAS# 15
DDR_B_W E# 15

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

14 DDR_A_DQS#[0..7]

DDR_B_DQ[0..63]

MEMORY

14 DDR_A_MA[0..14]

SYSTEM

14 DDR_A_DM[0..7]

DDR

14 DDR_A_D[0..63]

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

15
15
15
15
15
15
15
15

AC82GL40_SLB95_B3_FCBGA1329
GL@

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Cantiga GMCH(3/7)-DDR
Size
B
Date:

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

of

44

U23C

R396

C44
B43
E37
E38

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL

GMCH_TXCLKGMCH_TXCLK+

C41
C40
B37
A37

LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-

H47
E46
G40
A40

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

H48
D45
F40
B40

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

A41
H38
G37
J37

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

B42
G38
F37
K37

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

LVDS_IBG
2.37K_0402_1%

17 GMCH_TXCLK17 GMCH_TXCLK+

17 GMCH_TXOUT017 GMCH_TXOUT117 GMCH_TXOUT217 GMCH_TXOUT0+

17 GMCH_TXOUT1+
17 GMCH_TXOUT2+

R157

Change to 0Ohm when use PM chip

18 GMCH_CRT_R
B

TV_RTN

C31
E32

TV_DCONSEL_0
TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

150_0402_1%

J28

CRT_RED

150_0402_1%

G29

CRT_IRTN

H32
J32
J29
E29

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF

L29

CRT_VSYNC

1
150_0402_1%

1
1
GMCH_CRT_CLK
GMCH_CRT_DATA

18 GMCH_CRT_CLK
18 GMCH_CRT_DATA
18 GMCH_CRT_HSYNC

CRT_IREF

18 GMCH_CRT_VSYNC

PEG_COMP

PEG_COMPI
PEG_COMPO

T37
T36

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3

C933
C934
C935
C936

1
1
1
1

2
2
2
2

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3

C937
C938
C939
C940

1
1
1
1

2
2
2
2

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

10mils

1
R184

2
49.9_0402_1%

+1.05VS

Intel Cantiga TMDS Pin Definition

MCH_TMDS_HPD#

MCH_TMDS_HPD# 19

TMDS_B_CLK
TMDS_B_CLK#

PEG_TXP_3
PEG_TXN_3

TMDS_B_DATA0
TMDS_B_DATA0#

PEG_TXP_2
PEG_TXN_2

TMDS_B_DATA1
TMDS_B_DATA1#

PEG_TXP_1
PEG_TXN_1

TMDS_B_DATA2
TMDS_B_DATA2#

PEG_TXP_0
PEG_TXN_0

TMDS_B_HPD#

PEG_RXP_3

MCH_TMDS_DATA2# 19
MCH_TMDS_DATA1# 19
MCH_TMDS_DATA0# 19
MCH_TMDS_CLK# 19

MCH_TMDS_DATA2 19
MCH_TMDS_DATA1 19
MCH_TMDS_DATA0 19
MCH_TMDS_CLK 19

+3VS

VGA

2
R173
2
R172
2
R171

18 GMCH_CRT_G

H24
R160

75_0402_1%
75_0402_1%
75_0402_1%

18 GMCH_CRT_B

TVA_DAC
TVB_DAC
TVC_DAC

2
R156

F25
H25
K25

TV

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

LVDS

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

GRAPHICS

17 GMCH_LCD_CLK
17 GMCH_LCD_DATA
17 GMCH_ENVDD

L32
G32
M32
M33
K33
J33
M29

ENBKL
LCTLA_CLK
LCTLB_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA

PCI-EXPRESS

17 DPST_PW M
29
ENBKL

2 2.2K_0402_5%

GMCH_LCD_CLK

R191 1

2 2.2K_0402_5%

GMCH_LCD_DATA

R188 1

2 10K_0402_5%

LCTLB_DATA

R190 1

2 10K_0402_5%

LCTLA_CLK

R178 1

2 2.2K_0402_5%

GMCH_CRT_CLK

R164 1

2 2.2K_0402_5%

GMCH_CRT_DATA

R174
1.02K_0402_1%

AC82GL40_SLB95_B3_FCBGA1329
GL@

R187 1

R179 1

2 100K_0402_5%

Compal Electronics, Inc.

Compal Secret Data

Security Classification

ENBKL

2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Cantiga GMCH(4/7)-VGA/LVDS/TV
Size
Document Number
Custom

Rev
1.0

PEW72/82 M/B LA-6631P Schematic

Date:

Thursday, July 08, 2010

Sheet
1

10

of

44

U23F

+1.05VS

+1.5V

PAD
PAD

@
@

VCC_AXG_SENSE
VSS_AXG_SENSE

AJ14
AH14

VCC_AXG_SENSE
VSS_AXG_SENSE

U23G

VCC_AXG: 6326.84mA
(330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

+1.05VS

C243

C244

C234 1

0.47U_0603_16V4Z

C235 1

C236 1

C242 1

10U_0805_10V6K
0.1U_0402_16V4Z
2
2
2
2
10U_0805_10V6K
0.1U_0402_16V4Z

1U_0402_6.3V6K

Cavity Capacitors

1
C482

330U_D2E_2.5VM_R9
2

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
T32

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35

POWER

+1.05VS

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

Place close to the GMCH

+1.5V

VCC_SM: 2600mA
(330UF*1, 22UF*2, 0.1UF*1)

C269

C252

C251

NCTF

GFX NCTF

+1.05VS

Cavity Capacitors

C263

330U_2.5V_M_R15

10U_0805_10V6K
2
2
2
10U_0805_10V6K
0.1U_0402_16V4Z

Place on the edge

Reference PILLAR_ROCK CRB Rev1.0

GFX

T17
T18

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

1
1
1
+
C485
C255
C265
C266
C256
@
220U_D2_4VM_R15
0.22U_0402_6.3V6K
0.1U_0402_16V4Z
2
2
2
10U_0805_10V6K
0.22U_0402_6.3V6K

VCC

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

VCC: 1930.4mA (GMCH), 1210.34mA (MCH)

(270UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)

+1.05VS

VCC

+1.05VS

Place close to the GMCH

VCC_SM_AT13

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

VCC_SM_AW16

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC

VCC_SM_BA36
VCC_SM_BB24
VCC_SM_BD16

VCC_AXG_NTCF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC CORE

SM

Pins BA36, BB24, BD16,

BB21, AW16, AW13, AT13
could be left NC for DDR2
board.

VCC

Reference PILLAR_ROCK CRB Rev1.0

POWER

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_BA36
VCC_SM_BB24
VCC_SM_BD16
VCC_SM_AW16
VCC_SM_AT13
1
1
1
1
1
C214
C229
C228
C240
C271
@
@
@
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K

VCC SM LF

2600mA
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

AV44
BA37
AM40
AV21
AY5
AM10
BB13

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
1
C213

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

AC82GL40_SLB95_B3_FCBGA1329
GL@
C215

C205

C230

C272

C270

C279

1
A

0.1U_0402_16V7K
0.22U_0402_6.3V6K
0.47U_0603_16V4Z
1U_0402_6.3V6K
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.22U_0402_6.3V6K
1U_0402_6.3V6K

AC82GL40_SLB95_B3_FCBGA1329
GL@

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

Cantiga GMCH(5/7)-VCC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

11

of

44

+1.05VS_HPLL
+1.05VS_DPLLA

AD1

+1.05VS_MPLL

AE1

VCCA_MPLL

1000P_0402_50V7K
2

VCCA_LVDS: 13.2mA
(1000PF*1)

J48

VCCA_LVDS

J47

VSSA_LVDS

C289

0.1U_0402_16V4Z
2

+1.05VS
1

Please check Power

source if want
support IAMT

1
2
R152
0_0805_5%

+
C478
@
220U_D2_4VM_R15
2

VCCA_DAC_BG: 2.6833333mA
(0.1UF*1, 0.01UF*1)

+1.05VS_A_SM_CK

1
2
R170
0_0603_5%

1
C474
@
0.1U_0402_16V4Z
10U_0805_6.3V6M
2
2
2
0.01U_0402_16V7K

C232

VCCA_SM_CK: 24mA
(22UF*1, 2.2UF*1, 0.1UF*1)

1
1
C241
C254
C253
@
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
2
2
2
22U_0805_6.3V6M

NO_STUFF

VCCA_TV_DAC: 40mA (0.1UF*1,

0.01UF*1 for each DAC)

C472

C1209

+1.5VS

1
2
R742
0_0402_5%
R402
0_0402_5%
@

C941

A32

0.1U_0402_16V4Z
2

M25

+1.5VS_QDAC

L28

VCCD_HPLL: 157.2mA (0.1UF*1)

+1.5VS

1
2
L7
MBK1608221YZF_0603

C246

C245

+1.5VS_TVDAC

+1.05VS_PEGPLL

Please check Power

source if want
support IAMT

+1.8VS

M38
L37

C257

0.1U_0402_16V4Z
2
2
0.01U_0402_16V7K

VTT

VCCD_TVDAC

48.363mA

VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL

R165
0_0402_5%
@

+1.05VS

BF21
BH20
BG20
BF20

1
2
+1.5V
L17
MBK1608121YZF_0603
C424

VCC_TX_LVDS

+1.8V_TX_LVDS: 118.8mA
(22UF*1, 1000PF*1)
1
K47

105.3mA
VCC_HV_1
VCC_HV_2
VCC_HV_3

C293

2
R226
0_0603_5%

+1.8VS

C267

Please check Power

source if want
support IAMT

0.1U_0402_16V4Z

+1.05VS_PEG: 1782mA +1.05VS_PEG

(220UF*1, 22UF*1, 4.7UF*1)

V48
U48
V47
U47
U46

1
1

1
2
R264
0_0805_5%

+1.05VS
B

+ C312

C311

10U_0805_10V6K
2

220U_D2_4VM_R15
+1.05VS

AH48
AF48
AH47
AG47

+1.05VS_DMI

VCC_DMI: 456mA
(0.1UF*1)

2
VTTLF1
VTTLF2
VTTLF3

0.1uH 20%
1
1

C292

+3VS
1

1782mA
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

+1.8V_TX_LVDS

1000P_0402_50V7K
2
2 10U_0805_10V6K

VCC_HV: 105.3mA
C35
B35
A35

1
2
1
2
R361
C250
1_0402_1% 10U_0805_6.3V6M

0.1U_0402_16V4Z

118.8mA

456mA

VCCD_LVDS_1
VCCD_LVDS_2

0.47U_0603_16V4Z

1uH 30%

B22
B21
A21

1
2
R225
0_0805_5%
C287
0.1U_0402_16V4Z

VTTLF_CAP1
A8
VTTLF_CAP2
L1
AB2 VTTLF_CAP3
C190

C1210

C470

0.47U_0603_16V4Z
0.47U_0603_16V4Z
2
2
2
0.47U_0603_16V4Z

C273

D15
+1.05VS

VCCD_LVDS: 60.311111mA
(1UF*1)

R263
10_0603_5%
2

2010/04/22

Issued Date

+3VS

RB751V-40_SOD323-2

Compal Electronics, Inc.

Compal Secret Data

Security Classification

180Ohm@100MHz

C247

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

50mA

C152

VCC_SM_CK: 119.85mA
(10UF*1, 0.1UF*1)

10U_0805_6.3V6M
2
2
1U_0402_6.3V6K

VCCD_QDAC: 48.363mA +1.5VS_QDAC

(0.1UF*1, 0.01UF*1)
1
2
R144
100_0603_1%

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AC82GL40_SLB95_B3_FCBGA1329
GL@

+1.8V_LVDS

1
2
R192
0_0603_5%
C274

+1.5VS

1
2
R399
0_0603_5%
1
1
C471
C459
@
10U_0805_6.3V6M
2
2
1U_0402_6.3V6K

50mA

60.31mA
VCCD_PEG_PLL: 50mA
(0.1UF*1)

Also power for internal

Thermal Sensor

0.1U_0402_16V4Z
2
2
0.022U_0402_16V7K

AA47

Please check Power

source if want
support IAMT

VCC_AXF: 321.35mA
(10UF*1, 1UF*1)

VCC_HDA

157.2mA
AF1

+1.05VS_HPLL

VCCD_TVDAC: 58.696mA
(0.1UF*1, 0.01UF*1)

VCCA_TV_DAC_1
VCCA_TV_DAC_2

58.696mA
+1.5VS_TVDAC

C153

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

Close to A32

0.1U_0402_16V4Z
2
2
0.01U_0402_16V7K

+1.5VS_HDA
1

C155

+1.05VS_AXF

DMI

L19 1
2
MBK1608221YZF_0603

180Ohm@100MHz

+3VS

VCCD_HDA: 50mA
(0.1UF*1)

C154

+1.5V_SM_CK

87.79mA
B24
A24

+3VS_TVDAC

+3VS_TVDAC

220U_D2_4VM_R15
4.7U_0805_10V4Z
2
2
2
2
4.7U_0805_10V4Z
2.2U_0603_6.3V6K

POWER

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

24mA
AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

Close to Ball A25

CRT

480mA
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

4.7U_0805_10V4Z
2
2
2
22U_0805_6.3V6M
1U_0402_6.3V6K

+1.05VS

VCCA_PEG_PLL

50mA

0.1U_0402_16V4Z

C231

+3VS_DACBG

AA48

VCCA_SM:
(22UF*2, 4.7UF*1, 1UF*1)

C233

Please check Power

source if want
support IAMT

C461

VCCA_PEG_BG

1
C481

(0.1UF*1)

+1.05VS_A_SM

L20
MBK1608221YZF_0603 1
C473

139.2mA

0.414mA
AD48

+1.05VS_PEGPLL
VCCA_PEG_PLL:
1
C288

L48 1
2
MBK1608221YZF_0603
2
1
1
2
C304
R201
10U_0805_6.3V6M 1_0402_1%

+3VS

VCCA_HPLL

13.2mA

VCCA_PEG_BG: 0.414mA
(0.1UF*1)

+1.05VS

Close to Ball A26, B27

24mA

+1.05VS_HPLL

AXF

VCCA_DPLLB

C291
+VCCA_PEG_BG

VCCA_DPLLA

50mA

0.1U_0402_16V4Z
2
2
0.01U_0402_16V7K

220U_D2_4VM_R15
2

L48

+1.8V_TX_LVDS

Please check Power

source if want
support IAMT

F47

+1.05VS_DPLLB

VTTLF

C462

64.8mA
+1.05VS_DPLLA

A SM

C483

+1.5VS

R261
0_0402_5%
1
2

VSSA_DAC_BG

HV

+3VS_CRTDAC

+3VS

R262
@ 0_0402_5%
1
2

VCCA_DAC_BG

HDA

1
2
L21
MBK1608221YZF_0603 1
C475
1

C290

C305
2
2
10U_0805_10V6K
0.1U_0402_16V4Z

C151
22U_0805_6.3V6M
2

+3VS

FOR EMI 20080226

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

B25

PEG

2
0.1U_0402_16V4Z

A25

+3VS_DACBG

PLL

L12 1
2
MBK1608121YZF_0603

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

TV

R108
0.5_0603_1%

D TV/CRT

C189

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

2.69mA

+1.05VS_DPLLB

L6 1
2
MBK1608121YZF_0603

VCCA_MPLL: 139.2mA
(22UF*1, 0.1UF*1)

B27
A26

+3VS_CRTDAC

VTT: 852mA
(270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)

+1.05VS

852mA

73mA

A PEG A LVDS

120Ohm@100MHz

U23H

C464

2
220U_D2_4VM_R15
VCCA_DPLLA
2
0.1U_0402_16V4Z
VCCA_DPLLB: 64.8mA
(220UF*1, 0.1UF*1)

Please check Power

source if want
support IAMT

+1.05VS_MPLL

1
C479

4.7U_0805_10V4Z
2
2
0.1U_0402_16V4Z

Please check Power

source if want
support IAMT

SM CK

C434

L22 1
2
MBK1608121YZF_0603

+1.05VS

LVDS

(4.7UF*1, 0.1UF*1)

A CK

FOR EMI 20080226

L18 1
2
MBK1608121YZF_0603
1
C433
VCCA_HPLL: 24mA

+1.05VS

Deciphered Date

2011/04/22

Title

Crestline GMCH (6/7)-VCC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

12

of

44

VSS

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233

BA16

VSS_235

AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

VSS

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS_351
VSS_352
VSS_353
VSS_354
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS NCTF

U23J
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5

VSS SCB

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

NC

U23I
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

AC82GL40_SLB95_B3_FCBGA1329
GL@

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

AC82GL40_SLB95_B3_FCBGA1329
GL@
A

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

Cantiga GMCH(7/7)-GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

13

of

44

+1.5V

9 DDR_A_DQS#[0..7]

+DIMM_VREF

9 DDR_A_D[0..63]

JDIMM1

DDR_A_D58
DDR_A_D59
1 R601
2
10K_0402_5%

R602
10K_0402_5%
2
1

C908

0.1U_0402_16V4Z

C907
2.2U_0603_6.3V6K

+3VS

G2

206

DDRA_CLK1
DDRA_CLK1#
DDR_A_BS1
DDR_A_RAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1

1
2
1
C899
330U_2.5V_M_R15

Layout Note:
Place near JDIMM2.203 & JDIMM2.204

DDRA_CLK1 8
DDRA_CLK1# 8

+0.75VS

DDR_A_BS1 9
DDR_A_RAS# 9
DDRA_SCS0# 8
DDRA_ODT0 8
+DIMM_VREF

DDRA_ODT1 8

DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS#0
D_CK_SDATA
D_CK_SCLK

PM_EXTTS#0 8
D_CK_SDATA 15,16
D_CK_SCLK 15,16

+0.75VS

+0.75VS
FOX_AS0A626-U8SN-7F
CONN@

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

DIMM_A STD H:8mm

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

<Address: 00>

Date:

G1

C887
0.1U_0402_16V4Z

205

C898

DDR_A_DM7

C897

DDR_A_D56
DDR_A_D57

0.1U_0402_16V4Z

DDR_A_D50
DDR_A_D51

C896

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_MA2
DDR_A_MA0

C903

DDR_A_D48
DDR_A_D49

DDR_A_MA6
DDR_A_MA4

C902

DDR_A_D42
DDR_A_D43

C901

DDR_A_DM5

C906

DDR_A_D40
DDR_A_D41

DDR_A_MA11
DDR_A_MA7

0.1U_0402_16V4Z

DDR_A_D34
DDR_A_D35

DDRA_CKE1 8

2.2U_0603_6.3V6K
C905

DDR_A_DQS#4
DDR_A_DQS4
B

DDR_A_MA14

C900

DDR_A_D32
DDR_A_D33

0.1U_0402_16V4Z

8 DDRA_SCS1#

1U_0603_10V6K

DDR_A_MA13
DDRA_SCS1#

1U_0603_10V6K

DDR_A_WE#
DDR_A_CAS#

DDRA_CKE1

1U_0603_10V6K

DDR_A_BS0

9 DDR_A_WE#
9 DDR_A_CAS#

10U_0805_6.3V6M

DDR_A_MA10
DDR_A_BS0

1U_0603_10V6K

DDRA_CLK0
DDRA_CLK0#

DDRA_CLK0
DDRA_CLK0#

DDR_A_D30
DDR_A_D31

C895

8
8

DDR_A_DQS#3
DDR_A_DQS3

0.1U_0402_16V4Z

DDR_A_MA3
DDR_A_MA1

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

1K_0402_1%
2

+1.5V

DDR_A_D28
DDR_A_D29

10U_0603_6.3V6M

DDR_A_MA8
DDR_A_MA5

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

R1436

Layout Note: Place these 4 Caps near Command

and Control signals of DIMMA

DDR_A_D22
DDR_A_D23

0.1U_0402_16V4Z

DDR_A_MA12
DDR_A_MA9

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDR_A_DM2

10U_0603_6.3V6M

DDR_A_BS2

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

Layout Note:
Place near JDIMM2

DDR_A_D20
DDR_A_D21

10U_0603_6.3V6M

DDR_A_BS2

DDR_A_D14
DDR_A_D15

10U_0603_6.3V6M

DDRA_CKE0

DDRA_CKE0

SM_DRAMRST# 8,15

10U_0603_6.3V6M

DDR_A_D26
DDR_A_D27

DDR_A_DM1
SM_DRAMRST#

10U_0603_6.3V6M

DDR_A_DM3

DDR_A_D12
DDR_A_D13

+DIMM_VREF

DDR_A_D24
DDR_A_D25

+DIMM_VREF

15 +DIMM_VREF

DDR_A_D18
DDR_A_D19

1K_0402_1%

C894

DDR_A_DQS#2
DDR_A_DQS2

R598

9 DDR_A_MA[0..14]

DDR_A_D6
DDR_A_D7

C893

DDR_A_D16
DDR_A_D17

DDR_A_DQS#0
DDR_A_DQS0

C904

DDR_A_D10
DDR_A_D11

9 DDR_A_DQS[0..7]

C888

DDR_A_DQS#1
DDR_A_DQS1

+1.5V

9 DDR_A_DM[0..7]

DDR_A_D4
DDR_A_D5

2.2U_0805_16V4Z

DDR_A_D8
DDR_A_D9

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

C892

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

C891

DDR_A_D2
DDR_A_D3

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

C890

DDR_A_DM0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

C889

DDR_A_D0
DDR_A_D1

+1.5V

DDRIII-SODIMM0
Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

14

of

44

+1.5V

+1.5V

9 DDR_B_DQS#[0..7]
9 DDR_B_D[0..63]

+DIMM_VREF
JDIMM2

DDR_B_D10
DDR_B_D11

DDR_B_D32
DDR_B_D33

DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
1 R604
2
10K_0402_5%

0.1U_0402_16V4Z

C929

2.2U_0603_6.3V6K

+3VS
4

1
R605

C930

10K_0402_5% 205

G2

206

G1

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDRB_CLK1
DDRB_CLK1#
DDR_B_BS1
DDR_B_RAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1

DDRB_CLK1 8
DDRB_CLK1# 8
DDR_B_BS1 9
DDR_B_RAS# 9
DDRB_SCS0# 8
DDRB_ODT0 8
+DIMM_VREF

DDRB_ODT1 8

DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5

C928

DDR_B_D40
DDR_B_D41

DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_EXTTS#1
D_CK_SDATA
D_CK_SCLK

PM_EXTTS#1 8
D_CK_SDATA 14,16
D_CK_SCLK 14,16

+0.75VS

+0.75VS
FOX_AS0A626-U4SN-7F
CONN@

DIMM_B STD H:4mm

<Address: 01>

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

+ C921
@
330U_D2E_2.5VM_R9

+0.75VS

C927

DDR_B_D34
DDR_B_D35

DDRB_CKE1 8

0.1U_0402_16V4Z

DDR_B_MA14

2.2U_0603_6.3V6K

DDR_B_DQS#4
DDR_B_DQS4

1
1

C920

8 DDRB_SCS1#

C919

DDR_B_MA13
DDRB_SCS1#

0.1U_0402_16V4Z

DDR_B_WE#
DDR_B_CAS#

C918

DDR_B_BS0

9 DDR_B_WE#
9 DDR_B_CAS#

10U_0805_6.3V6M

DDR_B_MA10
DDR_B_BS0

DDRB_CKE1

C925

DDRB_CLK0
DDRB_CLK0#

DDRB_CLK0
DDRB_CLK0#

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

1U_0603_10V6K
C924

8
8

DDR_B_D30
DDR_B_D31

1U_0603_10V6K
C923

DDR_B_MA3
DDR_B_MA1

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

DDR_B_DQS#3
DDR_B_DQS3

1U_0603_10V6K
C922

DDR_B_MA8
DDR_B_MA5

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

DDR_B_D28
DDR_B_D29

1U_0603_10V6K

DDR_B_MA12
DDR_B_MA9

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDR_B_D22
DDR_B_D23

0.1U_0402_16V4Z

DDR_B_BS2

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

C917

DDR_B_BS2

DDR_B_DM2

0.1U_0402_16V4Z

DDRB_CKE0

DDRB_CKE0

DDR_B_D20
DDR_B_D21

0.1U_0402_16V4Z

+1.5V

SM_DRAMRST# 8,14

DDR_B_D14
DDR_B_D15
10U_0603_6.3V6M

DDR_B_D26
DDR_B_D27

DDR_B_DM1
SM_DRAMRST#

10U_0603_6.3V6M

DDR_B_DM3

Layout Note: Place these 4 Caps near Command

and Control signals of DIMMA

10U_0603_6.3V6M

DDR_B_D24
DDR_B_D25

DDR_B_D12
DDR_B_D13

10U_0603_6.3V6M

DDR_B_D18
DDR_B_D19

DDR_B_D6
DDR_B_D7

10U_0805_6.3V6M

DDR_B_DQS#2
DDR_B_DQS2

9 DDR_B_MA[0..14]

Layout Note:
Place near JDIMM1

10U_0603_6.3V6M

DDR_B_D16
DDR_B_D17

9 DDR_B_DQS[0..7]

DDR_B_DQS#0
DDR_B_DQS0

C916

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D4
DDR_B_D5

C915

DDR_B_D8
DDR_B_D9

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

C926

DDR_B_D2
DDR_B_D3

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

C914

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

C913

DDR_B_DM0
1
C910

C909

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

C912

DDR_B_D0
DDR_B_D1

C911

14 +DIMM_VREF

9 DDR_B_DM[0..7]

DDRIII-SODIMM1
Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

15

of

44

FSLC

FSLB

FSLA

CLKSEL2 CLKSEL1 CLKSEL0

CPU
MHz

SRC
MHz

PCI
MHz

266

100

33.3

200

100

33.3

166

100

33.3

Control

PCIEX0

CR#_6(MCH)

PCIEX6

PCIEX1

CR#_4(NEW CARD)

PCIEX4

CR#_9(MINI CARDII)

PCIEX9

U16

+CLK_VDD1

L32

+CLK_VDD1

2
1
FBMA-L11-201209-221LMA30T_0805
1
1
1
1
L33
@
C388
C1211
C372
C385
2
1
+1.5VS
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
For Low Power CLK GEN
10U_0805_10V6K
+3VS

SRC7(VGA_CLK): Discrete VGA[Enable] UMA[Disable]

+3VS

19

mount to Enable ITP_CLK

+CLK_VDD1
+3VS

2
10K_0402_5%

CLK_PCI5

R301
10K_0402_5%
@

CLK_PCI4=0, Pin28, 29 is SRC_CLK

Pin24, 25 is DOT96_CLK
1
R292

@ 2
10K_0402_5%

CK505_PW RGD

22 H_STP_PCI#

C346 1

2 @
2 @

CK_PW RGD

CLK_PCI_LPC

CLK_PCI_ICH

20 CLK_PCI_ICH

10P_0402_50V8J CLK_PCI_ICH

For EMI 10/9

2
1

R326
2.2K_0402_5%
CLKSEL0 1
2

R307 2

CPUT0_LPR_F
CPUC0_LPR_F

70

CLK_CPU_BCLK#

27

VDDPLL3

55

VDDSRC

R309 2

27P_0402_50V8J
C353
27P_0402_50V8J
1
2

22 CLK_ICH_48M
25 CLK_SD_48M

CPU_BSEL0 5

CLK_ICH_48M R325 2
CLK_SD_48M R311 2
CLK_ICH_14M R304 2

27MHz_NonSS/SRCT1_LPR/SE1
27MHz_SS/SRCC1_LPR/SE2

29

CLK_DREF_SSC#

23

VDD96_IO

32

SRCC2_LPR/SATAC_LPR

33

CLK_PCIE_SATA#

SRCT3_LPR

35

CLK_PCIE_ICH

SRCC3_LPR

36

CLK_PCIE_ICH#

CLK_DREF_96M# 8

VGA: disable this pair by BIOS

CLK_DREF_SSC

SRCT4_LPR

40

CLK_PCI3

15

PCI3

CLK_MCH_3GPLL

16

SRCT6_LPR

57

CLK_PCI4

PCI4/27_SELECT
SRCC6_LPR

56

CLK_MCH_3GPLL#

SRCT7_LPR

61

SRCC7_LPR

60

17

CK505_PW RGD1

CK_PWRGD/PD#

X1

CPUT2_ITP_LPR/SRCT8_LPR

64

X2

CPUC2_ITP_LPR/SRCC8_LPR

63

11

NC

SRCT9_LPR

44

CLK_PCIE_MINI2

SRCC9_LPR

45

CLK_PCIE_MINI2#

CLKSEL0

20

USB_48MHz/FSLA

CLKSEL1

FSLB/TEST_MODE

FSLC/TEST_SEL/REF0

REF1

69

GNDCPU

GNDREF

18

GNDPCI

22

GND48

30

GND

34
+3VS

59

D_CK_SCLK

42
73

Q23
2N7002-7-F_SOT23-3

CLK_PCIE_SATA# 21
CLK_PCIE_ICH

22

CLK_PCIE_ICH#

22

CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8

UMA: disable this pair by BIOS

+3VS

CLK_PCIE_SATA 21

PCI_F5/ITP_EN

CLKSEL2

VGA: disable this pair by BIOS

SRCC4_LPR

CLK_PCI5

CLK_DREF_SSC#

PCI2/TME

22,27 ICH_SMBCLK

CLK_DREF_96M 8

PCI1

26
R1430
4.7K_0402_5%
1
2

CLK_MCH_BCLK# 7

14

CLK_XTALOUT

1 33_0402_5%

CLK_MCH_BCLK 7

CLK_PCI2

+3VS

R389
@ 1K_0402_5%
R392
1K_0402_5%
1
2

SRCT2_LPR/SATAT_LPR

CLK_PCIE_SATA

CLK_CPU_BCLK# 4

39

Q22
2N7002-7-F_SOT23-3

2
@
1
R390
0_0402_5%

R388
10K_0402_5%
CLKSEL2 1
2

CLK_DREF_SSC

VDDCPU_IO

D_CK_SDATA

CPU_BSEL1 5

+1.05VS
4

CLK_DREF_96M#

CLK_CPU_BCLK 4

13

MCH_CLKSEL1 8

25

CLK_XTALIN

1 22_0402_5%
1 22_0402_5%

R305
4.7K_0402_5%
1
2

2
G

1
R380
0_0402_5%

SRCC0_LPR/DOTC_96_LPR
VDDPLL3_IO

PCI_STOP#

+3VS

2
G

2
1
2

CLK_DREF_96M

66

Y2
14.31818MHz_20P_FSX8L14.318181M20FDB

R384
@ 1K_0402_5%

22,27 ICH_SMBDATA
@
1
R379
0_0402_5%

SRCT0_LPR/DOTT_96_LPR

24

28

54

+1.05VS

R383
1K_0402_5%
1
2

CLK_MCH_BCLK#

VDDSRC_IO

MCH_CLKSEL0 8

22 CLK_ICH_14M

CLKSEL1

CLK_MCH_BCLK

67

31

H_STP_PCI#

1 R303
1 R302

C354
1
2

1
2
R328
@ 1K_0402_5%

68

VDDSRC_IO

CPU_STOP#

1 33_0402_5%

0_0402_5% 2
0_0402_5% 2

22 CK_PW RGD
8,22,42
VGATE

R327
@ 56_0402_5%
R313
1K_0402_5%
1
2

CPUT1_LPR_F
CPUC1_LPR_F
VDDSRC_IO

53

1 33_0402_5%

D_CK_SCLK 14,15

VDDPCI

10P_0402_50V8J CLK_PCI_LPC

+1.05VS

CLK_CPU_BCLK

VDDCPU

H_STP_CPU#

2
CLK_ENABLE# 42
G
Q28
2N7002-7-F_SOT23-3
@
29 CLK_PCI_LPC

C345 1

D_CK_SCLK

CLK_PCI4
2
10K_0402_5%

1
R308

22 H_STP_CPU#

10

D_CK_SDATA 14,15

VDD48

CLK_PCI5=0, Pin63,64 is SRC_CLK

CLK_PCI5=1, Pin63,64 is ITP_CLK

C386

0.1U_0402_16V4Z
2

1
R310

For Low Power CLK GEN

SCLK

VDDREF

12

62

2
10K_0402_5%

+CLK_VDDSRC_R

2
@

@
1
R312

R400
1
0_0402_5%
R401
1
0_0402_5%

+CLK_VDDSRC

D_CK_SDATA

71

38
CLK_PCI2
2
10K_0402_5%

SDATA

72

52

+CLK_VDDSRC

CLK_PCI2=1, Trusted Mode Enable(No overclocking allowed)

1
R306

Clock Generator

L16
2
1
FBMA-L11-201209-221LMA30T_0805
1
1
1
1
1
C384
C356
C357
C355
C390
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V6K
2
2
2
2
2
10U_0805_10V6K
0.1U_0402_16V4Z

+3VS

+CLK_VDD

Free-Run

PCIEX10

+CLK_VDD

L15
2
1
FBMA-L11-201209-221LMA30T_0805
1
1
1
1
1
1
1
C358
C371
C387
C370
C380
C381
C347
10U_0805_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V6K
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

Table : ICS9LPRS387
CLK_REQ#

+CLK_VDDSRC
+1.05VS

CR#_10(WLAN)

SRCT10_LPR

50

SRCC10_LPR

51

SRCT11_LPR

48

CLK_PCIE_LAN

SRCC11_LPR

47

CLK_PCIE_LAN#

CR#3

37

CR#4

41

CR#6

58

CR7#

65

ICS9LPRS387, PN:SA000020H10
SLG8SP556V, PN:SA000020K00
RTM875N, PN:SA000020N00
------------------------LOW Power
RTM890N, PN:SA00003H730
ICS9LVRS387, PN:SA00003H610

43

GNDSRC

CR10#

49

GNDSRC

CR#11

46

CR#A

21

GNDSRC
GND_THERMAL_PAD

27

CLK_PCIE_MINI2#

27

CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26

MCH_CLKREQ# 8

(Pull High to +3VS at GMCH side)

CR#9

GND

CLK_PCIE_MINI2

1
R336

2
10K_0402_5%

+3VS

1
R364

2
10K_0402_5%

+3VS

MINI2_CLKREQ#

27

LAN_CLKREQ# 26
4

SATA_CLKREQ# 22

(Pull High to +3VS at ICH side)

ICS9LPRS387BKLFT_MLF72_10x10

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

MCH_CLKSEL2 8

2010/04/22

Deciphered Date

CPU_BSEL2 5

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Clock Generator (CK505)

Size
Document Number
Custom

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

G

Sheet

16

of
H

44

LCD POWER CIRCUIT

+LCDVDD
+3VS

+3V
1

W=60mils
1

R415
300_0603_5%

R414
100K_0402_5%

3 2

2
3

2
R413

1
1K_0402_5%
1
C491

2
D

+LCDVDD

W=60mils

0.047U_0402_16V7K
2
DMN66D0LDW-7_SOT363-6

Q36A
10 GMCH_ENVDD

4.7U_0805_10V4Z

Q37
AO3413L_SOT23-3

Q36B
DMN66D0LDW-7_SOT363-6

C495

C494

4.7U_0805_10V4Z
2

C493
0.1U_0402_16V4Z

R407
100K_0402_5%

29

BKOFF#

BKOFF#

R611 0_0402_5%
1
2
@

2
R44

DISPOFF#

1
10K_0402_5%

+INVPWR_B+
+LCDVDD
L24 2
1
FBMA-L11-201209-221LMA30T_0805

B+

L23 2
1
FBMA-L11-201209-221LMA30T_0805
1

C490

C492
10U_0805_10V6K

C488
0.1U_0402_16V4Z
D1

680P_0402_50V7K 68P_0402_50V8J
2
2

+3VS

LCD/PANEL BD. Conn.

USB20_P3

CH4

+LCDVDD_R

R738
@

1 0_0402_5%
+LCDVDD

INVTPWM
DISPOFF#
GMCH_LCD_CLK
GMCH_LCD_DATA

+LCDVDD

DMIC_DATA

+3VS

R776 1

0_0402_5%

INVT_PWM 29

DMIC_CLK

GMCH_LCD_CLK 10
GMCH_LCD_DATA 10
DAC_BRIG 29
GMCH_TXOUT0- 10
GMCH_TXOUT0+ 10

GMCH_TXOUT0GMCH_TXOUT0+
GMCH_TXOUT1GMCH_TXOUT1+

DAC_BRIG
INVTPWM
DISPOFF#

GMCH_TXOUT1- 10
GMCH_TXOUT1+ 10

GMCH_TXOUT2GMCH_TXOUT2+

GMCH_TXOUT2- 10
GMCH_TXOUT2+ 10

GMCH_TXCLKGMCH_TXCLK+

2 @
220P_0402_50V7K
2 @
220P_0402_50V7K
2
220P_0402_50V7K
2
220P_0402_50V7K
2
220P_0402_50V7K

1
C516
1
C496
1
C484
1
C486
1
C487

R1435
100K_0402_5%
@
2
1

GMCH_TXCLK- 10
GMCH_TXCLK+ 10

+3VS_DMIC

R739
R777
R778
R740
R779

2
2
2
2
2

@
@
@
@
@

1
1
1
1
1

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

LOCAL_DIM 29
DMIC_DATA 32
DMIC_CLK 32
COLOR_ENG_EN 29
+3VS

INVTPWM

DPST_PWM 10

U24
NC7SZ14P5X_NL_SC70-5

1
R615
USB20_N3
USB20_P3

For GMCH DPST

+3VS

1
DMIC_DATA_R
DMIC_CLK_R

CH1

CM1293-04SO_SOT23-6
@

+INVPWR_B+

G1
G2
G3
G4
G5
G6

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

Vn

41
42
43
44
45
46

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

USB20_N3

CH2

Vp

W=60mils

JLVDS1

CH3

C489

NC

W=40mils

2
0_0402_5%
A

+3VS
USB20_N3 22
USB20_P3 22

IPEX_20143-040E-20F
CONN@

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

LVDS Connector

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

17

of

44

D27

D26

W=40mils

D25

+5VS

+R_CRT_VCC

+CRT_VCC

D4

CRT Connector

BAV99_SOT-23 BAV99_SOT-23 BAV99_SOT-23

F1

2
1.1A_6VDC_FUSE
1

C12
0.1U_0402_16V4Z
2

CH491DGP_SOT23-3

+3VS

GMCH_CRT_R

CRT_R_1
2
FCM2012C-800_0805

L41

CRT_G_1
2
FCM2012C-800_0805

L40

CRT_B_1
2
FCM2012C-800_0805

1
L42

GMCH_CRT_G
L31
GMCH_CRT_B
L30

R464

R443

1
C547

R442
2

150_0402_1%

C534

2
2
10P_0402_50V8J

CRT_R_2

2
FCM2012C-800_0805

CRT_G_2

2
FCM2012C-800_0805

CRT_B_2

L39

JCRT1

150_0402_1%

C532

C546

2
10P_0402_50V8J

C535

C533

2
2
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J

150_0402_1%

C560
C559
10P_0402_50V8J 10P_0402_50V8J
2
2

C558
10P_0402_50V8J

10P_0402_50V8J

C557

+CRT_VCC

30.1_0402_1%

CRT_HSYNC

1
L4

2
10_0603_5%

1
L3

2
10_0603_5%

CRT_HSYNC_2

CRT_VSYNC_2
1
C76

DSUB_12

C89
10P_0402_50V8J
10P_0402_50V8J
2
2

1
10K_0402_5%

16
17

R463
100K_0402_5%
@

1
DSUB_15

C101 2
68P_0402_50V8J 1

CRT_HSYNC_1

G
G

C-H_13-12201513CP
CONN@
CRT_DET# 22

2
100P_0402_50V8J

U4
Y

R47

2
R40
5

2
0.1U_0402_16V4Z

OE#

1
C88

10 GMCH_CRT_HSYNC

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

10 GMCH_CRT_B

2
FCM2012C-800_0805

10 GMCH_CRT_G

74AHCT1G125GW_SOT353-5

10 GMCH_CRT_R

W=40mils

C62
+CRT_VCC
68P_0402_50V8J

2
0.1U_0402_16V4Z

R30

30.1_0402_1%

CRT_VSYNC

U3
Y

CRT_VSYNC_1

10 GMCH_CRT_VSYNC

OE#

1
C75

+CRT_VCC

74AHCT1G125GW_SOT353-5

+CRT_VCC

2
G
3
S

1
D

DSUB_12

R29
4.7K_0402_5%
2

R50
4.7K_0402_5%
3

+3VS

Place closed to chipset

GMCH_CRT_DATA 10

2
G

Q6
2N7002-7-F_SOT23-3
DSUB_15

GMCH_CRT_CLK 10

Q4
2N7002-7-F_SOT23-3

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

CRT Connector
Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

18

of

44

+3VS
+3VS

C944

C945

C946

C947

C948

2 0_0603_5%

+HDMI_5V_OUT
+5VS

F2

1 +HDMI_5V

CH491DGP_SOT23-3
0.1U_0402_16V4Z

0.1U_0402_16V4Z

R744
10K_0402_5%

W=40mils

1
D35

2
0.1U_0402_16V4Z

HDMI connector

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OE#

2
1

0.1U_0402_16V4Z 2

1.1A_6V_SMD1812P110TF
C949

JHDMI1
HDMI_HPD

2
G

HDMI_SDATA
HDMI_SCLK
HDMI_HPD

100K_0402_5% 2

2
11
15
21
26
33
40
46
+3VS

R751
R747
R754
R756

1
1
1
1

R759

@
@
@
@

2
2
2
2

2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%

+3VS
SDVO_SDATA

SDVO_SCLK

2 3.3K_0402_5%

R760

2 2.2K_0402_5%

R761

2 2.2K_0402_5%

R763
R764

+3VS

CG0

CG1

CG2

0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

+3VS
B

HDMI_R_CK+
HDMI_R_D0-

VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V

CG_0
CG_1

3
4

CG_0
CG_1

REXT

REXT

MCH_TMDS_HPD# 7
8

HDMI_R_CK-

0.1U_0402_16V4Z

HDMI_R_D0+
HDMI_R_D1-

OE#

25

OE#

SCL_SINK

28

HDMI_SCLK

R749 1

D36
RB751V-40_SOD323-2
2 2.2K_0402_5%1
2
+HDMI_5V_OUT

SDA_SINK

29

HDMI_SDATA

R750 1

2 2.2K_0402_5%1
D37

ASM1442T
Pin3 have internal PD
Pin4 have internal PU

HPD_SINK

30

DDC_EN

32

EQ_0
EQ_1

34
35

ASM1442T have
internal PU

HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+

2 2.2K_0402_5% +3VS
R752
1
R753
1
R755
1
R757
1

EQ_S0
EQ_S1

@
@
@
@

2
2
2
2

2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%

1
1

@
@

2 2.2K_0402_5%
2 2.2K_0402_5%

Swing Pre-amp Slew-rate

450
420
450
460
340
400
400
420

0
0
0
0
0
2db
2db
0

R769 1

0
-3db
-3db (default)
-4db
0
0
0
0

SDA

SDVO_SCLK

SCL

CG_2

1
R772

ASM1442T have
internal PD

EQ0

EQ1

0
0
1
1

0
1
0
1

+3VS

SM070001310 400ma 90ohm@100mhz DCR 0.3

12dB
9dB
6dB
3dB (default)

CG_2

HDMI_TX2+
HDMI_TX2-

13
14

OUT_D4+
OUT_D4-

IN_D4+
IN_D4-

48
47

MCH_TMDS_DATA2 10
MCH_TMDS_DATA2# 10

HDMI_TX1+
HDMI_TX1-

16
17

OUT_D3+
OUT_D3-

IN_D3+
IN_D3-

45
44

MCH_TMDS_DATA1 10
MCH_TMDS_DATA1# 10

HDMI_CLK+
HDMI_CLK-

19
20

OUT_D2+
OUT_D2-

IN_D2+
IN_D2-

42
41

MCH_TMDS_CLK 10
MCH_TMDS_CLK# 10

HDMI_TX0+
HDMI_TX0-

22
23

OUT_D1+
OUT_D1-

IN_D1+
IN_D1-

39
38

MCH_TMDS_DATA0 10
MCH_TMDS_DATA0# 10

GND

49

2 10K_0402_5%

2
10K_0402_5%

1
5
12
18
24
27
31
36
37
43

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R758 1

4
L44
W CM-2012-900T_0805
@
1

Equalization

10

MCH_TMDS_HPD#

10 MCH_TMDS_HPD#

HPD#

SDVO_SDATA

20
21
22
23

SUYIN_100042MR019S153ZL
CONN@

HDMI_HPD
R746 1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

2
RB751V-40_SOD323-2

HDMI_CLK+

Connection to 3.4K
external resistor.
C

C950

R745

U47
+3VS

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+HDMI_5V_OUT

Q59
2N7002-7-F_SOT23-3

C943

C942

0.1U_0402_16V4Z

R743 1

0.1U_0402_16V4Z

HDMI_CLK-

R762 1

HDMI_TX0+

R765 1

4
L45
W CM-2012-900T_0805
@
1

HDMI_TX0-

R766 1

HDMI_TX1+

R767 1

4
L46
W CM-2012-900T_0805
@
1
HDMI_TX1-

R768

HDMI_TX2+

R770

4
L47
W CM-2012-900T_0805
@
1

ASM1442T PN: SA00003BB00

HDMI_TX2-

4
1

R773 1

0_0402_5%

HDMI_R_CK+

3
C

2
0_0402_5%

HDMI_R_CK-

0_0402_5%

HDMI_R_D0+

3
2
0_0402_5%

HDMI_R_D0-

0_0402_5%

HDMI_R_D1+

3
2
0_0402_5%

HDMI_R_D1-

0_0402_5%

HDMI_R_D2+

0_0402_5%

HDMI_R_D2-

ASM1442T_QFN48_7X7
R774 1

2 2.2K_0402_5%

MCH_TMDS_CLK

R775 1

2 2.2K_0402_5%

MCH_TMDS_CLK#

ASMEIDA BUG

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

HDMI Level Shift & Conn

Size
Document Number
Custom

Rev

1.0
PEW72/82 M/B LA-6631P Schematic

Date:

Thursday, July 08, 2010

Sheet
1

19

of

44

DMI for ESI-compatible operation

+3VS

PCI_GNT#1
RP4

1
2
3
4

Low= DMI for ESI-compatible operation

High= Default* (Internal pull-up)

PCI_DEVSEL#
PCI_REQ#1
PCI_FRAME#
PCI_STOP#

8
7
6
5

U11B
RP20

1
2
3
4

PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_PIRQB#

8
7
6
5
8.2K_1206_8P4R_5%

+3VS
RP29

1
2
3
4

PCI_PIRQG#
PCI_REQ#0
PCI_PIRQE#
PCI_PIRQH#

8
7
6
5
8.2K_1206_8P4R_5%
RP31

1
2
3
4

PCI_PIRQF#
PCI_SERR#
PCI_PIRQC#
PCI_PIRQA#

8
7
6
5
8.2K_1206_8P4R_5%
RP11

1
2
3
4

PCI_PIRQD#
PCI_TRDY#
PCI_REQ#3
PCI_REQ#2

8
7
6
5

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

F1
G4
B6
A7
F13
F12
E6
F6

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3

C/BE0#
C/BE1#
C/BE2#
C/BE3#

D8
B4
D6
A5

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PLTRST#
PCICLK
PME#

C14
D4
R2

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PAD

T12

PAD

T9

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

@
@
@
@

PAD
PAD
PAD
PAD

T11
T15
T13
T14

PCI_IRDY#
PCI_PAR

PAD

T16

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

Place closely pin B10

CLK_PCI_ICH

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

PLT_RST#
CLK_PCI_ICH

R132
10_0402_5%

PLT_RST# 8,26,29
CLK_PCI_ICH 16

8.2K_1206_8P4R_5%

C194
10P_0402_50V8J

2
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

8.2K_1206_8P4R_5%

J5
E1
J6
C4

Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
ICH9-M ES_FCBGA676

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

H4
K6
F2
G2

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

A16 Swap Override Strap

Low= A16 swap override Enable
High= Default*

PCI_GNT#3
R123

2 1K_0402_5% PCI_GNT#3
@

R614 1
0_0402_5%

SPI_CS#1

Boot BIOS Loaction

U8
MC74VHC1G08DFT2G_SC70-5

PLT_RST_BUF# 27

PCI_GNT#0

PLT_RST#

Boot BIOS Strap

+3VS

SPI

PCI

LPC*

R124

2 1K_0402_5% PCI_GNT#0
@

R131

2 1K_0402_5%
@

R83
100K_0402_5%
@

SPI_CS#1 22

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

ICH9M(1/4)-PCI
Size

Document Number

Rev
1.0

PEW72/82 M/B LA-6631P Schematic

Date:

Thursday, July 08, 2010

Sheet
1

20

of

44

+RTCVCC

+RTCVCC
R89
20K_0402_5%

+RTCVCC

1
2
R90
20K_0402_5%

R112
332K_0402_1%

ICH_INTVRMEN

1
2
J1
@
10K_0603_5%
C129
1U_0603_10V6K
1
2

C23
C24

RTCX1
RTCX2

ICH_RTCRST#
ICH_SRTCRST#
SM_INTRUDER#

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

ICH_INTVRMEN

B22
A22

INTVRMEN
LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14
G13
D14

LAN_RXD0
LAN_RXD1
LAN_RXD2

D13
D12
E13

LAN_TXD_0
LAN_TXD_1
LAN_TXD_2

B10

GPIO56

B28
B27

GLAN_COMPI
GLAN_COMPO

AF6
AH4

HDA_BIT_CLK
HDA_SYNC

ICH_RTCX2

1
2
J2
@
10K_0603_5%
C136
1U_0603_10V6K
1
2

+3VS

R214

PROJECT_ID2

10K_0402_5%

R129

2
SATA_LED#

32 HDA_BITCLK_AUDIO

R243

32 HDA_SYNC_AUDIO

R250

32 HDA_RST_AUDIO#
+3V

R240

R117

HDA_SDOUT_ICH
33_0402_5%

HDA_SDOUT
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

SATA_LED#

AG8

SATALED#

24 SATA_DTX_C_IRX_N0
24 SATA_DTX_C_IRX_P0

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

AJ16
AH16
AF17
AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

24 SATA_DTX_C_IRX_N1
24 SATA_DTX_C_IRX_P1

SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
SATA_ITX_DRX_N1
SATA_ITX_DRX_P1

AH13
AJ13
AG14
AF14

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

2
1

30

R118

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AG7
AE8

R246

SATA_LED#

10K_0402_5%

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

K5
K4
L6
K2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

FWH4/LFRAME#

K3

LPC_FRAME#

LDRQ0#
LDRQ1#/GPIO23

J3
J1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

N7
AJ27

EC_GA20
H_A20M#

DPRSTP#
DPSLP#

AJ25
AE23

H_DPRSTP#
H_DPSLP#

1 10K_0402_5%

+3VS

EC_GA20 29
H_A20M# 4
H_DPRSTP# 5,8,42
H_DPSLP# 5

FERR#

AJ26

FERR#

CPUPWRGD

AD22

H_PW RGOOD

IGNNE#

AF25

H_IGNNE#

INIT#
INTR
RCIN#

AE22
AG25
L3

H_INIT#
H_INTR
EC_KBRST#

NMI
SMI#

AF23
AF24

H_NMI
H_SMI#

STPCLK#

AH27

H_STPCLK#

THRMTRIP#

AG26

THRMTRIP_ICH#

TP12

AG27

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS

AH18
AJ18
AJ7
AH7

1
R206

H_FERR#

2
56_0402_5%

HDA for GMCH

8 HDA_SYNC_MCH
8 HDA_RST_MCH#
8 HDA_SDOUT_MCH

H_FERR# 4

H_PW RGOOD 5
H_IGNNE#
H_INIT#
H_INTR

2
R230

1
56_0402_5%

2
R146

1
10K_0402_5%

4
4

H_NMI
H_SMI#

4
4
C

H_STPCLK# 4
R205 1

2 54.9_0402_1%

H_THERMTRIP#

2
R204

SATA_ITX_DRX_P0

SATA_ITX_DRX_N1

1
C397
1
C398

SATA_ITX_C_DRX_N1
2
0.01U_0402_16V7K
SATA_ITX_C_DRX_P1
2
0.01U_0402_16V7K

1
56_0402_5%

+1.05VS

+CHGRTC

R382
1K_0402_5%

CLK_PCIE_SATA#
CLK_PCIE_SATA
SATARBIAS

CLK_PCIE_SATA# 16
CLK_PCIE_SATA 16
R215 1

D16
BAV70W _SOT323-3

+RTCVCC

2 24.9_0402_1%

C435
0.1U_0402_16V4Z

SATA_ITX_C_DRX_N0 24
SATA_ITX_C_DRX_P0 24

+RTCBATT

SATA_ITX_C_DRX_N1 24
SATA_ITX_C_DRX_P1 24

CONN@
JBATT1

SATA_ITX_DRX_P1

SATA_ITX_C_DRX_N0
2
0.01U_0402_16V7K
SATA_ITX_C_DRX_P0
2
0.01U_0402_16V7K

H_THERMTRIP# 4,8

+RTCBATT

1
C307
1
C306

+3VS
EC_KBRST# 29

2
SATA_ITX_DRX_N0

+1.05VS

8 HDA_BITCLK_MCH

HDA_BITCLK_ICH
2
33_0402_5%
HDA_SYNC_ICH
2
33_0402_5%
HDA_RST_ICH#
2
33_0402_5%
HDA_SDOUT_ICH
2
33_0402_5%

56_0402_5%

29
29
29
29

ICH9-M ES_FCBGA676

1
R242
1
R251
1
R241
1
R247

56_0402_5%

LPC_FRAME# 29

R169 2

A20GATE
A20M#

HDA_RST#

AG5

32 HDA_SDOUT_AUDIO

10K_0402_5%
PROJECT_ID2

AE7
AF4
AG4
AH3
AE5

32 HDA_SDIN0
8 HDA_SDIN1

HDA for AUDIO

GLAN_COMP
2
24.9_0402_1%
HDA_BITCLK_ICH
2
33_0402_5%
HDA_SYNC_ICH
2
33_0402_5%
HDA_RST_ICH#
2
33_0402_5%

+1.5VS_PCIE_ICH

U11A

SATA

+RTCVCC

C163
15P_0402_50V8J
2
1

SM_INTRUDER#

IN

LPC

OUT

NC

CPU

NC

RTC

LAN / GLAN

X1
32.768KHZ_12.5P_MC-306

H_DPRSTP#
R231
H_DPSLP#
R233

R130
10M_0402_5%
2
1

1M_0402_5%

+1.05VS

ICH_RTCX1

R113

IHDA

C164
15P_0402_50V8J
2
1

close Con. sdie

Q12
2SC2411K_SOT23-3
@

2
B

+1.05VS

MAINPW ON 36,37
R203
@ 330_0402_5%
1
2

SUYIN_060003HA002G202ZL

20100416 add

H_THERMTRIP#
+VCC_HDA_ICH

ICH_TP3

2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDA_SDOUT_ICH

Compal Electronics, Inc.

Compal Secret Data

Security Classification

R92
1K_0402_5%
@

R248
1K_0402_5%
@

22

Title

ICH9M(2/4)-LAN,IDELPC,RTC
Size
Document Number
Custom

Rev
1.0

PEW72/82 M/B LA-6631P Schematic

Date:

Thursday, July 08, 2010

Sheet
1

21

of

44

+3VS

Place closely pin B2

SERIRQ
2
10K_0402_5%

4
29
29

ICH_TP11

ICH_GPIO13
ICH_GPIO17
ICH_GPIO18
ICH_GPIO20
ICH_GPIO27
ICH_GPIO28
SATA_CLKREQ#
ICH_GPIO38
ICH_GPIO39
ICH_GPIO48
ICH_GPIO49
ICH_GPIO57

@
@

T10 PAD
PAD
T5
16 SATA_CLKREQ#
R119
10K_0402_5%
@
ICH_GPIO57
32
SB_SPKR
8 MCH_ICH_SYNC#
R121
21
ICH_TP3
100K_0402_5%
T22
T23
T21

SB_SPKR
@
@
@

PAD
PAD
PAD

CLKRUN#
WAKE#
SERIRQ
THRM#

D21

VRMPWRGD

A20

TP11

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

EC_SMI#

EC_SMI#
EC_SCI#

STP_PCI#
STP_CPU#

E20
M5
AJ23

OCP#
CRT_DET

OCP#

SMBALERT#/GPIO11

GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

M7
AJ24
B21
AH20
AJ20
AJ21

ICH_TP8
ICH_TP9
ICH_TP10

SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10

For PCIE LAN

27
27
27
27

PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2

26
26
26
26

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3

C238 2
C239 2

C248 2
C249 2

PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2

L29
L28
M27
M26

1
1

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
0.1U_0402_16V7K
PCIE_ITX_PRX_P3
0.1U_0402_16V7K

J29
J28
K27
K26

5
8,16,42

VGATE

VGATE 1

B
A

VR_ON 2

LAN_RST#

2
Q11 G
2N7002-7-F_SOT23-3
S
@
20

1
2

ICH_PWROK 8

ICH_PWROK

PBTN_OUT# 29
1

USB_OC#3
USB_OC#2
USB_OC#10
USB_OC#7

Project_ID0

Project_ID1

USB_OC#0
USB_OC#1_6
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#1_6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

USBRBIAS
2
1
R197
Within 500 mils
22.6_0402_1%

AG2
AG1

USB_OC#0

Project_ID2

USB_OC#1_6

1 0.1U_0402_16V4Z

Internal TPM Strap

Low= Disable*
High= iTPM enable by MCH strap

DMI Termination Voltage

GPIO49

Low= Desktop used

High= Mobile* (Internal pull-up)

2
10K_0402_5%

EC_PWROK

2
10K_0402_5%

R76

CLPWROK

CK_PWRGD

CK_PWRGD 16

R6

ICH_PWROK

SLP_M#

B16

PM_SLP_M#

CL_CLK0
CL_CLK1

F24
B19

CL_CLK0 8

CL_DATA0
CL_DATA1

F22
C19

CL_DATA0 8

CL_VREF0
CL_VREF1

C25
A19

CL_RST0#
CL_RST1#

F21
D18

PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5

PAD

+3VS

T7

ICH_PWROK

CL_VREF0_ICH
CL_VREF1_ICH

EC_PWROK

VGATE

EC_PWROK 29,31

U7
MC74VHC1G08DFT2G_SC70-5
C

CL_RST#0 8
ICH_GPIO24 @
ICH_GPIO10
ICH_ACIN
ICH_GPIO9 @

A16
C18
C11
C20

SPI_CLK
SPI_CS0#
SPI_CS1#GPIO58/CLGPIO6
SPI_MOSI
SPI_MISO
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#/GPIO44
OC9#/GPIO45
OC10#/GPIO46
OC11#/GPIO47

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

D25
E23
28

1
R88

No used Integrated LAN,

connecting LAN_RST# to GND

2
10K_0402_5%

R80

CK_PWRGD

PERN3
PERP3
PETN3
PETP3

D23
D24
F23

SPI_CS#1

C225
10P_0402_50V8J

PM_DPRSLPVR 8,42

SB_RSMRST#

D22
R5

PERN2
PERP2
PETN2
PETP2

C29
C28
D27
D26

28

SPI_MOSI

D20

VR_ON

CRT_DET#

29,31,42

1
1

CRT_DET

10K_1206_8P4R_5%

C745 2

PBTN_OUT#

LAN_RST#

PERN1
PERP1
PETN1
PETP1

RP32

USB_OC#1_6

PM_BATLOW#

C308
10P_0402_50V8J
@

PAD

PAD

T8

2
1
+3V
100K_0402_5%
2
1
EC_ACIN 29
D9
RB751V-40_SOD323-2

Q10
MMBT3906_SOT23-3
1
3

R99

T4

SB_RSMRST#

R254
10K_0402_5%

G29
G28
H27
U43
H26
MC74VHC1G08DFT2G_SC70-5
E29
ICH_VGATE
E28
Y 4
F27
F26

10K_1206_8P4R_5%

8
7
6
5

PM_DPRSLPVR

B13

RSMRST#

SATA
GPIO

0.1U_0402_16V7K
0.1U_0402_16V7K

2
R211
10K_0402_5%

1
2
3
4

ICH_PWROK

M2

R3

BATLOW#

+3VS

High: CRT Plugged

18

S4_STATE#

PWRBTN#

MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9

1
1

+3VS

2 USB_OC#4
10K_0402_5%

USB_OC#8
USB_OC#5
USB_OC#9
USB_OC#11

C10
G20

29

PM_SLP_S3# 29
PM_SLP_S4# 29,31
PM_SLP_S5# 29

EC_RSMRST# 29

1
R227

SPI
USB

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P

V27
V26
U29
U28

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

Y27
Y26
W29
W28

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

AB27
AB26
AA29
AA28

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2

AD27
AD26
AC29
AC28

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

D14B
4
3
5

DMI_MTX_IRX_N3 8
DMI_MTX_IRX_P3 8
DMI_ITX_MRX_N3 8
DMI_ITX_MRX_P3 8

DMI_IRCOMP

+3VS

CLK_PCIE_ICH# 16
CLK_PCIE_ICH 16
R196 24.9_0402_1%
1
2

USB20_N0
USB20_P0
USB20_N1
USB20_P1

USB20_N0
USB20_P0
USB20_N1
USB20_P1

USB20_N3
USB20_P3
USB20_N4
USB20_P4

USB20_N3
USB20_P3
USB20_N4
USB20_P4

USB20_N6
USB20_P6

+1.5VS_PCIE_ICH
28
28
28
28
17
17
25
25

USB20_N6 28
USB20_P6 28

USB20_N8
USB20_P8
USB20_N10
USB20_P10

R110
3.24K_0402_1%

Within 500 mils

CL_VREF0_ICH

MB USB Conn.
USB/B
CMOS Camera

R111
453_0402_1%

Card-Reader
+3V

USB/B

USB20_N8 28
USB20_P8 28

Bluetooth

USB20_N10 27
USB20_P10 27

MINI CARD

R115
3.24K_0402_1%
CL_VREF1_ICH
1

C193

No Reboot Strap

R114
453_0402_1%

0.1U_0402_16V4Z
2

Compal Electronics, Inc.

Compal Secret Data

2010/04/22

C191

0.1U_0402_16V4Z
2

Low= Default*
SB_SPKR High= "No Reboot"

Security Classification

R228
2.2K_0402_5%

BAV99DW-7_SOT363

DMI_MTX_IRX_N2 8
DMI_MTX_IRX_P2 8
DMI_ITX_MRX_N2 8
DMI_ITX_MRX_P2 8

AF29
AF28

ICH9-M ES_FCBGA676

Issued Date

6
2
BAV99DW-7_SOT363

DMI_MTX_IRX_N1 8
DMI_MTX_IRX_P1 8
DMI_ITX_MRX_N1 8
DMI_ITX_MRX_P1 8

CLK_PCIE_ICH#
CLK_PCIE_ICH

USBRBIAS
USBRBIAS#

+3V

1
DMI_MTX_IRX_N0 8
DMI_MTX_IRX_P0 8
DMI_ITX_MRX_N0 8
DMI_ITX_MRX_P0 8

T26
T25

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

2
4.7K_0402_5%

D14A

For MINI_CARD1

+3V

8
7
6
5

SUSCLK

U11D

PROJECT_ID0
2
10K_0402_5%
2
10K_0402_5%
PROJECT_ID1
2
10K_0402_5%
PM_DPRSLPVR
2
100K_0402_5%
ICH_GPIO49
2
1K_0402_5%

RP33

DPRSLPVR/GPIO16

N29
N28
P27
P26

1
2
3
4

PWROK

PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#

ICH9-M ES_FCBGA676

PD just for ES1 sample

1
R167

S4_STATE#/GPIO26

SUSCLK

1
R237
1
R236
1
R232
1
R148
1
R208

+3V
1

1
R256
1
R93
1
R91
1
R79
1
R127
1
R229
1
R82
1
R94
1
R78
1
R77
1
R120

ICH_SMBCLK
2
2.2K_0402_5%
ICH_SMBDATA
2
2.2K_0402_5%
EC_SWI#
2
10K_0402_5%
ICH_SMLINK0
2
10K_0402_5%
ICH_SMLINK1
2
10K_0402_5%
LINKALERT#
2
10K_0402_5%
XDP_DBRESET#
2
10K_0402_5%
2 ICH_PCIE_WAKE#
1K_0402_5%
PM_BATLOW#
2
8.2K_0402_5%
EC_LID_OUT#
2
10K_0402_5%
ICH_GPIO10
2
10K_0402_5%
ICH_GPIO13
2
10K_0402_5%
S4_STATE#
2
10K_0402_5%

R98

L4

PAD

T3

PM_CLKRUN#

ICH_VGATE

A14
E19

ICH_PCIE_WAKE#
SERIRQ
EC_THERM#

27 ICH_PCIE_WAKE#
29
SERIRQ
29 EC_THERM#

+3V

R97

H_STP_PCI#
H_STP_CPU#

P1
C16
E16
G17

ICH_GPIO17
2
10K_0402_5%
ICH_GPIO18
2
10K_0402_5%
ICH_GPIO20
2
10K_0402_5%
SATA_CLKREQ#
2
10K_0402_5%
ICH_GPIO38
2
10K_0402_5%
ICH_GPIO39
2
10K_0402_5%
ICH_GPIO48
2
10K_0402_5%

2
10K_0402_5%

A17

R136
10_0402_5%

1
R147

EC_LID_OUT#

PMSYNC#/GPIO0

R252
10_0402_5%
@

CLK_ICH_14M 16
CLK_ICH_48M 16

16 H_STP_PCI#
16 H_STP_CPU#

M6

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

CLK_ICH_14M
CLK_ICH_48M

2
B

SUS_STAT#/LPCPD#
SYS_RESET#

H1
AF3

R4
G19

CLK14
CLK48

clocks

SUS_STAT#
XDP_DBRESET#
PM_SYNC#

PM_SYNC#

29 EC_LID_OUT#
OCP#
2
10K_0402_5%
@

RI#

1
R258
1
R145
1
R213
1
R166
1
R257
1
R235
1
R212

F19

CLK_ICH_14M

PAD

T20
4 XDP_DBRESET#

1
R238

EC_SWI#

2 10K_0402_5%

EC_SWI#

CLK_ICH_48M

29

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

PROJECT_ID1
PROJECT_ID0
R234 1

Direct Media Interface

EC_THERM#
2
8.2K_0402_5%
H_STP_PCI#
2
10K_0402_5%
H_STP_CPU#
2
10K_0402_5%
SB_SPKR
2
1K_0402_5%

SMB

AH23
AF19
AE21
AD20

PCI - Express

SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1

16,27 ICH_SMBCLK
16,27 ICH_SMBDATA

Power MGT

G16
A13
E17
C17
B18

SYS / GPIO

1
R209
1
R81
1
R95
1
R168

Place closely pin AC1

U11C
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1

MISC
GPIO
Controller Link

1
R151

2011/04/22

Deciphered Date

Title

ICH9M(3/4)-USB,GPIO,PCIE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

22

of

44

C162

+ICH_V5REF

0.1U_0402_16V4Z
2
2
1U_0402_6.3V6K

2
+5VALW

+3V
2

+5V

1U_0402_6.3V6K
1
D

R193
100_0402_5%
1

10_0402_5%
@

D13
RB751V-40_SOD323-2
1

R194

+ICH_V5REF_SUS
C276
1U_0402_6.3V6K

C280

(220UF*1, 22UF*2, 2.2UF*1)

C268

C275

C259

220U_D2_4VM_R15
10U_0805_10V6K
2
2
2
10U_0805_10V6K
2.2U_0603_6.3V6K

+1.5VS_SATAPLL_ICH
C

L11 1
2
MBK1608301YZF_0603

+1.5VS

(10UF*1, 1UF*1)

1
1
C295
C296
10U_0805_10V6K
2 1U_0402_6.3V6K
2

AE1
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

VCCRTC
V5REF
V5REF_SUS
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCA3GP

+1.5VS_PCIE_ICH
L9
2
1
FBMA-L11-201209-221LMA30T_0805
1

+1.5VS

A6

+ICH_V5REF_SUS

+ICH_V5REF

1
C175

C192
D10
RB751V-40_SOD323-2

CORE

A23

+RTCVCC
R122
100_0402_5%

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL
VCC_DMI[1]
VCC_DMI[2]
V_CPU_IO[1]
V_CPU_IO[2]
VCC3_3[01]
VCC3_3[02]
VCC3_3[07]

+1.5VS

VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

C277

G
D
Q8
AO3413L_SOT23-3

0.1U_0402_16V4Z
2

C298

1U_0402_6.3V6K
2

C299
1U_0402_6.3V6K

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

+5V

AC9
AC18
AC19
AC21
G10
G9
AC12
AC13
AC14

close to AC7

AJ5

+1.5VS
1

0.1U_0402_16V4Z
2

1
AA7
AB6
AB7
AC6
AC7

close to AJ5
2
0.1U_0402_16V4Z
2
1 +VCCLAN1_05_INT_ICH
C174
0.1U_0402_16V4Z
+VCCLAN_ICH

R116

0_0603_5%
C172

A10
A11
A12
B12

2
0.1U_0402_16V4Z

+1.5VS

+VCC_GLANPLL_ICH
R87

0_0603_5%
1

A27

C161

D28
D29
E26
E27

C160

(10UF*1, 2.2UF*1)10U_0805_10V6K
2
2.2U_0603_6.3V6K

A26
+1.5VS

+VCCGLAN_ICH
R128

(4.7UF*1)

0_0603_5%
C207

VCCSUS1_5[1]
VCCSUS1_5[2]

C170

U11E

0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z

+1.5VS_DMIPLL_ICH
L8 1
2
MBK1608301YZF_0603

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCSUS3_3[05]

C260
C258
10U_0805_10V6K
2
0.01U_0402_16V7K

+1.05VS

(4.7UF*1)

4.7U_0805_10V4Z
2

R29
W23
Y23
AB23
AC23

+1.05VS
C137

AG29
AJ6
AC10

C169

C168

(4.7UF*1, 0.1UF*2)

4.7U_0805_10V4Z

0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z

AD19
AF20
AG24
AC20

close to AG29

close to AD19

C281

C300

C294

C223

VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
VCCUSBPLL

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

VCCCL1_05
VCCCL1_5

VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

C224

VCCCL3_3[1]
VCCCL3_3[2]

C173

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

close to AJ6

close to B9

close to K7

+VCC_HDA_ICH

AJ4
AJ3

1
AC8 TP_VCCSUS1_05_ICH_1
F17 TP_VCCSUS1_05_ICH_2

@
@

PAD
PAD

T24
T6

AD8 TP_VCCSUS1_5_ICH_1

PAD

T28

F18

R216
C302

0_0603_5%
@

R217
0.1U_0402_16V4Z

0_0603_5%

1
A18
D16
D17
E22

R219
C165

0_0603_5%
@

C303

R218

+3VS

0_0603_5%

+1.5V
+3V

0.1U_0402_16V4Z
2

0.1U_0402_16V4Z

AF1

+3V
C261

C262

0.1U_0402_16V4Z
2
2
0.022U_0402_16V7K

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

G22
G23

+1.5VS

+VCCSUS_HDA_ICH

+VCCSUS1_5_ICH_INT_2

0.022U_0402_16V7K

VCC1_5_A[20]

VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

close to G6
+3VS

B9
F9
G3
G6
J2
J7
K7

C166

VCC1_5_A[18]
VCC1_5_A[19]

+1.5VS

(10UF*1, 0.01UF*1)

VCC1_5_A[17]

GLAN POWER

C297

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCCSUS1_05[1]
VCCSUS1_05[2]

USB CORE

C301

VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

ATX

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

VCCSUSHDA

ARX

SBPWR_EN#

+3VS

+1.05VS
C171

VCCSATAPLL

VCCPSUS

AJ19

VCCPUSB

+5VALW

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

C167

VCCHDA

34

U11F

VCCP_CORE

PCI

+3VS

+5VS

close to A18

(0.1UF*1, 0.022UF*2)

close to T1

+VCCCL1_05_INT_ICH
+VCCCL1_5_INT_ICH

A24
B24

+3VS

1
1
C222
C221
@
@
1U_0402_6.3V6K
2
2
0.1U_0402_16V4Z

C208

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

(0.1UF*1)
2
0.1U_0402_16V4Z

ICH9-M ES_FCBGA676
A

(1UF*1, 0.1UF*1)

VCCGLAN3_3
ICH9-M ES_FCBGA676

4.7U_0805_10V4Z

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

+3VS

2011/04/22

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

Title

ICH9M(4/4)-POWER&GND
Size
Document Number
Custom

Rev
1.0

PEW72/82 M/B LA-6631P Schematic

Date:

Thursday, July 08, 2010

Sheet
1

23

of

44

+5VS

+3VS
0.1U_0402_16V4Z

C497

0.1U_0402_16V4Z

C498

1000P_0402_50V7K

C499

C502

10U_0805_10V6K

C501

C500

1000P_0402_50V7K

10U_0805_10V6K

SATA HDD Conn.

JHDD1

21 SATA_DTX_C_IRX_N0
21 SATA_DTX_C_IRX_P0

1
2
3
4
5
6
7

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

21 SATA_ITX_C_DRX_P0
21 SATA_ITX_C_DRX_N0
C504 1
C503 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_DTX_IRX_N0
SATA_DTX_IRX_P0

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+3VS

+5VS

GND
A+
AGND
BB+
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

GND
GND

24
23
C

SANTA_192301-1
CONN@

SATA ODD Conn.

LS-6583
JODD1
SATA_ITX_C_DRX_P1
SATA_ITX_C_DRX_N1

21 SATA_ITX_C_DRX_P1
21 SATA_ITX_C_DRX_N1
21 SATA_DTX_C_IRX_N1
21 SATA_DTX_C_IRX_P1

C396 1
C395 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
R347 1

SATA_DTX_IRX_N1
SATA_DTX_IRX_P1
@

2 1K_0402_1%

+5VS

1
2
3
4
5
6
7
8
9
10
11
12

1
2
3
4
5
6
7
8
9
10
11
12

GND
GND

13
14
B

ACES_85201-1205N
CONN@

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

HDD & ODD Connector

Size
Document Number
Custom

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

24

of

44

Card Reader RTS5138 / RTS5137

(only SD+MMC function)
+3VS

+3VS_CR
J3
@
JUMP_43X39
2 2
1 1

30mil
R284
10K_0402_5%
@ 1
2

1
10mil
100P_0402_50V8J
RREF
2
6.2K_0603_1%
USB20_N4
USB20_N4
USB20_P4
USB20_P4

2
C445
R286 1

1
C352
4.7U_0805_10V4Z

30mil
C409

1
0.1U_0402_16V4Z

+3VS_CR
+CARDPW R
VREG

10mil

C421
1U_0402_6.3V6K
XDDRY_SDW P_MSCLK

2
3

DM
DP

4
5
6

3V3_IN
CARD_3V3
V18

XD_CD#

8
9
10
11
12

SP1
SP2
SP3
SP4
SP5

25

XDCE#_SDD1
XDCLE_SDD0

REFE

EPAD

22
22

U21

GPIO0

17

CLK_IN

24

XD_D7

23

SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6

22
21
20
19
18
16
15
14
13

+3VS

5IN1_LED#

5IN1_LED# 30
CLK_SD_48M 16

C720 1
2
@
10_0402_5%

@
1
R748

2
10P_0402_50V8J

XDD5_SDD2_MS_D5
XDD4_SDD3_MSD1
XDD2_SDCMD
XDD0_SDCLK_MSD2
XDW E#_SDCD#

RTS5137-GR_QFN24_4X4

RTS5137 PN: SA000043500

RTS5138 PN: SA000030600

Card Reader Connector

+CARDPW R

+SDPW R_MMCPW R
J4
@
JUMP_43X39
2 2
1 1

30mil

30mil
1

R295
100K_0402_5%

C460
0.1U_0402_16V4Z

C455
0.1U_0402_16V4Z

C448
0.1U_0402_16V4Z

C6, C7 close to connector

+SDPW R_MMCPW R
JCR1
XDD4_SDD3_MSD1
XDD2_SDCMD
XDD0_SDCLK_MSD2
XDCLE_SDD0
XDCE#_SDD1
XDD5_SDD2_MS_D5
XDDRY_SDW P_MSCLK
XDW E#_SDCD#

1
2
3
4
5
6

D3
CMD
VSS1
VDD
CLK
VSS2

7
8
9
10
11

D0
D1
D2
WP
CD

12
13

GND1
GND2
TAITW _PSDBTC09GLBS1N14N0
CONN@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

CardReader RTS5137
Size
Document Number
Custom

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet

25

of

44

+3V_LAN

U39

C705

C808

C807

4.7U_0603_6.3V6K 2

2
2
0.1U_0402_16V4Z

2
2
2
0.1U_0402_16V4Z
1000P_0402_50V7K
+LAN_AVDDL

AVDDH
27
33
39

AVDDL
AVDDL
AVDDL

SPROM_DOUT
(EEDATA)

AT24C02

C322 1

R195
1K_0402_1%
@

R1440
1K_0402_1%

TRD3_P

38

LAN_MIDI3+
LAN_MIDI2LAN_MIDI2+
LAN_MIDI1-

32

LAN_MIDI1+

29

LAN_MIDI0-

TRD0_P

28

LAN_MIDI0+

LINKLED#

48

SPD100LED#

47

SPD1000LED#

46

TRAFFICLED#

45

TRD1_P

20mil
SM010005500 500ma 600ohm@100mhz DCR 0.38
L67

TRD0_N
PCIE_PLLVDDL

+LAN_XTALVDDH

1
2
BLM18AG601SN1D_2P

C2

20mil

C699 1
C700 1

PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3
PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3
29
EC_PME#

2 0.1U_0402_16V7K PCIE_PTX_IRX_P3
2 0.1U_0402_16V7K PCIE_PTX_IRX_N3
EC_PME#
R587 1

+3V_LAN

2 4.7K_0402_5%

17
16
22
23
4
2
20
19

PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N
WAKE#
REST#
PCIE_REFCLK_P
PCIE_REFCLK_N

LAN_LINK#
C703

L64

20mil
C712
0.1U_0402_16V4Z

+3V_LAN

+3VALW

60mil

1
4.7U_0603_6.3V6K

C716

+3VS

R1443 1

2 1K_0402_5%

40

R596 1

2 10K_0402_5%

EECLK

C715

LAN_XTALI

12

1
2

+1.2V_LAN_OUT
1
2
4.7UH_PG031B-4R7MS_1.1A_20%

8
C708
0.1U_0402_16V4Z

LAN_RDAC

26

RDAC
SR_VDDP

1.24K_0402_1%

SR_VDD

1
25MHZ_20PF_7A25000012
C704
C702
27P_0402_50V8J
27P_0402_50V8J
2

11

C698

L65

0.1U_0402_16V4Z

+1.2V_LAN

16 LAN_CLKREQ#

10
C318

0.1U_0402_16V4Z

PAD
49

T29

2
R518

1
1K_0402_5%

7
8
9

LAN_MIDI3+
LAN_MIDI3-

10
11
12

MCT1
MX1+
MX1-

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

21
20
19

RJ45_MIDI1+
RJ45_MIDI1-

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

RJ45_MIDI2+
RJ45_MIDI2-

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

RJ45_MIDI3+
RJ45_MIDI3-

RJ45_MIDI0+
RJ45_MIDI0-

0.1U_0402_16V4Z
2

0.1U_0402_16V4Z

+1.2V_LAN

C696
4.7U_0603_6.3V6K

L68
1
2
BLM18AG601SN1D_2P

+1.2V_LAN

C1215
4.7U_0603_6.3V6K

2
R140

1
1K_0402_5%

220P_0402_50V7K
C1217

R541
75_0402_1%

R525
75_0402_1%

JRJ45

9
10

D22
PJDLC05C_SOT23-3
@

1
R549
75_0402_1%

LAN_LINK#

Green LED+
Green LED-

RJ45_MIDI0+

PR1+

RJ45_MIDI0-

PR1-

RJ45_MIDI1+

PR2+

RJ45_MIDI2+

PR3+

RJ45_MIDI2-

RJ45_MIDI1-

PR2-

RJ45_MIDI3+

PR4+

RJ45_MIDI3-

PR4-

LAN_ACTIVITY#

2
@

11

Yellow LED+

12

Yellow LEDSANTA_130451-K
CONN@

C1218
RJ45_GND
R522
75_0402_1%

1
C660

40mil

C659
4.7U_0603_6.3V6K

0.1U_0402_16V4Z

40mil

BOTHHAND: S X'FORM_ GST5009-D LF LAN, SP050006B00

TIMAG:S X'FORM_ IH-160 LAN , SP050006F00

LANGND
1

C661
1000P_1206_2KV7K

RJ45_GND

Place close to TCT pin

14
13

SHLD1
SHLD2

PR3-

68P_0402_50V8J

C690

0.1U_0402_16V4Z

0.1U_0402_16V4Z
2
2

C686

C681

2
A

4.7U_0603_6.3V6K

L62
1
2
BLM18AG601SN1D_2P

68P_0402_50V8J
C656
@
2
1

TCT1
TD1+
TD1-

24
23
22

+3V_LAN

C671

LAN_ACTIVITY#
LAN_LINK#

350UH_IH-037-2

+1.2V_LAN

C695

LAN_MIDI2+
LAN_MIDI2-

220P_0402_50V7K
C663

4
5
6

C1216

+3V_LAN
BCM57780A0KMLG_QFN48_7X7

LAN_MIDI1+
LAN_MIDI1-

L63
1
2
BLM18AG601SN1D_2P

2
2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z

LAN_MIDI0+
LAN_MIDI0-

0.1U_0402_16V4Z

+LAN_AVDDL

+3V_LAN

1
9

CLKREQ#
NC

1
2
3

20mil

C710
10U_0805_10V6K

C709

2
1

0.1U_0402_16V4Z

R575

2 LAN_XTALO

+LAN_GPHYPLLVDDL

XTALI

Y3

SR_VFB

1
2
BLM18AG601SN1D_2P

20mil

40mil

XTALO

LAN_XTALO_R
R571
200_0402_1%

SPROM_CLK

44

LOW_PWR
SR_LX

13

L66

0.1U_0402_16V4Z

VMAIN_PRSINT

LAN_XTALI
LAN_XTALO_R

SPROM_DOUT

43

C706

+LAN_PCIEPLLVDD

C3

EEDATA

20mil

JUMP_43X118

MODE

+LAN_AVDDH
LAN_ACTIVITY#

J5

16 CLK_PCIE_LAN
16 CLK_PCIE_LAN#

1
2
BLM18AG601SN1D_2P

0.1U_0402_16V4Z

8,20,29 PLT_RST#

+3V_LAN

0.1U_0402_16V4Z
+LAN_BIASVDDH

22
22
22
22

1
2
3
4
D

35
34

PCIE_PLLVDDL

21

A0
A1
NC
GND

R1442
1K_0402_1%
@

GPHY_PLLVDDL

18

VCC
WP
SCL
SDA

AT24C02_SO8

R1441
1K_0402_1%

31

TRD2_P

24

U49

8
7
6
5

SPROM_CLK
SPROM_DOUT

TRD3_N

2 0.1U_0402_16V4Z
@

36
LAN_MIDI3-

TRD1_N

+LAN_PCIEPLLVDD

+LAN_AVDDH

30

37

TRD2_N
+LAN_GPHYPLLVDDL

+LAN_XTALVDDH

AVDDH

SPROM_CLK
(EECLK)
On chip

+LAN_BIASVDDH

25
14

XTALVDDH

BIASVDDH

VDDC
VDDC
VDDC

C1214

VDDC

C701

6
15
41

C697

1000P_0402_50V7K

42

+3V_LAN
0.1U_0402_16V4Z

+1.2V_LAN

091211 EMI add 1000P

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

Broadcom BCM57780

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Thursday, July 08, 2010

Sheet
1

26

of

44

Mini Card Power Rating

For Wireless LAN

+3VS_WLAN
J6
+3VS_WLAN

Power

+3VS

C432

C431

C425

C428

C426

C427

JUMP_43X118
2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Auxiliary Power (mA)

Peak

Normal

+3VS

1000

750

+3V

330

250

250 (wake enable)

+1.5VS

500

375

5 (Not wake enable)

+1.5VS

Primary Power (mA)

Normal

JMINI1

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

WL_OFF#
PLT_RST_BUF#
+3V_WLAN

MINI_SMBCLK
MINI_SMBDATA

2 0_0603_5%
2 0_0603_5%

R372 1
R357 1

@
@

WL_OFF# 29
PLT_RST_BUF# 20
+3VS
+3V

2 0_0402_5% ICH_SMBCLK
2 0_0402_5% ICH_SMBDATA

ICH_SMBCLK 16,22
ICH_SMBDATA 16,22

USB20_N10 22
USB20_P10 22

(LED_WWAN#)R337 1
(LED_WLAN#)

2 0_0402_5%
MINI1_LED# 29

(9~16mA)

FOX_AS0B226-S99N-7F
CONN@

R335
100K_0402_5%

H2
H_3P0

53
54
55
56

R373 1
R374 1

+3VS_WLAN

H3
H_3P0
@

H14
H_3P0

H4
H_3P0
@

H17
H_3P0
@

H7
H_3P0
@

H18
H_3P0
@

H9
H_3P0
@

H19
H_3P0
@

H20
H_3P0
@

H23
H_3P0
@

E51TXD_P80DATA
E51RXD_P80CLK

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G1
G2
G3
G3

29 E51TXD_P80DATA
29 E51RXD_P80CLK

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

+1.5VS

+3VS_WLAN

For MINICARD Port80 Debug

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

+3VS_WLAN

22 PCIE_ITX_C_PRX_N2
22 PCIE_ITX_C_PRX_P2

2
4
6
8
10
12
14
16

22 PCIE_PTX_C_IRX_N2
22 PCIE_PTX_C_IRX_P2

2
4
6
8
10
12
14
16

16 CLK_PCIE_MINI2#
16 CLK_PCIE_MINI2

1
3
5
7
9
11
13
15

16 MINI2_CLKREQ#

(WAKE#)

1
3
5
7
9
11
13
15

2 0_0402_5%

R381 1

22 ICH_PCIE_WAKE#

H16
H_4P2
@

H15
H_4P2
@

H10
H_4P2

H11
H_4P2

H1
H_3P4

@
3

H12
H_3P0N
@

FIDUCIAL_C40M80

FD3
@

FIDUCIAL_C40M80

FD4
@

FIDUCIAL_C40M80

FD2
@

FD1

H21
H_3P5X3P0N

FIDUCIAL_C40M80

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

MINI CARD (WLAN & TV-Tuner)

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

27

of

44

+3V
+USB_VCCA

80mil
+5VALW
U17

CH3

CH2

C540

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

8
7
6
5

RT9715BGS_SO8
5

+USB_VCCA

Vp

Vn

4.7U_0805_10V4Z
2

R461
100K_0402_5%
1
2
R460
10K_0402_5%

USB_OC#0 22
1

2
4

CH4

CH1

34

USB20_N0

+3V
C539
+5VALW

0.1U_0402_16V4Z

+USB_VCCB

U46
1
2
3
4

SYSON#

CM1293-04SO_SOT23-6
@

C736

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

R681
100K_0402_5%

8
7
6
5

USB20_P0

1
2
3
4

D23

1
2
R680
10K_0402_5%

RT9715BGS_SO8
4.7U_0805_10V4Z
2

USB_OC#1_6 22
1

USB Conn.

C744
@
0.1U_0402_16V4Z

SYSON#

Put near south bridge

(Port 0)
+USB_VCCA

W=80mils

USB/B Conn. LS-6581

C538
2

220U_6.3V_M_R17

(Port 1,6)

C549

JUSB1
2

22
22

1
2
3
4
5
6
7
8

USB20_N0
USB20_P0

USB20_N0
USB20_P0

+USB_VCCB

JUSB2
2
470P_0402_50V7K

VBUS
DD+
GND
GND
GND
GND
GND

13
14

GND
GND

1
2
3
4
5
6
7
8
9
10
11
12

W=100mils

1
2
3
4
5
6
7
8
9
10
11
12

USB20_N1
USB20_P1
USB20_N6
USB20_P6

USB20_N1 22
USB20_P1 22
USB20_N6 22
USB20_P6 22

ACES_85201-1205N
CONN@

SUYIN_020133GB004M51PZR
CONN@

Bluetooth Conn.
+3VALW

+3VS

29

1
R274

BT_ON#

BT@

2
10K_0402_5%

Q20
AO3413L_SOT23-3
BT@

2
G
1

1
C330
BT@
0.1U_0402_16V4Z
2

C323
BT@
1U_0603_10V6K

W=40mils
+BT_VCC
C317

1
C316

1
C324
BT@
0.1U_0402_16V4Z
2

BT@
R269
4.7U_0805_10V4Z
300_0603_5%
BT@
2
2
BT@
0.1U_0402_16V4Z

2
G

Q21
2N7002-7-F_SOT23-3
BT@

+BT_VCC
JBT1

22
22

USB20_P8
USB20_N8

8
7
6
5
4
3
2
1

8 GND
7
6
5
4
3
2
1 GND

10

ACES_87213-0800G
CONN@

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

BT & USB Connector

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

28

of

44

For EC Tools

+3VALW
L13

C331
1000P_0402_50V7K

+5VS

1
R290
1
R291

2 TP_CLK
4.7K_0402_5%
2 TP_DATA
4.7K_0402_5%

36
36
4
4

+3VALW
B

1
R279
1
R280
1
R1434
1
R1437
1
R320

2 EC_SMB_CK1
2.2K_0402_5%
2 EC_SMB_DA1
2.2K_0402_5%
2 KSO1
47K_0402_5%
2 KSO2
47K_0402_5%
2 LID_SW #
100K_0402_5%

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
MCH_TSATN_EC#
MINI1_LED#
LOCAL_DIM
COLOR_ENG_EN
INVT_PW M
FAN_SPEED1
BT_ON#
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF
PW R_SUSP_LED
W LAN_LED#

31
ON/OFF
30 PW R_SUSP_LED
30 W LAN_LED#

2 EC_SMB_CK2
2.2K_0402_5%
2 EC_SMB_DA2
2.2K_0402_5%

22

R1439 2
0_0402_5%

SUSCLK

77
78
79
80

EC_CRY1
EC_CRY2

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

AVCC
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

63
64
65
66
75
76

BATT_TEMP

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

68
70
71
72

DAC_BRIG
EN_DFAN1
IREF

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

83
84
85
86
87
88

EC_MUTE#

SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

97
98
99
109

3S/4S#
65W /90W #
SBPW R_EN
LID_SW #

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

119
120
126
128

EC_SPIDI/FW R#
EC_SPIDO/FRD#
EC_SPICLK
EC_SPICS#/FSEL#

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

73
74
89
90
91
92
93
95
121
127

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

100
101
102
103
104
105
106
107
108

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

110
112
114
115
116
117
118

V18R

124

DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

PS2 Interface

LOCAL_DIM

COLOR_ENG_EN

1 R33
100K_0402_5%
1 R34
100K_0402_5%
1 R35
100K_0402_5%

30

SPI_W P#

R616
0_0402_5%
@
1
2

32

ACOFF

38,39

ADP_I

AD_BID0

R36

1 100K_0402_5%

R37

1 100K_0402_5%

BATT_TEMP 36
+3VALW

38

Reserved Only

DAC_BRIG 17
EN_DFAN1 4
IREF
38
CALIBRATE# 38

EC_SEL

EC_MUTE# 33

EC_VERSION

HIGH

KB926D3

LOW

KB926E0

EC_SPI_W P#
TP_CLK 30
TP_DATA 30

SPI Flash ROM

GPIO
SM Bus

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

GPI

XCLK1
XCLK0

KB926QFD3_LQFP128_14X14

3S/4S#
38
65W /90W # 38
SBPW R_EN 34
LID_SW # 30

65W /90W #

EC_SI_SPI_SO 30
EC_SO_SPI_SI 30
EC_SPICLK 30
EC_SPICS#/FSEL# 30

+3VALW

BATT_AMB_LED#
PW R_LED
SYSON
VR_ON
ACIN

EC_LID_OUT#
EC_ON
EC_PW ROK
BKOFF#
W L_OFF#
EC_SEL
EC_ACIN

ENBKL
EAPD
SUSP#
PBTN_OUT#
EC_PME#

Analog Board ID definition,

Please see page 3.

R272
100K_0402_5%

Ra
FSTCHG
BATT_GRN_LED#

1
100K_0402_5%

R323

FSTCHG 38
BATT_GRN_LED# 30

AD_BID0

BATT_AMB_LED# 30
PW R_LED 30
SYSON
34,40
VR_ON
22,31,42
ACIN
34,38

EC_ACIN 22

R1432
8.2K_0402_5%

Rb

EC_RSMRST# 22
EC_LID_OUT# 22
EC_ON
31,37
EC_SW I# 22
EC_PW ROK 22,31
BKOFF# 17
W L_OFF# 27

EC_CRY1
C368

PM_SLP_S4# 22,31
ENBKL
10
EAPD
32
EC_THERM# 22
SUSP#
31,34,40,41
PBTN_OUT# 22
EC_PME# 26

C325
0.1U_0402_16V4Z

2
B

EC_CRY2

15P_0402_50V8J
2

C367

15P_0402_50V8J
2

X2
32.768KHZ_12.5P_MC-306

C366
4.7U_0805_10V4Z

C333
BATT_TEMP
2

100P_0402_50V8J
1

20mil

L14
ECAGND 2
1
FBM-L11-160808-800LMT_0603

C364
ACIN

100P_0402_50V8J
1

EC_SPI_W P#

1 R38
100K_0402_5%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

R324

EC_SEL

TP_CLK
TP_DATA

R31
3S/4S#

ECAGND
2
1
C332 0.01U_0402_16V7K

SPI Device Interface

11
24
35
94
113

E51TXD_P80DATA 2

BEEP#

+3VALW

GND
GND
GND
GND
GND

1
R281
1
R282

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

22 PM_SLP_S3#
22 PM_SLP_S5#
22
EC_SMI#
8 MCH_TSATN_EC#
27
MINI1_LED#
17
LOCAL_DIM
17 COLOR_ENG_EN
17
INVT_PW M
4 FAN_SPEED1
28
BT_ON#

+3VS

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

BEEP#

1
100K_0402_5%
2
4.7K_0402_5%

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SCI#

EC_SCI#

21
23
26
27

IN

22

PWM Output

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

+3VALW

INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

AD

E51RXD_P80CLK 27
E51TXD_P80DATA 27

ACES_85205-0400
@

OUT

PLT_RST#

8,20,26 PLT_RST#

2
1
R270
47K_0402_5%
2
1
C320
0.1U_0402_16V4Z

+3VALW

12
13
37
20
38

E51RXD_P80CLK
E51TXD_P80DATA

NC

16 CLK_PCI_LPC

1
2
3
4

NC

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC

1
2
3
4

1
2
3
4
5
7
8
10

KSO[0..17] 30

0.1U_0402_16V4Z

AGND

C340
22P_0402_50V8J
R289 2
2
1

21
EC_GA20
21 EC_KBRST#
22
SERIRQ
21 LPC_FRAME#
21
LPC_AD3
21
LPC_AD2
33_0402_5%
21
LPC_AD1
21
LPC_AD0

+3VALW
JP9

67

U13

VCC
VCC
VCC
VCC
VCC
VCC

R467

69

PLT_RST#
2
100K_0402_5%

9
22
33
96
111
125

KSO[0..17]

C1212

30

2
2
0.1U_0402_16V4Z

C343
1000P_0402_50V7K
1
1

KSI[0..7]

2
2
0.1U_0402_16V4Z

EC_PME#
2
10K_0402_5%
@

1
R319

C344

KSI[0..7]

C319

Place under MiniCard or DIMM

1
2 +EC_VCCA
2 FBM-L11-160808-800LMT_0603

0.1U_0402_16V4Z
1
2

+3VALW

0.1U_0402_16V4Z
1 C369
1

C365

ECAGND

Title

EC ENE KB926
Size
B
Date:

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
1

29

of

44

To TP/B Conn.

+3VALW
U20
2 0.1U_0402_16V4Z

EC_SPICS#/FSEL#
SPI_WP#
SPI_HOLD#

FOR EMI
R354
C416
22_0402_5% 10P_0402_50V8J
2
1 2
1

1
3
7
4

+3VALW

EC_SPICS#/FSEL#
1
SPI_WP#
3
SPI_HOLD# 7
4

R371 1
R359 1

2 4.7K_0402_5%
2 4.7K_0402_5%

CE#
WP#
HOLD#
VSS

VDD
SCK
SI
SO

JTP1

8
6
5
2

VCC
SCLK
SI
SO

EC_SPICLK
EC_SO_SPI_SI
EC_SI_SPI_SO

+5VS
29
29

TP_CLK
TP_DATA

MX25L512AMC-12G_SO8
@

U48
29 EC_SPICS#/FSEL#
29
SPI_WP#

CS#
WP#
HOLD#
GND

8
6
5
2

Reserved for BIOS simulator.

Footprint SO8

EC_SPICLK 29
EC_SO_SPI_SI 29
EC_SI_SPI_SO 29

C217
100P_0402_50V8J

EN25F16-100HIP_SOP8

ENE suggestion SPI Frequency over 66MHz

SST: 50MHz
MXIC: 70MHz
ST: 40MHz

KSI[0..7]

KSO[0..17]

1
2
3
4
5
6

1
2
3
4
5
6
GND
GND

7
8
C218
100P_0402_50V8J ACES_85201-0605N
CONN@

LEFT_BTN#

TP_CLK
+5VS

29

TP_DATA

RIGHT_BTN#
3

KSI[0..7]

INT_KBD Conn.

TP_CLK
TP_DATA
LEFT_BTN#
RIGHT_BTN#

D12
PJDLC05C_SOT23-3

LS-6582

C417 1

+3VALW

C219

D11
PJDLC05C_SOT23-3

0.1U_0402_16V4Z

KSO[0..17] 29

Power/B
JLED1

(Right)

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

G2
G1

28
27

ACES_88747-2601
CONN@

KSO15
KSO14
KSO13
KSO12

C31
C32
C33
C34

1
1
1
1

2
2
2
2

@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J

KSI0
KSO11
KSO10
KSI1

C28
C35
C36
C27

1
1
1
1

2
2
2
2

@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J

KSI2
KSO9
KSI3
KSO8

C26
C37
C25
C38

1
1
1
1

2
2
2
2

@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J

KSO16
KSO17
KSO7
KSO6
KSO5
KSO4

C30
C29
C39
C40
C41
C42

1
1
1
1
1
1

2
2
2
2
2
2

@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J

KSO3
KSI4
KSO2
KSO1

C43
C24
C46
C47

1
1
1
1

2
2
2
2

@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J

KSO0
KSI5
KSI6
KSI7

C48
C23
C22
C21

1
1
1
1

2
2
2
2

@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J
@ 100P_0402_50V8J

1
2
3
4
5
6
7
8
9
10

+3VALW
LID_SW# 29
WLAN_LED# 29

LID_SW#
WLAN_LED#
MEDIA_LED#

+3VS

PWR_LED#
ON/OFFBTN#

LEFT_BTN# 3

SW4
SMT1-05-A_4P
1

RIGHT_BTN#3

SW3
SMT1-05-A_4P
1

ON/OFFBTN# 31

5
6

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

1
2
3
4
5
6
7
8
GND
GND

5
6

JKB1

(Left)

ACES_85201-08051
CONN@

LED6
2
2
2.2K_0402_5%

PWR_LED#

PWR_LED#

PWR_SUSP_LED#
3

1
R346

+3VS

HT-191NB5_BLUE

PWR_SUSP_LED#

29 PWR_SUSP_LED
Q3A
DMN66D0LDW-7_SOT363-6

PWR_LED
1

29
1

R22
10K_0402_5%

10K_0402_5%

HT-191UD5_AMBER

Q3B
DMN66D0LDW-7_SOT363-6

R32

2
2
3.9K_0402_5%

1
R350

LED5
+3VALW

LED4
1
R370

2
2
2.2K_0402_5%

BATT_GRN_LED#

BATT_GRN_LED# 29
+3VS

HT-191NB5_BLUE

HT-191UD5_AMBER

BATT_AMB_LED#

BATT_AMB_LED# 29
25

5IN1_LED#

21

SATA_LED#

U18
MC74VHC1G08DFT2G_SC70-5

2
2
3.9K_0402_5%

Y
A

MEDIA_LED#

1
R351

LED3

+3VALW

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

BIOS, I/O Port & K/B Connector

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet

30

of

44

Power Button
ON/OFF switch

+3VALW

7236LGH

SW1
@
SMT1-05-A_4P
3
1
4

2
5
6

R271

100K_0402_5%

%RWWRP6LGH

SW2
@
SMT1-05-A_4P
1

2
5
6

D17
30 ON/OFFBTN#

ON/OFFBTN#

51ON#

ON/OFF

29

51ON#

35

DDR3
S4

+3VALW

2N7002-7-F_SOT23-3

R606
47K_0402_5%

40 +1.5VPGOOD

+3VALW
+3VS

1
A

5
P
C932

1
0.1U_0603_25V7K

@
R609 0_0402_5%

Power ON Circuit

D33
RB751V-40_SOD323-2
1
2

1
2
R608 0_0402_5%

10K_0402_5%

22,29 PM_SLP_S4#

1.5V
2

R607
10K_0402_5%
1

R268

POWER OK

Time delay 1RC Time

2
G

SM_PWROK 8

U42
NC7SZ14P5X_NL_SC70-5

Q57
2N7002-7-F_SOT23-3

For South Bridge

1
2
@
R61010K_0402_5%

+3VALW

+3VALW

+1.5V
2

Q19

2
G

NC

+3VALW
0.1U_0402_16V4Z
2
C931

EC_ON

1
EC_ON

29,37
2

BAV70W_SOT323-3

14
I

C408
1U_0603_10V6K
@

SYS_PWROK 1
R348

2
@ 0_0402_5%

EC_PWROK 22,29

For South Bridge

1
2
D18
RB751V-40_SOD323-2
@

VR_ON

U19B
SN74LVC14APWLE_TSSOP14

22,29,42

U19A
SN74LVC14APWLE_TSSOP14

14

R349
180K_0402_5%
@

+3VS
+3VALW

+3VALW

14
P

+3VALW

+3VALW

10

13

14

U19E
SN74LVC14APWLE_TSSOP14
@
O

U19F
SN74LVC14APWLE_TSSOP14
O

12
4

7
@

40

14
P
I

VS_ON

For +VCCP/+1.05VS

2 0.1U_0402_16V4Z

11

C407
1

0.1U_0402_16V4Z

U19D
SN74LVC14APWLE_TSSOP14

C1213

U19C
SN74LVC14APWLE_TSSOP14

5
1

34,41

SUSP 2
SUSP
G
Q31
2N7002-7-F_SOT23-3
@

29,34,40,41 SUSP#

@ 10K_0402_1%

R353
@
10K_0402_1%
1
2

14

R352

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Power OK, Reset

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

31

of

44

+VDDA

2
R419
10K_0402_5%
2

+5VAMP
1

D34
RB751V-40_SOD323-2

10K_0402_5%

+3VS

C507

2
1U_0402_6.3V6K

R424
10K_0402_5%

L29 1
2
FBMA-L11-201209-221LMA30T_0805

C544

1
2

C545
3

R613

0.1U_0402_16V4Z

MONO_IN

OUT

HD Audio Codec

4.75V

+VDDA

GND
SHDN

BYP

1
2
C531
0.01U_0402_25V7K

G9191-475T1U_SOT23-5
@

C514
1
1U_0402_6.3V6K

40mil

IN

(output = 300 mA)

U27

60mil

0.1U_0402_16V4Z

L28 1
2
FBMA-L11-201209-221LMA30T_0805

+5VS

J7
@
JUMP_43X39
2
1 1

BEEP#

C508 1
1U_0402_6.3V6K

R420

1
R425

2
B

Q38

2.4K_0402_1%

2SC2411K_SOT23-3

R417

560_0402_5%

C509

C510

D21
RB751V-40_SOD323-2

+3VS

R239
0_0805_5%
@

10U_0805_10V6K

MIC2_VREFO

0.1U_0402_16V4Z

R421
10K_0402_5%

C506

C505 1
1U_0402_6.3V6K

+3VS_DVDD

0.1U_0402_16V4Z

SB_SPKR

10mil

22

L25
MBK1608121YZF_0603
1
2

560_0402_5%

29

Change D21 from RB751 to CH751

+1.5VS_DVDD
1

40mil

INT_MIC

C515
C518

R430
2.2K_0402_5%

+1.5VS

15mil

L26 MBK1608121YZF_0603

MIC2_C_L
16
4.7U_0805_6.3V6K
MIC2_C_R
17
4.7U_0805_6.3V6K
23

1
DVDD

DVDD_IO

38

LINE2_L

LOUT1_L

LINE2_R

LOUT_R

MIC2_L

LOUT2_L

MIC2_R

LOUT2_R

LINE1_L

SPDIFO2

LINE1_R

DMIC_CLK1/2

35

AMP_LEFT

36

AMP_RIGHT

AMP_RIGHT 33

39
41

15mil

45

INT_MIC_R

46

JMIC2
1
2

MIC1_R

C523

11

21 HDA_RST_AUDIO#

10

21 HDA_SYNC_AUDIO

21 HDA_SDOUT_AUDIO
17
33 MIC_PLUG#
33 HP_PLUG#

R428 2
R433 2

SENSE_A
SENSE_B

1 20K_0402_1%
1 5.11K_0402_1%
29

2
3
13
34

DMIC_DATA

47

EAPD

48

Sense Pin

Impedance

MIC1_R

SDATA_IN

PCBEEP_IN

MONO_OUT
CBP

RESET#
CPVEE
SYNC
MIC1_VREFO
SDATA_OUT
HPOUT_R
GPIO0/DMIC_DATA1/2
GPIO1/DMIC_DATA3/4
SENSE A
SENSE B

CBN
VREF

EAPD
SPDIFO1

JDREF
HPOUT_L

DVSS1
DVSS2

AVSS1
AVSS2

HDA_BITCLK_AUDIO 21
HDA_SDIN0_AUDIO

1
R423

2
33_0402_5%

DGND

39.2K
SENSE A

20K

HDA_SDIN0 21

37

MONO_OUT 33

29
2.2U_0603_6.3V6K
C524 1

31
28
32

10mil

HP_RIGHT

1
MIC1_VREFO_L

HP_RIGHT

HP_LEFT

C525
2.2U_0603_6.3V6K

HP_RIGHT 33
HP_LEFT 33

30
27

CODEC_VREF

10mil

40
33

HP_LEFT

26
42

ALC272X-GR_LQFP48_7X7

Codec Signals

BITCLK

G1
G2

ACES_88266-02001
CONN@

MIC1_L

4
7

MIC2_VREFO

3
4

D3
SM05T1G_SOT23-3
@

For EMI

0.1U_0402_16V4Z

MIC1_R

MIC1_C_L
21
4.7U_0805_6.3V6K
MIC1_C_R
22
4.7U_0805_6.3V6K
MONO_IN
12

2 C511
22P_0402_50V8J

C527

43
44

C526

1
C522

DMIC_CLK3/4

10U_0805_10V6K

33

MIC1_L

MIC1_L

NC

LINE2_VREFO

19

MIC2_VREFO
33

LINE1_VREFO

1
2

DMIC_CLK 17

20K_0402_1%

20

220P_0402_50V7K

AMP_LEFT 33

R429

18

C519
2

24

15
R431 1K_0402_1%
2
1

25

U26

14

INT_MIC_R

C513

0.1U_0402_16V4Z
2
2
10U_0805_10V6K

AVDD2

INT_MIC_R

L27 1
0.1U_0402_16V4Z
2
FBM-L11-160808-800LMT_0603 1
1
1
C517
C528
C529
10U_0805_10V6K
2
2
2
0.1U_0402_16V4Z

AVDD1

+VDDA

C512

10mil

+AVDD_HDA

J8
2

@
1

JUMP_43X118
J9
@
2 2
1 1

AGND

JUMP_43X118
J10
@
2
1 1

PORT-B (PIN 21, 22)

10K

JUMP_43X118

5.1K
4

GND

39.2K
SENSE B

GNDA

20K
10K
PORT-H (PIN 32,33)

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

5.1K

2010/04/22

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HD Audio Codec ALC272X

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Date:

Sheet

32
H

of

44

+5VAMP

Int. Speaker Conn.

0.1U_0402_16V4Z

JSPK1

C541
2

SPKL+
SPKL-

R23
R24

20mil
10 dB

32

AMP_RIGHT

C561

2
0_0402_5%

1
R465

C543 1

32

AMP_LEFT

C530

32

MONO_OUT

1
C536 @

2
0_0402_5%
2
0_0402_5%

1
R458

2 0.47U_0603_10V7K

AMP_C_LEFT
2
0.47U_0603_10V7K

GAIN1

RIN-

18

SPKR+

ROUT-

14

SPKR-

LOUT+

SPKL+

LOUT-

SPKL-

ROUT+

1
R85
R86

20mil

@ R457
100K_0402_5%

SPK_R+
SPK_R-

2 0_0603_5%
2 0_0603_5%

1
1

GAIN0

AMP_C_RIGHT 17
2
0.47U_0603_10V7K

2
GAIN0
GAIN1

ACES_88266-02001
CONN@

R456
100K_0402_5%

1
2
3
4

D8
PJDLC05_SOT23-3
@

1
2

Right

G1
G2

ACES_88266-02001
CONN@

RIN+

Left

G1
G2

JSPK2
SPKR+
SPKR-

1
2

2 0.47U_0603_10V7K

@ R439
100K_0402_5%

C542 1

1
16
15
6

R440
100K_0402_5%

VDD
PVDD1
PVDD2

U29

1
2
3
4

D5
PJDLC05_SOT23-3
@

+5VAMP

SPK_L+
SPK_L-

2 0_0603_5%
2 0_0603_5%

1
1

C562
10U_0805_10V6K

LIN+

LIN-

MIC_PLUG#
HP_PLUG#

EC_MUTE#

EC_MUTE#

19

SHUTDOWN
GND5
GND1
GND2
GND3
GND4

29

10

D30
PJDLC05C_SOT23-3
@

Keep 10 mil width

2

C554
0.47U_0603_10V7K

LINE Out/Headphone Out

21
20
13
11
1

NC
BYPASS

Change to 0.47U_0603 from Audio Team

12

HPF 600Hz

JHP1

TPA6017A2_TSSOP20
6
2

C553

HP_RIGHT

HP_RIGHT

32

HP_LEFT

HP_LEFT

1
R462
1
R454

HPOUT_R_1 1
2
56.2_0402_1%
L43
HPOUT_L_1 1
2
56.2_0402_1%
L38

C552

330P_0402_50V7K 330P_0402_50V7K
1
1

20mil
32

2
FBM-11-160808-700T_0603
2
FBM-11-160808-700T_0603

32

HP_PLUG#

HP_PLUG#

5
4

HPOUT_R_2

HPOUT_L_2

2
1

MIC1_VREFO_L

MIC1_VREFO_L

SINGA_2SJ-0960-C01
CONN@

1
MIC1_L

2
1K_0603_1%
2
1K_0603_1%

4
2

2 FBM-11-160808-700T_0603

1
L37
1
L36

2 FBM-11-160808-700T_0603
1
C550
220P_0402_50V7K

1
C551
220P_0402_50V7K

MIC2_R_1

MIC2_L_1

2
1
3

32

1
R455
1
R436

MIC_PLUG# 5

MIC_PLUG#

1
MIC1_R

JMIC1
6

32

R453
4.7K_0402_5%
2

R452
4.7K_0402_5%
32

MIC JACK

D28
RB751V-40_SOD323-2

D24
RB751V-40_SOD323-2

Change D24,D28 from RB751 to CH751

SINGA_2SJ-A960-C01
CONN@
2

(HDA Jack)

D29
PJDLC05C_SOT23-3
@

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Amplifier & Audio Jack

Document Number

Rev

PEW72/82 M/B LA-6631P Schematic1.0

Friday, July 09, 2010

Sheet
E

33

of

44

+3VALW TO +3V_SB(ICH8M AUX Power)

+5VALW

+3VALW

+5VS

+5VALW

+3V

+5VALW TO +5VS

U10

C363

C226

R287
100K_0402_5%

1
2
3
4
C176

C177

R198
470_0603_5%

AP4800_SO8
10U_0805_10V6K
2
2
1U_0603_10V6K

2
10U_0805_10V6K

28

SYSON#

SYSON#

Q26A
29,40

SYSON

SYSON

2
DMN66D0LDW-7_SOT363-6

0.1U_0603_25V7K
Q42A
DMN66D0LDW-7_SOT363-6

C195

R1433
100K_0402_5%

Q42B
DMN66D0LDW-7_SOT363-6

0.1U_0603_25V7K

+5VALW
2

R285
100K_0402_5%

+1.5V to +1.5VS
+3VS

10U_0805_10V6K
2
2
10U_0805_10V6K

C436

R385
470_0603_5%

C309

C313

C315

C310

Q26B
DMN66D0LDW-7_SOT363-6

R267
470_0603_5%

10U_0805_10V6K
2
2
1U_0603_10V6K

AP4800_SO8

29,31,40,41 SUSP#

10U_0805_10V6K
2
2
10U_0805_10V6K

1
2
3
4

R1438
10K_0402_5%
2

10U_0805_10V6K
2
2
1U_0603_10V6K

S
S
S
G

2
C437

AP4800_SO8

D
D
D
D

C429

8
7
6
5

SUSP

U12
S
S
S
G

1
2
3
4

3 1

C430

D
D
D
D

SUSP

+1.5VS

U22
8
7
6
5

31,41

1
2
R244 @
0_0805_5%

+1.5V

+3VALW TO +3VS
+3VALW

Q41A
DMN66D0LDW-7_SOT363-6

SBPWR_EN#

Q41B
DMN66D0LDW-7_SOT363-6

C351
SBPWR_EN#

2
SUSP

3V_GATE

2
1
R199
200K_0402_5%

+VSB

SUSP

2
1
R470
200K_0402_5%

2
1
R299
33K_0402_5%

+VSB

100P_0402_50V8J
10U_0805_10V6K
2
2
2
2
1000P_0402_50V7K
10U_0805_10V6K

R298
@
470_0603_5%

S
S
S
G

5VS_GATE

C361

10U_0805_10V6K
2
2
1U_0603_10V6K

AP4800_SO8

D
D
D
D

2
C379

C117 C362

8
7
6
5

1
2
3
4

S
S
S
G

C439

D
D
D
D

U15
8
7
6
5

SUSP
1.5VS_GATE

5
1

C391
0.1U_0603_25V7K

2
SUSP

C314

SUSP

Q43B
DMN66D0LDW-7_SOT363-6

+5VALW

0.1U_0603_25V7K

2
1
R266
510K_0402_5%

R300
100K_0402_5%

2
R297
2.2M_0402_5%
@
23

SBPWR_EN#

SBPWR_EN#

Q43A
DMN66D0LDW-7_SOT363-6

+VSB

Q32B
DMN66D0LDW-7_SOT363-6

4
6

Q32A
DMN66D0LDW-7_SOT363-6

SUSP

3VS_GATE

2
1
R365
270K_0402_5%

+VSB

2N7002-7-F_SOT23-3
@

2
G
Q27
S
2N7002-7-F_SOT23-3

29 SBPWR_EN

2
G
Q29

ACIN

29,38

R288
100K_0402_5%

+3VS

2 SUSP
G
Q58
2N7002-7-F_SOT23-3
@

2 SYSON#
G
Q16
2N7002-7-F_SOT23-3

2 SUSP
G
Q24
2N7002-7-F_SOT23-3

2 SUSP
G
Q13
2N7002-7-F_SOT23-3
@

2
2
2
2
2
2
2
2

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

C574

2 0.1U_0402_16V4Z

+HDMI_5V_OUT
C575

2 0.1U_0402_16V4Z

+5VS

+R_CRT_VCC
1
1
1
1
1
1
1
1

R265
470_0603_5%

R259
470_0603_5%

R612
470_0603_5%
@

R283
470_0603_5%

+1.5V

+1.8VS

R253
470_0603_5%
@

+0.75VS
2

+1.05VS

+1.5VS

C548
C555
C556
C563
C564
C565
C566
C567

2 SYSON#
G
Q17
2N7002-7-F_SOT23-3

C568
C569
C570
C571
C572
C573
C576
C577

2010/06/17 From ESD Require

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

DC Interface
Document Number

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Thursday, July 08, 2010

Sheet
E

34

of

44

VIN
1

PC1
1000P_0402_50V7K

PC2
100P_0402_50V8J

PC3
100P_0402_50V8J

2DC_IN_S2

ACES_50305-00441-001

1
2
3
4
GND
GND

DC_IN_S1

PJP1

PL1
SMB3025500YA_2P
1

PC4
1000P_0402_50V7K

VIN
2

+5VALWP

+3VALW

+5VALW

JUMP_43X118

(5A,200mils ,Via NO.= 10)

(3A,120mils ,Via NO.= 6)

BATT+

JUMP_43X79
PD1
LL4148_LL34-2

PD2
LL4148_LL34-2
2
1

PJ2

PJ1
1

+3VALWP

N1

+VSBP

PJ4
1

+VSB

+1.8VSP

JUMP_43X39

+1.8VS

JUMP_43X39

(120mA,40mils ,Via NO.= 2)

(0.5A,20mils ,Via NO.=2)

VS

31

51ON#

PC10
0.1U_0603_25V7K

PJ6
1

+0.75VSP

PC9
0.22U_0603_25V7K

JUMP_43X79
(4A,160mils
,Via NO.=8)

PJ9

PJ8

+1.05VSP

+1.05VS

+1.5VP

JUMP_43X118

JUMP_43X118

+CHGRTC

PR189
0_0603_5%
1

+1.5V

JUMP_43X79

(15A,600mils ,Via NO.=30)

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

(8A,320mils ,Via NO.=16)

+3VLP
4

JUMP_43X79
PJ11

PJ10
2

+0.75VS

PR5
22K_0402_1%
1
2

PR4
100K_0402_1%

PJ3

PR2
68_1206_5%
2

PR1
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23-3

DCIN
Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
D

35

of

44

TH
PI

PR9
100_0402_1%

2
PR10
100_0402_1%

VL

PR13
21K_0402_1%

VCC TMSNS1

GND RHYST1

OT1 TMSNS2

OT2 RHYST2

PR16
9.53K_0402_1%

@ PR18
47K_0402_1%
1

PH1
100K_0402_1%_NCP15W F104F03RC

G718TM1U_SOT23-8

PR17
1K_0402_1%

@ PR14
100K_0402_1%
1

PU2

+3VALW P

2
PR12
10K_0402_1%

PC19
0.1U_0402_10V7K
PR15
6.49K_0402_1%
2
1

PR11
1K_0402_5%

PC18
0.01U_0402_25V7K

EC_SMB_CK1 29

PC17
1000P_0402_50V7K

VL

EC_SMB_DA1 29

<40,41>
BATT+

PL2
SMB3025500YA_2P
1
2

BATT_S1

<40,41>
VMB

CONN@

PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 56 degree C

EC_SMCA

PJP2
SUYIN_200275GR008G13GZR

EC_SMDA

10
9
8
7
6
5
4
3
2
1

GND
GND
8
7
6
5
4
3
2
1

BATT_TEMP 29

MAINPW ON 21,37

@ PH2
100K_0402_1%_NCP15W F104F03RC

PQ2
TP0610K-T1-E3_SOT23-3

1
2

PC21
0.1U_0603_25V7K

PR20
22K_0402_1%
1
2

VL

+VSBP

1
PR19
100K_0402_1%
3

PC20
0.22U_0603_25V7K

B+

PR22
1K_0402_5%
2

PQ3
2
G

2N7002W -T/R7_SOT323-3

PC22
1U_0402_6.3V6K

SPOK

37

PR21
100K_0402_1%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Deciphered Date

2011/04/22

Title

BATTERY CONN / OTP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
D

36

of

44

Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO

PC23
1U_0603_10V6K

2VREF_8205

RT8205_B+
PL10
FBMA-L18-453215-900LMA90T_1812

PR23
13K_0402_1%
1
2

PR24
30K_0402_1%
1
2

PR25
20K_0402_1%
1
2

PR26
20K_0402_1%
1
2

10

UGATE2

UGATE1

21

UG_5V

LX_3V

11

PHASE2

PHASE1

20

LX_5V

LG_3V

12

LGATE2

LGATE1

19

LG_5V

1
3

PC42
2.2U_0603_10V6K

1
2

2
1
PR37
40.2K_0402_1%

2
G

5
6
7
8
1
2
1
2
3
2
1

PC39
4.7U_0805_10V6K

1
2

2VREF_8205

PR32
4.7_1206_5%

5
6
7
8
4

Typ: 175mA

PC37
680P_0402_50V7K

NC

RT8205EGQW _W QFN24_4X4

18

VIN

GND

VREG5
17

16

13

RT8205_B+
1

PQ9
DTC115EUA_SC70-3

PR51
200K_0402_1%
1
2

PQ7
AO4712_SO8

+5VALWP

1
PC35
220U_6.3V_M

+
2

RT8205
TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
(2)SMPS2=375KHZ(+3VALWP)
B

TPS51125A
TONSEL=VREF (1)SMPS1=245KHZ (+5VALWP)
(2)SMPS2=305KHZ(+3VALWP)
3.3VALWP Delta I = 1.902A (Freq=305KHz)
Iocp = 7.108A ~ 8.34A
5VALWP Delta I = 3.199A (Freq=245KHz)
Iocp = 8.74A ~ 10.16A

ACPRN

PL4
4.7UH_PCMC063T-4R7MN_5.5A_20%
1
2

VL

21,36 MAINPWON
1

PC30
0.1U_0603_25V7K
2
1

UG_3V

2
PC40
0.1U_0603_25V7K

5
G

PR35
100K_0402_1%

PR36
100K_0402_1%

PC29
2200P_0402_50V7K
2
1

PR30
PC33
0_0603_5% 0.1U_0603_25V7K
BST_5V 1
2 1
2

EN
3

D
PQ8B
DMN66D0LDW -7_SOT363-6

VS

PC28
10U_1206_25V6M
2
1

ENTRIP1

22

PC38
1U_0603_10V6K
2
1

1
2

PR34
100K_0402_1%

ENTRIP2

2
FB1

23

BOOT1

VL

ENTRIP1

3
REF

TONSEL

ENTRIP2
5

PGOOD

BOOT2

VFB=2.0V

36

B+

ENTRIP1

PQ8A
DMN66D0LDW -7_SOT363-6

SPOK

VREG3

PR33
499K_0402_1%
1
2

1
2
3

24

PC36
680P_0402_50V7K
2
1

VO1

PQ5
AO4466_SO8
4

PQ6
AO4712_SO8

PR28
154K_0402_1%
2

BST_3V

3
2
1

VO2

15

PC32
0.1U_0603_25V7K

SKIPSEL

PR29
2 1
2
0_0603_5%

8
7
6
5

PR31
4.7_1206_5%
2
1

PL3
4.7UH_SIL104R-4R7PF_5.7A_30%
1
2

PC34
220U_6.3V_M

P PAD

14

+3VALWP

ENTRIP2

PC31
4.7U_0805_10V6K

1
2
3

PU3

25
2

8
7
6
5

PC26
10U_1206_25V6M
2
1

PC25
0.1U_0603_25V7K
2
1

PC27
2200P_0402_50V7K
2
1

PQ4
AO4466_SO8
4

PR27
133K_0402_1%
1
2

FB2

+3VLP

1
PC24
680P_0402_50V7K
2
1

38

RT8205_B+

Typ: 175mA

B+

+3.3VALWP Ipeak=5.629A ; Imax=3.940A

Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(10E-06 * 133K)/10=133mV
Ilimit=133mV/(18m*1.2) ~ 133mV/(15m*1.2)
=6.157A ~ 7.389A
Iocp=Ilimit+Delta I/2
=6.931A ~ 8.162A
Delta I=1.547A (Freq=375KHz)

+5VALWP Ipeak=7A ; Imax=4.9A

Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(10E-06 * 154K)/10=154mV
Ilimit=154mV/(18m*1.2) ~ 154mV/(15m*1.2)
=7.14A ~ 8.56A
Iocp=Ilimit+Delta I/2
=8.44A ~ 9.86A
Delta I=2.613A (Freq=300KHz)

PQ10
2N7002W -T/R7_SOT323-3

PQ11
DTC115EUA_SC70-3

29,31 EC_ON

Compal Secret Data

Security Classification

2010/04/22

Issued Date

2011/04/22

Deciphered Date

Title

Compal Electronics, Inc.

3VALW/5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, July 08, 2010
Date:
5

Rev
1.0

PEW72
Sheet
1

37

of

44

CSIN

CELLS

CSOP

21

ICOMP

CSIN

20

VCOMP

CSIP

19

1 PR56

2 10K_0402_1%

4
2

2
1 1

ICM

PHASE

18

VREF

UGATE

17

DH_CHG

CHLIM

BOOT

16

ACLIM

VDDP

15

VADJ

LGATE

14

GND

PGND

13

PR58
100_0402_1%
1
2

CSOP

PQ21
AO4466_SO8

BATT Type

CV mode

12

CHG

PQ23
@
AO4466_SO8

1
3
2
1

RB751V-40_SOD323-2
1
26251VDD
PR67
4.7_0603_5%
PC65
4.7U_0603_6.3V6K

BATT+

4 PR59
0.02_1206_1%
3

PC60
0.1U_0603_25V7K
2 BST_CHGA 2
1
PD6

<40,41>

TCR=50ppm / C
PL6
10UH_PCMB104T-100MS_6A_20%
1
2

6251VDDP
DL_CHG

11

PQ29
2N7002W -T/R7_SOT323-3

ISL6251AHAZ-T_QSOP24

2N7002W -T/R7_SOT323-3

PR69
15.4K_0402_1%
1
2
2

6251VDD
PR73
10K_0402_1%
1
2

PR70
31.6K_0402_1%

PACIN

PR71
47K_0402_1%

ACPRN

PR74
14.3K_0402_1%
2

Kv
Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K
R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv
A=Vref*(R/(R+514K))=0.052
Kv=9.451

ACIN 29,34

PR72
10K_0402_1%

Ki
Vchlim=Iref*(PR374/(PR372+PR374))
=Iref*(100K/(80.6K+100K))
=Iref*0.5537
Ichanrge=(165mV/PR369)*(Vchlim/3.3V)
=(165m/20m)*(1/3.3V)*Iref*0.5537
=1.3842*Iref
Iref=0.7224*Ichanrge =>Ki=0.7224

Charging Voltage
(0x15)

10

29 CALIBRATE#

PQ26
PDTC115EU_SOT323-3
3

CC=0.6~4.48A
IREF=0.7224*Icharge
Ki=0.7224
IREF=0.43V~3.24V

PQ25
2
G

CP mode
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=1.502V, Iinput=4.07A

6251aclim
20K_0402_1%
PR68

12.1K_0402_1%

6251VREF 1

29 65W/90W#

PR62
0_0603_5%
BST_CHG 1

PR65
1

PR64
100K_0402_1%

0.1U_0402_16V7K

ACOFF

IREF

6251VREF

PC59
1
2

PR66
2.55K_0402_1%

29,39

ACOFF

29

2
1
PC61
0.01U_0402_25V7K
2
1

PQ24
PDTC115EU_SOT323

ADP_I

PR61
80.6K_0402_1%
2
1

29

PR63
22K_0402_5%
1
2
1

PACIN

5
6
7
8

PC56
0.01U_0402_25V7K

PC54
0.047U_0402_16V7K
1
2
PR54
20_0402_5%
2
1
PR55
20_0402_5%
PC57
0.1U_0603_25V7K
1
2
PR57
2_0402_5%
LX_CHG

CSON

CSON

2
G

EN

22

37

PR53
20_0402_5%
1
2

PC52
0.1U_0603_25V7K
2
1

ACPRN

ACPRN

23

@ PQ19
2N7002W -T/R7_SOT323-3
2 PACIN
G

PC64
10U_1206_25V6M
2
1

PQ20B
DMN66D0LDW -7_SOT363-6

6800P_0402_25V7K
2

ACSET ACPRN

PR49
100K_0402_1%

VIN_1

DCIN

PC63
10U_1206_25V6M
2
1

5
G

PQ20A
DMN66D0LDW -7_SOT363-6
2

24

DCIN

PC55
1

PR47
14.3K_0402_1%
PC53
0.1U_0603_25V7K
2
1

PC66
1000P_0402_50V7K@ PR45
200K_0402_1%
1
2 VIN
@ PD5
BAS40CW _SOT323-3
3
1
2

VDD

3S/4S#

ACOFF

PQ16
PDTC115EU_SOT323

29

VIN

PR44
10K_0402_1%

1 1

6251_EN

PU4

PR39
47K_0402_1%
1
2

ACSETIN

PC50
1000P_0402_25V8J
2

PC49
2.2U_0603_6.3V6K PR46
10_1206_5%

PQ18
PDTC115EU_SOT323

1
2
1

@ PR42
PR43
191K_0402_1% 191K_0402_1%

1
1

PR77 47K_0402_5%
2

100K_0402_1%

FSTCHG

6251VDD
PR50
150K_0402_1%

PR48
0_0402_5%
2
1

PR52

29

ACSETIN

47K

PQ17
PDTC115EU_SOT323

PreCHG

PD3
RB751V-40_SOD323-2

6251VDD

VIN_1

PR41
200K_0402_1%

VIN

PQ15
PDTA144EU_SOT323-3

47K
2

CSIP

PC43
5600P_0402_25V7K
1
2

PR40
200K_0402_1%

PC48
0.1U_0603_25V7K
2

8
7
6
5

PR60
4.7_1206_5%

PQ14 AO4407A_SO8
1
2
3

CHG_B+

PL5
HCB4532KF-800T90_1812
1
2

3
2
1

PC47
2200P_0402_25V7K
2
1

ACPRN

B+

PR38 0.02_2512_1%

8
7
6
5

5
6
7
8

P3

PQ13 AO4407A_SO8
1
2
3

PC46
0.1U_0603_25V7K
2
1

P2

1
2
3

PC45
10U_1206_25V6M
2
1

8
7
6
5

B+

CP = 85%*Iada ; CP = 4.07A
CP = 85%*Iada ; CP = 2.91A

ADP_I = 19.9*Iadapter*Rsense

PQ12 AO4407A_SO8

VIN

PC44
10U_1206_25V6M
2
1

Iada=0~4.74A(90W/19V=4.736A)
Iada=0~3.42A(90W/19V=3.421A)

PC62
680P_0402_50V7K

Normal 3S LI-ON Cells

12600mV

12.60V

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/22

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

CHARGER
Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
D

38

of

44

PreCHG
PR76
1K_1206_5%
1
2
PR78
1K_1206_5%
1
2

TP0610K-T1-E3_SOT23-3
PQ27

PD7
2

PR79
1K_1206_5%
1
2

1
PR83

100K_0402_5%

PR82
1

PR81
1K_1206_5%
1
2

B+

LL4148_LL34-2
100K_0402_5%

VIN

PR86
100K_0402_5%

ACOFF

PD9

1 2

29,38

PQ28
PDTC115EU_SOT323-3

2
1

+5VALWP

2
PQ30
PDTC115EU_SOT323-3

3
BAS40CW _SOT323-3

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2011/04/22

Title

PRECHARGE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
1

39

of

44

PL11
FBMA-L18-453215-900LMA90T_1812
2
1

SUSP#

1
2

3
2
1

PR90
@ 0_0402_5%
1
2

B+

5
6
7
8

PC70
4.7U_0805_25V6-K

PQ32
AO4466_SO8

PC69
2200P_0402_50V7K
2
1

5
6
7
8

1.5VP_B+

PC71
4.7U_0805_25V6-K

PQ33
AO4456_SO8
4
PR91
280K_0402_1%
1
2

DL_1.5VP

DL_1.5VP

<36,37,38,39,40,42>

5
6
7
8

3
2
1

11

VDDP

10

LGATE

3
2
1

NC

+1.05VSP

@ PR103
4.7_1206_5%

+5VALW

1
+

1 2

CS

PL8
1.0UH_PCMC104T-1R0MN_20A_20%
1
2

PC86
330U_6.3V_M

2
DL_1.05V

DL_1.05V

RT8209BGQW _W QFN14_3P5X3P5

PC90
4.7U_0603_6.3V6M

PGOOD

LX_1.05VSP_1..5V

VFB=0.75V

DH_1.05VSP_1..5V

12

FB

13

PHASE

UGATE

PR105
13K_0402_1%

VDD

BOOT

PGND

VOUT

14

15

TON

@ PC89
47P_0402_50V8J
1
2

PR104
100_0603_5%
1
2

EN/DEM

PC84
0.1U_0402_16V7K

PR102
PC85
0_0603_5%
0.1U_0603_25V7K
BST_1.05VSP_1..5V
1
2BST_1.05VSP_1..5V-1
1
2

@ PC87
680P_0402_50V7K

PC88
4.7U_0805_10V6K

PR106
2.4K_0402_1%
1
2
4

+5VALW

PU7

PR107
5.9K_0402_1%
1

<Vo=1.05V> VFB=0.75V
Vo=VFB*(1+PR108/PR109)=0.75*(1+12K/30K)=1.05V
Fsw=261KHz
Cout ESR=15m ohm
Rdson(max.)=11.5m Rdson(min)=9m
Ipeak=9A, Imax=Ipeak*0.7=6.3A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=2.11A
=>1/2DeltaI=1.055A
Vtrip=Rtrip*10uA=15K*10uA=0.15V
Iocpmin=Vtrip/Rdsonmax*1.3+1.055
=0.15/(0.011*1.3)+1.055=11.0892A
Iocpmax=(0.15/(0.009*1.1))+1.055A=16.2073A
Iocp=11.0892A~16.2073A

VFB=0.75V
Vo=VFB*(1+PR108/PR109)=0.75*(1+12K/30K)=1.05V
Ton=19*e-12*143000(((2/3)*Vo+100mV)/19)+50ns
=2.645e-7 us
=>Vo/Vin=D=Ton/Ts =>Ts=3.35us
Fsw=261KHz(by caculation tool)

PQ35
AO4456_SO8

GND

31 VS_ON

PR100
280K_0402_1%
1
2

@ PR101
0_0402_5%
1
2

B+
PC83

PC81
4.7U_0805_25V6-K
2
1

1
2

PC80
4.7U_0805_25V6-K

1
2

PC79
2200P_0402_50V7K
2
1

5
6
7
8

PQ34
AO4466_SO8

2
1

PL15
FBMA-L18-453215-900LMA90T_1812
2
1

1.05VSP_B+

PR99
10K_0402_5%
SUSP#

+1.5VPGOOD 31

PR98
5.76K_0402_1%

29,31,34,41 SUSP#

@ PC76
680P_0402_50V7K

PR97
5.9K_0402_1%
1
2

PC75
4.7U_0805_10V6K

2200P_0402_50V7K

PC78
4.7U_0603_6.3V6M

PC74
330U_6.3V_M

PC82

+
2

2200P_0402_50V7K

14
PGND

LGATE

RT8209BGQW _W QFN14_3P5X3P5

10

PGOOD

VDDP

@ PR94
4.7_1206_5%

+5VALW
2

LX_1.5VP

11

+1.5VP

FB

12

CS

PL7
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2

PHASE

VFB=0.75V

VDD

UGATE

DH_1.5VP

PR96
11K_0402_1%

BOOT

VOUT

PR95
100_0603_5%
1
2

NC

TON

13

PR93
PC73
0_0603_5%
0.1U_0603_25V7K
1
2VBST_1.5VP-11
2

+5VALW

BST_1.5VP

<Vo=1.5V> VFB=0.75V
Vo=VFB*(1+PR116/PR117)=0.75*(1+10K/10K)=1.5V
Fsw=262KHz
Cout ESR=15m ohm Rdson(max)=4.5m
Rdson(min)=5.6m
Ipeak=11.3A, 1.2Ipeak=13.56A ,Imax=7.91A
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=2.3969A
=>1/2DeltaI=1.198A
Vtrip=Rtrip*10uA=18K*10uA=0.18V
Iocpmin=Vtrip/Rdsonmax*1.2+1.198
=0.075/(0.018*1.3)+1.198=13.98A
Iocpmax=(0.075/(0.015*1.1))+1.198A=22.64A
Iocp=13.98~22.64A

EN/DEM

PC72
0.1U_0402_16V7K

VFB=0.75V
Vo=VFB*(1+PR97/PR98)=0.75*(1+5.9K/5.76K)=1.518V
Fsw=282KHz

15

PU6

GND

3
2
1

PR92
0_0402_5%
1
2

29,34 SYSON

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

1.5VP / 1.05VSP
Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
D

40

of

44

+5VALW

PC93
1U_0402_6.3V6K

PJ15@
JUMP_43X79
PU8

APL5930KAI-TRG_SO8

PC94
0.01U_0402_25V7K

PC95
10U_0805_6.3V6M

FB

+1.8VSP
PR108
1.54K_0402_1%

EN
POK

3
4

PC91
4.7U_0603_6.3V6K

VOUT
VOUT

8
7

VCNTL
VIN
VIN
GND

6
5
9

+3VALW

PR111
1.2K_0402_1%

SUSP#

PR109
1K_0402_1%
1
2

+1.5V

PR110
47K_0402_5%

PJ16
JUMP_43X79

PC92
0.1U_0402_10V7K

29,31,34,40 SUSP#

NC

VREF VCNTL

VOUT

NC

TP

+3VALW
1

NC

GND

PR114
4.7K_0402_1%
2

PC98
4.7U_0805_6.3V6K

VIN

2
1

PU9
1

PC99
1U_0603_6.3V6M

PR116
4.7K_0402_1%
2

PC103
0.1U_0402_16V7K

+0.75VSP
1

PC101
0.1U_0402_16V7K
2
1

PQ36
2N7002W -T/R7_SOT323-3
2
G

PR115
0_0402_5%
1
2

SUSP

31,34 SUSP

APL5336KAI-TRL_SOP8P8

PC102
10U_0805_6.3V6M

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

+1.5VP/+1.8VSP/+1.0VSDGPU
Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
1

41

of

44

+3VS

2
1
PR151
10K_0402_1%

1
2

PC125
2200P_0402_50V7K

21

BOOT_CPU2
1 PR170 2BOOT_CPU2-1
1
2
2.2_0603_5%
PC141
UGATE_CPU2
0.22U_0603_10V7K

1
2
+5VS
PD11
1SS355_SOD323-2

CPU_CSN1

Change P/N for 0402-100K

CPU_CSP2-1
2

1 2

CPU_CSP2

3
2
1

PC142 @
680P_0402_50V7K

PR176
69.8K_0402_1%
1
2
PH4
1
2CPU_SN-2
1
2
PR179
28.7K_0402_1%
100K_0402_1%_NCP15W F104F03RC
1
2
PC143
0.033U_0402_16V7K

PR163
69.8K_0402_1%
2

PL14
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
4

PR174 @
4.7_1206_5%

PQ48
TPCA8028-H_SOP-ADVANCE8-5
4

CPU_CSN2

22

+CPU_CORE

2009_08_06 (0603->0402) PCBfootprint for Layout

PR175
17.8K_0402_1%
2
1

VBST2
DRVH2

PQ47
TPCA8030-H_SOP-ADV8-5
4

PC138
4.7U_0805_25V6-K

LL2

PHASE_CPU2

CPU_CSP1

3
2
1

2
PC137
4.7U_0805_25V6-K
2
1

LGATE_CPU2

23

CPU_VID05

CPU_VID15

CPU_VID25

CPU_VID35

5,8,21
CPU_VID4

CPU_VID5

PSI#

CPU_VID6

PC124
220U_25V_M

PC123
2200P_0402_50V7K
2
1
PR162
17.8K_0402_1%
2
1

25
24

VID0

VID1

PGND
DRVL2

20

19

VID2
18

VID3
17

VID5

VID4
16

15

PSI#

VID6
14

13

12

11

DPRSTP#

PU12
TPS51620RHAR_QFN40_6X6

CSP2

+CPU_B+

+5VALW
2
10U_0603_6.3V6M

CSN2

VSNS

B+
1

PH3
1
2CPU_SN-1
1
2
PR166
28.7K_0402_1%
100K_0402_1%_NCP15W F104F03RC
1
2
PC133
0.033U_0402_16V7K

1
PC135

26

PC128 @
680P_0402_50V7K

3
2
1

27

V5IN

1 2

LGATE_CPU1

DRVL1

CPU_CSP1-1
2
PR160 @
4.7_1206_5%

BOOT_CPU1
1 PR165 2BOOT_CPU1-1
1
2
2.2_0603_5%
PC130
PHASE_CPU1
0.22U_0603_10V7K

CSN1

GNDSNS

PC122
4.7U_0805_25V6-K
2
1

3
2
1
PGOOD

DPRSLPVR

CLK_EN#

VR_ON

TRIPSEL

PWRMON

OSRSEL

TONSEL

31

32

33

35

34

36

38

37

39
ISLEW

GND

V5FILT

28

CSP1

H_DPRSTP#

29

LL1

VR_TT#

2
1
2
VCCSENSE

+CPU_CORE

VBST

PR173
20K_0402_1%

PR178
100_0402_1%

1
2
VSSSENSE

PR177
100_0402_1%

DRVH1

UGATE_CPU1

GND

PD10
1SS355_SOD323-2

30

VREF

CPU_THERM
10 THERM
PR172
0_0402_5%
1

1
2

PR171
0_0402_5%
2
1

CPU_VSNS

PQ46
TPCA8028-H_SOP-ADVANCE8-5

1CPU_DPRSTP#
0_0402_5%
PSI#
1
0_0402_5%
VID6
2
0_0402_5%
VID5
2
0_0402_5%
VID4
2
0_0402_5%
VID3
2
0_0402_5%
VID2
2
0_0402_5%
VID1
2
0_0402_5%
VID0
2
0_0402_5%

2 CPU_CSP1-2
33P_0402_50V8J
2 CPU_CSN1-1
33P_0402_50V8J
2 CPU_CSN2-1
33P_0402_50V8J
2 CPU_CSP2-2
33P_0402_50V8J
CPU_GNDSNS

DROOP

<36,37,38,39,40,42>

PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
4

2
PR180
2
PR181
1
PR182
1
PR183
1
PR184
1
PR185
1
PR186
1
PR187
1
PR188

CPU_CSP2 2
PR169

PC139
100P_0402_50V8J
1
470_0402_1%

1
PC132
1
PC134
1
PC136
1
PC140

CPU_CSN1 2
PR167
CPU_CSN2 2
PR168

PC131
100P_0402_50V8J
1
470_0402_1%
1
470_0402_1%

40

41
2

1
470_0402_1%

CPU_CSP1 2
PR164

5.76K_0402_1%
1
2CPU_DROOP 1
PC127 68P_0402_50V8J
2
1
2CPU_VREF
PC129 0.22U_0603_10V7K
3

PL12
FBMA-L18-453215-900LMA90T_1812
2
1

+5VS

CPU_VREF
1
PR161

PC121
4.7U_0805_25V6-K
2
1

PC144
4.7U_0805_25V6-K
2
1

PQ44
TPCA8030-H_SOP-ADV8-5

CPU_DPRSLPVR
1
2
PR159
499_0402_1%

CPU_V5FILT

2
PC126
1U_0402_6.3V6K

CPU_VR_ON 2
PR158
CPU_CLK_EN#

+CPU_B+

22,29,31

+5VS

VR_ON

+3VS

8,22

1
0_0402_5%

1
PR152
@ 0_0402_5%

PM_DPRSLPVR

VGATE

16 CLK_ENABLE#

2
1
PR153
CPU_ISLEW
0_0402_5%
2
1
PR155
124K_0402_1%
CPU_OSRSEL
2
1
PR154
CPU_TONSEL
2
1CPU_VREF 0_0402_5%
PR156
0_0402_5%
CPU_TRIPSEL
2
1
PR157
0_0402_5%

8,16,22

2
1
PR150
1.91K_0402_1%

2010/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

+CPU_CORE
Rev
1.0

PEW72

Thursday, July 08, 2010

Sheet
1

42

of

44

9HUVLRQFKDQJHOLVW3,5/LVW
,WHP

)L[HG,VVXH

5HDVRQIRUFKDQJH

5HY

3*

0RGLI\/LVW
add PQ18

add 3S/4S pin function

add 4 cell battery

0.2

45

ACSETIN net

ACSETIN net no connect

0.2

45

1.5V enable BOM error

0.2

'DWH

3KDVH

PDTC115EU_SOT323 (SB301150200) and PR77 47K +-5% 0402(SD028470280)

2010/06/11

add PR92 and delete PR90 0_0402_5%

1.5V enable

3DJHRIRI3:5

EVT

2010/06/11

EVT

2010/06/11

EVT

(SD028000080)

45






C






B






Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Deciphered Date

2011/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)
Rev

PEW72/82 M/B LA-6631P Schematic1.0

Date:

Thursday, July 08, 2010

Sheet
1

43

of

44

A --> C Change List

20100622-----------------------------------------1. Change U48 to SA00002KI00 (EON EN25F16-100HIP)

2. Populate D11, D12
3. Populate R132, C194, R136, C225, R354, C416
20100618-----------------------------------------1. Page 30, For EMI reuqire populate C31, C32, C33, C34, C28, C35, C36, C27, C30, C29, C39, C40, C41,
C42, C43, C24, C46, C47, C48 C23, C22, C21
2. Page 12, Populate C483
20100617-----------------------------------------1. Add T19, T25 for boundary scan (CIT Factory)
2. Page 34, Add 0.1U_0402_16V4Z x 16 for +3VS/+5VS/+R_CRT_VCC/+HDMI_5V_OUT
C548, C555, C556, C563, C564, C565, C566, C567, C568, C569, C570, C571, C572, C573, C574, C575, C576, C577
3. Page 29, Reserved R38, R616 for SPI_WP#
20100615-----------------------------------------1. Page22, Add C745 for USB_OC#1_6 at chipset side.
2. Page28, Change C744 BOM Structure to @
20100614-----------------------------------------1. Page29, Change U13 to KB926QFD3 (SA00001J580)
Change R1432 to 8.2K_0402_5% (SD028820180)
2. Page16, Change U16 to ICS9LPRS387 (SA000020H10)
Change BOM Structure of L33 and R401 to @
Populate L32 and R400
3. Page31, Change BOM Structure of SW1 and SW2 to @
4. Change U7, U8, U43 to MC74VHC1G08DFT2G (SA00000OH00)
5. Update Power Schematics

C --> MP Change List

20100709-----------------------------------------1. Page33, Change C561, C530, C536 to 0 ohm (SD028000080)

Change R465, R458 to 0.47U_0603 (SE080474K80)
20100708-----------------------------------------1. Page28, Unpopulate D23 (follow ESD suggestion)
20100706-----------------------------------------1. Page29, Populate R289 and C340.
2. Page30, Unpopulate C21 ~ C43 and C46 ~ C48.

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/04/22

Issued Date

Deciphered Date

2011/04/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

HW (PWR)
Size
Document Number
Custom

Rev

PEW72/82 M/B LA-6631P Schematic 1.0

Date:

Friday, July 09, 2010

Sheet
1

44

of

44

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