1984 The TTL Data Book Vol 1

SDYD001
TheTTL
DataBook
Volume!
1984
..
."
"
TEXAS
INSTRUMENTS
The TTL Data Book

Volume 1
Alphanumeric Index and

General Information
Functional Index
Product Guide
Explanation of New
Logic Symbols
Ordering Instructions
and Mechanical Data
The TTL Data Book

Volwne 1
TEXAS
INSTRUMENTS
IMPORTANT NOTICE
Texas Instruments reserves the right to make changes at

any time in order to improve design and to supply the best
product possible.
TI cannot assume any responsibility for any circuits shown
or represent that they are free from patent infringement.
ISBN 0-89512-090-9
Library of Congress No. 83-051810
Copyright 1984 Texas Instruments Incorporated
INTRODUCTION
Texas Instruments presents important technical information on the industry's broadest and most advanced families of TTL
integrated circuits in the TTL data books, volumes 1 through 4.
The TTL Data Book- Volume 1 includes Alphanumeric and Functional Indexes to all bipolar digital devices available or under
development, show!ng the current technologies for each type. Logic symbols prepared in anticipation of IEEE Std. 91-1982
and pin assignments for all bipolar devices are shown in the Product Guide section, together with typical performance data
and chip carrier information. Package dimensions are given in the Mechanical Data section.
The TTL Data Book- Volume 2 comprehends complete specifications on five series of Transistor-Transistor-Logic circuits:
Standard TTL Circuits (Series 54/74). High-Speed TTL Circuits (Series 54H174H). Low-Power TTL Circuits (Series 54L).
Low-Power Schottky t TTL Circuits (Series 54LSI74LS). and Schottky TTL Circuits (Series 54SI74S).
The TTL Data Book- Volume 3 contains complete specifications on the most advanced Families of TTL integrated circuits:
Advanced Low-Power Schottky t (Series 54ALSI74ALS) and Advanced Schottky (Series54AS/74AS), with circuits capable
of twice the data throughput compared to Low-Power Schottky TTL (54LS/74LS) and Schottky TTL (54SI74S) devices.
The TTL Data Book- Volume 4 describes a series of high-complexity bipolar digital building blocks and support functions
designed specifically for implementing high-performance Computer or Controller systems. Included are specifications for
high-performance Schottky t TTL memories (RAMs, ROMs, PROMs, and FIFOs) and for Field-Programmable Logic devices.
The TTL data books, volumes 1 through 4, will be a meaningful addition to your technical library. They replace all previous
versions of:
The TTL Data Book

The ALSIAS Logic Circuits Data Book
The Bipolar Microprocessor Components Data Book.
tlntegrated Schottky-Barrier diode-clamped transistor is patented by Texas Instruments, U.S. Patent Number 3,463,975.
vi
The TTL Data Bool<

Volume 1
General Information
1'0
Functional Index
I~
Product Guide
I~
logic Symbols
I~
Mechanical Data
1-1
1-2
ALPHANUMERIC INDEX
Device Types
SN5400
SN54ALSOOA
SN54ASOO
SN54HOO
SN54LOO
SN54LSOO
SN54S00
SN5401
SN54ALS01
SN54H01
SN54LS01
SN5402
SN54ALS02
SN54AS02
SN54L02
SN54LS02
SN54S02
SN5403
SN54ALS03A
SN54L03
SN54LS03
SN54S03
SN5404
SN54ALS04A
SN54ASP4
SN54H04
SN54L04
SN54LS04
SN54S04
SN5405
SN54ALS05A
SN54H05
SN54LS05
SN54S05
SN5406
SN5407
SN5408
SN54ALS08
SN54AS08
SN54LS08
SN54S08
SN5409
SN54ALS09
SN54LS09
SN54S09
SN5410
SN54ALS10
SN54AS10
SN54H10
SN54L10
SN54LS10
SN54S10
SN54ALS11
SN54AS11
SN54H11
SN54LS11
SN54S11
SN5412
SN54ALS12
SN54LS12
SN5413
SN54LS13
Volume
SN7400 ..................... ,
SN74ALSOOA . . . . . . . . . . . . . . . . ..
SN74ASOO ................... ,
SN74HOO ... , ................ ,
............................
SN74LSOO ....................
SN74S00 . . . . . . . . . . . . . . . . . . . ..
SN7401 ......................
SN74ALS01 ...................
SN74H01 .....................
SN74LS01 ....................
SN7402 .... , .................
SN74ALS02 . . . . . . . . . . . . . . . . . ..
SN74AS02 . . . . . . . . . . . . . . . . . . ..
............................
SN74LS02 ....................
SN74S02 .....................
SN7403 ..................... ,
SN74ALS03A ................. ,
............................
SN74LS03 ....................
SN74S03 .................... ,
SN7404 ......................
SN74ALS04A . . . . . . . . . . . . . . . . ..
SN74AS04 .. , ................ ,
SN74H04 .....................
SN74LS04 ................... .
SN74S04 .................... .
SN7405 .... , ................ ,
SN74ALS05A . . . . . . . . . . . . . . . . ..
SN74H05 .................... ,
SN74LS05 ....................
SN74S05 .................... ,
SN7406 ......................
SN7407 ..................... ,
SN7408 ......................
SN74ALS08 ...................
SN74AS08 ...................
SN74LS08 ....................
SN74S08 .....................
SN7409 ......................
SN74ALS09 ...................
SN74LS09 ....................
SN74S09 .... . . . . . . . . . . . . . . . ..
SN7410 ..................... ,
SN74ALS10 .................. ,
SN74AS10 ................... ,
SN74H10 .................... ,
............................
SN74LS10 ....................
SN74S10 .................... ,
SN74ALS11 ...................
SN74AS11 ....................
SN74H11 .....................
SN74LS 11 .................... ,
SN74S11 .....................
SN7412 ......................
SN74ALS12 ., .................
SN74LS12 ....................
SN7413 ......................
SN74LS13 ....................
2
3
3
2
2
2
2
2
3
2
2
2
3
3
2
2
2
2
3
2
2
2
2
3
3
2
2
22
2
3
2
2
2
2
2
2
3
3
2
2
2
3
2
2
2
3
3
2
2
2
2
3
3
2
2
2
2
3
2
2
2
Device Types
SN5414
SN54LS14
SN54ALS15
SN54H15
SN54LS15
SN54S15
SN5416
SN5417
SN54LS18
SN54LS19
SN5420
SN54ALS20A
SN54AS20
SN54H20
SN54L20
SN54LS20
SN54S20
SN54ALS21
SN54AS21
SN54H21
SN54LS21
SN5422
SN54ALS22A
SN54H22
SN54LS22
SN54S22
SN5423
SN54LS24
SN5425
SN5426
SN54LS26
SN5427
SN54ALS27
SN54AS27
SN54LS27
SN5428
SN54ALS28A
SN54LS28
SN5430
SN54ALS30
SN54AS30
SN54H30
SN54L30
SN54LS30
SN54S30
SN54LS31
SN5432
SN54ALS32
SN54AS32
SN54LS32
SN54S32
SN5433
SN54ALS33A
SN54LS33
SN54ALS34
SN54AS34
SN54ALS35
SN5437
SN54ALS37A
SN54LS37
SN54S37
SN5438
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 DALLAS, TEXAS 75265
Volume
SN7414 .............. , .......

SN74LS14 ....................
SN74ALS15 ........... , ...... ,
SN74H15 .....................
SN74LS15 ....................
SN74S15 ............. , .......
SN7416 .............. , .......
SN7417 .............. , .......
SN74LS18 ....................
SN74LS19 ............ , .......
SN7420 ., ............ , .......
SN74ALS20A ................. ,
SN74AS20 ............ , ...... ,
SN74H20 .....................
............................
SN74LS20 ....................
SN74S20 ............. , .......
SN74ALS21 ...................
SN74AS21 ............ , .......
SN74H21 .....................
SN74LS21 ....................
SN7422 ......................
SN74ALS22A . . . . . . . . . . . . . . . . ..
SN54H22 ............. ' .......
SN74LS22 ....................
SN74S22 .................... ,
SN7423 ., ................... ,
SN74LS24 ....................
SN7425 ., ................... ,
SN7426 ..................... ,
SN74LS26 ............. , ......
SN7427 .............. " ..... ,
SN74ALS27 ...................
SN74AS27 ................... ,
SN74LS27 ....................
SN7428 ............... , ..... ,
SN74ALS28A ................. ,
SN74LS28 ............. , ......
SN7430 ., ................... ,
SN74ALS30 ............ , ......
SN74AS30 ....................
SN74H30 .................... ,
............................
SN74LS30 ................... ,
SN74S30 .....................
SN74LS31 ............. , ......
SN7432 ......................
SN74ALS32 ...................
SN74AS32 ............. , ......
SN74LS32 ....................
SN74S32 .............. , ......
SN7433 ......................
SN74ALS33A ................. ,
SN74LS33 ............. , ......
SN74ALS34 ...................
SN74AS34 ............. , ..... ,
SN74ALS35 ......... , .........
SN7437 ..... , .. , ...... , ..... ,
SN74ALS37A ........... , ......
SN74LS37 ....................
SN74S37 .............. , ......
SN7438 ......................
2
2
3
2
2
2
2
2
2
2
2
3
3
2
2
2
2
3
3
2
2
2
3
2
2
2
2
2
2
2
2
2
3
3
2
2
3
2
2
3
3
2
2
2
2
2
2
3
3
2
2
2
3
2
3
3
3
2
3
2
2
2
c::
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1-3
ALPHANUMERIC INDEX
Volume
Device Types
3
2
2
2
2
3
2
2
2
2
2
2
SN74LS42
2
SN7443A
............................ 2
SN7444A ..................... 2
............................ 2
SN7445 ...................... 2
SN7446A ... , ................. 2
............................ 2
SN7447A ... .......... ....... 2
............................ 2
SN74LS47 ... ................. 2
SN7448 ...................... 2
SN74LS48 ... . ... . ............ 2
SN7449 ... .. ................. 2
SN74LS49 .................... 2
SN7450 ...................... 2
SN74H50 .. .. ................. 2
SN7451 ..... . ................ 2
SN74H51 ..................... 2
............................ 2
SN74LS51 ... . ....... ' " ...... 2
SN74S51 ... ................. 2
SN74H52 .... . ................ 2
SN7453 ...................... 2
SN74H53 .... . ................ 2
SN7454 ..... . ................ 2
SN74H54 .... . ................ 2
.. .......................... 2
SN74LS54 ... . ................ 2
SN74H55 .... . ................ 2
............................ 2
SN74LS55 ... . ................ 2
SN74LS56 .................... 2
SN74LS57 ... . ................ 2
SN7460 ..... . ................ 2
SN74H60 ..................... 2
SN74H61 .... . ................ 2
SN74H62 ................... ,. 2
SN74LS63 .................... 2
SN74S64 ..................... 2
SN74S65 ..................... 2
SN74LS68 .................... 2
SN74LS69 .................... 2
SN7470 ...................... 2
SN74H71 ..................... 2
............................ 2
SN7472 ...................... 2
SN74H72 ..... ......... ....... 2
............................ 2
SN7473 ...................... 2
SN74H73 ..................... 2
SN54L73
SN54LS73A
SN5474
SN54ALS74
SN54AS74
SN54H74
SN54p4
SN54LS74A
SN54S74
SN5475
SN54L75
SN54LS75
SN5476
SN54H76
SN54LS76A
SN5477
SN54L77
SN54LS77
SN54H78
SN54L78
SN54LS78A
SN5480
SN5482
SN5483A
SN54LS83A
SN5485
SN54L85
SN54LS85
SN54S85
SN5486
SN54ALS86
SN54L86
SN54LS86
SN54S86
SN54H87
SN5488A
SN5489
SN5490A
SN54L90
SN54LS90
SN5491A
SN54L91
SN54LS91
SN5492A
SN54LS92
SN5493A
SN54L93
SN54LS93
SN5494
SN5495A
SN54AS95
SN54L95
SN54LS95B
SN5496
SN54L96
SN54LS96
SN5497
SN54L98
SN54L99
SN54100
SN54H101
SN54H102
Device Types
G)
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CD
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1-4
SN54ALS38A
SN54LS38
SN54S38
SN5439
SN5440
SN54ALS40A
SN54H40
SN54LS40
SN54S40
SN5442A
SN54L42
SN54LS42
SN5443A
SN54L43
SN5444A
SN54L44
SN5445
SN5446A
SN54L46
SN5447A
SN54L47
SN54LS47
SN5448
SN54LS48
SN5449
SN54LS49
SN5450
SN54H50
SN5451
SN54H51
SN54L51
SN54LS51
SN54S51
SN54H52
SN5453
SN54H53
SN5454
SN54H54
SN54L54
SN54LS54
SN54H55
SN54L55
SN54LS55
SN54LS56
SN54LS57
SN5460
SN54H60
SN54H61
SN54H62
SN54LS63
SN54S64
SN54S65
SN54LS68
SN54LS69
SN5470
SN54H71
SN54L71
SN5472
SN54H72
SN54L72
SN5473
SN54H73
SN74ALS38A
SN74LS38
SN74S38
SN7439
SN7440
SN74ALS40A
SN74H40
SN74LS40
SN74S40
SN7442A
.0
'0
'0'
.0
,0'
0.
0.
.0
0.0
0.
0.
0'0
0.0
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 OALLAS. TEXAS 75265
Volume
2
2
2
o. 3
3
2
2
2
SN74LS74A
SN74S74
2
SN7475 . ....
2
2
2
SN74LS75
SN7476 ..................... 2
SN74H76 . .................... 2
SN74LS76A ., ................. 2
. ............................ 2
. ........................... 2
. .............. .... ......... 2
SN74H78 . .................... 2
........................,.... 2
SN74LS78A . .................. 2
SN7480 ..................... 2
SN7482 ..................... 2
SN7483A . .................... 2
SN74LS83A .. . ................ 2
SN7485 . ..................... 2
..... . ..... .... .... ......... 2
SN74LS85 . ................... 2
SN74S85 ... .... ............. 2
SN7486 ..... . ................ 2
SN74ALS86 . .................. 3
. ........................... 2
SN74LS86 . ................... 2
SN74S86 . .................... 2
SN74H87 .. .. . ................ 2
SN7488A . .................... 4
SN7489 .... . ................ 4
SN7490A .. .. . ... ' " .......... 2
. ........................... 2
SN74LS90 . .. ........ ......... 2
SN7491A . .................... 2
.. ... ...... . ................ 2
SN74LS91 . ...... ' " .......... 2
SN7492A .................... 2
SN74LS92 . ................ ... 2
SN7493A .......
.......... 2
. ........................... 2
SN74LS93 ... . ................ 2
SN7494 . ..................... 2
SN7495A . .................... 2
SN74AS95 . ................... 3
. .... . ...................... 2
SN74LS95B .. . ................ 2
SN7496 . ..................... '2
.0
SN74LS73A
SN7474
SN74ALS74
SN74AS74
SN74H74
.0
.0
0.0
'0
0.0
'0'
.0
0'
..0
'.0
'0
.0
0.
'0
00.0
00
.0
.0
00
"
'"
. ........... , ...............
SN74LS96 ., .................. 2
SN7497 . ........ ' " .......... 2
............ .. . ............. 2
. ........................... 2
SN74100 . .................... 2
SN74H101 ...... 0 . ......... 2
SN74H102 . ..... ............. . 2
ALPHANUMERIC INDEX
Volume
Device Types
SN54H103
SN54104
SN54105
SN54H106
SN54107
SN54LS107A
SN54H108
SN54109
SN54ALS109
SN54AS109
SN54LS109A
SN54110
SN54111
SN54ALS112A
SN54AS112
SN54LS112A
SN54S112
SN54ALS113A
SN54AS113
SN54LS113A
SN54S113
SN54ALS114A
SN54AS114
SN54LS114A
SN54S114
SN54116
SN54120
SN54121
SN54L121
SN54122
SN54L122
SN54LS122
SN54123
SN54L123
SN54LS123
SN54S124
SN54125
SN54LS125A
SN54126
SN54LS126A
SN54128
SN54130
SN54ALS131
SN54AS131
SN54132
SN54LS132
SN54S132
SN54ALS133
SN54S133
SN54S134
SN54S135
SN54136
SN54LS136
SN54ALS137
SN54AS137
SN54LS137
SN54ALS138
SN54AS138
SN54LS138
SN54S138
SN54ALS139
SN54AS139
SN74H103 ......... " .........

SN74104 ........ , ............
SN74105 ' 0 ,
SN74H106 " ..................
SN74107 .....................
SN74LS107A ....... " .........
SN74H108 ., ... , ..............
SN74109
SN74ALS109
SN74AS109 ...................
SN74LS109A ......... .... . , ...
SN74110 ..... , . , ............
SN74111 .....................
SN74ALS112A .................
SN74AS112 ...................
SN74LS112A ... ...... ... ......
SN74S112 .......... ..... .....
SN74ALS113A .... .... .... .....
SN74AS113 ...... .... ..... ....
SN74LS113A ..................
SN74S113 ........ ....... .....
SN74ALS114A .................
SN74AS114 ...................
SN74LS114A ..................
SN74S114 ....................
SN74116 ......... ............
SN74120 .....................
SN74121 ....................
SN74122
.0
........ .... .... ............
SN74LS122 ...................
SN74123 ....................
. .......... ....... ..........
SN74LS123 ...... .............

SN74S124 ....................
SN74125 .... .... ...... ... ....
SN74lS125A .................
SN74126 .....................
SN74LS126A .. ... ... ...... ....
SN74128 ....................
SN74130 .....................
SN74ALS131 .................
SN74AS131 ...................
SN74132 .... .... ......... ....
SN74lS132 ...................
SN74S132 .... . , ..............
SN74ALS133 o.
SN74S133 ............... , ....
SN74S134 ....................
SN74S135 ....................
SN74136 .... .... .... ..... ....
SN74LS136
SN74ALS137 ... , ..............
SN74AS137 ...................
SN74LS137 ...................
SN74ALS138 .................
SN74AS138 ...................
SN74LS138
SN74S138 ....................
SN74AlS139 ..................
SN74AS139 ...................
0.
2
2
2
2
2
2
2
2
3
3
2
2
2
3
3
2
2
3
3
2
2
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
2
2
2
3
2
2
2
2
2
3
3
2
3
3
2
2
3
3
Volume
Device Types
SN54LS139A
SN54S139
SN54S140
SN54143
SN54144
SN54145
SN54LS145
SN54147
SN54LS147
SN54148
SN54LS148
SN54150
SN54151A
SN54ALS151
SN54AS151
SN54LS151
SN54S151
SN54152A
SN54LS152
SN54153
SN54ALS153
SN54AS153,
SN54L153
SN54LS153
SN54S153
SN54154
SN54L154
SN54155
SN54LS155A
SN54156
SN54LS156
SN54157
SN54ALS157
SN54AS157
SN54L157
SN54LS157
SN54S157
SN54ALS158
SN54AS158
SN54LS158
SN54S158
SN54159
SN54160
SN54ALS160A
SN54AS160
SN54LS160A
SN54161
SN54ALS161A
SN54AS161
SN54LS161A
SN54162
SN 54ALS 162A
SN54AS162
SN54LS162A
SN54S162
SN54163
SN 54ALS 163A
SN54AS163
SN54LS163A
SN54S163
TEXAS,
INSTRUMENTS
SN74LS139A
SN74S139
SN74S140
SN74141 .....................
SN74142 . ....................
SN74143 . ....................
SN74144 . ....................
SN74145 . ....................
SN74LS145
SN74147
SN74LS147 ' . 0
SN74148
SN74LS148 . ..................
SN74150 . ..... " .............
SN74151A
SN74ALS151 .... , .............
SN74AS151 . ..................
SN74LS151 ...................
SN74S151 ...................
.,
.........
00
00
00
. ...........................
. ...........................
SN74153 . ....................
SN74AlS153 ..................
SN74AS153 . ..................
. ...........................
SN74LS153
SN74S153
SN74154 . ....................
0.0
. ...........................
SN74155 . ....................
SN74LS155A ..................
SN74156 . ....................
SN74LS156 . ..................
SN74157 .....................
SN74ALS157 .... , .............
SN74AS157
............................
SN74lS157 . ..................
SN74S157 . ..... , .............
SN74ALS158 ..................
SN74AS158 . ..................
SN74LS158 . ..................
SN74S158 . ...................
SN74159 . ....... ' " ..........
SN74160 .....................
SN74ALS160A . ................
SN74AS160 ...................
SN74LS160A ..................
SN74161 . ....................
SN74ALS161A .................
SN74AS161 . ..................
SN74LS161A ..................
SN74162 .....................
SN74ALS162A . ................
SN74AS162 . ..................
SN74LS162A . .................
SN74S162 ...................
SN74163 . ....................
SN74ALS163A .................
SN74AS163 . ..................
SN74LS163A . .................
SN74S163 ...................
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
2
2
2
2
2
3
3
2
2
2
2
2
2
2
2
2
2
3
3
2
2
2
3
3
2
2
2
2
3
3
2
2
3
3
2
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3
3
2
2
2
3
'3
2
2
1-5
ALPHANUMERIC INDEX
Device Types
G)
CD
:::s
...CD
:::s
...
SN54164
SN54ALS164
SN54L164
SN54LS164
SN54165
SN54ALS165
SN54LS165A
SN54166
SN54ALS166
SN54LS166A
SN54167
SN54ALS168A
SN54AS168
SN54S168
SN54ALS169A
SN54AS169
SN54LS1698
SN54S169
SN54170
SN54LS170
SN54LS171
Q)
r+
c5"
:::s
1-6
Volume
SN74164 ..... ' " ............. 2

SN74ALS164 .................. 3
............................ 2
SN74LS164 ................... 2
SN74165 ................. .. 2
SN74ALS165 .................. 3
SN74LS165A .................. 2
SN74166 ..................... 2
SN74ALS166 .................. 3
SN74LS166A .................. 2
SN74167 ..................... 2
SN74ALS168A ................. 3
SN74AS168 ................... 3
SN74S168 .................... 2
SN74ALS169A ................. 3
SN74AS169 ................... 3
SN74LS169B .................. 2
SN74S169 ...... - ............. 2
SN74170 ..................... 2
SN74LS170 . .. ' " ............. 2
SN74LS171 ................... 2
SN74172
2
SN74173 ..................... 2
SN74LS173A .................. 2
SN74174 ..................... 2
SN74ALS174 .................. 3
SN74AS174 ................... 3
SN74LS174 , .................. 2
SN74S174 .................... 2
SN74175 .... - , ............... 2
SN74ALS175 .................. 3
SN74AS175 ........... , ....... 3
SN74LS175 ................... 2
SN74S175
2
SN74176 ..................... 2
SN74177 ...................... 2
SN74178 ..................... 2
SN74179 ....... ., ... , ......... 2
SN74180 ., ................... 2
SN74181 ..................... 2
SN74AS181A .................. 3
SN74LS181 ................... 2
SN74S181 .................... 2
SN74182 ..................... 2
SN74AS182 ................... 3
SN74S182 .................... 2
SN74H183 .................... 2
SN74LS183 ................... 2
SN74184 ..................... 2
SN74185A .................... 2
SN74187 ..................... 4
SN74LS189A .................. 4
SN74S189B ................... 4
SN74190 ..................... 2
SN74ALS190 .................. 3
SN74LS190 ................... 2
SN74191 ..................... 2
SN74ALS191 .................. 3
SN74LS191 ., ' " .............. 2
SN74192 ..................... 2
SN74ALS192 .................. 3
............. , .............. 2
"
.0
SN54173
SN54LS173A
SN54174
SN54ALS174
SN54AS174
SN54LS174
SN54S174
SN54175
SN54ALS175
SN54AS175
SN54LS175
SN54S175
SN54176
SN54177
SN54178
SN54179
SN54180
SN54181
SN54AS181A
SN54LS181
SN54S181
SN54182
SN54AS182
SN54S182
SN54H183
SN54LS183
SN54184
SN54185A
SN54187
SN54LS189A
SN54S189B
SN54190
SN54ALS190
SN54LS190
SN54191
SN54ALS191
SN54LS191
SN54192
SN54ALS192
SN54L 192
Device Types
SN54LS192
SN54193
SN54ALS193
SN54L193
SN54LS193
SN54194
SN54AS194
SN54LS194A
SN54S194
SN54195
SN54AS195
SN54LS195A
SN54S195
SN54196
SN54LS196
SN54S196
SN54197
SN54LS197
SN54S197
SN54198
SN54199
SN54LS219A
SN54221
SN54LS221
SN54LS222
SN54LS224
SN54S226
SN54LS227
SN54LS228
SN54AS230
SN54AS231
SN54ALS240A
SN54AS240
SN54LS240
SN54S240
SN54ALS241A
SN54AS241
SN54LS241
SN54S241
SN54ALS242A
SN54AS242
SN54LS242
SN54ALS243A
SN54AS243
SN54LS243
SN54ALS244A
SN54AS244
SN54LS244
SN54ALS245A
SN54AS245
SN54LS245
SN54246
SN54247
SN54LS247
SN54248
SN54LS248
SN54249
SN54LS249
SN54AS250
SN54251
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 DALLAS. TEXAS 75265
Volume
SN74LS192 ................... 2
SN74193 ..................... 2
SN74ALS193 .................. 3
............................ 2
SN74LS193 ...................
SN74194 .....................
SN74AS194 ...................
SN74LS194A ..................
SN74S194 '" .................
SN74195 .....................
. SN74AS195 ...................
SN74LS195A ..................
SN74S195 '" .................
SN74196 .....................
SN74LS196 ...................
SN74S196 ....................
SN74197 ............. , .......
SN74LS197 ...................
SN74S197 ....................
SN74198 .....................
SN74199 .....................
SN74S201 ....................
SN74LS219A ..................
SN74221 .....................
SN74LS221 ...................
SN74LS222 ...................
SN74LS224 .. . . . . . . . . . . . . . . . ..
SN74S225 ....................
SN74S226 ....... ' .............
SN74LS227 ...................
SN74LS228 ...................
SN74AS230 . . . . . . . . . . . . . . . . . ..
SN74AS231 " .................
SN74ALS240A . . . . . . . . . . . . . . . ..
SN74AS240 . . . . . . . . . . . . . . . . . ..
SN74LS240 ...................
SN74S240 ....................
SN74ALS241A .................
SN74AS241 " . . . . . . . . . . . . . . . ..
SN74LS241 ...................
SN74S241 ....................
SN74ALS242A .................
SN74AS242 ...................
SN74LS242 ...................
SN74ALS243A .................
SN74AS243 . . . . . . . . . . . . . . . . . ..
SN74LS243 ...................
SN74ALS244A .................
SN74AS244 ...................
SN74LS244 ...................
SN74ALS245A .................
SN74AS245 ...................
SN74LS245 ...................
SN74246 .....................
SN74247 .....................
SN74LS247 ...................
SN74248 .....................
SN74LS248 ...................
SN74249 .....................
SN74LS249 ...................
SN74AS250 ...................
SN74251 .....................
2
2
3
2
2
2
3
2
2
2
2
2
2
2
2
2
2
4
4
2
2
4
4
4
2
4
4
3
3
3
3
2
2
3
3
2
2
3
3
2
3
3
2
3
3
2
3
3
2
2
2
2
2
2
2
2
3
2
ALPHANUMERIC INDEX
Device Types
SN54ALS251
SN54AS251
SN54LS251
SN54S251
SN54ALS253
SN54AS253
SN54LS253'
SN54S253
SN54ALS257
SN54AS257
SN54LS257B
SN54S257
SN54ALS258
SN54AS258
SN54LS258B
SN54S258
SN54259
SN54ALS259
SN54LS259
SN54S260
SN54LS261
SN54AS264
SN54265
SN54LS266
SN54S268
SN54273
SN54ALS273
SN54LS273
SN54S274
SN54276
SN54278 .
SN54279
SN54LS279A
SN54AS280
SN54LS280
SN54S280
SN54S281
SN54AS282
SN54283
SN54LS283
SN54S283
SN54284
SN54285
SN54AS286
SN54LS289A
SN54S289B
SN54290
SN54LS290
SN54LS292
SN54293
SN54LS293
SN54LS294
SN54LS295B
SN54LS297
SN54298
SN54AS298
SN54LS298
SN54ALS299
SN54AS299
SN54LS299
SN54S299
Volume
SN74ALS251 ......... .........

SN74AS251 .. ........ ..... - ...
SN74LS251 ...... .... , - .......
SN74S251 ... .... ......... ....
SN74ALS253 .................
SN74AS253 ...................
SN74LS253 .. ........ .........
SN74S253 ... .... .......... .. SN74ALS257 .................
SN74AS257 .. .. , ..............
SN74LS257B .................
SN74S257 ... .............. .. ,
SN74ALS258 ..................
SN74AS258 .. - , ...............
SN74LS258B .................
SN74S258 ................... . ,
SN74259 .... ..... ... ..... ....
SN74ALS259 ..... .... .........
SN74LS259 .. ........ .........
SN74S260 ... .................
SN74LS261 ............ .... ...
SN74AS264 ...................
SN74265 .... ..... ............
SN74LS266 ...................
SN74S268 ... .... .... .........
SN74273 .... .... .... ...... .. ,
SN74ALS273 .................
SN74LS273 .. ..... ... .........
SN74S274 . ...... .... .........
SN74276 .... .................
SN74278 .... ............. ....
SN74279 ......... ... .........
SN74LS279A . , ................
SN74AS280 ...................
SN74LS280 ...................
SN74S280 ... ... ..............
SN74S281 ... .... .... .........
SN74AS282 .. ........ .........
SN74283 ....................
SN74LS283 .......... .........
SN74S283 ................... .
SN74284 ........ .............
SN74285 .....................
SN74AS286 ...................
SN74LS289A .................
SN74S289B .. ... ..... .........
SN74290 ....................
SN74LS290 .. .................
SN74LS292 .......... ..... ....
SN74293 ....................
SN74LS293 .. .................
SN74LS294 .................. .
SN74LS295B ......... ... ......
SN74LS297 ....... ... ... ......
SN74298 ........ .... .... .....
SN74AS298 ...................
SN74LS298 .. ..... ............
SN74ALS299 ...... ... .........
SN74AS299 .......... ... ......
SN74LS299 ......... ..........
SN74S299 .... ................
SN74S301 ........ ....... .....
3
3
2
2
3
3
2
2
3
3
2
2
3
3
2
2
2
3
2
2
2
3
2
2
2
2
3
2
4
2
2
2
2
3
2
2
2
3
2
2
2
2
2
3
4
4
2
2
2
2
2
2
2
2
2
3
2
3
3
2
2
4
Device Types
SN54LS319A
SN54LS320
SN54LS321
SN54LS322A
SN54ALS323
SN54AS323
SN54LS323
SN54LS347
SN54LS348
SN54S350
SN54ALS352
SN54AS352
SN54LS352
SN54ALS353
SN54AS353
SN54LS353
SN54LS354
SN54LS355
SN54LS356
SN54LS357
SN54365A
SN54~LS365
SN54LS365A
SN54366A
SN54ALS366
SN54LS366A
SN54367A
SN54ALS367
SN54LS367A
SN54368A
SN54ALS368
SN54LS368A
SN54ALS373
SN54AS373
SN54LS373
SN54S373
SN54ALS374
SN54AS374
SN54LS374
SN54S374
SN54LS375
SN54376
SN54LS377
SN54LS378
SN54LS379
SN54LS381
SN54S381
SN54LS382
SN54LS384
SN54LS385
SN54LS386
SN54390
SN54LS390
SN54393
SN54LS393
SN54AS395
SN54LS395A
SN54LS396
SN54LS398
SN54LS399
SN54S412
TEXAS
INSTRUMENTS
Volume
SN74LS319A ..................
SN74LS320 ...................
SN74LS321 ...................
SN74LS322A ............... - ..
SN74ALS323 ..................
SN74AS323 ... , ...............
SN74LS323 ...................
SN74LS347 ...................
SN74LS348 ... - ...... , ........
SN74S350 ....................
SN74351 .....................
SN74ALS352 ..................
SN74AS352 ...................
SN74LS352 ...................
SN74ALS353 ..................
SN74AS353 ...................
SN74LS353 ...................
SN74LS354 ...................
SN74LS355 ...................
SN74LS356 ...................
SN74LS357 ..... .... ...... ....
SN74365A ....................
SN74ALS365 ..................
SN74LS365A ...................
SN74366A ....... , ............
SN74ALS366 ..................
SN74LS366A ..................
SN74367A ....................
SN74ALS367 ..... , ............
SN74LS367A ..................
SN74368A . ...................
SN74ALS368 ..................
SN74LS368A ..................
SN74ALS373 ..................
SN74AS373 ...................
SN74LS373 ...................
SN74S373 ....................
SN74ALS374 ............. , ....
SN74AS374 ....................
SN74LS374 ...................
SN74S374 ....................
SN74LS375 ...................
SN74376 ......................
SN74LS377 ...................
SN74LS378 ...................
SN74LS379 ...................
SN74LS381 ...................
SN74S381 ....................
SN74LS382 ...................
SN74LS384 ...................
SN74LS385 ...................
SN74LS386 ...................
SN74390 .....................
SN74LS390 ...................
SN74393 .....................
SN74LS393 ...................
SN74AS395 ...................
SN74LS395A ..................
SN74LS396 ...................
SN74LS398 ...................
SN74LS399 ...................
SN74S412 ....................
4
2
2
2
3
3
2
2
2
2
2
3
3
2
3
3
2
2
2
2
2
2
3
2
2
3
2
2
3
2
2
3
2
3
3
2
2
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
2
2
2
2
2
r:::
.~
ctS
E
...
0
'to-
r:::
Cii
...
Q)
r:::
e"
Q)
1-7
ALPHANUMERIC INDEX
Volume
Device Types
SN54LS422
SN54LS423
SN54425
SN54426
G)
CD
::l
CD
"'"
~
::l
3Q)"'"
r+
Cr
::l
SN54S436
SN54S437
SN54LS440
SN54LS441
SN54LS442'
SN54LS443
SN54LS444
SN54LS445
SN54LS446
SN54LS447
SN54LS448
SN54LS449
SN54ALS465A
SN54LS465
SN54ALS466A
SN54LS466
SN54ALS467A
SN54LS467
SN54ALS468A
SN54LS468
SN54S482
SN54S484A
SN54S485A
SN54490
SN54LS490
SN54ALS518
SN54ALS519
SN54ALS520
SN54ALS521
SN54ALS522
SN54ALS526
SN54ALS527
SN54ALS528
SN54ALS533
SN54AS533
SN54ALS534
SN54AS534
SN54ALS538
SN54ALS539
SN54ALS540
SN54LS540
SN54ALS541
SN54LS541
SN54ALS560A
SN54ALS561A
SN54ALS563
SN54ALS564
SN54ALS568A
SN54ALS569A
SN54ALS573
SN54AS573
SN54ALS574
SN54AS574
SN54ALS575
SN54AS575
1-8
SN74LS422
SN74LS423
SN74425
SN74426
SN74S428
SN74S436
SN74S437
SN74LS440
SN74LS441
SN74LS442
SN74LS443
SN74LS444
SN74LS445 . 0 . 0 0. , 0 '
SN74LS446
SN74LS447
SN74LS448
SN74LS449 ...................
SN74ALS465A .................
SN74LS465 ...................
SN74ALS466A .................
SN74LS466 .. , ................
SN74ALS467A .................
SN74LS467 .. ...... ' " ........
SN74ALS468A .................
SN74LS468 ...................
SN74LS481 ...................
SN74S481 ....................
SN74S482 ....................
SN74S484A ...................
SN74S485A' ...................
SN74490 .....................
SN74LS490 ... ................
SN74ALS518 ..................
SN74ALS519 .................
SN74ALS520 ..................
SN74ALS521 ..................
SN74ALS522 ......... .... .....
SN74ALS526 ....... .... .......
SN74ALS527 ..................
SN74ALS528 ..................
SN74ALS533 ..................
SN74AS533 ...................
SN74ALS534 ..................
SN74AS534 ...................
SN74ALS538 ..................
SN74ALS539 .................
SN74ALS540 ..................
SN74LS540 ... ..... ' " ........
SN74ALS541 ..................
SN74LS541 ...................
SN74ALS560A .................
SN74ALS561A .................
SN74ALS563 ..................
SN74ALS564 .................
SN74ALS568A .................
SN74ALS569A .................
SN74ALS573 ..................
SN74AS573 ...................
SN74ALS574 .................
SN74AS574 ...................
SN74ALS575 .................
SN74AS575 ...................
.0
.0
0.0
0.0.0.0'0'
.0.0
'0
.0
.0
.0
'0.0.0
.0'
.0
.0.0
.0
0.0
0.0.0.0
'0'
.0'
.0
'
2
2
2
2
4
2
2
2
2
2
2
2
2
2
2
2
2
3
2
3
2
3
2
3
2
4
4
4
4
4
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
3
2
3
3
3
3
3
3
3
3
3
3
3
3
Device Types
SN54ALS576
SN54AS576
SN54ALS577
SN54AS577
SN54ALS580
SN54AS580
SN54LS589
SN54LS590
SN54LS591
SN54LS592
SN54LS593
SN54LS594
SN54LS595
SN54LS596
SN54LS597
SN54LS598
SN54LS599
SN54LS604
SN54LS605
SN54LS606
SN54LS607
SN54LS608
SN54LS610
SN54LS611
SN54LS612
SN54LS613
SN54LS618
SN54LS619
SN54ALS620A
SN54AS620
SN54LS620
SN54ALS621A
SN54AS621
SN54LS621
SN54ALS622A
SN54AS622
SN54LS622
SN54ALS623A
SN54AS623
SN54LS623
SN54LS624
SN54LS625
SN54LS626
SN54LS627
SN54LS628
SN54LS629
SN54LS630
SN54LS631
SN54ALS632
SN54ALS633
SN54ALS634
SN54ALS635
SN54LS636
SN54LS637
SN54ALS638A
SN54AS638
SN54LS638
SN54ALS639A
TEXAS
INSTRUMENTS
Volume
SN74ALS576
SN74AS576 ...................
SN74ALS577
SN74AS577
SN74ALS580
SN74AS580 ...................
SN74LS589
SN74LS590
SN74LS591
SN74LS592
SN74LS593
SN74LS594
SN74LS595
SN74LS596
SN74LS597
SN74LS598 . ..................
SN74LS599 . ..................
SN74LS600A .................
SN74LS601A .................
SN74LS602A ..................
SN74LS603A .................
SN74LS604 ...................
SN74LS605 ...................
SN74LS606 ...................
SN74LS607 . ..................
SN74LS608 . ..................
SN74LS610 . ..................
SN74LS611 . ..................
SN74LS612 ...................
SN74LS613 ...................
SN74LS618 . ..................
SN74LS619 ...................
SN74ALS620A .................
SN74AS620 . ..................
SN74LS620 . ..................
SN74ALS621A .................
SN74AS621 ...................
SN74LS621 ...................
SN74ALS622A .................
SN74AS622 . ..................
SN74LS622 . ..................
SN74ALS623A .................
SN74AS623 . ..................
SN74LS623 ...................
SN74LS624 . ..................
SN74LS625 . ..................
SN74LS626 . ..................
SN74LS627 . ..................
SN74LS628 . ..................
SN74LS629 . ..................
SN74LS630 ...................
SN74LS631 ...................
SN74ALS632 . .................
SN74ALS633 .................
SN74ALSG34 ..................
SN74ALS635 ..................
SN74LS636 . ....... , ..........
SN74LS637 ...................
SN74ALS638A .................
SN74AS638 ...................
SN74LS638 . ..................
SN74ALS639A .................
.0
'0.0
..0
.0.0
.0
0.0
.0.0
.0
0.0.0
0.
0.
'0.0
.0
.0
.0
.0
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
2
3
3
2
3
3
2
3
3
2
2
2
2
2
2
2
2
2
3
3
3
3
2
2
3
3
2
3
ALPHANUMERIC INDEX
Device Types
SN54AS639
SN54LS639
SN54ALS640A
SN54AS640
SN54LS640
SN54ALS641A
SN54AS641
SN54LS641
SN54ALS642A
SN54AS642
SN54LS642
SN54ALS643A
SN54AS643
SN54LS643
SN54ALS644A
SN54AS644
SN54LS644
SN54ALS645A
SN54AS645
SN54LS645
SN54ALS646
SN54AS646
SN54LS646
SN54ALS647
SN54LS647
SN54ALS648
SN54AS648
SN54LS648
SN54ALS649
SN54LS649
SN54ALS651
SN54AS651
SN54LS651
SN54ALS652
SN54AS652
SN54LS652
SN54ALS653
SN54LS653
SN54ALS654
SN54LS654
SN54LS668
SN54LS669
SN54LS670
SN54LS671
SN54LS672
SN54LS673
SN54LS674
SN54ALS677
SN54ALS678
SN54ALS679
SN54ALS680
SN54LS681
SN54LS682
SN54LS683
SN54LS684
SN54LS685
SN54LS686
SN54LS687
SN54ALS688
SN54LS688
SN54ALS689
SN54LS689
Volume
...................
SN74AS639
SN74LS639 ............. , .....
SN74ALS640A .................
SN74AS640 ...................
SN74LS640
SN74ALS641 A .................
SN74AS641 ...................
SN74LS641
SN74ALS642A .................
SN74AS642
SN74LS642 ....... , .. , ..... , ..
SN74ALS643A ........ ; ........
SN74AS643 . , .................
SN74LS643 ...................
SN74ALS644A .................
SN74AS644 ...................
SN74LS644 ...................
SN74ALS645A .................
SN74AS645 ...................
SN74LS645 ... , ...............
SN74ALS646 ..................
SN74AS646 ...................
SN74LS646 ...................
SN74ALS647 .................
SN74LS647 ...................
SN74ALS648 .................
SN74AS648 ...................
SN74LS648
SN74ALS649
SN74LS649
SN74ALS651 .................
SN74AS651 ...................
SN74LS651
SN74ALS652
SN74AS652 ...................
SN74LS652
SN74ALS653 ..................
SN74LS653 ...................
SN74ALS654 .................
SN74LS654 ...................
SN74LS668 ...................
SN74LS669 ...................
SN74LS670 . . . . . . . . . . . . . . . . . .
SN74LS671 ...................
SN74LS672 ...................
SN74LS673 ...................
SN74LS674 ...................
SN74ALS677 ............. .....
SN74ALS678 ..................
SN74ALS679 .................
SN74ALS680 ..................
SN74LS681 ...................
SN74LS682 ...................
SN74LS683 ...................
SN74LS684 ...................
SN74LS685 ...................
SN74LS686 ...................
SN74LS687 ................ , ..
SN74ALS688 ......... - ........
SN74LS688 ...................
SN74ALS689 ' " ..............
SN74LS689 ...................
0.
o.
0.0
.0
3
2
3
3
2
3
3
2
3
3
2
3
3
2
3
3
2
3
3
2
3
3
2
3
2
3
3
2
3
2
3
3
2
3
3
2
3
2
3
2
2
2
2
2
2
2
2
3
3
3
3
2
2
2
2
2
2
2
3
2
3
2
Device Types
SN54LS690
SN54LS691
SN54LS692
SN54LS693
SN54LS696
'SN54LS697
SN54LS698
SN54LS699
SN54AS756
SN54AS757
SN54AS758
SN54AS759
SN54AS760
SN54AS762
SN54AS763
SN54AS800
SN54AS802
SN54ALS804
SN54AS804A
SN54ALS805
SN54AS805A
SN54ALS808
SN54AS808A
SN54AS821
SN54AS822
SN54AS823
SN54AS824
SN54AS825
SN54AS826
SN54ALS832
SN54AS832A
SN54ALS841
SN54AS841
SN54ALS842
SN54AS842
SN54ALS843
SN54AS843
SN54ALS844
SN54AS844
SN54ALS845
SN54AS845
SN54ALS846
SN54AS846
SN54AS850
SN54AS851
SN54AS852
SN54AS856
SN54ALS857
SN54AS857
SN54AS866
SN54AS867
SN54AS869
SN54AS870
SN54AS871
SN54ALS873
SN54AS873
SN54ALS874
SN54AS874
SN54ALS876
SN54AS876
SN54AS877
SN54ALS878
TEXAS
INSTRUMENTS
Volume
SN74LS690 . , .................
SN74LS691 . ..................
SN74LS692 .. , ................
SN74LS693 ..... , . , ...........
SN74LS696 , ..................
SN74LS697 ...................
SN74LS698 . ..................
SN74LS699 . ..................
SN74AS756 ......... , .........
SN74AS756 . ..................
SN74AS758 . ..................
SN74AS759 ...................
SN74AS760 ...................
SN74AS762 . ..................
SN74AS763 ...................
SN74AS800 ...................
SN74AS802 . ..................
SN74ALS804 ..................
SN74AS804A ..................
SN74ALS805 . .................
SN74AS805A ..................
SN74ALS808 . .................
SN74AS808A .............. ' ....
SN74AS821 . ..................
SN74AS822 . ..................
SN74AS823 . ..................
SN74AS824
SN74AS825 . ..................
SN74AS826 ...................
SN74ALS832 . .................
SN74AS832A ..................
SN74ALS841 . .................
SN74AS841 . ..................
SN74ALS842 . .................
SN74AS842 . ..................
SN74ALS843
SN74AS843 . ..................
SN74ALS844 . .................
SN74AS844 ...................
SN74ALS845 . .................
SN74AS845 . ..................
SN74ALS846 . .................
.SN74AS846 ...................
SN74AS850 ...................
SN74AS851
SN74AS852 . ..................
SN74AS856 . ..................
SN74ALS857 ..................
SN74AS857 . .................
SN74AS866 ...................
SN74AS867 . ..................
SN74AS869 . ..................
SN74AS870 ...................
SN74AS871 . .......... - .......
SN74ALS873 . .................
SN74AS873 . ................ _.
SN74ALS874 : .................
SN74AS874 . ..................
SN74ALS876 . .................
SN74AS876 . ..................
SN74AS877 . ..................
SN74ALS878 . .................
2
2
2
2
2
2
2
2'
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
t:
0
",t:;
ca
E
a..
0
'tot:
ca
II..
Q)
t:
Q)
1-9
ALPHANUMERIC INDEX
Device Types
G)
CD
::l
CD
....
~
::l
-ft
....
3
Q)
r+
o
::l
SN54AS878
SN54ALS879
SN54AS879
SN54ALS880
SN54AS880
SN54AS881A
SN54AS882
SN54AS885
SN54AS888
SN54AS889
SN54AS890
SN54AS891
SN54AS897
SN54ALSiOOOA
SN54AS1000
SN54ALS1002A
SN54ALS1003A
SN54ALS1004
SN54AS1004
SN54ALS1005
SN54ALS1008A
SN54AS1008
SN54ALS1010A
SN54ALS1011A
SN54ALS1020A
SN54ALS1032A
SN54AS1032
SN54ALS1034
SN54AS1034
SN54ALS1035
SN54AS1036
SN54ALS1240
SN54ALS1241
SN54ALS1242
SN54ALS1243
SN54ALS1244A
SN54ALS1245
SN54ALS1616
SN54ALS1620
SN54ALS1621 ,
SN54ALS1622
SN54ALS1623
SN54ALS1638
SN54ALS1639
SN 54ALS 1640A
SN54ALS1641
SN54ALS1642
SN54ALS1643
SN54ALS1644
SN54ALS1645A
SN54AS2620
SN54AS2623
SN54AS2640
SN54AS2645
SN54ALS8003
1-10
Volume
SN74AS878 ...................
SN74ALS879 ........... ,. , ...
SN74AS879 ......... ..... .....
SN74ALS880 ..................
SN74AS880 ......... ..........
SN74AS881A ..................
SN74AS882
SN74AS885 .......... .........
SN74AS888 ...................
SN74AS889 ............. , .....
SN74AS890 ...................
SN74AS891 ...................
SN74AS897 , ..................
SN74ALS1000A ................
SN74AS1000 ..................
SN74ALS1002A ................
SN54ALS1003A ................
SN54ALS1004 ........ .........
SN74AS1004 ..................
SN74ALS1005 ...... ....... ....
SN74ALS1008A ... ... ...... ....
SN74AS1008 .................
SN74ALS1010A ............... .
SN74ALS1011A ................
SN74ALS1020A .................
SN74ALS1032A ...... ...... ....
SN74AS1032 ............. .....
SN74ALS1034 ........ .........
SN74AS1034 ........ ..........
SN74ALS1035 ....... ..........
SN74AS1036 ........ ...... ....
SN74ALS1240 ....... ...... ....
SN74ALS 1241 .... ......... ....
SN74ALS1242 ... ... ....... ....
SN74ALS1243 .... , ...........
SN74ALS1244A ............... .
SN74ALS1245 ............. ....
SN74ALS1616 .... ......... ....
SN74ALS1620 ................
SN74ALS1621 ................
SN74ALS1622 ......
.......
SN74ALS1623 ................ .
SN74ALS 1638 ....... ..........
SN74ALS1639 ....... ..........
SN74ALS1640A ............ ....
SN7 4ALS 1641 ............. ....
SN74ALS1642 .... .............
SN74ALS1643 ... ..............
SN74ALS1644 .... .............
SN74ALS1645A ... .............
SN74AS2620 ..... ......... ....
SN74AS2623 .................
SN74AS2640 ..................
SN74AS2645
................
SN74ALS8003 .................
'"
"
3
3
3
3
3
3
3
3
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
4
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Device Types
SN54PAL 16L8A
SN54PAL16R4A
SN54PAL16R6A
SN54PAL16R8A
SN54PAL20L8A
SN54PAL20R4A
SN54PAL20R6A
SN54PAL20R8A
SN54PALR19L8
SN54PALR19R4
SN54PALR19R6
SN54PALR19R8
SN54PALT19L8
SN54PALT19R4
SN54PALT19R6
SN54PALT19R8
SN54PL839
SN54PL840
Volume
SN74PAL 16L8A . ...............
SN74PAL 16R4A . ...............
SN74PAL 16R6A ................
SN74PAL16R8A ................
SN74PAL20L8A , ...............
SN74PAL20R4A ....... , . , ......
SN74PAL20R6A . , ..............
SN74PAL20R8A ................
SN74PALR19L8 . ...............
SN74PALR19R4 . ...............
SN74PALR19R6 . ...............
SN74PALR19R8 . ... , ...........
SN74PALT19L8 . ...............
SN74PALT19R4 . ...............
SN74PALT19R6 ................
SN74PALT19R8
SN74PL839 . ...... , ...........
SN74PL840 ...................
0.
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
SBP9901
SBP9965
SBP9966
SBP9989
. ........................... 4
............................ 4
............................ 4
............................ 4
TBP18S030
T8P18SA030
TBP24S10
TBP24SA10
TBP24S41
TBP24SA41
TBP24S81
TBP24SA81
TBP28L22
TBP28LA22
TBP28L42
TBP28S42
TBP28SA42
TBP28L45
TBP28S45
TBP28L46
TBP28S46
TBP28SA46
TBP28L85A
TBP28S85A
TBP28L86A
TBP28S86A
TBP28SA86A
TBP28L165
TBP28S165
TBP28L166
TBP28S166
............................ 4
TEXAS
INSTRUMENTS
............................ 4
............................ 4
............................
............................
............................
............................
............................
............................
...........................
...........................
......................... .
,
............................
............................
............................
............................
............................
............................
............................
............................
............................
...........................
............................
............................
...........................
............................
............................
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS

JANUARY 1984
description
SPEED-POWER RELATIONSHIPS
OF DIGITAL IC FAMILlESt
Texas Instruments transistor-transistor-Iogic (TTL)

family of high-performance bipolar digital integrated
circuits comprises seven distinct series of compatible
product Iines_ These product lines offer the digital
systems designer a full spectrum of performance
ranges in order to optimize system cost and performance_ The available choices range from the very high
performance of the Advanced Schottky-clamped t
functions for systems operating typically up to
175 megahertz to low-power functions with power
consumption of only one milliwatt per gate_
~ 30 i-54L
(!I
CJ
-;:;, 20
o
..J
E 10 f-
j.:
-,
o
Typical characteristics of the seven TTL series offered

are shown in Table I and their respective speed/power
relationships are illustrated in Figure A_
c-
c':.,
r::::
54n4H
54n4ALS STD
".;;
54n4ALS BUFFER
CO
54fl4S
E
...
54n4AS STD
CI
'+-
r::::
54n4AS BUFFER
<a
.,
>
...CO
<C
Typical Power Dissipation-mW
Q)
c:
FIGURE A
:t: Typical
saturated logic gate from the indicated families.
Q)
C!'
TABLE 1-54/74 FAMILY TYPICAL SSI PERFORMANCE CHARACTERISTICS

GATES
SERIES
54/74
54A LS/74A LS
54AS/74AS
54H/74H
FLIP-FLOPS
Speed-Power
Propagation
Power
Product
Delay Time
Dissipation
100 pJ
10 ns
10mW
4 pJ
4 ns-
15 pJ
Clock Input
Frequency
Range
de to 35 MHz
1 mW
de to 50 MHz
1.5 ns
10mW
de to 175 MHz
de to 50 MHz
132 pJ
6 ns
22mW
54L
33 pJ
33 ns
lmW
dc to 3 MHz
54 LS/74LS
19 pJ
9.5 ns
2mW
dc to 45 MHz
54S/74S
57 pJ
3 ns
19mW
de to 125 MHz
features
EASE OF SYSTEM DESIGN
Full compatibility provides choice from seven distinct performance ranges

Broad range of functions are offered in each series
Diode-clamped inputs are provided on all high-performance functio~s
Terminated,controlled-impedance lines are not normally required with TTL
Low output impedance:
Provides low a-c noise susceptibility
Drives high-capacity loads
FULL COMPATIBILITY IS DESIGNED INTO TI TTL
All series are designed for single 5-volt power supply

All series provide one-volt or greater typical doc noise margins
Power dissipation relatively insensitive to operating frequency
Switching times are guaranteed at full doc loading
Compatible with most logic families such as MOS, CMOS
t Integrated Schottky-Barrier di'ode-clamped

transistor is patented by Texas Instruments.
U.S. Patent Number 3,463,975.
TEXAS
INSTRUMENTS
1-11
54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
,54 FAMILY
74 FAMILY
SERIES 54
SERIES 54H
SERIES 74
UNIT
5.5
5.5
5.5
Interemitter voltage (see Note 2)
5.5
5.5
5.5
5.5
5.5
5.5
5.5
'06, '07
30
'16, '17, '26
15
Operating free-air temperature range
~.
Storage temperature range
Others
High-level voltage applied to a disabled 3-state output
"'3"
Q)
::J
SERIES 74S
5.5
::J
SERIES 54S
Input voltage
Off-state (high-level) voltage applied

to open-collector outputs of SSI
circuits (see Note 3)
~
SERIES 54ALS
SERIES 54AS SERIES 54LS
SERIES54LS
SERIES 74ALS
SERIES 74LS
SERIES74AS
SERIES 74LS
WITH
WITH DIODE
EMITTER
AND PNP
INPUTS
INPUTS
SERIES 74H
Supply voltage, Vee (see Note 1)
SERIES 54L
5.5
54 Family
-55 to 125
o to 70
74 Family
NOTES:
-65 to 150
"c
"c
1. Voltage values, unless otherwise noted, are with respect to network ground terminal.
2. This is the voltage between two emitters of a multiple-emitter transistor. This rating applies between inputs that go directly into
the same AND Or NAND gate in the functional block diagram.
3. Ratings for MSI parts are given on the individual date sheets.
unused inputs of positive-AND/NAND gates

For optimum switching times and minimum noise susceptibility, unused inputs of AND or NAND gates should be
maintained at a voltage greater than VOH min (see tables of electrical characteristics), but not to exceed the absolute
maximum rating. This eliminates the distributed capacitance associated with the floating input, bond wire, and package
lead, and ensures that no degradation will occur in the propagation delay times. Some possible ways of handling unused
inputs are:
a. Connect unused inputs to an independent supply voltage. Preferably, this voltage should be between VOH min and
4.5 V. Series 54LS/74LS devices with diode inputs may be connected directly to VCC ..
b. Connect unused inputs to a used input if maximum drive capability of the driving output will not be exceeded.
Each additional input presents a full load to the driving output at a high-level voltage but adds no loading at a
low-level voltage.
c. Connect unused inputs to VCC through a '-kn resistor so that if a transient that exceeds the input maximum
rating should occur, the impedance will be high enough to protect the input. One to 25 unused inputs may be
connected to each '-kn resistor. Series 54LS/74LS devices with diode inputs may be connected directly to Vcc.
d. Connect unused inputs to any fixed-high-Ievel compatible output such as the output of an inverter or NAND gate
that has its input(s) grounded. Maximum hi~h-Ievel drive capability of the output should not be exceeded.
1-12
TEXAS
INSTRUMENTS
54174 FAMILIES OF COMPATIBLE TTL CIRCUITS
input-current requirements
Input-current requirements reflect worst-case conditions over the specified recommended operating free-air temperature
and VCC ranges. The table below shows maximum input current requirements and nominal base resistor values for
standard loads in each TTL series. A standard load is defined as an Input connected to a single emitter or diode that is
associated with a pull-up resistor having the value indicated in the table. However, some inputs are tied to more than
one input transistor (or diode). or the base-resistor values of some inputs have been changed either to reduce
input-current requirements or to improve performance. Therefore, the input-current requirements may vary. Consult
the electrical characteristics table for the particular device type to determine the input-current requirements of each
input.
t:
STANDARD INPUTS (ONE LOAD)t
o
ca
'';::'
SERIES
NOMINAL VALUE OF
MAXIMUM HIGH-LEVEL
MAXIMUM LOW-LEVEL
INPUT PULL-UP RESISTOR
INPUT CURRENT
INPUT CURRENT
54/74
54A LS/74A LS
54AS/74AS
54H/74H
54L:j:
54LS/74LS+
54S/74S
E
a...
4 kn
40llA
-1.6 rnA
40 kn
20llA
-0.1 rnA
8 kn
20llA
-0.5 rnA
2.8 kn
50llA
-2 rnA
40 kn
10llA
-0.18 rnA
8kn
20llA
-0.8 rnA
18 kn
20llA
-0.4 rnA
Q)
12 kn
20llA
-0.2 rnA
C!)
2.8 kn
'to-
-ca
t:
a...
Q)
s::
-2 rnA
501lA.
tSeries 54L and 54LS174LS have two different types of inputs as shown.
Since low-level input current is primarily a function of the input base resistor, two or more inputs of the same NAND
or AND gate may be tied together and still be considered one load at a low logic level, but at a high logic level, each
input is an additional load.
Currents into input terminals are specified as positive values. Arrows on the d-c test circuits indicate the actual direction
of current flow.
drive capability
TYPICAL FAN-OUTt
LOAD DEVICE
SN74
SN74ALS
SN74AS
SN74H
SN74LS
SN74S
SN54
SN54ALS
SN54AS
SN54H
SN54LS
SN54S
Standard
10
80
80
40
Buffer
30
240
240
24
120
24
OUTPUT DEVICE
SN74/SN54
SN74A LS/SN54A LS
SN74AS/SN54AS
SN74H/SN54H
SN74LS/SN54LS
SN74S/SN54S
Standard
40
40
20
Buffer
15
120
120
12
60
12
Standard
12
100
100
10
50
10
Buffer
30
240
240
24
120
24
Standard
12
100
100
10
50
10
Buffer
37
300
300
30
150
30
Standard
40
40
20
Buffer
15
120
120
12
60
12
Standard
12
100
100
10
50
10
Buffer
37
300
300
30
150
30
tThe tables on this page provide an overview of the performance of Tl's digital logic families. The electrical characteristics of specific devices
within each family may vary. Please consult the appropriate TI data sheet or data book for complete specifications.
TEXAS
INSTRUMENTS
1-13
GLOSSARY
TTL SYMBOLS, TERMS, AND DEFINITIONS
INTRODUCTION
These symbols, terms, and definitions are in accordance with those currently agreed upon by the JEDEC Council of the
Electronic Industries Association (EIA) for use in the USA and by the International Electrotechnical Commission (lEC)
for international use.
PART I - OPERATING CONDITIONS AND CHARACTERISTICS (IN SEQUENCE BY LETTER SYMBOLS)

f max
Maximum clock frequency

The highest rate at which the clock input of a bistable circuit can be driven through its required sequence
while maintaining stable transitions of logic level at the output with input conditions established that should
cause changes of output logic level in accordance with the specification.
...
ICC
Supply current
The current into* the VCC supply terminal of an integrated circuit.
....
ICCH
Supply current, outputs high

The current into* the VCC supply terminal of an integrated circuit when all (or a specified number) of the
outputs are at the high level.
ICCl
Supply current. outputs low

The current into* the VCC supply terminal of an integrated circuit when all (or a specified number) of the
outputs are at the low level.
IIH
High-level input current

The current into* an input when a high-level voltage is applied to that input.
III
low-level input current

The current into* an input when a low-level voltage is applied to that input.
10H
High-level output current

The current into* an output with input conditions applied that, according to the product specification, will
establish a high level at the output.
10l
low-level output current

The current into* an output with input conditions applied that, according to the product specification, will
establish a low level at the output.
lOS
Short-circuit output current

The current into* an output when that output is short-circuited to ground (or other specified potential) with
input conditions applied to establish the output logic level farthest from ground potential (or other specified
potential).
10ZH
Off-state (high-impedance-state) output current (of a three-state output) with high-level voltage applied
The current flowing into* an output having three-state capability with input conditions established that,
according to the product specification, will establish the high-impedance state at the output and with a highlevel voltage applied to the output.
NOTE: This parameter is measured with other input conditions established that would cause the output to
be at a low level if it were enabled.
G)
CD
:::l
CD
:::l
...
3Q)
,...
o:::l
* Current out of a ,terminal is given as a negative value.
1-14
TEXAS
INSTRUMENTS
GLOSSARY
IOZL
Off-state (high-impedance-statel output current (of a three-state outputl with low-level voltage applied
The current flowing into an output having three-state capability with input conditions established that,
according to the product specification, will establish the high-impedance state at the output and with a lowlevel voltage applied to the output.
NOTE: This parameter is measured with other input conditions established that would cause the output to
be at a high level if it were enabled.
VIH
High-level input voltage

An input voltage within the more positive (less negative) of the two ranges of values used to represent the
binary variables.
NOTE: A minimum is specified that is the least-positive value of high-level input voltage for which operation
of t~e logic element within specification limits is guaranteed.
Input clamp voltage
An input voltage in a region of relatively low differential resistance that serves to limit the input voltage swing.
Low-level input voltage
An input voltage level within the less positive (more negative) of the two ranges of values used to represent
the binary variables.
NOTE: A maximum is specified that is the most-positive value of low-level input voltage for which operation
of the logic element within specification limits is guaranteed.
VOH
High-level output voltage

The voltage at an output terminal with input conditions applied that. according to the product specification,
will establish a high level at the output.
VOL
Low-level output voltage

The voltage at an output terminal with input conditions applied that, according to the product specification,
will establish a low level at the output.
ta
Access time
The time interval between the application of a specific input pulse and the availability of valid signals at an
output.
tdis
Disable time (of a three-state outputl

The time interval between the specified reference points on the input and output voltage waveforms. with the
three-state output changing from either of the defined active levels (high or lowl to a high-impedance (off)
state. (tdis = tpHZ or tPLZ)
ten
Enable time (of a three-state output)

The time interval between the specified reference points on the input and output voltage waveforms. with the
three-state output changing from a high-impedance (off) state to either of the defined active levels (high or
low). (ten = tpZH or tpzLI.
* Current out of
',tj
CO
...E
....oc
CO
...
Q)
Q)
C!)
a terminal Is given as a negative value.
TEXAS
115
INSTRUMENTS
POST OFFICE BOX 225012 DALLAS. TEXAS
7526~
GLOSSARY
th
Hold time
The time interval during which a signal is retained at a specified input terminal after an active transition occurs
at another specified input terminal.
The hold time is the actual time interval between two signal events and is determined by the
NOTES: 1.
system in which the digital circuit operates. A minimum value is specified that is the shortest
interval for which correct operation of the digital circuit is guaranteed.
2.
G')
CD
::l
CD
..
..3
The hold time may have a negative value in which case the minimum limit defines the longest
interval (between the release of the signal and the active transition) for which correct operation
of the digital circuit is guaranteed.
tpd
Propagation delay time

The time between the specified reference points on the input and output voltage waveforms with the output
changing from one defined level (high or low) to the other defined level. (tod = tpHL or tpLH).
tpHL
Propagation delay time. high-to-Iow-Ievel output

changing from the defined high level to the defined low level.
tpHZ
Disable time (of a three-state output) from high level

The time interval between the specified reference points on the input and output voltage waveforms with the
three-state output changing from the defined high level to a high-impedance (off) state .
tpLH
Propagation delay time. low-to-high-Ievel output

changing from the defined low level to the defined high level.
tPLZ
Disable time (of a three-state output) from low level

The time interval' between the specified reference points on the input and output voltage waveforms with the
three-state output changing from the defined low level to a high-impedance (off) state.
tpZH
Enable time (of a three-state output) to high level

three-state output changing from a high-impedance (off) state to the defined high level.
tpZL
Enable time (of a three-state output) to low level

three-state output changing from a high-impedance (off) state to the defined low level.
tsr
Sense recovery time

The time interval needed to switch a memory from a write mode to a read mode and to obtain valid data
~ignals at the output.
'
tsu
Setup time
The time interval between the application of a signal at a specified input terminal and a subsequent active
transition at another specified input terminal.
NOTES: 1.
The setup time is the actual time interval between two signal events and is determined by the
system in which the digital circuit operates. A minimum value is specified that is the shortest
interval for which correct operation of the digital circuit is guaranteed.
::l
...o
Q)
:::J
2.
The setup time may have a negative value in which case the minimum limit defines the longest
interval (between the active transition and the application of the other signal) for which correct
operation of the digital circuit is guaranteed.
Pulse duration (width)

The time interval between specified reference points on the leading and trailing edges of the pulse waveform.
'-16
TEXAs
INSTRUMENTS
GLOSSARY
PART II - CLASSIFICATION OF CIRCUIT COMPLEXITY
Gate Equivalent Circuit
A basic unit-of-measure of relative digital-circuit complexity. The number of gate equivalent circuits is that number of
individual logic gates that would have to be interconnected to perform the same function.
large-Scale Integration, lSI

A concept whereby a complete major subsystem or system function is fabricated as a single microcircuit. In this
context a major subsystem or system, whether digital or linear, is considered to be one that contains 100 or more
equivalent gates or circuitry of similar complexity .
. Medium-Scale Integration, MSI

A concept whereby a complete subsystem or system function is fabricated as a single microcircuit. The subsystem or
system is smaller than for LSI, but whether digital or linear, is considered to be one that contains 12 or more equivalent
gates or circuitry of similar complexity.
Small-Scale Integration, SSI
co
Q)
Integrated circuits of less complexity than medium-scale integration (MSI).
c:
Q)
(!)
Very-large-Scale Integration, VlSI

The description of any IC technology that is much more complex than large-scale integration (LSI), and involve~ a much
higher equivalent gate count. At this time an exact definition including a minimum gate count has not been
standardized by JEDEC or the IEEE.
, TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 DALLAS, TEXAS 75265'
1-17
EXPLANATION OF FUNCTION TABLES
The following symbols are used in function tables on TI data sheets:

H
high level (steady state)
low level (steady state)
transition from low to high level

transition from high to low level
G')
CD
::l
CD
-+
value/level or resulting value/level is routed to indicated destination
f\
value/level is reentered
Q)
irrelevant (any input, including transitions)
....,
off (high-impedance) state of a 3-state-output
a .. h
the level of steady-state inputs at inputs A through H respectively
3Q)
00
level of 0 before the indicated steady-state input conditions were established
00
complement of 00 or level of Q before the indicated steady-state input conditions were established
""t
::l
...
c)"
::l
On
..n..
Lr
TOGGLE
level of 0 before the most recent active transition indicated by {, or
one high-level pulse

one low-level pulse
each output changes to the complement of its previous level on each active transition indicated by
{, or t.
If, in the input columns, a row contains only the symbols H, L, and/or X, this means the indicated output is valid whenever the input configuration is achieved and regardless of the sequence in which it is achieved. The output persists so
long as the input configuration is maintained.
If, in the input columns, a row contains H, L, -and/or X together with t and/or {" this means the output is valid whenever the input configuration is achieved but the transition(s) must occur following the achievement of the steady-state
levels. If the output is shown as a level (H, L, 00, or 001. it persists so long as the steady-state input levels and the
levels that terminate indicated transitions are maintained. Unless otherwise indicated, input transitions in the opposite
direction to those shown have no effect at the output. (If the output is shown as a pulse,
or L.f, the pulse
follows the indicated input transition and persists for an interval dependent on the circuit.)
JL
1-18
TEXAS
INSTRUMENTS
EXPLANATION OF FUNCTION TABLES

Among the most complex function tables in this book are those of the shift registers. These embody most of the
symbols used in any of the function tables, plus more. Below is the function table of a 4-bit bidirectional universal
shift register, e.g., type SN74194.
FUNCTION TABLE
OUTPUTS
INPUTS
MODE
SERIAL
PARALLEL
Sl
SO
Oc
00
AO
QBO
b
QCO QDO
c
d
QAn
QS n QCn
QAn
QS n
QCn
QS n
QCn
QDn
QBn
QCn
QDn
CLEAR
'---
CLOCK
LEFT RIGHT
QAO
QBO
QCO QDO
The first line of the table represents a synchronous clearing of the register and says that if clear is low, all four outputs
will be reset low regardless of the other inputs. In the following lines, clear is inactive (high) and so has no effect.
The second line shows that so long as the clock input remains low (while clear is high). no other input has any effeCt
and the outputs maintain the levels they assumed before the steady-state combination of clear high and clock low was
established. Since on other lines of the table only the rising transition of the clock is shown to be active, the second line
implicitly shows that no further change in the outputs will occur while the clock remains high or on the high-to-Iow
transition of the clock.
c:
o
0';:;
CO
...E
'to-
.5
C6
...
CI)
c:
CI)
C!)
The third line of the table represents synchronous parallel loading of the register and says that if Sl and SO are both
high then, without regard to the serial input, the data entered at A will be at output OA, data entered at B will be at
0B, and so forth, following a low-to-high clock transition.
The fourth and fifth lines represent the loading of high- and low-level data, respectively, from the shift-right serial input
and the shifting of previously entered data one bit; data previously at OA is now at OB, the previous levels of OB and
Oc are now at Oc and OD respectively, and the data previously at OD is no longer in the register. This entry of serial
data and shift takes place on the lowto-high transition of the clock when Sl is low and SO is high and the levels at
inputs A through D have no effect.
The sixth and seventh lines represent the loading of high- and low-level data, respectively, from the shift-left serial input
and the shifting of previously entered data one bit; data previously at OB is now at OA, the previous levels of Oc and
OD are now at Os and OC, respectively, and the data previously at OA is no longer in the register. This entry of serial
data and shift takes place on the lowto-high transition of the clock when Sl is high and SO is low and the levels at
inputs A through D have no effect.
The last Iine shows that as long as both mode inputs are low, no other input has any effect and, as in the second line,
the outputs maintain the levels they assumed before the steady-state combination of clear high and both mode inputs
low was established.
TEXAS
INSTRUMENlS
1-19
1-20
The TTL Data- Book

Volume 1
General Information
Functional Index
Product Guide
Logic Symbols
~_M_e_c_h_a_n_ic_a_I_D_a_t_a____________~If_iII
2-1
:::J
Q.
CD
><
2-2
FUNCTIONAL INDEX
GATES AND INVERTERS
POSITIVE-NAND GATES AND INVERTERS
POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
TECHNOLOGY
DEsCRIPTION
Hex 2-lnput Gates
Hex In\terters
STD
TYPE
TIL
ALS
AS
'1004
Quadruple 2-lnput Gates
'00
'1000
Triple 3-lnput Gates
'10
'1010
Dual 4-lnput Gates
'20
'1020
8-lnput Gates
13-lnput Gates
Dual 2-lnput Gates
TECHNOLOGY
L
LS
VOLUME
'S04
'04
'30
'09
Triple 3-lnput Gates'
'15
STD
ALS
TIL
DESCRIPTION
TYP
Hex 2-lnput Gates
'S32
STD
ALS
TTL
..
LS
VOLUME
AS
LS
VOLUME
LS
VOLUME
'1032
'S02
Triple 4lnput ORINOR
POSITIVENOR GATES
'S003
TECHNOLOGY
STD
TTL
ALS
AS
TYPE
DESCRIPTION
Hex 2-lnput Gates
LS
VOLUME
STD
ALS AS
TIL
'S05
'02
'1002
1-=+--l-+=+-+--=--1~l--!....-1
'OS
'32
'133
TYPE
AS
TECHNOLOGY
TECHNOLOGY
Hex Inverters
TYPE
POSITIVEOR GATES
POSITIVE-NAND GATES AND INVERTERS WITH OPEN-COLLECTOR OUTPUTS
DESCRIPTION
DESCRIPTION
...
><
Q)
"'C
C
'27
'1005
'01 f-=-+--+-++-+~f-+---7-----I
1-=+--l-++=+-=--:~l--!....-1
'03
'1003
1-=+--l-++-+--=--1I-+-----'-7--1
Dual 4-lnput Gates
'22
1-=+----:--l-+=+-+--=--1~l--7--1
ALS
AS
LS
VOLUME
Triple 4-lnput AND/NAND
AS
LS
(.)
S
VOLUME
C
::::J
LL
'13
'1S
'61S
'24
'132
..
CURRENT SENSING GATES
A
DESCRIPTION
'11
Hex
'1011
Dual 4-lnput Gates
ALS
'19
Triple 4-lnput Positive-NAND
'OS
STD
TIL
'619
Quadruple 2-lnput Positive-NAND
'SOS
'100S
TIL
'14
Hex Inverters
Dual 4-lnput Positive-NAND
TECHNOLOGY
TYPE
TYPE
DESCRIPTION
Octal Inverters
POSITIVE-AND GATES
STD
"';:
SCHMITITRIGGER POSITIVENAND GATES AND INVERTERS

TECHNOLOGY
'12
Hex 2-lnput Gates
'260
DESCRIPTION
DualS-Input Gates
CO
c
o
'25
Dual 4-lnput Gates with Strobe
'21
DELAY ELEMENTS
'SOO
DESCRIPTION
Inverting & Non-Inverting Elements.
2INPUT NAND Buffers
Denotes available technology,

... Denotes planned new products,
A Denotes" A" suffix version available in the technology indicated,
TEXAS
INSTRUMENTS
2-3
FUNCTIONAL INDEX
GATES, EXPANDERS, BUFFERS, DRIVERS, AND TRANSCEIVERS

AND-OR-INVERT GATES
GATES, BUFFERS, DRIVERS, AND BUS TRANSCEIVERS
TECHNOLOGY
DESCRIPTION
TYPE
2Wide 4-/nput
'55
4-W,de 4-2-3-2 Input
'64
4-Wide 2-2-3-2 input
'54
4-Wide 2-lnput
'54
4-Wide 2-3-3-2 input
'54
Dual 2-Wlde 2-lnput
'51
STD
ALS
TTl
AS
WITH 3-STATE OUTPUTS
LS
VOLUME
TECHNOLOGY
DESCRIPTION
TYPE
STD
ALS
TTl
AS
LS
VOLUME
VOLUME
'241
'244
AND-DR-INVERT GATES WITH OPEN-COLLECTOR OUTPUTS
'465
Non-Inverting
Octal BufterslDrivers
'467
DESCRIPTION
'541
4-W,de 4-2-3-2-lnput
'1241'
'1244'
EXPANDABLE GATES
'231
TECHNOLOGY
DESCRIPTION
Dual 4-lnput Positive-NOR
With Strobe
4Wide AND OR
4-W,de AND-OR INVERT
"c:
::J
TYPE
STD
TTL
ALS
AS
'240
L
LS
VOLUME
Buffers/Drivers
'540
'53
2Wide AND OR-INVERT
'55
'50
'1240'
Inverting and Non-Inverting
(")
o
::s
D)
Octal Buffers/Drivers
EXPANDERS
TECHNOLOGY
DESCRIPTION
::s
c.
el)
STD
TYPE
TTL
ALS
AS
"245
VOLUME
Dual 4lnput
'60
Non-inverting
'61
'62
Hex Buffers/Drivers
BUFFER AND INTERFACE GATES WITH OPEN-COlLECTOR OUTPUTS
><
DESCRIPTIDN
Hex
TYPE
STD
'07
TTl
'17
ALS
AS
LS
'365
'367
Hex BufferslDrivers
VOLUME
'366
Inverting
TECHNOLOGY
'230
'245
Octal Transceivers
Triple 3-lnput
32-2-3-lnput AND-OR
'468
'52
Dual 2-Widc AND OR INVERT
:t.
'466
Inverting Octal
'23
'368
'125
Quad Buffers/Drivers
'126
with Independent
'425
Output Controls
'426
'35
Non-Inverting
'1035
Hex Inverter
'06
'16
'1243'
Quad 2-lnput Positive-NAND
Quad Transceivers
'38 t--+--=A-t-lf-+--+---::----i
Quad Transceivers with Storage
ContrOller and Bus Driver
'1003
'1242'
'226
'134
1 2-lnput NAND Gate

'39
Quad 2-lnput Positive-NOR
'242
Inverting
'1005
'26
'243
Quad Transceivers
'428
for 8080A System
'33 I---'--+--=A-t-lf-'-+--+----:----i
50-0HMI75-0HM LINE DRIVERS
TECHNOLOGY
BUFFERS, DRIVERS, AND BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS

DESCRIPTION
TECHNOLOGY
DESCRIPTION
STD
TTL
ALS
AS
Non-inverting
'757
A.
'760
Invertin~
'756
A.
A.
Octal
Buffers/Drivers
'763
A.
'762
A.
Non-Inverting Quad Transceivers
'759
A.
Inverting Quad Transceivers
'758
A.
Inverting and Non-Inverting

2-4
TYPE
LS
VOLUME
TYPE
Hex 2-lnput Positive-NAND
'804
Hex 2-1nput Positive-NOR

Hex 2-1nput Positive-AND
'80S
'808
Hi;X 2-liiput P05itill:-OR
'832
'128
'140
STD
TTL
ALS
AS
A
A
Denotes available tchnology_

, Denotes very low power,
TEXAS
INSTRUMENTS
FUNCTIONAL INDEX
BUFFERS, DRIVERS, TRANSCEIVERS, AND CLOCK GENERATORS
BUFFERS, CLOCK/MEMORY ORIVERS
OCTAL BI-/TRI-OIRECTIONAL BUS TRANSCEIVERS
TECHNOLOGY
DESCRIPTION
STD
TTL
TYPE
Hex 2-lnput Positive-NAND
'S05
Hex 2-lnput Positive-AND
'SOS
'832
'1004
Hex Inverter
Quad 2-lnput Positive-NAND
...
'37
'1032
'1010
Triple 3-lnput Positive-NAND

Triple 3-lnput Positive-AND
'lOll
Triple 4-lnput AND-NAND
'800
Triple 4-lnput OR-NOR
'S02
line Driver/Memory Driver
Very Low
...
...
12 mA/24 mA/4S rnA/64 rnA
'436
'437
Very Low
TYPE
TECHNOLOGY
OF
OUTPUT
TYPE
Quad with Bit Direction
3-State
'446
Controls
3-State
'449
OC
'440
OC
'441
3-State
3-State
'442
'443
'444
OC
'448
3-State
4-8it with Storage
AS
LS
VOLUME
OC
'62'
'623
CC.3-$tate
'639
3-Slate
'652
OC
....
'654
"62'
3-State
"623
CC,3-Stete
"639
3-$tate
'620
OC
'622
aC.3-$tate
'638
><
3-51818
'65'
"C
CC.3-State
'653
Q)
Slnk,lnverting Outputs
BI-/TRI-DIRECTIONAL BUS TRANSCEIVERS AND DRIVERS
Quad Tridirection
ALS
'245
3-State
DC.3-State
Power
DESCRIPTION
TYPE
'2 mA/24 mA/4S rnA/54 mA
Sink, True Outputs
'40
'1020
line Driver/Memory Driver

with Series Damping Resistor
OUTPUT
Low
A
A
'1002
'1036
'1008
Quad 2-lnput Positive-OR
OF
DESCRII'TION
'28
Quad 2-lnput Positive-AND
VOLUME
..
'1000
A
A
'1034
TECHNOLOGY
TYPE
LS
3-Stete
'34
Hex Buffer
AS
'S04
Hex 2-lnput Positive-NOR

Hex 2-lnput Positive-OR
ALS
3-State
Controller and Bus Driver for 8080A Systems
AS
ALS
LS
VOLUME
12 mA/24 mA/48 rnA/64 rnA
Power
Power
Sink,lnvertlng Outputs
Very Low
'2620
'2640
True Outputs, 3-5tate
'2623
'2645
oC
'641
CO
~
",t:;
(.)
~
3-State
3-State
"645
3-$tate
'640
::l
LL
OC
3-$ute
"640
OC
"642
3$tate
Inverting Outputs
TECHNOLOGY
Inverting Outputs, 3-5tate
"638
'643
12 mA/24 mA/48 rnA/54 rnA
OCTAL BUS TRANSCEIVERS/MOS DRIVERS
STO
TTL
"622
Sink, True Outputs
OC
Sink, True and
TYPE
"620
OC
Very Low
'226
'428
DESCRIPTION
3-Slate
DC,3-Slate
ALS
AS
LS
VOLUME
...
...
...
...
Very low
'644
3-Slate
"643
OC
'1644
OC
'647
3Slate
'648
Registered with Multiplex
True Outputs
Registered with Multiplexed
12 mA/24 mA/48 mA/64 rnA
Inverting Outputs
OC
'S49
'877
Univeraal Transceiver/
Port Controllers
'856

.. Denotes planned new products,
TEXAS
INsrRuMENTS
POST OFFICE BOX 225012 OALLAS, TEXAS 75265
2-5
FUNCTIONAL INDEX
FLIP-FLOPS
DUAL AND SINGLE FLIP-FLOPS
QUAD AND HEX FLIP-FLOPS
TECHNOLOGY
DESCRIPTION
TYPE
STD
TTL
ALS
AS
TECHNOLOGY
L
LS
VOLUME
NO, OF
DESCRIPTION
FFs
OUTPUTS TYPE
STD
TTL
ALS
AS
LS
VOLUME
VOLUME
'73
'76
'174
'78
'378
'103
Type
'171
'106
Q,
'107
Dual J-K Edge-Triggered
'108
'112
'113
'114
A.
A
A.
JK
OCTAL, 9-BIT, AND 10-BIT 0- TYPE FLIP-FLOPS

TECHNOLOGY
DESCRIPTION
A.
True Data
'101
NO, OF
BITS
Octal
'102
'73
Dual Pulse-Triggered
n
,...
o:::l
III
'72
Octal
lockout
Lockout
DualO-Type
3-5tate
'374
3-State
'574
2-5tate
'273
'74
..
A
'575
'874
3-$tate
'878
2-5tate
3-5tate
'377
Inverting
Octal
3-5tate
'564
3-5tate
'576
3-5tate
'577
Inverting with Clear
'110
3-5tate
3-$tate
Octal
'111
STD
TTL
ALS
AS
Octal
'534
3-State
'879
Inverting with Preset
Octal
3-State
'876
True
Octal
3-State
'825
Inverting
Octal
3-State
'826
9-8it
3-State
'823
A.
9-Bit
3-State
'824
A.
10-8.t
10-8.t
3-5tate
3-5tate
'821
True
Inverting
><
True
Inverting
Denotes available tchnology,

ADenotes planned new products,
2-6
TYPE
True with Enable
'104
'105
Smgle J-K with Data
:::l
C.
CD
True Data with Crear
'78
'71
Dual J-K with Data
OUTPUT
'76
'107
Single Pulse- Triggered
'276
'376
'70
"T1
t:
:::l
'175
'379
'109
Single J-K Edge-Triggered
TEXAS
INSfRUMENTS
'822
A.
A.
LS
FUNCTIONAL INDEX
LATCHES AND MULTIVIBRATORS
QUAD LATCHES
OCTAL, 9-BIT, AND 10-BIT LATCHES

TECHNOLOGY
DESCRIPTION
DuaI2-8;t
Transparent
OUTPUT
2-5tate
2State
2-State
2-5tate
TYPE
STD
TTL
ALS
AS
TECHNOLOGY
LS
VOLUME
NO, OF
BITS
'77
'375
'279
TYPE
Transparent
Oual4-8it
Transparent
STD
TTl
ALS
AS
LS
Octal
Octal
VOLUME
Inverting Transparent
Octal
'122
Dual
TYPE
STD
ALS
TTL
AS
LS
VOLUME
'268
TECHNOLOGY
Single
OUTPUT
'75
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
DESCRIPTION
DESCRIPTION
3-State
'573
'100
'116
3-State
'873
3-State
'533
3-State
'563
'580
3-5tate
'130
'422
Dual4-Bit
Inverting Transparent
'123
'423
2-lnput Multiplexed
Octal
Octal
'373
3-State
25tate
2-Stat.
3-5tate
'880
3-5tate
'604
'605
DC
3-5tate
OC
'606
'607
Addressable
Octal
2-State
'259
Multi-Mode Buffered
Octal
'41:!
True
Octal
Octal
3-State
3,State
Inverting
3,State
'846
'843
'844
9-Bit
3-State
3-State
True
10-Bit
3-State
'841
Inverting
10-Bit
3-State
'842
9-Bit
True
Inverting
...
...
...
...
...
...
...
'845
...
...
...
...
...
...
co
MONOSTABLE MULTIVIBRATORS WITH SCHMITT,TRIGGER INPUTS
c:
TECHNOLOGY
~~~ I ALSI AslLS
DESCRIPTION
TYPE
Single
'121
Dual
'221
Is
I I I
I I I
VOLUME
2
"';:;
CJ
c:
::l
LL

A Denotes "A" suffix version available in the technology indicated,
TEXAS
INSTRUMENTS
2-7
FUNCTIONAL INDEX
REGISTERS AND PROGRAMMABLE LOGIC ARRAYS

SHIFT REGISTERS
REGISTER FILES
TECHNOLOGY
TECHNOLOGY
DESCRIPTION
STD
ALS
AS
VOLUME
8 Words x 2 Bits
'322
Sign-Protected
DESCRIPTION
'299
Parallel-Out.
STD
ALS
TTL
AS
LS
VOLUME
OTHER REGISTERS
'194
'172
'170
'670
'870
'871
3-5t.t.
'323
3-5t.t.
3-State
Dual 16 Words x 4 Bits
Bidirectional
TYPE
DC
3-5tate
4 Words x 4 Bits
Parallel-In,
OUTPUT
TECHNOLOGY
Parallel-In.
X X X
Parallel Out.
DESCRIPTION
Registered
Outputs
with Storage
8-Bit Universal Shift
Quadruple Bus-Buffer
'195
I--+-+--,-+-+----,I-t--::--I
,..
'395
Senal-In
INPUTS
I----+-+--+-+--I--t---t
16
OUTPUTS
NO,
---;;16
I 'PAL16R8
..
19 Registered
.....!!......
~
Registered
Active-Low
19 Latched
Serial-Out
SHIFT REGISTERS WITH LATCHES

NO,
DESCRIPTION
OF
TECHNOLOGY
OUTPUTS
TYPE
3-51.t.
3-5t.t.
2-5tate
BITS
Serial-In, Parallel-Out
Buffered
with Output Latches
3-5t.t.
Parallel-In, SerialOut.
with Input latches
OC
OC
2-5t.t.
3-5t.t.
'671
'672
'673
'594
'595
'596
'599
'597
'589
3-5t.t.
'598
Parallel-In. Parallel-Out
with Output latches
16
'8
ALS
AS
LS
20
VOLUME
FleldProgrammable
14x32x6 logic Arrays
Parallel 1/0 Ports with
Input latches. Multiplexed

Serial Inputs
SIGN-PROTECTED REGISTERS
DESCRIPTION
SiQn-Protected Register

"'Denotes planned new products,
A Denotes" A" suffix version available in the technology- indicated,
S Denotes" S" suffix version available in the technology indicated,
2-8
TEXAS
INSTRUMENTS
:::~:::::
'PALT19L8
'PALT19R8
Registered
Active-Low
'PAL20L8
Registered
r-+-
24
I'PALR19R4
Filled-OR Arravs
Senal-In,
><
20
'PALl6R4
'PALR19LB
I--+-+--+-+--'-'--I-t---I
CD
'PALl6R6
Registered
'674
'165
VOLUME
NO
.....!!......
Parallel-In.
a.
Active-Low
Parallel Out
~
Q)
VOLUME
PROGRAMMABLE LOGIC ARRAYS

DESCRIPTION
~
(')
'396
Octal Storage Register
"c:
LS
'173
Registers
Parallel-Out
'299
Registers
'95
Parallelln,
AS
ALS
TTL
'98
'298
'398/9
Quadruple Multiplexers
'96
STD
TYPE
~
'PAL20R8
, 24
24
~
3-State
'PL839
OC
'PL840
24
FUNCTIONAL INDEX
COUNTERS
SYNCHRONOUS COUNTERS PARAllEL
DESCRIPTION
Decade
Decade Up/Down
Decade Rate
Multipler.
\-'T:-:-:Y=PE~S=TDc-T..:.:TE=C::..;:HN..:.:O=lO;:.:G:":Y~~---l
lOAD
Sync
Sync
'560
Sync
'668
Sync
'690
Sync
'692
Sync
'168
Async
'190
Async
'192
Sync
'568
Sync
'696
Sync
'698
Nl0
Set-to-9
6-81t Binary
aBit Up/Down
-Denotes
.Denotes
A Denotes
8 Denotes
LS
&
A
&
VOLUME
PARALLEL
DESCRIPTION
LOAD
NEGATIVE-EOGE TRIGGERED
TECHNOLOGY
TYPE
STD
TTL
Set-to-9
'90
Yes
'176
Yes
'196
Set-to-g
None
'290
ALS
'161
Sync
'163
Sync
'561
Sync
'669
Sync
'691
Sync
'693
Sync
'169
Asynt;
'191
Async
'193
Sync
'569
-Sync
'697
Sync
'699
Async CLR
'867
Sync CLR
'869
AS
LS
VOLUME
'68
Decade
'93
'69
B
&
..
4-81t Binary
Yes
Yes
'197
None
'293
None
Divide-by-12
Dual Decade
'177
'92
None
'390
Set-to-g
'490
None
'393
Dual 4-81t Binary
B-BIT BINARY COUNTERS WITH REGISTERS

TYPE
DESCRIPTION
OF
TECHNOLOGY
TYPE
OUTPUT
Sync
Rate Multipler.
AS
'167
4-81t Bmary
Up/Down
ALS
'160
'162
Async
4-Bit Binary
TTL
Sync
ASYNCHRONOUS COUNTERS IRIPPLE CLOCKI -
POSITIVE-EDGE TRIGGERED
A
&
A
A
&
AlS
AS
lS
VOLUME
Parallel Register
3-State
'590
Outputs
OC
2-State
'591
Parallel Register Inputs
'592
Q)
ParaliellJO
3-St.te
'593
"'C
><
l:
FREQUENCY DIVIDERS, RATE MULTIPLIERS
&
..
TECHNOLOGY
DESCRIPTION
TYPE
STD
TTl
50-to-l Frequency Divider

60-to-l Frequency Divider
60-81t Binary Rate MUltiplier.
Decade Rate Multiplier.
'56
'57
AlS
AS
lS
VOLUME
ctJ
l:
0
",t:
"
'97
'167
l:
:::s
u.
'97
N2
available technology,
planned new products,
"A" suffix version available in the technology indicated,
"8" suffix version available in the technology indicated,
TEXAS
INSTRUMENTS
2-9
FUNCTIONAL INDEX
DECODERS. ENCODERS. DATA SELECTORS/MULTIPLEXERS AND SHIFTERS

DATA SELECTORS/MULTiPlEXERS
TYPE
DESCRIPTION
OF
TYPE
OUTPUT
16 Tol
Dual STol
DECODERS/DEMULTIPLEXERS
TECHNOLOGY
STD
TTL
2-5ta1e
'150
3-51ate
'250
3-51a1e
'S50
3-51a1e
3,SI01.
'S51
2S101.
'151
2,SI01.
'152
'351
ALS
AS
TYPE
LS
VOLUME
DESCRIPTION
TECHNOLOGY
TYPE
OF
...
4To16
...
...
4-To-10 BCD-Io-Decimal
4-To-10 Excess 3-ToDecimal
4-To-10 Excess 3-Gray
3-5tate
'154
OC
'159
'42
2-$1ate
'43
'44
3-5tate
'251
3-5ta1e
2-5tate
'354
3,SI01.
'356
DC
'357
2-$tate
'153
...
latches
'355
3-5tate
'253
2,Slal.
'352
3ToS
..
DuoI2To4
Dual ,. T oA Decoders
DuaI4Tol
2-5tate
'137
2-5tate
'13S
3-51a1e
'538
2,Slal
'139
2-51ate
'155
DC
'156
3-5ta1e
'539
AS
LS
VOLUME
...
'131
3-To-8 with Address
STol
ALS
2-5tate
2,SI01.
To-Decimal
STD
TTL
OUTPUT
...
...
...
A
A
...
CODE CONVERTERS
"T1
c::
:J
Octal 2-10-1 with Storage
....
(")
2)"
::::J
Quad 2-To-' with Storage
:J
Co
CD
351ate
'353
3-5tate
'604
DC
'605
3 State
'606
DC
'607
2 State
'98
2-5tate
'298
2 State
'398
2 State
'399
2-51ate
'157
2S101.
><
'158
Quad 2Tol
6-to-' Umversal
Multiplexer
3-State
'257
3-State
'258
3 State
TECHNOLOGY
DESCRIPTION
TYPE
STD
VOLUME
TTL
6-line-BCD to 6-line Binary. Or 4line to 4-line
'184
BCD 9's/BCD 10's Converters
...
..
6-Blt-Binary to 6-Bi1 BCD Converters
'185
BCD-la-Btnary Converters
'484
Binary-to- BCD Converters
'485
PRIORITY ENCODERS/REGISTERS
TECHNOLOGY
DESCRIPTION
TYPE
STD
TTL
Full BCD
'147
Cascadable Octal
'14B
Cascadable Octal with 3-State Outputs
'348
4-81t Cascadable with Registers
'27B
ALS
AS
LS
LS
VOLUME
SHIFTERS
'857
TECHNOLOGY
DESCRIPTION
OUTPUT
TYPE
STD
TTL
4-8it Shifter
3S101.
'350
3-State
'897
ALS
AS
Parallel 16-81t
Multi-Mode
Barrel Shifter

.Denotes planned new products,
A Denotes" A" suffix version available in the technology indicated.
9 Denotes "9" suffix version available in the technology indicated,
2-10
TEXAS
INSTRUMENTS
...
VOLUME
FUNCTIONAL INDEX
DISPLAY DECODERS/DRIVERS, MEMORY/MICROPROCESSOR CONTROLLERS,

AND VOLTAGE-CONTROLLED OSCILLATORS
OPEN-COLLECTOR DISPLAY DECODERS/DRIVERS
OFF-STATE
DESCRIPTION
OUTPUT
TYPE
STD
VOLTAGE
BCD To DeCimal
BeD-To-Seven-Segment
MEMORY/MICROPROCESSOR CONTROLLERS
TECHNOLOGY
TTL
ALS
AS
LS
TYPE
DESCRIPTION
VOLUME
System Controllers For BOaOA
'428
System Controller. Universal
'482
30 V
'45
60 V
'141
System Controllers. Umversal
15 V
'145
lor For '888, '8891
7 V
'445
30 V
'46
15 V
'47
5.5 V
'48
I
I
Memory
Refresh
ContrOllers
Burst Modes
.1
'600
64K
'601
Cycle Steal,
1 4 K, 16K
Burst Modes
I 64K
'49
30 V
'246
15 V
'247
7 V
'347
Memory Mappers
7 V
'447
With Output Latches
5.5 V
'248
5_5 V
'249
LS
VOLUME
...
'891
4K. 16K
AS
...
'890
Transparent.
5.5 V
TECHNOLOGY
ALS
'602
'603
'608
Memory Cycle Controller
Memory Mappers
'612
3-State
loc
'613
I 3-State
'610
'611
loC
Multi-Mode latches (BOBOA Appllcatlonsl
'412
CLOCK GENERATOR CIRCUITS

OPEN COLLECTOR DISPLAY DECODERS/DRIVERS WITH COUNTERS/LATCH
TECHNOLOGY
TECHNOLOGY
DESCRIPTION
TYPE
BCD Counter!48It latch/BeDTo-Decimal
STD
TTL
~S
ALS
BCD Counter/4-Bit
Crystal-Controlled Oscillators
latch/BCD-To-Seven-Segment
latch/BCD- T0- Seven-Segment

Decoder/lamp Driver
'144
VOLTAGE-CONTROLLED OSCILLATORS
DESCRIPTION
No.
VCO'S
COMP'L
ENABLE
RANGE
INPUT
Rext
TYPE
SIngle
lOUT
Ves
Ves
Ves
No
Single
Ves
Ves
Ves
Ves
20
'628
Dual
No
Ves
Ves
No
60
'124
Dual
Ves
Ves
No
No
20
'626
Dual
No
No
No
No
20
'627
Dual
No
Ves
Yes
No
20
'629
20
VOLUME
><
Q)
"'C
'297
Programmable Frequency.
'292
s::::
DIviders/Digital Timers
'294
Triple 4!nput ANO/NAND Drivers
'800
Triple 4-lnput OR/NOR Dnvers
'802
veo
...
...
'124
CO
s::::
"';:::
CJ
s::::
::::J
LL
VOLUME
LS
MHz
'320
TECHNOLOGY
f max
LS
'120
Digital Phase-Lock Loop
Dual
AS
'321
'143
BCD Counter/4-Blt
ALS
'265
Logic Elements
Dual Pulse Syn.chronizers/Drivers
Decoder/Lad Driver
STD
TTL
Quadruple Complementary-Output
'142
Decoder/Driver
TYPE
DESCRIPTION
VOLUME
'624
RESULTANT DISPLAYS USING '46A, '47A, '48, '49, 'L46, 'L47, 'LS47, 'LS48, 'LS49, 'LS347
10
11
12
13
14
RESULTANT DISPLAYS USING '246, '247, '248, '249, 'LS247, 'LS248, 'LS249, 'LS447
10
11
12
13
14
RESULTANT DISPLAYS USING '143, '144
Denotes available technology.

""Denotes planned new products,
A Denotes "A" suffix version available in the technology indicated,
TEXAS
INSTRUMENTS
2-11
FUNCTIONAL INDEX
ARITHMETIC CIRCUITS, ERROR DETECTION CIRCUITS, AND PROCESSOR ELEMENTS
PARALLEl BINARY ADDERS
4-BIT GOMPARATORS
TECHNOLOGY
DESCRIPTION
STD
TYPE
ALS
TTl
AS
LS
VOLUME
'80
t-Bit Gated
'82
2-B,'
'83
B-BIT COMPARATORS
'283
DESCRIPTION
INPUTS
TECHNOLOGY
~ P>Q P>Q
OUTPUT
Dual 1Blt Carry-Save
AS
LS
ACCUMULATORS, ARITHMETIC LOGIC UNITS,
OC
LOOKAHEAD GARRY GENERATORS
2$lale
20 kll
OC
'522
2 State
'682
OC
'683
No
Pull Up
OC
TECHNOLOGY
DESCRIPTION
2 State
III
AlS
AS
lS
VOLUME
'681
'684
'181
4-811 Arithmetic Logic Units'
686
2 State
STD
'281
4Bit Parallel Binary Accumulators
'521
No
'685
No
TYPE
TTl
'519
2 State
Standard
'183
VOLUME
ALS
ENABLE
'381
Function Generators
'687
4-Bit Arithmetic Logic Unit
'382
with Ripple Carry

'689
OC
"T1
C
(')
328
'882
"
Quad Serial Adder/Subtractor
'385
4-8it Slice Elements
'481
AOORESS COMPARATORS
8-Blt Slice Elements
!.
OESCRIPTION
OUTPUT
LATCHED
ENABLE
OUTPUT
Yes
16-8it to 4-81t
:::J
0CD
Yes
Yes
1281t to 4-811
TECHNOLOGY
TYPE
ALS
AS
'888
'889
VOLUME
MULTiPliERS
'677
'678
TECHNOLOGY
'679
Yes
DESCRIPTION
'680
TYPE
PARITY GENERATORS/CHECKERS,
STD
TTl
ALS
AS
LS
VOLUME
'180
25-MHz 6-Bit Binary Rate Multipliers
'280
OC
Detection/Correction
Circuits
'97
881t x 1-81t 2's Complement Multipliers
'384
16
'630
OC
3-State
16
'631
32
'632
OC
32
'633
3-Slale
32
'634
OC
32
'635
VOLUME
"616'"
TECHNOLOGY
'637
3-State
OTHER ARITHMETIC OPERATORS
'636
3-State
Parallel Error
'285
'167
4
4.
'286
'284
25-MHz Decade Rate Multipliers

16-81t Parallel Multiplier
Odd/Even Parity
Generators/Checkers
lS
'274
TECHNOLOGY
TYPE
AS
'261
ERROR DETECTION AND CORRECTION CIRCUITS
OF
BITS
AlS
TTl
2-Bit-by-4Blt Parallel Bmery Multipliers
DESCRIPTION
STD
)C
NO,
4
4
'282
Generators
866
P ann Q
r+
'182
look-Ahead Carry 116-8,'
'885
:::J
o
:::J
'881
2 State
DESCRIPTION
TYPE
STD
TTL
Quad 2-lnput ExclusiveOR

Gates with Totem-Pole
...
...
'86
AlS
AS
. .
l
lS
VOLUME
'386
Outputs
Ouad 2-lnput Exclusive-OR
...
Gates with Open-Collector
'136
Outputs
FUSEPROGRAMMABLE COMPARATORS
Quad 2-lnput Exclusive-
NOR Gales
TECHNOLOGY
DESCRIPTION
TYPE
16-8il Identity Comparator
'526
128il identity Comparator
'528
4
4
'527
8Bit Identity Comparator
and 4-Bit Comparator
STD
TTl
ALS
AS
LS
VOLUME
Quad Exclusive OR/NOR

Gates
4-B;t True/Complement,
Element
'266
'135
'S7
BIPOLAR BIT-SLICE PROCESSOR ELEMENTS

CASCADABlE
DESCRIPTION
TO
TECHNOLOGY
TYPE
N-BITS
Denotes available tchnology,

"'Denotes planned miw products.
2-12
TEXAS
INSTRUMENlS
POST OFFICE BOX 225012
DALLAS, TEXAS 75265
AlS
AS
Yes
'481
Ves
'888
Yes
'889
LS
VOLUME
FUNCTIONAL INDEX
MEMORIES
USER-PROGRAMMABLE READ-ONLY MEMORIES IPROM'sl
STANDARD PROM's
DESCRIPTION
16KBit Arrays
8K-Bit Arrays
TYPE
ORGANIZATION
... TBP28S165
2048W x 88
T8P28S166
2048W x 88
T8P24S81
2048W x 48
3-State
3-5tate
3-5tate
T8P24SA81
2048W x 48
DC
T8P28S86A
1024W x 88
3-5tate
TBP28SA86A
1024W , 88
DC
1024W x 88
3-5tate
3-5tate
... T8P28S85A
4K-Blt Arrays
T8P28S42
512W x 88
TBP28SA42
25681t Arrays
OUTPUT
512W x 88
OC
... T8P28S45
512W x 88
T8P28S46
512W x 88
3-5tate
3-5tate
T8P28SA46
lK-Blt Arrays
READ-ONLY MEMORIES (ROM'sl

TYPE
512W x 88
TBP24S41
1024W )( 49
T8P24SA41
1024W x 48
VOLUME
T8P24S10
256W x 48
DC
3-5tate
256W x 48
DC
TBP18S030
32W x 88
3-5tate
TBP18SA030
32W x 88
DC
OF
TYPE
OUTPUT
256
102481t Arrays
25681t Arrays
DC
'187
32 x 8
DC
'88
~~~ IALS IAS IS

I
I
I
A I
I
I
VOLUME
RANDOM-ACCESS READ-WRITE MEMORIES (RAM'sl

TECHNOLOGY
ORGANIZATION
OF
STD
OUTPUT
TTL
64-Blt Arravs
16-81t Multiple-port
AlS
AS
lS
201
256-811 Arravs
DC
3State
TBP24SAlO
TECHNOLOGY
TYPE
ORGANIZATION
DESI;:RIPTION
3 Stale
189
3 State
'219
OC
'289
OC
'319
OC
-'70
8 2
Register File
lOW-POWER PROM's
DESCRIPTION
16K-Bit Arrays
BK81t Arrays
TYPE
ORGANIZATION
2048W x 88
3-5tate
... T8P28L 166
2048W x 88
... T8P28L85A
1024W x 88
T8P28L86A
1024W x 88
3-5tate
3-5tate
3-5tate
512W x 88
3-State
4K-81t Arrays
2K-Blt Arrays
OUTPUT
... T8P28L45
512W x 88
T8P28L46
512W x 88
T8P28L22
256W x 88
3-State
3-5tate
3-5tate
T8P28LA22
256W x 88
DC
Q)
"'C
16><4
TYPE
... TBP28L165
T8P28L42
><
3 State
VOLUME
Register Files
t:
FIRST-IN FIRST-OUT MEMORIES (FIFO'SI
DESCRIPTION
AlS
Asynchronous 16)( 5
AS
LS
VOLUME
3 State
3State
Asynchronous 16 )( 4
3 State
OC
OC

.... Denotes planned new products_
A Denotes "A" suffix version available in the technology indicated_
TEXAS
INSfRUMENTS
DALLAS, TEXAS 75265
2-13
."
t:
::s
(')
r+
o
::s
eL
::s
c..
CD
><
2-14
The TTL Data Book

Volume 1
General Information
Functional Index
Product Guide
Logic Symbols
Mechanical Data
3-1
""CJ
""'I
o
C.
c::
n
....
3-2
PRODUCT GUIDE
typical performance
00
TYPE
'00
'ALSOOA
'ASOO
'HOO
'LOO
'LSOO
'SOO
QUADRUPLE
2INPUT
POSITlVENAND
GATES
SN5400 (J,FH)
POWER
10mW
1.25mW
8mW
22mW
1 mW
2mW
19mW
logic symbol t
OELAY
10 ns
3.5 ns
3 ns
6ns
33 ns
9.5 ns
3 ns
SN7400 (J,N)
SN54ALSOOA (J,FH)
SN74ALSOOA (N,FN)
SN54ASOO (J,FH)
SN74ASOO (N,FN)
SN54HOO (J)
SN74HOO (J,N)
pin assignments
&
~1Y
1B~
2A~
2B~
3A~
3B~
4A~
4B~
J, N PACKAGES
1A
18
1Y
2A
28
2Y
GND
1
2
3
~2V
~3V
5
6
7
3Y
3A
38
4Y
4A
48
6
9
10
11
12
13
14
Vee
~4V
FH, FN PACKAGES
11 nc
1 nc
2 1A
12 3Y
13 3A
3 18
4 1Y
14 38
5 nc
15 nc
6 2A
16 4Y
7 nc
17 nc
28
16 4A
8
9 2Y
19 48
10 GND 20 Vee
positive logic: Y=AB
SN54LOO (J)
SN54LSOO (J,FH)
1A-1!L.
SN74LSOO (J,N,FN)
SN54S00 (J,FH)
SN74S00 (J,N,FN)
01
typical performance
TYPE
QUADRUPLE
2INPUT
POSITIVENAND
GATES WITH
OPEN-COLLECTOR
OUTPUTS
POWER
logic symbol, '01, 'ALS01, 'LSOl t

DELAY
'01
10mW
22 ns
'ALSOl
1.28mW
16 ns
'HOl
22mW
8 lis
'LSOl
2mW
16 ns
1A~
1B~
2A~
2B~
&
~~lV
~2V
3A......!!L
SN7401 (J,N)
3B..J!L
SN54ALSOl (J,FH)
SN74ALSOl (N,FN)
SN54HOl (J)
SN74HOl (J,N)
4A.....!!.!!....
(12)
4B-
SN54LSOl (J,FH)
SN74LSOl (J,N,FN)
SN5401 (J,FH)
~3V
pin assignments, '01, 'ALS01, 'LSOl

J, N PACKAGES
1
2
3
4
5
6
7
lY
1A
18
2Y
2A
28
GND
3A
38
3Y
4A
48
4Y
8
9
10
11
12
13
14
Vee
~4V
logic symbol, 'HOl t

&
lA-1!L.
lB~
2A~
2B~
3A..J!L
3B.....!!.!L
4A......!.!&..
pin assignments, 'HOl
~~1Y
J, N PACKAGES
~2V
1
2
3
4
5
~3V
1A
18
1Y
2A
28
2Y
GND
3Y
3A
38
4Y
4A
48
8
9
10
11
12
13
14
Vee
~4V
4B~
FH. FN PACKAGES
1 nc
11 nc
2 lY
12 3A
13 38
3 lA
4 18
14 3Y
15 nc
5 nc
6 2Y
16 4A
7 nc
17 nc
8
2A
18 48
9
28
19 4Y
10 GND 20 Vee
FH, FN PACKAGES
1 nc
11 nc
2 1A
12 3Y
3 18
13 3A
'4 1Y
14 38
15 nc
5 nc
16 4Y
6
2A
7 nc
17 nc
6 28
16 4A
19 48
9
2Y
10 GND 20 Vee
(.)
:::J
"'C
o
:10..
a..
positive logic: Y =AB
02
QUADRUPLE
2INPUT
POSITIVENOR
GATES
typical performance
TYPE
POWER
DELAY
'02
14mW
10ns
'ALS02
1.89mW
5.5 ns
'AS02
12mW
3 ns
'L02
1.5mW
33 ns
'LS02
2.75 mW
10 ns
'S02
29mW
3.5 ns
logic symbol t
1A~
1B~
2A~
2B~
3A......!!L
SN5402 (J,FH)
SN7402 (J,N)
SN54ALS02 (J,FH)
SN74ALS02 (N,FN)
3B..J!L
SN74AS02 (N,FN)
4A.....!!.!!....
SN54AS02 (J,FH)
;;>1
SN54L02 (J)
4B......!.!&..
SN54LS02 (J,FH)
SN74LS02 (J,N,FN)
SN54S02 (J,FH)
SN74S02 (J,N,FN)
~lV
pin assignments
J, N PACKAGES
~2V
~3V
~4V
positive logic: Y='A'+!3
1
2
3
4
5
6
7
1Y
lA
18
2Y
2A
28
GND
6
9
10
11
12
13
14
3A
38
3Y
4A
48
4Y
Vee
FH, FN PACKAGES
1 nc
11 nc
12 3A
2 lY
13 38
3 lA
14 3Y
4 18
15 nc
5 nc
6 2Y
16 4A
7 nc
17 nc
18 48
8 2A
19 4Y
9 28
10 GND 20 Vec
t Pin numbers shown on logic symbols are for J and N packages only.
nc - no internal connection
TEXAS
INSTRUMENTS
3-3
PRODUCT GUIDE
03
logic symbol t
typical performance
TYPE POWER DELAY

QUADRUPLE
10mW
22 ns
2INPUT
'03
POSITIVENAND
16 ns
'ALS03A 1.28mW
GATES WITH
1mW
46ns
'L03
OPEN-COLLECTOR
16 ns
2mW
'LS03
OUTPUTS
16 ns
17.SmW
'S03
SN5403 (J,FH)
SN54ALS03A (J,FH)
SN54L03 (J)
SN54LS03 (J,FH)
SN54S03 (J,FH)
04
POWER
'04
DELAY
10mW
10 ns
1.27mW
3.S ns
AS04
7.4mW
3 ns
'H04
22mW
6 ns
2A-EL
3A~
~3Y
~4~
4A~
1mW
33 ns
5A.J.!!L
'LS04
2mW
9.S ns
6A--..!.EL
19mW
3 ns
~5Y
~6Y
SN74ALS04A (N,FN)
SNS4AS04 (J,FH)
SN74AS04 (N,FN)
SNS4H04 (J)
SN74H04 (J,N)
:,.'
SN74S04 (J,N,FN)
G)
05
HEX INVERTERS
WITH OPEN \
COLLECTOR
OUTPUTS
TYPE
'05
POWER
'AL505A
'HOS
'L50S
'50S
10mW
1.27mW
13.5 n.
2A-EL
22mW
2mW
8 n.
16n.
3A~
17.5 mW
S ns
4A--l!L
p:....J!!.4Y
5A-i!!L
~5Y
6A.....!J1L
~6Y
~2Y
~3Y
positive logic: Y=A
SNS4ALSOSA (J,FH)
SN74ALSOSA (N,FN)
SNS4HOS (J)
SN74H05 (J,N)
SNS4LSOS (J,FH)
SN74LS05 (J,N,FN)
SNS4S05 (J,FH)
SN74S05 (J,N,FN)
t Pin 'numbers shown on logic symbols are for J and N packages only,
nc - no Internal connection.
3-4
3Y
3
4
18
13
3A
4Y
lY
14
38
28
12
4A
nc
15
nc
2Y
13
4B
2A
16
4Y
GND
14
Vee
7
8
nc
2B
17
18
nc
4A
9
10
2Y
19
48
GND
20
Vee
J, N PACKAGES
FH. FN PACKAGES
lA
4Y
nc
11
nc
lY
2A
9
10
4A
lA
12
4Y
5Y
13
11
12
5A
3
4
1Y
2Y
3A
2A
14
5Y
6Y
nc
15
3Y
13
6A
2Y
16
GND
14
Vee
6
7
no
5A,
no
17
nc
3A
18
6Y
3Y
19
6A
GND
20
Vce
3
4
5
10
4A
pin assignments
1A....J1L.
SN7405 (J,N)
12
38
2A
O~1Y
DELAY
24 n.
SNS40S (J,FH)
lA
3
4
logic symbol t
typical performance
SN74LS04 (J,N,FN)
FH, FN PACKAGES
1 nc
11 nc
3A
SNS4L04 (J)
SNS4LS04 (J,FH)
3Y
9
10
11
.j\
'7
SNS4S04 (J,FH)
positive logic: yeA
SN7404 (J,N)
SNS4ALS04A (J,FH)
lA
18
lY
pin assignments
~1Y
~2Y
1A....J1L.
'L04
J, N PACKAGES
1
2
~4Y
4B~
logic symbol t
Co
c:CD
~3Y
positive logic: Y"AB
TYPE
SNS404 (J,FH)
c::
~2Y
SN74LS03 (J~N,FN)
SN74S03 (J,N,FN)
'S04
c::
n
r+
2A~
2B~
3A~
3B~
4A...JgL
'ALS04A
..."'0
o
O~1Y
1B-'&-
SN7403 (J,N)
SN74ALS03A (N,FN)
typical performance
HEX
INVERTERS
pin assignments
&
1A....J1L.
TEXAS
INSTRUMENTS
J. N PACKAGES
FH. FN PACKAGES
lA
4Y
11
nc
1Y
4A
4Y
2A
2 ,1A
lY
3
12
9
10
5Y
SY
nc
13
4A
2Y
11
5A
2A
14
5
6
3A
12
3Y
5
6
nc
2Y
15
16
no
SA
GND
13
14
6Y
6A
Vce
no
17
no
3A
18
6Y
3Y
19
6A
GND
20
Vce
10
PRODUCT GUIDE
06
logic symbol t
HEX INVERTER BUFFER/DRIVERS

WITH OPEN-COLLECTOR HIGH
VOLTAGE OUTPUTS
1A...J.!L.
2A-EL.
HIGH
LOW
TYPICAL
LEVEL
LEVEL
OUTPUT
OUTPUT
~3Y
4AJL.
:=:.......!!!..4Y
POWER
5A-1!!L
~5Y
PER
VOLTAGE
CURRENT
6A..J.E.L
~6Y
TYPICAL
DELAY
TIME
GATE
SN54'
30V
30mA
12.5 ns
26mW
SN74'
30V
40mA
12.5 ns
26mW
J, N PACKAGES
1
2
3
4
5
6
7
lA
lY
2A
2Y
3A
3Y
GNO
8
9
10
11
12
13
14
4Y
4A
5Y
5A
6Y
6A
Vee
positive logic: Y=A
1
2
3
4
5
6
7
8
9
10
FH PACKAGE
11 nc
nc
12 4Y
lA
13 4A
lY
14 5Y
2A
15 nc
nc
16 5A
2Y
nc
17 nc
18 6Y
3A
19 6A
3Y
GND 20 Vee
1
2
3
4
5
6
7
8
9
10
FH PACKAGE
nc
11 nc
lA
12 4Y
lY
13 4A
2A
14 5Y
nc
15 nc
2Y
16 5A
nc
17 nc
3A
18 6Y
19 6A
3Y
GND 20 Vee
SN7406 (J,N)
SN5406 (J,FH)
07
logic symbol t
HEX BUFFERS/DRIVERS WITH OPEN

COLLECTOR HIGHVOLTAGE OUTPUTS
1A...J.!L.
HIGH
LOW
TYPICAL
pin assignments
3A~
Q~1V
~2Y
~3Y
4A.......!!L
r---ill4Y
5A..J!.!L
~5Y
6A...i!!L
~6Y
!>
2A-EL.
typical performance
TYPICAL
LEVEL
LEVEL
OUTPUT
OUTPUT
VOLTAGE
CURRENT
SN54'
30 V
30 rnA
13 ns
21 mW
SN74'
30V
40mA
13 ns
21 mW
TYPE
Q~1V
~2Y
3A~
typical performance
TYPE
pin assignments
!>
POWER
DELAY
PER
TIME
GATE
J, N PACKAGES
1
2
3
4
5
6
7
lA
lY
2A
2Y
3A
3Y
GND
8
9
10
11
12
13
14
4Y
4A
5Y
5A
6Y
6A
Vee
positive logic: yeA
SN7407 (J,N)
SN5407 (J,FH)
Q)
"'C
"S
(!)
....
(.)
logic symbol t
08
QUADRUPLE
2INPUT
POSITIVEAND
GATES
TYPE
'08
'ALS08
POWER
DELAY
19mW
15 ns
2.19mW
6.5 ns
AS08
13mW
4 ns
'LS08
4.25 mW
12 ns
32mW
4.75 ns
'SOB
SN5408 (J,FH)
SN7408 (J,N)
SN54ALSOB (J,FH)
SN74ALSOB (N,FN)
SN54AS08 (J,FH)
SN74AS08 (N,FN)
SN54LS08 (J,FH)
SN74LSOB (J,N,FN)
SN54S08 (J,FH)
SN74SOB (J,N,FN)
1A...J.!L.
::s
pin assignments
&
1B-.J&...
2A-ill--
2B~
3A~
3B~
~lY
~2Y
r---ill3Y
4A....JEL.
4B~
r--J!!l4Y
J, N PACKAGES
1
2
3
4
5
8
7
lA
18
lY
21.
28
2Y
GND
8
9
10
11
12
13
14
3Y
3A
38
4Y
41.
48
Vee
FH, FN PACKAGES
1 nc
11 nc
2 II.
12 3Y
3 18
13 31.
4 lY
14 38
5 nc
15 nc
6 21.
16 4Y
7 nc
17 nc
18 41.
8 28
9 2Y
19 48
10 GND 20 Vee
"'C
...
0..
r Pin numbers shown on logic symbols are for J and N packages only.
nc - no internal connection.
TEXAS
INSTRUMENTS
POST OFFICE 80X 225012 DALLAS, TEXAS 75265
3-5
PRODUCT GUIDE
09
QUADRUPLE
2INPUT
POSITlVEAND
GATES WITH
OPEN-COLLECTOR
OUTPUTS
SN5409 (J,FH)
SN54ALS09 (J,FH)
SN54LS09 (J,FH)
SN54S09 (J,FH)
logic symbol t
typical performance
TYPE
'09
POWER
DELAY
1A-1!L
19.4mW 18,5 ns
1B---EL.
'ALS09 2,22 mW
15 ns
4,25 mW
20 ns
'LS09
'S09
6,5 ns
32mW
pin assignments
&
2A---.!!L
~2Y
2B~
3A~
~3Y
3B~
SN7409 (J,N)
SN74ALS09 (N,FN)
SN74LS09 (J,N,FN)
SN74S09 (J,N,FN)
Q~1Y
4A....illL
1A
3Y
nc
11
nc
18
3A
1A
12
3Y
1Y
10
38
18
13
3B
3A
2A
11
4Y
1Y
14
28
12
4A
nc
15
nc
2Y
13
48
2A
16
4Y
GND
14
VeC
~4Y
4B~
FH, FN PACKAGES
J, N PACKAGES
1
2
nc
17
nc
2B
18
4A
2Y
19
4B
GND
20
vcc
10
10
TRIPLE 3INPUT
POSITIVENAND
GATES
logic symbol t
typical performance
TYPE
'10
POWER
. DELAY
10mW
10 ns
1.27mW
7ns
'AS10
8mW
3 ns
'Hl0
22mW
6 ns
'Ll0
1 mW
33 ns
'LS10
2mW
9.5 ns
19mW
3 ns
'ALS10
SN5410 (J,FH)
SN7410 (J,N)
1C~
2A~
2B~
2C~
3A~
3B~
SN54ALS10 (J,FH)
SN74ALS10 (N,FN)
3C....ll!!....
SN54AS10 (J,FH)
SN74AS10 (N,FN)
SN54H10 (J)
SN74H 1 0 (J,N)
'S10
pin assignments
1A~
1B~
&
FH, FN PACKAGES
J, N PACKAGES
~1Y
~2Y
nc
11
nc
18
3A
1A
12
3Y
2A
10
38
18
13
3A
28
11
3C
2A
14
38
2C
2Y
12
1Y
nc
15
nc
13
lC
28
16
3C
GND
14
VCC
nc
lA
3Y
~3Y
nc
17
2C
18
2Y
19
1C
GND
20
VCC
10
lY
positive logic: Y=ABC
SN54L10 (J)
"'C
o"'"
Co
c
(')
,....
SN54LS10 (J,FH)
SN74LS10 (J,N,FN)
SN54S10 (J,FH)
SN74S10 (J,N,FN)
11
G')
TRIPLE 3INPUT
POSITIVEAND
GATES
c:
CD
logic symbol t
typical performance
TYPE
POWER
OELAY
'ALSll
2.17mW
9ns
'AS"
13mW
4 ns
'Hl1
40mW
8.2 ns
4.25 mW
12 ns
31 mW
4.75 ns
'LS11
'Sll
SN54ALSll (J,FH)
SN54AS11 (J,FH)
SN54Hl1 (J)
SN54LS11 (J,FH)
SN54S11 (J ,F H)
SN74ALSll (N,FN)
SN74ASll (N,FN)
SN74Hl1 (J,N)
SN74LS11 (J,N,FN)
SN74S11 (J,N,FN)
1A~
1B~
pin assignments
J, N PACKAGES
&
1C~
2A~
2B~
2C~
3A~
3B~
3C~
~1Y
~2Y
3-6
1A
3Y
nc
11
nc
18
3A
1A
12
3Y
3A
2A
10
38
18
13
28
11
3C
2A
14
38
2C
12
lY
nc
15
nc
2Y
13
1C
28
16
3C
GND
14
VCC
nc
17
nc
2C
18
~3Y
positive logic: Y = ABC
Pin numbers shown on logic symbols are for J and N packages only,
nc -
FH, FN PACKAGES
no internal connection.
TEXAS
INSfRUMENTS
10
1Y
2Y
19
1C
GND
20
VCC
PRODUCT GUIDE
logic symbol t
typical performance
12
TYPE
POWER
TRIPLE 3-INPUT
POSITIVE-NAND
GATES WITH
OPEN-COLLECTOR
OUTPUTS
'ALS12 1.27 mW 17.5 ns
SN5412 (J,FH)
SN54ALS12 (J,FH)
SN54LS12 (J,FH)
SN7412 (J,N)
SN74ALS12 (N,FN)
SN74LS12 (J,N,FN)
'12
'LS12
16 ns
2mW
&
J. N PACKAGES
Q~1Y
lB~
lC~
2A~
2B~
2C~
3A~
3B~
3C~
22 ns
10mW
pin assignments
lA~
DELAY
~2Y
1A
FH. FN PACKAGES
11
nc
18
3A
1A
12
3Y
2A
10
38
18
13
3A
28
11
3C
2A
14
3B
3Y
nc
2C
12
1Y
nc
15
nc
2Y
13
1C
28
16
3C
GND
14
Vec
nc
~3Y
nc
17
2C
18
2Y
19
1C
GND
20
VCC
10
1Y
13
typical performance
logic symbol t
DUAL 4-INPUT
POSITIVE-NAND
SCHMITT
TRIGGERS
ITYPE 1HYSTERESIS IDELAY
lA--1!L
1 '13
lB~
I'Ls131
SN5413 (J,FH)
SN54LS13 (J,FH)
0.8 V
0.8 V
116.5ns
116.5 ns I
pin assignments
&.0'
(4)
lC~
lD~
SN7413 (J,N)
SN74LS13 (J,N,FN)
2A~~--------~
2B~
~2Y
2C.JgL
2D~
FH. FN PACKAGES
J. N PACKAGES
~lY
1A
2Y
nc
11
nc
1B
2A
1A
12
2Y
nc
10
2B
18
13
1C
11
nc
nc
14
2B
1D
12
2C
nc
15
nc
1Y
13
2D
1C
16
nc
GND
14
Vce
nc
17
nc
1D
18
2C
1Y
19
2D
GND
20
VCC
10
2A
'-----------'
positive logic: Y = ABCD
logic symbol t
14
typical performance
HEX
ITYPE IHYSTERESIS IDELAYI
SCHMITT-
0.8 V
115ns
TRIGGER
l'LS141
0.8V
1 15ns 1
INVERTERS
SN5414 (J,FH)
SN54LS14 (J,FH)
'14
SN7414 (J,N)
SN74LS14 (J,N,FNI
lA---1!.L-------=lT~----~1Y
2A~
~2Y
3A~
~3Y
4A~
~4Y
~5Y
~6Y
5A-.!!.!.!.....
6A~
positive logic: Y =
.....(.)
pin assignments
:J
J, N PACKAGES
1
1A
FH. FN PACKAGES
4Y
11
nc
1Y
4A
1A
12
4Y
2A
10
5Y
1Y
13
4A
5A
nc
2Y
11
2A
14
5Y
3A
12
6Y
nc
15
nc
3Y
13
6A
2Y
16
5A
GND
14
Vec
nc
17
nc
8
9
10
3A
18
"C
o
a...
a..
6Y
3Y
19
6A
GND
20
VCC
Pin numbers shown on logic symbols are for J and N packages only.
TEXAS
INSTRUMENTS
3-7
PRODUCT GUIDE
15
logic symbol t
typical performance
TRIPLE 3INPUT
POSITIVEAND
GATES WITH
OPENCOLLECTOR
, OUTPUTS
TYPE
POWER
DELAY
lA--l.!L
15 ns
lB...EL
1C~
2A~
2B~
2C~
3A~
3B~
'ALS15 2.22 mW
'H15
38mW
10.5 ns
'LS15
4.25 mW
15 ns
'S15
28mW
15 ns
SN54ALS15 (J,FH)
SN54H15 (J)
SN74ALS15 (N,FN)
SN54LS15 (J,FH)
SN54S15 (J,FH)
SN74LS15 (J,N,FN)
SN74S15 (J,N,FN)
SN74H15 (J,N)
pin assignments
&
Q~1Y
~2Y
1
2
3
4
5
6
7
J. N PACKAGES
1A
8 3Y
1B
2A
2B
2C
2Y .
GND
3A
3B
3C
1Y
1C
VCC
9
10
11
12
13
14
~3Y
3C..J!.!!....
16
logic symbol t
HEX INVERTER BUFFER/DRIVERS WITH

OPEN-COLLECTOR HIGHVOLTAGE OUTPUTS
typical performance
1A.......!!.L.
SN74'
HIGH
LEVEL
OUTPUT
VOLTAGE
15 V'
SN54'
15V
TYPE
SN5416 (J)
LOW
LEVEL
OUTPUT
CURRENT
40mA
30mA
TYPICAL
DELAY
TIME
12.5 ns
12.5 ns
TYPICAL
POWER
PER
GATE
26mW
26mW
pin assignments
C>
2A~
3A~
4A~
Q~1Y
::::-'~2Y
~3Y
5A..J.!.!L
~4Y
~5Y
6A~
::::.....!.!!!.6Y
J. N PACKAGES
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
SA
6Y
6A
VCC
8
9
10
11
12
13
14
positive logic: Y=A
SN7416 (J,N)
"tJ
""o
c..
c:
(')
r+
17
logic symbol t
HEX BUFFERS/DRIVERS WITH OPEN

COLLECTOR HIGH-VOL TAGE OUTPUTS
1A.......!!.L.
typical performance
HIGH
LEVEL
TYPE
SN74'
SN54'
OUTPUT
VOLTAGE
15V
15V
SN5417 (J)
LOW
LEVEL
OUTPUT
CURRENT
40mA
30mA
TYPICAL
DELAY
TIME
13 ns
13 ns
TYPICAL
POWER
PER
GATE
21 mW
21 mW
pin assignments
C>
2A~
3A~
4A~
5A..J.!.!L
6A..JEL
Q~1Y
~2Y
~3Y
~4Y
~5Y
~6Y
J. N PACKAGES
1A
8 4Y
1
2
3
4
5
6
7
1Y
2A
2Y
3A
3Y
GND
positive logic: Y=A
SN7417 (J,N)
nc - rio internal connection.
3-8
TEXAS
INSTRUMENTS
9
10
11
12
13
14
4A
5Y
SA
6Y
6A
VCC
FH. FN PACKAGES
1 nc
11 nc
12 3Y
2 1A
13 3A
3 1B
4 2A
14 3B
15 nc
5 nc
16 3C
6 2B
17 nc
7 nc
18 1Y
8 2C
19 1C
9 2Y
10 GND 20 VCC
PRODUCT GUIDE
logic symbol t
18
typical performance
SCHMITTTRIGGER
I TYPE HYSTERESISIDELAY
1 1A..J1L
POSITIVENAND
I'LS18
0.7V
11B...BL
I 25n5
pin assignments
~lY
lC~
GATES WITH TOTEM

POLE OUTPUTS
J, N PACKAGES
8
2Y
lA
18
9 2A
10 28
3 nc
11
nc
4
lC
5
10
12 ' 2C
13 20
6
lY
7 GND 14 VCC
&IJ
10~
SN54LS18 (J,FH)
SN74LS18 (J,N,FN)
2A..J2L
2B.J!&..
FH, FN PACKAGES
nc
11
lA
12
2Y
18
13
2A
nc
nc
14
28
15
lC
16
7
8
nc
10
17
18
nc
nc
nc
lY
19
2C
20
10
GND
20
vcc
~2Y
2C....!.!&..
nc
20....!!!L
positive logic: Y =ABCD
I
19
logic symbol t
typical 'performance
SCHMITTTRIGGER
I TYPE I HYSTERESIS I DELAY 1 1A...J!L
INVERTERS WITH
I'LS191
0.7 V
I 16n5
TOTEMPOLE
OUTPUTS
SN54LS19 (J,FH)
pin assignments
.IT
12A~
3A~
4A~
1
2
3
~3Y
~4Y
~5Y
~6Y
5A.....!!.!L
SN74LS19 (J,N,FN)
::-E.L 1Y
::::::....ill. 2Y
6A..J!.....
4
5
6
7
positive logic: Y=A
20
TYPE
'20
POWER
'ALS20A
1.29mW
10mW
'AS20
8mW
'H2O
22mW
'L20
lmW
'LS20
'S20
DELAY
2mW
19mW
lA-l!.L
ns
ns
ns
ns
ns
ns
lB......!&.-
lC~
10~
~lY
3
4
5
6
2A..J2L
2B.J!&..
2C....!.!&..
~2Y
J. N PACKAGES
lA
8
2Y
18
9
2A
nc
10 28
lC
11
nc
10
12 2C
lY
13 20
GND 14 VCC
20....!!!L
SN7420 (J,N)
SN54ALS20A (J,FH)
SN74ALS20A (N,FN)
SN54AS20 (J,FH)
SN74AS20 (N,FN)
S N54H20 (J)
SN74H20 (J,N)
11
nc
lA
lY
12
13
4Y
4A
2A
14
5Y
nc
15
nc
2Y
16
5A
nc
17
nc
3A
18
6Y
3Y
19
6A
GND
20
Vcc
III
.....
Co)
FH, FN PACKAGES
1
nc
11
nc
lA
12
2Y
18
13
2A
nc
nc
14
28
15
nc
nc
nc
5
6
lC
16
nc
17
10
lY
18
19
2C
20
GND
20
VCC
9
10
SN5420 (J,FH)
nc
3
4
pin assignments
&
10ns
4
3.3
6
33
9.5
3
1
2
10
logic symbol t
typical performance
DUAL 4INPUT
POSITIVENAND
GATES
FH, FN PACKAGES .
J, N PACKAGES
lA
8 4Y
lY
9 4A
10 5Y
2A
11
5A
2Y
12 6Y
3A
13 6A
3Y
GND 14 VCC
:::J
"'C
o
:r...
a..
positive logic: Y=ABCD
SN54L20 (J)
SN54LS20 (J,FH)
SN74LS20 (J,N,FN)
SN54S20 (J,FH)
SN74S20 (J,N,FN)
t Pin numbers shown on logic symbols are for J and N pa~kages only,
TEXAS
INSTRUMENTS
3-9
PRODUCT{GUIDE
~
21
logic symbol t
typical performance
DUAL 4INPUT
POSITIVEAND
GATES
TYPE
'ALS21
'AS21
'H21
'LS21
DELAY
8.5 ns
4.3ns
8.2 n.
12 n.
POWER
2.21 mW
13mW
40mW
4.25 mW
1A..J!L
pin assignments
J, N PACKAGES
&
1B-ill-
~1Y
1C~
1D~
2A-.J2L
2B
SN54ALS21 (J,FH)
SN74ALS21 (N,FN)
.J.!!!.L
SN74AS21 (N,FN)
SN54H21 (J)
SN74H21 (J,N)
2D~
SN54LS21 (J,FH)
SN74LS21 (J,N,FN)
DUAL 4INPUT
POSITIVENAND
GATES WITH
OPEN'(;OLlECTOR
OUTPUTS
logic symbol t
typical performance
DELAY
1A..J!L
10mW
22 ns
1B..J!.L
ALS22A 1.28mW
16.5 ns
1C~
1D~
TYPE
POWER
'22
'H22
22mW
8 ns
'LS22
2mW
16 ns
17.5mW
5 ns
'S22
SN54LS22','
SN54S22 (J,
.,"'C
SN7422 (J,N)
SN74ALS22A (N,FN)
SN74H22 (J,N)
SN74LS22 (J,N,FN)
SN74S22 (J,N,FN)
10
11
12
13
14
FH, FN PACKAGES
1 nc
11 nc
2 lA
12 2Y
3 lB
13 2A
4 nc
14 26
5 nc
15 nc
6 lC
16 nc
7 nc
17 nc
8
10
18 2C
9
19 20
lY
10 GNO 20 VCC
pin assignments
J, N PACKAGES
&
~~1Y
2A...J2L
2B.J..!.!!.L
SN5422 (J,FH)
SN54ALS22A (J,FH)
SN54H22 (J)
2Y
2A
2B
nc
2C
20
VCC
~2Y
2C..J.!3.L
SN54AS21 (J,FH)
22
lA
16
nc
lC
10
lY
GNO
1
2
3
4
5
6
7
1
2
3
4
5
6
7
lA
16
nc
lC
10
lY
GNO
8
9
10
11
12
13
14
2Y
2A
2B
nc
2C
20
VCC
~2Y
2C...i!&..
2D..JEL...
FH, FN PACKAGES
1 nc
11 nc
2 lA
12 2Y
3 lB
13 2A
4 nc
14 2B
5 nc
15 nc
6 lC
16 nc
7 nc
17 nc
8
18 2C
10
9 lY
19 20
10 GNO 20 VCC
o
a.
c:
C')
~
23
G')
5.
EXPANDABLE DUAL
4INPUT POSITIVE
NOR GATES WITH
STROBE
a.
CD
SN5423 (J,FHl
typical performance
I
I
TYPE
'23
logic symbol t .
I POWER I DELAY I 1G~ G1

I 23 mW110.5 ns I 1A....!!l- 1
pin assignments
;;'1
1B~1
1C~1
SN7423 (J,N)
~1Y
1D~1
1X...!!l..-
1X~ JE
2G...!E.L G2
2 B..!1.!.L- 2
2C~2
~2Y
2D~~2__________~
,I
J, N PACKAGES
IX
9 2Y
lA
lB
lG
lC
10
10
II
IV
GNO
12
13
14
15
16
2A
2B
2G
2C
20
IX
Vcc
PACKAGE
II
nc
12 2Y
lA
13 2A
14 26
16
lG
15 2G
nc
16 nc
17 2C
lC
18 20
10
lY
19 Ii<
GNO 20 VCC
FH
1
2
3
4
5
6
7
8
9
10
nc
IX
;;'1
2A~2
1
2
3
4
5
6
7
6
positive logic:
1Y = 1G (1A+1B+1C+1D)+X
2Y = 2G (2A+2B+2C+2D)
v
= 1"1011+",,+ ,..f ct\.Ir.:;,/la:n/CI\17/u:::n
L-____________________________________________________________________________________________-'
lt
Pin numbers shown on logic symbols are for J and N packages
O~IY.
!':. nc - no internal connection.
3-10
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 ~ DALLAS. TEXAS 75265
PRODUCT GUIDE
logic symbol t
24
2A~
2B~
3A~
3B~
[TYPE HYSTERESIS DELAY

0.7 V
~2Y
1
2
3
4
~3Y
6
7
J, N PACKAGES
lA
8 3Y
18
lY
2A
28
2Y
GNO
9
10
11
12
13
14
3A
38
4Y
4A
48
Vcc
~4Y
4A....1!!L
1 19 ns
SN54LS24 (J,FH)
~'Y
1B....EL
typical performance
,'LS24
pin assignmenU
&.0
1A-.!!L
SCHMITT-TRIGGER
POSITIVE-NAND
GATES/INVERTERS
WITH TOTEM POLE
OUTPUTS
4B~
FH, FN PACKAGES
1 nc
11 nc
2 lA
12 3Y
3 18
13 3A
4 lY
14 38
15 nc
5 nc
6 2A
16 4Y
7 nc
17 nc
18 4A
8 28
19 48
9 2Y
10 GNO 20 Vcc
SN74LS24 (J,N,FN)
25
typical performance
DUAL 4INPUT
POSITIVE-NOR
GATES WITH
STROBE
1 TYPE
'25
SN5425 (J,FH)
logic symbol t
I POWER I DELAY-, 1G~
23mW 110.5 ns
G1
pin assignments
J, N PACKAGES
;;'1
1A~
1B....!!!....
~ 1V
1C~
1D~
(111
2 G - G2
SN7425 (J,N)
1
2
3
4
5
6
7
lA
'18
lG
lC
10
lY
GNO
8
9
10
11
12
13
14
;;>1
2A~
2B~
2C~
2D~
2Y
2A
28
2G
2C
20
Vcc
~ 2Y
1
2
3
4
5
6
7
8
9
10
FH PACKAGE
nc
11 nc
lA
12 2Y
18
13 2A
lG
14 28
nc
15 nc
lC
16 2G
nc
17 nc
10
18 2C
lY
19 20
GNO
20
Vcc
positive logic:
Y = G (A+B+C+D)
...,
(.)
logic symbol t
.26
QUADRUPLE 2-INPUT HIGH-VOLTAGE
INTERFACE POSITlVENAND GATES
1A-.!!L
typical performance
2A~
2B~
3A~
3B~
TYPE
HIGH
LEVEL
OUTPUT
OUTPUT
VOLTAGE
CURRENT
POWER
&[>
1B....EL
LOW
LEVEL
DELAY
'26
15 V
16mA
10mW
13.5 ns
'LS26
15 V
4mA
2mW
16ns
~~'Y
4A....!.@....
4B..J!!!.....
SN5426 (J,FH)
SN54LS26 (J,FH)
SN7426 (J,N)
SN74LS26 (J,N,FN)
:::::I
pin assignments
~2Y
~3Y
~4Y
J. N PACKAGES
1
2
3
4
5
6
7
lA
18
lY
2A
28
2Y
GNO
8
9
10
11
12
13
14
3Y
3.1.
38
4Y
4A
48
Vcc
"C
FH, FN PACKAGES
1 nc
11 nc
2 lA
12 3Y
3 18
13 3A
4 lY
14 38
5 nc
15 nc
6 2A
16 4Y
7 nc
17 nc
18 4A
8 28
9 2Y
19 48
10 GNO 20 Vcc
...o
Q..
t Pm numbers shown on logic symbols are for J and N packages only.

TEXAS
INSfRUMENlS
3-11
PRODUCT GUIDE
logic Iymbol f
typical performance
27
TYPE
'27
'ALS27
'AS27
'LS27
TRIPLE 3INPUT
POSITIVENOR
GATES
POWER
22mW
2.48 mW
12.2mW
4,5mW
DELAY
8.6 nl
6nl
3.5 nl
10nl
1A-llL
pin assignments
J, N PACKAGES
;;'1
~1Y
1B--EL
1C.J.1!L
2A...2L
:::::.!!L 2Y
2B-iliSN6427 (J,FH)
SN7427 (J,N)
2C~
SN64ALS27 (J,FH)
SN74ALS27 (N,FN)
3A-i!L
SN64AS27 (J,FH)
SN74AS27 (N,FN)
3 B-.l!.!!.L.
SN64LS27 (J,FH)
SN74LS27 (J,N,FN)
3C...!!!L.
2
3
4
5
6
7
lA
18
2A
26
2C
2Y
OND
8
9
10
II
12
13
14
3Y
3A
3B
3C
lY
lC
VCC
~3Y
FH, FN PACKAGES
nc
II
nc
lA
12 3Y
lB
13 3A
14 3B
2A
nc
15 nc
2B
16 3C
7 nc
17 nc
8 2C
18 lY
9 2Y
19 lC
10 OND 20 VCC
I
2
3
4
5
6
positive logic: Y-A+B+C
28
logic symbol 1
QUADRUPLE 2INPUT
1A-ill-
POSITIVENOR BUFFERS
'28
SN54ALS'
SN74ALS'
SN54LS'
SN74LS'
."
""II
Co
;;.1t>
1B...2L
performance
TYPE
pin assignments
2A~
LOW
LEVEL
OUTPUT
CURRENT
48mA
12mA
24mA
12mA
24mA
HIGH
LEVEL
OUTPUT
CURRENT
-2.4mA
-lmA
-2.6 mA
-1.2mA
-1.2mA
POWER
(TYPI
DELAY
(TYPI
28mW
4.06 mW
4.06 mW
5.5mW
5.5 mW
7 ns
4 ns
4 ns
12 ns
12 ns
SN5428 (J,FH)
SN7428 (J,N)
SN54ALS28A (J,FH)
SN54LS28 (J,FH)
SN74ALS28A (N,FN)
~2Y
2B-.!!L
3A--1!L
~3Y
3B~
4A-l.!!L
4B
~1Y
J, N PACKAGES
I
2
3
4
5
6
7
lY
lA
lB
2Y
2A
28
GND
8
9
10
II
12
13
14
3A
36
3Y
4A
4B
4Y
Vee
::::::...!lli 4Y
--.!.!3L
FH, FN PACKAGES
II
nc
nc
12 3A
2 lY
3 lA
13 3B
4 lB
14 3Y
5 nc
15 nc
6 2Y
16 4A
7 nc
17 nc
18 4B
8 2A
9 2B
19 4Y
10 GND 20 Vee
I
positive logic: Y"A+B
SN74LS28 (J,N,FN)
s:
(')
"G)
30
s:
c:
CD
logic symbol t
typical performance
8INPUT
POSITIVENAND
GATE
TYPE
'30
'ALS30
'AS30
'H30
'L30
'LS30
'S30
POWER
10mW
1.9mW
9.75 mW
22mW
1 mW
2.4mW
19mW
DELAY
A......!.!!...-
10ns
B~
C~
7 ns
3.5 ns
6ns
33n.
17ns
3 ns
pin assignments
J, N PACKAGES
&
o--illE~
F~
~Y
1111
GSN5430 (J ,F H)
SN7430 (J,N)
H~
SN54ALS30 (J,FH)
SN74ALS30 (N,FN)
positive logic:
SN54AS30 (J,FH)
SN74AS30 (N,FN)
SN54H30 (J)
SN74H30 (J,N)
Y =ABCDEFGH
SN54L30 (J)
SN54LS30 (J,FH)
SN74LS30 (J,N,FN)
SN54S30 (J,FH)
SN74S30 (J,N,FN)
3-12
TEXAS
INSTRUMENlS
1
2
3
4
5
8
9
10
A
B
Y
nc
nc
II
E
F
GND
12
13
14
H
nc
Vee
FH, FN PACKAGES
1 nc
nc
II
2 A
12 Y
13 nc
3 B
4 e
14 nc
5 nc
15 nc
6 D
16 G
7 nc
I ' nc
8 E
Ie
H
9 F
19 nc
10 GND 20 Vee
PRODUCT GUIDE
DELAY ELEMENTS
delay lines)
2A~
Buffers 3 and 4 offer 3-fold increase in

Total power dissipation 38 mW
45 ns
48 ns
6 ns
3A~
3B~
IOL (12 mA/24 mAl
32n.
23n.
1A~
(delay elements for generating
pin assignments
logic symbol t
31
&t>
4A.J.!L
LOGIC
DELAY
Gates 1 and 6
Inverting
27.5 ns
Gates 2 and 5
Noninverting
DELAY ELEMENT
2-lnput
Buffers 3 and 4
46.5 ns .
6 ns
NAND
4B
..l!1L
&t>
45 ns
5A~
48 ns
32 ns
23 ns
6A~
~3Y
FH, FN PACKAGES
1
nc
11
nc
lY
10
4A
lA
12
4Y
2A
11
4B
lY
13
4A
4B
~2Y
J, N PACKAGES
9 4Y
lA
2
4
2Y
12
5Y
2A
14
3A
13
5A
2Y
15
5Y
3B
14
6Y
nc
16
nc
3Y
15
6A
3A
17
5A
GND
16
VCC
3B
3Y
18
19
6Y
GND
20
Vee
6 ns
6ns
typical performance
6 ns
I
~1Y
~4Y
10
6A
~5Y
~6Y
,
SN74LS31 (J,N,FN)
SN54LS31 (J,FH)
32
QUADRUPLE
2-INPUT
POSITIVE-OR
GATE
logic symbol t
typical performance
TYPE
POWER
'32
'ALS32
DELAY
1A-!!.L
24mW
12 ns
1B~
2.81 mW
5.5 ns
2A-.!!L
'AS32
14.5mW
4.5 ns
'LS32
5mW
12 ns
35mW
4 ns
'S32
SN5432 (J,FH)
SN54ALS32 (J,FH)
SN54AS32 (J,FH)
SN54LS32 (J,FH)
SN54S32 (J,FH)
SN7432 (J,N)
SN74ALS32 (N,FN)
SN74AS32 (N,FN)
SN74LS32 (J,N,FN)
SN74S32 (J,N,FN)
pin assignments
>1
~1Y
~2Y
2B-m-
3A~
3B~
r----!!L 3Y
4A~
4B~
~4Y
FH, FN PACKAGES
lA
3Y
nc
11
lB
1V
3A
lA
18
12
nc
3Y
3
4
38
4Y
lY
13
14
3A
2A
10
11
2
3
2B
12
4A
nc
15
nc
2Y
13
4B
2A
16
4V
GND
14
Vee
nc
17
nc
28
18
4A
2Y
19
4B
GND
20
Vee
9
10
3B
positive logic: Y=A+B
...
33
logic symbol t
QUADRUPLE 2-INPUT
POSITIVE-NOR BUFFERS
WITH OPEN{;OLLECTOR
OUTPUTS
performance
1A~
>1C>
~~1Y
~2Y
3
4
2A~
2B~
3A~
3B~
4A--1!!.!.....
4B
(.)
pin assignments
1B-E!.....-
HIGHLOWLEVEL
LEVEL
POWER
DELAY
TYPE
(TYP)
OUTPUT
OUTPUT
(TYP)
VOLTAGE CURRENT
'33
5.5 V
48 mA
28 mW
11 ns
SN54ALS'
5.5 V
12 mA
4.06 mW 14.5 ns
SN74ALS'
5.5V
24 mA
4.06 mW 14.5 ns
SN54LS'
5.5 V
12 mA
5.45mW
19 ns
5.5 V
SN74LS'
24 mA
5.45mW
19 ns
--.!..!3.!.....
5
7
~4Y
nc
a..
FH. FN PACKAGES
SN7433 (J,N)
SN74ALS33A (N,FN)
SN74LS33 (J,N,FN)
::J
"C
J. N PACKAGES
IV
8 3A
lA
9 3B
lB
10 3V
2Y
11
4A
2A
12 48
28
13 4V
GND 14 Vee
~3Y
SN5433 (J,FH)
SN54ALS33A (J,FH)
SN54LS33 (J,FH)
J. N PACKAGES
1
2
11
nc
IV
12
3A
lA
13
18
14
3Y
nc
15
nc
2V
16
4A
nc
17
nc
38
2A
18
28
19
4Y
GND
20
Vec
10
48
TEXAS
INSTRUMENTS
POST OFFICE BOX225012 DALLAS. TEXAS 75265
3-13
PRODUCT GUIDE
34
logic symbol
HEX NONINVERTERS
1A
Noninverting outputs
pin assignments
--.l!L
! TYPE!
POWER
DELAY
! 'ALS34!
1.9mW
8 ns
I 'AS34 I
12mW
3.3 ns
~2Y
1
1
1
SN74ALS34 (N,FN)
SN74AS34 (N,FN)
~3Y
3A~
4A~
JL4Y
--'!!.!.....-
~SY
6A~
~6Y
SA
positive logic Y
...
o
"'C
35
logic symbol
HEX NON INVERTERS WITH OPEN

COLLECTOR OUTPUTS
1A
c.
typical performance
c::
(')
,...
! TYPE
! 'ALS35!
POWER!
1.9mW
SN54ALS35 (J,FH)
~1Y
2A~
typical performance
SN54ALS34 (J,FH)
SN54AS34 (J,FH)
DELAY
2.5 ns
J
I
SN74ALS35 (N,FN)
nc
11
nc
1Y
4A
1A
12
4Y
2A
10
5Y
1Y
13
4A
2Y
11
5A
2A
14
5Y
3A
12
6Y
nc
15
nc
3Y
13
6A
2Y
16
5A
GNO 14
vec
nc
17
nc
3A
18
6Y
4Y
9
10
3Y
19
6A
GND
20
Vec
pin assignments
--.l!L
Q~1Y
~2Y
3A~
~3Y
4A~
~4Y
--'!!.!.....-
~5Y
6A~
~6Y
positive logic Y
=A
3-14
FH,FN PACKAGES
1A
=A
2A~
SA
J,N PACKAGES
1
TEXAS
INSTRUMENTS
J,N PACKAGES
FH, FN PACKAGES
1A
4Y
nc
11
nc
1Y
4A
1A
12
4Y
2A
10
1Y
13
4A
5Y
2Y
11
5A
2A
14
5Y
3A
12
6Y
nc
15
nc
3Y
13
6A
2Y
16
5A
GND
14
Vee
nc
17
nc
3A
18
6Y
3Y
19
6A
GND
20
Vee
10
PRODUCT GUIDE
37
logic symbol t
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS

performance
lA----l!L.
HIGHLOWLEVEL
DELAY
LEVEL
POWER
(TYP)
OUTPUT
OUTPUT
(TYPI
CURRENT CURRENT
4.8 rnA
-1.2 rnA
27 rnW 10.5 ns
37
12 rnA
SN54ALS'
-1 rnA 3.04 rnW
4 ns
SN74ALS'
24 rnA
- 2.6 rnA 3.04 rnW
4 ns
12 rnA
SN54LS'
-1.2 rnA
4.3 rnW
12 ns
SN74LS'
24 rnA
-1.2 rnA
4.3 rnW
12 ns
'S37
60 rnA
-3 rnA
41rnW
4 ns
TYPE
pin assignments
&C>
lB~
2A~
2B~
~IY
I
2
3
4
5
6
7
~2Y
3A-ill.-
~3Y
3B -..!.!L
4A~
J. N PACKAGES
lA
8 3Y
lB
9 3A
lY
10 3B
2A
II 4Y
2B
12 4A
2Y
13 4B
GND 14 Vee
FH. FN PACKAGES
I
2
3
4
5
6
7
8
9
b:.....!..!.!l4Y
4B~
10
nc
lA
lB
lY
nc
2A
nc
2B
2Y
GND
II
12
13
14
15
16
17
18
19
20
nc
3Y
3A
3B
nc
4Y
nc
4A
4B
Vee

SN5437 (J,FH)'
SN54ALS37A (J,FH)
SN54LS37 (J,FH)
SN54S37 (J,FH)
SN7437 (J,N)
SN74ALS37A (N,FN)
SN74LS37 (J,N,FN)
SN74S37 (J,N,FN)
38
logic symbol t

WITH OPEN-COLLECTOR OUTPUTS
performance
lA-l.!.L.
TYPE
'38
SN54ALS'
SN74ALS'
SN54ALS'
SN74ALS'
'S38
HIGHLOWDELAY
POWER
LEVEL
LEVEL
ITYP)
(TYPI
OUTPUT
OUTPUT
VOLTAGE CURRENT
12.5
ns
24.4 rnW
5.5 V
48 rnA
3.04 rnW 14.5 ns
5.5 V
12 rnA
3.04 rnW 14.5 ns
5.5 V
24 rnA
4.3 rnW
19 ns
12 rnA
5.5 V
4.3 rnW
19 ns
24 rnA
5.5 V
6.5 ns
41rnW
5.5 V
60 rnA
SN5438 (J,FH)
SN54ALS38A (J,FH)
SN7438 (J,N)
SN74ALS38A (N,FN)
SN54LS38 (J,FH)
SN54S38 (J,FH)
SN74LS38 (J,N,FN)
SN74S38 (J,N,FN)
39
pin assignments
&C>
lB~
2A~
2B~
3A~
~2Y
~3Y
3B -..!.!L
4A~
SN5439
SN7439
SN5439 (J,FH)
J. N PACKAGES
lA
8 3Y
IS
lY
2A
2B
2Y
GND
10
II
12
13
14
3A
3B
4Y
4A
4B
VCC
FH. FN PACKAGES
I
2
3
4
5
6
7
B
9
10
nc
lA
IS
lY
nc
2A
nc
2B
2Y
GND
II
12
13
14
15
16
17
18
19
20
nc
3Y
3A
3B
nc
4Y
nc
4A
4B
Vce
(21
pin assignments
&C>
lA---'---1B--'1L.
2A~
HIGHLOWLEVEL
LEVEL
POWER
DELAY
(TYP)
(TYP)
OUTPUT
OUTPUT
VOLTAGE CURRENT
5.5 V
24.4 rnW 12.5 ns
60 rnA
5.5 V
80 rnA
24.4 rnW 12.5 ns
I
2
3
4
5
6
7
b:.....!..!.!l4Y
4B~
logic symbol t

WITH OPEN-COLLECTOR OUTPUTS
performance
TYPE
O~IY
~ 2Y
2B --.!!!.lA--.!!!.-
~lY
lB~
4A~
~4Y
4B~
FH PACKAGE
J. N PACKAGES
Q~1Y
I
2
3
4
5
6
7
1Y
lA
lB
2Y
2A
2B
GND
8
9
10
II
12
13
14
3A
3B
3Y
4A
4B
4Y
Vcc
I
2
3
4
5
6
7
8
9
10
nc
'1
1Y
12
1A
13
lB
14
nc
15
2Y
16
nc
17
2A
18
2B
19
GND 20
nc
3A
3B
3Y
nc
4A
nc
4B
4Y
Vce
SN7439 (J,N)
positive logic:
Y = AB
TEXAS
INSTRUMENlS
3-15
PRODUCT GUIDE
logic symbol t
40
DUAL 4-INPUT POSITIVE NAND BUFFERS
lA--!!L
performance
lB~
lC~
lD~
HIGHLOWDELAY
LEVEL
LEVEL
POWER
TYPE
(TYP)
OUTPUT OUTPUT
ITYP)
VOLTAGE CURRENT
48 mA
-1.2 mA
26 mW 10.5 ns
'40
-1 mA 3.04 mW
4 ns
SN54ALS' 12 mA
SN74ALS' 24 mA
-2.6 mA 3.04 mW
4 ns
-1.5 mA
7.5 ns
'H40
60 mA
44mW
-1.2 mA 4.3 mW ' 12 ns
SN54LS'
12 mA
24 mA
-1.2 mA 4.3mW
12 ns
SN74lS'
-3 mA
4 ns
'S40
60mA
44mW
'"
"
SN5440 (J,FH)
SN54ALS40A (J,FH)
SN54H40 (J)
SN54LS40 (J,FH)
SN54S40 (J,FH)
42
4-LlNE TO 10-LINE
DECODERS
(BCD to decimal)
..
SN5442A (J,FH)
SN54L42 (J)
SN54LS42 (J,FH)
pin assignments
J. N PACKAGES
&[>
~lY
I
2A..J2L
28..J.!.2L
1A
18
nc
1C
10
1Y
GNO
8
9
10
11
12
13
14
2Y
2A
2B
nc
2C
20
VCC
~2Y
2C....!!!L
2D~
PACKAGES
11 nc
12 2Y
1A
13 2A
1B
14 2B
nc
15 nc
nc
16 nc
1C
17 nc
nc
1B 2C
10
19 20
1Y
GNO 20 VCC
FH. FN
nc
1
2
3
4
5
6
7
8
9
10
positive logic: Y"ABCD

;
SN7440 (J,N)
SN74ALS40A (N,FN)
SN74H40 (J,N)
SN74LS40 (J,N,FN)
SN74S40 (J,N,FN)
logic symbol t
typical performance
TYPE
SELECT
TIME
pin assignments
J. N PACKAGES
BCD/DEC
POWER
'42A
17ns
140mW
'L42
34 ns
70mW
'LS42
17ns
35mW
SN7442A (J,N)
O~O
1~1
A~l
B..l1&... 2
SN74LS42 (J,N,FN)
c-illL 4
D~8
'"0
""I
2 ::::....ill-2
3~3
4~4
5~5
6~6
7~7
8~8
9~9
o
Q.
C
(')
'(;')
s:
',CD
3-16
1
2
3
4
5
6
7
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
GND
9
10
11
12
13
14
15
16
7
8
9
0
C
B
A
VCC
PACKAGES
11 nc
12 7
0
13 8
1
14 9
2
15 0
3
nc
16 nc
4
17 C
18 B
5
19 A
6
GND 20 VCC
FH. FN
1
2
3
4
5
6
7
8
9
10
nc
PRODUCT GUIDE
logic symbol t
typical performance
43
4-LlNE TO 10-LlNE
SELECT
TYPE
DECODERS (EXCESS
3 TO DECIMAL)
TIME
'43A
17 ns
140mW
'L43
34ns
70mW
4~1
5~2
A~1
6~3
B-1!.&- 2
7t=-.ill-4
4
nc
11
10
12
11
13
3
4
12
14
13
15
14
nc
16
nc
15
17
GND
16
Vcc
7
8
9
10
18
C
8
8~5
9~6
nc
0
1
3~O
c.-1llL
o---'.EL
FHPACKAGE
J, N PACKAGES
[EX3/0EC/
POWER
SN7443A (J,N)
SN5443A (J,FH)
SN54L43 (J)
pin assignments
x/v
19
GND
20
Vcc
10~7
11~8
12~9
4-LlNE TO 10-LINE
TYPE
DECODERS (EXCESS
3-GRAY TO DECIMAL)
SN5444A (J,FH)
SN54L44 (J)
logic symbol t
typical performance
44
SELECT
TIME
POWER
'44A
17 ns
140mW
'L44
34 ns
70mW
pin assignments
2r=-llLo
6~1
7~2
5~3
4~4
12~5
A~1
SN7444A (J,N)
B-1!.&- 2
c.-1llL
o---'.EL
4
8
FH PACKAGE
J, N PACKAGES
X/V
[EX3GRAV/OEC/
nc
11
nc
10
11
12
3
4
1
2
13
12
14
13
15
9
0
14
nc
16
nc
15
17
GND
16
Vcc
18
19
GND
20
Vcc
10
13 p......!ZL 6
15~7
14~8
10~9
....,
45
TYPE
OUTPUT
r>
POWER
VOLTAGE
'45
SN5445 (J,FH)
30V
SN7445 (J,N)
215mW
A~1
B'~2
c-1llLo....l..1&-
(.)
pin assignments
4
8
~O
1~ ~1
2~ ~2
O~
3~
~3
~4
5~ ~5
4~
6~
F=--ill- 6
~7
8~ ~8
7~
i'i'EN
FH PACKAGE
J, N PACKAGES
BCD/DEC
OFF-STATE
BCD-TO-DECIMAL
DECODER/DRIVER
logic symbol t
typical performance
9~
nc
11
0
1
12
9
0
13
14
nc
15
16
nc
17
10
3
4
11
3
4
12
13
14
5
6
15
GND
16
Vcc
5
6
nc
8
9
10
18
:::s
"'C
...o
c..
19
GND
20
Vcc
;::......J!!.L. 9
>9Za
TEXAS
INSfRUMENTS
3-17
PRODUCT GUIDE
logic symbol t
46,47
pin assignments
(.!l.. ...
iii/RBO
DECODERS/DRIVERS
'~
(46 30 V OUTPUTS
47 15 V OUTPUTS)
RBI
typical performance
rr
(5)
TYPE
OUTPUT
POWER
VOLTAGE
'46A
30V
'L46
30V
133mW
'47A
15V
320mW
'L47
15V
133mW
'LS47
15V
35mW
&
OFF-5TATE
V20
A.!!L.- 1
320mW
C (2)
s:::
r-.
20,21~
e 20,21 ~ t.......
D~8
f 20,21~t.......
9 20,21~ ~
logic symbol t
.....
. '!l...r.:;;
OUTPUT
(5)
RBI
OFF-5TATE
POWER
'48
5.5 V
265mW
'LS48
5.5 V
125mW
SN7448 (J,N)
SN74LS48 (J,N,FN)
(')
&
G21
CT=oL~
V20
Am
B~
C (2)
a 20,21
b 20,21
(13)
20,21~
20,21~
e 20,21 ~
f 20,21~
9 20,21~
Bi....!lLb.
DECODERS/DRIVERS
nc
Vee
OUTPUTS)
typical performance
OFF-5TATE
OUTPUT
POWER
G20
5.5 V
165mW
'LS49
5.5V
40mW
A~1
a20~ f--l11La
B--lll.- 2
b20Q
c2liQ ~c
d20Q f...-m-d
c-ill-
VOLTAGE
'49
o--11L.... s
FH. FN PACKAGES
1 nc
2 B
3 e
4 rt
5 BIIRBO
6 nc
7 RBI
8 D
9 A
10 GND
c
b
g
I
Vee
J, N PACKAGES
1 B
2 e
3 Iff
4 D
5 A
8 e
7 GND
(OPEN-COLLECTOR
~b
8
9
10
11
12
13
14
11
12
13
14
15
16
17
18
19
20
nc
e
d
c
b
nc
Vee
FH, FN PACKAGES
1 nc
2 B
3 C
4 BI
5 nc
b
g
Vee
f---lli-
e20Q
e
f20Q ~f
7 nc
8 A
9 e
10 GND
11
12
13
14
15
16
17
18
19
20
nc
d
.
b
nc
nc
Vee
g2ii~ ~g
SN7449 (J,N)
SN74LS49 (J,N,FN)
FONT TABLE Tl - FOR
t Pin numbers shown on logic symbols
'46, '47, '48, '49
101 11213IyI5IbI11819Icl:JIU ICIt:\
are for J and N packages only.

3-18
nc
pin assignments
BIN/7-5EG
[T1)
BCD TO SEVEN SEGMENT
10
11
12
13
14
15
16
a
(12) b
(11)
c
(10)
d
(9)
e
(15)
f
(14)
9
logic symbol t
49
SN5449 (J,FH)
SN54LS49 (J,FH)
J. N PACKAGES
9 e
O~8
r+
TYPE
Vee
9
10
1 B
2 e
3 LT
4 BI/RBO
5 RBI
6 D
7 A
8 GND
;'1
(3)
['f
VOLTAGE
SN5448 (J,FH)
SN54LS48 (J,FH)
11
12
13
14
lii/RW 15
nc
16
RBI
17
D
18
A
19
GND
20
nc
e
rt
pin assignments
BI~q1fEG
iii/RBO
typical performance
o
c..
GND
1
2
3
4
5
6
7
SN74LS47 (J,N,FN)
DECODERS/DRIVERS
(13) a
(12) b
(11)
c
(10)
d
(9)
e
(15)
f
(14)
9
c 20,21~ t.......
B~2
BCD~O~EVEN~EGMENT
"C
eT=oLLa 20,21 ~"'b 20,21 ~t.....
FH. FN PACKAGES
SN7447A (J,N)
48
II
I G21
9
10
11
12
13
14
15
16
SN7446A (J,N)
SN5446A (J,FH)
SN54L46 (J)
SN5447A (J,FH)
SN54L47 (J)
SN54LS47 (J,FH)
TYPE
1 B
2 e
3 LT
4 BI/RBO
5 RBI
6 D.
7 A
"
(3)
J. N PACKAGES
BINI7-5EG [>
[T1)
;'1
BCD-To-SEVEN-SEGMENT
TEXAS
INSTRUMENTS
10
11
12 13 14
15
PRODUCT GUIDE
50
typical performance
DUAL 2-WIDE 2-INPUT
rTYPE
AND'()R-INVERT GATES
'50
14 mW 110.5 ns
SN7450 (J,N)
SN74H50 (J,N)
pin assignments
1
2
-a;-
~ly3
4
5
1X~ }
1X.J.!.!.!....
&
2A~
2B~
2C~ ----a;20~
PACKAGES
8 lY
9 lC
10 10
11 IX
12 IX
13 18
GNO 14 VCC
J. N
;;'1
&
11B~
29mWL 6.5ns J1C~

(10)
10-
(ONE GATE EXPANDABLE)I 'H50

SN5450 (J,FH)
SN54H50 (J)
logic symbol t
POWERLDELAY J1A""'!!!""
lA
2A
28
2C
20
2Y
;;'1
~2Y
PACKAGE
nc
11 nc
lA
12 lY
2A
13 lC
28
14 10
nc
15 nc
2C
16 IX
nc
17 nc
20
18 IX
2Y
19 18
GNO 20 VCC
FH
1
2
3
4
5
6
7
8
9
10
positive logic: Y=AB+Ci5+X

'50: X = output of SN5460/SN7460
'H50: X = output of SN54H60/SN74H60
or SN54H62/SN74H62
51
AND'()R
INVERT GATES
TYPE
'51
'H51
'l51
'lS51
'S51
SN5451 (J,FH)
SN54H51 (J)
SN54l51 (J)
SN54lS51 (J,FH)
SN54S51 (J,FH)
logic symbol, '51, 'H51,'SS1 t
typical performance
POWER
DELAY
14mW 10.5 ns
29mW
65 ns
1.5mW
43 ns
2.75mW 12.5 ns
28mW
3.5 ns
&
lA....DL
lB~
f-lC~
&
~lY
10.J.!2.L
&
2A....EL.-
;;'1
SN7451 (J,N)
SN74H51 (J,N)
2B~
2C~ --a;-20~
SN74lS51 (J,N,FN)
SN74S51 (J,N,FN)
positive logic: Y=AB+CD
&
10~ ~
IF--
;;'1
~2y'
(3)
2B-
PACKAGES
8 lY
9 10
10 1E
11 IF
12 18
13 lC
GNO 14 VCC
J. N
(10)
lE(11)
2A~
PACKAGES
8 lY
9 lC
10 10
11 nu
12 nu
13 18
GND 14 VCC
lA
2A
28
2C
20
2Y
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
lA
2A
28
nc
2C
nc
20
2Y
GND
11
12
13
14
15
16
17
18
19
20
nc
lY
lC
10
nc
nu
nc
nu
18
VCC
II
pin assignments, 'L51, 'lS51
;;'1
~lY
&
1
2
3
4
5
6
7
~2Y
logic symbol, 'L51, 'LSSl t

lA--1!L
(12)
lB(13)
lC-
pin assignments, '51, 'H51, 'S51

J. N
;;'1
1
2
3
4
5
6
7
lA
2A
28
2C
20
2Y
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
lA
2A
28
nc
2C
nc
20
2Y
GND
11
12
13
14
15
16
17
18
19
20
nc
lY
10
1E
nc
IF
nc
18
lC
VCC
...u
:::s
"C
o
...
a.
2C~ f---&"
(5)
20positive logic:
1V = I1A'lB'1C)+(1D'1E'1F)
2Y = (2A'2B)+(2C'2D)
t Pin numbers shown on logic symbols are for J and N packages only,
nc - no internal connection,
nu - make no external connection.
TEXAS
INSTRUMENTS
3-19
PRODUCT GUIDE
52
logic symbol t
typical performance
EXPANDABLE 4WIDE ITYPE I POWER IDELAY

ANDOR GATES
SN54H52 (J,FH)
r'H52 1
1 A~
pin assignments
&
~1
1
2
B~
r&
c~
D~
E~
F~ I---p;G~
88 mW 1 9.9 ns 1
SN74H52 (J,N)
H..JEL
(13)
I~
x~
t----l!!L V
4
5
6
7
J. N PACKAGES
A
8 Y
B
9 X
C
10 F
D
11 G
E
12 H
nc
13 I
GND 14 Vee
t-&-
FH PACKAGE
1
2
3
4
5
6
7
8
9
10
nc
11
12
13
14
15
16
17
18
19
20
e
nc
D
nc
E
nc
GND
nc
X
F
nc
G
nc
H
Vee
te-
positive logic: Y = AB+CDE+FG+HI+X

X
logic symbol, '53 t
53
typical performance
EXPANDABLE 4WIDE
lTYPE 1 POWER IDELAY 1 A......!.!!...-
ANDORINVERT GATES [ '53 .1

'H53 I
SN5453 (J,FH)
SN54H53 (J)
23mW110.5ns
41 mW I 6.6ns
SN7453 (J,N)
SN74H53 (J,N)
= output of SN54H61/SN74H61
&
pin assignments, '53

~1
1
2
3
4
5
6
7
1 B~
-I
e~ I-&-
D~
E~ f----&
F~
G~ ~
~V
J. N PACKAGES
A
8 Y
9 G
e
10 H
D
11
X
E
12 X
F
nc.
13 B
GND 14 Vee
H~
FH PACKAGE
1
2
3
4
5
6
7
8
9
10
x....!.!.!!.... I - - -
..
X~
"'0
JE
positive logic: Y = AB+CD+EF+GH+X
X = output of SN5460/SN7460
0C
...o
logic symbol, 'H53 t
A~
&
B~
c~ t----a;D~
G')
c:CD
pin assignments, 'H53

~1
E~ t----a;(5)
F~
G~
H~ f---g;-
~v
(10)
1""':'-:'-
x.J.!.!!.... I - - x~
JE
positive lo!!ic: Y - AB+CD+EFG+HI+X

X = output of SN54H60/SN74H60
or SN54H62/SN74H62
t Pm numbers shown on logiC symbols are for J and N packages only.

3-20
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
J. N PACKAGES
A
8 Y
9 H
e
D
10 I
11
X
E
12 X
F
13 B
G
GND 14
Vee
nc
A
e
D
nc.
E
nc
F
nc
GND
11
12
13
14
15
16
17
18
19
20
nc
Y
G
H
nc
X
nc
X
B
Vee
PRODUCT GUIDE
54
logic symbol, '54 t
typical performance
4-WIDE AND-OR- TYPE

'54
INVERT GATES
'H54
'L54
'LS54
POWER
DELAY
23mW 10_5 ns
41 mW
6.6 ns
43 ns
C
D
&
(2)
;;'1
SN7454 (J,N)
SN74H54 (J,N)
nc
11
12.
10
13
(8)
11
&
14
12
nu
nu
nc
15
nc
13
16
GND
14
Vce
nc
17
18
nc
nu
nc
nu
(5)
(9)
SN74LS54 (J,N;FN)
7
8
nc
19
GND
20
Vee
10
&
nc
&
(3)
(4)
SN5454 (J,FH)
SN54H54 (J)
SN54L54 (J)
SN54LS54 (J,FH)
FH PACKAGE
J. N PACKAGES
(1)
(13)
4.5mW 12.5 ns
1.5mW
pin assignments, '54
(10)
positive logic: Y = AB+CD+EF+GH

A
1
2
(1)
&
;;'1
3
4
D
(8)
J. N PACKAGES
A
8 y
e
9 H
10 I
D
nu
E
11
12 nu
F
13 8
G
GND 14 Vee
G
H
pin assignments, 'L54, 'LS54
positive logic: Y = AB+CD+EFG+HI

logic symbol, 'L54, 'LS54 t
A
B
C
D
(6)
G
H
J. N PACKAGES
A
8 nc
B
9 F
FH. FN PACKAGES
1
nc
11
12
nc
nc
Q)
10
13
11
14
E
y
12
nc
15
nc
13
18
(!)
GND
14
Vee
nc
E
y
17
18
nc
.....
19
20
Vec
9
10
GND
"'C
'S
CJ
::l
"'C
...o
(10)
a..
(11)
(12)
&
(13)
positive logic: Y = AB+CDE+FGH+IJ
nu - make no external connection.
TEXAS
INSTRUMENTS
3-21
PRODUCT GUIDE
55
typical performance
TYPE
2-WIDE 4-INPUT
AND-OR-INVERT GATES
DELAY
A~
6.8 ns
B-EL-
1.5mW
43 ns
2.75 mW
12.5 ns
c~
D~
POWER
'H55
30mW
'l55
'lS55
(10)
SN74H55 (J,N)
SN54H55 (J)
SN54L55 (J)
SN54LS55(J,FH)
E~
SN74lS55 (J,N,FN)
&
;;;'1
1
2
3
4
5
f----a;-
~v
...!.!.!.!.-.
6
7
J. N PACKAGES
A
B Y
B
9 X
10 E
e
D
11
F
X
12 G
nc
13 H
GND 14 Vee
(12)
G--
(13)
H-
X~
X~
f--
JE
positive logic: Y
= ABCD+EFGH+X
pin assignments, 'L55, 'LS55
logic symbol, 'L55, 'LS55t
X - Output of SN54H60/SN74H60
J. N PACKAGES
or SN54H62/SN74H62
&
A~
B~
C~
D~
E~ ~
;;;'1
~V
nc
11
12
nc
nc
E
13
nc
11
14
12
nc
15
nc
16
Vee
nc
nc
nc
17
nc
1B
19
GND
20
VCC
10
nc
nc
13
GND
14
2
3
4
5
FH. FN PACKAGES
F.-!!.!.!...-
G~
H~
10
positive logic: Y = ABCD+EFGH
56
pin asslgnmants
logic symbol t
50-TO-1
..."tJ
o
JG. P PACKAGES
CTR
CLR (6)
FREQUENCY DIVIDER
CT=O
CLKB
Vec
OA
GND
c.
c:
n
typical performance
... I I
G')
TYPE
c:
c:CD
I'LS56 I
CLEAR
POWER
25 MHz
HIGH
85mW I
SN54LS56 (JG)
DIV5
CLKA~ ~+
CLOCK
FREQUENCY
ClKB
~ ~+
CT=4
~OA
CLKA
CLR
J7
18
OB
Oc
DIV10
CT=4.9 ~
(8) OB
CT>4 ~Oc
For chip carrier information,
contact the factory.
SN74LS56 (JG,P)
tPin numbers shown on logic symbols are for J, JG, N, and P packages only.
3-22
I5
T6
TEXAS
INSTRUMENTS
PRODUCT GUIDE
57
logic symbol t
pin assignments
GO-TO-1
1
FREQUENCY DIVIDER
JG, P PACKAG~S
ClKS
5 ClKA
2
3
4
typical performance
VCC
OA
GNO
16
17
IB
ClR
OB
Oc
r-----~--~~~--r-------~------_,ClKA
~----~~~~~~r-------+_------~
ClKS
(S)
CT>4
SN54LS57 (JG)
SN54LS57 (JG, P)
60
typical performance logic symbol t
DUAL 4-INPUT
1A
EXPANDERS
SN5460 (J)
SN54H60 (J)
Os
Oc
1B
SN7460 (J,N)
SN74H60 (J,N)
'SO positive logic:

X - ABeD when connected to X and X inputs of
SN5423/SN7423, SN5450/SN7450, or
SN5453/SN7453
1C
10
2A
2B
'HSO positive logic:

X - ABCD when connected to X and X inputs of
SN54H50/SN74H50, SN54H53/SN74H53, or
2C
20
(1)
pin assignments
J, N PACKAGES
lA
8 20
18
9 2X
lC
10 2X
2A
11
IX
12 lj('
5 28
13 10
6 2C
7 GND 14 VCC
&
1
2
3
4
(2)
131
1131
141
&
lSI
(6)
(8)
SN54H55/SN74H55
61
typical performance
logic symbol t
TRIPLE 3-INPUT
1A
EXPANDERS
1B
SN54H61 (J)
SN74H61 (J,N)
positive logic:
X a ABC when connected to X input of
SN54H52/SN74H52
1C
2A
2B
(1)
pin assignments
J, N PACKAGES
&
(2)
1X
(3)
(4)
&
(5)
lA
2
3
4
18
lC
2A
28
.e
2X
IX
10
11
12
3X
3A
38
2C
GND
13
14
VCC
2X
2C
3C
3A
3B
3C
t Pin numbers shown on logic symbols are for J, JG, N, and P packages only.
TEXAS
INSTRUMENTS
3-23
PRODUCT GUIDE
62
logic symbol t
typical performance
4-WIDE AND-OR I TYPE I POWER

I 'H62 I 25mW
EXPANDERS
SN54H62 (J)
(1)
I
I
pin assignments
;;'1
&
A(2)
8-
c~ r--s;-D~
E~
(9)
F-~
G~
SN74H62 (J,N)
J. N PACKAGES
E[
~x
~x
10
11
H
I
12
13
GND
14
Vee
(11)
H-
(12)
1 -~
(13)
J-
63
logic symbol t
typical performance
HEX CURRENT- I TYPE I POWER IDELAY I

SENSING
I 'LS63 I 3.3 mW I 21 ns I
INTERFACE
GATES
1A~
pin assignments
J. N PACKAGES
IIV
~1Y
[;.200IlA)
[.. 5O IlA)
~2Y
~3Y
2A~
3A.ili..-
SN54LS63 (J,FH)
SN74LS63 (J,N,FN)
~4Y
~5Y
4A~
5A~
1A
1Y
4Y
4A
2Y
10
5A
2A
11
5Y
3A
12
6Y
6
7
3Y
13
6A
GND
14
Vee
~6Y
6A ..!.ll!.-
FH. FN PACKAGES
1
nc
11
nc
1A
12
4Y
3
4
1Y
13
2Y
14
5A
5
6
nc
15
nc
2A
16
5Y
nc
17
nc
3A
18
6Y
9
10
logic symbol, 'S64 t
64,65
A~
4-2-3-2 INPUT AND-OR-
"'"
o
TYPE
a.
c(")
'S64
,...
'S65
OUTPUT
TOTEM
POLE
OPEN
COLLECTOR
29mW
3.5 ns
D~
E~ ----s;F~
~Y
G~ f--&
5.5 ns
SN74S64 (J,N,FN)
SN74S65 (J,N,FN)
nc
11
12
10
11
13
14
H
I
12
nc
15
nc
16
GND
13
14_
Vee
nc
17
nc
18
19
20
Vee
I......!!L
10
K.....!.!!....
logic symbol, 'S6S t

A....!!.!.....(11)
&
>,
B-
C~
D~
E'~ f-&
F~
G~
r---a;-
Q~Y
(5)
H-
I~
J~
r---r.::-
K.....!.!!....
positive logic: Y - ABCD+EF+GHI+JK
3-24
FH. FN PACKAGES
8
9
(9)
6A
Vee
H-
(5)
36mW
19
20
3
4
c~
J-
SN54S64 (J,FH)
SN54S65 (J,FH)
J. N PACKAGES
(11)
POWER DELAY
3Y
GND
pin assignments
>,
B-
INVERT GATES
typical performance
"tJ
&
4A
TEXAS
INSTRUMENTS
H
-I
GND
nc
K-
PRODUCT GUIDE
68
pin assignments
logic symbol t
CTROIV 2
DUAL 4-BIT DECADE COUNTER
t>
High-drive outputs (lOL rated at 8 mA/16 rnA)
(14) lOA
(2) lOB
typical performance
(13) lOe
(3) 10 0
(7) 20A
(10) 20B
SN54LS68 (J,FH)
(5) 20 C
(12)
0
20
SN74LS68 (J,N,FN)
1
2
3
4
5
6
7
a
J. N PACKAGES
lClKA
9 2ClK
10 20a
lOB
2ClR
10 0
11
lClR
12 20 0
13 10C
20C
nc
14 lOA
15 lClKa
20A
GNO
16 Vce
FH. FN PACKAGES
1
2
3
4
5
6
7
a
9
10
nc
11
lClKA 12
13
lOa
10 0
14
15
lClR
nc
16
17
20C
nc
18
19
20A
GNO
20
nc
2ClK
20a
2ClR
20 0
nc
10c
lOA
lClKa
~,
VCC
,',
69
logic symbol t
DUAL 4-BIT BINARY COUNTER
pin assignments
CTROIV 2
t>
High-drive outputs (lOL rated at 8 mA/16 rnA)
typical performance
(2) lOB
(13) lOe
(3) 100
(7) 20A
(10) 20B
SN54LS69 (J,FH)
(5) 20c
SN74LS69 (J,N,FN)
(12) 200
1
2
3
4
5
6
7
a
J. N PACKAGES
lClKA 9
2ClK
10 20B
lOB
10 0
11
2ClR
1m
12 20 0
13 10C
20c
nc
14 lOA
15 lClKB
ZOA
GNO
16 VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
lClKA
lOB
10 0
lClR
nc
ZOC
nc
20A
GNO
11
12
13
14
15
16
17
IS
19
20
nc
2ClK
20B
2ITR
20 0
nc
10C
lOA
lClKS
VCC
,.'
-~ ".
tPin numbers shown on logic symbols are for J. JT and NT packages only.
TEXAS
INSTRUMENTS
3-25
'
PRODUCT GUIDE
logic symbol T
70
PRE !.ill...r::::..
AND-GATED J-K POSI'rIVE-
Jl~LJ
l!!...-
EDGE-TRIGGERED FLIP-FLOPS
J2
typical performance
IIII
TYPE
f max
'70
35 MHz
PWR!
SET-
FF
UP
HOLD
65mW 20 nst
5 nst
CLK
C2
Kl~LJ
!.l!L-
ern i&J::..
SN7470 (J,N)
J2A
PWR!
SET-
FF
UP
o nsf
o nst
80mW
30 MHz
3.8mW
HOLD
o ns.
o ns.
1J
!.l!L.!.!.&-
---
..., ----ill.. a
...,:::::.....J!L
1
2
3
4
5
6
7
AND CLEAR
G')
SN54L71 (J)
- ---- - - - - - - - - - - - - - - - - - --pin assignments, 'L71

J. N PACKAGES
logic symbol, 'L71 t
PRE
Sl
t:
a.
CD
~tJ
S2
l!!...-
SJ
..., ~a
~[J
~
..., ~a
CLK
R1
R2
R3
&
lS
~C1
1R
!.!.!.L
CLR ill....J:::.
.
.
positive logic: R = R1'R2'R3

S = 51'S2'83
t Pon numbers shown on logiC symbols are for J and N packages only.
nc -
3-26
J, N PACKAGES
J1A
8 Q
J1B
9 K1A
J2A
10 K1B
J2B
11
K2A
1m 12 K2B
Q
13 CLK
GND 14 Vce
(K1A-K1B)+(K2A'K2B)
SLAVE FLIP-FLOPS WITH PRESET
("')
,...
1K
'L71: ANDGATED RS MASTER
t:
VCC
positive logic: J - (J1A'J1B)+(J2A'J2B)
SN74H71 (J,N)
f------ - - - - - -
o
a.
K2B
Falling edge of clock pulse.
SN54H71 (J)
""'II
ill...- ~
J2B~
I--L.eLK~
K1A~ ~.& ~1
K1B~
K2A
t Rising edge of clock pulse .
I5Irr
ern
J1B~
typical performance
30 MHz
GND
K
K1
K2
CLK
FH PACKAGE
nc
11
nc
nc
12 Q
13 K
14 K1
J1
15 nc
5 nc
6 J2
16 K2
7 nc
17 nc
B J
18 CLK
9
19
10 GND 20 VCC
1
2
3
4
2R
PRE !2.L...J::::. S
J1A ~7r-;;;
SLAVE FlIPFLOPS WITH PRESET
'L71
9
10
11
12
13
14
~a
1K
logic symbol, 'H71t
'H71
C1R
J1
J2
J
= J1J2j"
K = K1K2j(
If inputs:; and K are not used, they must be grounded.
Preset or clear function can occur only when the clock input is low.
71
f max
nc
positive logic: J
'H71: AND-OR-GATED J-K MASTER
TYPE
1
2
3
4
5
6
7
K !2.!......r:::=
Falling edge of clock pulse.
SN5470 (J,FH)
~a
1J
~I>C1
K2
J, N PACKAGES
J~
t Rising edge of clock pulse.
"tJ
pin assignments
2S
TEXAS
INSfRUMENlS
1
2
3
4
5
6
7
nc
CLR
51
52
53
R1
R2
R3
CLK
GND
10
11
12
13
14
PRE
VCC
PRODUCT GUIDE
logic symbol t
72
ffi
AND-GATED J-K MASTER-SLAVE

FLIP-FLOPS WITH PRESET AND CLEAR
Jl
typical perf(lrmance
J2
PWR!
SET-
TYPE
f max
FF
UP
'72
20 MHz
50mW
'H72
30 MHz
80mW
o nst
o nst
o nst
'L72
3 MHz 3,B mW
J3
ClK
Kl
HOLD
o ns~
K2
o ns~
K3
ClR
o ns~
pin assignments
~s
~
~
~
]'J
---~}
1
2
-, --!!!.L Q
(12)
!!.!!.!..-
-,
~Q
J, N PACKAGES
nc
8 0
9 Kl
WI
3
4
Jl
J2
J3
0
GND
10
11
12
13
14
FH PACKAGE
nc
11
nc
12 0
nc
CLR
13 Kl
K2
K3
ClK
3
4
nc
PAt
6
7
J2
8
9
J3
0
VCC
!.!.!L-
!!L.r::..
1
2
10
Jl
nc
GND
14
15
16
17
18
19
20
K2
nc
K3
nc
ClK
VCC
positive logic: J = J1'J2-J3; K1'K2-K3
t Rising edge of clock pulse,

Falling edge of clock pulse,
SN5472 (J,FH)
SN54H72 (J)
SN54L72 (J)
SN7472 (J)
SN74H72 (J)
logic symbol' 73, 'H73, 'L73 t
73
.!!!L
(1)
DUAL J-K FLIP-FLOPS

WITH CLEAR
typical performance
TYPE
f max
PWR!
SET-
F-F
UP
'73
20 MHz
5mW
'H73
30 MHz
BOmW
'L73
3MHz 3.BmW
'LS73A 45 MHz
10mW
HOLD
o nst o nsi
o nst o nsi
o nst o nsi
20 nsi o ns~
..!!1...-
2C:K~
2K~
2ClR~
SN74LS73A (J,N)
-'~la
-'~2Q
pin assignments
J, N PACKAGES
1
2
3
4
5
6
7
lClK 8
laR 9
lK
10
VCC 11
2ClK 12
2ClR 13
14
2J
20:
20
2K
GND
10
111
lJ
logic symbol, 'LS73At

1J
.!!!L.
( )
lJ
~>Cl
lK~lK
SN7473 (J,N)
SN74H73 (J,N)
-'~lQ
-'~2Q
lClK

~ Falling edge of clock pulse.
SN5473 (J)
SN54H73 (J)
SN54L73 (J)
SN54LS73A (J
lJ
lJ
lClK~ Cl
l K 2 ! - lK
lClR~ R
J
El.....t:::.. R
E..!..2ClK ~>
2 K ..!.!.!!llClR
2J
2ClR~
~lQ
~la
~2Q
~2Q
TEXAS
INsrRUMENlS
3-27'
PRODUCT GUIDE
logic symbol t
74
pin assignments
1PRE.!!!....z::. s
1CLK &""t;>C1
10..!!L- 10
1ClR .!!L..t::.. R
2Pi'iE .ill!!..c.
2CLK ~t>
20 ..!.!.&.2ClR .ill!.t::..
DUAL DTYPE POSITIVEEDGE

TRIGGERED FLlpFLOPS WITH
PRESET AND CLEAR
~10
~1Q
r----ill 20
~2Q
typical performance
TYPE
PWRI
SET
FF
43mW
UP
20 nsl
125 MHz
6mW
26mW
15 nsl
4.5 ns I
43 MHz
75 mW
15 nsl
5 nsl
15 nsl
f max'
'74
25 MHz
'ALS74
'AS74
50 MHz
'H74
'L74
'LS74A
'S74
I
HOLD
5 nsl
o nsl
I
o ns
3 MHz
4mW
50 nsl
33 MHz
10mW
20 nsl
5 nsl
110 MHz
75 mW
3 nsl
2 nsl
Rising edge of clock pulse.
SN5474 (J,FHI
SN54ALS74 (J,FH)
SN7474 (J,N)
SN74ALS74 (N,FN)
SN54AS74 (J,FH)
SN74AS74 (N,FN)
SN54H74 (J)
SN74H74 (J,N)
SN54L74 (J)
SN54LS74A (J,FH)
SN74LS74A (J,N,FN)
SN54S74 (J,FH')
SN74S74 (J,N,FN)
"tJ
o"'"
c.
....
(')
G)
C
c:
CD
nc - QO Internal connection.
3-28
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
J. N PACKAGES
1m 8 21l
9 20
10
lClK 10 2PRE
lPRE 11 2ClK
10
12 20
10
13 2m
GNO 14 VCC
FH. FN PACKAGES
11 nc
1 nc
2 lClR 12 2Q
13 20
3 10
lClK 14 2PRE
4
15 nc
5 nc
6 lPRE 16 2ClK
17 nc
7 nc
18 20
8 10
19 2ail
9 11l
10 GNO 20 vcc
PRODUCT GUIDE
logic symbol t
75
1 0 i l l - 10
4-BIT BISTABLE LATCHES

typical performance
TYPE
OUTPUTS
'75
'L75
'LS75
1C,2C
DELAY
a,a
a,a
a,a
TOTAL
160 rnW
30 ns
80mW
11 ns
32mW
SN5475 (J)
SN54L75 (J)
SN54LS75 iJ)
C1
C2
20..llL- 20
30.ili- 3D
POWER
15 ns
lE!f:
pin assignments
~1Q
~1a
~2Q
~2a
J, N PACKAGES
1
2
3
4
C3
~3Q
~3Q
C4
40.l!L- 40
::::.....J!!L 4Q
7
8
3C,4C~
~4Q
10
40
1D
10
2D
11
3C,4C 12
VCC
3D
4D
4Q
30
30
GND
13
14
1C,2C
2Ci
20
10
15
16
SN7475 (J,N)
contact the factory,
SN74LS75 (J,N)
I
logic symbol, 76, 'H76 t
76
1~~S
1J~ 1J
DUAL J-K FLIP-FLOPS WITH

PRESET AND CLEAR
typical performance
TYPE
f max
PWR!
SET-
F-F
UP
'76
20 MHz
50mW
'H76
30 MHz
80mW
'LS76A
45 MHz
10mW
HOLD
o nst o ns~
o nst o ns~
20 ns~ o ns~

,J. Falling edge of clock pulse.
SN5476 (J)
SN54H76 (J)
SN54LS76A (J)
SN7476 (J,N)
SN74H76 (J,N)
SN74LS76A (J ,N)
1ClK
!.!L-
C1
1K
U&-
1K
1ClA.
ill......r::::.
2PRE~
2J~
2ClK ~
2K
2CLR
pin assignments
-'~1Q
-'~1a
5
6
-, f--lllL2Q
1CLR
2'PiiE
ill......r::::.
!!!........t::.
10
1K
Q)
S
1J
1K
r----!ill- 1Q
"'C
~1Q
(!)
'S
2J~
~~
2ClK
2K~
2ClR
GND
10
!!l-t::. ~C1
1K~
VCC 13
2CLK 14
2m 15
2aR 16
-'~2a
logic symbol, 'LS76A t
1C l K
!EL!!L.b.
1~!&.....t::=..
1J~
J, N PACKAGES
1CLK 9
2J
1PM 10 2il
3 1elR 11
20
4
1J
12 2K
1
2
J!L..J:::..
~2Q
~2a
TEXAS
INSTRUMENTS
3-29
PRODUCT GUIDE
77
logic symbol t
pin assignments
(14)
lQ
typical performance
OUTPUTS
DELAY
(13) 2Q
TOTAL
POWER
15 ns
160mW
30 ns
80mW
10'ns
35mW
(9)
3Q
(8)
4Q
SN5417 (J)
SN54L17 (J)
SN54LS17 (J)

78
DUAL J-K FLIP-FLOPS WITH
CLK
CLR
PRESET, COMMON CLEAR, AND

COMMON CLOCK
lME
typical performance
lJ
lK
2PRE
2J
2K
TYPE
f max
'H78
30 MHz
'L78
'LS78A
PWR!
SET-
F-F
UP
80mW
3MHz 3.8mW
45 MHz
10mW
HOLD
o nst OnH
o nst o ns~
20 ns~ o ns~

! Falling edge of clock pulse,
SN54H78 (J)
SN54L78 (J)
SN54LS78A (J)
...
."
Co
SN74H78 (J,N)
SN74LS78A (J,N)
(9)
lQ
10'
2Q
20'

(1)
CLK
J, N PACKAGES
lK
B 2K
10
9 ClK
fa
10 2P~
lJ
11- 2J
12 ClR
5 20
13 1m
6 20
GND
14 Vcc
7
1
2
3
4
pin assignments, 'L78, 'LS78A
CiJi
N PACKAGES
ClK
B 20
lPRE 9 20
10 2J
lJ
VCC 11 GND
5 ClR 12 10
6 2PRE 13 lQ
14 lK
7 2K
J,
lPRE
lQ
lJ
lK
2PRE
10'
2Q
20'
2J
c:
,..n
J, N PACKAGES
1 10
8 4Q
2 20
9 3Q
3 3C,4C 10 nc
4 VCC
11 GNo
5 3D
12 lC,2C
6 40
13 2Q
7 nc
14 lQ
2K
1
2
3
4
3-30
TEXAS
INSTRUMENTS
POST OFFICE 80X 225012 DALLAS. TEXAS 75265
PRODUCT GUIDE
A1~
A2~
GATED FULL ADDERS

typical performance
TYPE
'80
CARRY
ADD
POWER
TIME
TIME
PER BIT
10.5 ns
52 ns
105mW
SN5480 (J,FH)
NOTES:
= Ac
Be + S"
+ ;;:" + A1'A2, B
typical performance
'82
;;'1
&
(13)
B2~
B*~ I~- - -
CARRY
ADD
POWER
TIME
TIME
PER BIT
14.5 ns
25 ns
SN5482 (J)
87 mW
SN7482 (J,N)
PACKAGE
nc
11 nc
B' , 12 A1
13 A2
BC.
14 A'
Cn
nc
15 nc
Cn + 1 16 AC
nc
17 nc
18 81
I
19 B2
I
GND 20
VCC
FH
1
2
3
4
5
6
7
~y
10
BC......!!L..c:..
Cn~CI
CO~Cn+1
logic symbol t
2-BIT BINARY FULL ADDERS
~~
AC~
82
TYPE
1
2
3
4
5
6
B1~
PACKAGES
B'
B A1
9 A2
BC
cn
10 A'
c n + 1 11 AC
12 B1
I
I
13 B2
GND 14 VCC
J, N
I---
SN7480 (J,N)
1, A
pin assignments
~
;;'1
&
A*L ~
+ B1'B2
2, When A" is used as an input,
A1 or A2 must be low,
When B" is used as an input,
B1 or B2 must be low.
3. When A1 and A2 or B1 and
B2 are used as inputs, A" or
B" , respectively, must be
open or used to perform dotAND logic.
I.
logic symbol t
80
A1~
A2~
B1~
B2--.lJ1L
pin assignments
~{~
~}p
PACKAGES
I1
8 nc
A1
9 nc
10 C2
B1
VCC 11 GND
12 I2
CO
nc I 13 B2
14 A2
nc
J, N
~}Q
~L1
--1!3L~2
1
2
3
4
5
co ~C2
CO~CI
+J
CJ
:::J
A3~
typical performance
CARRY
ADD
POWER
TIME
TIME
PER BIT
'83A
10 ns
16 ns
76mW
'LS83A
10 ns
15 ns
24mW
TYPE
SN5483A (J)
SN54LS83A (J)
A1~
A2~
WITH FAST CARRY
SN7483A (J,N)
A4~
B1-.l!.!L
"'C
logic symbol t
83
pin assignments
} {
}
B2~
B3~
B4~
CO~ CI
PACKAGES
A4
9 I1
1513 10 A1
A3
11 B1
B3
12 GND
VCC 13 co
14 C4.
I2
B2
15
A2
16 B4,
J, N
1
2
3
4
5
6
7
8
~L1
.-!.2L L2
~~3
~ ~4
CO~C4
o
a..
1:4.
For new chip carrier designs, use 'LS283 or 'S283.
SN74LS83A (J,N)
nc -
TEXAS
INSTRUMENlS
3-31
PRODUCT GUIDE
logic symbol, '85, 'LS85, 'S85 t
85
4-BIT MAGNITUDE
po....lliL
COMPARATORS
Pl~
typical performance
TYPE
COMPARE
TIME
P2-1EL.
P3...1!a.
'85
21 ns
275 mW
'L85
82 ns
20mW
'LS85
23.5 ns
52mW
'S85
11.5 ns
365 mW
SN5485 (J,FH)
SN54L85 (J)
SN54LS85 (J,FH)
SN54S85 (J,FH)
01-lliL
02~
SN7485 (J,N)
03..J.1L
p=o
....lliL
-1!L
P3...1!a.
:}
o 1-lliL
(9)
01 ----'-02
--l..!L-
03~
"'C
.,
o
2-INPUT
Q.
EXCLUSIVE-
t:
OR GATES
C')
r+
TYPE
'86
'ALS86
'L86
'LS86
'S86
SN5486 (J,FH)
SN54ALS86 (J,FH)
SN54L86 (J)
SN54LS86 (J,FH)
SN54S86 (J,FH)
POWER
150mW
DELAY
14 ns
15mW
30mW
250mW
55 ns
10 ns
7 ns
SN7486 (J,N)
SN74ALS86 (N,FN)
SN74tS86 (J,N,FN)
SN74S86 (J,N,FN)
.!.!.I..-
1B~
2A (4)
(5j'-
P<O
~p<O
P=O
~p=o
=1
I
2
3
4
5
6
7
8
~1Y
~2Y
2B~
3A-
3B
~3Y
J!!1L
4A~
-..!!.!!.
4BllL
=1
ill..-
2B~
3A~
3B~
4A
..!2.!L-
4B~
4Y
7
8
nc
.00
PO
01
PI
nc
P2
02
P3
Vcc
J. N PACKAGES
02
9 01
P2
10 PO
P-Oout II 00
P>Oin
12 P<Oout
P<Oin
13 P>Oout
P=Oin
14 03
PI
15 P3
GND
16 VCC
pin assignments, '86, 'ALS86, 'LS86, 'S86

FH. FN PACKAGES
J. N PACKAGES
lA
lB
lY
2A
2B
2Y
GND
I
2
3
4
5
8
9
10
11
12
13
14
3Y
3A
3B
4Y
4A
46
VCC
I
2
3
4
5
6
7
8
9
10
~1Y
pin assignments, 'LaG
(4)
r---'- 2Y
~3Y
--..!2.!1.
4Y
positive logic: y a A 0 B-AB+AB
3-32
P>Oin
nc
P>Oout 17
P-Oout 18
P<Oout 19
GND
20
logic symbo.I, 'La6t
1A~
1B~
2A
P=Qin
II
12
13
14
15
16
P>O --i!!Lp>o
}
1A
FH. FN PACKAGES
nc
03
P<Oin
I
2
3
4
5
9
10
logic symbol, '86, 'ALS86, 'LS86, 'S86 t
typical performance
J. N PACKAGES
9 00
03
10 PO
P<Oin
II 01
P=Oin
P>Oin
12 PI
P>Oout 13 P2
P=Oout 14 02
P<Oout 15 P3
16 Vcc
GND
pin assignments, 'L85
P<O~ <
P=O~ =
P>O~ >
86
7
8
(5)
COMP
P1~
QUADRUPLE
~p=o
P>O - P > O
SN74S85 (J,N,FN)
P2
logic symbol, 'Last
SN74LS85 (J,N,FN)
PO
I
2
3
4
5
(7)
p<o - p < o
P<o~ <
P=o~
p>o~ >
OO~
POWER
pin assignments, '85, 'LS85, 'S85
COMP
TEXAS
INSTRUMENTS
J. N PACKAGES
1
2
3
4
5
6
7
lA
lB
1Y
2Y
2A
28
GND
8
9
10
II
12
13
14
3A
3B
3Y
4Y
4A
4B
VCC
nc
lA
1B
lY
nc
2A
nc
2B
2Y
GND
II
12
13
14
15
16
17
18
19
20
nc
3Y
3A
3B
nc
4Y
nc
4A
4B
VCC
PRODUCT GUIDE
87
typical performance
pin assignments
B
4-BIT TRUE/
1
2
COMPLEMENT,
ZERO/ONE
ELEMENTS
SN54H87 (J)
SN74H87 (J,N)
88
Al
A2
Yl
Y2
A3
Y3
Y4
A4
ROM 32XB
256-BIT READ-ONLY
AD (10)
Al (11)
(12)
typical performance
}f.
AQ
AQ
(1)
(2)
Ql
Q2
EN
SN54488A (J)
6
7
pin assignments
logic symbol t
MEMORIES
3
4
5
J, N PACKAGES
B B
C
A1
9 Y3
Y1
10 A3
nc
nc
11
A2
12 Y4
Y2
13 A4
GNO 14 Vcc
1
2
3
4
5
6
7
J. N PACKAGES
Q1
9
OB
02
03
04
05
06
07
GNO
10
11
AO
12
13
A2
A3
A1
14
A4
15
16
Vrr
SN7488A (J,N)
89
logic symbol t
64-BIT READ/WRITE
MEMORIES
AD (1)
Al (15)
typical performance
A2 (14)
pin assignments
1
J, N PACKAGES
AO
9 113
2
3
4
5
6
7
1i2
GNO
w7.
01
01
02
10
11
12
13
14
15
16
03
04
04
A3
A2
....,
A1
Vcc
(.)
~
SN7489 (J,N)
"'C
o
...
0.
t Pin numbers shown on logic symbols are for J and N pack~ges only.
nc -
TEXAS
INSTRUMENTS
3-33
PRODUCT GUIDE
logic symbol t
90
TYPE
FREQUENCY
RO( 21
CLEAR
TOTAL
POWER
'90A
32 MHz
HIGH
160mW
'l90
3 MHz
HIGH
20mW
'lS90
32 MHz
J, N PACKAGES
RO(11...ill.-
typical performance
COUNT
pin assignments
CTA
&
DECADE COUNTERS
HIGH
40mW
-ill-
R9(11~
R9( 21
t--&
Z3
....ill...~
CKA~ ~+
SN7490A (J,N)
SN5490A (J)
SN54l90 (J)
SN54lS90 (J)
CTEO
CKB
ROlli
ROl21 10
nc
11
5
6
VCC
12
R9111 13
nc
R9121 14
CKA
Qc
QB
GND
QD
QA
DIV2
(121
f-----QA
3CT=1
SN74lS90 (J,N)
~OB
DOV' {
~,Oc
CT
CKB....!.!l..t::. ~+
3CTc4
~OD
For new chip carrier designs, use '290 or 'LS290,
logic symbol t
91
CLK~ ~C1/""
typical performance
TYPE
"tJ
-,:
SHIFT
FREQUENCY
SERIAL
DATA
INPUT
..!!.!L
lllL f } D
GATED D 175mW
3 MHz
GATED D 17.5 mW
'lS91
25 MHz
J, N PACKAGES
~OH
~QH
2
3
4
5
6
POWER
10MHz
GATED D
TOTAL
'91A
'l91
SN5491A (J)
SN54l91 (J)
SN54lS91 (J)
pin assignments
SRGa
8-BIT SHIFT REGISTERS
nc
nc
nc
nc
nc
ClK
GND
B
A
QH
QH
10
11
VCC
12
nc
nc
13
14
60mW
SN7491A (J,N)
SN74lS91 (J,N)
C.
t:
or+
logic symbol t
92
DIVIDE-BY-12 COUNTERS
RO(1)
typical performance
TYPE
COUNT
FREQUENCY
RO(2)
CLEAR
CTR
J, N PACKAGES
CT=O
(7)
32 MHz
HIGH
160mW
'lS92
32 MHz
HIGH
39mW
SN7492A (J,N)
SN74lS92 (J ,N)
CKB
10
nc
no
nc
5
6
VCC
12
ROlli 13
nc
ROl21 14
CKA
TOTAL
POWER
'92A
SN5492A (J),
SN54lS92 (J)
(6)
pin assignments
&
CKA~ ~+
DIV2
~'OA
DIV3
~
(9)
B
CKB..JJl..c::. ~+
a
9
11
QD
Qc
GND
QB
QA
CTtZ4 ~OC
~4+
DIV2
~OD
For new chip carrier designs, use "LS292.
3-34
TEXAS
INSTRUMENTS
PRODUCT GUIDE
logic symbol, '93A, 'LS93 t
93
4-BIT BINARY COUNTERS
typical performance
TYPE
COUNT
FREQUENCY
CLEAR
TOTAL
RO(l)~
RO(2)~
'93A
32 MHz
HIGH
160mW
'L93
3 MHz
HIGH
20mW
'LS93
32 MHz
HIGH
39mW
3
4
n,v,
SN7493A (J,N)
SN74LS93 (J,N)
DIV2
CKA~ ~+
CKBJ.!.!....c:..
SN5493A (J)
SN54L93 (J)
SN54LS93 (J)
CT=O
POWER
pin assignments, '93A, 'LS93
eTR
&
>+
CT
~OA
~OB
6
7
J. N PACKAGES
CKB
8 Oc
ROil) 9 B
RO(2) 10 GND
nc
11
00
VCC 12 OA
nc
13 nc
nc
14 CKA
(8)
r---OC
2 ......ll.!LOD

CTR
&
~O(l).lll..-
CT=O
1
2
RO(2)~
T
CKA~ ~+
DlV2
n,v,
CKBJ!!L:..
>+
CT
~OA
~OB
3
4
5
6
7
J. N PACKAGES
ROil) 8 CKB
RO(2) 9 Os
nc
VCC
nc
nc
nc
10
11
12
Oc
GND
13
14
A
CKA
00
~Oc
r--illL- aD
For new chip carrier designs, use '293 or 'LS293.
logic symbol t
94
PEl
(DUAL ASYNCHRONOUS
CLR...D&-
typical performance
TYPE
FREQUENCY
'94
SERIAL
DATA
INPUT
10 MHz
SN5494 (J)
G2
TOTAL
SER
..lZL-
CLEAR
POWER
P1A
...llL..-
SN7494 (J,N)
175 mW
3
4
~I>C3/"'"
ASYNC
HIGH
1
2
Gl
ClK
5
6
7
3D
lS
P2A~
2S
P1B
.EL-
lS
P2B
-lliL
2S
J. N PACKAGES
PIA
9 00
PIS
10 ClR
11
PIC
P2D
PID
12 GND
VCC 13 P2C
PEl
14 P2B
SER
15 PE2
ClK
16 P2A
Ell
P1C~
P2C
PlD
P2D
l2L-
PE2~
PRESETS)
SHIFT
pin assignments
SRG4
....!.11LJ.&.J.!.!L
~OD
nc -
TEXAS
INSTRUMENTS
3-35
PRODUCT GUIDE
95
SRG4
MODE
(PARALLEL IN/PARALLEL OUT,
CLKl
SERIAL INPUT)
CLK2
SER
typical performance
A
SERIAL
SHIFT
TYPE
'95A
~ t> lC3/l-+
.!!!....r::..t> 2C4
~rL-,~30.......- -...r...~
ill.-
195mW
'LS95B
3MHz
19mW
~Oc
~Qo
30MHz
65mW
L...-_ _- ' -_ _ _ _ _- ' -_ _ _..l-_ _----'
SN5495A (J,FH)
SN7495A (J,N)
SN54AS95 (J,FH)
SN74AS95 (N,FN)
ClK2
~>2C4
SER
SN74LS95B (J,N,FN)
.!.!L-r"'~30--_.&r"'l ( )
~
40
TYPE
SHIFT
FREQUENCY
'96
10MHz
r+
DATA
INPUT
0
5 MHz
'LS96
10 MHz
SN5496 (J)
SN54L96 (J)
SN54LS96 (J)
J. N PACKAGES
..!..!L- ~ Cl/-+
.!.!!L-
.,
G2
BINARY RATE MULTIPLIERS

typical performance
I POWER IFREQ*
345 mW 132 MHz
'" Maximum clock frequency
4
5
6
C
VCC
E
PE
CLEAR
POWER
LOW
240mW
LOW
120mW
LOW
60mW
9
10
11
12
13
14
15
16
SER
DE
00
GNO
DC
06
OA
ClR

pin assignments
cu~~,~" tal
ENABLE.!.!.!.Lbo
UNITY/CA~ ~
CLR
-#.<--
Bll!LBO.!!LB2
ill!-
B3
B5
EL-
J. N PACKAGES
9 ClK
3
4
Bl
B4
B5
BO
STROBE~ ~Gl
B4~
V3
ENout
CT-G
GND
2 CT-63
ENABLE
J~;ATEI
5
~~---~
3-36
TOTAL
logic symbol t
SN5497 (J.FH)
SN7497 (l,N)
ClK
A
ASYNC
SN74LS96 (J,N)
SYNCHRONOUS 6-BIT
1
2
SN7496 (J,N)
97
'97
CLK
PE
pin assignments
SRGS
CUi ~
SERIAL
'L96
TYPE
logic symbol t
typical performance
""CJ
QA
~ Qo
o llli.-
o
c.
c(")
4
5
6
~~
c1!L
96
8
9
10
N PACKAGES
SER
8 ClK2
B
9 00
C
10 Oc
VCC 11 GNO
0
12 DB
MODE 13 QA
ClKl 14 A
1
2
A.!.!!L 40
B.!!L.-
Oc
OB
OA
VCC
FN PACKAGES
nc
11 nc
SER 12 ClK2
A
13 ClKl
14 00
B
nc
15 nc
C
16 Oc
nc
17 nc
0
18 DB
MODE 19 OA
GNO 20 VCC
J,
M2 [lOAD)
L.t::. ~Ml
[SHIFT)
.!!L.t:..
lC3/l-+
00
1
2
3
4
5
6
......S""'IR""G""4-....
ClKl
SN54L95 (J)
SN54LS95B (J,FH)
ClK2
ClKl
MODE
8
9
10
11
12
0
MODE 13
GNO 14
40
'L95
QA
SER
A
B
C
~~'~40"""'--~~QB
'AS95
~H.
J. N PACKAGES
1
2
3
4
5
6
M2 [lOAD)
Ml [SHIFT)
C~
O~
POWER
INPUT
25 MHz
TOTAL
DATA
FREQUENCY
Lr::..
SHIFT RIGHT, SHIFT LEFT,
pin assignments, '95A, 'LS95B
logic symbol, '95A, 'AS95, 'LS95Bt
TEXAS
INSTRUMENTS
10
11
12
13
14
15
16
STRB
EN in
UNITY/CAS
ClR
B2
B3
VCC
FH PACKAGE
11 n<:
12 ClK
13 STRB
14 ENin
15 UNITY/CAS
16 nc
17 ClR
Z
18 B2
Y
ENout 19 B3
OND
20 VCC
1 nc
2 Bl
3 B4
4 B5
5 so
6 nc
7
8
9
10
PRODUCT GUIDE
98
logic symbol t
4-BIT DATA SELECTOR/
ws
..
pin assignments
--~-
STORAGE REGISTERS
J, N PACKAGES
elK
typical performance
A2
WS
AI
10
CLK
Bl
11
B2
12
00
01
Cl
13
Oc
C2
14
OB
02
15
OA
GNO
16
Vce
SN54L98 (J)
00
99
logic symbol t
pin assignments
4-BIT BIDIRECTIONAL
J, N PACKAGES
UNIVERSAL SHIFT REGISTERS
typical performance
TYPE
'L99
SHIFT
FREOUENCY
3MHz
SERIAL
TOTAL
DATA
POWER
INPUT
19mW
J-K
ClKl
ClK2
00
3
4
10
11
12
Oc
5
6
VCC
0
13
14
OB
MODE 15
CLKI
16
aD
GNO
OA
K
SN54l99 (J)
Oc
00
00
.....
(J
100
logic symbol t
pin assignments
"'C

typical performance
J, N PACKAGES
13 nc
1 nc
14 nc
101
2
3
15
203
102
101
16
17
204
204
18
203
19
103
201
20
104
202
21
104
10
202
22
103
11
201
23
lC
12
2C
24
VCC
5
6
SN74100 (J,N)
102
nc
GNO
SN54100 (J)
CLK2
1
2
c.

nc -
TEXAS
INSTRUMENlS
3-37
PRODUCT GUIDE
pin assignments
101
AND-QR-GATED J-K NEGATIVE-EDGE-
PRE
TRIGGERED FLIP-FLOPS WITH PRESET
J1A
J1B
typical performance
! Falling edge of clock pulse
SN54H101 (J)
SN74H101 (J,N)
J. N PACKAGES
J1A
8 0
J1B
9 K1A
J2A
10 K1B
J2B
11
K2A
PM 12 K2B
0
13 ClK
GND 14 VCC
1
2
1J
J2A
(6)
J2B
ClK
(8)
K1A
K1B
K2A
K2B
1K
(Jl A Jl B) + (J2A' J2B)

(K1A K1B) + (K2A K2B)
positive logic:
K
pin assignments
102
AND-GATED J-K NEGATIVE-EDGETRIGGERED FLIP-FLOPS WITH
PRESET AND CLEAR
typical performance
PRE
1
J1
J2
J3
1J
ClK
K1
K2
K3
(8)
(6)
<l
3
4
5
6
7
1K
J. N PACKAGES
nc
B 0
ClR
Kl
9
Jl
10 K2
J2
11
K3
12 CLK
J3
0
13 PRE
GND 14 VCC
ClR
positive logic:
K
Jl . J2 J3
Kl K2 K3
"C
~
0
C.
t:
(')
r+
pin assignments
103
G')
t:
DUAL JK NEGATIVE-EDGETRIGGERED FLIP-FLOPS
c:CD
WITH CLEAR
J. N PACKAGES
1J
1ClK
1K
10
10
1CLR
2J
2ClK
2K
typical performance
20
20
2CLR
! Falling edge of clock pulse
SN54H103 (J)
SN74H103 (J,N)
nc -
3-38
1
2
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 DALlAS. TEXAS 75265
3
4
5
6
7
1ClK
20
lCLR
20
8
9
lK
10
VCC 11
2CLK 12
2ClR 13
2J
14
2K
GND
10
10
lJ
PRODUCT GUIDE
104
PRE~

FLIP-FLOPS
typical performance
TYPE
1 '104
pin assignments
logic symbol t
PWR
I S~;- I
1 75 mW 110 nsl 1
SN54104 (J,FHl
HOLD
o nsl-,
J1~
J2~
J3~
IJ
:~ ~
~a
K1
10
FH PACKAGE
11
NC
NC
JK
12
K2
PRE
13
ClK
J1
11
K3
K1
14
K2
J2
12
J3
NC
15
NC
13
ClR
J1
16
K3
GND
14
Vec
NC
17
JK
(3)
K1--(10)
K2(11)
K3-
SN74104 (J,Nl
2
3
4
J. N PACKAGE
JK
8
il
PRE
ClK
9
NC
J2
18
J3
19
ClR
10
GND
20
VCC
FH PACKAGE
11
NC
~a
IK
CLK~
CLli~
C1
positive logic:
J = J1J2J3
K = K1K2K3
105
logic symbol t
PRE

FLIP-FLOPS
typical performance
TYPE
1 '105
PWR
SETUP
I I
HOLD
1 85 mW 110 nsl , 0 nsl
SN54105 (J,FHl
SN74105 (J,Nl
J!!...t::..
J1~
J2~
J3~
pin assignments
5
1
&
(6)
~a
JK~ -
I-&
~a
K1~
Ki~
K3~
CLK~
CLR~
J. N PACKAGE
JK
8
NC
I'm'
ClK
JK
12
3
4
K1
10
ia
PRE
13
elK
J1
11
K3
K1
14
J2
12
NC
15
NC
13
J3
ClR
J1
16
K3
K2
GND
14
Vce
NC
17
NC
18
19
J2
ClR
10
GND
20
Vee
.pi
CJ
::l
"'C
..
0.
~
C1
positive logic:
J = J1.J2J3
K = K1K2K3
tPin numbers shown on logic symbols are for J and N packages only.
NC -
TEXAS
INSTRUMENTS
3-39'
PRODUCT GUIDE
logic symbol t
106
DUAL JK NEGATIVEEDGE
lJ
lCLK
TRIGGERED FLlPFLOPS WITH

PRESET AND CLEAR
TYPE
f max
, PWR! 'SET.'
,
F.F
UP
HOLD
I'Hl06150 MHz 1100 mW 113

~
ns~1
ns~
Failing edge of clock pulse
SN54H106 (J)
!!.!.....t::..
lJ
)Cl
lK
R
lCLR~
2PRE~
2J~
2CLK~ )
2K
2ClR
!1&!&..l::..
DUAL JK FLlPFLOPS
typical performance
f max
PWR!
SET
FF
UP
'107
20 MHz
50mW
'LS107A
45 MHz
10mW
HOLD
o nst o ns~
o ns~
20 ns~
lJ
11L-
lCLK
lK
!!&ill--
lClR~
2J~
2CLK~
2K
lJ
Cl
lK
R
.!.l!L-
2Ci:R~
t Rising edge of clock pulse

.j. Falling edge of clock pulse
(1)
SN74107 (J,N)
lJ ~ lJ
SN54107 (J,FH)
SN74LS107A (J N FN) lCLK
~Cl
SN54LS107A (J,FH)
, ,
lK ill-- lK
...
~"a
~20
2J~
2ClK~~
r+
2CLR~
2 K .!l!.L.:..
4
6
7
8
9
10
11
12
13
14
15
16
2J
20
20
2K
GND
1ll
10
lK
pin assignments
J. N PACKAGES
-, --ill...
10
-'~la
-'~20
-'~2a
1
2
3
4
5
6
7
lJ
10
10
1K
20
20
GND
8
9
10
11
12
13
14
2J
2ClK
2ClA
2K
lClK
lClA
VCC
4
5
6
7
8
9
~10
~la
~20
~2a
I:
c:
CD
TEXAS
INSTRUMENTS
PACKAGES
11 nc
12 2J
13 2CLK
14 2m
15 nc
16 2K
17 nc
18 lCLK
19 lctJf
GND 20 VCC
FH. FN
1
2
10
G)
340
lClK
1 PRE.
lClA
lJ
VCC
2ClK
2PRE
2ClA
~2a
lClR.!El...t::.. R
Co
I:
(")
J. N PACKAGES
1
2
logic symbol, '107 t
WITH CLEAR
"tJ
~10
SN74H106 (J,N)
107
TYPE
!#----
lK~
typical performance
,
pin assignments
l~~S
nc
lJ
10
10
nc
lK
nc
20
20
PRODUCT GUIDE
108
pin assignments
J, N PACKAGES
lK
8 2K
10
9 ClK
10
10 2PRE
lJ
11 2J
20
12 ClR
6 20
13 lPRE
7 GND 14 VCC
1
2
3
4
5
TRIGGERED FLlpFLOPS WITH

PRESET, COMMON CLEAR, AND
COMMON CLOCK
typical performance
Falling edge of clock pulse
SN54Hl08 (J)
SN74Hl08 (J,N)
pin assignments
109
DUAL J.i{ POSITIVEEDGETRIGGERED
FLIp FLOPS WITH PRESET AND CLEAR
typical performance
TYPE
'109
'ALS109
'AS109
'LS109A
f max
33
50
125
33
MHz
MHz
MHz
MHz
PWRI
FF
45 mW
6mW
29 mW
10mW
3
4
5
SET
HOLD
UP
10 nsf 6 nsf
nsf
15 nsf
4.5 ns t o ns t
20 nsf 5 nsf
J. N PACKAGES
leLA 9 20:
lJ
10 20
lK
11 215'FfE
lClK 12 2ClK
ll5'FfE 13 2i<
14 2J
10
10
15 2ClR
GNO 16 VCC
FH. FN PACKAGES
11 nc
1 nc
lClR 12 20
13 20
3 lJ
14 2PRE
4 Ii<
5 lClK 15 2ClK
16 nc
6 nc
7 lPRE 17 2K
18 2J
8 10
19 2ClR
9 10:
10 GNO 20 Vee
2
SN54109 (J,FH)
SN54ALS109 (J,FH)
SN54AS109 (J,FH)
SN54LS 1 09A (J,FH)
SN74109 (J,N)
SN74ALS109 (N,FN)
SN74AS109 (N,FN)
SN74LS 1 09A (J,N,FN)
.....
(.)
pin assignments
110
ANDGATED JK MASTER-SLAVE
FLlPFLOPS WITH DATA LOCKOUT
PRE
J1
1J
J2
J3
typical performance
ClK
Kl
K2
K3
CLR
SN54110 (J)
positive logic:
SN74110 (J,N)
...,
(8)
...,
(6)
1K
J. N PACKAGES
nc
8 0
ClR
9 Kl
Jl
10 K2
J2
11 K3
12 elK
J3
13 PRE
0
7 GNO 14 VCC
1
2
3
4
5
6
::l
"'C
...o
0...
J1 J2 J3
K1 K2 K3
nc -
TEXAS
INSTRUMENTS
3-41
PRODUCT GUIDE
logic symbol t
111
lPRE~
DUAL JK MASTER-5LAVE FLIP
1J~lJ
FLOPS WITH DATA LOCKOUT
'111
f max
PWR/
FF
I I I
SET
UP
HOLD
2PRE.llilJ::::..
2Jl!&.-
2K~
2crn~
SN74111 (J,Nl
1
2
3
lil
1J~lJ
lCLK .!1l...I::::. > C1
PRESET AND CLEAR

typical performance
f max
'ALS112A 40 MHz
'AS112
200 MHz
'LS112A
45 MHz
'S112
125 MHz
~10
~,.o
lK
.!&-
2PRE
.!1.!!LI::::..
.l.!!L
~20
.!!&.-
~2a
lK
lm~R
PWRI
SET
HOLD
UP
FF
6mW 25 ns~ o ns~
95 mW
10mW 20 ns~ o ns~
3 ns~ o ns~
75 mW
2J
2CLK
2K
20
2CLK
2J
2CLR
2~
2K
Vcc
pin assignments
lPRE~ s
TRIGGERED FLlPFLOPS WITH
lPRE 10
lClR 11
12
lClK 13
14
lTI
10
15
GND 16
"~2a
logic symbol t
112
J. N PACKAGES
lK
9 20
1J
5
6
7
8
., r----l& 20
2CLK.!!ll- >
TYPE
., ::::.....ill.
1K..l.!L- 1K
1cLR.ill..t:.. R
1 25 MHz 1 70 mW 1 0 nst 130 nst 1
SN54111 (Jl
., .....,J1L 10
1CLK~>C1
typical performance
TYPE
, pin assignments
S
~>
~CLR~
J. N PACKAGES
1
2
3
4
5
6
7
8
lCLK
lK
lJ
lfSFit
10
10
20
GND
9
10
11
12
13
14
15
16
20
2m
2J
2K
2ClK
2ClR
lCTIi
Vee
FH, FN PACKAGES
1 nc
11 nc
2 lCLK 12 20
3 lK
13 2PRE
4 lJ
14 2J
5 1PRE 15 2K
6 nc
16 nc
7 10
17 2ClK
8 10
18 2ClR
9 21)
19 lCCR
10 GND 20 VCC
I Falling edge of clock pulse
...
"'tJ
SN54ALS 112A (J,FHl

SN54AS112 (J,FH)
SN54LS112A (J,FH)
. SN54S112 (J,FH)
SN74ALS112A (N,FNl
SN74AS 112 (N.FN)
SN74LS112A (J,N,FN)
SN74S 112 (J,N,FN)
Co
r:::
C')
P"+
logic symbol t
113
TRIGGERED FLlPFLOPS
f max
'ALS113A 40 MHz
'AS113
.200 MHz
'LS113A
45 MHz
'S113
125 MHz
1K~ lK
~lil
2~~
typical performance
TYPE
~10
lCLK~ >C1
WITH PRESET
PWRI
SET
HOLD
FF
UP
6mW 25 ns~ o ns~
95 mW
10mW 20.ns~ o ns~
3 ns~ o ns~
75 mW
pin assignments
1~ .lli...J::::.. s
lJ~ lJ
2J
2CLK
2K
.!!.1L
..!W.t::.. >
J2!L
~20
2il
I Falling edge of clock pulse

SN54ALS 113A (J,FH)
SN51AS113 (J,FHI
SN54LS113A (J,FH)
SN54S113 (J,FH)
SN74ALS113A (N,FN)
SN71AS113 (N,FN)
SN74LS113A (J,N,FN)
SN74S113 (J,N,FN)
3-42
TEXAS
INSTRUMENTS
J. N PACKAGES
1
2
3
4
5
6
7
lClK
lK
8
9
1J
10
lPRE 11
10
12
10
13
GND 14
20
20
2PRE
2J
2K
2CLK
Vec
FH. FN PACKAGES
1 nc
11 nc
2 lClK 12 20
3 lK
13 20
4 lJ
14 2PRE
5 nc
15 nc
6 lPRE 16 2J
7 nc
17 nc
8 10
18 2K
9 10
19 2ClK
10 GND 20 VCC
PRODUCT GUIDE
logic Iymbol t
114
DUAL JK NEGATIVEEDGETRIGGERED
FLlpFLOPS WITH PRESET, COMMON CLEAR,
AND COMMON CLOCK
typical performance
SET
PWRI
HOLD
TYPE
f max
UP
FF
'ALSl14A 40 MHz
6mW 25 ns~ o ns~
'ASl14
200 MHz 95 mW
'LSl14A
45 MHz 10mW 20 ns~ Q ns~
3 ns~ o ns~
'Sl14
125 MHz 75 mW
~
pin assignments
CLR~
ClK
(131
J. N PACKAGES
lrn~S
2J
.ill..l&..illl..c.
.!l.!L-
2K
ill!.-
lJ
lK
2m
lClA
~la
1li
Cl
1J
1K
:::a......ill.
~2a
::......!!l.
FH. FN PACKAGES
1
nc
11
nc
20
1K
20
lelA 12
20
3
4
lJ
10
2PAE
1K
13
20
lPAE
11
2J
3
4
1J
14
2PAE
10
12
2K
nc
15
nc
10
13
elK
lPAE
16
2J
GNO
14
Vee
nc
17
nc
2li
16
2K
10
19
elK
10
GNO
10
20
VCC
Falling edge of clock pulse
SN54ALSl14A (J,FH)
SN54AS 114 (J,FH)
SN54LS114A (J,FH)
SN54S114 (J,FH)
SN74ALSl14A (N,FN)
SN74ASl14 (N,FN)
SN74LS114A (J,N,FN)
SN74S114 (J,N,FNI
logic symbol t
116
1m (1)
DUAL 4BIT LATCHES
lCl (21
typical performance
I I
TYPE
1'116
BITS
I
I
SN54116 (J,FH)
Cl
lC2 (31
CLEAR
DELAY
I :~:~~ I
lDl~lD
LOW
11 ns
1 250 mW I
1D2A-
SN74116 (J,NI
pin assignments
R
&
~lal
~lQ2
~lQ3
~la4
lD3~
1D4~
2CLR (13)
R
&
2Cl (141
2C2 (151
Cl
2Dl~lD
2D2~
2D3~
2D4~
J. N PACKAGES
lClA 13 2elA
FH PACKAGE
nc
2elA
2i::l
1
2
nc
1<::1
201
3
4
lC2
16
2C2
201
101
19
201
202
101
20
lCl
14
2Cl
lC2
15
2C2
101
16
101
17
102
16
15
lelR 16
17
201
102
19
202
102
21
202
103
20
203
nc
22
nc
9
10
103
104
21
22
203
204
9
10
102
103
23
24
202
203
11
104
23
204
11
103
25
203
12
GNO
24
VCC
12
104
26
204
13
104
27
204
14
GNO
26
Vee
.-J.!!L 201
-1!!!L2Q2
..,
--ll1L2Q3
CJ
~2Q4
::s
"'C
o
...
c..
t Pin numbers shown on logic symbols are for

nc -
J and N packages only.
TEXAS
INSTRUMENTS
POST OFFiCe BOX 225012 DALLAS. TexAS 75265
3-43
PRODUCT GUIDE
logic symbol t
120
ISI~
typical performance
TYPE
ENABLE
COMP
FREQ
'INPUT
OUTPUT
RANGE
YES
'120
OCto
YES
30 MHz
POWER
255mW
SN74120 (J,N)
SN54120 (J,FH)
pin assignments
lR~R
DUAL PULSE SYNCHRONIZERS/DRIVERS
1M
2Y
nc
11
nc
lSI
10
2Y
1M
12
2Y
152
11
2C
lSI
13
2Y
lR
12
2R
152
14
2C
lC
13
2S1
lR
15
2R
55
lY
14
252
nc
16
nc
1.38
lY
15
2M
lC
17
251
GND
16
VCC
lY
18
252
Z2
8 G1 /
IS2~
Z5~IY
~IY
4R
lC~
FH PACKAGE
J. N PACKAGES
&
SR
G3
28
lM~
10
lY
19
2M
GND
20
VCC
Z4
2R~
2S1~
252
~2Y
..lliL-t:.
~2Y_
2C~
2M~
logic symbol t
121
A1~
MONOSTABLE MULTIVIBRATORS
A2~
typical performance
TYPE
...
OUTPUT
NO. OF INPUTS
HI
PULSE
LO
RANGE
o
c.
c
TOTAL
POWER
40 n5-28 5 90mW
(9)*
40 n5-28 5 40mW
R int
c.
CD
~a
~Q
RXI
CX
(11)*
Cext Rext/Cext
'L 121
logic symbol t
A1.!.!l.....t::..
E!....J:::,.
B1~
B2~
A2
Will not trigger from clear
crn~
0&
R
(9~*
typical performance
DIRECT
HI
LO
CLEAR
OUTPUT
PULSE
RANGE
CX
nc
Al
10
Rint
Cext
Rextl
A2
11
12
nc
13
nc
GND
14
Vcc
c ext
pin assignments
1
~a
~a
RXI
CX
J. N PACKAGES
'8 Q
Al
A2
Bl
10
B2
11
CLR
12
13
FH. FN PACKAGES
RINT
nc
CEXT
nc
Rex!1
nc
11
Al
12
A2
13
Bl
14
Rint
nc
GND
14
VCC
TOTAL
nc
15
nc
B2
16
c ex !
nc
17
CLR
18
19
GND
20
10
YES
45 n5- OO
115mW
YES
90n5- oo
55mW
'LS122
YES
45 ns- Oo
30mW
'122 Rint = 10 kn nominal

'L 122 Rint
= 20 kn' nominal
'LS122 ... Rint
SN74122 (J,N)
SN74LS122 (J,N,FN)
TEXAS
INSTRUMENTS
10
nc
nc
Rex!1
Cext
POWER
'122
nc
Cext
Cext Rext/Cext
3-44
nc
(11)* (13)*
Rint
'L122
SN54122 (J,FH)
SN54L122 (J)
SN54LS122 (J,FH)
2
3
=2 kn nominal
Rint =4 kn nominal
Il.
I>
RI
NO. OF INPUTS
'121 Rint
Up to 100% duty cycle
TYPE
(6)
I>
SN74121 (J,N)
MULTIVIBRATORS WITH CLEAR
5.
(10)~
'121
RETRIGGERABLE MONOSTABLE
G)
CX
RI
122
n
r+
J. N PACKAGES
IJ
'L121
SN54121 (J)
SN54L121 (J)
'"tJ
B~
0&
pin assignments
1.n.
~n ncmin::!
VCC
PRODUCT GUIDE
logic symbol t
123
DUAL RETRIGGERABLE MONO(11
,.."
1A
STABLE MUL TIVIBRATORS
1B~
t>
~1a
WITH POSITIVE AND NEGATIVE INPUTS AND DIRECT

CLEAR
typical performance
OUTPUT
TYPE
PULSE
RANGE
1Cext~
1 Rext/Cext ~
2A (9)
(10)
2B
TOTAL
POWER
'123
45 ns-oo
230mW
'L123
90 ns- oo
115mW
LS123
45 ns- oo
60mW
SN54123 (J,FH)
SN54L123 (J)
SN54LS123 (J,FH)
.r.:::::: 7-
1CLR (3)
'
....
1
2
3
18
lClA
III
..n.
&
20
2C.xt
2RBxt /C Bxt
GND
5
6
7
RX/CX
I>
2CLR~ ~
10
11
12
13
14
15
16
"-
CX
2R ex t /Cext
(7)
... ,
RX/CX
~2a
SN74LS123 (J,N,FN)
pin assignments
OSC VCC
---D..
n
typical performance
FREQ
POWER
1 Hz to
525mW
SN74S124 (J,N,FN)
J. N PACKAGES
1(15)
-~
1 EN
(3)
1 RNG
RNG
(2)
1FC~ FC
INPUTS I
SN54S124 (J,FH)
lR Bxt /C. x t
VCC
FH. FN PACKAGES
nc
11 nc
lA
12 2A
18
13 28
letR
14 2CLR
10
15 2Q
nc
16 nC
20
17 10
16 lC ex t
2C. xt
/C
19
2R ex t ext
1 Rext/Cext
GND
20 vcc
SN74123 (J,N)
OSCILLATORS WITH ENABLE
60 MHz
10
lC. xt
10
logic symbol1:
RANGE
28
2CLR
ro
1
2
3
4
5
6
7
~2a
(6)
DUAL VOL TAGEoCONTROLLED
'S124
J. N PACKAGES
lA
9 2A
~1a4
CX
2Cex t
124
TYPE
pin assignments
..n.
&
1CX1~
CX
5V
[aScI
1CX2~ ex
2EN~
2RNG~
2 FC
1Y
2FC
lFC
lRNG
lCXl
lCX2
lEN
lY
OSC GND
10
11
12
13
14
15
16
GND
2Y
2EN
2CXl
2CX2
2RNG
OSC VCC
VCC
,1
2
3
4
5
6
7
8
9
10
FH. FN PACKAGES
nc
11 nc
2FC
12 GND
lFC
13 2Y
lRNG
14 2EN
lCXl
15 2CXl
nc
16 nc
lCX2
17 2CX2
lEN
18 2RNG
lY
19 OSC VCC
OSC GND 20 VCC
~2Y
.!!!...1L
2CX1~
2CX2~
IG
1
2
3
4
5
6
7
8
OV
[ascI
,I
(8)
...,
(.)
OSC GND
:::J
"C
...o
a..
TEXAS
INSTRUMENTS
3-45
PRODUCT GUIDE
'logic symbol, '125 t
125
lei
lA
QUADRUPLE BUS BUFFER GATES

WITH THREESTATE OUTPUTS
DELAY
10 ns
ill-
MAX
MAX
3G .llID..J:::,.
SOURCE
SINK
3A l!L4G .!..!.lli:::..
CURRENT CURRENT
SN54125
-2mA
pin assignments
1
EN
16mA
4A~
~2Y
~3Y
~4Y
SN74125
10 ns
-5.2 mA
16mA
SN54LS125A
8 ns
-1mA
12mA
lG~
SN74LS125A
8 ns
-2.6mA
24 mA
SN74125 (J.N)
SN74LS125A (J.N,FN)
1A~
FH. FN PACKAGES
lG
3Y
nc
11
lA
3A
lG
12
lY
2(;
10
3(;
lA
13
3A
11
4Y
lY
14
3G
2A
12
4A
nc
15
nc
2(;
16
4Y
nc
17
nc
2A
18
4A
2Y
19
4G
GND
20
Vee
2Y
13
4G
GND
14
Vr.r.
EN
11:>
10
nc
3Y
'V~1Y
2G~
~2Y
2A~
3G~
3A~
4G~
4A
J. N PACKAGES
1
2
SN54125 (J.FH)
SN54LS125A (J,FH)
'V~1Y
2ei~
2A~
typical performance
TYPE
.!!!....t::..
~3Y
~4Y
..!E!.-
positive logic: yeA
126
1G~
QUADRUPLE BUS BUFFER GATES
lA~
2G~
WITH THREE-5TATE OUTPUTS

typical performance
MAX
..o
TYPE
DELAY
SN54126
10 ns
SOURCE
MAX
SINK
CURRENT CURRENT
"'C
c.
c::
(')
r+
C')
-2mA
16mA
SN74126
10 ns
-5.2 mA
SN54LS126A
8.5 ns
-1mA
12mA
SN74LS126A
8.5 ns
-2.6 mA
24mA
SN54126 (J.FH)
SN54LS126A (J.FH)
c::
16mA
SN74126 (J.N)
SN74LS126A (J.N.FN)
EN
pin assignments
'V~1Y
~2Y
2A~
3G~
3A~
.-!!!!.
3Y
4G .iEL
4A J..gL
--.!!!!..
4Y

1G
.!.!!.....-
2G
.!!L-
1A~
EN
1[>
'V~1Y
2A~
4A
.!El.-
~2Y
~3Y
~4Y
positive logic: yeA
3-46
FH. FN PACKAGES
lG
3Y
nc
11
nc
lA
3A
lG
12
3Y
lA
13
lY
10
3G
2G
11
4Y
lY
14
3G
2A
12
4A
nc
15
nc
2Y
13
4G
2G
16
4Y
GND
14
Vee
TEXAS
INSTRUMENTS
3A
nc
17
nc
2A
18
4A
2Y
19
4G
GND
20
Vec
10
3G~
3A~
4G~
c:
CD
J. N PACKAGES
1
2
PRODUCT GUIDE
logic symbol t
128
LOW
HIGH
LEVEL
LEVEL
DELAY
2A~
2B~
3A~
3B~
OUTPUT
OUTPUT
4A...J.!.!L
(12)
4B-
CURRENT CURRENT
SN54128
48 rnA
-29 rnA
7 ns
SN74128
48 rnA
-42.4 rnA
7 ns
SN54128 (J,FH)
;;'1[>
~2Y
c~ -
A - BO
(2)
B-
address register and incorporates

2 enable inputs to simplify cascading)
typical performance
Gl~
G2~
CLOCK
TO
OUTPUT
8.5 ns
ENABLE
TOTAL
TIME
POWER
FHPACKAGE
1
nc
11
nc
1A
3B
1Y
12
1B
10
3Y
1A
13
3B
2Y
11
4A
18
14
3Y
3A
2A
12
4B
2B
13
4Y
2Y
16
4A
GND
14
VCC
nc
17
nc
9
10
nc
2A
15
18
nc
48
28
19
4Y
GND
20
vcc
pin assignments
XIV
2
4
nc
11
nc
10
Y5
12
Y6
11
Y4
13
Y5
l~Yl
2~Y2
ClK
12
Y3
14
Y4
0"2
13
Y2
CLK
15
Y3
G1
14
Y1
nc
16
nc
3 :::::.....iill. Y3
Y7
15
YO
0"2
17
Y2
GND
16
VCC
4~Y4
5~Y5
6~Y6
-s;EN
r---
FH. FN PACKAGES
1
O~YO
1
J. N PACKAGES
A
9 Y6
7 ::::.........!2 Y7
OR
10 ns
3A
A+B
(1)
(combines decoder and 3-bit
'ALS131
CLK~ >es
ADDRESS REGISTERS
logic symbols t
DEMULTIPLEXERS WITH
1Y
~4Y
positive logic: Y
131
J. N PACKAGES
1
~3Y
SN74128 (J,N)
3- TO a-LINE DECODERSI
TYPE
~lY
;B-EL..
SN74128 ... 50.n DRIVER)

typical performance
TYPE
pin assignments
lA-E.!-.
LINE DRIVERS
(SN54128 ... 75.n DRIVER
G1
18
Y1
Y7
19
YO
GND
20
VCC
10
25mW
~
'AS131
(4)
CLK-
SN54ALS131 (J,FH)
SN74ALS131 (N,FN)
SN54AS131 (J,FH)
SN74AS131 (N,FN)
(1)
pes
~~}
Gl~
G2~
--s;-
"'C
A(2)
_ -B --
C~
CJ
OMUX
O~YO
7
G..!!..
l~Yl
2~Y2
...o
c..
3 ::::.J..!& Y 3
4
::::..J.!.!L Y4
5~Y5
6 ~ Y6
7::::.........!2 Y7
TEXAS
INSTRUMENTS
3-47
PRODUCT GUIDE
logic symbol t
132
lA-1.!.L
QUADRUPLE 2-INPUT POSITIVE-
0.8 V
15 ns
2A~
2B~
3A~
3B~
0.55 V
8 ns
4A....lliL
typical performance
TYPE
HYSTERESIS
DELAY
'132
0.8 V
15 ns
'S132
typical performance
13-INPUT
I TYPE
POSITIVE-NAND
l'ALS133I
2mW I
8 ns
'S133
19mW I
3 ns
GATES
SN54ALS133 (J,FHJ
SN54S133 (J,FHJ
SN74ALS133 (N,FNJ
SN74S133 (J.N.FNJ
A--i!L
B~
e.....E.!.-
lA
3Y
FH. FN PACKAGES
1 nc
11
nc
18
3A
lA
12
3Y
3
4
1Y
2A
10
38
18
4Y
lY
13
14
3A
11
nc
16
nc
38
28
12
4A
2Y
13
48
2A
18
4Y
GN:>
14
Vee
nc
17
nc
28
2Y
18
19
4A
GND
20
Vee
9
10
~4Y
positive logic: Y
I POWER I DELAY1
1
2
~3Y
48
AB
logic symbol t
133
~2Y
4B..J!!L
SN74132 (J,N)
SN74LS132 (J,N,FNJ
SN74S132 (J,N,FN)
SN54132 (J,FH)
SN54LS132 (J,FH)
SN54S132 (J,FH)
J. N PACKAGES
~lY
lB--ill-
NAND SCHMITT TRIGGERS
'LS132
pin assignments
&IJ
pin assignments
J. N PACKAGES
&
1
2
3
4
D~
E~
F~
5
6
7
B
~Y
G.....!!.!.....-
H~
I~
A
8
c
0
E
F
G
GND
9
10
FH. FN PACKAGES
Y'
nc
11
A
B
C
0
12
11
12
3
4
13
14
nc
16
nc
15
17
16
VCC
18
9
10
13
nc
y
H
14
15
19
GND
20
VCC
(12)
J~
(13)
K~
".
positive logic: Y
L~
M~
ABCDEFGHIJKLM
Co
cC')
logic symbol t
134
G)
C
12-INPUT POSITIVENAND GATES
oc~
WITH THREE-STATE OUTPUTS
c.:CD
DELAY
MAX
MAX
SOURCE
SINK
CURRENT CURRENT
4.5 ns
-2mA
SN74S134
4.5 ns
-6.5mA
20mA
20mA
SN74S134 (J,N,FN)
1
2
11
12
13
A
B
C
0
nc
16
nc
lJC
17
18
G
GND
19
oc
20
VCC
eEL-
4
5
6
7
14
15
GND
16
VCC
D~
E~
F~
G
V'~y
.!?l.-
10
H~
I
J
.!.!1l.!E!.....:...-
K~
L~
positive logic: Y
ABCDEFGHIJKL
3-48
Y
H
A
8
C
0
FH. FN PACKAGES
nc
nc
11
9
10
B~
SN54S134
SN54S134 (J,FHJ
J. N PACKAGES
EN
.!!!...-
typical performance
TYPE
pin assignments
&
TEXAS
INSTRUMENTS
12
13
14
15
PRODUCT GUIDE
135
logic symbol t
typical performance
QUAD EXCLUSIVE I TYPE I POWER I DELAY 11c,2c

OR/NOR GATES
I'S135
325 mW
8 ns
1A
SN54S135 (J,FH) ,
(4)
pin-assignments
.!.!L-
=1
1B~
SN74S135 (J,N,FN)
N2
--EL
..!.!!!L
3B J.!.!L.......
4A .illL.4B J.llL.-
QUAD EXCLUSIVE-OR
1 TYPE
I '136 I
GATES WITH OPEN-
COLLECTOR OUTPUTS I'LS136I

SN54136 (J,FH)
SN54LS136 (J,FH)
150mW
27ns
30mW I 18ns
'SN74136 (J,N)
SN74LS136 (J,N,FN)
11A
~
(2)
11B
12A
3
4
5
6
7
8
9
10
nc
1A
1B
1Y
1C.2C
nc
2A
28
2Y
GND
11
19
nc
3Y
3A
3B
3C.4C
nc
4Y
4A
4B
20
VCC
12
13
14
15
16
17
1B
A (j) B (j) C = ABC + ABC + ABC + ABC
pin assignments
=1
O~1Y
~2Y
~3Y
J.El...-
~4Y
4BlUL
positive logic: Y =
FH, FN PACKAGES
1
2
~4Y
2B~
3A~
3B~
4A
5
7
8
logic symbol t
POWER I DELAY
3
4
J, N PACKAGES
1A
9 3Y
1B
10 3A
1Y
11
3B
1C.2C 12 3C.4C
2A
13 4Y
2B
14 4A
2Y
15 4B
GNO
16 VCC
2~3Y
=1
positive logic: Y =
typical performance
2Y
N2
3A
136
2~1Y
2A~
2B~
3C,4C (12)
1
2
3
4
5
6
7
J, N PACKAGES
1A
B 3Y
1B
9
3A
10 3B
1Y
2A
11
4Y
28
12 4A
13 4B
2Y
GND 14
VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
A (j) B=AB+AB
10
nc
1A
18
1Y
nc
2A
nc
28
2Y
GND
11
nc
12
3Y
3A
13
14
15
3B
nc
16
4Y
17
18
nc
4A
19
4B
20
VCC
.+'"'
CJ
::::l
"C
o...
Q.
TEXAS
INSTRUMENTS
3-49
PRODUCT GUIDE
logic symbol t
137
pin assignments
XIV
3- TO 8-L1NE OECOOERS!
DEMULTIPLEXERS WITH
ADDRESS LATCHES
typical performance
TYPE
'ALS137
SELECT
TIME
11 ns
ENABLE
TIME
TOTAL
POWER
10 ns
25 mW
3
4
C
7
8
17.5 ns
SN54ALS137 (J,FH)
SN54AS137 (J,FH)
SN54LS137 (J,FH)
16 ns
55 mW
SN74ALS137 (N,FN)
SN74AS137 (N,FN)
SN74LS137 (J,N,FN)
OR
V6
V7
"C
~
0
Q.
r:::
.....
G)
r:::
c:
CD
3-50
FH. FN PACKAGES
TEXAS
INSTRUMENTS
11
1
2
3
4
12
13
14
Gt.
15
Y5
Y4
Y3
~2
G1
Y7
16
17
Y2
18
19
Y1
YO
GND
20
9
10
'AS137
'LS137
J. N PACKAGES
A
9 Y6
B
10 Y5
C
Y4
11
GL
12 Y3
~2
13 Y2
G1
14 Y1
Y7
15 YO
GND 16 Vee
Y6
PRODUCT GUIDE
logic symbol t
138
3- TO 8-LINE DECODERS!
DEMULTIPLEXERS
typical performance
TYPE
SELECT
TIME
'ALS138
ENABLE
TIME
TOTAL
9 ns
25 mW
22 ns
21 ns
31 mW
8 ns
7 ns
245 mW
'AS138
'Sl38
A..!.!.!.....- 1
o~YO
B.EL- 2
1~Y1
SN54ALS138 (J,FH)
SN74ALSl38 (N,FN)
SN54ASl38 (J,FH)
SN74ASl38 (N,FN)
SN54LS138 (J,FH)
SN74LSl38 (J,N,FN)
SN54S138 (J,FH)
SN74S138 (J,N,FN)
2~Y2
3~Y3
C~4
POWER
8.5 ns
'LSl38
pin assignments
BIN/OCT
G1~
G2A~
G2B~
r-;-
4 :::......!.!.!!Y4
5~Y5
6~Y6
EN
A..!.!.!.....(2)
B-
TYPE
ENABLE
TOTAL
TIME
TIME
POWER
'AS139
'LS139
'S139
22 ns
19 ns
34mW
7.5 ns
6 ns
300 mW
nc
G2B
G1
Y7
GND
11
12
13
14
15
16
17
18
19
20
nc
Y6
Y5
Y4
Y3
nc
Y2
Yl
YO
Vcc
6~Y6
7
~ Y7
pin assignments
XIV
1G...!.!!....c:.. EN
2A~
'ALS139
nc
A
B
C
G2A
5 ~.Y5
(3)
1B-2
SELECT
vcc
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
4 :::......!.!.!!Y4
&
1A~1
typical performance
Y6
Y5
Y4
Y3
Y2
Y1
YO
~ Y7
logic symbol t
DECODERS/DEMUL TIPLEXERS
9
10
11
12
13
14
15
16
o~YO
1~Y1
2~Y2
3~Y3
:}at
G1~
G2A~
G2B~
DUAL 2 TO 4-L1NE
A
B
C
(!2A
G2B
G1
Y7
GND
OR
DMUX
C~
139
J. N PACKAGES
1
2
3
4
5
6
7
8
o~1YO
1~1Y1
2~1Y2
3~1Y3
~2YO
p....!.!!!.2Y1
2BI~
2G~
SN54ALS139 (J,FH)
SN74ALS139 (N,FN)
SN54AS139 (J,FH)
SN74AS139 (N,FN)
SN54LS139 (J,FH)
SN74LS139 (J,N,FN)
lA~
SN54S139 (J,FH)
SN74S139 (J,N,FN)
1B~
~2Y2
~2Y3
J. N PACKAGES
1
2
3
4
5
6
7
8
lG
lA
lB
,YO
lYl
lY2
lY3
GND
9
10
11
12
13
14
'5
16
2Y3
2Y2
2Yl
2YO
2B
2A
2G
Vce
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
lG
lA
lB
lYO
nc
lYl
lY2
lY3
GND
11
12
13
14
15
16
17
18
19
20
nc
2Y3
2Y2
2Yl
2YO
nc
2B
2A
2G
Vce
OR
DMUX
~o
G3
1G...!.!!....c:..
. 0 ~.1YO
1~1Y1
2~1Y2
3 ::=-...!Z!...1Y3
2A~
(13)
2B~
2G~
~2YO
:::.......!.!.!2Y1
~2Y2
~2Y3
TEXAS
INSTRUMENTS
3-51
PRODUCT GUIDE
logic Iymbol t
140
DUAL 4-INPUT POSITIVENAND 50-OHM LINE DRIVERS
typical performance
TYPE
'S140
pin assignments
1A-llL
&t>
1B..J!L..
~,y
1C.....!!L
LOWHIGH1D~
POWER
LEVEL
LEVEL
2A-'!L
DELAY PER
OUTPUT
OUTPUT
GATE 2S..l1!!L
CURRENT CURRENT
2C..i!!L
60mA
-40mA
4 ns
44rnW
SN54S140 (J,FH)
~2V
FH. FN PACKAGES
1 nc
11 nc
2 lA
12 2V
3 18
13 2A
4 nc
14 28
5 nc
15 nc
6 lC
16 nc
7 nc
17 nc
8 10
18 2C
19 20
9 IV
10 GND 20 VCC
SN74S140 (J,N,FN)
ABCD
logic symbol t
141
pin assignments
SCD/DEC
BCD-TO-DECIMAL
DECODER/DRIVER
typical performance
'141
J. N PACKAGES
lA
8 2V
18
9 2A
nc . 10 28
lC
11 nc
10
12 2C
IV
13 20
GND 14 VCC
2D~
positive logic: Y
TYPE
1
2
3
4
5
6
7
t>
OQ
1Q
OUTPUT
SINK
OFF-STATE
OUTPUT
CURRENT VOLTAGE
7 rnA
60V
2Q
A~'
TOTAL
POWER
~,
~2
:::-...J2L 3
4Q ::::-.1lli. 4
3Q
B....!!!- 2
sQ ::::-..lllL 5
6Q :::.....l.!.!L6
c-llL- 4
D~8
80rnW
::::......l.illo
7Q
ii'EN
SN74141 (J,N)
sQ
9Q
1
2
3
4
5
6
7
8
J:N PACKAGES
6
9 3
9
10 7
A
11 6
0
12 GND
VCC 13 4
B
14 5
15 1
C
2
16 0
::::-..lli!L 7
::::..-..!!L s
~9
>9ZQ.
"'C
oQ.
logic symbol t
142
c:
....
Si'iiii
COUNTER/LATCH/
DECODER/DRIVER
typical performance
(")
C)
c:
0:
TYPE
CD
'142
OUTPUT
SINK
CURRENT
7 rnA
(13)
TOTAL
POWER
BCD/DEC
110
1 t>OQ
CLK~ )+
~2
3Q ~3
4Q ~4
5Q ~5
6Q ~6
7Q ~7
8Q ~s
9Q ~9
CP8 ~QD
2Q
110
I-m.!.!!.....l::::R
~O
1Q ~,
340mW
SN74142 (J,N)
C11
CTR
DIV10
OFF-8TATE
OUTPUT
VOLTAGE
55V
pin assignments
110
f-110
t Pin numbers shown on logic symbols are for J and N' packages only.
3-52
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 OALLAS, TeXAS 75265
1
2
3
4
5
6
7
B
J. N PACKAGES
ClR
9
1
7
10 0
6
4
5
3
2
GND
11
12
13
14
15
16
8
9
STAB
Qo
ClK
vcc
PRODUCT GUIDE
logic Iymbol t
143,144
Bi/Riffi
COUNTERS/LATCH ES/
DECODERS/DRIVERS
typical performance
BI
OI,lTPUT OFFoSTATE
SINK
OUTPUT
CURRENT VOLTAGE
15 mAO
7V
15mA
7V
20mA
15V
15V
25mA
TYPE
SN54143
SN74143
SN54144
SN74144
SN54143 (J)
SN54144 (J)
SN74143 (J,N)
SN74144 (J,N)
RBi
Sr'RB
m
PCEi
SCE1
pin assignments
..
(6)
~1
1..-::: ~
(5)
(4)
(21)
14
(3)
R
Vl1
(231
(1)
Vll
( 2 ) G 012
CLK~ 11+
CT-0t;
G18
Z14 1
BclinsTh
.18 ~
"l 130
17
C13
CTROIV10
"l 130
Z15 2
t>
b18~
(T3)
c18 ~
.ill.....-
t>
18Q
logic symbol t
145
BCD-TO-DECIMAL DECODERS/
t>
TYPE
SINK
OUTPUT
B~2
POWER
c-.!.lli- 4
D--1lli...- S
CURRENT
VOLTAGE
BOmA
15V
215mW
'54LS145
12mA
15V
35mW
'74LS145
SOmA
15V
35mW
'145
SN54145 (J,FH)
SN54LS145 (J,FH)
oQ f:-.uL0
lQ ~,
2Q ~2
3Q ~3
4Q ~4
A...illL 1
TOTAL
REm
7 DP
8 dp
9 d
10 f
11 e
12 GNO
19
20
21
22
23
24
OC
00
STRB
MAX
PCEI
VCC
c::.--.....!!!.
dp
pin assignments
typical performance
OFF-8TATE
II
J, N PACKAGES
1 SCEl 13 II
2 ClK 14 c
3 ClA 15 a
4 RBI 16 b
5 BI
17 QA
BI/
6
18 AB
(22) MAX
BCD/DEC
DRIVERS FOR LAMPS, RELAYS, MOS
OUTPUT
(10) f
:::.....-J!!!.
g18~
"l12CT-9
DP
:::--..!!.ll
f18~
Z17 8
~c
~d
.18~
Z164
f--"l130
(151
::-...illl
d18~
f--"l 130
A
OB
119)
Oc
(201
00
16
&
.,
(18)
15
~1
----...!.!!!. a .
5Q ~5
6Q ~6
7Q ~7
sQ ~s
lFEN
gQ
1
2
3
4
5
6
7
8
J. N PACKAGES
0
9 7
1
2
3
4
5
6
GND
10
11
12
13
14
15
16
8
9
D
C
B
A
Vee
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
0
1
2
3
nc
4
5
6
GND
11
12
13
14
15
16
17
18
19
20
nc
7
8
9
D
nc
C
B
A
VCC
~g
>gZa
SN74145 (J,N)
SN74LS145 (J,N,FN)
....
(.)
logic symbol t
147
la-LINE DECIMAL TO
,.!!!l.J:::" ,
HPRI/BCD
4-L1NE BCD PRIORITY

2...!..!&t::. 2
ENCODERS
3JE!..c:.. 3
typical performance
l TYPE
I '147
POWER
DELAY \
225 mW
10 ns\
I'LS147I
60mW
,::::...J2L A
4...!1l...t:::. 4
15 ns
SN54147 (J,FH)
SN54LS147 (J,FH)
SN74147 (J,N)
SN74LS147 (J,N,FN)
::::s
pin assignments
5.J&..c::.. 5
2WzLB
6.J1L.c:.. 6
4~C
7.J&.c:::. 7
S~D
1
2
3
4
5
6
7
B
J. N PACKAGES
4
9 A
5
10 9
1
6
11
12 2
7
13 3
8
14 D
C
B
15 nc
GND 16 VCC
"C
...o
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
4
5
6
7
nc
8
C
B
GND
11
12
13
14
15
16
17
18
19
20
nc
Q.
9
1
2
nc
3
0
nc
Vec
s..J!..J::.. s
g.J.12l.c::.. 9
Pin numbers shown on logic symbols
FONT TABLE T3 - RESULTANT DISPLAYS USING 143. '44

TEXAS
INSTRUMENlS
3-53
PRODUCT GUIDE
logic symbol t
148
pin assignments
8 TO 3UNE OCTAL
PRIORITY ENCODERS
typical performance
II TYPE I
II
190mW
II'Ls1481
60mW
'148
POWER I DELAY I
12 ns
15 ns
SN54148 (J,FH)
SN54LS148 (J,FH)
SN74148 (J,N)
SN74LS148 (J,N,FN)
6
7
(10)
.....
(11)
.....
.....
(12)
(13)
,..
(1)
......
0/Z10
10~
l/Z11
11
2/Z12
12
3/Z13
13
4/Z14
14
(2)
1"..
5/Z15
15
(3)
.....
6/Z16
16
(4)
.....
7/Z17
17
18~EO
a~GS
10F16 DATA
SELECTORS/
DATA
TYPE
TOINV
FROM
TOTAL
ENABLE
POWER
18 ns
200mW
OUTPUT
'150
11 ns
(5)
r:
2a :::....J1!..Al
ENa
4a~A2
SN54150 (J,FH)
-.:
SN74150 (J,N)
EN
B~
C~
]G~
o !!.!l.EO~
E4~
E5~
.!!L-
E6
or+
E8~
E9~
E7
l!!.-(21)
El0~
Ell~
E12~
E13
.!l!!.!...-
E14~
E15~
3
4
~w
5
6
7
8
9
10
11
12
13
14
15
nc -
3-54
(7)
El "'"-'-- 1
E2~ 2
0-
r:::
10
AO
nc
11
nc
12
AO
13
11
12
14
El
13
15
16
nc
A2
14
GS
nc
Al
15
EO
El
17
GNO
16
Vee
8
9
A2
Al
18
19
GS
EO
GND
20
Vee
pin assignments
MUX
G~
E3~
"'C
::::.....i!!L AO
V18
A.!]~
MULTIPLEXERS
"-
logic symbol t
150
1
2
10
la
EI
FH. FN PACKAGES
J. N PACKAGES
HPRI/BIN
TEXAS
INSTRUMENTS
J. N PACKAGES
E7
13 e
14 B
E6
3 E5
15 A
4, E4
16 E15
17 E14
5 E3
18 E13
6 E2
19 E12
7 El
20 Ell
8 EO
21
El0
9 G
22
10 W
E9
11
D
23
E8
12 GNO 24 Vee
FH PACKAGE
nc
15 nc
E7
16
E6
17
E5
18
E4
19
E15
E3
20
E14
E2
21
E13
nc
22
nc
9
10
El
EO
23
24
E12
Ell
11
25
El0
12
26
E9
13
27
E8
14
GND
28
Vee
PRODUCT GUIDE
logic symbol t
151
GJZ!...J:::,.
A
TYPE
'151A
'ALS15.1
'AS151
'LS151
'S151
DATA
TOINV
OUTPUT
8 ns
6 ns
3 ns
11 ns
4.5 ns
DELAY TIMES
DATA TO
FROM
NON-INV
ENA8LE
OUTPUT
16 ns
22 ns
4.5 ns
5 ns
3.5 ns
5 ns
18 ns
27 ns
9 ns
8 ns
SN54151A(J,FH)
SN54ALS151 (J,FH)
SN54AS151 (J.FH)
SN54LS 151 (J.FH)
SN54S151 (J.FH)
pin assignments
J. N PACKAGES
MUX
1-0F-8 DATA SELECTORS/MULTIPLEXERS

typical performance
EN
.i!.!l.-
:}G~
B~
C~
TOTAL
POWER
145 mW
30mW
130 mW
30mW
225 mW
OO~
01~
02~
0
1
.!2!....-
03
(5)
I--- Y
~W
1
2
3
4
5
6
7
8
D3
D2
Dl
DO
Y
W
G
GND
9
10
11
12
13
14
15
16
C
B
A
D7
D6
D5
D4
VCC
04 ~ 4
FH. FN PACKAGES
11 nc
1 nc
2 D3
12 C
3 D2
13 B
4 Dl
14 A
5 DO
15 D7
16 nc
6 nc
7 Y
17 D6
8 W
18 D5
9 <r
19 D4
10 GND 20 VCC
05~ 5
06~6
07~7
SN74151A (J.N)
SN74ALS151 (N.FN)
SN74AS151 (N.FN)
SN74LS151 (J.N.FN)
SN74S151 (J.N.FN)
152
logic symbol t
1-of-8 DATA SELECTORS/MULTIPLEXERS

typical performance
A~
B~
C~
DELAY TIMES
DATA
FROM
TOTAL
TYPE
TOINV
ENABLE POWER
OUTPUT
'152A
8 ns
130 mW
'LS152
11 ns
18 ns
28 mW
pin assignments
MUX
J. N PACKAGES
O} 0
2
G1'
~ 0
DO (4)
01~1
02
B....-
~w
03~3
1
2
3
4
5
6
7
D4
D3
D2
Dl
DO
w
GND
8
9
10
11
12
13
14
C
B
A
D7
D6
D5
VCC
04.!2l..- 4
D5
~ 5
06~
SN54152A (J,FH)
SN54LS152 (J.FH)
(II)
FH. FN PACKAGES
1 nc
11 nc
2 D4
12 C
13 B
3 D3
4 D2
14 A
5 nc
15 nc
16 D7
6 Dl
7 nc
17 nc
8 DO
18 D6
9 W
19 D5
10 GND 20 VCC
07~7
Q)
"'C
153
logic symbol t
SELECTORS/MULTIPLEXERS
typical performance
DATA TO
NOr~-INV
OUTPUT
lG
FROM
TOTAL
ENA8LE
POWER
14 ns
17 ns
180 mW
5 ns
4.5 ns
31.5mW
'AS153
3.5 ns
5 ns
105 mW
'L153
27 ns
34 ns
90mW
2C 1
'LS153
14 ns
17 ns
31mW
2C2
6 ns
9.5 ns
225 mW
'S153
SN541 53 (J,FH)
SN54ALS153 (J.FH)
SN54AS153 (J.FH)
SN54L 1 53 (J)
SN54LS153 (J.FH)
SN54S153 (J,FH)
.!!.L.t:::..
ICO~
lCl~
lC2~
lC3~
2G~
'ALS153
'153
O} G0
1
3
MUX
DELAY TIMES
TYPE
(14)
(2)
'S
pin assignments
J. N PACKAGES
DUAL 4-LlNE TO 1-LlNE DATA
EN
0
1
~lY
2
3
2CO ~
1
2
3
4
5
6
7
8
lG
B
lC3
lC2
lCl
lCO
lY
GND
9
10
11
12
13
14
15
16
2Y
2CO
2Cl
2C2
2C3
A
2G
VCC
FH. FN PACKAGES
11 nc
1 nc
2 lG
12 2Y
13 2CO
3 B
4 lC3 14 2Cl
5 lC2 15 2C2
6 nC
16 nc
7 lCl 17 2C3
8 lCO 18 A
19 2~
9 lY
10 GND 20 VCC
C!l
.....
(..)
::J
"'C
o
a..
a..
~2Y
.i!.!l.~
2C3~
SN74153 (J.N)
. SN74ALS153 (N.FN)
SN74AS153 (N.FN)
SN74LS153 (J.N.FN)
SN74S153 (J.N.FN)
TEXAS
INSTRUMENlS
POST OFFICE BOX 225012. DALLAS. TEXAS 75265
3-55
PRODUCT GUIDE
logic symbol t
154
pin assignments
4LINE TO 16LlNE DECODERS!
J. N PACKAGES
0
1
DEMULTIPLEXERS
typical performance
SELECT
ENABLE
TOTAL
TIME
TIME
POWER
'154
23 ns
19 ns
170mW
'L154
46 ns
38 ns
85mW
TYPE
SN54154 (J,FH)
SN54L154 (J)
SN74154 (J,N)
4
5
8
10
11
12
Gl
13
14
G2
15
B
C
0
10
11
"'0
0"'"
12
13
a.
c:
Gl
....
(")
14
15
G2
G')
c:
c:
en
nc -
3-56
no Internal connection.
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
9
10
11
12
0
1
2
3
4
5
6
7
8
9
10
GND
13
14
15
16
17
18
19
20
21
22
23
24
11
12
13
14
15
131
G2
0
e
8
A
Vee
FH PACKAGE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
nc
0
1
2
3
4
5
nc
6
'7
8
9
10
GND
15
16
17
18
19
20
21
22
23
24
25
26
27
28
nc
11
12
13
14
15
Gl
nc
132
D'
C
B
A
Vec
PRODUCT GUIDE
logic svmbol t
155
TYPE
pin assignments
2-lIn. to 4lln. Decoder
(totem pole outputs)
typical performance
TIME
TIME
POWER
lC
'155
21 ns
16 ns
125mW
'LS155A
18 ns
15 ns
30mW
SN54155 (J,FH)
SN54LS155A (J, FH)
SN74155 (J,N)
SN74LS155A, (J, N, FN)
1
2
3
4
5
6
7
1YO
1Yl
1Y2
lY3
ENABLE TOTAL
SELECT
J. N PACKAGES
lC
9 2YO
11!
10 2Yl
B
11
2Y2
lY3 12 2Y3
lY2 13 A
lYI
14 2G
lYO 15 2C
B ONO 16 VCC
X/Y
2YO
2Yl
2Y2
2~
2C
FH. FN PACKAGES
1 nc
11
nc
2 lC
12 2YO
3 lG
13 2Yl
4 B
14 2Y2
5
lY3 15 2Y3
6 nc
16 nc
7 lY2
17 A
18
B
lYI
20'
9 lYO 19 2C
10 GND 20 VCC
2Y3
logic symbol t
1-line to 4.fine DMUX
logic Iymbol t
logic Iymbol t
3line to aline Decoder
lline to aline DMUX
X/Y
A
DMUX
2YO
2Yl
(13)
(3)
2Y2
2'(3
lYO
lYl
]}%
lYO B
lYl C
lG
lC
1Y2
lY3
lY2
2Y2
2Y3
lYO
2YO
2Yl
2Y3
lY3
2YO
2Yl
(13)
1Yl
1Y2
lY3
2Y4
logic Iymbol t
156
pin assignments
2lIne to 4lIne Decoder
J. N PACKAGES
(open-coUector outputs)
typical performance
TYPE
SELECT
TIME
1YO
1Yl
1Y2
lY3
ENABLE TOTAL
TIME
POWER
'156
23 ns
18ns
125 mW
'LS156
33 ns
,26 ns
31 mW
SN54156 (J,FH)
SN54LS156 (J,FH)
SN74156 (J,N)
SN74LS156 (J,N,FN)
2G
2YO
2Yl
2Y2
2C
2Y3
1
B
lY2
lYI
lYO
OND
13
14
15
16
A
2
2
V
FH. FN PACKAGES
11
12 2YO
13 2Yl
14 2Y2
lY3 15 2Y3
16
6 nc
lY2 17 A
18 2'G'
lY'
9 lYO 19 2C'
10 GND 20 V
Q)
"'0
C!'
~
(.)
:::1
"'0
...
a..
logic Iymbol t
logic Iymbol t
lline to aline DMUX
A
'B
3line to Bline Decoder
DMUX
X/Y
2YO
2Yl
A
1YO B
1Yl C
lY2
2Y2
2Y3
1YO
lYl
1Y3'G
2YO
2Yl
lY2
2YO
2Yl
2Y2
2Y3
lYO
lYl
lY2
1Y3
2Y3
1Y3
2Y4
TEXAS
INSTRUMENTS
3-57
PRODUCT GUIDE
logic symbol t
157
QUAD 2 TO 1LlNE DATA
G (15)
AlB (1)
(noninverted data outpuU)
2A~
DELAY TIMES
2B
TYPE
NONINV
OUTPUT
FROM
TOTAL
ENABLE
POWER
'157
9 ns
14 ns
150mW
'ALS167
5 ns
6.5 ns
39mW
3.5 ns
7.5 ns
95mW
18 ns
27 ns
75mW
'LS157
9 ns
14 ns
49mW
'S157
5 ns
8 ns
250mW
'AS157
'L167
SN54167 (J,FH)
SN74157 (J,N)
SN54ALS157 (J,FH)
SN74ALS157 (N,FN)
SN54AS157 (J,FH)
SN74AS157 (N,FN)
3A
Gl
lB~
DATA TO
EN
lA~ l'
typical performance
pin assignments
ill.-
.!.!.!L-
.lliL-
FH. FN PACKAGES
1
nc
11
nc
10
3B
AlB
12
3V
lB
11
3A
13
IV
12
4V
3
4
lA
lB
14
3A
2A
13
4B
IV
16
4V
2B
14
~2Y
4A
2V
16
OND
16
---.!!!..
V,..,..
~3Y
3B~
4A
lA
lY
MUX
J. N PACKAGES
AlB
9 3V
3B
nc
16
nc
2A
17
4B
8
9
2B
2V
18
19
4A
OND
20
10
. vcc
~4Y
4B~
SN54L167 (J)
SN54LS157 (J,FH)
SN54S157 (J,FH)
II..
SN74LS157 (J,N,FN)
SN74S157 (J,N,FN)
logic symbol t
158
QUAD 2 TO 1LlNE DATA
G (15)
SELECTORS/MUL TIPLEXERS
."
(inverted data outputs)
oQ..
typical performance
AlB (1)
lA~ l'
DELAY TIMES
(')
DATA
TYPE
TOINV
OUTPUT
'ALS158
5 ns
FROM
2A
TOTAL
ENABLE
POWER
6.5 ns
1'.5mW
'AS158
1.2 ns
6 ns
78 mW
'LS158
7 ns
12 ns
24mW
'S158
4 ns
7 ns
195mW
SN54ALS158 (J,FH)
SN54AS158 (J,FH)
SN54LS158 (J,FH)
SN54S158 (J,FH)
2B
EN
Gl
lB (3)
...
pin assignments
ili::
MUX
ill.-
3A~
3B~
4A~
4B
!E!.-
~lY
::::.....!!!.
~3Y
~4Y
SN74ALS158 (N,FN)
SN74AS158 (N,FN)
SN74LS158 (J,N,FN)
SN74S158 (J,N,FN)
3-58
2Y
TEXAS
INSTRUMENTS
J. N PACKAGES
AlB
9 3Y
FH. FN PACKAGES
1 nc
11
nc
lA
10
3B
AlB
12
3
4
lB
11
3A
lA
13
IV
12
4Y
lB
14
3A
2A
13
4B
lY
15
4Y
2B
14
4A
nc
16
nc
2V
15
2A
17
4B
GND
16
Vec
2B
2Y
16
19
GND
20
Vec
9
10
3Y
3B
4A
PRODUCT GUIDE
159
pin assignments
4 TO 16LINE DECODERSI
DEMULTIPLEXERS
1
2
3
4
(open-collector outputs)
typical performance
4
6
7
SN54159 (J,FH)
SN74159 (J,N)
9
10
11
12
13
14
15
5
8
7
8
9
0
11
12
J, N PACKAGES
0
13 11
1
14 12
15 13
2
3
16 14
4
17 15
5
18 Gl
8
19 G2
7
20 0
21
C
8
9
22 8
10
23 A
GNO 24 Vcc
FH PACKAGE'
1
2
3
4
5
8
7
8
9
10
11
12
13
14
no
0
1
2
3
4
5
no
8
7
8
9
10
GNO
15
16
17
18
19
20
21
22
23
24
25
26
27
28
no
11
12
13
14
15
Gl
no
G2
0
C
B
A
Vcc
4
5
6
7
8
A
B
C
0
10
11
12
13
14
15
G1
(32
CD
"C
S
..,
"::s
(,)
"C
0~
a..
nc - no Internal connection,
TEXAS
INSTRUMENTS
3-59
PRODUCT GUIDE
160
SYNCHRONOUS 4BIT
ClR~
COUNTERS
LOAD
--~
(decade, direct clear)

typical performance
TYPE
COUNT
FREQ
CLEAR
(10)
ENT - ' - - - G3
ENP .!!L- G4
POWER
CLK
.
'160
25 MHz
ASYNCL
305 mW
'ALS160A
40 MHz
ASYNCL
60mW
'AS160
'LS160A
ASYNCL
25 MHz
SN54160 (J,FH)
SN54A LS160A (J, F H)
SN54AS160 (J,FH)
SN54LS160A (J,FH)
ASYNCL
93mW
SN74160 (J,N)
SN74ALS160A (N,FN)
J, N PACKAGES
Ml
M2
TOTAL
EL..t:::..
pin assignments
CTROIV10
CT=O
"l3CT=9
.,
~RCO
CS/2,3,4+
A .E!...- 1,50
B~
C~
O~
r
(14)
"l~OA
[1)
[2)
~OB
[4)
~Oc
1
2
3
4
5
6
7
8
ern
CLK
A
B
C
0
ENP
GNO
9
10
11
12
13
14
15
16
mAr>
ENT
aD
ac
aB
OA
RCa
VCC
FH, FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
CLR
CLK
A
nc
C
0
ENP
GNO
11
12
13
14
15
16
17
18
19
20
nc
LOAn
ENT
aD
ac
nc
as
aA
RCa
VCC
I---- 00
[8)
CTROIV10
SN74AS160 (N,FN)
CLR ~ CT=O
SN74LS160A (J,N,FN) _ _ ~
Ml
LOAD
M2
(10)
3CT
ENT~
G3
ENP.!!L- G4
.,
~RCO
CLK -EL-I>C5/2,3,4+
I'"
A .E!...- l,SO
B~
[2)
C~
ClR~
COUNTERS
"'C
(binary, direct clear)
o
a.
typical performance
c:
TYPE
'161
G')
'ALS161A
c:CD
'AS161
c:
'LS161A
[8)
161
SYNCHRONOUS 4BIT
or+
(14)
~OA
~OB
'"(';';) Oc
r--- 00
[4)
O~
""l
[1]
COUNT
FREQ
25 MHz
40 MHz
LOAD
--~
CLEAR
ASYNCL
ASYNCL
ASYNCL
25 MHz
SN54161 (J,FH)
SN54ALS161 A (J,FH)
SN54AS161 (J,FH)
SN54LS161A (J,FH)
ASYNCL
pin assignments
CTRDIV16
CT=O
Ml
M2
(15)
(10)
"l3CT=15 f - - - RCO
. E N T - G3
ENP .!!L- G4
TOTAL
CLK ~ C5/2,3,4+
POWER
r
(14)
305 mW
A .E!...- 1,50 [1]
"l~OA
B~
[2)
60mW
B
C~
[4)
~Oc
.,
f---(iij
93 mW
D~
I---- 00
[8)
SN74161 (J,N)
SN74ALS161 A (N,FN)
SN74AS161 (N,FN)
ClR ~ CT=OCTRDIV16
SN74LS161 A (J,N,FN) _ _ ~
Ml
LOAD
M2
(10)
ENT ~ G3
ENP.!!L- G4
(15)
3CT=15
r---
RCO
CLK -EL-I>C5/2,3,4+
'1
A.E!...- 1,50
B~
C~
1
[1]
(2)
[4)
D~
[8)
(14)
~OA
f---(iij
~Oc
I---- 00
nc -no internal connection,
3-60
TEXAS '
INSTRUMENTS
1
2
3
4
5
6
7
8
J, N PACKAGES
9 LOAD
CLK
10 ENT
A
11
aD
B
12 ac
C
13 as
0
14 aA
ENP
15 RCa
GNO 16
VCC
FH, FN PACKAGES
1
2
3
4
5
6
7
8
nc
ENP
10
GNO
CLR
CLK
A
B
nc
C
11
12
13
14
15
16
17
1S
19
20
nc
iIiAD
ENT
00
ac
nc
as
aA
RCO
VCC
PRODUCT GUIDE
162
m~
COUNTERS
--~
LOAD
(decade, synchronous clear)

typical performance
TYPE
COUNT
CLEAR
FREQ
TOTAL
POWER
25 MHz
SYNC-L
305 mW
'ALS162A
40 MHz
SYNC-L
60mW
SYNC-L
'AS162
25 MHz
'S162
40 MHz
SN54162 (J,FHI
SN54ALS162A IJ,FHI
SN54AS162 (J,FHI
SN54LS162A (J,FHI
SN54S162 (J,FHI
SYNC-L
93mW
SYNC-L
475mW
SN74162 (J,NI
SN74ALS162A IN,FNI
SN74AS162 (N,FNI
SN74LS162A (J,N,FNI
SN74S162 (J,N,FNI
CTROIV10
5CT s O
Ml
M2
ENT (7)
G3
ENP~
G4
CLK
'162
'LS162A
~RCO
i3CT-9
..!&..t::.. .,C5/2,3,4+
A~1,50
B~
(1)
C .@..-
(4)
O~
,.
i
(14)
_
CLR
(1)
.g!....t::..
LOA'5 ~
... L
--ml" Cc
-aD
CTROIV10
5CT-O
Ml
M2
3CT-9
,.
1,50
RCO
(14)
~aA
~aB
(1)
(2)
C .@..-
~Cc
(4)
O~
(8)
I - - - aD
m~
COUNTERS
--~g)
LOAD
(binary, synchronous clear)

typical performance
COUNT
FREQ
CLEAR
Ml
M2
TOTAL
CLK
A
SYNC-L
305 mW
'ALS163A
40 MHz
SYNC-L
60mW
'LS163A
25 MHz
SYNC-L
93 mW
'S163
40 MHz
SYNC-L
475 mW
'AS163
5CT-O
POWER
25 MHz
SYNC-L
. SN74163 (J,NI
SN54163 (J,FHI
SN54ALS163A (J,FHI SN74ALS163A (N,FNI
SN54AS163 (J,FHI
SN74AS163 (N,FNI
SN54LS163A (J,FHI
SN74LS163A (J,N,FNI
SN54S163 (J,FHI
SN74S163 (J,N,FNI
pin assignments
CTROIV16
ENT
G3
ENP.ill.- G4
'163
FH, FN PACKAGES
1 nc
11 nc
2 CUI 12 lOAD
3 ClK 13 ENT
4 A
14 00
5 B
15 Oc
6 nc
16 nc
7 C
17 OB
8 0
18 OA
9 EN? 19 RCO
10 GNO 20 VCC
.EL-~C5/2,3,4+
EL-
B~
SYNCHRONOUS 4-BIT
J, N PACKAGES
C[R
9 [OAC
ClK 10 ENT
A
11 00
B
12 Oc
13 OB
C
0
14 OA
ENP 16 RCO
GNO 18 VCC
'""'Ii3i aA
--t1'i aB
(2)
(8)
(10)
ENT G3
ENP.ill.- G4
163
1
2
3
4
6
6
7
8
logic symbol, 'LS162A, 'S162 t
CLK
TYPE
pin assignments
r--~~-..,
SYNCHRONOUS 4-BIT
(15)
I---
i3CT-15
RCO
.!!L..t:::.....,C5/2,3,4+
EL-
B~
c~
O~
1,50
(1)
,.
(14)
-,~aA
(2)
~QB
J. N PACKAGES
9 [OAt
1 .. C[R
2 ClK 10 ENT
3 A
11 00
4 B
12 Oc
6 C
13 OB
6 0
14 OA
7 ENP 16 RCO
B GNO 16 VCC
FH. FN PACKAGES
1 nc
11 nc
2 CLR 12 LUAU
3 C.lK 13 ENT
4 A
14 00
6 B
16 Oc
6 nc
16 nc
7 C
17 B.
6 0
lB OA
9 EN? 19 RCO
10 GND 20 VCC
..,
(.)
~
"C
...o
~Cc
(4)
(8)
I---
aD
RCO
c..
logic symbol, 'LS163A, 'S163 t

_
(1)
CTROIV16
CLR ~ 5CT-O
LOA'5 ~
._J--
ENT~
Ml
M2
G3
ENP.!!!..- G4
CLK
A
3CT-15
..!&- ~C5/2,3,4+
.E1--
,.
150
B~'
C.@..-
o~
(14)
(1)
(2)
~aA
~aB
(4)
(8)
~Cc
I---
aD
TEXAS
INSTRUMENTS
3-61
PRODUCT GUIDE
logic symbol t
164
pin assignments
8-BIT PARALLEL OUT

SERIAL SHIFT REGISTERS
CUi
(asynchronous clear)
TYPE
'164
'ALSI64
'L164
'LS164
SHIFT
FREQ
SERIAL
DATA
INPUT
25 MHz GATED D
GATED D
12 MHz GATED D
25 MHz GATED D
Cl/'"
SN54164 (J,FH)
SN54AlS164 (J,FH)
SN54L 164 IJ)
SN54lS164 (J,FH)
A~
&1 10
BEl..-
ASYNC
CLEAR
TOTAL
POWER
LOW
lOW
LOW
LOW
167 mW
~OA
.---"---4
(4)
G
H
VCC
rn
OF
~OH
SN74LS164IJ,N,FN)
SHILD
pin assignments
SRGS
J, N PACKAGES
Gl [SHIFT)
U::.. C2 [LOAD)
CLKINH~D;;'l C3/ ...
E
OF
FH, FN PACKAGES
nc
1 nc
11
12 ClK
2 A
3 B
13
4 OA
14 OE
5 nc
15 nc
6 B
16 OF
7 nc
17 nc
8 Oc
18 OG
9 00
19 H
10 GNO 20 VCC
~OE
i--(;2}
typical performance
(2)
r - - - . , - - - - - , - - - , - - - - , - - - - - , ClK ~ 1
SERIAL
25 MHz
DATA
INPUT
D
35 MHz
SN54165 (J,FHI
SN54ALS165 (J,FH)
SN54LS165 (J,FH)
ClK
ClR
~OG
(parallel-load with complementary outputs)
.,\:I
logic symbol f
SHIFT
FREQ
OA
B
Oc
00
GNO
8
9
10
11
12
13
14
~O
(10)
D.
SN741641J,N)
SN74AlSI64IN,FN)
'165
'ALS165
'LS165
A
8
~OC
84mW
80mW
165
TYPE
1
2
3
4
5
6
7
CLK IS)
typical performance
J, N PACKAGES
SRGS
(9)
ASYNC
CLEAR
TOTAL
POWER
NONE
210mW
NONE
105mW
. SN74165 IJ,N)
SN74ALS165IN,FN)
SN74LS 165 IJ,N,FN)
SER
...
3D
A ..l.!.!L- 20
B 1EL-""'2-0----i
2
3
4
5
6
7
8
ClK
E
F
G
H
H
GNO
10
11
12
13
14
15
16
SER
A
B
C
0
ClK INH
VCC
C~
D ~~------__4
E ~1----------4
F ~1----------4
G ~1----------4
FH, FN PACKAGES
11 nc
12 OH
13 SER
14 A
15 B
nc
16 nc
G
17 C
H
18 0
19 ClK INH
i:iH
GNO
20 VCC
1
2
3
4
5
6
7
8
9
10
nc
1
2
3
4
5
6
7
8
9
10
nc
SH/lO
ClK
E
F
H~
Q.
t:
(')
166
r+
logic symbol t
pin assignments
typical performance
TYPE
SHIFT
FREQ
'166
20 MHz
'ALS166
'LS166A 35 MHz
SERIAL
DATA
INPUT
D
D
D
SN54166 (J,FHI
SN54ALS166 (J,FH)
SN54LS166A (J,FH)
SRGS
ClR~
SH/LD ~
(parallel/serial input; serial output)
R
Ml [SHIFT]
. Lbo
M2 [lOAD]
~D~l C3/1_
,-
ASYNC
CLEAR
TOTAL
POWER
ClKINH (7)
LOW
LOW
LOW
360 mW
SER
ClK~
l,30
r:
~ 2,30
B i#---~2,~3D-------4
J, N PACKAGES
1
2
3
4
5
6
7
8
SER
9
A
10
B
11
12
C
0
13
ClK INH 14
ClK
15
GNO
16
110mW
SN74166 (J,N)
SN74AlS166 (N,FN)
SN74LS166A (J,N,FN)
C~
D
(5)
1--------__4
(iO)~------__4
E-
F ~~------~
G ~1----------4
H ~1----------4~OH
3-62
TEXAS
INSTRUMENTS
POST OFFICE SOX 225012 DALLAS. TEXAS 75265
ern
E
F
G
OH
H
SHim
VCC
FH, FN PACKAGES
11 nc
SER
12 ClR
A
13 E
14 F
B
15 G
C
nc
16 nc
0
17 H
ClK INH 18 H
ClK
19 SH/lO
GNO
20 VCC
PRODUCT GUIDE
logic symbol t
167
SYNCHRONOUS DECADE
CLK~
RATE MULTIPLIERS
STROBE...ll2.L.l:::..
pin assignments
~5[f] [To- ]
1
2
3
tJ .
EN ABLE..l.!.!LI::. G5
UNITY/CAS....!1&.b V6
CLR...i11l-- CT-O
typical performance
,ICOUNT
TYPE
FREQ
CLEAR
SET.TO-9~
TOTA
L
POWER
'167125 MHz ASYNCH 1270 mW
'}
B3-=-
NOUS COUNTERS
typical performance
14
6~Y
13
CLR
6
7
8
Y
ENou!
GNO
14
15
16
BO
Bl
VCC
6
7
8
9
10
:::......JrL ENABLE
SETTO-9
nc
Z
Y
ENou1
GNO
15
16
17
18
19
20
nc
CLK
STRB
ENin
UNITYI
CAS
nc
CLR
BO
B1
Vcc
pin assignments
_ _ (9)
LOAD~
CTRDIV10
Ml [LOAD]
COUNT
TOTAL
FREQ
POWER
40 MHz
75mW
M2 [COUNT]
U115~ M3 [UP]
(15) _
M4[DOWN] 3,5CT=9~RCO
ENT~ G5
4,5CT=0
ml'J~
(2)
G6
C l K T >2,3,5,6+/C7
~2.4.5,6-
40 MHz
500 mW
AJ1L.... l,7D
SN54ALS168A (J,FH) SN74ALS168A (N,FN)

SN54AS168 (J,FHI
SN74AS168 (N,FNI
SN54S168 (J,FHI
SN74S168 (J,N,FNI
B~
C~
4-BIT UP/DOWN SYNCHRONOUS COUNTERS

(binary)
(14)
[4]
~ac
[8]
,.-!.!.!LaD
COUNT
TOTAL
FREQ
POWER
40 MHz
75mW
'LS169B
35 MHz
140mW
'S169
40 MHz
500mW
SN54AlS169A (J,FHI
SN54AS169 (J,FHI
SN54lS169B (J,FH)
SN54S169 (J,FH)
J, N PACKAGES
CTRDIV16
~~M1ILOAOl
_ (1
M2 [COUNT]
M3[UP)
M4[DOWN)
""N1~ G5
~(7)
ENP~
(15)_
3,5CT=25~RCO
4,5CT-0
G6
C L K T ~ 2,3,5,6+/C7
~2,4,5,6-
'AS169
FH, FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
U/O
CLK
A
B
nc
C
0
ENP
GNO
11
12
13
14
15
16
17
18
19
20
nc
LOAD
ENT
00
Oc
nc
OB
OA
RCO
VCC
pin assignments
(9)
U/D
typical performance
J, N PACKAGES
U/l:i
9 mAC
CLK 10 ENT
A
11 00
12 Oc
B
C
13 OB
14 OA
0
ENP 15 RCO
GNO 16 VCC
~aB
[2]
D..l2L
1
2
3
4
5
6
7
8
~aA
[1]
logic symbol t
169
'AlS169A
B3
4P
[RATE]
'AS168
TYPE
(1)
(decade)
'S168
11
12
13
logic symbol t
168
4-BIT UP/DOWN SYNCHRO-
TYPE
(2)
B2~ a
Gal3
nc
nc
B2
SN74167 (J,N)
SN54167 (J,FH)
'ALS168A
BO~
Bl~
FH PACKAGE
1
:2
3
~z
5CT:9
CT=9
J, N PACKAGES
nc
9 CLK
B2
10 STRB
B3
11 ENin
SETUNITYI
12
TO-9
CAS
AJ1L.... l,7D
[1)
B~
C~
[2)
SN74AlS169A (N,FNI D...i2L

SN74AS169 (N,FNI
SN74LS169B (J,N,FN)
SN74S169 (J,N,FN)
(14)
1
2
3
4
5
6
7
8
uiCl
CLK
A
B
C
0
ENP
GNO
9
10
11
12
13
14
15
16
mAl:
Em'
00
Oc
OB
OA
RCO
VCC
FH, FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
UtO
ClK
A
B
nc
C
0
ENP
GND
11
12
13
14
15
16
17
18
19
20
nc
LOAD
ENT
00
Oc
nc
OB
OA
RCO
VCC
~aA
[4)
~aB
~Qc
[8]
,.-!.!.!LaD
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 DAllAS, TEXAS 75265
3-63
PRODUCT GUIDE
pin assignments
logic symbol t
170
typical performance
TYPE
RAM 4x4
w~
'170
O-C
30 ns
40mW
A .!EL- O}lA
l
3
WB (5)
RAW- O}2A
3
RB~ 1
'LS170
O-C
27 ns
7.8mW
Ow
TYPE
OF
ADDRESS POWER
OUTPUT
TIME
PER BIT
SN54170 (J,FH)
SN54LS170 (J,FH)
lli!....t::..
C4 [WRITE)
SN74170 (J,N)
SN74LS170 (J,N,FN)
171
eLR
Double-Rail Outputs
CLK
Buffered Clock and Clear Inputs
(13)
(12)
lD~
Individual Data Inputs to Each Flip-Flop
1 POWER I DELAY TIMES I

PER F-F I SETUP
HOLD I
I'LS171 130 MHz 117.5 mW 120 ns1
"'C
SN54LS171 (J,FH)
nc
11
nc
03
10
01
02
12
02
04
11
GR
03
13
01
RB
12
Gw
04
14
GR
13
WB
14
16
Gw
nc
03
15
WA
01
RB
nc
15
RA
04
17
WB
GNO
16
VCC
RA
04
1B
03
19
WA
01
GNO
20
VCC
J. N PACKAGES
C1
~lQ
~lQ
~20
~2Q
10
(4)
2D
10
---!&
40
nc
11
nc
10
40
10
12
40
20
11
40
20
13
20
12
CLK
20
14
40
30
13
CLR
20
15
CLK
30
14
10
nc
16
nc
30
15
10
30
17
CLR
GNO
16
VCC
30
18
10
3IT
19
10
GNO
20
VCC
30
~40
TEXAS
INSTRUMENTS
40
40
i:::::-ill.
SN74LS171 (J,N,FN)
10
20
10
I::::-ill-
(11 )
40-
FH. FN PACKAGES
1
2
30
(')
r+
3-64
02
pin assignments'
5ns113D~
I Rising edge of clock pulse
"'"
o
a.
c
~Q3
~Q4
typical performance
FREQ
02
~Q2
logic symbol t
QUAD D-TYPE FLIP-FLOPS WITH CLEAR
TYPE
~ R 1!.!!...1:::=0 ....EN [READ)

r
Dl~ lA,4D
2Ao. ~Ql
D2.J..!L
03..l1L04 ..ill-
I I
FH. FN PACKAGES
J. N PACKAGES
4-BY-4 REGISTER FILES

PRODUCT GUIDE
logic symbol t
172
16-BIT REGISTER FILES
typical performance
TYPE
TYPE
ORG
OF
lWO
lWl
ADDRESS
POWER
TIME
PER BIT
33 ns
35mW
OUTPUT
'172
8X2
3-State
1W2
lRO
lRl
lR2
lGW
1GR
SN74172 (J,N)
pin assignments
(2)
(1)
J. N PACKAGES
13 20A
14
lOA
lGW
15
lGR
lOB
16 2GR
20B
2W/RO
17
CLK
16 2W/RI
lR2
19 2W/R2
20 2GW
20A
21
10 6
22 IDA
lW2
23
20B
GNO
24 VCC
lWl
lWO
(23)
4
(9)
(8)
(7)
2W/RO
2W/R1
2W/R2
2GVV
2GR
CLOCK
lOA
2DA
lOB
2DB
173
pin assignments
4~BIT D-TYPE REGISTERS

(3-state outputs)
typical performance
TYPE
FREQ
ASYNC
J. N PACKAGES
TOTAL
FH. FN PACKAGES
1 nc
nc
11
M
12 Gl
Gl
10
G2
3
4
10
11
40
20
12
3D
3
4
N
10
13
14
30
13
20
20
15
3D
16
nc
132
40
CLEAR
POWER
40
14
10
nc
25 MHz
HIGH
250mW
CLK
15
CLR
30
17
'LS173A 50 MHz
HIGH
85mW
GNO
16
VCC
40
18
10
CLK
19
CLR
10
GNO
20
VCC
'173
SN54173 (J,FH)
SN54LS173A (J,FH)
10
20
30
40
SN74173 (J,N)
SN74LS173A (J,N,FN)
20
+oJ
(.)
:::s
"C
...
0..
10
20
30
40
TEXAS
INSTRUMENTS
3-65
PRODUCT GUIDE
logic Iymbol t
174
CLR~~
CLK
(9)
Cl
direct clear)
typical performance
TYPE
pin assignments
-(1)
HEX D-TYPE FLIP-FLOPS

(single-rail outputs, common
POWER
FREQ
PER F-F
DELAY TIMES
'174
35 MHz
38 mW
SETUP
20 nsl
HOLD
'ALS174
80 MHz
6.7 mW
15 nsl
o lisl
'AS174
175 MHz
38 mW
'LS174
40 MHz
10.6mW
20 nsl
5 nsl
'S174
110 MHz
75 mW
5 nsl
3 nsl
5 nsl
10
E!....-
20
ill-
10
30~
40
50
l!.!.!....-
JEL(14)
60-
~10
~20
~30
~40
......J..gl. 50
~60
1
2
3
4
5
6
7
6
J. N PACKAGES
9 CLK
10
10 40
10
11 40
20
12 50
20
13 50
3D
14 60
30
15 60
GNO 16 VCC
FH. FN PACKAGES
ern
1 nc
2
3 10
4 10
5 20
6 nc
7 20
6 3D
9 ,30
10 GNO
ern
11
12
13
14
15
16
17
16
19
20
nc
CLK
40
40
50
nc
50
60
60
VCC
SN54174 (J,FH)
SN54ALS174 (J,FH)
SN54AS174 (J,FH)
SN54LS174 (J,FH)
SN54S 174 (J,FH)
SN74174 (J,N)
SN74ALS174 (N,FN)
SN74AS174 (N,FN)
SN74LS174 (J,N,FN)
SN74S174 (J,N,FN)
logic symbol t
175
CLR (1)
CLK (9)
QUAD D-TYPE FLIP-FLOPS

(complementary outputs,
pin assignments
R
Cl
common direct clear!

typical performance
"'0
..,
TYPE
FREQ
'175
35 MHz
POWER
PER F-F
HOLD,
38 mW
20 nsl
5 nsl
15 nsl
o nsl
20 nsl
5 nsl
'5 nsl
'ALS175
80 MHz
7.5 mW
'AS175
175 MHz
41mW
or+
'LS175
40 MHz
'S175
110 MHz
10.6mW
75 mW
C)
DELAY TIMES
SETUP
0C
---.!!!..
10
20~
---..!2!.
20
30~
~30
~3Q
10
ill-
10
~la
~2Q
1
2
3
4
5
6
7
6
J. N PACKAGES
9 CLK
10
10 30
1ti
11
3il
10
12 3D
20
13 40
20
14 40
20
15 40
GNO 16 VCC
FH. FN PACKAGES
ern
1
2
3
4
5
6
7
6
9
10
~40
(131
40-
~4Q
3 nsl
E.
SN54175 (J,FH)
SN54ALS175 (J,FH,
SN54AS175 (J,FH)
SN54LS175 (J,FH)
SN54S175 (J,FH)
0CD
SN74175 (J,N)
SN74ALS175 (N,FN)
SN74AS175 (N,FN)
SN74LS175 (J,N,FN)
SN74S175 (J,N,FN)
"
, 3-66
TEXAS
INSTRUMENTS
nc
CLR
10
1il
10
nc
20
20
20
GNO
11
12
13
14
15
16
17
16
19
20
nc
eLK
30
3il
3D
nc
40
4il
40
VCC
PRODUCT GUIDE
176
PRESETTABLE DECADEI
BIQUINARY COUNTERS
:I
TYPE
COUNT
FREQ
CLI~....llil!::..
TOTAL
CLEAR
CT~O
r
0lV2
150mW
~aA
A..lli- 10
LOAO
CLK1
nc
Qc
C
08
B
LOAD 12
Qc
B~
0--1!1L
1n"
11
4
5
15
nc
13
OD
ClA
C
nc
14
12
OA
CLK2
16
GNo
14
VCC
'177
COUNT
FREQ
35 MHz
CLEAR
LOW
TOTAL
POWER
CLli~
SN54177 (J,FH)
r-
(11)
0-
0lV2
~aA
10
LOAD
GND
VCC
20
FH PACKAGE
Qc
C
10
11
5
6
12
A
ClK2 13
GNo
VCC
ClK1
nc
B
B
LOAD 12
Qc
13
14
00
CLA
C
nc
OB
B
15
nc
16
nc
17
nc
14
DiVa
ClK2~ p.+
C~
1
2
3
.....,
B~
00
CLA
J, N PACKAGES
CT~O
A~
SN74177 (J,N)
nc
18
ClK2 19
pin assignments
CTR
ClKl~ p.+
T150 mWl
17
QA
~Oc
~ aD
logic symbol, '177t

lOADJ..!!....c::.. Cl
nc
~aB
PRESETTABLE BINARY
COUNTERS
typical performance
nc
ClK1
OB
B
10
c{
11
13
0lV5
JCT
C~
TYPE
10
SN74176 (J,N)
ClK2~ >+
FH PACKAGE
1
2
3
.....,
ClK1.....!.!!L..t:: ~+
POWER
LOW
'176 135 MHz
SN54176 (J,FH)
J, N PACKAGES
lOAO...!.!L.t:.. Cl
typical performance
II
pin assignments
CTR
}CT
c{
nc
11
CLK1
QA
ClK2
18
19
OD
CLA
10
GNo
20
VCC
~ aB
(2)
Ell
Q)
~aC
(12)
"'C
~aO
'S
.....
178
CJ
logic symbol t
pin assignments
4-BIT UNIVERSAL
SHIFT REGISTER
typical performance
TYPE
'178
SHIFT
FREQ
25 MHz
J, N PACKAGES
SRG4
SHIFT
lOAD
SERIAL
DATA
INPUT
D
SN54178 (J.FH)
ClK
ASYNC TOTAL
CLEAR POWER
NONE
230mW
SN74178 (J,N)
J..!.!L
Ml
~ M2
J2Lc:..P.C3/1-+
SER
A
...ill...ill.-
B
C
..ilL-
~aA
1,2,30
~aB
~a
~a~
Oc
lOAD
nc
11
nc
12
SEA
10
13
OA
CLK
11
D
SHIFT
Oc
lOAD
SEA
14
00
12
nc
15
nc
B
GNo
13
16
SHIFT
14
VCC
nc
17
CLK
18
08
GNo
19
20
VCC
1,30
1,2,30
J.EL
o ....!.BL
1
2
FH PACKAGE
6
7
::l
"'C
oa..
a..
nc
TEXAS
INSTRUMENTS
3-67
PRODUCT GUIDE
ClR
SH I FT
(dir,ect clear; aD com

typical performance
'179
LOW
230mW
SN74179 (J,N)
GENERATORS/CHECKERS
typical performance
170 mW
1,30
1,2,30
SN74180 (J,N)
o
c..
c
or+
FUNCTION GENERATORS
o --1.!.!L
S2~
16 logic functions)
TOTAL
S3~
M~
TIME
TIME
POWER
Cn~C'
12,5 ns
24 ns
455mW
'AS181A
6 ns
5 ns
675 mW
'LS181
16 ns
24 ns
102mW
'S181
7 ns
11 ns
600mW
TYPE
0.:
(1)
'181
SN54181 (J,FH)
SN54AS181A (J,FH)
SN54LS181 (J,FH)
SN54S181 (J,FH)
3
4
SER
12
14
A
ClK
13
SHIF
SER
15
14
nc
16
00
00
nc
B
GND
15
OA
17
SHIFT
16
VCC
elK
18
B
GND
19
20
Vee
7
8
9
10
G
H
EVEN
000
l:EVEN
6
7
l:000
GNO
8
9
10
11
12
13
14
FH PACKAGE
nc
nc
11
12
13
14
15
nc
e
0
3
4
EVEN
Vce
7
8
A
a
C
nc
000
16
nc
17
0
nc
IEVEN
1000
18
19
E
F
GNO
20
Vee
(6)
~
f--'-"-- 000
pin assignments
(0 ... 15) CP ~p
(0 ... 151 CG ~G
6 (p=aIQ ---1.!& A=B
(0 ... 151 CO
....,
80...llW:::.. a
A1..J1lli::.. P
SN74181 (J,NI
1l1...!m.t:.. a
SN74AS181A (N,FN)
SN74LS181 (J,N,FN) ~2J.n!.J::.. P
SN74S181 (J,N,FN)
82.iW..c::. a
~Cn+4
AO..ill.c::,. P
ihill!..c::.. a
[1]
:::......!2L ro
[2]
~Fl
[4]
~F2
[8]
~F3
3-68
lOAD
10
A3.lli!.!...b. P
nc -
O~
13
J~
ADD
(5)
-=-- EVEN
AlU
CARRY
typical performance
G')
12
3
4
Sl...ill.-
(16 arithmetic operations,
ern
J, N PACKAGES
-..J!L
SO~
00
00
logic symbol t
ARITHMETIC LOGIC UNITS/
lOAD
11
H~
""t
nc
10
pin assignments
G~
181
11
B
A
~ilo
(13)
F ------
"tJ
nc
r--ml ac
B.....!.L
C -D..QL
FH PACKAGE
1
Oc
(5)
-aA
.
(7)
I - - aD
E~
III
.-
ClR
~aB
1,2,30
2k
I DELAY I
I 35 ns I
SN54180 (J,FH)
EVEN
000
9BIT ODD/EVEN PARITY
POWER
Ml
logic symbol t
(3)
G3
(4)
G4
180
I TYPE
I '180
ill.!-
-ill.....lli.C .lllio .1.lli-
CLEAR POWER
INPUT
SN54179 (J,FH)
SER
A
B
ASYNC TOTAL
DATA
25 MHz
(4)
SERIAL
FREQ
J2!.....c::..
lOAO~ M2
ClK ~~C3/1'"
plementary outputs)
SHIFT
J, N PACKAGES
SRG4
SHIFT REGISTERS
TYPE
pin assignments
logic symbol t
179
4BIT UNIVERSAL
TEXAS
IN SfRUM ENlS
DALLAS. TEXAS 75265
1
2
3
4
5
6
7
8
9
10
11
12
J, N PACKAGES
13 ,3
l!o
AO
53
52
51
SO
en
M
,0
"
F2.
GNO
14
15
18
17
18
19
20
21
22
23
24
A=a
l'
Cn +4
G
B3
A3
62
A2
Iii
AI
Vee
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FH. FN PACKAGES
15 nc
nc
18 F3
BO
17 AB
AO
18 l'
53
19 Cn +4
52
20 G
51
21l!)
SO
22 nc
nc
23 A3
en
24 82
M
FO
25 A2
26 81
Fl
1'2
27 AI
GNO
28 Vee
PRODUCT GUIDE
logic symbols t
182
pin assignments
CPG
LOOKAHEAD CARRY
GENERATORS
typical performance
CARRY
TYPE
POWER
'182
180mW
13 ns
'AS182
100mW
5 ns
'S182
260mW
TIME
Cn~CI
COO ~Cn+x
Po .J&...c::,. CPO
GO~ CGO
C01 ~Cn+y
P1...ill...t:::.. CP1
CO2 ~Cn+z
G1....!!!....c::: CG1
P2...!ill.= CP2
cP:::::-ill... p
7 ns
G2~ CG2
P3~ CP3
CG~G
SN54182 (J,FH)
SN74182 (J,N)
i:l3...ill..l:::. CG3
SN54AS182 (J,FH)
SN74AS182 (N,FN)
SN54S182 (J,FH)
SN74S182 (J,N,FN)
1
2
3
4
5
6
7
8
J. N PACKAGES
1::1
9 Cn + z
PI
10 G
11 Cn + v
tro
PO
12 Cn + x
G3
13 Cn
P3
14 G2
P
15 P2
GND
16 VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
ne
Gl
PI
GO
PO
ne
G3
P3
P
GND
11
12
13
14
15
16
17
18
19
. 20
ne
Cn + z
G
cn + y
Cn + x
ne
Cn
G2
P2
VCC
OR
CPG
~
Cn
Po
...DlL
J..c:.
GO .ill.c::
G2/Z10
Z3
P1.E.!..c:. G4
J!l..c.
Z5
P2~
G6
G1
G8
(;3..ill.c:. Z9
~Cn+x
~Cn+y
;;;-
5,6
10,4,6,8
'.4p1r
5,6,8
7,8
9
~Cn+z
~p
~G
logic symbol t
183
DUALCARRY-5AVE
1A.....!1L P
FULL ADDERS
typical performance
TYPE
3
-1,2,4 " ;;'1
3,4
5
1,2.4,6
3.4,6
7,---
132.ill.b. Z7
P3~
;;'1
1,2
Z1
ADD
POWER
TIME
TIME
PER BIT
'H183
11 ns
11 ns
110mW
'LS183
15 ns
15 ns
23mW
SN54H183 (J,FH)
SN54LS183 (J,FH)
"
~1~
1B~a
CARRY
SN74H183 (J,N)
SN74LS183 (J,N,FN)
....
pin assignments
CO~1Cn+1
'Cn~CI
2A~
1
2
3
4
5
6
7
~2~
2B~
J. N PACKAGES
lA
8 2l:
ne
9 ne
18
10 2C n + 1
lC n
11 2C n
lC n + 1 12 28
1:[
13 '2A
GND
14 VCC
(j
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
ne
lA
ne
18
ne
lC n
ne
lC n + 1
I!
GNO
11
12
13
14
15
16
17
18
19
20
:::s
ne
2l:
ne
2C n + 1
ne
2C n
ne
28
2A
VCC
"'C
...o
a.
~2Cn+1
2Cn~
TEXAS
INSTRUMENTS
POST OffiCE BOX 225012 DALLAS, TEXAS 75265
3-69
PRODUCT GUIDE
logic symbols t
184
pin assignments
VERSION 1
CODE CONVERTERS
(BCD to binary)
typical performance
SN54184 (J,FH)
J, N PACKAGES
Y1
9
YB
Y2
10
Y3
11
Y4
12 e
Y5
13
14
15 G'
BCD/BIN
SN74184 (J,N)
2Q
2/Gq
4/GCI.
{A
LSD
4Q
8Q
16Q
32Q
Cl.G~
MSD{~
10
~~
(1)
(2)
(3)
Y3
16.
B IT
BINARY
6 ~!D
16
FH PACKAGE
11
Y1
12
YB
Y2
13
Y3
14
Y4
15
nc
16
Y5
Y6
17
Vee
10
Y7
1B
19
GND
20
G
Vee
Y4
Y5
20
Y6
SEE VERSIONS
2AND3
Y7
Y8
VERSION 2
VERSION 3
[BCD/BCD 10'S COMP]
[BCD/BCD 9'S COMP]
XIV
BCD
Y7
9'S
COMP
Y8
BC{~
(HIGH) E
-.:
(5)
Y6,
Y7
Y8
"1"
>9G~
SEE VERSION 1
Y4
Y5
Co
c:
(')
,..
3-70
A}
XIV
Y1
Y2
Y3
"'C
iJEN
TEXAS
INsrRUMENlS
Y1
Y2
Y3
Q
Q
Y4
Y5
BCD
10'S
COMP
PRODUCT GUIDE
logic symbol t
185
pin assignments
J, N PACKAGES
CODE CONVERTERS
G'~
typical performance
I TYPE
I '185A
POWER
DELAY
280mW
25 ns
SN54185A (J,FH)
EN
5N74185A (J,N(
4Q
AJ.!.QL
B...!!.!L.
4
a
c...!!3.L
D~
E~
~V2
aQ
lOQ
20Q
16
40Q
32
"1"Q
"1"Q
....i2.!- V5
(256 4-bit words; open
A1.-l2L-
collector outputs)
A2...1!!A3~
typical performance
A4..-lli...-
A5~
ACCESS TIMES
A6...l!!-
CHIP
A7~
ADDRESS
S1...i!&t::...
20 ns
SN54187 (J,FH)
S2~
40 ns
9
10
11
12
13
14
15
16
FH PACKAGE
V8
A
1
2
3
4
5
6
7
8
9
10
C
0
E
G
Vcc
nc
VI
V2
V3
V4
nc
V5
V6
V7
GND
11
12
13
14
15
16
17
16
19
20
nc
V8
A
B
C
nc
0
E
G
Vcc
MSD
~V6
....!Z.L- V7
...!.2L- va
J, N PACKAGES
ROM 256 X4
AO~O
if~
1
2
3
4
5
6
7
8
AQ ..!!&a1 -
.J!!!.Q2
AQ
AQ. ~a3
A~
~a4
A6
A5
A4
A3
AO
Al
A2
GNO
9
10
11
12
13
14
15
16
FH PACKAGE
04
03
02
01
51
52
A7
1
2
3
4
5
6
7
6
Vcc
10
nc
A6
A5
A4
A3
nc
AO
Al
A2
GND
11
12
13
14
15
16
17
18
19
20
~EN
nc
04
03
02
01
nc
SI
52
A7
Vcc
SN74187 (J,N)
logic symbol t
189
pin assignments
MEMORIES
AO--1.!L
(16 4bit words; three
A2~
A3~
A1~
state outputs)
ENABLE
]A~
(3)
RIW~ 1EN[READ)
1 C2 [WRITE)
POWER
TIME
TIME
'LS189A
50 ns
35 ns
2.7 mW
'S189B
25 ns
12 ns
5.9mW
SN54LS189A (J,FH)
SN54S189B (J,FH)
1
2
3
4
5
6
7
8
S~G1
typical performance
ADDRESS
J, N PACKAGES
RAM16X4
64-BIT RANDOMACCESS
TYPE
-ill-v')
VI
V2
V3
V4
V5
V6
V7
GNO
pin assignments
1024BIT READ.QNL Y
MEMORIES
SELECT
LSD
.J1L V3
logic symbol t
187
'187
-}
rJ.!LV1
(2)
2Q
[
6-BIT
BINARV
TYPE
1
2
3
4
5
6
7
8
BIN/BCD
(binary to BCD)
PER BIT
Dl~
D2~
SN74LS189A (J,N,FNI
SN74S189B (J,N,FN)
.,
A,2D
D3..J.!L
D4~
r
A\l~ 61
~62
~63
AO
5
R/W
01
01
02
02
GNO
10
11
12
13
14
15
16
03
03
04
04
A3
A2
Al
Vcc
FH, FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
AO
5
R/W
01
nc
01
02
02
GNO
11
12
13
14
15
16
17
18
19
20
nc
03
03
04
04
nc
A3
A2
Al
Vcc
~64
TEXAS
INSTRUMENTS
3-71
PRODUCT GUIDE
logic symbol,'190, 'LS190t
190
-j~
CTEN 151
SYNCHRONOUSU~DOWN
O/U~
COUNTERS
(BCD)
TYPE
'190
M3IUP)
3(CT-9)Z6
ClK
COUNT
TOTAL
FREQ
POWER
20 MHz
325mW
6,1,4
=r~
MAXI
'11N
~RCO
LOAO.i!.!!.t:.. C5
A~50
(3)
+_--,~aA
B...!!l....-
(1)
(2) ,
c....i.l.2L
(4)
--ill. aB
--.lli.. aC
o-12LSN74190 (J,N)
SN7 4ALS 1 gO (N,FN)
SN74LS190 (J,N,FN)
(8)
--!!Lao
'ALSl gO
35MHz
60mW
'LS190
20 MHz
100mW
SN541 gO (J,FH)
SN54ALS 1 gO (J,FH)'
SN54LS 1 gO (J,FH)
2ICT-0)Z6
(~ 1,2-/1,3+
G4
typical performance
pin assignments
CTROIV10
G1
M2100WN)
J. N PACKAGES
B
9 0
10 C
OB
11 lOAD
OA
CTEN 12 MAXIMIN
DIU
13 ACO
14 ClK
Oc
15 A
00
GND 16 VCC
1
2
3
4
5
6
7
8
FH. FN PACKAGES
nc
B
OB
OA
CTEN
nc
1
2
3
4
5
6
7
8
9
10
DIU
Oc
00
GND
CTROIV10
Gl
M2 [DOWN)
2(CT-0)Z6
otUt
M3 [UP)
3(CT-9)Z6
K~
ClK
1>1,2-11,3+
G4
lOA01.!.ll.t::.. C5
-j.J4 Gl
""C
~
(1)
(2)
c....illL
(4)
o..i2L-
(8)
O/Ut
M2[OOWN)
M3[UP)
2(CT-0)Z6
3(CT=15)Z6
(~ 1.2-/1,3+
G4
ClK
C.
t:
6,1,4
.,
"
1
2
~:
MAXI
MIN
4
5
~RCO
lOAO..!!.!lr::.. C5
ro+
(3)
A~5D
(1)
+_--,~aA
B...!!l....-
(2)
t---ill-aB
c....i.l.2L
(4)
~-12L-
~aA
~aB
~Oc
r---J!.!- aD
pin assignments
CTROIV16
CTEN (5)
(binary)
~RCO
B..!..!l..-
logic symbol.' 191, 'LS 191t
COUNTERS
C
lOAD
MAXIMIN
nc
Reo
CLK
A
VCC
~MAX/MIN
6,1,4
.,
A~50
191
nc
logic symbol, 'ALS190t
CTEN~
SYNCHRONOUS UP/DOWN
11
12
13
14
15
16
17
18
19
20
J. N PACKAGES
B
9 0
10 C
OB
11 LOAD
A
CTEN 12 MAXIMIN
DIU
13 RCO
14 CLK
Oc
15 A
00
GND 16 VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
B
OB
OA
CTEN
nc
DIU
Oc
00
GND
11
12
13
14
15
16
17
16
19
20
nc
'0
C
LOAD
MAXIMIN
nc
RCO
CLK
A
VCC
r---ill.ac
~ao
(8)
typical performance
TYPE
COUNT
TOTAL
POWER
20 MHz
325 mW
'ALS191
35 MHz
60mW
M2[OOWN)
otUt
M3[UP)
'LSl 91
20 MHz
90 mW
ClK
SN54191 (J,FH)
SN54ALS191 (J,FH)
SN54LS 191 (J,FH)
CTEN~ Gl
2(CTc O)Z6 TMAX/MIN

3(CT-15)Z6
(~ ~l,2-I1,3+
G4
SN74191 (J,N)
SN74ALS191 (N.FN)
SN74LS191 (J.N.FN)
6,1,4
~RCO
lOA01.!.ll.t::.. C5
'-1
A~5D
(1)
B...!!!.-
(2)
c....illL
(4)
o.....!.2L
(8)
3-72
CTRDIV16
FREQ
'191
TEXAS
INSTRUMENTS
~aA
~aB
~Oc
~ao
PRODUCT GUIDE
logic symbol t
192
SYNCHRONOUS UP/DOWN
CLR~
DUAL CLOCK COUNTERS

typical performance
'192
'ALS192
'L192
'LS192
COUNT
TOTAL
FREO
POWER
A~30
[I)'
50mW
B...!.!L-
(2)
3 MHz
42mW
c..J..!.QL
(4)
25 MHz
85 mW
o...l!ll-
(8)
CLR~
COUNT
TOTAL
FREO
POWER
'193
25 MHz
325 mW
'ALS193
40MHz
50mW
3 MHz
25 MHz
SN54193 (J.FH)
SN54L 193 (J)
SN54LS193 (J,FH)
SN54ALS193 (J,FH)
6
7
16
Vee
8
9
ae
00
GND
12
UP
ae
00
GNO
11
13
14
~OA
~OB
~Oc
10
A~
J, N PACKAGES
0
C
as
11
LOAO
OA
DOWN 12 eo
UP
1300
14 eLR
ae
15 A
00
GNO
16 Vee
CT=O
2CT=0
lCT=15 ~co
3
4
~BO
5
6
7
r
[1)
30
42 mW
B...!.!L-
(2)
85 mW
c..J..!.QL
(4)
o...l!ll-
(8)
SN74193 (J,N)
14
e
LOAD
15
eo
nc
16
nc
UP
17
SO
18
19
eLR
A
20
Vee
~OA
9
10
FH, FN PACKAGES
1
nc
11
12
as
13
14
A
OOWN 15
co
nc
16
nc
UP
17
Oe
18
SO
eLR
00
GNO
19
20
Vee
9
10
~OB
~Oc
nc
0
e
LOAO
t----.!!L 00
SN74LS 193 (J,N,FN)

SN74ALS 193 (N,FN)
.....
logic symbol t
J, N PACKAGES
SRG4
cui.J..!l..b R
so....l.2L-
O}
0
Sl.i!QL 1
M"3
typical performance
SERIAL
OATA
INPUT
25 MHz
CLK
TOTAL
POWER
195 mW
SR SER
~1"/2'-
6
7
e
0
SL SER
GNO
'LSI94A
25 MHz
75mW
A.ill.- 3,40
B . i & - 3,40
'S194
70 MHz
450mW
C~ 3,40
SN54194 (J,FH)
SN74194 (J,N,FN)
0...!.2l- 3,40
SLSER....!!L- 2,40
SN54AS194 (J,FH)
SN74AS194 (N,FN)
SN54LS194A (J,FH)
SN74LS194A (J,N,FN)
SN54S194 (J,FH)
SN74S194 (J,N,FN)
ern
t>C4
SR SER-EL- 1,40
'ASI94
CJ
pin assignments
4BIT BIDIRECTIONAL
nc -
13
aA
DOWN
nc
0
r----ill- 00
G2
LOAO.!.!.!.!.J::::, C3
194
FREO
as
aA
DOWN
pin assignments
U P t ~2+
Gl
(4)
OOWNt ~1-
typical performance
'194
3
4
3
4
CTROIV16
(binary with clear)
SHIFT
12
10
logic symbol t
DUAL CLOCK COUNTERS
TYPE
11
as
SN74LS 192 (J,N,FN)

SN74ALS192 (N,FN)
193
'L193
nc
SN74192 (J,N)
SYNCHRONOUS UP/DOWN
'LS193
I'"
15
0
e
LOAD
eo
so
eLR
A
40 MHz
SN54192 (J,FH)
SN54L192 (J)
SN54LS 192 (J,FH)
SN54ALS192 (J,FH)
TYPE
F:--ill.L so
2cT=O
G2
325 mW
25 MHz
~co
lCT=9
LOAD~C3
L1
FH, FN PACKAGES
J, N PACKAGES
CTzO
U P t 1>2+
Gl
(4)
OOWNT 1>1-
(BCD with clear!
TYPE
pin assignments
CTROIV10
r
~OA
~OB
~Oc
SO
10
11
12
13
14
15
16
51
eLK
00
Oe
as
OA
Vee
FH, FN PACKAGES
nc
nc
ern
11
12
SO
SR SER
13
51
14
eLK
15
6
7
nc
00
nc
16
17
8
9
18
5L SER
19
aA
GND
20
Vee
10
:::J
"'C
...o
c..
ae
as
~Oo
J and N packages only,
TEXAS
INSTRUMENTS
POST OFFleE BOX 225012 DALLAS, TEXAS 75265
3-73
PRODUCT GUIDE
logic symbol, '19S t
195
4BIT PARALLELACCESS
SH/Li5~
SHIFT REGISTERS
typical performance
SHIFT
TYPE
DATA
FREQ
'195
INPUT
30 MHz
JR
TOTAL
ClK.!.1.2l.-
POWER
195mW
'AS195
'LS195A
30 MHz
JK
70mW
'S195
70 MHz
JK
375 mW
1
2
3
4
5
6
M1 [SHIFT)
M2 [lOAD)
CLli~
SERIAL
pin assignments
SRG4
:::J>
C3/' ....
r-
J.ill..- ',3J
'K..ill....r:::.. l,3K
A11L- 2,30
~QA
B~ 2,30
---1!.it QB
c.l2l-
~Oc
SN74195 (J,N)
SN54AS195 (J,FH)
SN74AS195 (N,FN)
SN54LS195A (J,FH)
SN74LS195A (J,N,FN)
SN54S195 (J,FH)
SN74S195 (J,N,FN)
~aA
~aB
~Oc
~ao
~oo
o-ill-
logic symbol t
196
lOAO.J.1L.:::,. C1
ClR.J.l.lli::,. CTEO
.,
typical performance
G)
c:::
c:CD
TYPE
COUNT PARALLEL
FREQ
LQAD
CLEAR
TOTAL
ClK1....l..ru.-t::. r,>+
POWER
A...ill.-. 10
50 MHz
YES
LOW
'LS196
30MHz
YES
LOW
60mW
'S196
100 MHz
YES
LOW
375mW
'196
SN54196 (J,FH)
SN54LS196 (J,FH)
SN54S196 (J,FH)
pin assignments
CTR
PRESETTABLE DECADEI
LATCHES
r
0lV2
~aA
240m'{'J
SN74196 (J,N)
SN74LS196 (J,N,FN)
SN74S196 (J,N,FN)
ClK2
...ili...c::. ~+
B.J!2L
c...llL
0..11!L
0lV5
}cr crt
~aB
~Oc
~ aD
3-74
C~
(")
M1 [SHIFT)
B.J2L. 2,30
.....
ClR.ill.J:::.. R
A~ 2,30
BIQUINARY COUNTERSI
OA
VCC
Wi
c:::
nc
SRG4
J ...!1L- l,3J
'K..illJ::::" l,3K
C.
C
0
GND
PACKAGES
11 nc
12 5H/[1\
13 ClK
J
14 00
K
15 00
A
nc
16 nc
17 Oc
B
18 OB
C
19 OA
0
GND 20 VCC
FH, FN
1
2
3
4
5
6
ClK
00
00
Oc
~QO
M2 [LOAD)
Cl K J.12L ~ C3/1 -+
"'I
K
A
10
11
12
13
14
15
16
:::::.....!.!!taO
SN54195 (J,FH)
SH/Li5~
""C
0.EL
J, N PACKAGES
ClR
9 5H/lD
TEXAS
INSTRUMENTS
J, N PACKAGES
1 LOAD 8 ClK1
2 Oc
9 B
3 C
10 B
4
A
11 0
5 A
12 00
6 ClK2 13 CLR
7 GND 14 VCC
PACKAGES
nc
11 nc
lOAD 12 CLK1
13 OB
Oc
14 B
C
nc
15 nc
A
16 0
nc
17 nc
18 00
OA
CLK2 19 CLR
GNO 20 VCC
FH. FN
1
2
3
4
5
6
7
8
9
10
PRODUCT GUIDE
logic symbol t
197
PRESETTABLE BINARY
LOAO....!2.Lr:.:.. Cl
COUNTERS/LATCHES
CLR~
typical performance
TYPE
COUNT PARALLEL
FREQ
LOAD
CLEAR
TOTAL
POWER
'197
50 MHz
YES
LOW
240mW
'LS197
30MHz
YES
LOW
60mW
'S197
100 MHz
YES
LOW
375mW
SN54197 (J,FH)
SN54LS197 (J,FH)
SN54S197 (J,FHI
SN74197 (J,N)
SN74LS197 (J,N,FN)
SN74S197 (J,N,FN)
198
CLK1~ >+
A~
CLK2~ >+
(101
B~
C~
0-1!.!!......
r
0lV2
~OA
10
SHIFT
FREQ
25 MHz
SERIAL
DATA
INPUT
SN54198 (J,FH)
LOW
360mW
SN74198 (J,N)
14
00
CLR
VCC
6
7
(91
r---'-'-OB
(21
~Oc
(121
-aD
pin assignments
J. N PACKACllS
SRGS
1
2
3
.,
CLK-t>C4
>1~/2"'"
SRSER~ 1,40
A~3:4O
B~ 3,40
GNO
08
8
0
PACKAGES
ne
11 ne
LOAD 12 CLKI
13 08
Oc
14 8
C
ne
15 ne
16 0
A
ne
17 ne
18
OA
00
CLK2 19 CLR
GNO 20
VCC
FH. FN
1
2
3
4
O) 0
SI.$L- 1 M'3
CLEAR POWER
9
Oc
10
C
A
11
12
OA
CLK2 13
9
10
SO~
ASYNC TOTAL
J. N PACKAGES
LOAO 8 CLKI
1
2
3
4
5
6
7
olVS
}cr c{
CLli .l.11LI::.. R

typical performance
'198
CT=O
...,
logic symbol t
a-BIT BIDIRECTIONAL
TYPE
pin assignments
CTR
..l!!-
O~
E~
F...i!1.L
G-illL
H .J1!L. 3,40
SLSER...QL 2,40
r-
~aA
~OB
~ac
--.!2.L. aD
~aE
~aF
~aG
so
,.
13
nc
ae
e
2
3
so
SR 5ER
A
5
6
aA
8
7
B
9
aB
aA
17
6
7
a.
e
18
19
aG
G
OF
ac
20
9
10
11
eLK
GNo
21
22
23
aH
H
Sl SER
51
2'
Vee
12
aD
,.
nc
18
CLR
17
ae
e
FHPACKAGE
CLR
15
18
SR SER
A
nc
e
10
Dc
11
12
00
13
,.
0
eLK
GND
18
19
20
21
22
23
2'
2.
2.
27
28
OF
F
Oa
nc
G
aH
H
SL seR
51
Vce
..,
~aH
(,)
:::s
"C
...o
c.
nc -
TEXAS
INSTRUMENTS
3-75
PRODUCT GUIDE
logic symbol t
199
SBIT BIDIRECTIONAL
.
(J.j( serial inputs)
'199
SHIFT
SH/ti5~
R
M1 [SHIFT)
M2 [lOAD)
typical performance
TYPE
CLFi~
pin assignments
SRG8
ClK INH...!.l.!L-O
ClK (13)
C3/1-+
SERIAL
FREQ
DATA
INPUT
25 MHz
JK
SN54199 (J,FH)
,~
J...QL
ASYNC
TOTAL
CLEAR
POWER
LOW
360mW
K'-'..lli::::..
1,3K
A...QL 2,30
B~
SN74199 (J,N)
1,3J
c..J!L
2.30
~Oc
E..J!&..
~OD
~OE
F--11!L..
....!.!!!....OF
D~
G~
~OG
H-illl..
...E.!L.oH
logic symbol t
201
256BIT RANDOMACCESS
AOJ!LA1&-'
(256 1-bit words; three
A2iliL
state output)
typical performance
TYPE
ADDRESS
TIME
l's201
42 ns
A3.!!L-
ENABLE POWER!
TIME
BIT
17 ns
I 1.9 mW I
SN74S201 (J,N)
A4.!&-A5.!.!.2.L
...
]A~
A7.!1.!L
52
J&..r::::..
-~
S:' (12)
R/W~
1
2
3
4
5
6
7
8
A6..l!.!!..-
51,ill...J:::..
[:1
G1
1 EN [READ)
..,
1 C2 [WRITE)
Co
c(")
0(13)
A,2D
r
A\l
r+
C)
c:
CD
t Pin numbers shown'on logic sv';'bols are for J and N packages onlv.
3-76
1
2
3
4
5
6
7
6
9
10
11
12
13
14
FH PACKAGE
15 ne
16 ClK
17 ClR
16 OE
19 E
OA
20 OF
8
21 F
08
ne
22 ne
23 OG
e
24 G
Oc
0
25 OH
26 H
00
CLK INH 27 SH/LO
GNO
28 Vec
ne
K
J
A
pin assignments
RAM 256 X 1
MEMORIES
il
1
2
3
4
5
6
7
6
..J!L..OA
9
10
11
~OB
12
J. N PACKAGES
K
13 ClK
14 rrR
J
A
15 OE
16 E
OA
17 OF
6
18 F
08
19 OG
C
20 G
Oc
0
21
OH
22 H
00
CLK INH 23 SH/lO
24 Vec
GNO
TEXAS
INSTRUMENTS
(6)
J. N PACKAGES
AO
9 A4
AI
10 A5
11 A6
~1
52
12 R/W
13 0
53
Q
14 A7
15 A2
A3
GND 16 Vcc
PRODUCT GUIDE
logic symbol t
219
AO~
Al~
(16 words of 4 bits each;

output)
s~
typical performance
ADDRESS' ENABLE POWER!

TIME
TIME
BIT
I'LS219A I
50 ns
35 ns
SN54LS219A (J,FH)
Dl~
D2~
12.7 mW I
SN74LS219A (J,N,FN)
5
6
7
8
Gl
1 EN [READ)
1 C2 [WRITE)
R/wt
"1
A.2D
--.J!L
lB.E.L-
OUTPUT
TYPE
PULSE
RANGE
TOTAL
POWER
lCLR~
lCul.~
lRexl/~
C.XI
SN54221
20 ns 215
130mW
2A~
SN74221
20 ns 28s
130mW
2SJ..!2L..-
2CLR~
SN54LS221
20 ns 49s
23mW
SN74LS221
20 ns 70 s
23mW
SN74221 (J,N)
SN54221 (J,FH)
SN54LS221 (J,FH) SN74LS221 (J,N,FN)
2Cext,~
2Rexl:~
c.xt
Al
6
7
8
9
10
Vee
nc
01
02
02
GNO
nc
16
17
18
19
A3
A2
Al
20
VCC
(11)
----'--'- 04
logic symbol t
typical performance
A3
A2
15
16
02
pin assignments
DUAL MONOSTABLE
1 A J!L....t::,.
13
14
~03
D3-l.!.2L
MUL TlVIBRATORS
01
02
02
GNO
A;~Ol
041..JgL
221
FH. FN PACKAGES
1 nc
11
nc
2 AO
12 03
3 S
13 03
4
R/W 14 04
15 04
5 01
1
2
]A~
A2~
A3~
three-state noninverting
TYPE
J. N PACKAGES
AO
9 03
10 03
S
3
R/W 11
04
4 01
12 04
RAM 16 X 4
64BIT RANDOMACCESS
MEMORIES
pin assignments
~'n
R
------1ill. 1 0
==--.l!L1Q
CX
RX/CX
~}'n
R
2
3
4
5
6
7
8
----il20
::::....-.!J1l.2Q
CX
RX/CX
J.N PACKAGES
lA
9 2A
lB
10 2B
lClR
11
2ClR
10
12 20
20
13 10
2C ext 14
lC exl
2R ext l
Cext
GNO
15
16
1 Rextl
Cext
VCC
1
2
FH. FN PACKAGES
nc
11
nc
lA
12 2A
3
4
5
6
lB
lClR
10
13
14
15
2B
2ClR
20
nc
16
nc
20
17
10
2C ex l
2R ext l
18
9
10
Cext
GNO
19
lC ext
1 Rextl
Cext
20
VCC
.....
CJ
:::J
"'C
...o
Q.
TEXAS
INSTRUMENlS
3-77
PRODUCT GUIDE
222
logic Iymbol t
64-BIT FIFO MEMORIES
pin lISignments
FIFO 16X4
16 4-BIT WORDS,
CTR
(input-ready enable, outputready enable, and thr..-state

output)
typical performance
2,3
1
2
3
4
(3) IR
5
6
7
8
(17) OR 9
10
J, N PACKAGES
DE
11 CLR
IRE
12 03
IR
13 02
LOCK 14
01
DO
15 nc
nc
16 00
01
17 OR
02
18 ORE
03
19 UNCK
GNO
20
VCC
SN74LS222 (J,N)
For chip carrier Information,
Q1
Q2
(12) Q3
logic symbol t
pin assignments
FIFO 16 X 4
16 4-BIT WORDS
OE
(11
CTR
ENS
(2)
IR
LOCK
SN54LS224 (J)
C)
J. N PACKAGES
OE
9 "Cl:R'
IR
10 03
LOCK 11
02
DO
12 01
01
13 00
02
14 OR
7 03
15 UNCI(
6 GNO 16 VCC
1
2
3
4
5
6
SN74LS224 (J,N)
&:
s:CD
For chip carrier Information,

DO
01
02
03
3-78
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 a DALLAS, TEXAS 75265
PRODUCT GUIDE
pin assignments
225
logic symbol t
SO-BIT FIFO MEMORIES
I
II
OUTPUT
3-State
DELAY TIME
FROM CLOCK
FIFO 16 X 5
16 5-BIT WORDS
typical performance
50 ns
OE~
TOTAL
POWER
1400 rnW
I CLR~
IeLK A~
eTR
EN5
3
4
CT-O
~
CT<16
1>'
(3)
3-UNCK
OUT
6
7
B
I 1.n...
SN74S225 (J,N,FN)
116)
UNCKIN
Cl
I>
119)
CLKB_
10
2 eT< 16
~.-
4 --'-OR
Z4
115)
5\7--'-00
~al
01-
~a2
~03
~a4
02!~
(7)
03(8)
04-
logic symbol t
4-BIT PARALLEL LATCHED

BUS TRANSCEIVERS
52 (14)
FN PACKAGES
~IR
(17)
15)
51 (2)
O}M~
1
1
2
GAB (15)
.......
C4
3
4
GBA (1)
r--.
C5
'S226
MAX
MAX
OCAB (9)
SINK
OCBA (7)
CURRENT CURRENT
20 rnA
-6.5 rnA
6
ENG
..,
1.
SN54S226 (J,FH) SN74S226 (J,N,FN)
7
8
EN7
Al (3)
ClK A
IR
12
03
3
4
UNCKOUT
DO
13
14
02
01
00
11
04
01
15
6
7
02
03
16 UNCK IN
17 OR
04
18
DE
19
ClK B
GNO
20
VCC
ClR
pin assignments
typical performance
SOURCE
1
2
10
(three-state outputs)
TYPE
IR
G2IZ3
(4)
00-10
226
J. N PACKAGES
11 04
12 03
UNCKOUT
13 02
14 01
DO
01
15 00
02
16 UNCK IN
03
17 OR
04
lB Wi
lIT'
19 ClK B
GNO
20 VCC
ClK A
(2/3)40
\77
(0/1/2)0
(0/1/2)0
G \7
(0/3)50
J. N PACKAGES
G8A
9 OCAB
51
10 B4
Al
11
B3
12 B2
A2
A3
13 Bl
A4
14 52
OCBA 15 GA8
GNO 16 VCC
FH. FN PA.CKAGES
1
nc
11
nc
GBA
12
OCAB
3
4
51
Al
13
14
B4
A2
15
B2
nc
B3
nc
A3
16
17
81
A4
18
52
OC8A 19
GAB
GND
VCC
10
20
(13) Bl
+J
(.)
A2 (4)
(12) B2
A3 (5)
(11) B3
A4 (6)
(10) B4
:s
"0
...o
Q.
nc -
TEXAS
INSTRUMENTS
3-79
PRODUCT GUIDE
logic symbol t
227
pin assignments
FIFO 16,X 4
16 4-BIT WORDS
(input-ready enable, outputready enable, open-collector

outputs)
13) IR
typical performance
TYPE
'LS227
DELAY TIME
TOTAL
FROM CLOCK
POWER
57.5 ns
433mW
SN54LS227 (J)
J, N PACKAGES
1 DE
11 ~
2 IRE
12 03
3 IR
13 02
4 LOCK 14 01
5 DO
15 nc
6 nc
16 _00
7 01
17 OR
8 '02
18 ORE
9 03
19 UNCK
10 GNO 20 VCC
..
CTR
SN74LS227 (J,N)
00

02
112) 03
228
logic symbol t
pin assignments
CTR
11)
EN5
OE
lEI
1
2
3
4
FIFO 16X4
16 4-BIT WORDS
typical performance
12)
DELAY
TYPE
..,
""C
TIME
TOTAL
FROM
POWER
LOCK
CLOCK
c.
c:
'LS228
....'"
57.5 ns
SN54LS228 (J)
5
IR
6
7
8
J. N PACKAGES
OE
9 ern
IR
10 03
02
LOCK 11
DO
12 01
01
13 00
02
14 OR
03
15 UNCK
GNO 16 VCC
114) OR
433 mW
SN74LS228 (J,N)
2
10
DO
01 15)
02
16)
03 17)
3-80
TEXAS
INSTRUMENTS
PRODUCT GUIDE
230,231
logic symbol, 'AS230 t
pin assignments.
J. N PACKAGES
OCTAL BUFFERS AND LINE DRIVERS

1
2
3
4
6
8
7
8
9
10
'AS230 has true and complementary outputs
'AS231 has complementary G and
Ginputs
typical performance
MAX
DELAY
3.5 ns
SOURCE
MAX
SINK
CURRENT
CURRENT
-15 mA
64mA
SN74AS230 (N,FN)
SN74AS231 (N,FNI
SN54AS230 (J,FHI
SN54AS231 (J,FHI
~
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Yl
GND
11
12
13
14
16
18
17
18
19
20
2A1
1Y4
2A2
1Y3
2A3
1Y2
2A4
1Y1
2G
Vcc
logic symbol, 'AS231 t

FH. FN PACKAGES
11
2A1
1 1G
2 1Al 12 1Y4
3 2Y4 13 2A2
4 1A2 14 lY3
6 2Y3 15 2A3
8 1A3 18 1Y2
7 2Y2 17 2A4
8 1A4 18 1Y1
19 2~
9 2Yl
10 GND 20 Vcc
2G on 'AS231
240
logic symbolt
pin assignments
OCTAL BUFFERS/LINE
1
2
DRIVERS/LINE RECEIVERS
!inverted three-state outputs)
typical performance
MAX
MAX
POWER
TYPE
DELAY
SOURCE
CURRENT
SINK
CURRENT
01551PATION
SN54ALS240A
5.5 ns
-12mA
12mA
SN74ALS240A
5.5 ns
-15mA
24mA
SN74ALS240A-1
5.5 ns
-15mA
48mA
SN54AS240
3.5 ns
-12mA
48mA
SN74AS240
3.5 ns
-15mA
64mA
SN54LS240
10 ns
-12mA
12mA
SN74LS240
10 ns
-15mA
24mA
SN54S240
5 ns
-12mA
48mA
SN74S240
5 ns
-15mA
64mA
SN54ALS240A (J,FH)
SN74ALS240A (N,FN)
SN54AS240 (J,FH)
SN74ALS240A-1 (N,FN)
SN74AS240 (N,FN)
SN54LS240 (J,FH)
SN74LS240 (J,N,FN)
SN54S240 (J,FH)
SN74S240 (J,N,FN)
5
6
7
8
9
10
J. N PACKAGES
1"1!
11
2A1
1Al
12 lY4
2Y4 13 2A2
1A2 14 lY3
2Y3 15 2A3
1A3 16 lY2
2Y2 17 2A4
lA4 18 lYl
2Yl
19 2G
GND 20 VCC
52mW
....CJ
:l
"C
Q.
235mW
FH. FN PACKAGES
1 1
11
2Al
2 lAl
12 lY4
3 2Y4 13 2A2
1A2 14 lY3
2Y3 15 2A3
6 1A3 16 lY2
7 2Y2
17 2A4
8 1A4 18 1Yl
9 2Yl
19 2
10 GND 20 VCC
120mW
467mW
t Pin numbers shown on logic symbols are for J and N packages onlv.
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 e. DALLAS. TEXAS 75265
3-81
PRODUCT GUIDE
241
logic symbolt
OCTAL BUFFERS/LINE
lG (11
lA3
MAX
DELAY
7 ns
SN54A LS241 A
MAX
SOURCE
POWER
SINK
DISSI-
CURRENT
CURRENT
-12mA
12mA
SN74ALS241A
7 ns
-15mA
24mA
SN74ALS241A-1
7 ns
-15mA
48 mA
SN54AS241
4 ns
-12mA
48mA
SN74AS241
4 ns
-15mA
64 mA
SN54LS241
10 ns
-12mA
12mA
SN74LS241
10 ns
-15mA
24 mA
SN54S241
5 ns
-12mA
48 mA
SN74S241
5 ns
-15 mA
64mA
SN54ALS241A (J,FHI
C>
lA2~
typical performance
PATION
68mW
EN
lAl~
Inon-inverted three-state outputs I
TYPE
pin assignments
\]
(161
(141
-::::---1
(121
lA4~
2G~EN
(111
(131
J. N PACKAGES
(181
'1
2Al
2A2
(151
2A3
(171
2A4
C>
lG'
11
lAl
12
lY4
2Y4
13
2A2
lA2
14
lY3
2Y3
15
2A3
lA3
16
lY2
2Y2
17
2A4
1
1Yl
lY2
lY3
1Y4
(91
2Yl
(71
2Y2
(51
2Y3
(31 2Y4
lA4
16
2Al
lYl
2Yl
19
2G
10
GND
20
Vee
FH. FN PACKAGES
1~
11
lAl
12
lY4
2Y4
13
2A2
195 mW
127mW
558 mW
SN74ALS241A (N,FNI
2Al
lA2
14
lY3
2Y3
15
2A3
lA3
16
lY2
2Y2
17
2A4
lA4
16
lYl
7
.6
9
2Yl
19
2G
10
GND
20
Vee
SN74ALS241A-1 (N,FNI
""0
SN54AS241 (J,FH)
SN74AS241 (N,FNI
SN54LS241 (J,FHI
SN74LS241 (J,N,FN)
SN54S241 (J,FHI
SN74S241 (J,N,FNI
242
logic symbolt
QUADRUPLE BUS
GBA (131
TRANSCEIVERS
GAB (11
typical performance
0-
s:::
o
r+
TYPE
G)
s:::
c:
CD
DELAY
MAX
MAX
POWER
SOURCE
SINK
DISSI-
CURRENT
CURRENT
PATION
SN54ALS242A
6 ns
-12 mA
12 mA
SN74ALS242A
6 ns
-15 mA
24 mA
SN74A LS242A-1
6 ns
-15 mA
48 mA
3.5 ns
-12 mA
48 mA
SN54AS242
SN74AS242
3.5 ns
-15 mA
64 mA
. SN54LS242
11 ns
-12 mA
12 mA
SN74LS242
11 ns
-15 mA
24 mA
SN54ALS242A (J, FHI

SN54AS242 (J,FH)
SN54LS242 (J,FH)
A2~
A3~
A4~
J. N PACKAGES
ENI
EN2
Al~91
(inverted three-state outputsl
""'I
pin assignments
29
135 mW
133 mW
SN74ALS242A (N, FNI

SN74ALS242A-1 (N, FNI
SN74AS242 (N,FN)
SN74LS242 (J,N,FN)
Al
10
B2
~B2
A2
11
Bl
A3
12
nc
~B3
~B4
A4
13
G6A
GND
14
Vee
(101
nc
11
nc
GA6
12
64
nc
13
Al
14
62
5
6
nc
15
nc
A2
16
61
nc
17
nc
A3
TEXAS
INSTRUMENlS
B3
10
3-82
nc
FH. FN PACKAGES
68 mW
t Pin numbers shown on logic symbols are for,J and N packages only.
B4
GAB
(111
~Bl
<1
C>
63
16
nc
A4
19
G6A
GND
20
Vee
PRODUCT GUIDE
243
logic symbolt
pin assignments
QUADRUPLE BUS
GBA (13)
II)
GAB
TRANSCEIVERS
(non-inverted three-state outputs)
typical performance
TYPE
DELAY
MAX
MAX
POWER
SOURCE
CURRENT
SINK
CURRENT
DISSIPATlaN
SN54ALS243A
8 ns
-12 rnA
12 rnA
SN74ALS243A
8 ns
-15 rnA
24 rnA
SN74ALS243A-1
8 ns
-15 rnA
48 rnA
SN54AS243
4.5 ns
-12 rnA
48 rnA
SN74AS243
-15 rnA
64 rnA
SN54LS243
4.5 ns
12 ns
-12 rnA
12 rnA
SN74LS243
12 ns
-15 rnA
24 rnA
SN54ALS243A (J,FH)
93mW
Al~
A2~
ENI
EN2
'\71
Ill)
~Bl
<l
!>
2'\7
(10)
~B2
nc
3
4
AI
A2
A3
A4
GND
5
6
7
A3~
~B3
A4~
~B4
180mW
138 mW
lG (1)
EN
!>
lAl.!#--
typical, performance
lA2~
DELAY
MAX
MAX
POWER
SOURCE
SINK
DISSIPATlaN
CURRENT
CURRENT
SN54ALS244A
SN74ALS244A
7 ns
7 ns
-12mA
-15mA
12mA
24 rnA
SN74ALS244A-1
7 ns
-15mA
48 rnA
SN54AS244
4.5 ns
-12mA
48 rnA
SN74AS244
4.5 ns
-15mA
SN54LS244
12ns
12 ns
-12mA
64 rnA
12mA
SN74S244
GBA
vee
GND
Vee
20
J. N PACKAGES
SN74LS244
SN54S244
13
14
pin assignments
logic symbolt
OCTAL BUFFERS/LINE
TYPE
B3
B2
Bl
nc
FH. FN PACKAGES
II
nc
nc
I
2 GAB 12 B4
13 B3
3 nc
14 B2
4 AI
15 nc
5 nc
16 Bl
6 A2
17 nc
7 nc
18 nc
8 A3
19 GSA
9 A4
10
244
9
10
II
12
(9)
SN74ALS243A (N,FN)
SN74AS243 (N,FN)
SN74LS243 (J,N,FN)
SN54AS243 (J,FH)
SN54LS243 (J,FH)
J. N PACKAGES
ilAB
B B4
6 ns
-15mA
-12mA
4BmA
6 ns
-15mA
64 rnA
SN54ALS244A (J,FH)
24mA
68mW
235 mW
~1Y4
lA4~
EN
2Al..!!.!l...-
2A2~
2A3~
2A4~
127mW
SN74AS244 (N,FN)
SN74LS244 (J,N,FN)
SN54S244 (J,FH)
SN74S244 (J,N,FN)
"V~2Vl
t---JZ!. 2Y2
.---ill 2Y3
~2Y4
lil
lAl
2V4
lA2
2V3
lA3
6
7 .2Y2
lA4
8
9 2Yl
10
GND
II
12
13
14
15
16
17
18
19
20
2Al
lV4
2A2
lV3
2A3
lV2
2A4
lVl
2eI
Vee
FH. FN PACKAGES
Ill"
II
2Al
I
12 lV4
2 lAl
3 2Y4 13 2A2
4
lA2 14 lY3
6
7
8
9
10
SNALS244Al (N,FN)
SN54AS244 (J,FH)
!>
3
4
5
558 mW
SN74ALS244A, (N,FN)
SN54LS244 (J,FH)
~1Y2
~lV3
lA3~
20 (19)
~
"V~1Yl
I
2
2Y3
lA3
2Y2
lA4
2Yl
GND
15
Ie
17
....,
CJ
:l
"C
...o
c.
2A3
lY2
2A4
18
19
lVl
2G
20
vee
TEXAS
INSTRUMENTS
3-83
PRODUCT GUIDE
245
logic symbolt
OCTAL BUS TRANSCEIVERS
G 1191
OIR 11)
Inon-inverted three-state outputs)

typical performance
MAX
TYPE
DELAY
SOURCE
SINK
DISSI-
CURRENT
CURRENT
PATION
SN54ALS245A
6 ns
-12mA
12mA
SN74ALS245A
6 ns
-15mA
24mA
SN74ALS245A-1
6 ns
-15mA
48mA
SN54AS245
6 ns
-12mA
32mA
SN74AS245
6 ns
-15mA
48 mA
SN54LS245
8 ns
-12mA
12mA
SN74LS245
8ns
-15mA
24 mA
SN54ALS245A (J,FHI
SN54AS245 (J,FH)
SN54LS245 (J,FH)
*-fs1'--
m/RBO
A8~
~B8
WITH RIPPLE BLANKING
RBi
1246-active-low, open-collector,
LT
.....
1.....:::
--'-"'>..
290mW
BIN/7SEG
[T2)
;;'1
CT=oL
a 20.21 O~
b 20,210
c 20,210 I'-..
d 20,210'"
e 20,21 O~
D~8
20,2101'-..
9 20,21 0 ~
f
typical performance
VOLTAGE
'246
40mA
30 V
320mW
'247
40mA
15 V
320mW
12mA
15 V
35mW
SN74LS247
24 mA
15 V
35mW
a
(12) b
(11)
c
(10)
3
4
5
6
7
8
9
10
(9)
(15)
(14)
SN74246 (J,N)
SN74247 (J,N)
SN74LS247 (J,N,FN)

nc - no internal co"nection.
(13)
POWER
SN54LS247
FONT TABLE T2 - RESULTANT DISPLAYS USING '246 AND '247
101
OIR
Al
A2
A3
11213IYI5151118Iglcl:JIUI~It:1
4
TEXAS
INSTRUMENTS
10
11
12
13
14
PACKAGES
11
B
12
e
13
[l
14
BI/ABO 15
nc
16
ABI
17
D
18
A
19
GND
20
FH, FN
TOTAL
OUTPUT
CURRENT
SN54246 (J,FH)
SN54247 (J,FH)
SN54LS247 (J,FH)
PACKAGES
B
9 e
10 d
C
LT
11 c
BI/ABO 12 b
RBI
13 a
0
14 9
A
15 f
GNO
16 Vee
J, N
1
2
3
4
5
6
7
8
C G21
C~4
OFF-STATE
C>
&
A~1
B~2
SINK
PACKAGES
11 B8
12 B7
13 B6
14 B5
A4
15 B4
A5
16 B3
A6
17 B2
A7
18 Bl
A8
19 G
GNO 20 Vee
FH, FN
1
2
3
4
5
6
7
pin assignments
V20
15-volt outputs)
9
10
310mW
(3)
1247-active-low, open-collector,
(5)
3D-volt outputs)
1
2
3
4
5
6
7
9
10
(4)
'F
DECODERS/DRIVERS
OUTPUT
~::
~B6
12)
B7
:~~
173 mW
118)
::tBl
(17)
15) B4
14) B5
A4~
A5~
logic symbol t
BCD-TO-SEVEN-SEGMENT
3-84
A2
A3
I> 2\7
PACKAGES
OIR
11 BB
Al
12 B7
A2 . 13 B6
A3
14 B5
A4
15 B4
A5
16 B3
A6
17 82
A7
18 Bl
AB
19 ~
GNO 20 Vee
J, N
SN74ALS245A (N,FN)
SN74AS245 (N,FN)
SN74LS245 (J,N,FN)
246
247
TYPE
A l : t \71 <l
POWER
MAX
pin assignments
G3
3 ENl [BA!
3 EN2 [AB!
15
nc
.
nc
d
c
b
nc
a
9
f
Vee
PRODUCT GUIDE
logic symbol t
248
pin assignments
BIN/7-SEG
[T2)
BCDTOSEVEN SEGMENT
Bl/RBO
DECODERS/DRIVERS
(internal pullup outputs)
(1'.. ......
LT
"'l....:::
RBI (51
....
~21
&
(31
CT-oL
V20
A (71
OFF-5TATE
OUTPUT
TYPE
SINK
OUTPUT
CURRENT
VOLTAGE
(111
20,21~
1
2
3
4
5
6
7
B
9
10
11
12
13
14
t't
IDIR&l 15
nc
16
fIBI
17
D
18
19
A
GND
20
nc
B
C
.
.
nc
nc
g
f
VCC
~d
(91
20,21~
20,21~
(151
9 20,21~
(141
f
9
TOTAL
6.4 rnA
5.5V
265mW
2mA
5.5 V
l25mW
SN74LS248
6mA
5.5V
l25mW
SN74248 (J,Nl
SN74LS248 (J,N,FN)
SN54248 (J,FH)
SN54LS248 (J,FH)
249
logic symbol t
BCDTO-5EVEN SEGMENT
BI/RBO
DECODERS/DRIVERS
pin assignments
BIN/7-SEG
[T2)
(41
...
..... ~
RBI (51
tT
....
&
G21
(31
CT=oL~
V20
Am
B!!L- 2
C~4
olmOUTPUT
OFF-5TATE
SINK
OUTPUT
a 20,21 Q
J131 a
b 20,21 Q
.il~ b
c 20,21Q
(111
d 20,21Q
(101
J. N PACKAGES
9
B
10 d
C
11 c
LT
BIIRBO 12 b
13 a
RBI
14 9
D
15 f
A
16 VCC
GND
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
20,21Q
9 20.21Q
11
12
13
14
t't
!liIRBO 15
16
nc
17
RBI
18
D
A
19
20
GND
B
e
.
nc
c
b
nc
a
9
f
....
VCC
(.)
:J
-C
d
(91
e
(15)
f
(141
20,21 Q
typical performance
o
a-
0.
TOTAL
POWER
CURRENT
VOLTAGE
'249
lOrnA
5.5V
265mW
SN54LS249
4mA
5.5 V
40mW
SN74LS249
8mA
5.5V
40mW
SN54249 (J,FH)
SN54LS249 (J,FHl
1
2
3
4
5
6
7
8
;;'1
TYPE
FH. FN PACKAGES
POWER
SN54LS248
'248
(131
J. N PACKAGES
B
9 e
10 d
C
11
LT
c
BIIRBO 12 b
13
RBI
14 9
D
15 f
A
16 Vce
GND
1121 b
d 20,21~
C~4
olm-
W,21 ~
b 20,21 ~
B!!L-2
typical performance
1
2
3
4
5
6
7
8
;;'1
SN74249 (J.Nl
SN74LS249 (J.N,FNl
FONT TABLE T2 - RESULTANT DISPLAYS USING '24BAND '249

101 11213IyI5151118Iglcl:JIU ICIt:1

o
TEXAS
INSTRUMENTS
10
11
12
13
14
15
3-85
PRODUCT GUIDE
MUX
10F16 DATA
SELECTORSI
MULTIPLEXERS
EN
}G1~
DATA
TYPE
pin assignments
logic symbol t
250
TOINV
OUTPUT
FROM
TOTAL
ENABLE
POWER
0
EO
'AS250
1
2
SN54AS250 (J,FH)
SN74AS250 (N,FN)
E2
E3
E4
E5
E7
E8
E9
El0
Ell
E12
E13
E14
E15
"
E6
(21)
(20)
(19)
(18)
(17)
(16)
15
E4
16
E15
E3
17
E14
E2
18
E13
7
8
9
10
11
12
El
19
EO
20
E12
Ell
21
El0
22
E9
23
E8
GND
24
VCC
FH PACKAGE
15
NC
1
2
NC
E7
16
E6
17
E5
18
E4
19
E15
E3
20
E14
E2
21
E13
NC
22
NC
10
El
11
10
11
EO
23
24
E12
Ell
1r
25
ElO
12
12
26
E9
13
13
27
E8
14
GND
28
VCC
14
15
"'C
""'I
oQ.
c::
(')
r+
NC - No internal connection.
3-86
E5
El
J, N PACKAGES
13
E7
C
14
E6
B
TEXAS
INsrRUMENTS
PRODUCT GUIDE
251
MUX
(true and inverted threestate outputs)
G
A
typical performance
DELAY TIMES
DATA TO
DATA TO
INV
NON-INV
OUTPUT
OUTPUT
21 ns
TYPE
'251
pin assignments
logic symbol t
DATA SELECTORS! MULTIPLEXERS
FROM
ENABLE
.l1&-..
-l2.L
:)G*
DO~
.....ill-
TOTAL
Dl
D2..EL 2
21 ns
250 mW
6 ns
5 ns
4.5 ns
37.5 mW
'AS251
2.7 ns
3.5 ns
5.5 ns
'LS251
17 ns
21 ns
21 ns
140mW
'35 mW
'5251
4.5 ns
8 ns
14 ns
275 mW
SN54251 (J,FH)
SN54ALS251 (J,FH)
SN54AS251 (J,FH)
SN54LS251 (J,FH)
SN54S251 (J,FH)
B
C
EN
POWER
'ALS251
17 ns
.Jll.J::..
J.llL
r--12L
y
\l
\l ~w
D4~
FH. FN PACKAGES
1 nc
11 nc
2 03
12 C
3 02
13 8
4 01
14 A
5 00
15 07
6 nc
16 nc
7 Y
17 06
8 w
18 05
9G
19 04
10 GNO 20 VCC
D5.....!.!.!L 5
-lllL
D7..JgL
D6
pin assignments
logic symbol t
DUAL DATA SELECTORS!

A (14)
MULTIPLEXERS
O)G~
(2)
typical performance
DATA TO
TYPE
NON-INV
OUTPUT
'ALS253
MUX
lCO~
FROM
TOTAL
ENABLE
POWER
lCl
4.5 ns
32 mW
'AS253
3.3 ns
5.5 ns
117mW
'LS253
12 ns
16 ns
35 mW
~ 1
(4)
\l
~lY
lC2~ 2
1C3....8l.-
5 ns
SN54ALS253 (J,FH)
SN54AS253 (J,FH)
SN54LS253 (J,FH)
SN54S253 (J,FH)
lGJl!...t::,. EN
DELAY TIMES
2G
2CO
llil.l::.
.!.1.!!L
2C1..!!1L
SN74ALS253 (N,FN)
SN74AS253 (N,FN)
SN74LS253 (J,N,FN)
SN74S253 (J,N,FN)
J. N PACKAGES
03
9 C
02
10 8
01
11 A
00
12 07
Y
13 06
W
14 05
IT
15 04
GNO 16 vcc
D3...ill- 3
SN74251 (J,N)
SN74ALS251 (N,FN)
SN74AS251 (N,FN)
SN74LS251 (J,N,FN)
SN74S251 (J,N,FN)
253
1
2
3
4
5
6
7
8
JEL
~~~ illL
J. N PACKAGES
9 2Y
lG
8
10 2CO
2Cl
lC3 11
lC2 12 2C2
lCl
13 2C3
lCO 14 A
15 2G
lY
B GNO 16 VCC
1
2
3
4
5
6
7
FH. FN PACKAGES
11 nc
1 nc
2 lG
12 2Y
3 B
13 2CO
4
lC3 14 2Cl
5 lC2 15 2C2
6 nc
16 nc
7 lCl 17 2C3
8 lCO 18 A
19 2G
9 lY
10 GNO 20 VCC
~2Y
.....
(,)
::l
"C
'a..
t Pin numbers shown on logic symbols are for J and N packages on IV.
nc - no internal connection ..
TEXAS
INSTRl,JMENlS
3-87
PRODUCT GUIDE
257
logic symbol, 'ALS25 7, 'LS257 t
pin assign menU
QUAD DATA SELECTORS/

1
2
MULTIPLEXERS
Inon-inverted three-state 'outputs)
AlB
3
4
DELAY TIMES
DATA TO
TYPE
NON-INV
OUTPUT
'ALS257
4_3 ns
FROM
1A
TOTAL
ENABLE
POWER
7.5 ns
33.5 mW
'AS257
3 ns
4 ns
'LS257B
11 ns
18 ns
60 mW
5 ns
14 ns
320 mW
'S257
SN54ALS257 (J,FH)
SN54AS257 (J,FH)
SN54ALS257B (J,FH)
SN54S257 (J,FH)
85mW
SN74ALS257 IN,FN)
SN74AS257 (N,FN)
SN74ALS257B (J,N,FN)
SN74S257 (J,N,FN)
1Y
1B
2A
2Y
4Y
4B
AlB
1A
1Y
1B
2A
2Y
2B
3A

nc -
3-88
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
3Y
3B
4A
4B
7
B
2B
3A
3B
4A
5
6
J. N PACKAGES
AlB
9 3Y
1A
10 3B
18
11
3A
12 4Y
1Y
13 4B
2A
14 4A
2B
2Y
15 _0
GND 16 Vee
3Y
(13)
(12)
4Y
TEXAS
INsrRuMENlS
nc
AlB
1A
18
1Y
nc
2A
28
2Y
GND
11
12
13
14
15
16
17
18
19
20
nc
3Y
3B
3A
4Y
nc
4B
4A
no
Vee
PRODUCT GUIDE
258
logic symbol, 'ALS258, 'LS258 t
pin assignments
QUAD DATA SELECTORS/
G (15)
MULTIPLEXERS
(inverted
three~tate
outputs)
EN
(1)
AlB
Gl
MUX
typical performance
1A
1B~
DELAY TIMES
DATA TO
TYPE
INV
OUTPUT
....!3l.-
FROM
TOTAL
ENABLE
POWER
2B ....I&.3AJllL
3 ns
7.5 ns
29mW
4A~
4 ns
65mW
4B
'LS258B
11 ns
19 ns
14 ns
60mW
'S258
4 ns
280mW
SN74ALS258 (N,FN)
SN74AS258 (N,FN)
SN74LS258B (J,N,FN)
SN74S258 (J,N,FN)
~2Y
G (15)
.ill2B ..l2L-
~2Y
3A
3B
4A
4B
..ll1!.-
J.!.!!.L
~3Y
..ili!.....!EL
~4Y
pin assignments
O}
typical performance '
'259
LOW
12 ns
300mW
'ALS259
LOW
'LS259
LOW
17 ns
110mW
SN54259 (J,FH)
SN54ALS259 (J,FH)
SN54LS259 (J,FH)
SN74259 (J,N)
SN74ALS259 (N,FN)
SN74LS259 (J,N,FN)
1
2
3
4
8M.!!.
7
G8
'1
POWER
VCC
\l~lY
....EL-
O~ Z9
CLR~ Z10
TOTAL
MUX
lB
2A
so--ill.-
DELAY
nc
3Y
3B
3A
4Y
nc
4B
4A
Gl
Sl..!&S2~ 2
CLEAR
GND
11
12
13
14
15
16
17
18
19
20
EN
(1)
AlB
G'.illJJ::::"
TYPE
nt
AlB
lA
lB
lY
nc
2A
28
2Y
logic symbol, 'S25S t
logic symbol t
S-BIT ADDRESSABLE LATCHES
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
~4Y
....illL
lA~ T
259
J. N PACKAGES
AlB
9 3Y
10 3B
lA
lB
11
3A
lY
12 4Y
2A
13 4B
14 4A
2B
2Y
15 G
GND 16 Vcc
~3Y
3B~
2.5 ns
SN54ALS258 (J,FH)
SN54AS258 (J,FH)
SN54LS258B (J,FH)
SN54S258 (J,FH)
\l~lY
2A~
'AS258
'ALS258
t>
1
2
3
4
5
6
7
B
9,00
r10,OR
9,10
10.1R
9,20
lOJR
9,30
10:3R
9,40
10,4R
9,50
10;5R
9,60
10;6R
9,70
10JR
5
6
r
~OO
~01
7
8
J. N PACKAGES
SO
9 04
SI
10 05
S2
11
06
12 07
00
01
13 D
14 G
02
15 CLR
03
GND 16
Vcc
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
SO
SI
S2
00
nc
01
02
03
GND
11
12
13
14
15
16
17
18
19
20
nc
04
05
06
07
nc
....,
(,)
:::l
"'C
CLR
vcc
o
a.
~
--lL 02
-lZL03
~04
~05
~06
r---J.!!l. 07
TEXAS
INSTRUMENTS
3-89
PRODUCT GUIDE
260
logic symbol t
111
DUAL 5-INPUT POSITIVE-
lA-
NOR GATES
1B.:J!L..
131
pin assignments
1
lA
28
nc
11
nc
18
2C
lA
12
28
lC
10
20
18
13
1121
101131
2A
11
2E
lC
14
20
lY
12
10
ne
15
nc
2Y
13
lE
2A
16
2E
(41 t - - - - - - I
2A181
2B-
GND
14
VCC
ne
17
ne
lY
18
10
2Y
19
lE
GND
20
VCC
~ lV
lC-
TYPE
'S260
POWER'I
I
GATE
DELAY
54 mW
4 ns
lE-
SN74S260 (J,N,FNI
SN54S260 (J,FHI
FH. FN PACKAGES
J. N PACKAGES
;;>1
10
~.2V
(91
2C-
2C
(101
202E.J.!!L' - - _ _ _ _....J
261
logic symbol t
2-BIT BY 4-BIT PARALLEL
BO~
BINARY MULTIPLIERS
Bl~
B2~
JL
typical performance
I TYPE I POWER I TIME**l

!'LS261!100 mW!
25 ns
SN54LS261 (J,FH)
O}
pin assignments
J. N PACKAGES
2'SCOMP1T*
o r10- - - ~OO
---10
~01
B3
B4...El- 4
Mo-illL O}
SN74LS261 (J,N,FN)
M1--1.lli-
~ r----ill02
1T
M2~2
c-'1L
positive logic: Y=ABci)
"'0
264
LOOK AHEAD CARRY GENERATOR
ne
11'
ne
00
83
12
01
11
MO
84
13
00
M2
12
Ml
14
MO
04
13
BO
M2
15
Ml
03
14
ne
16
02
15
B2
04
17
BO
GNo
16
VCC
03
lB
Bl
Bl
9
10
ne
02
19
B2
GNo
20
VCC
CI
pin assignments
J. N PACKAGES
logic symbol t
r+
ACTlVEHIGH INPUTS
ACTIVE-LOW INPUTS
ICLA FOR CTRSI
ICLA FOR CTRSI
1.3
CE.!E!.... Zl
BO~
Z2
r--;;r-
2.3
1.3.5.~
2.3.5
AOEl- 03
Bl
01
10
-W- ~03
-W- "- (51 -04
'---~'
""t
(")
84
* Partial.product Generator
** 5-6it Product Time
C.
C
FH. FN PACKAGES
l ' 83
2
ill-
Z4
~Cl
4.5
1.3.5.7
2.3.5.7
Al..!.!.L G5
1121
~CO
r--;;-r-
4.5.7
r--Zl
BO~
02
AO.E!..!::::. Z3
1.2.4
Bl.E!.r::::. 04
Al.!!.!..r::::. Z5
5.6
3.4.6
1.2.4.6
B2~Z6
A2~G7
A2~
Z8
8.9
A3~G9
Z7
B3~08
A3~
--;;--
~CO
t--.. 1
1.4.6.8
Z9
~RCOB
Bl
10
aO
BO
A3
~C2
FH PACKAGES
C2
1 NC
11
NC
RCOA
2 Al
12
C2
11
Cl
3 Bl
13
RCDA
12
CO
4 AO
14
Cl
13
CE
5 BO
15
CO
B3
14
A2
6 NC
16
NC
RCDB
15
B2
7 A3
17
CE
GNo
16
VCC
8 B3
18
A2
9 RCOB
19
B2
20
VCC
SN54AS264 (J,FH)
10 GNo
SN74AS264 (N,FNI
r--.. 1
7.8
5.6.8
3.4.6.8
Al
p...!!!!. Cl
3.4
B2.!!:::. 06
B3~
.. 1
1.2
CE~
~RCOA
----1.2.4.6.8
~RCOB
6-8
For further information, contact the factory.
3-90
TEXAS
INSTRUMENTS
PRODUCT GUIDE
265
logic symbol t
QUAD COMPLEMENTARY-
1A~
2A~
2B~
&
~1V
~2W
&
----i!!.
~4W
=1
OUTPUT ELEMENTS
typical performance
3A~
TYPE I POWER I
..!..!3l-
3B
'265 1125 mW 1
(15)
4A-
266
logic symbol t
QUAD 2-INPUT EXCLUSIVE-
1A~
NOR GATES WITH OPEN-
1BEL-
COLLECTOR OUTPUTS
2A~
typical performance
3A~
SN54LS266 (J,FH)
SN74LS266 (J,N,FN)
positive logic: Y
HEX D-TYPE LATCHES
C (9)
I'S268
OUTPUTS
Q
DELAY
7 ns
SN54S268 (J,FH)
1525 mW
--E.!..
1
2
3
1Q
~2Q
--E.L.
-1!L
--1!!!..
(13)
50(14)
60-
FHPACKAGE
nc
11 nc
lA
12 3Y
lW
13 3W
lY
14 3A
2A
15 38
nc
16 nc
2B
17 4Y
2W
18 4W
2Y
19 4A
GNO 20 Vcc
lA
lB
lY
2Y
2A
2B
GNO
8
9
10
11
12
13
14
3A
3B
3Y
4Y
4A
4B
Vcc
FH. FN PACKAGES
1 nc
11 nc
12 3A
2 lA
13 3B
3 18
4 1Y
14 3Y
5 nc
15 nc
16 4Y
6 2Y
7 nc
17 nc
8 2A
lB 4A
19 4B
9 28
10 GNO 20 Vcc
3Q
4Q
5Q
5
6
7
8
J. N PACKAGES
DC
9
C
40
10
10
10
11
40
12
20
50
20
13
50
14
30
60
15
60
30
GNO
16
VCC
1
2
3
4
5
6
7
8
9
10
~6Q
FH. FN PACKAGES
11
NC
NC
12
C
OC
13
40
10
14
40
10
15
20
50
NC
NC
16
17
50
20
18
60
30
30
19
60
20
GNO
VCC
...,
SN74S268 (J,N,FN)
(.)
273
::l
logic symbol t
CLR
OCTAL D-TYPE FLIP-FLOPS
typical performance
POWER
TYPE
FREQ
'273
40 MHz
39 mW
'AlS273
50 MHz
40 MHz
9.4 mW
PER FF
10.6 mW
DATA TIMES
SETUP
20 nsl
HOLD
5 nsl
20 nsl
5 nsl
SN74273 (J,N)
SN74ALS273 (N,FN)
SN54LS273 (J,FH)
SN74LS273 (J,N,FN)
J. N PACKAGES
R
C1
4D~
5D~
6D~
.!.!!l-
8D~
SN54ALS273 (J,FH)
"0
pin assignments
1D~1D
2D~
3D~
70
SN54273 (J,FH)
(1)
ClK (11)
(common clock, single-rail outputs)
'LS273
10E!....- 10
TOTAL
POWER
1
2
3
4
5
6
7
8
9
10
pin assignments
20~
30~
40~
3Y
3W
3A
3B
4Y
4W
4A
VCC
=A1FB =AS + As
EN
C1
(three-state outputs, common

output control, common enable)
1
2
3
4
5
6
7
~4Y
(1)
9
10
11
12
13
14
15
16
J. N PACKAGES
1Y
~3Y
OC
typical performance
3B~
logic symbol
lA
lW
lY
2A
2B
2W
2Y
GND
pin assignments
~2Y
268
TYPE
~4Y
4A~
4B~
18 ns
I 'LS2661 40 mW I
3W
~3Y
.ill.-
2B
1 TYPE 1 POWER I DELAY I
J. N PACKAGES
1
2
3
4
5
6
7
8
~2Y
SN74265 (J,N)
SN54265 (J,FH)
pin assignments
(2)
~1W
(2)
~1Q
r--- 2Q
r----12!-
3Q
~4Q
~5Q
~6Q
~7Q
~8Q
1
2
3
4
5
6
7
8
9
10
ITA
10
10
20
20
30
30
40
40
GNO
11
12
13
14
15
16
17
18
19
20
ClK
50
50
60
60
70
70
80
80
VCC
FH. FN PACKAGES
1 ClR 11 ClK
2 10
12 50
13 50
3 10
4 20
14 60
15. 60
5 20
6 30
16 70
7 3D
17 70
18 80
8 40
9 40
19 80
10 GNO 20 VCC
o
a-
0.
TEXAS
INSTRUMENTS
3-91
PRODUCT GUIDE
274
logic symbol t
A2n...llL..
MULTIPLIERS
A2n+'~
A2n+2~
typical performance
1 TYPE 1 POWER 1 TIME"
1 'S274 1525 mW 1 50 ns
SN54S274 (J,FH)
pin assignments
7T
4-BIT BY 4-BIT BINARY
SN74S274 (J,N.FN)
A2n+3~
B2n~
B2n+'~
B2n+2~
B2n+3..l!L
G1...illlc:::..
G2~
}
}
o~2n
~2n+'
~2n+2
~2n+3
7T\l.
~2n+4
~2n+5
r}
~2n+6
1
2
3
4
5
6
7
8
9
10
J. N PACKAGES
A2 n
11 2n+4
A2n+ 1 12 2n+ 5
A2n+2 13 2n + 6
A2 n + 3 14 2n + 7
15 G1
62 n
16 G2
2n
2n+ 1
17 62n+ 1
2n + 2
18 82 n +2
2n + 3
19 82 n + "
GND
20 VCC
1
2
3
4
5
6
7
8
9
10
FH. FN PACKAGES
11 2n+4
A2 n
A2n+ 1 12 2n + 5
A2n+ 2 13 2n + 6
A2 n + 3 14 2n + 7
15 G1
62 n
2n
16 G2
2n + 1
17 62n+ 1
2n + 2
18 82 n + 2
2n + 3
19 62 n + 3
GND
20
VCC
7~2n+7
a-Bit Product Time
logic symbol t
276
PRE
QUAD J-K FLIP-FLOPS
Ci:R
(separate clocks, edge-triggering,
(1)
pin assignments
lCLK~ pITCl
typical performance
lK
I I
IpOWER/1 DATA TIMES
TYPE FREQ
F-F
ISETUpl HOLD 1
1 '276 150MHzI 75mW 13nsl110nsl 1
1 Falling edge of clock pulse

SN74276 (J,N)
"C
.ill...t:::..
2CLK~
.!Z!.....!::::.
3J~
3CLK
.!.!1!...t:::..
4J
4K
l!Z!....t:::.
3K~
4CLK~
o
a.
~'Q
lK
2J~
2K
J. N PACKAGES
ITS
lJ~lJ
common direct clear and preset)
SN54276 (J,FH)
(11)
~2Q
~3Q
~4Q
t:
(')
,...
t Pin numbers shown on logic
Symb~ls are for
3-92
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
9
10
1J
1 ClK
1K
10
20
2K
2ClK
2J
GND
11
12
13
14
15
16
17
18
19
20
PRE
3J
3ClK
3K
30
40
4K
4ClK
4J
VCC
FH PACKAGE
1
2
3
4
5
6
7
8
9
10
ITA
1J
1ClK
1K
10
20
2K
2ClK
2J
GND
11
12
13
14
15
16
17
18
19
20
PRE
3J
3ClK
3K
30
40
4K
4ClK
4J
VCC
PRODUCT GUIDE
278
logic symbol t
pin assignments
HPRI REG
4-BIT CASCADABLE
STROBE (1)
PRIORITY REGISTERS
typical performance
1 '278 1275 mW 1 35 ns
SN74278 (J,N)
G2
0.i~Y2
01...i!&- 50
Gl
O~Yl
I TYPE I POWER I DELAY l
I 90 mW I
I'LS279l.1 19 mW I
280
POWER
'S280
80mW
335 mW
SN54AS280 (J,FH)
SN54LS280 (J,FH)
SN54S280 (J,FHI
F....J.EL
31 ns
EVEN
~~
G..1lL
H-l&I...i&-
13 ns
Vee
lit
1S1
152
10
2R
25
20
GNO
9
10
11
12
13
14
15
16
30
3lt
3S1
3S2
40
4R
4S
STAB
03
04
nc
PO
nc
Pl
Y4
GNO
11
12
13
14
15
16
17
18
19
20
nc
Y3
Y2
Yl
nc
nc
nc
01
02
Vce
Vce
FH, FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
111
1S1
152
10
nc
2R
25
20
GNO
11
12
13
14
15
16
17
18
19
20
nc
30
3R
3S1
3S2
nc
40
4R
4S
Vee
Ell
FH, FN PACKAGES
J, N PACKAGES
--1!L-
0..1l!L
E..J.ill...
DELAY
01
02
nc
pin assignments
c.J.1.QL
'AS280
nc
FHPACKAGE
1
2
3
4
5
6
7
8
9
10
4~4Q
B~
typical performance
'LS280
3~3Q
2k
GENERATORS/CHECKERS
TYPE
2 --!ZL2Q
logic symbol t
9-BIT ODD/EVEN PARITY
9
10
11
12
13
14
GNO
1
2
3
4
5
6
7
8
--1.1L1Q
3R.illlli:::. R
SN74279 (J,N,FN)
SN54LS279A (J,FH)
Y3
Y2
Yl
J, N PACKAGES
3S,J.!.!l.I:::.. 53
SN74LS279A (J,N,FN) 3S~ Jlll..t:.. 53
4R~ R
4~..illlr::::.. 54
SN54279 (J,FH)
03
04
PO
Pl
Y4
1,2,3,4 ~Pl
2R.ill...t:a. R
2S.J2.l..r:::.. 52
12 ns
12 ns1
STRB
pin assignments
1R.ill...I:::.. R
lS1J&.J:::::a. 51
1S2..lli....t::.. 51
typical performance
'279
1
GO
logic symbol t
QUAD S-R LATCH ES
o,T.2 ~Y3
G3
02~ 50
PO~
279
0,1,2.3 ~Y4
G4
03.ill.- 50
SN54278 (J,FH)
04..!1L- 50
I TYPE I POWER I DELAY I
J, N PACKAGES
1
2
3
4
5
6
7
C5
000
1
2
3
4
5
6
7
H
nc
I
:!:EVEN
WOO
GNO
8
9
10
11
12
13
14
A
B
0
E
F
Vee
1
2
3
4
5
6
7
8
9
10
11
12
13
14
nc
nc
15
16
I
nc
17
IEVEN 18
WOO
19
GNO
20
nc
nc
B
e
nc
0
nc
E
F
Vee
SN74AS280 (N,FN)
SN74LS280 (J,N,FN)
SN74S280 (J,N,FNI
TEXAS
INSTRUMENTS
3-93
PRODUCT GUIDE
281
logic symbol t
4-BIT PARALLEL BINARY
ASO~
AS1~
ACCUMULATORS
typical performance
TYPE
'S281
ADD
TIME
20 ns
POWER
720mW
RC ~
I
t=
22)
ClK
---11L-
.~
A3~
t:
Fl
A2
17
RSO
16
Fa
RSI
18
Fl
RC
17
RSO
19
Fa
6
7
RC
lltRO
20
21
nc
22
nc
23
24
ASI
35.20,260
21,260
ASI
21
10 Cn + 4
11 P
12 GNO
22
ClK
9
10
23
24
AO
11
Cn
rr
VCC
12
Cn
,.
...
31 P
(1)
[A)
ll/RO
ASO
Rl/l0
235
~FO
232
36.20.260
[B)
233
32
~(2)
236
~Fl
33
P
(4)
237
~F2
238
[C)
24,22,260
25,22,260
34
\725,21
38,20,260
[O[
P
(8)
O} G0
1
3
24
Pl~
P3~
rr
14
GND
28
VCC
AO
F3
~Cn+x
CPZ
CP3
Cn + z
12
13
14
15
16
PI
rrO
PO
G3
P3
CO2
CP
~p
CG
~G
1'1
12
C n'
GO
13
Cn '
Cn+v
Cn + x
PO
G3
P3
50
14
15
Cn+v
Cn + x
17
CnA
51
18
rr2
19
20
P2
Cn+.
CG3
SN74AS282 (N,FNI
TEXAS
INSTRUMENTS
11
Gl
SO
GND
FH, FN PACKAGES
1
6
7
B
COl ~Cn+y
CGO
CPl
11
10
CPO
(;1
(14)
GZ..!.!!!......r: CGZ
G3~
Cn'
CI
Gl...!.!.!....... CGl
PZ~
1
COO
PO~
ClK
13
26
27
pin assignments
cnBt~
GO~
Rl/LO
Cn + 4
234
J, N PACKAGES
Sl~
ASO
25
\724,21
1
SO!....-
A3
AS2
logic symbol t
(16)
3-94
15
20
cnA~O
SN54AS282 (J,FH)
F2
RSI
(17)
r+
F3
~ 25(21+/22+) [ABCO)
Ll/RO
Q.
nc
16
l}EN
37,20,260
(')
15
AI
18
19
~ 24121+/22+) [ABC)
A2~
LOOKAHEAD CARRY
GENERATOR WITH
SELECTABLE
CARRY INPUTS
nc
7 A3
\722
-.
o
F2
20 SRG4
EN25 [logic, ABCO)

C26
(21)
."
F3
14
EN24 (Arithmetic, ABC)
Rl/lO~
282
13
AS2
AO~~31
Al
1 AI
2 A2
RS1~
15)
SN74S281 (J,N,FNI
~G
CI
RSO
~p
(10)
(0 ... 7) CO ~Cn+4
c,,~
TOTAL
(0 ... 7) CG
15
FH, FN PACKAGES
J,N PACKAGES
(0 7) CP
}~
---l.!2L
----'..!.!!!-
AS2
M
SN54S281 (J,FHI
pin assignments
AlU
CnS
VCC
6
7
B
9
10
Cn + z
G
16
17
CnS
CnA
51
P
18
G2
19
P2
GND
20
VCC
PRODUCT GUIDE
283
logic symbol t
A1~
TYPE
CI
ADD
POWERI
A4.-..!EL
TIME
TIME
BIT
B1~
10 ns
16 ns
76mW
10 ns
15 ns
24mW
'S283
7 ns
11 ns
124mW
SN54283 (J,FH)
SN54LS283 (J,FH)
SN54S283 (J,FH)
B~.....llL
~k2
~k3
i-.ll&-k4
FH, FN PACKAGES
12
C4
nc
11
14
12
12
C4
64
B2
13
14
nc
62
10
A2
11
11
12
A4
A2
14
64
Al
13
13
11
15
A4
61
14
A3
nc
16
nc
CO
GNO
15
16
VCC
63
CO ~C4
Al
Bl
17
16
13
A3
eo
19
63
GNO
20
Vee
10
WITH '285
MSS's for 4 X 4 multiplier
Use 'S274, 'LS275, 'S275 for new

designs/larger multipliers
typical performance
}
.{
}
1B ...ill.1CJZL--.
2A.EL.2B.l1L2C..1!L-
POWER
TIME*
460mW
40ns
SN54284 (J,FH)
1
l
SN74284 (J,N)
20~
GB.!El.c:.
GAJ.lliI:::.
a-Bit Product Time
"2
10.ill.-
('285 provides LSS's)
pin assignments
1T
1A~
BINARY MULTIPLIERS USED
2
3
~Y4
~Y5
~Y6
4SIT BY 4BIT PARALLEL

BINARY MULTIPLIERS USED
WITH '284
LSS's for 4 X 4 multiplier
1A~
1BJ2L...
1C.lZL10..ill.-
('284 provides MSS's)

Use 'S274, 'LS275, 'S275 for new
designs/larger multipliers
2A...ll!....2B...!&....-
typical performance
2C..ill...:-
I TYPE
I '285
20....!1L..
POWER
GB..!.Elc:::..
460mW
SN54285 (J,FH)
SN74285 (J,N)
GA..illb
4
5
6
7
6
J, N PACKAGES
9
Y7
2C
10 YB
26
11
Y5
2A
10
12 Y4
13 ~6
lA
14 GA
16
15 20
lC
GNO 16 VCC
~Y7
FH PACKAGE
11
nc
nc
Y7
2C
12
26
13
YB
2A
10
14
15
Y5
Y4
nc
5
6
lA
16
17
nc
7
6
16
16
(lA
(l6
lC
19
20
10
GND
20
VCC
ri"
logic symbol t
285
~k1
logiC symbol t
4BIT BY 4BIT PARALLEL
SN74283 (J,N)
SN74LS283 (J,N,FN)
SN74S283 (J,N,FN)
284
I TYPE
co-lZL
CARRY
'283
I '284
B3..J.!2L
B4-111L
A3~
'LS283
J, N PACKAGES
} {
}
A2-1L
typical performance
typical performance
...
pin assignments
1T
2'
}
} .~{
ile
1
2
3
4
l---illLyO
5
6
.,..Jl!LY1
~Y2
r--!2LY3
J, N PACKAGES
9
Y3
2C
10 Y2
26
Yl
2A
11
12 YO
10
lA
13 G6
14 GA
16
15 20
lC
GNO 16 Vee
FH PACKAGE
nc
nc
11
2C
12
Y3
26
13
Y2
2A
14
Yl
10
15
YO
nc
16
nc
lA
17
8
9
10
16
16
G6
GA
lC
19
20
GND
20
VCC
(.)
::l
"C
...o
a..
TEXAS
INSTRUMENlS
3-95
PRODUCT GUIDE
286
logic svmbol t
pin assignments
A~
9-BIT PARITY
GENERATOR/CHECKER
WITH BUS DRIVER
PARITY I/O PORT
2k
J. N PACKAGE
B~
e~
D
...!!.!!....-
lV
E~
F~
G
N2
8 A
1 nc
11 nc
2 H
9 B
2 G
12 A
13 B
14 e
3 XMlT
10 e
3 H
4 I
5 PARITY ERROR
11 0
4 XMlT
5 nc
6 PARITY I/O
12 E
13 F
7 GND
14 Vee
-..!!.!.-
H~
I~
XMIT~
SN54AS286 (.J.FH)
~PARI/O
2.1~
FH. FN PACKAGE
1 G
15 nc
6 I
160
7 nc
17 nc
8 PARITY ERROR
18 E
9 PARITY 110
10 GND
PAR ERR
19 F
20 Vee
ENl
SN74AS286 (N,FN)

logic symbol t
289
pin assignments
AO.J.1L
MEMORIES
A1--1.ill...
(16 4-bit words, open-
A2~
collector outputs)
lEI
"'tJ
""'I
1
2
3
4
5
6
7
]A~
A3~
S~Gl
tvpical performance
TYPE
J, N PACKAGES
AO
9 (13
10 03
SRiW 11 ri4
12 04
01
01 13 A3
14 A2
02
(!2
15 A1
8 GNO 16 Vee
RAM 16X 4
64-BIT RANDOM-ACCESS
R l W t 1 EN [READ)
1 C2 [WRITE)
ADDRESS ENABLE POWER/

TIME
TIME
.BIT
'LS289A
50 ns
35 ns
2.7mW
'S289B
25 ns
12 ns
5_9mW
I...,
Dl~
I"
AQ~al
~a2
~a3
~a4
A,2D
D2-'!L
D3.J.!.QL
SN54LS289A (J.FH)
SN54S289B (J,FH)
SN74LS289A (J,N.FN) D4~

SN74S289B (J,N,FN)
FH. FN PACKAGES
1 nc
11 nc
2 AO
12 03
3 S"
13 03
4 RIW 14 04
5 01
15 04
6 nc
16 nc
7 01
17 A3
8 02
18 A2
9 02
19 Al
10 GNO 20 Vee
Co
c(')
r+
290
logic svmbol t
DECADE COUNTERS
RO(lI~
RO(2)~
(divide-by-two and divideby-five)
COUNT
FREQ
CLEAR
POWER
HIGH
160mW
'LS290 32 MHz
HIGH
40mW
SN54290 (J,FH)
SN54LS290 (J,FH)
R9(2)~
TOTAL
32 MHz
'290
CKA..!!.2L::.
CT=O
Z3
,-l>+
DIV2
~aA
3CT=1
SN74290 (J,N)
SN74LS290 (J,N,FN)
CKB.!.!.!!..o
1>+
DOV't ~aB
~Oc
CT
3CT"'4
3-96
J, N PACKAGES
R911l 8 00
nc
9 aA
A9121 10 CKA
CKB
11
ac
12 ROlli
a8
6
nc
13 ROl21
7 GNO 14 Vec
1
2
3
4
5
I---p;R9(1)...!!l.-
typical performance
TYPE
pin assignments
CTR
&
~aD
TEXAS
INSfRUMENTS
FH. FN PACKAGES
1 nc
11 nc
2 R9111 12 aD
3 nc
13 aA
4 R9121 14 CKA
5 nc
15 nc
6
16 CKB
ac
7 nc
17 nc
B aB
18 ROlli
9 nc
19 AOl21
10 GND 20 Vec
PRODUCT GUIDE
292
logic symbol t
PROGRAMMABLE FREQUENCY
CLRJ1..1l.r::.. R
DIVIDERS/DIGITAL TIMERS
~
CLK1~
(digitally programmable from
CLK2~
22 to 2 31 )
typical performance
I TYPE IPOWER I
f max
pin assignments
I 'LS292 I200 mW I 50 MHz I
A~
SN54LS292 (J,FH)
C~
B...i1l.-
SN74LS292 (J,N,FN)
oillL..
E...ill-
[~J
I> [fi)
)-[n = OJ
[n = 1J
1
2
3
[TP1) ~TP1
[TP2) ~TP2
[TP3)
~TP3
6
8
I--
},'*
J, N PACKAGES
B
9 nc
10 A
E
ClR.
11
TP1
ClK1 12 nc
ClK2 13 TP3
14 D
TP2
15 C
a
GND 16
VCC
FH, FN PACKAGES
1
nc
12
nc
nc
A
11
3
4
13
TP1
14
ClK1
15
nc
16
nC
nc
ClK2
17
TP3
ern
TP2
18
19
GND
20
VCC
10
to=~ r--\!La
TEXAS
INSTRUMENTS
3-97
PRODUCT GUIDE
logic symbol t
293
ROI1'.l.EL-
(divide-by-two and divide-
typical performance
COUNT
FREQ
CLEAR
TOTAL
HIGH
160mW
'LS293 32 MHz
HIGH
39mW
SN54293 (J,FH)
SN54LS293 (J,FH)
CKA-11Qb
r
0lV2
t>+
POWER
32 MHz
'293
D'va
CKBJ11!...I:::.
1>+
CT
CLK1~
CLK2~
typical performance
I TYPE IpOWER I f max
I;;:'1
ITP)
SN74LS294 (J,N,FN)
A~
III
C~
o~
295
}"'~ t fi~
fo=2n"
LO/SiL~k
nc
13
Qc
11
CKB
nc
14
QA
CKA
ROlli
nc
15
nc
QB
nc
12
13
ROl21
CKB
GNO
14
VCC
Qc
nc
16
6
,7
QB
nc
18
ROlli
19
ROl21
GNO
20
VCC
8
9
10
17
nc
typical performance
SER.J.1L 2,30
SERIAL
DATA
INPUT
D
SN54LS2958 (J,FH)
A~1.30
TOTAL
B...EL 1,30
c-ill-
POWER
t>
t>
O~
70mW
FH. FN PACKAGES
1
nc
nc
11
10
12
TP
11
ern
13
nc
ClKl
12
nc
TP
14
ClR
nc
nc
nc
ClK2 13
nc
ClKl
15
nc
nc
14
nc
16
nc
15
ClK2 17
nc
GNO
16
VCC
nc
18
19
GNO
20
VCC
J. N PACKAGES
M1 [LOAD!
CLK~~C3/2-+
,.
'V~aA
'V~aB
~ac
,J.!.2L aD
SN74LS2958 (J,N,FN)
3-98
~a
OC..J.!!,....... EN
G')
'LS2958 30MHz
Qo
10 CKA
pin assignments
M2 [SHIFT!
FREQ
12
nc
SRG4
REGISTERS
SHIFT
nc
10
logic symbol t
UNIVERSAL SHIFT
TYPE
1
2
I--
4-BIT BIDIRECTIONAL
CD
~TP
-I-ln= 1!
B~
c:
0.:
Qo
QA
- Hn=O! > [fiJ
I'LS294 1150 mW 150 MHz I
or+
8
9
J. N PACKAGES
[to]
CLRl!.!!J::::, R
(digitally programmable from

22 to 2 15)
SN54LS294 (J,FH)
nc
nc
pin assignments
DIVIDERS/DIGITAL TIMERS
""l
~aB
~Oc
~ao
logic symbol t
PROGRAMMABLE FREQUENCY
"'C
~aA
FH. FN PACKAGES
nc
11
nc
1
2
SN74293 (J,N)
SN74LS293 (J,N,FN)
294
o
a.
c:
J. N PACKAGES
CT=O
ROI2'..!.!&-
by-eight)
TYPE
pin assignments
CTR
&
TEXAS
INsrRuMENTS
FH. FN PACKAGES
SER
OC
nc
11
ClK
SER
12
oc
10
00
13
ClK
11
Qc
14
12
QB
nc
15
Qo
nc
lD/Sf! 13
QA
5
6
GND
VCC
14
nc
16
nc
17
QC
nc
18
08
lD/~ 19
OA
GND
vcc
9
10
20
PRODUCT GUIDE
297
pin assignments
J. N PACKAGES
DIGITAL PHASELOCKED
I
10
(cascadable for higher
ENCTR
order loops)
K ClK
liD ClK
typical performance
DIU
110 OUT
15
GNO
16
LOOP FILTERS
simplified block diagram t

TYPE
POWER
DELAY
f max
SN74LS297 (J,N,FN)
I/O CLOCK
PHASE Al
PHASE B
I II I
(4)
(6)
(3)
MODULOK
COUNTER
(5)
(9)
(13)
~~
WITH STORAGE
ClK
typical performance
DELAY
20 ns
~ I
INCREMENT/DECREMENT
CIRCUIT
'LS298
65mW
+6
XOPRO
13
+A2
K ClK
15
ECPO
14
nC
16
nc
liD ClK
17
VCC
DIU
18
+A2
0
110 OUT
19
GNO
20
VCC
(7)
IIDOUTPU!
(111
EXCLUSIVE-OR PHASE
DETECTOR OUTPUT
(12)
EDGE-CONTROLLED PHASE
DETECTOR OUTPUT
pin assignments
~C2
11
C1..l2!.-
20 ns
C2~
01......!.Z.L
SN74298 (J,N)
SN74AS298 (N,FN)
SN74LS298 (J,N,FN)
02~
FH. FN PACKAGES
J. N PACKAGES
G1
B1~
B2~
* From clock to non-inverted output
SN54298 (J,FH)
SN54AS298 (J,FH)
SN54LS298 (J,FH)
14
MUX
1.20
A2...!!l- 1,20
7.1 ns
'AS298
13
ENCTR
A1....!1!..-
195mW
logic symbol t
POWER
ECPO
(101
QUAD 2-INPUT MULTIPLEXERS
'298
+Al
II
12
1121
298
TYPE
12
10
J
PHASE A2
II
~
o C B A
18.5 ns
K-COUNTER
CLOCK
DOWN/UP CONTRO L
K-COUNTER
ENABLE
nC
MODULO CONTROLS
l14)lI5)jO)
SN54LS297 (J,FH)
nc
+6
XOPRO
(FROM
KCLK 11/DCLK I/DCLK)
'LS297 375mW 50 MHz 135 MHz
FH. FN PACKAGES
+Al
~OA
.,..illLOB
~OC
nc
nc
11
A2
10
WS
B2
12
Cl
Al
11
ClK
A2
13
WS
Bl
12
aD
Al
14
ClK
82
Cl
C2
13
ac
61
15
02
14
aB
nc
16
aD
nc
01
15
aA
C2
17
aC
GNO
16
VCC
02
18
aB
01
19
aA
GNO
20
VCC
10
...,
(.)
::s
"C
0..
~OO
TEXAS
INSTRUMENTS
3-99
PRODUCT GUIDE
299
logic Iymbolt
pin assignments
8BIT BIDIRECTIONAL
UNIVERSAL SHIFT/STORAGE
1
2
REGISTERS
(three.flate outputs)
3
4
typical performanca
6
7
TVPE
'ALS299
'AS299
'LS299
'5299
SHIFT
FREQ
SERIAL
DATA
INPUT
30 MHz
ASYNC
TOTAL
CLEAR
POWER
9
10
LOW
100mW
J, N PACKAGES
SR
SO
11
1;1
12 ClK
1;2
13 BlOB
G/OG 14 0/0 0
E/OE 15 F/OF
C/OC 16 H/OH
A/OA 17 H'
18 Sl
CA'
mt 19 51
GND 20 VCC
FH, FN PACKAGES
SR
SO
11
2 1;1
12 ClK
1
35 MHz
D
D
50MHz
LOW
175mW
LOW
750mW
3112
4
SN54ALS299 (J,FH)
SN54AS299 (J,FH)
SN54LS299 (J,FH)
SN54S299 (J,FH)
SN74ALS299 (N,FN)
SN74AS299 (N,FN)
SN74LS299 (J,N,FN)
SN74S299 (J,N,FN)
A'
9mt
10 GND
logic symbol t
301
pin assignments
J, N PACKAGES
256BIT RANDOMACCESS
1 AO
2 Al
;!
S"1
4 T2
(256 1-bit words, open
collector output)
5
6
7
8
SN74S301 (J,N)
3-100
G/OG
E/OE
C/OC
A/OA
TEXAS
INSTRUMENTS
S"3
0
A3
GND
9
10
11
12
13
14
A4
A5
A6
RIW
15
A7
A2
16
VCC
13
14
15
16
17
BlOB
0/0 0
F/OF
H/OH
18
19
H'
Sl
51
20
VCC
PRODUCT GUIDE
319
logic symbol t
AO
MEMORIES
(16-four bit words, open-
A1
typical performance
ADDRESS
TYPE
I 'LS319A
TIME
35 ns
SN54LS319A (J,FH)
(15)
J, N PACKAGES
]A~
nc
II
nc
AO
12
03
1;
R/W
13
03
14
04
04
12
04
A3
01
13
A3
01
15
04
02
14
A2
5
6
nC
16
nc
02
15
Al
Ql
17
A3
GND
16
Vee
XTAL1
Vee
FFO
FH, FN PACKAGES
TANKI
F'
nc
II
nc
TANK2
10
F'
TANKI
12
F'
F'
GNDI
II
Vee'
TANK2
13
FFQ
12
GNDI
14
Vee'
F'
FFD
13
nc
FFO
15
F'
nc
14
XTAL1
nc
16
nc
15
XTAL2
FFD
17
nc
GND2
16
Vee
nc
18
XTALI
19
XTAL2
GND2
20
Vee
FFO
SN74LS320 (J,N)
10
logic symbol t
pin assignments
CRYSTAL~ONTROLLED
IUl..
OSCILLATORS
TANK1
TANK
XTAL1
TANKI
F'
nc
11
nc
TANK2
10
F'
TANKI
12
GNDI
II
Vec'
TANK2
13
F'
F'
FFO
12
GNDI
14
Vcc'
F'
FFD
13
F/2
FFO
15
F'
F/4
14
XTAL1
nc
16
nc
15
XTAL2
FFD
17
F/2
GND2
16
Vec
F/2
8
9
10
. (6)
XTAL2
....CJ
FH, FN PACKAGES
J, N PACKAGES
(7)
outputs)
F/4
18
::::J
"0
...o
a..
XTAL1
19
XTAL2
GND2
20
Vcc
F/4
SN74LS321 (J,N)
C1
FFO (5)
Al
pin assignments
J, N PACKAGES
TANK2
A2
19
20
04
TANK2
typical performance
02
02
TANK1
(with F/2 and F/4 count-down
18
Q2
GND
03
03
logic symbol t
321
8
10
Q1
02
XTAL2
SN54LS321 (J)
03
II
CRYSTAL-CONTROLLED
SN54LS320 (J)
03
Rm
04
typical performance
FH. FN PACKAGES
9
10
01
01
SN74LS319A (J,N,FN)
OSCILLATORS
AD
I 2.7 rnW
320
I
2
4
(14)
R/W
ENABLE POWER/
TIME
BIT
50 ns
(11
A2
collector outputs)
pin assignments.
RAM 16X 4
64-BIT RANDOM ACCESS
(4)
10
FFO
TEXAS
INSTRUMENTS
3-101
PRODUCT GUIDE
logic Iymbol t
322
,.-------,
pin assignments'
SRGS
J, N PACKAGES
BBIT SHIFT REGISTERS WITH

SIGN EXTEND
(three1tate outputs,
multiplexed I/O)
SIP
typical performance
5
6
7
8
9
10
ClK
SERIAL
ASYNC
DATA
POWER
CLEAR
INPUT
0
LOW 175mW
'LS322A 35 MHz
TYPE
1
2
3
4
OE
G
SHIFT
FREQ
a-
51P
DO
AIOA
CIOC
EIOE
GIOG
OE
ClR
GND
FH, FN PACKAGES
1 !l
11 ClK
2 SIP
12 Ow
OH'
3 DO
HIOH
13 HIOH
4 AIOA 14 FIOF
FIOF
5 CIOC 15 0100
0100
6 EIOE 16 BlaB
SlaB
01
7 GIOG 17 01
BE
8 OE
18 SE
05
9 erR
19 OS
VCC 10 GND 20 VCC
II
ClK
12
13
14
15
16
17
18
19
20
OS
DO
SN54LS322A (J,FH)
SN74LS322A (J,N,FN)
01
A/OA
B/Oe
II.
."
o
c..
c(')
,.-------....
logic Iymbol t
323
pin Illignmants
J, N PACKAGES
BBIT BIDIRECTIONAL
1
2
3
4
5
6
7
8
9
10
SHIFT/STORAGE REGISTERS
(three1tate outputs)
typical performance
r+
TYPE
G)
a:
C'D
SHIFT
FREQ
SERIAL
DATA
POWER
INPUT
'ALS323
'AS323
30 MHz
100mW
'LS323
35 MHz
175mW
SN54ALS323 (J,FH)
SN54AS323 (J,FH)
SN54LS323 (J,FH)
SN74ALS323 (N,FN)
SN74AS323 (N,FN)
SN74LS323 (J,N,FN)
3-102
TEXAS
INSTRUMENTS
50
1;1
11
12
13
G2
GIOG 14
EIOE 15
CIOC 16
AIOA 17
lS
OA'
19
GND 20
ern
FH, FN PACKAGES
1 SO
11
5R
2 Gl
12 ClK
13 BIOa
3 02
Bias
010 0
4 GIOG 14 0100
5 EIOE 15 FIOF
FIOF
6 CIOC 16 HIOH
HIOH
7 AIOA 17 Ow
OH'
5l
8 OA'
18 5l
51
9 COl
19 51
10
GND
20
VCC
VCC
SR
ClK
PRODUCT GUIDE
347
pin assignments
logic symbol t
BCD~O~EVEN~EGMENT
DECODERS/DRIVERS
BiIRBO
(open-collector outputs, low-voltage
RBI
OUTPUT
TYPE
rr
OFF-5TATE
SINK
OUTPUT
CURRENT
VOLTAGE
SN54LS347
12mA
7V
35rnW
SN74LS347
24. rnA
7V
35rnW
(51
1...:: ~
&
C G21
cr-oL
V20
A.!!L.-l
c.!1!.....oW--
(13)
b ZO.Zl Q ....
t121 b
(111
c
(10)
d
(91 e
(151
f
(14)
d20,21Q""'"
e 20.Z1 Q .....
20.Z1Q"
9 20,ZlQ I'-...
e
LT
BIIRBO
RBI
GND
1 nc
11
2 B
12
13
3 e
4 [j
14
5 ....B.I/ABO 15
6 nc
16
7
logic symbol t
B-L1NE TO 3-LlNE
0
(with three-state outputs)
typical performance
I TYPE I DELAY I POWER I
16ns
I 'LS34B I
I 63rnW I
SN54LS348 (J,FHI
SN74LS348 (J,N,FN)
(10)
....
(11)
(lZ)
.....
.....
(13)
....
(1)
-~
10 i-
1/211
11 i-
2/212
12 i-
3/213
13
4/214
14
5/215
15
r-
(3)
.....
6/216
16
(4)
......
7/217
17--

r::
16
19
20
9
f
Vee
nc
d
c
nc
9
f
Vee
assi~nrnents
1
2
3
4
5
6
;;'1
18
J. N PACKAGES
(>~
0/210
(2)
(5)
17
pin
.---!.ill. E0
4
5
6
7
El
A2
Al
GND
9
10
11
12
13
14
15
16
AD
0
1
2
3
GS
EO
Vee
19EN> r:--i!&GS
FH. FN PACKAGES
1>
EI
RBI
GND
HPRI/BIN
PRIORITY ENCODERS
FH. FN PACKAGES
6
9
10
348
10
11
12
13
14
15
16
a 2o:Z1 Q ......
c 20,ZlQ .....
B.!..!L.- 2
J. N PACKAGES
B
9
1
2
3
4
5
6
(31
POWER
SN74LS347 (J,N, FN)
SN54LS347 (J.FH)
...
(4)
version of 'LS47)
typical performance
BIN/7-SEG (>
ITl]
;>1
\7 ~AO
\7 ~Al
V1S
2>
G19
4<>\7 ~A2
1
2
3
4
5
6
nc
11
12
13
El
6
9
10
A2
5
6
14
7
nc
Al
GND
15
16
17
16
19
20
nc
AO
...,
0
1
2
CJ
=s
o
a..
nc
"C
3
GS
EO
Q.
Vce
FONT TABLE Tl - NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS USING 'LS347
101
o
11213IYI5IbllI819Icl:JIUI~Ic:1 I
2
TEXAS
INSTRUMENTS
10
11
12
13
14
15
3-103 .
PRODUCT GUIDE
I5r .!!!L..t::..
FOURBIT SHIFTER
(3STATE OUTPUTS)
SN54S350 (J,FH)
pin
logic symbol t
350
SO
EN
.!!.2L-
O}
0
G3"
S1..!!L- 1
..,
SN74S350 (J,N,FN)
r
MUX
D3.ill..- Z10
D2~ Z11
D1~ Z12
DO-ill- Z13
D.1.ill.- ZN
D.2.l!L- Z16
D.3..llL- Z16
367
"'C
~
0-
r:::
(')
r+
10
MAX
MAX
POWER
DELAY SOURCE
SINK
DISSIPATION
CURRENT CURRENT
5N54ALS367
7 ns -12 mA 12 mA
63mW
5N74ALS367
7 ns -16 mA 24 mA
63 mW
SN74ALS3671
7 ns -15 mA 48 mA
53mW
5N54367A
-2 mA 32 mA
12 ns
325 mW
SN74367A
12 ns -6.2 mA 32 mA
325 mW
SN54LS367A
-1 mA 12 mA
9.5 ns
70mW
SN74LS367A
9.5 na -2.6 mA 24 mA
70mW
TYPE
SN54367A (J,FH)
SN54ALS367 (J,FH)
SN54LS367A IJ,FH)
10' 0
1
11
2
12
3
13
11 ~O
12 ~ 1
13 ~2
3
14
12- 1-0
13 1
14- ~ 2
16 I- 3
13 1-0
14 1-1
16 ~2
3
1A
V~Y3
V~Y2
V~Y1
1A1
1A2
1A3
1A4
2'0
111
EN
.!!L-
[>
.!!L..
.!!L-
J
\l~
~
~
~
.!.!.2L15
(141
EN
[>
J
\l
SN74367A (J,N)
SN74ALS367 (N,FNI
SN74ALS367' (N,FN)
SN74LS367A IJ,N,FN)
'Pin numbers shown on logic symbols ere for J and N packages only.
NC -
3-104
1
2
3
4
6
6
7
8
9
10
03
02
01
DO
01
02
03
GNO
51
50
. Y3
9
10
11
12
13
14
16
16
NC
03
02
01
DO
NC
01
02
03
GNO
Y2
o(
Yl
YO
vcc
11
12
13
14
16
16
17
18
19
20
pin assignments
2A1 1121
2A2
1
2
3
4
5
6
7
8
V~YO
logic Iymbol f
HEX BUS DRIVERS

(nonlnverted thrH-ttate outputs or9lnized
to facilitate hlndling of 4-blt dltl)
typical performanca
8sslg~ments
J. N PACKAGES
SHIFTER
No internal connection.
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 -CALLAS. TEXAS 75265
(11)
(131
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
1
2
3
4
5
6
7
B
J. N PACKAGES
lG
9 lY4
lAl
lYl
lA2
lY2
lA3
lY3
GNO
10
11
12
13
14
16
16
lA4
2Yl
2Al
2Y2
2A2
2G
VCC
FH. FN PACKAGES
1 nc
11 nc
2 lG
12 lY4
3 lAl 13 lA4
14 2Yl
4 lYl
5 lA2 16 2Al
e nc 16 nc
7 lY2 17 2Y2
8 lA3 16 2A2
9 lY3 19 2G
10 GNO 20 VCC
NC
SI
50
Y3
Y2
NC
irE
Yl
YO
vcc
PRODUCT GUIDE
351
logic Iymbolt
DUAL BLINE TO 1LINE DATA

SELECTORSIMULTIPLEXERS
pin lIIignmants
J. N PACKAGES
11 07
1 lY
12 06
2 (J
13 05
3 A
14 04
4 B
5 C
15 203
6 100 16 202
7 101 17 201
102 16 200
8
9 103 19 2Y
10 GNO 20 VCC
0
A.
(thr..1tata outputs: four

common data inputs)
B
C
typical performance
TYPE
'351
DELAY TIMES
DATA
TOTAL
FROM
TOINV
POWER
ENABLE
OUTPUT
10 ns
17 ns
220mW
100
101
102
103
04
05
06
07
SN74351 (J,N)
200
201
202
203
1Y
(15)
(191 2Y
14,4
15.5
16.6
17.7
352
logic symbol t
pin lIIignments
DUAL 4LINE TO 1LINE DATA

SELECTORSIMULTIPLEXERS
(inverting version of 'LS153)
typical performance
TYPE
'ALS352
'AS352
'LS352
DELAY TIMES
DATA
FROM
TOINV
OUTPUT ENABLE
6 ns
4.5 ns
2.7 ns
4.5 ns
15 ns
18.5 ns
SN54ALS352 (J,FH)
SN54AS352 (J,FH)
SN54LS352 (J,FH)
1G
1CO
TOTAL
POWER
32.5 mW
122.5 mW
31 mW
SN74ALS352 (N,FN)
SN74AS352 (N,FN)
SN74LS352 (J,N,FN)
1C1
1C2
1C3
1Y
20
1
2
3
4
5
6
7
8
J. N PACKAGES
lG
9 2Y
10 2CO
B
lC3 11 2Cl
lC2 12 2C2
lCl 13 2C3
lCO 14 A
15 2G
IV
GNO 16 VCC
FH. FN PACKAGES
1 nc
11 no
12 2Y
2 lG
3 B
13 2CO
4 lC3 14 2Cl
5 lC2 15 2C2
6 nc
16 no
7 lC1
17 2C3
8 lCO 18 A
19 2G
9 IV
10 GNO 20 VCC
Q)
"C
(!'
....,
(,)
:s
"C
o
..
c..
2CO
2Y
.TEXAS
INSTRUMENTS
POST OFFiCe BOX 225012 DALLAS. TeXAS 75265
3-105
PRODUCT GUIDE
353
logic svmbol f
DUAL 4-L1NE TO 1-L1NE DATA
pin assignments
J. N PACKAGES
A (14)
Ithree-state outputs, inverting
O)G!!.
1
3
(2)
version of 'LS253
MUX
1O'Jll..J:::.. EN
typical performance
TYPE
'ALS353
'AS353
'LS353
12 ns
13 ns
,..
DELAY TIMES
DATA
DATA TO
FROM
TOINV NON-INV
ENABLE
OUTPUT OUTPUT
23.5 ns
23.5 os
16 ns
SN54LS354 (J,FH)
13
2CO
lC2
12
2C2
lC3
14
lCl
13
2C3
lC2
15
2C2
lCO
14
nc
16
nc
2Cl
lCO
lY
17
18
2C3
A
19
2G
10
GNO
20
VCC
2C3
.!..l2!.!1.l!-
lY
15
2G
GND
16
VCC
~2V
illL
pin assignments
Gl~tJ
.!.!!!..t::..
02 .
G3
51
52
DC
DO
01
~80
~ 80
..!!!....l::::.
.l!L..-
J. N PACKAGES
EN
~~
G..!!.
7
..,
90
07
r
0
1IL- r;o---;
02~~
ill.-~
05
.!iL- "9'D4
ill..- "9"D5
D6
&-"9'i)"""6
07
llL- "9'D"7
;;'1
t>
V~Y
\l:::..J.!.!!.L
TEXAS
INSTRUMENlS
11
FH. FN PACKAGES
I
07
II
06
12
52
06
12
52
3
4
05
13
51
05
13
51
04
14
SO
3
4
04
14
SO
03
15
Gl
03
15
Gl
02
16
G2
16
G2
01
17
G3
6
7
02
01
17
G3
DO
lB
DO
18
DC
19
DC
19
GNO
20
VCC
GNO
20
vcc
10
C9
SN74LS354 (J.N.FN) 03
D4
3-106
nc
lCl
.!.!!l..-
typical performance
'LS354
MUX
hhree-state outputs)
c:
(")
logic svmbol f
SELECTORS/MULTIPLEXERS/
TRANSPARENT REGISTERS
Q.
2Cl
2C2..!..!1L..
SN74LS353 (J,N,FN)
2Y
11
2C1
SN54LS353 (J,FH)
TYPE
12
lC3
2CO
SN74ALS353 (N,FN)
SN74AS353 (N,FN)
."
-.
nc
lG
3
4
\l p:..!!L. 1V
B-L1NE TO 1-L1NE DATA
111
11
'~
20' :llili:
15
SN54ALS353 (J,FH)
SN54AS353 (J,FH)
354
2CO
....!&1C2 (3)
POWER
40mW
130mW
43mW
2Y
10
1C1~
TOTAL
lG
B
....!!L-
1CO
DELAY TIMES
DATA
FROM
TOINV
ENABLE
OUTPUT
6 ns
4.5 ns
2.7 ns
5.5 ns
FH. FN PACKAGES
1
2
10
PRODUCT GUIDE
355
logic Iymbol t
aLINE TO 1LINE DATA

SELECTORS!MUL TIPLEXERS/
a1
TRANSPARENT REGISTERS
G2
DELAY TIMES
DATA
DATA TO
NONINV
OUTPUT
31.5 ns
OUTPUT
30 ns
SN54LS355 (J,FH)
1
2
3
4
5
6
7
8
9
10
G3
SC
tvplcal plrformance
TOINV
pin IIIlgnmlnts
r----M~U'!'!X--
FROM
ENABLE
21.5 ns
SN74LS355 (J,N,FN)
SO
S1
52
DC
J. N PACKAGES
07
II 'S"C'
08
12 52
05
13 51
04
14 50
03
15 Cl"1
02
18 G2
01
17 G3
DO
18 W
~
19 Y
GNO 20 Vce
FH. FN PACKAGES
1 07
11 SC
2 08
12 52
3 05
13 51
4 04
14 50
5 03
15 m
16 02
8 02
7 01
17 G3
18 W
8 DO
9 DC
19 Y
10 GNO 20 Vec
00
01
02
03
D4
05
D6
07
356
logic Iymbol t
pin ...Ignmlnts
BLINE TO 1LINE DATA

SELECTORS!MULTIPLEXERS/
EDGETRIGGERED
REGISTERS
Cthree-state output)
G3
SC
SO
Sl
S2
tvpical performance
DELAY TIMES
DATA
DATA TO
TOINV
NONINV
OUTPUT
OUTPUT
23.5 ns
23.5 ns
SN54LS356 (J,FH)
01
0'2
07
08
05
04
03
02
01
8 DO
9 elK
10, GNO
elK
11
12
13
14
16
18
17
18
19
20
W
y
Vce
8
9
10
DO
ClK
GND
18
19
20
Y
Vcc
FROM
ENABLE
16 ns
SN74LS356 (J,N,FN)
00
01
02
....CJ
03
:1
"'C
05
06
07
c..
D4
TEXAS
INSTRUMENTS
3-107
PRODUCT GUIDE
357
logic symbol t
pin assignments
MUX
B-LlNE TO 1-LlNE DATA

SELECTORS/MUL TIPLEXERS/
(h
EDGE-TRIGGERED
0'2
J, N PACKAGES
1
2
3
4
5
6
7
8
9
10
G3
REGISTERS
SC
(open<allector outputs)
SO
typical performance
S1
S2
DELAY TIMES
DATA TO
DATA
NON-INV
TOINV
OUTPUT
OUTPUT
31_5 ns
30 ns
SN54LS357 (J,FH)
CLK
FROM
ENABLE
DO
25 ns
02
D7
D6
D5
D4
D3
D2
Dl
DO
CLK
GND
11
12
13
14
15
16
17
18
19
20
SC
52
51
SO
{;1
G2
G3
W
V
VCC
.FH, FN PACKAGES
1 D7
11
SC
2 D6
12 52
3 D5
13 51
4 D4
14 SO
15 Gl
5 D3
16 G2
6 D2
7 Dl
17 G3
18 W
8 DO
19 V
9 ClK
10 GND 20 VCC
01
03
SN74LS357 (J,N,FN)
D4
05
06
07
365
pin assignments
HEX BUS DRIVERS
Gl
(non-inverted three-state out-
G2
puts. gated enable inputs)

typical performance
TYPE
-0
"'"
o
c.
(')
r+
SN54365A
SN74365A
SN54ALS365
SN74ALS365
SN74ALS365-1
SN54LS365A
SN74LS365A
SN74365A (J,N)
SN74ALS365 (N,FN)
(3)
A1
Yl
(5)
A2
MAX
MAX
POWER
SINK
DELAY SOURCE
DISSIPATION
CURRENT CURRENT
12 ns
2 rnA
32 mA
325 mW
12 ns -5.2 rnA
32 rnA
325 rnW
7 ns
12 rnA
12 rnA
53 rnW
24 rnA
7 ns -15 rnA
53 rnW
7 ns -15 rnA 4B mA
53 rnW
-1 rnA
9.5 ns
12 rnA
70rnW
9.5 ns -2.6 rnA
24 rnA
70rnW
SN54365A (J,FH)
SN54ALS365 (J,FH)
J. N PACKAGES
(7)
A3
A4 (10)
(9)
A5 (12)
(11)
A6 (14)
(13)
SN54LS365A (J,FH)
Y2
Y3
Y4
Y5
1
2
3
4
5
6
7
8
Vce
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
ne
(;1
Al
VI
A2
ne
V2
A3
V3
GND
11'
12
13
14
15
16
17
18
19
20
ne
V4
A4
V5
A5
ne
V6
A6
G2
Vce
pin assignments
(inverted three-state outputs.

gated enable inputs)
Y1
Y2
typical performance
Y3
DELAY
5.5
5.5
5.5
11
11
9.5
9.5
SN54366A (J,FH)
SN54ALS366 (J,FC)
ns
ns
ns
ns
ns
ns
ns
MAX
MAX
SOURCE
SINK
CURRENT CURRENT
-12 rnA
12 rnA
-15 rnA
24 rnA
15 rnA 4B rnA
-2 rnA
32 rnA
5.2 rnA
32 rnA
-1 rnA
12 rnA
2.6 rnA
24 rnA
SN74366A (J,N)
SN74ALS366 (N,FN)
POWER
DISSIPATION
Y4
Y5
40rnW
40rnW
40rnW
295 rnW
295 rnW
60 rnW
60rnW
Y6
SN54LS366A (J,FH)
SN74ALS366-1 (N,FN)
SN74LS366A (J,N,FN)
3-108
V4
A4
V5
A5
V6
A6
G2
SN74ALS365-1 (N,FN)
SN74LS365A (J,N,FN)
HEX BUS DRIVERS
SN54ALS366
SN74ALS366
SN74ALS366-1
SN54366A
SN74366A
SN54LS366A
SN74LS366A
9
10
11
12
13
14
15
16
Y6
366
TYPE
Gl
Al
VI
A2
Y2
A3
V3
GND
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
J, N PACKAGES
Gl
9 V4
10 A4
Al
11
V5
Vl
12 A5
A2
V2
13 V6
14 A6
A3
V3
15 112
GND 16 VCC
FH, FN PACKAGES
1
2
3
4
5
6
7
6
9
10
ne
III
Al
VI
A2
ne
Y2
A3
Y3
GND
11
12
13
14
15
16
17
18
19
20
ne
V4
A4
V5
A5
nc
Y6
A6
{;2
VCC
PRODUCT GUIDE
368
logic symbol t
HEX BUS DRIVERS

(inverted three-state outputs organized
10 (11
to facilitate handling of 4-blt data)

typical performance
MAX
MAX
POWER
DELAY SOURCE
SINK
DISSIPATION
CURRENT CURRENT
SN54AlS36B
5.5 ns -12 rnA
12 rnA
40rnW
SN74AlS36B
5.5 ns -15 rnA 24 rnA
40rnW
SN74ALS3SBl 5.5 ns -15 rnA 4B rnA
40rnW
SN543SBA
-2 rnA 32 rnA
11 ns
295 rnW
SN743SBA
11 ns -5.2 rnA 32 rnA
295 rnW
-1 rnA
12 rnA
SN54lS3SBA
9.5 ns
SOrnW
SN74lS3SBA
9.5 ns -2.S rnA 24 rnA
SOrnW
TYPE
SN54368A (J.FH)
SN54ALS368 (J,FH)
SN54LS368A (J,FH)
pin assignments
EN
lAl~
lA2~
lAl~
!>
J
'i1~lVl
~'V2
~lVl
~'V4
lA4.!!2L..
20
(151
EN
(12)
2Al
2A2 (14)
!>
'i1
Oc
10
11
12
13
14
15
18
lA4
2Yl
2Al
2Y2
2A2
2"G'
Vee
1
2
3
4
5
8
7
8
9
10
FH. FN PACKAGES
nc
11 nc
12 lY4
lG
lAl
13 lA4
14 2Yl
lYl
lA2 15 2Al
nc
18 nc
lY2 17 2Y2
lA3 18 2A2
lY3 19 2G
GND 20 VCC
1
2
3
4
5
6
7
8
9
10
FH. FN PACKAGES
Il C
12 50
10
13 50
10
14 60
20
15 SO
20
16 70
30
17 70
3D
18 80
40
19 BO
40
GNo 20 Vcc
2V2
C (111
EN
Cl
output control, common enable)
lD...llL- 10
typical performance
20~
'i1~'0
!>
~2Q
~lQ
~4Q
lO.J1.L
SN54ALS373 (J,FH)
SN54AS373 (J,FH)
SN54LS373 (J,FH)
SN54S373 (J,FH)
lAl
lYl
lA2
lY2
lA3
lY3
GNo
2Vl
logic symbol, 'LS373, 'ALS373, 'AS373t
OCTAL D-TYPE LATCHES

(three-state outputl, common
OUTDELAY
PUTS
Q
'ALS373
8 ns
'AS373
Q
'LS373
19 ns
Q
'S373
7 ns
(13)
J. N PACKAGES
lG
9 lY4
SN74368A (J,N)
SN74ALS368 (N,FN)
SN74ALS368-1 (N,FN)
SN74LS368A (J,N,FN)
373
TYPE
(11)
1
2
3
4
5
8
7
8
40~
TOTAL
POWER
70mW
~5Q
5o.J..E.L.
120 mW
525 mW
SN74ALS373 (N,FN)
SN74AS373 (N,FN)
SN74LS373 (J,N,FN)
SN74S373 (J,N,FN)
60-i1L
~SO
70....illl.-
rJ.lli-70
8D~
r-!12LSQ
Oc
C (11)
m:-
II
Q)
Cl
2D~
J. N PACKAGES
11 C
1 ~
12 50
2 10
13 50
3 10
'14 SO
4 . 20
15 60
5 20
'6 30
16 70
17 70
7 3D
18 Bo
B 40
19 eo
9 40
10 GNo 20 Vcc
"C
EN
1D...llL- 10
pin assignments
'i1~'Q
5
.....iL3Q
40~
-1l!l-4Q
60-i1L
....
20
lO.J1.L
50.J..E.L.
(!)
~50
~6Q
70....illl.-
-l..!&..7Q
so-illL-
..illLSQ
(.)
:::s
"C
...o
c.
TEXAS
INSTRUMENTS
3-109
PRODUCT GUIDE,
374
pin assignments
logic symbol, 'LS374, 'ALS374, 'AS374
~ ..!!L.t:..
hhree-state outputs, common

output control, common clock)
...,
typical performance
POWER
DATA TIMES
TYPE
FREQ
SETHOLD
PER
F-F
UP
'ALS374 50 MHz 10mW
'AS374
'LS374 50 MHz 17mW 20 nst o nst
'S374 ~OO MHz 56 mW
5 nst
2 nst
SN54ALS374 (J,FH)
SN54AS374 (J,FH)
SN54LS374 (J,FH)
SN54S374 (J,FH)
J, N PACKAGES
EN
(11)
e L K - >C1
SN74ALS374 (N,FN)
SN74AS374 (N,FN)
SN74LS374 (J,N,FN)
SN74S374 (J,N,FN)
(3)
1 0 - 10
20~
rt>
(7)
30-
\l~10
~20
~30
40~
~40
50~
60~
DC
11
CLK
10
3
4
10
20
12
13
14
SO
50
60
20
30
3D
40
40
15
16
17
1a
19
20
60
70
70
80
80
6
7
a
9
10
GNO
VCC
1
2
3
4
5
6
7
8
9
10
FH. FN PACKAGES
11
CLK
DC
12 50
10
13 SO
10
14 60
20
20
30
3D
40
40
GNO
15
16
17
1a
19
20
60
70
7D
80
ao
VCC
.......!E!...50
~60
70~
~.
70
(19)
---'--80
(18)
80-
OC ..!!L.t:..
EN
(11)
CLK~ >Cl
...,
(3)
10-10
r\l~10
20~
~20
~30
~40
~50
~60
(7)
30-
II...
40..l..!!!..-
50~
60~
70~
80~
""C
o
Co
c
or+
375
~ 70
(19)
~80
logic symbol t
pin assignments
1 0 - U L 10
lC.2e~
typical performance
C1
C2
20~ 20
OUTPUTS! DELAY! TOTAL
POWER
Q,a
12 ns
32 mW
SN54LS375 (J,FH)
30....!2L 3D
3e,4e~
40~
C3
C4
40
......ill... 10
~la
~20
::....ill... 20
~30
~3Q
--ill!... 40
::::....!lli. 40
SN74LS375 (J,N,FN)
J, N PACKAGES
1
2
3
4
5
6
7
8
10
9
10
10
11
10
1C.2C 12
2Q
13
2Q
14
1S
20
GNO 16
FH, FN PACKAGES
nc
11
nc
12 3D
2 10
13 3Q
3 1Q
30
14 30
3C.4C 4 1Q
4Q
S 1C.2C 1S 3C.4C
6 nc
16 nc
4TI'
7 2Q
17 40
40
8 20
18 40
Vce
19 40
9 20
3D
30
3-110
TEXAS
INSTRUMENTS
GNO
VCC
PRODUCT GUIDE
376
logic symbol t
pin assignments
QUAD J-K FLIP-FLOPS

1
(common clock, common clear)
2
3
typical performance
FREQ
POWER
DATA TIMES
PER
SET-I
HOLD
UP
(41 10
F-F
45 MHz
o nst
65mW
6
7
(51
120 nst
J. N PACKAGES
9 ClK
1J
10 3J
1K
11
3K
10
12 30
20
13 40
2K
14 4K
2J
15 4J
GNO 16 Vce
ern
20
SN74376 (J,N)
3J
(121
3K
4J
(131
4K
nc
12
ClK
1J
13
3J
1K
14
3K
10
15
30
nc
16
nc
20
17
40
2K
4K
2J
18
19
GNO
20
VCC
4J
40
pin assignments
G
CLK
10
20
3D
10
20
30
40
50
40
50
20 nst 1 5 nsf
60
70
60
70
9
10
pulse
80
80
typical performance
POWER
PER
F-F
10.6mW
.. edge of clock
t RlslOg
SN54LS377 (J,FH)
1
2
enable, common clock)
40MHz
11
ClR
30
377
FREQ
nc
10
Rising edge of clock pulse
SN54376 (J,FH)
FHPACKAGE
1
2
DATA TIMES
SET-l
HOLD
UP
3
5
6
8
J. N PACKAGES
11
ClK
G
12
10
50
10
13 50
14 60
20
20
15 60
16 70
30
17 70
3D
40
18 80
40
19 80
GNO 20 VCC
FH. FN PACKAGES
1
<r
11
ClK
10
12
10
13
50
20
14
60
50
20
15
60
30
16
70
3D
17
70
40
18
80
40
19
80
GND
20
VCC
10
SN74LS377 (J,N,FN)
logic symbol t
III
pin assignments
+oJ
HEX D-TYPE FLIP-FLOPS
CLK
10
20
30
40
50
60
10
20
3D
typical performance
POWER
DATA TIMES
FREQ
PER
SET- I
HOLD
UP
40MHz
10.6mW
F-F
20 nst
I 5 nst
elK
nc
11
nc
10
40
12
elK
10
11
40
13
40
20
12
50
3
4
10
10
14
40
20
13
50
20
15
60
nc
16
50
nc
20
3D
17
18
60
10
3D
14
30
15
60
6
7
GNO
16
VCC
9
10
::l
"C
...
Q.
50
30
19
60
GNO
20
VCC
SN54LS378 (J,FH)
40
50
60
enable, common clock)
Co)
FH. FN PACKAGES
J. N PACKAGES
1
SN74LS378 (J,N,FN)
nc -
TEXAS
INSfRUMENTS
3-111
PRODUCT GUIDE
379
logic symbol t
(1)
QUAD D-TYPE FLIP-FLOPS

idouble-rail outputs, common
ClK (9)
pin assignments
J. N PACKAGES
G1
1C2
enable, common clock I
10~
typical performance
FREQ
POWER
DATA TIMES
20
lli-
PER
SET-I
UP
HOLD
3D
lEL-
40
!..ill-
F-F
40 MHz
10.6mW
20 nst
I 5 nst
r--E!. 10
~1Q
r-ill- 20
20
~2Q
~30
~3a
1
2
3
4
5
6
7
8
G
10
'-0
10
20
20
20
GND
9
10
11
12
13
14
15
16
eLK
30
30
3D
40
4"0:
40
VCC
~40
FH. FN PACKAGES
1 nc
11 nc
2 G
12 CLK
13 30
3 10
4 10
14 3"0:
15 3D
5 10
16 nc
6 nc
17 40
7 20
18 40
8 2Q
20
19 40
9
10 GND 20 VCC
~4Q
SN54LS379 (J,FH)
SN74LS379 (J,N,FN)
381
logic symbol t
ARITHMETIC LOGIC UNITSI

FUNCTION GENERATORS
SO~
(8 binary functions, use 'S182 for
S1..ill...-
look-ahead carryl
S2.l!L-
typical performance
Cn~
CARRY
ADD
TOTAL
TIME
TIME
POWER
'LS381
16 ns
21 ns
175mW
'S381
11 ns
20 ns
525mW
TYPE
..,"tJ
SN54LS381 (J,FH)
SN54S381 (J,FH)
SN74LS381 (J,N,FN)
SN74S381 (J,N,FN)
o
c..
c
pin assignments
J. N PACKAGES
AlU
}*
11/2/3) CP
p.illLp
11/2/3) CG ~G
(1/2)BI
3CI
-,
AO~P
BO~O
A1l.!L- P
B1~0
A2~P
B2~0
r
[1)
~FO
[2)
~F1
[4)
~F2
[8)
~F3
A3..i!!L- P
B3...!.J!L 0
n
r+
3-112
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
9
10
A1
B1
AO
BO
50
51
S2
FO
F1
GND
11 F2
12 F3
13 G
14 P
15 en
16 B3
17 A3
18 B2
19 A2
20 Vec
1
2
3
4
5
6
7
8
9
10
FH. FN PACKAGES
11 F2
A1
B1
12 F3
AO
13 G
14 P
BO
50
15 Cn
S1
16 83
52
17 A3
FO
18 82
19 A2
F1
GND 20 Vce
PRODUCT GUIDE
logic symbol t
382
ARITHMETIC LOGIC UNITSI
so...!.2L-
FUNCTION GENERATORS
S2...!ZL-
typical performance
TYPE
CARRY
TIME
1 'LS382
27 ns
ADD
TIME
TOTAL
POWER
1 18 ns 1175 mW
n~
Cn
SN54LS382 (J.FHI
SN74LS382 (J,N,FN)
J. N PACKAGES
}~
Sl.,J!L-
(ripple carry and overflow outputs)
pin assignments
ALU
(1/2)BI
3CI
....,
AO~P
BO~O
Al.l1L- P
Bl~ 0
A2~P
(1)
r-----!!LFO
(2)
~Fl
(8)
3CO
B3~ 0
Magnitude-only multiplication
Cascadable for any number of bits
CLR
MODE
CLK
Serial data output for:multiplication
product
typical performance
MAX
DELAY
FROM
CLOCK
40 MHz
15 ns
X7J..!.!L~
POWER
1 17 ns
455mW
FROM
CLEAR
2L-1> C3/ ....
TOTAL
vy
1T
SRG8
1 R
7
1T 3D
~PROD
lR
3D 4 0
N4
~
lR
K~ CI
SN54LS384 (J,FH)
SN74LS3!W (J,N,FN)
11
F2
Bl
12
F3
OVR
AO
13
OVR
AD
13
BO
14
BO
14
50
15
Cn +,
Cn
50
15
51
16
B3
51
16
Cn +4
Cn
B3
7
8
52
FO
17
18
A3
82
17
18
A3
B2
Fl
19
A2
52
FO
Fl
19
A2
GND
20
VCC
GND
20
VCC
10
9
10
J. N PACKAGES
X4~~
X5 .!!11.- f X6 .ill!.- f -
40 MHz typical max clock frequency
Al
pin assignments
8xl 2.'sCOMP 1T
Zl/C2
[LOW FOR MSB)
X3~f-
8Bit parallel multiplicand data input
CLOCK
FREQ
F3
~F3
XO~2D
Xl~fX2~f-
Serial multiplier data input
.!..!!.....t::.
F2
~Cn+4
logic symbol t
aBIT BY l-SIT TWO'SCOMPLEMENT

MULTIPLIERS
11
12
BO/COI=i
r----illLOVR
Bo/coL
(1/21 BO
A3....!..!ZL- P
384
Al
Bl
~F2
(4)
B2...w!L 0
FH. FN PACKAGES
1
2
FH. FN PACKAGES
MODE
X3
10
3
4
X2
Xl
11
X7
12
X6
3
4
X5
13
XO
PROD 14
X4
ClK
15
GND
16
VCC
nc
m
X3
11
nc
12
MODE
X2
13
14
K
X7
Xl
15
X6
nc
16
nc
XO
17
X5
Ell
X4
PROD 18
ClK
19
10
GND
20
VCC
....,
(,)
::s
"C
o
...
a...
t P,n numbers shown on logIC symbols are for J and N packages only.
TEXAS
INSTRUMENTS
3-113
PRODUCT GUIDE
385
logic symbol t
QUADRUPLE SERIAL ADDERSI
ClR (11)
SUBTRACTORS
ClK
(1)
Independent two's-complement
l:/P-O
lS/)(-EL-- MJ
typical performance
I DELAY I POWER I
f max
I 40 MHz I
16 ns -1240 mW
2S/A~
28
TYPE
I 'LS386 I
o
a.
DELAY TOTAL
POWER
10 ns 130mW
SN54LS386 (J,FH)
ClK
11
ClR
31:
11:
12
31:
ISlA
13
35iA
ISlA
13
35/-';;
lB
14
3B
16
14
3B
lA
15
3A
lA
15
3A
2A
16
4A
2A
16
4A
2B
17
4B
26
17
4B
9
10
251A
18
4S/A
21:
19
41:
GND
20
VCC
25/A 18
8
9
10
45/A
2l
19
41:
GND
20
VCC
~4l:
pin assignments
=1
~1Y
(4)
-2Y
2B~
JA~
J8~
4A~
4B~
~ JY
~4Y
J. N PACKAGES
1
lA
FH. FN PACKAGES
3A
nc
11
nc
lA
12
3A
lB
38
lY
10
3Y
16
13
2Y
11
4Y
lY
14
3Y
2A
12
4A
nc
15
nc
2B
13
46
GND
14
VCC
=A 0
B = AB + AS
&:
....
(')
t Pm numbers shown on logic symbols are for J and N packages only.

TEXAS
INSTRUMENTS
38
2Y
nc
17
nc
2A
18
4A
26
19
4B
GND
20
VCC
positive logic: Y
SN74LS386 (J,N,FNI
3-114
ClR
12
J1ZL
lA~
18~
2A~
typical performance
11
1l:
~Jl:
logic symbol t
GATES
ClK
J.ZL.-
QUAD 2-INPUT
EXCLUSIVE-OR
1
2
~2l:
386
Z4
2A~
48
JCO/J80 20
0
1 -~R
4(~CII3BIl
1 3S
3S/7i.~
JA~
JB~
'4S/A~
4A~
SN54LS385 (J,FH)
SN74LS385 (J,N,FN)
..,"'0
~1l:
20
R
lA$- P
18~
FH. FN PACKAGES
J. N PACKAGES
C2
Buffered clock, direct clear inputs

addition/subtraction
pin assignments
Zl
10
16
4Y
PRODUCT GUIDE
390
logic symbol t
pin assignments
r - - -______- - - ,
DUAL DECADE COUNTERS
J, N PACKAGES
(bi-quinary or bcd sequences)

typical performance
(3)
TYPE
COUNT
CLEAR
TOTAL
POWER
(5)
'390
25 MHz
HIGH
210mW
(6)
'LS390
35 MHz
HIGH
75mW
FREO
SN54390 (J,FH)
SN54LS390 (J,FH)
lOB
laC
lCKA
2Qo
nc
2QC
lCKA 12
2Qo
11
2QB
lCLR 13
2QC
2CKB
lOA
14
2QB
lClR 10
lQA
lCKB 12
DOV5
CT
(11)
nc
lQB
13
2QA
lCKB 15
2CKB
lOC
lQo
GNO
14
2ClA
nc
16
nc
15
2CKA
lQs
17
16
VCC
lOe
lQo
18
2QA
2ClR
19
2CKA
10
GNO
20
VCC
7
8
100
(13)
11
(7)
SN74390 (J,N)
SN74LS390 (J,N,FN)
FH, FN PACKAGES
20A
20B
(10)
20C
(9)
20 0
393
logic symbol t
pin assignments
DUAL 4-BIT BINARY
CTROIV16
COUNTERS
lClR
(2)
CT=O
typical performance
lA
CTf
lOA
lA
lOB
lac
(4)
(5)
(6)
100
nc
11
2QC
lA
12
2Qo
2QB
lClA
13
2QA
2ClA
lQA
nc
14
We
2QB
nc
lQs
16
2QA
nc
17
nc
2Qo
lelA
lQA
10
lQB
11
lOC
lQo
13
2A
GNO
14
Vce
12
(11)
20A
SN54393 (J,FH)
SN54LS393 (J,FH)
SN74393 (J,N)
2ClR
SN74LS393 (J,N,FN)
(10)
2A
(8)
FH, FN PACKAGES
J, N PACKAGES
(3)
lQc
18
2ClA
lQo
GNO
19
2A
20
Vce
10
20B
15
nc
(9)
20C
+'"
200
CJ
::::s
"0
395
logic symbol t
typical performance
TYPE
FREQ
SERIAL
DATA
INPUT
ITI1
SEA
FH, FN PACKAGES
9
10
DC
nc
11
nc
ClK
crR
12
DC
11
Qo'
SEA
13
ClK
12
Qo
14
Qo'
13
Qe
15
Qo
nc
14
QB
nc
16
TOTAL
lO/SA" 15
QA
17
Qe
CLEAR
POWER
GNO
Vee
18
QB
LD/SH 19
QA
LOW
75mW
GNO
VCC
16
9
30 MHz
SN54AS395 (J,FH)
SN54LS395A (J,FH)
1
2
ASYNC
'AS395
'LS395A
a..
J, N PACKAGES
4-BIT UNIVERSAL
SHIFT REGISTERS
SHIFT
...
pin assignments
10
20
SN74AS395 (N,FN)
SN74LS395A (J,N,FN)
Pin numbers shown on logic symbols are for J and N packages only,
TEXAS
INSTRUMENTS
3-115
PRODUCT GUIDE
396
logic symbol t
OCTAL STORAGE
STROBE G (15)
ClK (7)
REGISTERS
pin assignments
EN
Cl
4SRG2
~1Q1
Parallel access'
Dl.ill- lD
Applications:
N-bit storage files
~f-llL201
~m2
4
202
D2~
HEX/BCD serial to parallel

converters
rl!&-103
Will-203
Wlli-l04
r--!lli-204
D3~
typical performance
D4l1lL
MAX
TYPE
CLOCK DELAY
FREQ
'LS396 30 MHz
20ns
7
6
11
nc
201
12
03
3
4
101
13
103
01
14
202
15
203
04
nc
16
nc
7
6
102
204
104
02
17
16
CLK
19
10
GNO
20
VCC
120mW
logic symbol t
QUAD 2-INPUT MULTIPLEXERS
WS (1)
ClK (11)
WITH STORAGE
(double-rail outputs)
typical performance
CLOCK CLOCK TO
TYPE
TOINV
'lS398
OUTPUT OUTPUT
20 ns
20 ns
NON-INV
pin assignments
FH. FN PACKAGES
WS
11
CLK
WS
11
CLK
A
3 UA
4 A1
12
14
3
4
OA
TIA
A1
12
13
Oc
TIc
C1
13
14
Oc
lIC
C1
C2
Gl
C2
~OA
~QA
A2
15
C2
A2
15
~OB
~QB
B2
16
02
B2
16
B1
17
01
B1
17
01
TOTAL
Bl.-.J.L
B2~
16
DO
aB
16
aD
POWER
Cl~
ITB
B
GNO
19
00
00
VCC
B
GNO
19
20
20
VCC
32mW
C2~
Dl---1!lL
---l!!!...Oc
A2~l,2D
~Qc
10
10
02
....1.!;!..OD
~OD
D2~
SN54LS398 (J,FH)
J. N PACKAGES
MUX
Al~1.2D
DELAY TIMES
'""I
5
6
nc
POWER
398
"'C
FH. FN PACKAGES
1
SN74LS396 (J,N,FN)
SN54LS396 (J,FH)
III
2
3
J. N PACKAGES
201
9 03
101
10 103
01
11
203
202 12 04
102 13 104
02
14 204
CLK
15 G
GNO 16 VCC
SN74LS398 (J,N,FNI
Q.
t:
(')
r+
logic symbol t
399
QUAD 2-INPUT
MUX
WS
ClK
MULTIPLEXERS
WITH STORAGE
DELAY
'LS399
20 ns
I POWER
TOTAL
I 37 mW
(9)
Dl~
SN74LS399 (J,N,FNI
Gl
C2
Cl-1!.!L
C2--l!3L
From clock to output

SN54LS399 (J,FHI
(1)
. Al~ 1.2D
A2.-l&- l,2D
Bl--1L
B2~
typical performance
TYPE
pin assignments
D:z-illL
2
3
4
.-.!&-OA
-ELo B
~OC
~OD
3-116
TEXAS
INSTRUMENTS
J. N PACKAGES
WS
9 CLK
FH. FN PACKAGES
nc
11
nc
A
A1
10
Qc
C1
WS
12
CLK
11
13
A2
12
C2
OA
A1
14
Oc
C1
B2
13
02
A2
15
C2
B1
14
01
nc
16
nc
B
GND
15
16
00
7
8
B2
81
17
18
02
01
OB
GNO
19
00
20
Vee
Vce
10
PRODUCT GUIDE
logic symbol t
412
8-BIT LATCHES
(11)
SN54S412 (J.FH)
STB
TOTAL
CLEAR IOUT-' DELAY

PUTS
Q
lR2
R2/Z3
...... ~S
~'INT
CLR~
typical performance
M~ 4C5
lC5/EN6
410mW
SN74S412 (J.N,FNI
.1-1EN6
1-3R
..,
011~
(5)
012-m013--=--
logic symbol t
RETRIGGERABLE MONO
A1.!!l...J::::..
A2..!!!....t::..
U&
..!.!!.....-
NO.OF
INPUTS
HIGH
2
I LOW
I 2
RI
OUTPUT
PULSE
RANGE
TOTAL
17
Wf
001
16
015
011
18
005
012
17
006
001
19
015
002
18
016
012
20
006
013
19
007
002
21
016
003
20
017
nc
22
nc
014
21
OOB
013
23
007
10
OIS
004
22
10
003
24
017
11
ST8
23
INT
11
014
25
008
12
GNO
24
Vcc
12
004
26
018
13
STS
27
IN""!
14
GNO
28
VCC
Al
A2
81
10
11
nc
11
nc
Rint
Al
12
nc
A2
13
81
14
12
nc
15
nc
Cext
nc
Rint
nc
13
Rext/Cext
82
16
GNO
14
VCC
nc
17
Cext
nc
em
4
5
RX/
CX
FH. FN PACKAGES
1
82
CLR
9
10
18
nc
19
Rext/Cext
GNO
20
vcc
Cext Rext/Cext
....,
(,)
"C
::::J
.!!l...l::::..
ill...ill..l::::..
lCext~
lA
18
lClR
lR ext /Cext
typical performance
NO.OF
OUTPUT
INPUTS
PULSE
I LOW
RANGE
40 ns-co
005
SN74LS422 (J,N,FN)
STABLE MUL TlVIBRATORS
~a
o
...
logic symbol t
SN54LS423 (J,FH)
15
30mW
RE-TRIGGERABLE MONO
HIGH
~a
I>
CX
Rint
423
011
(9~ (11~* (13)*
POWER
40 ns-co
SN54LS422 (J,FH)
S2
J. N PACKAGES
11.
,m~R
typical performance
16
pin assignments
B2~
15
"5"1
~007
~OOS
422
Bl
nc
~005
(20)
Internal timing resistor
ern
--1!ZL006
DIS'-":=:""-
52
14
---'.!.!!L 004
017~
13
~002
~003
014~
015~
016~
STABLE MULTIVIBRATORS
51
6~~001
50
nc
G4
POWER
11 ns
FH. FN PACKAGES
J. N PACKAGES
;;'1
Gl
S2..lm-
hhree-state outputs; direct clear!
&+
Sl~
MULT]MODE BUFFERED
LOW
pin assignments
[I/O PORT]
~: .!!2L
2ClR~
TOTAL
POWER
2Cext7
2Rext /Cext
60mW
on
R
CX
RXlCX
Un
R
J. N PACKAGES
~,a
~'Q
~2a
1
2
3
4
5
6
7
8
lA
lB
1m
HI'
20
2e ut
2 RutlCext
GND
~2a
CX
0..
pin assignments
9
10
11
12
13
14
15
16
FH. FN PACKAGES
2A
2B
2eLR
2IT
10
le u
1 Rtltt/Cext
Vee
1
2
3
4
5
6
7
8
9
10
lA
lB
lcrR
10
nc
20
2Cex t
11
12
13
14
15
16
17
18
2Rex t /C .xt
19
nc
GND
nc
2A
2B
2ror
2U
nc
10
1Cex t
1 RextlCext
20 -Vee
RX/CX
SN74LS423 (J,N,FN)
t Pin numbers shown on logic symbols are for J and N,packages only ..
TEXAS
INSTRUMENTS
3-117
PRODUCT GUIDE
425
logic symbol t
lG~
QUAD GATES
lA~
(three-state outputs, active-low enabling)
DELAY
MAX
MAX
SOURCE
SINK
10
ns
-2 rnA
16 rnA
SN74425
10
ns
-5.2 rnA
16 rnA
SN54425 (J,FH)
SN74425 (J,N)
MAX
MAX
SOURCE
SINK
10
ns
-2 rnA
16 rnA
SN74426
10
ns
-5.2 rnA
16 rnA
4A
~3Y
~4Y
.!.!3.L
IPOWER I
1 'S428 1700 rnW 1
WR~
FH PACKAGE
nc
11 nc
1G
12 3Y
1A
13 3A
14 3G
1Y
nc
15 nc
16 4Y
2G
17 nc
nc
16 4A
2A
2Y
19 4G
9
10 GND 20 Vee
1
2
3
4
5
6
7
8
pin assignments
WR
BUS
HLOA~
HLOA
OBIN~
OBIN
~NR~VER
'S428
STSTS.J.!L.r:::. STSTB
BUSEN~
SN74S428 (J,N,FN)
DO (17)
""_
01
02~
03
I/OW
(26) MEMW
I/OR~ iToR
MEMR......
(24)
MEMR
INTA~ INTA
BUSEN
~O
(13) OBO
~OBl
(11) OB2
(10) ~
~OB3
\l CPUO
(6)
04~
(5)
OBUS
0B4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(18) OB5
06~
07~
~ I/OW
MEMW
05
~OB6
~OB7
3-118
J. N PACKAGES
1G
8 3Y
1A
9 3A
1Y
10 3G
11 4Y
2G
2A
12 4A
2Y
13 4G
GND 14 Vee
positive logic: Y=A
<I>
CONTROLLER
FOR 8080A
1 TYPE
1
2
3
4
5
6
7
~2Y
logic symbol t
typical performance
\l~lY
3A~
4G~
SYSTEM
G')
a:CD
SN74426 (J,N)
SN54426 (J,FH)
,...
pin assignments
l!l- EN
lA~
2G~
2A~
3G~
CURRENT CURRENT
SN54426
CONTROLLER
FH PACKAGE
nc
11 nc
lIT
12 3Y
1A
13 3A
1Y
14 3G
nc
15 nc
2G
16 4Y
nc
17 nc
2A
18 4A
2Y
19 4~
GND 20 Vee
positive logic: Y = A
lG
c
(')
4Y
1
2
3
4
5
6
7
8
9
logic symbol t
428
J. N PACKAGES
fIT
8 3Y
1A
9
3A
1Y
10 3TI"
2G
11
4Y
2A
12 4A
2Y
13 4G
GND 14 Vrr
10
typical performance
""I
4A~
(three-state outputs, active-high enabling)
"a.o
~3Y
426
DELAY
1
2
3
4
5
6
7
~2Y
QUAD GATES
TYPE
\l~1Y
2A~
3G~
3A~
4G m!...t:::.
CURRENT CURRENT
SN54425
2G~
typical performance
TYPE
pin assignments
EN
TEXAS
INSTRUMENTS
J. N PACKAGES
15 DO
HLDA
16 DBl
WR
17 01
DBIN
lB DB5
DB4
19 05
04
20 DB6
DB7
21
06
22 tmSrn
07
DB3
23 INTA
24 MEMR
03
DB2
25 m5I1
26 MEMW
02
27 IIOW
DBO
GND
28 Vee
SfSTIj"
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FN PACKAGE
15 DO
HLDA
16 DBl
wrs:
17 01
DBIN
18 DB5
19 05
DB4
04
20 DB6
21 06
DB7
22 BUsm
07
23 TNfA
063
24 MEMR
03
25 l701'f
DB2
02
26 ~
DBO
27 VOW
GND
28 Vee
~
PRODUCT GUIDE
436, 437
logic symbol t
Gd1l.c:..
DRIVER CIRCUITS - MOS
MEMORY INTERFACE
pin assignments
&
LINE DRIVER/MEMORY
EN
Drives high-impedance loads
G2J..!1!..r:::..
Provides high-speed switching
Requires minimum input current

transients ('436)
t>
1A..ill-
~1Y
Total power __ . 70 mW
typical performance
LOW-LEVEL HIGH-LEVEL
TYPE
OUTPUT
OUTPUT
DELAY
7
8
Damping output resistor for reducing
2A~
~2Y
3A~
~3Y
4AJ!!!!.....
CURRENT
CURRENT
~4Y
'S436
150mA
-1 mA
5_5 ns
5A....!.!!!..-
~5Y
'S437
150mA
-lmA
5.5 ns
6A~
~6Y
SN54S436 (J,FH)
SN54S437 (J,FH)
FH. FN PACKAGES
nc
nc
11
Gl
12
4Y
3
4
lA
13
4A
lY
14
5Y
2A
15
5A
nc
16
nc
2Y
3A
17
8
9
3Y
18
19
0'2
GND
20
VCC
6Y
6A
SN74S436 (J,N,FN)
SN74S437 (J,N,FN)
QUAD TRIDIRECTIONAL
444
1
2
10
pin assignments
BUS TRANSCEIVERS
440
441
442
443
J. N PACKAGES
Gl
9 4Y
lA
10 4A
lY
11
5Y
2A
12
5A
13 6Y
2Y
14 6A
3A
3Y
15 02
GND 16 VCC
(OPEN-COLLECTOR OUTPUTS, NON INVERTED LOGIC)
(OPEN-COLLECTOR OUTPUTS, INVERTED LOGIC)
(THREE-STATE OUTPUTS, NONINVERTED LOGIC)
(THREE-STATE OUTPUTS,INVERTED LOGIC)
5
7
(THREE-STATE OUTPUTS. INVERTED AND NON INVERTED LOGIC)
B
9
ALSO SEE 'LS448
10
J. N PACKAGES
CS
11
SO
Bl
12 51
Cl
13 A4
14 A3
C2
B2
15 A2
16 Al
B3
C3
.17 GA
C4
18 G8
B4
19 GC
GND 20 VCC
FH. FN PACKAGES
CS
11
so
81
12
51
3
4
Cl
13
A4
C2
B2
14
15
A3
A2
B3
16
Al
C3
17
GA
C4
18
GB
B4
19
GC
GND
20
vCC
10
typical performance
TYPE
DELAY
MAX
MAX
SOURCE
SINK
CURRENT CURRENT
SN54LS440
22 ns
12mA
SN74LS440
22 ns
24mA
SN54LS441
15 ns
12mA
SN74LS441
15 ns
24 mA
24mA
SN54LS442
11.5 ns
-12mA
SN74LS442
11.5 ns
-15mA
SN54LS443
8 ns
-12mA
12mA
SN74LS443
8 ns
-15mA
24 mA
SN54LS444
9 ns
-12mA
12mA
SN74LS444
9 ns
-15mA
24mA
12mA
SN54LS440
SN54LS441
SN54LS442
SN54LS443
SN54LS444
(J,FH)
(J,FH)
(J,FH)
(J,FH)
(J,FH)
SN74LS440
SN74LS441
SN74LS442
SN74LS443
SN74LS444
(J,FN)
(J,FN)
(J,FN)
(J,FN)
(J,FN)
For logic symbols see next two pages.
TEXAS
INSTRUMENTS
3-119
PRODUCT GUIDE
440, 441, 442, 443, 444

logic symbol
SO
S1
~
GA
OB
Ge
A1
B1
e1
A2
B2
(:2
A3
B3
e3
A4
B4
..
C4
"'C
0
O}
(11)
(12)
(1)
r-..
(17)
r-..
.......
r-..
(18)
(19)
(2)
(3)
(15)
k
l.-
L..
'LS441 t
SO
G03
S1
Cs
G10
10(1/2) EN11
GA
10(0/2) EN12
OB
10(0/1) EN13
Ge
..,
<J
(16)
(continued]
'LS440 t
ilZ4
07,11
ilZ5
6
4-
08,12 6
il Z6
(12)
(1)
(18)
(19)
.......
MUX
1 [B)
2 [e)
o [A)
Z7
'Z8
A1
B1
(2)
o [A)
Z9-
e1
(3)
A2
B2
e2
A3
(6)
B3
(7)
e3
(13)
(9)
A4
B4
(8)
C4
k
l.-
L..
(12)
S1
(1)
G10
(17)
10(1/2) EN11
(18)
10(0/2) EN12
..,
(19)
10(0/1) EN13
ilZ4
07,11
ilZ5
501
[ir
6()2 [e)
4<)0 [A)
r
UX
Z7
A1
B1
(2)
Z8
ilZ6
400 [A)
Q9,13
5<) 1
fB)
e1
(3)
Z9
(15)
A2
(5)
B2
(4)
e2
(14)
A3
(6)
B3
(7) ...
C3
(13)
A4
(9)
B4
(8)
C4
r+
C)
C
(1)
ne - no internal connection.
TEXAS
INSTRUMENTS
"
".....
"
(16)
08,12 602[<:)
a.
c
3-120
O}
so (11)
G03
<J
(16)
2 [e)
(4)
(14)
.......
r-...
r-..
(17)
09,13 5- 1 [B)
(5)
O}
(11)
1.-
I..
l..
G10
10(1/2) EN11
10(0/2) EN12
10(0/1) EN13
2 [e)
\78,12 6
2 [e)
ilZ6
o [A)
\79,13
1 [B)
ilZ5
(14)
(6)
(8)
MUX
1 [B)
o [A)
(5)
(9)
ilZ4
(4)
(7)
<J
\77,11
(15)
(13)
G03
Z7
Z8-
Z9
PRODUCT GUIDE
440. 441, 442. 443. 444
(continued)
'LS444 t
'LS443 t
so (11)
SO (11)
Sl (12)
cs(1l
,...,
GA (17)
",...,
GB (1S)
GC(19)
O} G01
3
Sl (12)
G10
CS
10(1121 EN11
GA (111
10(0/2) EN12
GB(1S)
'" ~
GC(19)
10(0111 EN13
Al(16)
1.
I.
B1 (2)
II Z4
\7 7,11
II Z5
r
MUX
501 [ii)
6( 2 [C]
Z7
I
4(
o [A)
IIZ6
o [A)
\79,13
1 [B)
B1 (2)
ZS-
,...,
'"
10(0/21 EN12
10(0111 EN13
1.
I.
l..
Z9
G10
10(1/2) EN11
"~
Cl (3)
AZ(15)
<J
IIZ4
\7 7,11
501
MUX
IB)
2 [C)
o [A)
\7S,12 6
2 [C)
II Z6
o [A)
\79,13
5-1-1 [B)
IIZ5
Z7
ZS-
Z9
AZ(151
B2 (51
B2 (5)
C2 (4)
C2(4)
A3(14)
A3(141
B3 (6)
C3
,...,
Al(161
\7S,12 6 )2 [C)
C1 (3)
l..
<J
(1)
O} G01
3
B3 (6)
C3
A4 (13)
A4 (13)
B4 (9)
B4 (9)
C4 (SI
C4 (S)
445
logic symbol t
BCDTODECIMAL
[>
DECODERS/DRIVERS
O~ ;::.....J1L0
Use as lamp, relay, or MOS driver
1~
Low-voltage version of 'LS145
2~
input conditions
~3
~4
5Q ~5
D--1.E!-S
6~ ::::.........l16
4~
7Q
OFF-STATE
SINK
OUTPUT
CURRENT
VOLTAGE
BOmA
7V
SN54LS445 (J,FHI
~2
3~
typical performance
OUTPUT
~1
B~2
C~4
A...i.!1L 1
Full decoding of input logic

All outputs off for invalid BCD
.tJ
(J
pin assignments
BCD/DEC
- aEN
sQ
TOTAL
9~
POWER
>9Zo<
~7
~S
~9
1
2
3
4
5
6
7
J. N PACKAGES
0
9 7
10 8
1
2
11 9
12 D
3
4
13 C
14 B
5
6
15 A
GND 16 Vcc
nc
:l
"0
7
8
9
a..
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
nc
0
1
2
3
nc
4
5
6
GNO
11
12
13
14
15
16
17
18
19
20
...o
nc
C
B
A
vcc
35mW
SN74LS445 (J,N,FNI
t Pin numbers shown on logic svmbols are for J and N packages onlv.
TEXAS
INSTRUMENTS
3-121
PRODUCT GUIDE
446
logic symbol t
QUAD BUS TRANSCEIVERS
GBA~
WITH DIRECTION CONTROLS
GAB
illl.J::::,.
~
DIR2~
('LS446) outputs
P-N-P inputs to reduce dc bus
DIR3
line loading
DIR4
typical performance
DELAY
MAX
MAX
SOURCE
SINK
10EN4 [AB]
~
~
9EN5 [BA]
10EN6[AB]
10EN8 [AB]
.,
.IT
A 1 t \ 7 1 <l
SN54LS446
7.5 ns
-12mA
12mA
SN74LS446
7.5 ns
-15mA
24 rnA
(4)
A2 t
~O
.IT
\73
(5)
.IT
A3t\75
SN74LS446 (J,N,FN)
2\7
<l
.ITo.B2
(11)
B3
.ITO
6\7
(9)
(12)
[> 4\7
<l
[>
.IT
[>
.IT~B4
8\7
logic symbol t
pin assignments
BCD-TO-SEVEN-SEGMENT
.,"'C
o
a.
s::
(')
BI/RBci~~
Open-collector outputs drive
ut:
RBI~
indicators directly
Ripple blanking
typical performance
OUTPUT
OFF-STATE
SINK
OUTPUT
TOTAL
POWER
CURRENT
VOLTAGE
SN54LS447
1.6mA
7V
35mW
SN74LS447
3.2 rnA
7V
35mW
SN54LS447 (J,FH)
~r"
CT=O
V20
20.21 Q
b 20.21 Q
c 20.21Q
d 20.21Q
20.21 Q
f 20.21Q
9 20.21Q
A~'
B~2
C~4
01&1- 8
.
.
9
10
11
12
13
14
15
16
c
b
a
9
f
Vee
~
~b
~c
FH. FN PACKAGES
11 nc
1 nc
12 e
2 B
13 d
3 C
14 c
4 ['t
5 Bi/RBO 15 b
16 nc
6 nc
17
7 RBI
18 9
B 0
19 f
9 A
20 Vee
10 GND
~d
~
~f
~g
FONT TABLE T2 - NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS USING '447
101o 11213IYI5IbI11819Icl::JIUI~lcl
1
1>.
3-122
;;'1
B
e
LT
BI/RBO
RBI
D
A
GND
SN74LS447 (J,N,FN)

1
2
3
4
5
6
7
8
BIN/H:IG I>
_ _ (4)
Low-voltage version of 'LS247
TYPE
J. N PACKAGES
DECODERS/DRIVERS
FH. FN PACKAGES
nc
11 nc
GBA 12 B4
Al
13 DIR4
DIR2 14 B3
A2
15 B2
nc
16 nc
A3
17 DIRI
DIR3 18 Bl
A4
19 GAB
GND 20 Vec
B1
[>
A4t~7 <l
447
1
2
3
4
5
6
7
8
9
10
9EN7 [BA]
(2)
CURRENT CURRENT
SN54LS446 (J,FH)
10EN2[ABI
9EN3[BA]
(3)
True ('LS449) and inverting
J. N PACKAGES
1 GBA
9 B4
2 Al
10 DIR4
3 DIR2 11 B3
4 .A2
12 B2
5 A3
13 DIRI
6 DIR3 14 Bl
7 A4
15 GAB
8 GND 16 Vce
9EN1 [BAI
DIR1
Three-state outputs
TYPE
pin assignments
G9
G10
TEXAS
INSTRUMENTS
10
11
12
13
14
115
PRODUCT GUIDE
448
logic symbolt
pin assignments
QUAD TRIDIRECTIONAL
O}
so 1111
BUS TRANSCEIVERS
1121
S1
(OPEN-COLLECTOR OUTPUTS,
~111
INVERTED AND NONINVERTED LOGIC)
GA 1111
GB 1181
typical performance
l191
Ge
MAX
MAX
SINK
TYPE
DELAY SOURCE
CURRENT CURRENT
SN54LS448 17.5 ns
12 rnA
24 rnA
SN74LS448 17.5 ns
SN54LS448 (J,FH)
SN74LS448 IJ,N.FN)
e1
SO
v.l
11
so
B1
12
51
B1
12
51
C1
13
A4
C1
13
A4
C2
14
A3
C2
14
A3
B2
15
A2
B2
15
A2
B3
16
A1
B3
16
1010/21 EN12
'"
....... 1010111 EN13
C3
17
GA
C3
17
A1
(;A
C4
18
GB
C4
18
GB
B4
19
GC
B4
19
GC
GND
20
VCC
GND
20
vcc
10
10
MUX
<l
l..
501 (S)
IT Z4
Q 1,11
6(~2 [e]
4C)0 (A]
IT Z5
Q8.12 6
IT Z6
2 [e]
41~0
[A]
1 [B]
Q9.13 5
Z1
Z8
Z9t-
1151
A2
B2
e2
A3
11
l.l.-
131
1161
B1121
G10
'" 1011/21
EN11
~
A1
FH. FN PACKAGES
J. N PACKAGES
0
G3
151
141
1141
161
B3
e3 111
II
A4 1131_
191
B4
C4 181
Q)
"'C
"3
449
GBA~
QUAD BUS TRANSCEIVERS
GAB~
WITH DIRECTION CONTROLS
Three-state outputs
DIR1
True ('LS449) and inverting

DIR2
('LS446) outputs
P-N-P inputs to reduce dc bus
typical performance
MAX
MAX
SINK
SOURCE
CURRENT CURRENT
12 rnA
SN54LS449 10.5 ns -12 rnA
24 rnA
SN74LS449 10.5 ns -15 rnA
TYPE
DELAY
SN54LS449 IJ,FH)
SN74LS449 IJ.N.FN)
~
~
~
A2 t
\73
(51
A3 t
(1)
IT
\75
IT
A4t~1
<l
[>
<l
[>
GBA
A1
B4
nc
11
nc
10
DIR4
GBA
12
B4
DIR2
11
B3
A1
13
DIR4
A2
12
B2
DIR2
14
B3
A3
13
DIR1
A2
15
B2
DIR3
14
B1
nc
16
nc
A4
15
GAB
GND
16
Vce
A3
17
DIR1
DIR3
18
B1
A4
19
GAB
GND
20
vcc
10
Co)
::l
"'C
o
...
0..
1141 B1
2\7~
IT
[> 4\7
<l
....,
FH. FN PACKAGES
J. N PACKAGES
G9
G10
9ENl[BA]
10EN2[AB]
9EN3[BA]
10EN4(AB]
9EN5 [BA)
10EN6[AB]
9EN1[BA]
DIR4
10EN8[AB]
121
.,
A 1 t \ 7 1 <l
[>
(41
IT
DIR3
line loading
(!'
pin assignments
logic symbolt
t::r
B2
(11)
IT~B3
6\7
(9)
IT~B4
B\7
TEXAS
INSTRUMENTS
3-123
PRODUCT GUIDE
465, 466
logic symbol, 'ALS465A, 'LS465t
pin assignments
OCTAL BUFFERS WITH
J. N PACKAGES
THREE-5TATE OUTPUTS
P-N-P inputs reduce bus loading
'465 true outputs
'466 inverted outputs
TYPE
DELAY
SN54ALS465A
SN74ALS465A
SN54ALS466A
SN74ALS466A
SN54LS465
SN74LS465
SN54LS466
SN74LS466
7 ns
7 ns
7 ns
7 ns
11 ns
11 ns
8 ns
8 ns
SN54ALS465A (J,FHI
SN54ALS466A (J,FHI
SN54LS465 (J)
SN74LS466 (J)
lEI...
"'tJ
o
c..
c:
(')
r+
C)
(31
Al (21
typical performance
MAX
MAX
SINK
SOURCE
CURRENT CURREN...!
-12 mA
12 mA
-15 mA
24 mA
-12 mA
12 mA
-15 mA
24 mA
-1 mA
12 mA
-2.5 mA
24 mA
-1 mA
12 mA
-2.5 mA
24 mA
Yl
A2 (41
A3 (SI
Y2
A4 (SI
Y3
AS 1141
Y4
1111 YS
1131 Y6
A7 (161
(lSI Y7
AS 1181
(171 YS
AS 1121
logic symbol, 'ALS466A, 'LS466t
SN74ALS465A (N,FNI
SN74ALS466A (N,FNI
SN74LS465 (J,N)
SN74LS466 (J,N)
Yl
Y2
I
2
3
4
S
6
7
8
9
10
Gl
Al
Yl
A2
Y2
A3
Y3
A4
Y4
GND
II
12
13
14
IS
16
17
18
19
20
YS
AS
Y6
A6
Y7
A7
YB
A8
G2
vCC
FH. FN PACKAGES
11 Y5
I Gl
12 AS
2 Al
13 Y6
3 Yl
14 A6
4 A2
15 Y7
S Y2
16 A7
6 A3
17 Y8
7 Y3
18 AS
8 A4
19 G2
9 Y4
10 GND 20 VCC
Y3
A7 1161
AS 1181
logic symbol, 'ALS467A, 'LS467 t
467, 468
J. N PACKAGES
OCTAL BUFFERS WITH

THREE-5TATE OUTPUTS
P-N-P inputs reduce bus loading
'467 true outputs
'468 inverted outputs
1Yl
1Y2
lY3
1Y4
c:
CD
TYPE
SN54ALS467A
SN74ALS467A
SN54ALS468A
SN74ALS468A
SN54LS467
SN74LS467
SN54LS468
SN74LS468
MAX
MAX
SINK
DELAY SOURCE
CURRENT CURRENT
12 mA
7 ns -12 mA
-15 mA
24 mA
7 ns
-12 mA
12 mA
7 ns
-15 mA
24 mA
7 ns
-1 mA
12 mA
11 ns
11 ns -2.5 mA 24mA
8 ns
-1 mA
12 mA
24 mA
8 ns -2.5 mA
2Al
2A2
2A3
2A4
logic symbol, 'ALS468A, 'LS468
1Yl
lY2
1Y3
1Y4
SN54ALS467A (J, FHI SN74ALS467A (N,FNI

SN54ALS468A (J,FHI SN74ASL468A (N,FNI
SN54LS467 (J)
SN74LS467 (J,N)
SN54LS468 (J)
SN74LS468 (J,N)
t Pin numbers shown on logic .symbols

3-124
TEXAS
INSTRUMENTS
1
2
3
4
6
6
7
8
9
10
typical performance
c:
pin assignments
lG
lAl
lYl
lA2
lY2
lA3
lY3
lA4
lY4
GND
11
12
13
14
15
16
17
18
19
20'
2Yl
2Al
2Y2
2A2
2Y3
2A3
2Y4
2A4
2G
VCC
FH. FN PACKAGES
I lG 11 2Yl
2 lAl 12 2Al
3 lYl 13 2Y2
4 lA2 14 2A2
S lY2 IS 2Y3
6 lA3 16 2A3
7 lY3 17 2Y4
8 lA4 18 2A4
9 lY4 19 2(;"
10 GND 20 VCC
PRODUCT GUIDE
pin assignments
481
J, N PACKAGES
4-BIT-SLICE
CASCADABLE
PROCESSOR
ELEMENTS
typical performance
OPERATYPE
TION
TIME
SN74LS481 (J,N)
SN74S481 (J,N)
functional block diagram
WRLFT
WRRT
27
XWRLFT
28
XWRRT
29
DO
Al0
30
01
OPO
31
DOP3
S
9
OPl
32
DOP2
OP2
33
DOPl
10
11
OP3
34
DOPO
OP7
35
INC MC
VCC
OP6
36
GND
13
100 ns
25
26
12
'LS481 120 ns
'S481
Bl/02
Bl/03
A13
A12
All
10V
37
14
OP5
38
AOPO
15
OPB
39
AOPl
16
P09
OP4
40
41
AOP2
17
lB
42
AOSEL
19
POS
43
20
Y/AG
44
X/LG
45
CLK
46
BI/OO
47
BllOl
48
BIIO SEL
INPUTSI
OUTPUTS
CLOCK
AOP3
O.ER
SEL .. {
INPUTS
r-~~~---~~~~-JL~ON
x OUT
i'N"C:"'PC.--.... Tope
1~'---'"
lOG.> OUT IMSPI
TO Me
,..---1
lOA'D'W"R'~TOWR
AO. MUX
- - - - . . { PGM eTR
SELECT
MEM. eTA
Y OUT
ARITH.> OUT IMSPI
1 - - - _ CciUT
(.)
OOMUX { -{:;R
SELECT
-..
8110 SEL
....
:::l
"C
SHIFT MUX
HIZ
...o
_ _ _ _ _ _ _.-J
0.
ceo
OVER FLOW (MSPI
XWALFT
DATA OUT
ADDRESS OUT
PORT
PORT
TEXAS
INSTRUMENTS
PO~T
OFFICE BOX 225012 DALLAS, TEXAS 75265
3-125
PRODUCT GUIDE
482
pin assignments
4-BIT-SLICE
EXPANDABLE
J. N PACKAGES
1
2
3
4
6
6
7
CONTROL
ELEMENTS
SN54S482 (J,FH)
SN74S482 (J,N,FN)
B
9
10
54
53
Cout
Cin
51
52
A3
A2
Al
GND
11
12
13
14
16
16
17
18
19
20
AO
F3
F2
Fl
FO
CLR
56
55
CLK
VCC
1
2
3
4
5
6
7
8
9
10
FH. FN PACKAGES
54
11 AO
53
12 F3
Cout 13 F2
14 Fl
Cin
51
15 FO
52
16 CLR
17 56
A3
A2
18 55
Al
19 CLK
GND 20 Vce

CLOCK CLEAR
CARRY INPUT
DATA
IN
DATA
OUT
"'~CJ
o
c.
c
...
(')
S1 S2
S3S4
S5S6
3-126
TEXAS
INSTRUMENTS
PRODUCT GUIDE
484, 485
pin assign menU
logic symbol 'S484A t
J, N PACKAGES
BCDTOBINARY AND
1
2
3
4
5
6
7
8
9
10
BINARYTO-BCD CODE
CONVERTERS
<31
('484 BCDto-binary)
typical performanCe
DELAY TIME
TOTAL
PER PKG LEVEL
POWER
'S484A
45 ns
525mW
'S485A
45 ns
525mW
TYPE
LSD
MSD
SN74S484A (J,N,FN)
A~ 2/Ga
(41
4/Ga
B~
C~
SN54S484A (J,FH)
SN54S485A (J,N,FN)
~ ~B1N
EN
rr-ELG2
('485 binarytoBCD)
~Y4
FH, FN PACKAGES
V5
V6
V7
V8
G1
G2
1
2
3
4
5
6
7
B
9
10
G
F
VCC
E
0
C
B
A
Y1
Y2
Y3
Y4
GNO
11
12
13
14
15
16
17
1B
19
20
V5
V6
V7
V8
G1
E
H
G
F
VCC
32P'V
40
G......ll!!l.... 80
H~
A
V1
V2
V3
V4
GNo
11
12
13
14
15
16
17
18
19
20
9-BIT
BINARY
~Y5
64P'V ~Y6
12SP'V ~Y7
10
20
F~
2P'V ~Yl
4P'V f.JZLY2
SP'V ~Y3
16P'V
aVp
E~
~,
E
0
C
256P'V
160
~YS
logic symbol 'S485At
SN74S485A (J,N,FN)
G1
G2
~
~
0::
>31SVa
A....!lli- 2
B~4
9-BIT
BINARY
S
D....QL-. 16
E - l l L - 32
~--lli!L-
G~
~~J
20. 'V
(7)
40. 'V ~Y2
So. 'V ~Y3
~--1L-
100. 'V
64
12S
H---11ZL- 256
~Y4J
200. 'V
~Y5
400. 'V
,My,
SOa'V
1600. 'V
LSD
~Y7
MSD
..!l& YS
II
P
~
..,
490
logic symbol t
DUAL DECADE COUNTERS
TYPE
COUNT
FREQ
lCLR~
CLEAR
CT=O
TOTAL
1SET9~ CT=9
POWER
1CLK.J..1!...c:.. f>+
'490
25 MHz
HIGH
225mW
'LS490
35 MHz
HIGH
75mW
. SN54490 (J,FH)
SN54LS490 (J,FH)
J, N PACKAGES
CTRDIV10
typical performance
SN74490 (J,N)
SN74LS490 (J.N,FN)
(,)
:::s
pin assignmenu
n{
r--EL-1QA
~lQB
~lOc
~lQD
~2QA
2CLR.J.1L
r-!ill-2QB
2SET9...!.J1L
2CLK~P>
1
2
3
4
6
6
7
6
1ClK 9
1ClR 10
10A 11
1SET912
10a 13
1ac 14
100 15
GND 16
20 0
2ac
20B
2SETS
20A
2CLA
2ClK
VCC
1
2
3
4
6
6
7
8
9
0
FH. FN PACKAGES
nc
11 nc
1CLK 12 200
1CLR 13 2ac
10" 14 20a
1SET916 2SET9
nc
16 nc
lOa
17
10C 18
1Qo 19
GNo 12 0
"C
20"
2CLA
2CLK
VCC
~2Oc
~2QD
t Pin number,s shown on logic symbols are for J and N packages only_
nc -
TEXAS
INSTRUMENlS
POST OFFICE 80X 225012 DAllAS, TEXAS 75265
...
Q.
3-127
PRODUCT GUIDE
518.519.520.
521,522
AlS51B
AlS519
AlS520
AlS521
AlS522
Gill
PO 121
OUTPUT FUNCTION COMPARE

INPUT
POWER
AND
PUll-UP
TIME
CONFIGURATION
RESISTOR
17.5 ns
50mW
yes
P - a open-collector
P = a open-collector
no
17.5 n' 37.5 mW
50mW
9 ns
p-;-a totem-pole
yes
9 ns 37.5 mW
~ totem-pole
no
50 mW
15.5 ns
p-;;n opencollector
yes
SN54ALS518(J,FH)
SN54ALS519 (J,FH)
SN54ALS520 (J,FH)
SN54ALS521 (J,FH)
SN54ALS522 (J,FH)
SN74ALS518(N,FN)
SN74ALS519 (N,FN)
SN74ALS520 (N,FN)
SN74ALS521 (N,FN)
SN74ALS522 (N,FN)
PI 141
P2 161
P3 IBI
P4 1111
P5 1131
P6 1151
P7 1171
00 131
01 151
171
02
03 191
04 1121
1141
as
06
07
:~::
}
}
lEI
"'tJ
~
0
Co
C
(")
r+
C)
C
c:
C'D
PO 121
PI 141
P2 161
P3 IBI
P4 111
P5 1131
P6 1151
P7 1171
131
00
01 151
171
02
191
03
04 1121
as 1141
1161
~~
1181
I>
1
2
3
4
5
6
7
8
lP=OQ
(19)
9
10
Gl
lP-O
1191
p:Q
131
00
01 151
171
02
191
03
21
04"
as 1141
61
06"
07 (18)
11
P4
PO
00
PI
01
12
13
14
15
04
P5
05
P6
2
3
4
5
P2
02
16 06
17 P7
18 . 07
19 paO
6
7
8
Vee
10
P3
03
GND
20
J. N PACKAGES
I>
1
2
3
4
5
6
7
8
lP-OQ
FH. FN PACKAGES
11 P4
G
PO
12
00
PI
01
P2
13
14
15
16
02
P3
17
18
03
GND
19
20
04
P5
05
P6
06
P7
07
P-O
Vee
pin assignments, 'ALS520, 'ALS521,

'ALS522
1191
3-128 '
p-o
COMP
COMP
Gl
I>
Gl
logic symbol 'ALS522t
logic symbol 'ALS520, 'ALS521 t

Gill
J. N PACKAGES
COMP
Compares two 8-bit words

TYPE
pin assignments, 'ALS518, 'ALS519
logic symbol'ALS518, 'ALS519t
a-BIT IDENTITY
COMPARATORS
TEXAS
INSTRUMENTS
p:Q
9
10
G
PO
00
PI
01
P2
02
P3
03
GND
11
12
13
14
15
P4
04
ps
05
P6
1
2
3
4
16
17
06
P7
5
6
7
18
19
07
paQ
20
Vee
9
10
FH. FN PACKAGES
11 P4
G
12 04
PO
00
PI
01
P2
02
P3
03
GND
13
14
15
16
17
18
19
20
P5
05
P6
06
P7
07
1'-0
Vee
PRODUCT GUIDE
pin assignments
logic diagram (positivelogic)t
526
J,N PACKAGES
FUSE PROGRAMMABLE 16-BIT IDENTITY
COMPARATOR
Easy programmability
Can be programmed and verified on most
incoming test equipment
High-speed address recognition
SN54ALS526 (J)
SN74ALS526 (N)
11
P8
PO
12
P9
PI
13
Pl0
P2
14
Pll
P3
15
P12
P4
16
P13
P5
17
P14
P6
18
P15
P7
19
P=O
GND
20
VCC
9
10
For chip carrier options and Information,

These inputs can be programmed to be active high. The asterisk is not a part of the symbol. For correct symbol for the programmed device, delete
the polarity symbol ( c::.. I at any input whose programming fuse has been blown.
527
J,N PACKAGES
FUSE PROGRAMMABLE 8-BIT IDENTITY

COMPARATOR AND 4-BIT COMPARATOR
SN54ALS527(J)
II
pin assignments
logic diagram (positive logic) t
11
P8
PO
12
08
PI
13
P9
P2
14
09
Pl0
CI)
"'C
"3
CJ
P5
P3
15
P6
P4
16
010
...
P7
P5
17
Pll
:::s
P6
18
all
P7
19
P=O
GND
20
VCC
SN74ALS527(N)
1191
P-lr
10
(,)
"'C
Q.
COMP

P9
Pl0
Pl1
P-O
010
all
These inputs can be programmed to be active high. The asterisk is not a part of the symbol. For correct symbol for the programmed device, delete
the polarity symbol ( c::.. I et any input whose programming fuse has been blown.
TEXAS
INSTRUMENTS
3-129
PRODUCT GUIDE
528
logic diagram (positive logic)t
FUSE PROGRAMMABLE 12BIT IDENTITY

COMPARATOR
PO
SN54ALS528(J)
SN74ALS528 (N)
pin assignments
J,N PACKAGES
&
P1
P2
P3
P4
P5
(15)-
P6
P=Q
P7
P8
PO
10
P7
P1
11
P8
P6
P2
12
pg
P3
13
P10
P4
14
P11
P5
15
P= Q
GND
16
Vee
For chip carrier options and information,

P9
P10
P11
These inputs can be programmed to be active high. The asterisk is not a part of the symbol. For correct symbol for the programmed device. delete
the polarity symbol I~) at any input whose programming fuse has been blown.
II...
."
Q.
~
(')
r+
t Pin numbers shown are for J and N packages.
3-130
TEXAS
INSTRUMENTS
PRODUCT GUIDE
533
pin assignments
OCTAL D-TYPE TRANSPARENT

LATCHES
Dc
c
Three-state buffer-type outputs

drive bus lines directly
10
10
20
20
Inverting outputs
3D
30
40
45
typical performance
OUTPUTS
Q
ALS533
0,
AS533
TYPE
DELAY
10 ns
5 ns
SN54ALS533 (J.FH)
SN54AS533 (J.FH)
TOTAL
POWER
60mW
328 mW
50
50
60
60
70
70
80
80
oc
FH. FN PACKAGES
1
2
3
4
5
6
7
6
9
10
OC
10
10
20
20"
30
3D
40
40
GNO
11
12
13
14
15
16
17
lB
19
20
50
50
60
60
70
70
BO
Bil
VCC
pin assignments
logic symbolt
OCTAL O-TYPE EDGETRIGGERED FLIP-FLOPS

J. N PACKAGES
11 C
10
12 50
13 50
10
14 60
20
20
15 60
30
16 70
3D
17 70
40
18 80
40
19 BO
GNO 20 VCC
SN74ALS533 (N.FN)
SN74AS533 (N.FN)
534
1
2
3
4
5
6
7
8
9
10
Inverting outputs
10
10
1
2
3
4
5
6
7
B
9
10
J. N PACKAGES
11 ClK
OC
10
12 5a
10
13 50
14 60
20
20
15 60
16 70
30
3D
17 70
40
lB BO
40
19 Ba
GNO 20 VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
B
9
10
10
10
20
20'
30
3D
40
40
GNO
11
12
13
14
15
16
17
lB
19
20
ClK
50
50
60
60
70
70
BO
BO
Q)
"'C
20
20
3D
30
40
45
....CJ
50
50
"'C
60
60
70
70
c..
80
80
VCC
~
:::J
...o
typical performance
TYPE
F-MAX
'ALS534
50 MHz
'AS534
165 MHz
SN54ALS534 (J,FH)
SN54AS534 (J,FH)
PWR/
F/F
10.4 mW
51 mW
DATA TIMES
SET-UP
HOLD
I o ns t
3 ns t I 3 ns t
10 ns t
SN74ALS534 (N,FN)
SN74AS534 (N,FN)
tPin numbers shown on logic symbols are for:J and N packages only,
TEXAS
INSTRUMENlS
3-131
PRODUCT GUIDE
538
logic symbolt
3- TO B-LlNE DECODERSI
AL
DEMULTIPLEXERS
pin assignments
XIV
t>
(12)
0e1
Three-state outputs
1
2
3
4
EN
0e2
Output polarity control

Mu)tiple enables for expansion
A
B
typical performance
(6)
(7)
O,aj3\l
1,aj3\l
2,aj3\l
3,a,(l\l
17)
&
(3)
(2)
(1)
YO
Y1
Y2
Y3
Ga
Y6
G3
SN54ALS538 (J;FH)
SN74ALS538 (N, FN)
7,aj3\l
G4
(11)
I>
EN
DE2
lEI..
(6)
(7)
(17)
:}G~
0,10 \l
1,10 \l
2,10 \l
3,10
4,10
5,10
6,10
7,10
&
G1 (13)
G2 (14)
."
G3 (15)
G4 (16
\l
\l
\l
\l
\l
(')
r+
t Pin numbers shown on logic svmbols are for J andN packages onlv.
3-132
TEXAS
Y7
8
9
10
DMUX
FH. FN PACKAGES
1
2
3
4
5
6
7
OR
0E1
9
10
Y4
Y5
G2
INSTRUMENTS
(3)
(2)
(1)
(19)
(18)
(8)
(9)
(11)
YO
Y1
Y2
Y3
Y4
Y5
Y6
Y7
J. N PACKAGES
Y2
11
Y7
Yl
12 AL
YO
13 Gl
Ml 14 G2
M2 15 G3
A
16 G4
B
17 C
Y5
18 Y4
Y6
19 Y3
GND 20 Vcc
Y2
Yl
YO
0.1
01:2
A
Y5
Y6
GND
11
Y7
12
13
14
15
16
17
18
AL
19
20
Gl
G2
G3
G4
C
Y4
Y3
Vcc
PRODUCT GUIDE
539
logic symbols t
2- TO 4-LlNE DECODERS/
..
pin assignments
XIV
DEMULTIPLEXERS
Nil
J. N PACKAGES
O,aJl'V
l,aJl'V
2,aJl'V
3,aJl'V
Three-state outputs
Output polarity control
typical performance
(3)
(2)
(1)
(19)
(12)
SN54AlS539 (J,FH)
(11)
(9)
SN74AlS539 (N, FN)
(8)
1Y0
1Yl
lY2
lY3
2YO
2Yl
2Y2
2Y3
OR
DMUX
Nl0
EN
0,10 'V
(3)
(2)
O}~3
lYO
1Yl
1Y2
1Y3
1
2
3
4
5
6
7
B
9
10
lY2
lYl
lYO
lAL
1M
2A
2B
2Y3
2Y2
GND
11
12
13
14
15
16
17
18
19
20
2Yl
2YO
2AL
20E
2G
Ill'
lA
18
lY3
VCC
FH. FN PACKAGES
1 lY2 11
2Yl
2 lYl
12 2YO
3 lYO 13 2AL
4 lAL 14 20E
5 IDE 15 2<l'
6 2A
16 Ill'
7 2B
17 lA
16
2Y3
8
lB
9 2Y2 19 lY3
10 GND 20 VCC
2YO
2Yl
2Y2
(8)
2Y3
....CJ
::s
o
"C
...
0.
TEXAS
INSfRUMENlS
3-133
PRODUCT GUIDE
540, 541
logic symbol, 'LS540, 'ALS540 t
OCTAL BUFFERS AND
pin assignments
&
1
LINE DRIVERS
Three-state output drives bus lines

or buffer memory address registers
'LS540 for inverted data output
'LS541 for true data output
3
4
5
6
7
8
typical performance
TYPE
DELAY
SN54ALS540
6 ns
SN74ALS540
6 ns
SN54ALS541
6 ns
SN74ALS541
6 ns
SN54LS540
9 ns
SN74LS540
9.5 ns
SN54LS541
9 ns
SN74LS541
9.5 ns
SN54ALS540 (J,FH)
SN54ALS541 (J,FH)
SN54LS540 (J,FH)
SN54LS541 ((J,FH)
V3
MAX
MAX
SINK
SOURCE
CURRENT CURRENT
-12 rnA
12 mA
-15 rnA
24 rnA
-12 mA
12 mA
-15 rnA
24 mA
-12 rnA
12 rnA
-15 rnA
24 mA
-12 rnA
12 mA
-15 rnA
24 rnA
V4
V5
V6
V7
logic symbol, 'LS541, 'ALS541 t
SN74ALS540 (N,FN)
SN74ALS541 (N,FN)
SN74LS540 (J,N,FNI
SN74LS541 (J,N,FN)
V3
1&.
V4
V5
V6
"'0
V7
o
c..
c:
(")
(11) V8
r+
nc - no internal connectlon_
3-134
TEXAS
INSTRUMENlS
9
10
J. N PACKAGES
Y8
11
r;1
A1
12 Y7
A2
13 Y6
A3
14 Y5
A4
15 Y4
AS
16 Y3
A6
17 Y2
A7
18 Y1
A8
19 G2
GND 20 vee
FH. FN PACKAGES
11
Y8
A1
12
Y7
3
4
A2
13
Y6
A3
G1
14
Y5
A4
15
Y4
AS
16
Y3
7
8
A6
A7
17
18
Y2
AS
19
G2
GND
20
Vee
10
Y1
PRODUCT GUIDE
560
logic symbolt
pin assignments
SYNCHRONOUS 4-BIT
COUNTERS
CTRDIV10
(decade, synchronous and

asynchronous clear)
G~
ENT~
EN10
J, N PACKAGES
ALDAD 11
SlOAD
ClK
12 ENT
G1
ENP
ill..-
G2
3
4
typical performance
TYPE
l'ALS560A
COUNT
FREO
CLEAR
Low
30 MHz
SN54ALS560A (J,FH)
.!
I
SCLR~
TOTAL
POWER
100mW
J SLOAD~
I
SN74ALS560A (N,FN)
lli
J!!LJ::::::.
Ai:OAo J.!L..I:::::,
A
..&-
B~
C~
D~
G J1lLJ::::::.
COUNT
FREO
I 40 MHz I
SN54ALS561A (J,FH)
lllLENP .il.LSCLR~
ENT
typical performance
'ALS561A
M4 [SYNC LOAD]
9
10
M5 [COUNT)
CLEAR
TOTAL
POWER
SIOAD~
AN74ALS561A (N,FN) CLK (2) b
Low
100mW
AC LR
J&..-l:::::.
Z7
7,1,2,9
CT=O
1 (CT:9)G9
C8
r--J!.!!L CCO
~RCO
r
10'i7~OA
4,6D/8D
~OB
r-----!1& Oc
~OD
B~
00
15
OB
16
17
18
19
A
CCO
RCO
20
VCC
Oc
U
FH, FN PACKAGES
1
AlOAO 11
2
3
4
ClK
A
B
12
13
14
5
6
7
C
0
ENP
15
16
SlOAO
ENT
00
Oc
08
OA
AcrR
9
10
SClR
17 ~
18 CCO
19 RCO
GND
20
Vcc
J, N PACKAGES
1
ArnAn
11
S[OAll
EN10
ClK
G1
3
4
12
13
00
14
Oc
5
6
7
C
0
ENP
15
16
B
OA
G
CCO
G2
6CT:O [SYNC CLR]
M3 [COUNT)
ACLR
M4 [SYNC LOAD]
~
GND
10
M5 [COUNT]
C6/1,2,3,5+
Z7
CT:O
C8
7,1,2,9
1 (CT:15)G9
4,6D/8D
C~
D
AC[R"
~
GND
13
14
pin assignments
,
EL.-
AU5Ao J..!L..I::::::.
A
C
0
ENP
C6/1, 2, 3, 5+
CTRDIV16
(binary, synchronous and

asynchronous clear)
TYPE
7
8
M3 [COUNT)
logic symbolt
SYNCHRONOUS 4-BIT
COUNTERS
II
5
6
6CT:O [SYNC CLR]
CLK (2)
A CL R
561
.ill..-
r----1ill CCO
~RCO
10'i7~OA
~OB
~Oc
,--!ELOD
1
2
17
18
19
20
ENT
RCO
VCC
FH, FN PACKAGES
ArnAll 11 S[OAll
ClK
12
ENT
3
4
13
14
5
6
C
0
ENP
AClR
00
Oc
OB
7
8
9
10
SClR
GND
15
16
17
18
A
G
CCO
19
RCO
20
VCC
tPin numbers shown on logic symbols are for J and N packages only,
TEXAS
INSTRUMENTS
3-135
PRODUCT GUIDE
563
logic symbolt
pin assignments
J. N PACKAGES

1
2
3
4
5
6
7
8
9
10
lATCHES WITH INVERTED

OUTPUTS
Buffer-type outputs drive bus

lines directly
Inverted outputs
typical performance
SN54ALS563 (J,FH)
logic symbolt
OCTAL D-TYPE EDGE-
-0-
C.
:
o
,..

lines directly
Inverted outputs
1
2
3
4
5
6
7
8
9
10
. ClK
'
10
20
typical performance
3D
G')
c:
50
c:
CD
SN54ALS564 (J,FH)
SN74ALS564 (N.FN)
3-136
BO
GNO
11
12.
13
14
15
16
17
8(
6(
~
~
3(
2(
lB
!!
19
20
Vcc
FH, FN PACKAGES
OC
1
2
3
4
5
6
7
B
9
10
10
20
3D
40
50
60
70
80
GNO
11
12
13
14
15
16
17
C
81l
70
61
5(
41
lB
31
2(
19
20
Vcc
11
pin assignment
oc
TRIGGERED FLIP-FLOPS
10
20
3D
40
50
60
70
SN74ALS563 (N,FN)
564
"'"I
OC
TEXAS
INsrRUMENlS
J. N PACKAGES
ac 11 ClK
10
12 80
20
13 70
14 ~
3D
40
15 ~
50
16 4Q
60
70
80
GNO
17
16
19
20
30.
20
10
Vcc
FH. FN PACKAGES
ac
10
20
3D
40
50
60
70
3
4
5
B
7
8
9
10
BD
GNO
11 ClK
12 . BO
13 70
14 60
15 S,O
16 4Q
17 30
18 20
19 10
20 Vcc
PRODUCT GUIDE
logic symbol t
568
c;.!.!2!.J:::..
U/D~
(decade. synchronous and
EN10
Ml (upl
ClK~ po. CS/l.4,1,8+/2.4,1,8-
typical performance
Z6
ENi..!.!1!...l:::: G1
TYPE
COUNT
FREQ
CLEAR
Low
2
3
4
M2100WNI
asynchronous clear)
Ir 'ALS568A I 30 MHz I
I
pin assignment
CTROIV10
SYNCHRONOUS 4-BIT
UP/DOWN COUNTERS
II
TOTAL
POWER
93mW
J ENP~
G8
scui ~ SCT:O
J lOAD~ M31l0AOI
6,1,8,9
~cco
1,1 (Cl=91 G9
2,7 (Cl=OI G9
~RC5
SN74ALS568A (N,FNI
A (31
8 (4)
3,SO
10'1;7
C (S)
569
G~
U/D~
SN54ALS569A (J,FHI
2
3
4
MllUPI
M2 (OOWNI
Z6
typical performance
'ALS569AI 40 MHz
EN10
ClK~ po. CS/l,4,1,8+/2,4,1,8-
asynchronous clear)
Ir
I
I
CLEAR
Low
I
I
RCO
20
VCC
9
10
lOAD
13
14
C
0
ENP
AClR
SCLR
15
16
17
18
19
00
Oc
OB
OA
G
ceo
RCO
GND
20
VCC
ENT
pin assignment
CTROIV16
(binary. synchronous and
COUNT
FREQ
ceo
19
GNO
5
6
7
8
11
12
(161
OA
(lSI
(14) OB
logic symbol t
SYNCHRONOUS 4-BIT
UP/DOWN COUNTERS
~18
sa:R
3
4
U/O
ClK
A
(13) Oc
00
o (61
TYPE
10
FH, FN PACKAGES
1
2
M41cOUNlI
AClR~~l=O
SN54ALS568A (J,FHI
5
6
1
8
9
J, N PACKAGES
UfO
11
lOAD
ClK
12 ENT
13 00
A
14 Oc
B
15 OB
C
16
0
OA
ENJi" 11 (l
TOTAL
POWER
93mW
SN74ALS569A (N,FNI
J
J
ENi..!.!.?L..I::: G1
6,1,8,9
ENP....!.?!...... G8
scrR~ SCT:O
lOAD~
1,7 (Cl=lSI G9
M31LOAOI
2,1 (Cl:O) G9
M4 (COUNTI
AClR~.!iT:O
A (31
3,SO
r
10'1;7
B. (4)
C (S)
0(6)
~cco
~'
RCO
5
6
1
8
9
10
J, N PACKAGES
uil5
11
lOAD
ClK
12 ENT
A
13 00
14 Oc
8
15 OB
C
16 OA
0
ENJi"
17 G
~ 18 (XC
FH, FN PACKAGES
1
u/D
2
3
4
ClK
C
0
EN?
A
B
11
12
13
14
sa:R
19
RCO
SITR
15
16
17
18
19
GNO
20
VCC
!O
GNO
20
6
7
8
A'CO'i
lOAD
ENT
00
Oc
OB
OA
ceo
~
VCC
(16)
OA
(lS) 08
(14) a
(13) C
00
tPin numbers shown on logic symbols are for J and N packages only,
TEXAS
INSTRUMENTS
3-137
PRODUCT GUIDE
573
logic symbol t
OCTAL OoTYPE TRANSPARENT

LATCHES
Functionally equivalent to
'LS373 and 'S373
Approximately half the power
of'LS373
'ALS573
'AS573
OUTPUTS
..,
2
3
4
10..B!-10
r
C>
20-EL-
30~
\l~10
~20
.--!.!!LJO
40~
DELAY
a
a
TOTAL
50~
POWER
60...!!.L--
11 ns
67.5mW
4.5 ns
290mW
~40
~50
5
6
7
8
9
10
'LS374 and 'S374

f max
PWRI
50 MHz
8.44 mW
10 nsf
4 nsf
'AS574
160MHz
51 mW
3 nsf
3 nsl
SN54ALS574 (J,FH)
SN54AS574 (J,FH)
SET
HOLD
UP
60...!!.L--
\l~10
~20
~JO
~40
~50
~60
(14)
ClK -----CLR
typical performance
...,
lR
r
[>
\J~la
20.J!L
DATA TIMES
PWRI
FF
'ALS575
50 MHz
8.4mW
'AS575
160MHz
47 mW
SET
HOLD
UP
3 nsl
30~
40~
50...ill-
10nslT 4nsl
3 nsl
60.J!!L.-
70~
(10)

SN74ALS575 (N,FN)
SN74AS575 (N,FN)
80-
~2a
~30
60
70
80
15
16
17
18
19
GNO
20
50
60
50
40
30
20
10
VCC
FH. FN PACKAGES
CLK
OC
11
OC
11
CLK
2
3
4
12
13
14
80
70
2
3
10
20
60
10
20
3D
40
15
6
7
50
60
16
17
50
40
3D
40
6
7
50
60
16
17
8
9
70
80
18
19
70
18
20
10
GNO
20
80
GNO
19
20
vCC
30
20
10
VCC
9
10
12
13
14
15
80
70
60
50
40
30
pin assignment
CLR
3
4
5
10
20
3D
40
6
7
~5a
~60
~7a
~8a
TEXAS
INSTRUMENTS
13
14
nc
CLK
15
16
80
70
60
50
40
2
3
17
18
50
60
70
19
20
21
11
80
nc
22
23
10
nc
12
GNO
24
VCC
~4a'l~
3-138
9
10
J. N PACKAGES
I> Cl
...llLr::::.
10~ 10
SN54ALS575 (J,FH)
SN54AS575 (J,FH)
17 30
18 20
19 '10
20 VCC
5
6
7
8
C
80
70
SO
OC~ EN
3-state buffer-type outputs

drive bus-lines directly
f max
60
50
40
15
16
11
12
13
14
~70
70~
SO~
logic symbol, 'AlS575, 'AS575
OCTAL OoTYPE EDGETRIGGERED FLIP-FLOPS
TYPE
10
20
3D
40
SN74ALS574 (N,FN)
SN74AS574 (N,FN)
575
C>
JO~
40~
50~
TYPE
....
10..B!-10
20-EL-
'ALS574
::t
drive bus lines dirllctly

Approximately half the power of
c.
(")
EN
CLK..illL. I>Cl
F-F
2
3
4
pin assignments
oc....!!.L..b.
Functionally equivalent to
DATA TIMES
80
GNO
OC
80
70
J. N PACKAGES
'LS374
typical performance
."
50
60
70
......J!&SO
logic symbol t
lEI
20
3D
40
13
14
~70
70-$-
OCTAL OoTYPE EDGE
11
12
--1.!& 60
SO~
574
OC
10
SN74ALS573 (N,FN)
SN74AS573 (N,FN)
SN54ALS573 (J,FH)
SN54AS573 (J,FH)
FH. FN PACKAGES
J. N PACKAGES
~....!!.L..b. EN
c..illL. Cl
typical performance
TYPE
pin assignments '
30
20
4
5
6
7
8
9
10
11
FH. FN PACKAGES
nc
15 nc
16 nc
CLR
OC
10
20
17
18
19
CLK
3D
40
20
21
60
nc
50
22
23
24
60
70
12
13
80
nc
14
GNO
25
26
27
28
80
70
50
nc
40
30
20
10
nc
VCC
PRODUCT GUIDE
576
pin assignments
logic symbol t
OCTAL D-TYPE EDGE-
J. N PACKAGES
.
.
oc~
CL K
lines directly
Inverted outputs
10...!!l...- 10
TYPE
f max
'ALS576 50MHz
'AS576 160MHz
r
[>
20~
typical performance
30....ill...-
40~
50~
60~
PWRI
F-F
8.4 mW
SN54ALS576 (J.FH)
SN54AS576 (J,FH)
70~
SN74ALS576 (N.FN)
SN74AS576 (N,FN)
577
so...ill-
'V~la
~21:i
~3a
~4a
~50
~6a
~70
~SO
oc~
CLK
Buffer-type outputs
CLR
lR
10..El...- 10
Inverted outputs
r
[>
20~
30~
40~
50~
60~
7D~
Synchronous clear
OC
11
10
12
8IT
10
12
20
13
70
20
13
7a
30
14
60
30
14
60
5IT
4(1
ClK
\7~10
~2a
~3a
(10)
80---'--
ClK
~a
40
15
5a
40
15
6
7
50
16
4a
50
16
60
7
8
17
70
30
20
60
17
18
70
18
80
19
1IT
80
19
1IT
GNO
20
Vcc
10
GND
20
Vcc
10
J. N PACKAGES
EN
...l!!!- I> Cl
.J..!l..t:::..
FH. FN PACKAGES
11
3IT
20
pin assignment
logic symbol, 'ALS577, 'AS577
OCTAL D-TYPE EDGETRIGGERED FLIP-FLOPS
.l.!..!!.- t>C1
OC
EN
::::....J!!!l.40
~50
::::..J.!!L 60
~7a
p.....!.ill. Sa
FH. FN PACKAGES
-TIIr
13
nc
14
3
4
10
~O
15
16
30
17
6IT
20
19
70
40
18
5IT
30
20
sa
nc
15
nc
ClK
ru
16
nc
80
70
OC
17
ClK
10
18
80
50
19
4IT
40
21
sIT
60
20
30
nc
22
nc
9
10
70
21
ilr
50
23
40
80
22
1IT
10
60
24
30
11
12
nc
23
24
nc
11
70
VCC
12
80
25
26
20'
1IT
13
nc
27
nc
14
GNO
28
VCC
GNO
....
(.)
:::s
-C
o
...
c..
typical performance
TYPE
POWERI
F-F
'ALS577 50 MHz 8.4 mW
'AS577 160 MHz
f max
DATA TIMES
SETHOLD
UP
10 nst 4nst
tRising edge of clock pulse

SN54ALS577 (J,FH)
SN74ALS577(N,FN)
SN54AS577 (J,FH)
SN74AS577(N,FN)
nc -
TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 OAlLAS. TeXAS 75265
3-139
PRODUCT GUIDE
logic symbol t
580
LATCHES WITH INVERTED
-,
Three-state buffer;type outputs
10~10

typical performance
DELAY
'ALS580
'AS580
" ns
5.5 ns
SN74ALS580 (N,FN)
SN74AS580 (N,FN)
30....!!L-
::.......!.!Z!.3Q
50...!&.-
~4li
~5Q
60....!!!-
::::...J.1&6Q
70~
SO~
::::-!!& SO
G~
WITH OUTPUT REGISTERS
Counter has direct clear
CTRS
ICT= 255) Z4
4~RCO
f-
r
20
[>
'"tJ
FREQ
-t
C.
c:
C)
PARALLEL
CLEAR
LOAD
r
\l~O
-ill..Q~
-----Q.Loo
-liLOE
TOTAL
~OF
POWER
~OG
'LS590
20 MHz
SYNC
SYNC-L 166.5 mW
'LS591
20 MHz
SYNC
SYNC-L
SN54LS590 (J,FH)
SN54LS591 (J,FH)
r+
~OC
typical performance
MAX
.-J.!Lo H
155mW
SN74LS590 (J,N,FN)
SN74LS591 (J,N,FN)
logic symbol, 'LS591 t
G)
c:
a:CD
G~
EN3
RCK~ ~C2
I
CC KEN
.!!&.t::.
CTRS
G1
CCK~ ~1+
CCLFi-~
.,
4~RCO
(CT = 255) Z4
CT-O
20 [>
3-140
FH, FN PACKAGES
11 e
~
10
12 80
20
13 70
3D
14 60
40
15 50
50
16 40
60
17 30
1B
70
20
BO
19 10
GNO 20 VCC
J. N PACKAGES
CCLFi-..!.!.!!l..r::: CTaO
register outputs
sir
40
30
20
10
Vee
1
2
3
4
5
6
7
B
9
10
pin assignments
EN3
eCKEN~ G1
CCK~ >1+
'LS591 has open-collector
COUNT
e
80
70
60
RCK..i.!.ll- >C2
outputs
TYPE
10
20
3D
40
50
60
70
BO
GNO
11
12
13
14
15
16
17
1B
19
20
~7Q
'LS590 has three-state register
\l :::.......!.!!!10
:::a...Jlli. 20
[>
20...ill...-
590, 591
1
2
3
4
5
6
7
B
9
10
r-
40~
TOTAL
POWER
67.5 mW
330 mW
SN54ALS580 (J,FH)
SN54AS580 (J,FH)
EN
C...!.!.!!.- C1
OUTPUTS
TYPE
J, N PACKAGES
oc...!!L..c:..
pin assignments
TEXAS
INSTRUMENlS
3Q~OA
~OB
~Oc
~Oo
~OE
~OF
~OG
~OH
1
2
3
4
5
6
7
B
1
2
3
4
5
6
7
8
9
10
O~
c
00
E
OF
G
H
GNO
9 RCO
10 CCLR
11 CCK
12 CCKEN
13 RCK
14 'G
15 A
16 VCC
FH. FN PACKAGES
nc
11 nc
12 RCO
B
13
eeLR
e
14 eeK
00
15 eCKEN
E
nc
16 nc
17 RCK
OF
18 TI
G
19 A
H
GNO
20 Vee
PRODUCT GUIDE
589
logic symbol t
a-BIT SHIFT REGISTERS
oc~ EN
SRCK~ t>C3/-+
SRLOAO~ C2
WITH INPUT LATCHES

3-Step Outputs
Has parallel storage register,
inputs
RCK
Shift register has direct

over-riding load
130mW
SN54LS589 (J,FH)
NC
11
10
lJC'
12
Ow
11
SRCK
13
DC
12
RCK
14
SRCK
H'
NC
13
SRLOAD
15
RCK
14
SER
NC
16
NC
15
S1mJAIj"
GND
16
Vcr
20
17
18
19
10
GND
20
VCC
SER
..l.!L-
E~
F~
G~
H~
POWER
INPUT
'LS589
FH, FN PACKAGES
C~
O~
TOTAL
DATA
FJ
'121
A~10
typical performance
SERIAL
J, N PACKAGES
SER~~
Guaranteed shift frequency

.. dc to 20 MHz
TYPE
pin assignments
SRGB
\l~aH'
SN74LS589 (J,N,FN)
logic symbol t
618
1A~
1B~
SCHMITT-TRIGGER
POSITIVE-NAND
pin assignments
~ 1Y
1C~
GATES WITH TOTEM-
10~
2A~
2B~
2C~
20I~
3A~
3B ..!l.ZL3C~
30~
POLE OUTPUTS
typical performances
I TYPE
HYSTERESIS
I'LS618
0.7 V
I DELAY I
I
25 ns
J, N PACKAGES
&LT
lA
11
2Y
lA
11
18
12
NC
18
12
NC
NC
13
2C
NC
13
2C
2Y
20
lC
14
lC
14
20
10
15
3Y
10
15
3Y
lY
16
3A
lY
16
3A
~2Y
FH, FN PACKAGES
1
2
U.
17
38
2A
17
28
18
3C
28
18
3C
NC
19
3D
NC
19
3D
GND
20
VCC
10
GND
20
VCC
10
II
38
~ 3Y
....
positive logic: Y = ABCD
(.)
SN54LS618 (J,FH)
:l
..o
SN74LS618 (J,N,FN)
"C
logic symbol t
619
1A~
2A~
3A~
4A~
SCHMITT-TRIGGER
INVERTERS WITH
TOTEM-POLE
OUTPUTS
5A
typical performance
TYPE
HYSTERESIS
'LS619
0.7 V
I DELAY
T 16 ns 1
pin assignments
IT
....!..!!.!.-
6A ~
7A ~
SA ~
positive logic: Y =
SN54LS619 (J,FH)
a.
~1Y
~2Y
~3Y
~4Y
~5Y
~6Y
~
~
7Y
SY
J, N PACKAGES
FH, FN PACKAGES
lA
11
5Y
lA
11
lY
12
5A
lY
12
5Y
NC
13
NC
NC
13
NC
2A
14
6Y
2A
14
6Y
6A
5A
2Y
15
6A
2Y
15
3A
16
7Y
3A
16
3Y
17
7A
3Y
17
7A
4A
18
8Y
4A
18
8Y
4Y
19
8A
4Y
19
8A
GND
20
VCC
10
GND
20
VCC
9
10
7Y
SN74LS619 (J,N,FN)
NC -
No internal connection.
TEXAS
INSTRUMENTS
DALLAS, TEXAS 75265
3-141
PRODUCT GUIDE
592
logic symbol t
a-BIT BINARY COUNTERS
CCIR
'CC'R'm
WITH INPUT REGISTERS
Has parallel register inputs
CCK
CLOAO
Counter has direct overriding

load and clear
LOAD
FREQ
4
5
,.
CLEAR
TOTAL
POWER
SN74LS592 (J,N,FNI
HEL-
130mW
FH. FN PACKAGES
1
nc
11
nc
B
C
12
13
RCO
CCLR
CCK
CCKEN
O~
E~
SN54LS592 (J,FH)
SYNC-L
20
J!Lill..-
F~
G~
SYNC
~~CO
C2
.,
20 MHz
CT = 255
A~10
typical performance
COUNT
J. N PACKAGES
B
9 "I'1CTI
10 CCLR
C
CCK
0
11
E
12 CCKEN
F
13 RCK
14 CLOAD
G
15 A
H
GNO
16 VCC
RCK~ p>C1
.. dc to 20 MHz
PARALLEL
J.!.!!!.J::::.. CT~O
..!!E...t:::. G3
J.!1L p> 3+
Guaranteed counter frequency
MAX
pin assignments
CTRS
14
15
6
7
nc
16
17
8
9
10
logic symbol t
593
WITH INPUT REGISTERS
Has parallel three-state I/O:
II
""C
'""l
C.
CCLFi~
register inputs/counter
CCKEN~
CCKEN'~
I outputs
Counter has direct overriding

load and clear
Guaranteed counter frequency
CCK (13)
MAX
....
COUNT
FREQ
20 MHz
PARALLEL
LOAD
SYNC
CT=O
CLOAD~
... dc to 20 MHz
G4
CT= 255
r-:::. 4+
9
10
C3
RCKEN' .!!Z!.-t:::. G1
CLEAR
SYNC-L
SN54LS593 (J,FH)
SN74LS593 (J,N,FN)
TOTAL
POWER
177mW
RCK~ ~1C2
(1)
,.
.,
A1QA~
B/QB~
20
\75,6
3D
[>
Z5
C/QC~
O/QO~
~/~:ffi::=
:~~:~
3-142
::::.......!!!lRCO
typical performance
c(")
1
3
nc
19
RCK
CLOAO
A
20
Vcc
18
pin assignments
G~ ~
em
EN6
G ..!!.!!Ll:::::.
a-BIT BINARY COUNTERS
F
G
H
GNO
TEXAS
INsrRUMENTS
3
4
J. N PACKAGES
11
RCO
12 CCLR
13 CCK
14 CCKEN
010 0
15 CCKEN
EIOE
16 RCK
FIOF
17 l1"CKrn
GIOG
18 G
HIOH
TIOAri' 19 G
GNO
20 VCC
AIOA
BlOB
CIOC
FH. FN PACKAGES
11
RCO
AIOA
12 CCLR
BlOB
13 CCK
CIOC
010 0
14
'C'CR'tN
15
CCKEN
RCK
EIOE
FIOF
GIOG
HIOH
TIOAri'
19
GNO
20
VCC
5
6
10
16
17
18
m:Km
G
PRODUCT GUIDE
594
~
RCLR
WITH OUTPUT LATCHES
pin assignments
logic symbol t
J, N PACKAGES
R3
RCK~ i>C2
SRCLI:j~
Serial-in, parallel-out shift registers

with storage
SRCK
Buffered outputs
SER
J.!2.L I> Cl/"

(14)
SRGS
r
3~O
(1)
A
.,
10
20 [>
DATA
TYPE
ASYNC
TOTAL
CLEAR
POWER
Low
180mW
INPUT
'LS594
[>
SN54LS594 (J,FH)
Serial-in, parallel-out shift
SRCK
'LS595 has three-state parallel
SER
outputs
LOW
11
nc
08
12
Ow
SRCiJ'i
15
RCK
nc
16
nc
3~OH
~OH'
J!.!!lJ:::..
J.!2.L .,
>Cl/....
20[>3\J~ OA
~O
(2)
B
10
17
18
SER
H
GND
19
OA
20
Vcc
1
2
OB
Ow
Oc
10
SRm
OD
OE
11 SRCK
12 RCK
OF
13
"G"
G
OH
GND
14
SER
G.!E!...E::..
SER
nc
11
Os
12
OH'
Oc
13
"S"CIR
00
14
SCK
nc
OE
15
RCK
nc
16
nc
OF
17
"IT
OG
OH
GND
18
SER
19
20
OA
9
10
VCC
II
..,(,)
:::s
"t:J
...
0..
~ ~O
FH, FN PACKAGES
f----'-'- Q F
EN3
SRCK..!.!.!!...-~ Cl/"
VCC
f----(s)
RCK~~
SRCLR~
OA
16
160mW
15
~QH'
SN74LS595 (J,N,FN)
SN74LS596 (J,N;FN)
RCIA
OF
G
~OD
~Q
167mW
SRCK
~OC
CLEAR POWER
'LS596
SN54LS595 (J,FH)
SN54LS596 (J,FH)
nc
~OF
SRGS
R
16
13
20[>3\J~ Q~
'LS595
A
VCC
14
ASYNC TOTAL
LOW
SER
15
J, N PACKAGES
typical performance
Rcrl!
14
00
" . dc to 20 MHz
DATA
13
Oc
parallel outputs
INPUT
OF
G
OH
GND
OE
TYPE
pin assignments
'LS596 has open-collector
SERIAL
RCK
10
SRCLR
registers with storage
12
SRm
G~ EN3
RCK~ I>C2
WITH OUTPUT LATCHES
OE
SRCK
OH'
SN74 LS594 (J,N,FN)
595, 596
11
~O
(5)
E
~OG
20 [>
10
00
FH, FN PACKAGES
f----'-'- 00
SERIAL
Oc
~OC
typical performance
08
~OB
, , ,dc to 20 MHz
1
2
20[>3~~
QA
(1)
~QB
----'-'- QC
~Q
(4)
~~E
~ F
f---(7) QG
20 [> 3 ~ f----'-'- QH
~QH'
nc - ~o internal connection.
TEXAS
INSTRUMENTS
3-143
PRODUCT GUIDE
logic symbol t
597
pin assignments

WITH INPUT LATCHES
Has parallel storage register

inputs
Shift register has direct overriding load and clear
J. N PACKAGES
9 H'
FH, FN PACKAGES
10
12
OH'
11
SRCLR
SRCK
13
11
12
RCK
14
SRCLA
SRCK
15
17
13 SRLOAO
14 SEA
15
GNO
16
VCC

... dc to 20 MHz
typical performance
RCK
16
19
GNO
20
Vce
10
18
SALOAO
SER
SERIAL
ASYNC TOTAL
DATA
CLEAR POWER
INPUT
0
LOW 130mW
'LS597
TYPE
SN74LS597 (J,N,FN)
SN54LS597 (J,FH)
598
logic symbol t
pin assignments

WITH INPUT LATCHES
II...
"'C
c.
c:
(')
Has parallel three-state I/O

storage register inputs, shift
register outputs
Shift register has direct overriding load and clear
SERIAL
G)
C
TYPE
DATA
INPUT
'LS598
SN54LS598 (J,FH)
11
Ow
A/OA
11
12
SRCLR
OH'
SACLA
13
SRCK
BlaB
C/OC
12
BlaB
C/OC
13
SRCK
0100
14
0/0 0
EIOE
14
SCKEN
15
SACKEN
RCK
EIOE
15
RCK
F/OF
16
F/OF
16
G/OG
17
H/OH
18
SERO
SRLOAO
GNO
19
OS
20
VCC
10
ASYNC TOTAL
CLEAR POWER
LOW
177mW
SN74LS598 (J,N,FN)
nc -
3-144
TEXAS
INSTRUMENlS
FH. FN PACKAGES
A/OA
. . dc to 20 MHz
typical performance
....
c:CD
J. N PACKAGES
SRG8
DALLAS,],EXAS 75265
SERI
9
10
SERI
G/OG
17
H/OH
18
SERO
SRLOAO
GNO
19
OS
20
VCC
PRODUCT GUIDE
599
logic symbol t
FiCi]i
R3
RCK~ >C2
WITH OUTPUT LATCHES
pin assignments
SRCLR~
Serial-in, parallel-out shift registers
1
2
SRGS
R
SRCK~~C1/"
Open-collector outputs
SER~

_ . dc to 20 MHz
10
,.
20
[>3Q~
(1)
TYPE
DATA
'LS599
INPUT
D
~Qo
~O
(5)
ASYNC
TOTAL
CLEAR
POWER
Low
170mW
---t6)
----m
E
OF
QG
20 [> 3 Q r-------;. Q H
~OH'
SN74LS599 (J,N.FN)
10
:mcrn
00
11
SRCK
OE
12
RCK
OF
13
RCLR
6
7
B
OG
14
SER
OH
GNO
15
16
A
VCC
~OC
[>
SN54LS599 (J,FH)
~OB
typical performance
SERIAL
J. N PACKAGES
9 0H'
B
Oc
FH. FN PACKAGES
nc
11
nc
B
Oc
12
OH',
SRCLR
00
14
OE
nc
15
RCK
16
nc
OF
8,OG
17
RCm
9
10
H
GND
13
18
SRCK
SER
19
OA
20
VCC
III
....
(.)
::l
-C
...o
a.
TEXAS
INSTRUMENTS
POST OFFiCe BOX 225012 DALLAS, TeXAS 75265
3-145
PRODUCT GUIDE
600
logic diagramt
MEMORY REFRESH
CONTROLLERS
Controls refresh cycle of 4K or 16K

dynamic RAM's
Three-state outputs drive bus

lines directly
Time to initiate refresh request

is typically 30 ns
Refresh modes: transparent,

burst
SN74LS600A (J,N)
pin assignments
J,N PACKAGES
RC~HI
BUSY
11
AO
12
RC~LO
REF REOl
Al
13
A2
14
REF RE02
A3
15
RAS
A4
16
HOLD
A5
17
LATCHED RCO
A6
18
RESET LATCHED RCO
4K/16K
19
RC BURST
GND
20
VCC
10
For chip carrier information, contact,the factory.
lEI
..,"C
o
a.
c(")
r+
601
logic diagramt
MEMORY REFRESH
CONTROLLERS
Controls refresh cycle of 64K

dynamic RAM's

lines directly

is typically 30 ns
Refresh modes: transparent,

burst
SN74LS601A (J,N)
pin assignments
J,N PACKAGES
1
BUSY 11
RC RAS HI
AO
12
RC RAS LO
Al
13
REF REOl
A2
14
A3
15 ~
A4
16
1mrn
A5
17
LATCHED RCO
A6
18
RESET LATCHED RCO
A7
19
RC BURST
GNO
20
VCC
10
REF RE02
For chip carrier information, contact the factory,
nc -
3-146
TEXAS
INSTRUMENTS
PRODUCT GUIDE
602
logic diagramt
MEMORY REFRESH
CONTROLLERS
Controls refresh cycle of 4K or

16K dynamic RAM's

lines directly

is typically 30 ns
Refresh modes: cycle steal,

burst
SN74LS602A (J,N)
pin assignments
J, N PACKAGES
1
BUSY
11
RCi'iASHI
AO
12
3
4
Al
13
REF REOI
A2
14
REF RE02
A3
15
A4
A5
16
HOrn
17
READY
7
8
9
10
A6
18
RCJfJ\S LO
RC CYCLE STEAL
4K/16K 19
RC 8URST
GND
VCC
20
For chip carrier information, contact the factory_
603
logic diagramt
MEMORY REFRESH
CONTROLLERS
Controls refresh cycle of 64K

dynamic RAM's

lines directly

is typically 30 ns
Refresh modes: cycle steal,

burst
....
(.)
:::l
"'0
...o
c..
SN74LS603A (J,N)
pin assignments
1
2
3
4
5
6
7
8
9
10
J, N PACKAGES
11
RCli~HI
12 RC R~ LO
Al
13 REF REO 1
A2
14 REF RE02
A3
15 RAS
A4
16 HOLD
AS
17 ii'rAm
A6
18 RC CYCLE STEAL
A7
19 RC BURST
GND
20 VCC
BO"5Y
AO
For chip carrier information, contact the factory_
nc -
TEXAS
INSTRUMENTS
3-147
PRODUCT GUIDE
604, 605
606, 607
logic symbol, 'LS604, 'LSSOSt
JD. N PACKAGES
CLK~_C1
.D' EN
OCTAL 2INPUT MULTIPLEXED

REGISTERS
"
A1-~I-~;;;o11>'V~V1
1S D-type registers - one for
B1- 5~ 10
each data input
'LSS04 and 'LSS06 feature
Multiplexers select stored data
Application-oriented:
A2-is~
:l+
B2-~--
A3 - 8 83- 9 -
three-state outputs
fJllLV4
A5-~r
- max speed - ('LS604, 'LS605)

- glitch-free operation ('LS606, 'LS607)
~V5
B5-(25
JUL V6
~V7
~V8
il
A7
22
:~
21
BO
typical perforrnanca
TYPE
DELAY POWER
'LS604
23.5 ns
275mW
'LS605
26 ns
200mW
'LS606
31 ns
275mW
'LS607
31 ns
200mW
(JD,FH)
(JD,FH)
(JD,FH)
(JD,FH)
SN74LS604
SN74LS605
SN74LS606
SN74LS607
logic symbol, 'LS605, 'LSS07 t

A/s..la- .D'G2
CLK~ I>.D'C1EN
I~ ~
Ts rTIL"'it ;;;01[> Qr r!!!L V1
Al
I(JD,N,FN)
B1 5~ 10
(JD,N,FN) ,
A~~~
B2 (7~
(JD,N,FN)
(JD,N,FN)
83
gr~:lr-
~~
o
c.
c
(')
rillLV2
f.ill.LV3
rillLV4
A~:tm:
~V5
B6-~
A7-~
t-illLV6
B7-,g
r!lli...V7
AO-~
BO-
rillLvo
!~_~I
-a
r-illLV2
f.ill.L V3
~:~
from either A or B bus
SN54LS604
SN54LS605
SN54LS606
SN54LS607
r+
tPln numbers shown on logic symbols are for JO and N packages only.
3148
pin assignments
A/i-1lW .D'G2
TEXAS
INSTRUMENTS
1
2
3
4
6
8
7
8
9
10
11
12
13
14
ClK
AlB
Al
Bl
A2
B2
A3
83
A4
84
V4
V3
V2
GND
16
18
17
lB
19
20
21
22
23
24
25
26
27
28
VI
V6
V8
V7
VB
BB
A8
87
A7
B8
A8
85
A5
VCC
FH. FN PACKAGES
ClK
16 VI
AlB
18 V6
Al
17 V8
Bl
18 V7
A2
19 VB
B2
20 B8
A3
21
A8
83
22 87
9 A4
23 A7
10 B4
24 B6
11 V4
26 A6
12 V3
26 B5
13 V2
27 A6
14 GND 28 Vec
1
2
3
4
6
6
7
8
PRODUCT GUIDE
608
logic symbol t
J. N PACKAGES
MEMORY CYCLE CONTROLLER

SN54LS608/SN74LS608
PAGE
CONTROLLERS
pin assignments
4>
MEMORY CYCLE
Read cycle
NORMAL
--'-'=---i.>START
Write cycle
Read, modify, write cycle
RAS only refresh cycle
Page or normal modes
Stand-alone controller for

CPU-to-memory interface
(11) ROW/COL
PRECHARGE
PIN
CAS
CAS HOLD
RlWin
11
ROW/COL
RMW
12
RC RAH
R/Woul
13
START
AASEN
RAS
15
RC CAS La
GNO
16
14
VCC
REFRESH
FH. FN PACKAGES
RCRAH
PRECHARGE
RC PRECHARGE
RCCAs LO
SN74LS60B (J,N,FN)
11
nc
nc
PRECHARGE 12
CAS
PIN
13
CAS HOLD
R/Win
14
ROW/COL
RMW
15
RC RAH
nc
16
nc
RiWoul
17
START
RAS EN
18
REFRESH
19
RC CA~LO
10
GNO
20
VCC
SN54LS60B (J,FH)
9
10
....,
(.)
~
"C
...o
a.
tPin numbers shown on logic symbols are for J and N packages only_
TEXAS
INSTRUMENTS
3-149
PRODUCT GUIDE
610, 611
612, 613
typical performanca
TYPE
MEMORY
MAPPERS
pin assignments
MAP
MAP
OUTPUTS
OUTPUT
LATCHED
TYPE
'LS610
Yes
'LS611
Yes
OC
'LS612
No
3-State
'LS613
No
OC
Designed for paged memory
Expands four address lines to
JO, N PACKAGES
1 AS2
21 ME
2 MA3
3 ASJ
3-State
6A/W
7 DO
8 01
12 address lines
(JD,FC)
SN54LS611 (JD,FC)
SN54LS612 (JD,FC)
SN54LS613 (JD,FC)
22 M06
23 M07
4CS
24 M08
5 STRClIfE 25 M09
mapping
sr~54LS610
(JD,N)
(JD,N)
(JD,N)
(JD,N)
23 ME
24 M06
3 ASJ
25 M07
4CS
26 M08
5 STR08E 27 M09
6 nc
28 nc
26 MOlD
27 MOIl
7 R/W
8 DO
9 02
10 03
9 01
10 02
31
32 06
11 04
31 08
11 03
33 07
12 05
32 09
33 010
12 04
34 08
13 05
35 09
14 MOO
15 MOl
34 011
14 MM
15 MOO
36 010
37 011
16 M02
17 M03
36 ASO
37 MAl
16 MOl
38 MAO
39 nc
35 MAO
17 nc
38 ASI
19 M05
20 GNO
39 MA2
19 M03
41 MAl
40 VCC
20 M04
42 ASI
21 M05
22 GNO
43 MA2
18 M02
nc on 'LS612 and 'LS613
functional block diagram (positive logic)
8 L', FOR MOO-M07
--1--...,
~~~O
~
~---"""'-IGI
G2
c.
c::
(')
III 'LS811 1
HAVE I
LATCH I
.,."
I
I
1-<
~ f,Lj).&",'
~:""' , Lr,~l
Lr.:~---~
~
ST'FiOBe---"'~---I"!I<lI
L.-f.,
t+- . r+8~ .!----'I ~.
~
~
RfR~~::;====f.t--i-1t!~=~~1~2-r_~1
--~2
1 L-. r-+-1L'O__ Jt-+- '--.
.....'"
pot.
RSO-RS3:---.4" - + - - - I " , , - -
CllWRITEJ
--J.-1'0
00011-
A,10
EN!1
irS:!~o"~iO
'<J
THROUGH
...-.-1-,.,-......
"LS810 Ind 'LS812 hlvo 3nlte ('<J) mlp outputs.

'LS811 ond 'LS813 hlVO opon-colltctor (Q) mop outputs.
3-150
TEXAS
INSTRUMENTS POST OFFICE BOX 225012 DALLAS, TEXAS 75265
t>
MOO-M07
r+-Moa.MOll
'LS812 III
12'
18 M04
* C on 'LS61 0 and 'LS611
III
29 MOlD
30 MOIl
28
29 06
30 07
13 MM
SN74LS610
SN74LS611
SN74LS612
SN74LS613
FC PACKAGE
1 RS2
2 MA3
40 ASO
44 Vce
PRODUCT GUIDE
620. 621
622. 623
J. N PACKAGES
OCTAL BUS
TRANSCEIVERS
Bidirectional bus transceivers
Local bus latch capability
typical performance
GAB
11
B8
GAB
11
Al
12
B7
Al
12
87
A2
13
B6
A2
13
B6
A3
14
B5
A3
14
B5
OUTPUT
A4
15
B4
A4
15
A5
16
B3
A5
16
83
A6
17
B2
A6
17
B2
10
SOURCE
SINK
CURRENT
CURRENT
1B
81
AB
19
GBA
GND
A7
20
VCC
10
SN54ALS620A
3-State
-12 mA
SN74ALS620A
3-State
-15mA
24mA
SN74ALS620A-l
3-State
-15mA
48 mA
GSA (19)
SN54ALS621A
12mA
GAS (1)
SN74ALS622A-l
o-e
e-e
e-e
o-e
e-e
o-e
SN54ALS623A
3-State
-12mA
SN74ALS623A
3-State
-15 mA
24 mA
SN74ALS623A-l
3-State
- 15 mA
48 mA
SN54AS620
3-State
-12mA
48mA
SN74AS620
3-State
-15mA
64mA
SN54AS621
SN74AS622
o-e
e-e
e-c
e-c
SN54AS623
3-State
-12mA
48mA
SN74AS623
3-State
-15mA
64mA
SN54LS620
3-State
-12mA
12mA
SN74LS620
3-State
- 15 mA
24 mA
SN54LS621
SN74LS622
e-c
e-c
e-c
e-c
SN54LS623
3-State
SN74LS623
3-State
SN74ALS621A
SN74ALS621A-l
SN54ALS622A
SN74ALS622A
SN74AS621
SN54AS622
SN74LS621
SN54LS622
SN54ALS620A (J,FH)
SN54ALS621A (J,FH)
SN54ALS622A (J,FH)
SN54ALS623A (J,FH)
SN54AS620 (J,FH)
SN54AS621 (J,FH)
SN54AS622 (J,FH)
SN54AS623 (J,FH)
SN54ALS620 (J,FH)
SN54LS621 (J,FH)
SN54LS622 Ii,FH)
SN54LS623 {J,FH)
12 mA
BB
MAX
FH. FN PACKAGES
1
2
8
MAX
TYPE
pin assignments
logic symbol, 'ALS620A, AS620, 'LS620t
A7
B4
lB
81
AB
19
GBA
GND
20
Vec
logic symbol, 'ALS622A, 'AS622, :LS622t
24 mA
48mA
12 mA
24 mA
48mA
12mA
logic symbol, 'ALS621 A, 'AS621, 'LS621 t

GSA (19)
48 mA
64mA
GAS (1)
48mA
64mA
12 mA
24 mA
12 mA
log ic symbol, 'A LS623A, 'AS623, 'LS623t
24 mA
-12 mA
12 mA
-15 mA
24 mA
...
(,)
:::s
SN74ALS620A, (N,FN)
'SN74ALS620A-l (N,FN) A7 (8)
SN74ALS621A (N,FN)
SN74ALS621A-l (N,FN)
SN74ALS622A (N,FN)
SN74ALS623A (N,FN)
SN74AS620 (N,FN)
SN74AS621 (N,FN)
SN74AS622 (N,FN)
SN74AS623 (N,FN)
SN74ALS620 (J,N,FN)
SN74LS621 (J,N,FN)
SN74LS622 (J,N,FN)
SN74LS623 (J,N,FN)
"C
o
a..
c..
t Pin numbers shown on logic symbols are for J and N packages only_
nc -
TEXAS
INSTRUMENTS
3-151
PRODUCT GUIDE
624
VOLTAGE
CONTROLLED
OSCILLATORS
a
11141
for Isolation of Input/output

lignals
Maximum output frequency
EN~
BV
[aSCI
*"*
RNa
FC 10 t>
CX OV
CX [aSCI
RNa
FC
CX1
.i!L..!l.
!lli.Ll.
CX2~
20 MHz
"
~Y
~z
FH, FN PACKAGES
1
2
3
4
1(11
Improved version of original
veo family
SN54LS624 (J,FHI
J, N PACKAGES
1 OSCGND
8 Z
2 RNG
9 Vee
3 CXl
10 nc
CX2
11 nc
Ii m
12 nc
8 Y
13 FREQ CONT
7 GND
14 OSC VCC
OSCVCC
I TYPE I REPLACES I
I 'LS624 I 'LS324 I
Separate supply voltage pins
pin . .I"nmanta
lOgic Iymbol t
typlCiI perforrMnce
OSCOND
II
8
7
SN74LS624 (J,N,FNI
8
8
10
625
VOLTAGE
CONTROLLED
OSCILLATORS
I TYPE I REPLACES I
I 'LS625 I
'LS325
!!!....!l.
1CX2~
for input/output isolation

20SCVcc
20 MHz
SN54LS625 (J.FHI
~
~
1CX1~
I at>
BV [aSCI
OV [ascI
FC
CX
CX
~1Y
~1Z
~
Et::tt
20SC GND
2FC (11)
family
"..o
10SCVCC
10SCGND
1FC
SN74LS625 (J,N,FNI
2CX1~
2CX2~
,..
()
tYpiCiI perforrMnce
VOLTAGE
I TYPE I REPLACES1
CONTROLLED
I'LS626I
'LS326
.!!!....!l..
1CX1~
1C)(2~

20 MHz
2EN
FC
CX
CX
I G t>
SN74LS626 (J,N,FNI
~1Y
121
r--1Z
~2Y
ili!..r::.
2FC'~
family
SN54LS626 (J,FHI
1171
5V
(OSC)
1EN~
1FC
oscVcc
2CX1~
OV
(aSCI
2CX2~
~2Z
1(81
OSCGND
3-152
J, N PACKAGEa
1 GNO
9 20SCGND
2 lZ
10 20SCVcc
3 lY
11 2FC
4 lCX'
12 2CX2
5 lCX2
13 2CXl
B lFC
14 2Y
7 10SC Vee 15 2Z
8 10SC GND 16 VCC
FH, FN PACKAGES
1 nc
11 nc
2 GND
12 20SC GND
3 lZ
13 20SC VCC
4 lY
14 2FC
5 lCXl
15 2CX2
6 nc
16 nc
7 lCX2
17 2CXl
8 lFC
18 2Y
9 10SC Vee 19 2Z
10 10SC GND 20 Vcc
pin IISSignmanta
logic .ymbol t
OSCILLATORS
2Y
~2Z
Q.
626
17
18
18
20
nc
Z
VCC
nc
nc
nc
nc
nc
FREQ CONT
OSC Vcc
pin Ignmenta
100Ic Iymbol t
tYplCiI perforrMnce
11
12
13
14
16
le
nc
OSC GND
RNG
CXl
nc
CX2
nc
m
Y
GNO
TEXAS
INSIRUMENTS .
J, N PACKAGES
1 GND
9 lFC
2 lZ
10 2FC
11 2CX2
3 IV
4 1m
12 2CXl
13 2m
5 lCXl
14 2Y
6 lCX2
7 OSC Vee 15 2Z
8 OSC GND 16 VCC
FH, FN PACKAGES
1 nc
2 GND
3 lZ
4
IV
1m
nc
lCXl
B lCX2
9 OSC Vee
10 OSC GND
5
6
7
11
12
13
14
15
16
17
18
19
20
nc
lFC
2FC
2CX2
2CXl
nc
2m
2Y
2Z
VCC
PRODUCT GUIDE
627
typical performance
VOLTAGE
I TYPE I REPLACES I
,'LS627 I 'LS327
I
CONTROLLEO
OSCILLATORS
logic symbol t
10SCVCC
10SCGND
lFC
~
~
20 MHz
20SCVCC
2FC
.!E!...LL
family
~1Y
FC
CX
CX
20SCGND
lCXl
lCX2
10SC
GND
5
6
~2Y
2CX1~
SN54LS627 (J,FH)
FH, FN PACKAGES
J, N PACKAGES
10SC
8 2Y
vcc
20SC
9
2 lFC
GND
1 nc
OV [Osc)
E!.....!L
lCX1~
lCX2~

pin assignments
I G [>
5 V [OSC)
lY
7 GNO
VCC
10 2CX2
3 IFC
11
2CXl
12
2FC
5 nc
13
20SC
lCXl
VCC
14 VCC
lCX2
7 nc
10SC
8
GND
2CX2~
SN74LS627 (J,N,FN)
10SC
IV
10 GNO
628
'TYPE
CONTROLLED
r'LS628
OSCILLATORS
logic symbol t
typical performance
VOLTAGE
I REPLACES I
I 'LS324 I
11141
5V
[OSC)
EN~
RNG
for input/output oscillators
FC
..!E...!L
!EL.!L
CX1~
CX2~
RX~
20 MHz
RNG
FC
IG
CONTROLLED
OSCILLATORS
J, N PACKAGES
OSC
8 Z
GND
2 RNG
~Y
~z
9 VCC
CXl
CX2
EN
Y
10
11
12
13
7 GND
14
3
4
5
6
RX
RX
OV
[OSC]
2
3
4
5
6
nc
RX
RX
FC
CSC
vcc
logic symbol t
, TYPE
1 FC

20 MHz
family
SN54LS629 (J,FH)
SN74LS629 (J,N,FN)'
1(15 )
-~
1 EN (3)
1 RNG
Separate power supply pins
----D..
.!!!...LL
lCX1~
lCX2~
2
RNG
5V
[OSC)
FC
CX
IG
[>
~1Y
CX
EN .!.!1!..1:::..
2 RN G
2 FC
20SC
GNO
14 2CX2
13
15 nc
16 2CXl
17 nc
18 2FC
20SC
19
VCC
20 Vce
11
nc
12 Z
13
14
15
16
VCC
nc
nc
RX
7 nc
17 nc
8 EN
9 v
18 RX
19 FC
CSC
20
Vcc
pin assignments
OSCVCC
I REPLACES I
'LS124
,'LS629 I
I
CSC
GND
RNG
CXl
nc
eX2
10 GND
OSCGND
typical performance
12 2Y
FH, FN PACKAGES
1 nc
.1.(1)
SN74LS628 (J,N,FN)
VOLTAGE
CX
SN54LS628 (J,FH)
629
[>
CX
RX~
family
nc
pin assignments
OSCVCC
11
.!.!!!.J:L
.!!L1L
~2Y
2CX1~
OV
[OSC)
2CX2~
Ts)
J, N PACKAGES
9 GND
10 2Y
11 2EN
12 2CXl
13 2CX2
14 2RNG
CSC
15
7 IV
vce
CSC
16 VCC
8
GND
1
2
3
4
5
6
2FC
lFC
lRNG
leXl
lCX2
1m
1
2
3
4
5
6
FH, FN PACKAGES
nc
11 nc
12 GND
2FC
lFC
13 2Y
14 2EN
lRNG
15 2CXl
lCXl
16 nc
nc
lCX2
17 2CX2
frn
18 2RNG
lY
19
CSC
GND
20 VCC
10
....,
(.)
,:::S
"C
...o
a..
CSC
vcc
OSCGND
TEXAS
INSTRUMENTS
3-153
PRODUCT GUIDE
630, 631
pin lISSignmenti
16-BIT PARALLEL ERROR
JO. N PACKAGES
DETECTION AND CORREC

TION CIRCUITS
DEF
DBO
OB1
3
4
Fast processing timll$:

- Write cycle: generates check
word in 45 ns typical
- Read cycle: flags errors in
27 ns typical
17
OB14
OB2
18
OB15
DB3
OB4
OB5
OB6
OB7
19
20
21
22
CBS
CB4
0
1
OBB
OB9
2
3
4
Detects and flags dualbit

errors
DB12
DB13
6
7
8
9
Detects and corrects single

bit error
15
16
23
24
25
0810 26
OB11 27
GNO 2B
CB3
CB2
CB1
CBO
SO
51
SEF
VCC
2
3
4
5
6
7
8
9
10
11
12
13
14
FH. FN PACKAGES
OEF
15 DB12
16
17
OBI3
OB14
OB2
18
OB15
OB3
OB4
OB5
OB6
19
20
21
22
CBS
CB4
CB3
C82
23
24
C81
CBO
25
26
OB11 27
SO
51
SEF
GNO
VCC
OBO
OB1
OB7
088
OB9
OB10
typical performance
SN54LS630 (JD.FH)
SN54LS631 (JD.FH)
SN74LS630 (JD.N.FNI
SN74LS631 (JD.N.FNI
II..
so-----.-t
5 1 - - - - -.....
."
C.
&:
(')
,....
CHECK BIT 110

CBOTHRU C85
12
SEF
OEF
12
DATA BIT I/O

OBO THRU OB15
3-154
TEXAS
INSTRUMENlS
28
PRODUCT GUIDE
632. 633
logic diagram (positive logic)

DETECTION AND CORRECTION CIRCUITS
Detects and Corrects Singlebit errors
Detects and Flags dual-bit

errors
Fast processing times
Byte-Write capability
DECOOER
x/v
01--------------1
so
Sl
typical performance
OECB-----d
SN54ALS632 (JD)
SN54ALS633 (JD)
SN74ALS632 (JD)
SN74ALS633 (JD)
OBO.OB7 . . .- - - . - - - - - . ! : . . - - - - 1
OB8DB15 . . .-_-I--~,,<_-__l
pin assignments
DB160B23-...---1IM+----.!:..----1
JD PACKAGE
CB3
LEOBO 27
MERR 28
1
3
ERR
29
C81
080
30
CBO
OBI
31
OB16
OB2
32
OB17
OB3
33
OB18
oB4
34
OB19
9
10
oB5
OEBO
35
36
OB20
OB21
11
OB6
37
OEB2
12
oB7
38
OB22
13
GNO
39
oB23
14
oB8
40
GNo
15
089
41
oB24
16
OEBI
42
oB25
17
oBl0
OBll
43
44
OEB3
18
19
0812
45
oB27
20
0813
46
oB28
8 8 8
6EBO -H-++dEN
OEBI
-4-l-f--d
om -+-J--d
OEB3 - + - - - - d
iToiiO _ _ _ _ _ _ _ _ _---l
Ell
...
oB26
21
0814
47
0829
22
0815
48
oB30
23
C86
49
0831
24
CB5
50
SO
25
26
C84
51
52
51
illCs
DB240B31"'Hf-++--!'~---1
C82
CJ
:::::J
"'C
0..
VCC
TEXAS
INSTRUMENTS
3-155
PRODUCT GUIDE
634, 635
logic diagram (positive logic)

DECODER

DETECTION AND CORRECTION CIRCUITS
XIY
01--------------1
SYNDROME
GENERATOR
-I
Detects and Corrects singlebit errors
Detects and Flags dual-bit

errors
Fast processing times
SO
SI
typical performance
CB6
SN54ALS634 (JD)
SN54ALS635 (JD)
SN74ALS634 (JD)
SN74ALS635 (JD)
pin assignments
JD PACKA.GES
25
MERR
ERR
26
CB2
OBO
27
CBl
OBI
2B
CBO
OB16
CB3
OB2
29
OB3
30
OB17
OB4
31
OB18
OB5
32
OB19
OEOB
33
OB20
10
OB6
34
OB21
11
OB7
35
OB22
12
GNO
36
OB23
13
OBB
37
GNO
14
OB9
3B
OB24
15
OB10
39
OB25
16
OBll
40
OB26
c
(")
17
OB12
41
OB27
lB
19
OB13
OB14
42
43
OB28
OB29
20
OB15
44
OB30
21
CB6
45
OB31
22
CB5
48
SO
23
CB4
47
51
24
OECB
48
VCC
II
.,
."
Co
.....

3-156
TEXAS
INSTRUMENTS
PRODUCT GUIDE
pin assignments
636, 637
J. N PACKAGES

DETECTION AND CORREC-
DEF
11
TION CIRCUITS
DBO
12
nc
DBl
13
CB3
DB2
14
CB2
DB3
15
CBl
Fast processing times:

-
Write cycle: generates check

word in 45.ns typical
DB4
16
CBO
DB5
17
50
DB6
18
51
DB7
19
5EF
10
GND
20
VCC
Read cycle: flags errors in

27 ns typical
Detects and corrects single bit

error
Detects and flags dual-bit errors
CB4
typical performance

.....
..
SO
51
FUNCTION
SELECTOR
I~
so
5051
5051
.-
..
5,
LATCH
4~ C
CHECK BIT I/O

CBO THRU CB4
II
PARITY
GENERATOR
Q)
:2
....v10
BUFFER
OE
L
..
....
10, ..
8,
CJ
ERROR
DETECTOR
r---+
SEF
DEF
::l
-C
....
81'
I
, 10
ERROR
CORRECTOR
,
~
ERROR
DECODER
OE
~
TEXAS
INSTRUMENTS
a.
,
BUFFER
OE
5,
~
.....
.....,
....
LATCH
l+-c
DATA BIT I/O
DBO THRU DB7
(!)
~Ir
.......
:::J
3-157
PRODUCT GUIDE
logic symbol, 'A LS638A, 'AS638, 'LS638 t
638, 639
pin assignments
G (191
"A" bus outputs are opencollector; "B" bus outputs
DIR
1
2
3
A1
B1
A2
B2
6
7
A3
B3
are three-state
'ALS638, 'LS638 - inverting logic
'ALS639, 'LS639 - true logic
S
9
10
typical performance
TYPE
III
DELAY
""'l
B5
FH. FN PACKAGES
11
B8
SOURCE
SINK
A1
12
B7
CURRENT
CURRENT
A2
13
B6
A3
14
B5
A4
15
B4
B7
AS
16
B3
B2
B8
A6
DIA
-12mA
12 mA
SN74ALS638A
5 ns
-15mA
24 mA
SN74A LS638A-1
5 ns
-15mA
48mA
A6
17
A7
18
B1
AS
19
GND
20
VCC
SN54ALS639A
6 ns
-12mA
12mA
SN74ALS639A
6 ns
-15mA
24 mA
SN74ALS639A-1
6 ns
-15mA
48mA
SN54AS638
4 ns
-12mA
48mA
SN74AS638
4 ns
-15mA
64 mA
SN54AS639
5 ns
-12mA
48 mA
SN74AS639
5 ns
-15mA
64mA
SN54LS638
11 ns
-12mA
12mA
SN74LS638
11 ns
-15mA
24mA
SN54LS639
13.5 ns
-12mA
12mA
SN74LS639
13.5 ns
-15mA
24 mA
(')
SN54AS638
SN54AS639
SN54LS638
SN54LS639
(J,FH)
(J,FH)
(J,FH)
(J,FH)
SN74ALS638A (N,FNI
SN74ALS639A (N,FN)
SN74AS638 (N,FN)
SN74AS639 (N,FN)
SN74LS638 (J,N,FN)
SN74LS639 (J,N,FN)
A7
A8
10
logic symbol, 'ALS639A, 'AS639, 'LS639t
G (191
DIR (11
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
3-158
B6
5 ns
SN54ALS639A (J,FH)
r+
A5
MAX
SN54ALS638A
SN54ALS638A (J,FH)
Co
C
B4
MAX
""C
A4
J. N PACKAGES
DIA
11
B8
A1
12
B7
A2
13 B6
A3
14 B5
A4
15 B4
A5
16 B3
A6
17
B2
A7
18 B1
AS
19 G
GND 20 vCC
TEXAS
INSTRUMENTS
PRODUCT GUIDE
640, 641, 642

643, 644, 645
pin assignments
1
2
3
4
5

MAX
TYPE
SN54A LS640A
OUTPUT
DELAY
MAX
SOURCE
SINK
CURRENT
CURRENT
12mA
3-State
5 ns
-12mA
SN74ALS640A
3-State
5 ns
-15mA
24mA
SN74ALS640A-1
3-State
5 ns
-15mA
48 mA
SN54ALS641A
O-C
15 ns
N/A
12 mA
SN74ALS641A
G-C
15 ns
N/A
24mA
48 mA
SN74ALS641 A-1
G-C
15 ns
N/A
SN74ALS642A
G-C
20 ns
N/A
SN54ALS642A
G-C
20 ns
N/A
24mA
SN74ALS642A-1
G-C
20 ns
N/A
48mA
3-State
5 ns
-12mA
12 mA
SN74ALS643A
3-State
5 ns
- 15 mA
24 mA
SN74ALS643A-1
3-State
5 ns
-15mA
48mA
SN54ALS644A
G-C
20 ns
N/A
12mA
SN74ALS644A
G-C
20 ns
N/A
24mA
SN74ALS644A-1
G-C
20 ns
N/A
48 mA
SN54A LS645A
3-State
6 ns
-12mA
12mA
SN74A LS645A
3-State
6 ns
- 15 mA
24 mA
SN74ALS645A-1
3-State
6 ns
-15 mA
48mA
SN54AS640
3-State
4 ns
-12mA
48 mA
SN74AS640
3-State
4 ns
-15mA
64 mA
SN54AS641
G-C
20 ns
N/A
48 mA
SN74AS641 .
G-C
20 ns
N/A
64mA
SN54AS642
G-C
20 ns
N/A
48 rnA
SN74AS542
G-C
20 ns
N/A
64 rnA
SN54AS643
3-State
4 ns
- 12 rnA
48 rnA
SN74AS643
3-State
4 ns
-15rnA
64 rnA
SN54AS644
G-C
20 ns
N/A
48 rnA
SN74AS644
G-C
20 ns
N/A
64 mA
SN54AS645
3-State
5 ns
-12mA
48 rnA
SN74AS645
3-State
5 ns
- 12 mA
64 rnA
SN54LS640
3-State
7 ns
-12mA
12mA
SN74LS640
3-State
7 ns
-15mA
24mA
SN 74 LS640-1
3-State
7 ns
-15mA
48 mA
SN54LS641
G-C
16.5 ns
N/A
12 rnA
SN74LS641
G-C
16.5 ns
N/A
24mA
SN74LS641-1
G-C
16.5 ns
N/A
48 rnA
SN54LS642
G-C
16.5 ns
N/A
12rnA
SN74LS642
O-C
16.5 ns
N/A
24 rnA
48mA
G-C
16.5 ns
N/A
SN54LS643
3-State
8.5 ns
- 12 mA
12mA
SN74LS643
3-State
8.5 ns
-15mA
24 rnA
SN74LS643-1
48 rnA
3-State
8.5 ns
-15mA
SN54LS644
G-C
16.5 ns
N/A
12mA
SN74LS644
G-C
16.5 ns
N/A
24 rnA
48 rnA
SN74LS644-1
8
9
10
1
2
3
4
5
6
7
8
9
10
FH, FN PACKAGES
11
B8
DIR
A1
A2
A3
A4
12
13
14
15
B7
B6
B5
B4
A5
A6
A7
16
17
18
19
B3
B2
B1
IT
20
Vee
A8
GND
12mA
SN54ALS643A
SN74LS642-1
6
7
J, N PACKAGES
BB
DIR
11
A1
12 B7
13 B6
A2
A3
14 B5
A4
15 B4
A5
16 B3
A6
17 B2
A7
18 B1
A8
19 G
GND 20 VCC
G-C
16.5 ns
N/A
SN54LS645
3-State
9.5 ns
-12mA
12 mA
SN74LS645
3-State
9.5 ns
-15 mA
24 rnA
SN74LS645-1
3-State
9.5 ns
-15mA
48 rnA
SN54ALS640A (J,FHI
SN54ALS641A (J,FHI
SN54ALS642A (J,FHI
SN54ALS643A (J,FHI
SN54ALS644A (J,FHI
SN54ALS645A (J,FHI
SN54AS640 (J, F H I
SN54AS641 (J,FHI
SN54AS642 (J,FHI
SN54AS643 (J,FHI
SN54AS644 (J,FHI
SN54AS645 (J,FHI
SN54LS640 (J,FHI
SN54LS641 (J,FHI
SN54LS642 (J,FHI
SN54LS643 (J,FHI
SN54LS644 (J,FHI
SN54LS645 (J,FHI
TEXAS
INSTRUMENTS
SN74ALS640A (N,FNI
SN74ALS641A (N,FNI
SN74ALS642A (N,FNI
SN74ALS643A (N,FNI
SN74ALS644A (N,FNI
SN74ASL645A (N,FNI
SN74AS640 (N,FNI
SN74AS641 (N,FNI
SN74AS642 (N,FNI
SN74AS643 (N,FNI
SN74AS644 (N,FNI
SN74AS645 (N,FNI
SN74LS640 (J,N,FNI
SN74LS641 (J,N,FNI
SN74LS642 (J,N,FNI
SN74LS643 (J,N,FNI
SN74LS644 (J,N,FNI
SN74LS645 (J,N,FNI
SN74LS640-1
SN74LS641-1
SN74LS642-1
SN74LS643-1
SN74LS644-1
SN74LS645-1
(J,N,FNI
(J,N,FNI
(J,N,FNI
(J,N,FNI
(J,N,FNI
(J,N,FNI
3-159
PRODUCT GUIDE
640. 641, 642

643. 644. 645
continued
logic symbol, 'ALS640A, 'AS640, 'LS640 t

DIR
Bl
Bl
Al
Bl
B2
B2
A2
B2
B3
B3
A3
B4
B4
B5
B5
"'C
0
~
B6
B6
A6
B6
B7
A7
B7
B8
B8
AS
BS
Al
Bl
Al
Bl
Al
Bl
A2
B2
A2
B2
A2
B2
B3
A3
B3
DIR
B4
B4
B4
B5
AS
B5
AS
B5
A6
B6
A6
B6
A6
B6
A7
B7
A7
B7
A7
B7
B8
A8
B8
A8
B8
AS
A8
3-160
DIR
B3
c:
CD
85
DIR
a.
C
n
.....
G)
C
AS
B7
II
B3
B4
'TEXAS
INSTRUMENTS
PRODUCT GUIDE
646, 647, 648, 649
pin assignments
OCTAL BUS TRANSCEIVERS AND REGISTERS
JT. NT PACKAGES
1
Bidirectional
Independent registers for A
and B busses
DELAY
MAX
MAX
SOURCE
SINK
CURRENT
CURRENT
OUTPUT
TYPE
INV
SN54ALS646
-12mA
12mA
3-State
No
SN74ALS646
-15 mA
24 mA
3-State
No
SN74ALS646-1
-15mA
48 mA
3-State
No
SN54ALS647
N/A
12mA
O-C
No
SN74ALS647
N/A
24 mA
O-C
No
SN74ALS647-1
N/A
48mA
O-C
No
SN54ALS648
-12mA
12mA
3-State
Yes
SN74ALS648
-15mA
24mA
3-State
Yes
SN74ALS648-1
-15mA
48 mA
3-State
Yes
SN54ALS649
N/A
12mA
O-C
Yes
SN74ALS649
N/A
24mA
O-C
Yes
N/A
SN74ALS649-1
48mA
O-C
Yes
SN54AS646
-12mA
48 mA
3-State
No
SN74AS646
-15mA
64mA
3-State
No
SN54AS648
-12mA
48mA
3-State
Yes
SN74AS648
-15mA
64mA
3-State
Yes
19 ns
-12mA
12mA
3-State
No
SN74LS646
19 ns
-15mA
SN74LS647
25 ns
SN54LS646
24mA
3-State
No
N/A
12mA
O-C
No
N/A
SN74LS647
25 ns
24mA
O-C
No
SN54LS648
20.5 ns
-12mA
12mA
3-State
Yes
SN74LS648
20.5 ns
-15mA
24mA
3-State
Yes
SN54LS649
25 ns
N/A
12mA
O-C
Yes
SN74LS649
25 ns
N/A
24mA
O-C
Yes
SN54ALS646 (JT,FH)
SN54ALS647 (JT,FH)
SN54ALS648 (JT,FH)
SN54ALS649 (JT,FH)
SN54AS646
SN54AS648
SN54LS64G
SN54LS647
SN54LS648
SN54LS649
(JT,FH)
(JT,FH)
(JT,FH)
(JT,FH)
(JT,FH)
(JT,FH)
13
B8
FH. FN PACKAGES
1
nc
15
nc
SAB
14
B7
CAB
16
B8
3
4
DIR
15
B6
SAB
17
67
18
66
A1
16
B5
A2
17
B4
A1
19
B5
A3
18
B3
A2
20
A4
19
B2
6
7
A3
21
64
B3
A5
20
B1
nC
22
nc
9
10
A6
21
A4
23
62
A7
22
SBA
10
A5
24
B1
CBA
11
A6
25
VCC
12
A7
26
13
A8
27
SBA
CBA
14
GND
28
VCC
typical performance
TYPE
CAB
11
AS
23
12
GND
24
DIR
SN74ALS646 (NT,FN)
SN74ALS646-1 (NT,FN)
SN74ALS647 (NT,FN)
SN74ALS648 (NT,FN)
SN74ALS649 (NT,FN)
SN74AS646 (NT,FN)
SN74AS648 (NT,FN)
SN74LS646 (JT,NT,FN)
TEXAS
INSTRUMENTS
3-161
PRODUCT GUIDE
646, 647, 648, 649
continued
logic symbol, 'ALS646, 'AS646, 'LS646 t
~~~-t--------------~~~(1~61 B5
~~~~--------------i-~~(1~6~1 85
~~~-t--------------~~~(1~51 B6
,,-,~~----------~-+~4(15.1 86
~~~-t--------------~~~(1~41 B7
III
G (211
"tJ
S8A (221
G3
3 ENl IBAI
3 EN2 IABI
C4
GS
CAB (11
SA8 121
G7
DIR (31
a.
c:
(")
C8A (231
r+
C)
C6
141
c:
Al
c:CD
151
1191
161
1181
(71
1171
181
(161
191
1151
1101
1141
(111
1131
A2
B2
A3
B3
84
A4
~~~~--------------i-~~(1~61 B5
~~~~______________~~~(1~51 B6
~~~~______________~~~(1~41 B7
~~~~______________~~~(1~31 B8
AS
B5
A6
86
A7
B7
A8
tPin numbers shown on logic symbols are for JT and NT packages only.
3-162
TEXAS
INSTRUMENTS
88
PRODUCT GUIDE
651, 652
pin assignments
JT _NT PACKAGES
AND REGISTERS
Bidirectional
Independent registers for A and B
busses
typical performance
TVPE
MAX
MAX
SOURCE
SINK
INV
CURRENT
CURRENT
SN54ALS651
-12mA
12mA
3-State
A.S
Ves
SN74ALS651
-15 mA
24mA
3-State
Ves
SN74ALS651-1
-15mA
48 mA
3-State
Ves
SN54ALS652
-12mA
12mA
3-State
No
SN74ALS652
-15mA
24 mA
3-State
No
SN74A LS652-1
-15mA
48 mA
3-State
No
SN54AS651
-12mA
48 mA
3-State
Ves
SN74AS651
-15mA
64mA
3-State
Ves
SN54AS652
-12mA
48mA
3-State
No
SN74AS652
-15mA
64mA
3-State
No
-12mA
12mA
3-State
SN74LS651
-15mA
24mA
3-State
Ves
SN54LS652
-12mA
12mA
3-State
No
SN74LS652
-15mA
24mA
3-State
No
B8
B7
B6
B5
5
6
7
A2
A3
A4
A5
17
18
19
B4
B3
82
B1
11
A2
12
A4
AS
A6
B5
3
4
B6
5
6
7
A7
B
9
10
11
Ves
SN54LS651
CAB 13
SAB '14
GAB 15
16
A1
8
9
10
OUTPUT
TVPE
1
2
3
4
12
13
14
SN54ALS651 (JT,FH)
SN54ALS652 (JT,FH)
SN54AS651
SN54AS652
SN54LS651
SN54LS652
(JT,FH)
(JT,FH)
(JT,FH)
(JT,FH)
SN74ALS651 (NT,FN)
SN74ALS652 (NT,FN)
SN74AS651 (NT,FN)
SN74AS652 (NT,FN)
A6
A7
20
21
22
AB
GND
23
24
GBA
SBA
CBA
VCC
FH. FN PACKAGES
nc
15 nc
CAB 16 B8
SAB
GAB
Al
A2
A3
17
18
B7
B6
19
20
B5
B4
21
22
B3
nc
A4
A5
23
24
B2
Bl
A6
A7
AB
GND
25
GBA
26
27
2B
SBA
CBA
nc
VCC
logic symbol, 'ALS652, 'AS652, 'LS652t
II
Bl
A1
A2
_r--------t
A4~....
B5
A6
B6
A7
B7
AS
B8
TEXAS
INSTRUMENTS
3-163
PRODUCT GUIDE
653, 654
Independent registers for A and B
GBAE.!L.....!:::.. ENllBAI
GABE.L- EN21ABI
CBA 1231
C4
SBA.iUL- G5
CAB 111
C6
busses
SAB.ill.- of7
..
AND REGISTERS
Bidirectional
TYPE
SN54ALS653
SN74ALS653
SN74ALS653-1
SN54ALS654
SN74ALS654
SN74ALS654-1
SN54LS653
SN74LS653
SN54LS654
SN74LS654
MAX
MAX
OUTPUT
TYPE
SOURCE
SINK
CURRENT CURRENT
A
B
-12 rnA
O-C 3-State
12 rnA
-15 rnA
24 rnA O-C 3-State
O-C 3-State
-15 rnA
48 rnA
O-C 3-State
-12 rnA
12 rnA
24 rnA
O-C 3-State
-15 rnA
O-C 3-State
-15 rnA
48 rnA
O-C 3-State
-12 rnA
12 rnA
O-C 3-State
-15 rnA
24 rnA
O-C 3-State
-12 rnA
12 rnA
O-C 3-State
-15 rnA
24 rnA
SN54ALS653 (JT,FH)
SN54ALS654 (JT,FH)
II
SN54LS653 (JT,FH)
SN54LS654 (JT,FH)
'~ Ql ,," ,5
151
~
1
'1
Al
typical performance
INV
A, B
Yes
Yes
Yes
No
No
No
Yes
Yes
No
No
A2
161
l'
uBI
2\J
1191
O-::B2
1181
A3~
O-::B3
1171
A4~
O-::B4
181
tr.:
A5~
B5
1151
191
~B6
A6~
1101
~B7
A7~
1111
1131
A8~
SN74ALS653 (NT,FN)
SN74ALS654 (NT,FN)
SN74LS653 (JT.NT,FN)
1201
40
1
;;'1t>
~B8
JT. NT PACKAGES
1 CAB 13 BB
2 SAB 14 B7
3 GAB 15 B6
4 Al
16 B5
5 A2
17 B4
6 A3
lB B3
7 A4
19 B2
8 A5
20 Bl
9 A6
~BA
21
10 A7
22 SBA
11 A8
23 CBA
12 GNO 24 VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
11
12
13
14
nc
CAB
SAB
GAB
Al
A2
A3
nc
A4
AS
A6
A7
A8
GNO
GBA~ ENllBAI
GAB.llL- EN21ABI
C8A 1231
C4
SBA.iUL- G6
CAB 111
C6
..,
."
SAB.ill.- ~7
"~
c.
c:
(')
,...
151
r
;;'1<J
5
7
60
1
'1
A2-:---L
161
A3:-t
171
A47,L
181
A5~
1
;;'1t>
2\J
1201
U"
1191
b::
B2
1181
O::B3
1171
B4
.
116)
b::
B5
L-
--=...l 1151
........... B6
--=--.I 1141
A7~
~B7
191
A6
1101
1111
A8~
t Pin numbers shown on logic symbols are for JT and NT packages only.
3-164
40
Ql
TEXAS
INSTRUMENTS
1131
~B8
15
16
17
18
19
20
21
22
23
24
25
26
27
28
nc
B8
B7
B6
B5
B4
B3
nc
B2
Bl
GBA
SBA
CBA
VCC
PRODUCT GUIDE
668, 669
logic symbol, 'LS66S t
pin assignments
SYNCHRONOUS 4-BIT UP/
J. N PACKAGES
DOWN COUNTERS
Programmable, look-'lhead
Decade counter ('LS668)
Binary counter ('LS669)
UID
ClK
mAD
FH. FN PACKAGES
1
11
typical performance
TYPE
COUNT PARALLEL TOTAL

LOAD
POWER
'LS668 32 MHz
Sync
100mW
'LS669 32 MHz
Sync
100mW
SN54LS668 (J,FH)
SN54LS669 (J,FH)
SN74LS668 (J,N,FNl
SN74LS669 (J,N,FN)
FREQ
670
logic symbol t
pin assignments
4-BY-4 REGISTER FILES
J. N PACKAGES
1
02
02
FH. FN PACKAGES
1
nc
11
nc
3-state outputs
03
10
01
02
12
02
Simultaneous read/write
04
11
"G"A
03
13
01
Expandable to 1024 words
AB
12
GW
04
14
GA
13
WB
14
03
15
WA
01
AB
nc
15
AA
04
GNO
16
VCC
16
"G"W
nc
17
WB
AA
04
1B
01
03
19
WA
01
02
03
04
10
GND
20
VCC
typical performance
SN54LS670 (J,FH)
SN74LS670 IJ,N,FN)
.....
(.)
::::s
..
"C
a..
nc -
TEXAS
INSTRUMENTS
3-165
PRODUCT GUIDE
671, 672
4BIT UNIVERSAL SHIFT

REGISTERS/LATCHES WITH
THREE-STATE OUTPUTS
G (121
Ris (111
pin assignments
MUX
1,24/2,23
EN22
G21
(191
CASC
3
4
'671 has direct SR clear
'672 has synchronous SR clear
Expandable to any word length
Multiplexed outputs for shift
5
6
7
8
9
10
register or latched data
1
2
Four modes of shift register

FH. FN PACKAGES
- Inhibit clock
- Shift right
- Shift left
- Parallel load
typical performance
TYPE
SER R
11
SRCK
12
3
4
RIS
G
S1
SO
13
14
15
00
16
Oc
SER L
17
TOTAL
SRCLR
18
POWER
RCK
19
B
OA
CASC
10
GNO
20
VCC
'LS671
170mW
'LS672
170mW
logic symbol, 'LS672t
SN54LS671 (J,FH)
SN54 LS672 (J,FH)
SN74LS671 (J,N,FN)
SN74LS672 (J,N,Fi'll
G (121
RIS (111
MUX
EN22
G21
1,24/2,23
(191
CASC
RCK (91
SRG4
..,
."
0
Co
C
(")
r+
(181 aA
G)
C
(171 aB
c:
CD
C (51
0(61
SER L 171
(161 ac
3,40
2,40
3-166
J. N PACKAGES
11
RIS"
12 IT
A
13 S1
14 SO
B
15 00
C
0
16 Oc
SER L
17 OB
SRCrn 18 A
RCK
19 CASC
GNO
20 VCC
SER R
SRCK
TEXAS
INSTRUMENTS
(15)
aD
PRODUCT GUIDE
logic symbol t
673
pin assignments
SRG16
16-bit serial-in/serial-out shift

register with three-statl'
2
3
4
outputs
16-bit parallel-out storage

register
SER/a15
6
7
Converts serial to parallel

data flow
typical performance
9
10
11
12
7,3,40
(7)
11,3,40
9010Z11
12,3,40
9010Z12
SN74LS673 (J,N,FN)
(S)
(9)
(10)
(11)
(13)
(14)
(15)
(16)
(17)
(1S)
(19)
(20)
(21)
(22)
26,3,40 Z5 90 10Z26
674
YO
Performs parallel to serial

conversion
MODE
Y8
Y9
Yl0
Yll
Y12
Y13
Y14
Y15
VCC
nc
15
nc
CS
16
Y5
Y3
SH ClK
17
RIW
18
Y7
STRClR
19
ya
MODEISTRClR 20
Y4
Y5
Y6
Y9
Y6
SERi015
21
Yl0
Y7
nc
22
nc
YS
9
10
YO
Yl
23
24
Yll
11
Y2
25
Y13
Yl0
12
Y3
26
Y14
Yll
13
14
Y4
27
Y15
GND
28
VCC
Y9
Y12
Y12
Y13
Y14
Y15
pin assignments
FH, FN PACKAGES
J, N PACKAGES
~
13
P5
ClK
14
P6
15
P7
nc
16
17
MODE
SERla15 18
15
3
P8
P9
16
P5
'S
17
P6
(!)
Riw
18
19
P7
20
MODE
SER/01521
P9
P8
PO
19
PI
20
P12
P2
21
P13
po
23
Pl1
10
22
23
24
P14
10
11
PI
24
P12
P2
25
P13
12
Pl
11
P3
P4
P2
12
GND
P15
Pl0
22
P3
13
P3
P4
26
27
P14
P15
P4
14
GND
28
Vee
VCC
Q)
"'C
ClK
Pl0
Pll
SN74LS674 (J,N,FN)
Y7
Yl
Three-state outputs
typical performance
SN54LS674 (J,FH)
Y6
FH. FN PACKAGES
SRG16
(5)
Y5
Y2
logic symbol t
16-BIT SHIFT REGISTER
(23)
J. N PACKAGES
13
14
15
RIW
STRClR
16
MODEISTRClR 17
SERIO 15
18
19
YO
Yl
20
21
Y2
Y3
22
Y4
23
24
GND
CS
SH ClK
.....
(')'
~
"'C
0
lIo.
a..
P5
P6
P7
PS
P9
Pl0
Pll
P12
P13
P14
(6)
SER/al5
P15
TEXAS
INSTRUMENTS
POST Or-FICE BOX 225012 DALLAS. TEXAS 75265
3-167
PRODUCT GUIDE
677, 678
ADDRESS COMPARATORS
G~EN
'ALS677 is a 16-bit to 4-bit
PO~
comparator with enable

Pl~
comparator with latch
P2~
TYPE
I DELAY I POWER I
I 'ALS677I
I 'ALS678I
"} ":
P
P3~ 3
typical performance
Al-..!..!!.- ZI
A2~Z2
p;;, 5
A3....!!!.- Z3
A4~Z4
SN54ALS678 (JT,FH) SN74ALS678 (NT,FN)
A5-ill- Z5
A6~Z6
A7-lZL Z7
A8~Z8
A9~Z9
Al0~ Z10
All~
Zl1
A12~ Z12
A13~ Z13
A14~ Z14
.AI5~ Z15
[ADDRESS COMP[
C~
PO~
Pl~
P2~
..,
'"0
"} ":
C20
P;;' 2
P
2
P;;' 3
P3-E!L 3
Co
C
Al~
ZI
A2~
Z2
....
A3~ Z3
G')
A4~
Z4
A5~
Z5
(')
c:
CD
A6~ Z6
A7~Z7
A8~Z8
A9~Z9
Al0~ Z10
All~
ZII
A12~ Z12
A13~ Z13
A14~ Z14
A15~ Z15
A16....!!!.L Z16
3
p;;, 4
A16-.!!!!.. Z16
=1
P;;' 2
2
P;;' 3
p;;, 4
SN74ALS677 (NT,FN)
SN54ALS677 (JT, FH)
pin assignments, 'ALS677

JT, NT PACKAGES
Al
13 A12
A2
14 A13
15 A14
A3
A4
16 A15
17 A16
A5
A6
18 PO
19 PI
A7
A8
20 P2
A9
21
P3
Al0 22 Y
All
23 G"
GND 24 Vec
[ADDRESS CDMP)
&
5
P;;' 6
6
P;;' 7
7
P;' 8
8
p;;, 9
9
P;;.10
10
P;;'11
11
P;;.12
12
P;:.t3
13
P ;;'14
14
P- 15
15
-I
1
2
3
4
5
6
7
8
9
10
11
12
&[>
----:;~
r-;;f-7,f---:'l
r-:;-r-:;r-:;-
22
23
24
25
26
27
28
nc
PI
P2
P3
Y
G"
VCC
--:;-
--:;--:;--:;-
1
-1
16
r--:-;r---:;-

JT, NT PACKAGES
13 A12
Al
14 A13
A2
15 A14
A3
A4
16 A15
17 A16
A5
18 PO
A6
19 PI
A7
A8
20 P2
P3
A9
21
Al0 22 y
---;;-
1
2
3
4
5
6
7
8
9
10
11
12
--:;-
~ ~Y
--:;---;;--;;;-
---;;-
P >14 ~
14
p. 15
15,---
r--:;16
3-168
A7
A8
A9
Al0
All
GND
-I
--:;-
P;;.13
13
nc
~y
-:;-
FH. FN PACKAGES
nc
15 nc
Al
16 A12
A2
17 A13
A3
18 A14
19 A15
A4
A5
20 A16
po
A6
21
f---
P;' 5
5
P;' 6 ~
6
P;;' 7
7
p;, 8
8
P;;' 9
P;.10
10
P;;'11
11
P;.12
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TEXAS
INSTRUMENTS
All
GND
23
24
C
Vce
1
2
3
4
5
6
7
8
9
10
II
12
13
14
FH. FN PACKAGES
nc
15 nc
Al
16 A12
A2
17 A13
A3 . 18 A14
19 A15
A4
A5
20 A16
A6
PO
21
nc
22 nc
A7
23 PI
A8
24 P2
A9
25 P3
Al0 26 y
All
GND
27
28
e
VCC
PRODUCT GUIDE
679, 680
ADDRESS COMPARATORS
G 1191

comparator with enable
PO 1141
PIllS)

comparator with latch
P2
typical perfonnance
SN54ALS679 (J,FH)
SN74ALS679 (N,FN)
SN54ALS680 (J,FH)
SN74ALS680 (N,FN)
1161
'} ":
EN
-I
-I
P;> 4
4
p;;, 5
-I
p;;,
Al 111
ZI
A2 121
Z2
Al Il)
Zl
A4141
Z4
AS 151
Z5
A6 161
Z6
A7171
Z7
A8 181
191
1111
Ala,
All
A12
1121
1131
Z8
Z9
Z10
Z11
Z12
-I
P P;> 2
2
Pl 1171
A9

J, N PACKAGES
Al
11 Al0
A2
12 All
A3
13 A12
A4
14 PO
A5
15 PI
6 A6
16 P2
A7
17 P3
A8
18 Y
A9
19
10 GND 20
IADDRESS caMPI
IP assumed ""12,ll,141
&[>
-I
p;> 6
-I
6
P;;' 7
PO 1141
PI 1151
P2
Pl
1161
1171
Al 111
C20
'}
-I
p;;, 9
9
P;;.10
10
'1
P;;'11
11
-I
12
-I
p~
p~

J, N PACKAGES
(P assumed:t; 12,13,141
-I
'" ~
P P;;'
-I
-I
P;;' l
J
~
-I
Z2
4
P;;' 5
-I
AJ IJI
ZJ
A4 141
Z4
p~
-I
AS 151
Z5
-I
A6 161
Z6
6
P;;- 7
7
p~
-I
AJ 171
Z7
p~
-I
A9
Ala 1111
Al1
A12
1121 .
11JI
Z8
Al0
All
A12
PO
PI
P2
12
ZI
191
11
12
13
14
15
16
-I
A2 121
AB IBI
Al
A2
A3
A4
A5
A6
1181
[ADDRESS caMPI
1191
FH, FN PACKAGES
2
3
4
Z9
-I
Z10
-I
' P ;;.10
10
P;;'11
11
ZII
P;,12
Z12
12
4
5
6
7
10
Al
A2
A3
A4
A5
A6
A7
A8
A9
GND
11
12
13
14
15
16
17
18
19
20
Al0
All
A12
PO
Pl
P2
P3
Y
C
VCC
FH, FN PACKAGES
3
4
5
6
7
6
9
10
Al
A2
A3
A4
A5
A6
A7
A
A9
GND
11
12
13
14
15
16
17
18
19
20
Al0
All
A12
PO
Pl
P2
P3
y
II
Q)
"'C
S
..,
(!J
CJ
C
VCC
:::s
"'C
0
c..
nc -
TEXAS
INSTRUMENTS
3-169
PRODUCT GUIDE
logic symbol t
681
(18)
4BIT PARALLEL
ASO
BINARY
AS1
(16)
AS2
(15)
M
(6)
Cn
(4)
RSO
(3)
RS1
RS2' (2)
(1)
ClK
ACCUMULATORS
Contains two synchronous

registers
B register frequency
= 20
MHz
Arithmetic operations include

B minus A and A minus B
(17)
pin assignments
}~[ALU[
(0 .. 7) CP
(0: .. 7) CG
(0 ... 7) CO
(9)
(7)
(8)
11'
G
Cn+4
CI
5
6
B
9
27
C28
10
23+/25+[abc,arithmetic]
typical performance
REG4
30,27,280
1/00
SN54LS681 (J,FH)
SN74LS681 (J,N,FN)
2
3
4
O}EN !.Q
22+/24+[abcd,logical]
Busdriving I/O ports
SRG4
Rl/lO
1/01
(24/25)280
1/02
31 (20/21 )280
32(20/21)280
1/03
lllRO
[d]
22,280
0[8]
33(20/21 )280
..,""CJ
a.
cC')
....
C)
5.
a.
(l)
3-170
TEXAS
INSTRUMENTS
FH. FN PACKAGES
1/03
ClK
11
AS2
12
1/02
3
4
ASl
ASO
13
14
1/00
ll/RO 15
Cn
16
AS2
17
ASl
Cn +4 1B
19
P
GNO 20
ASO
9
10
30(20/21 )280
J, N PACKAGES
1/03
ClK
11
AS2
12 1/02
AS1
13 1/01
ASO
14 1/00
LIIRO 15 M
Cn
16 AS2
G
17 ASl
Cn +4 1B ASO
P
19 AlilO
GNO 20 VCC
1/01
RilLa
VCC
PRODUCT GUiDE
logic symbol, 'LS682, 'LS684 t
682, 683, 684, 685
PO
P1
P2
P3
B-BIT IDENTITY
COMPARATORS
typical performance
TYPE
TOTAL
TIME
OUTPUT
POWER
14 ns
'LS683
24 ns
'LS684
16 ns
'LS685
24 ns
3
4
5
6
7
p=o
8
9
10
J. N PACKAGES
I'>ll 11 P4
PO
12 04
00
13 P5
14 OS
P1
01
1S P6
P2
16 06
02
17 P7
18 07
P3
19 I'="n
03
GND 20 Vec
FH. H.I PACKAGES

1
I'>lI
PO
12
04
13
PS
00
P1
11
P4
14
05
01
15
P6
P2
16
06
17
02
PJ
18
07
03
19
p-;o
GND
20
Vee
10
P7
00
COMPARE
'LS682
1
2
PS
P7
on Q inputs
TYPE
t>
P4
PS
'LS682 and 'LS683 includes

20-kilohni pull-up resistor
pin assignments
COMP
(2)
01
02
03
04
05
Totem Pole 210mW

O-C
210mW
Totem Pole 200mW
SN54LS682 (J,FH)
SN54LS683 (J,FH)
SN54LS684 (J,FH)
SN54LS685 (J,FH)
O-C
os
200mW
07
SN74LS682 (J,N,FN)
SN74LS683 (J,N,FN)
SN74LS684 (J,N,FN)
SN74LS685 (J,N,FN)
logic symbol, 'LS683, 'LS68S t

COMP
t>
PO
P1
P2
P3
IT}
P4
II
PS
PS
P7
.0"7
(1)
00
01
02
03
04
05
os
07
(7)
(9)
(12)
(141
(1SI
(18)
IT}
-C
p>oO
p>o
.0"7
"3
e"
.....
(,)
:l
-C
0
a..
a..
nc -
TEXAS
INSTRUMENTS
3-171
PRODUCT GUIDE
686, 687
pin assignments
t>
3
4
Compares two a-bit words
typical performance
TYPE
COMPARE
TYPE
TOTAL
TIME
OUTPUT
POWER
'LS686
17 ns
'LS687
22 ns
220 mW
p.Q
P6
IT7
SN54LS686 (JT,FH) SN74LS686 (JT,NT,FN) P7

SN54LS687 (JT,FH) SN74LS687 (JT,NT,FN) 00
P>Q
ITO) 0
06 (18)
07 (21)
IT7
logic symbol, 'LS6a7 t

COMP
t>
(;1
(;2
lEI...
PO
P1
P2
P3
P4
""C
1P=0~
P5
P6
P7
CC
...
00
G')
(4)
(6)
01
(9)
02
(11)
03
(14)
04
(16)
0
06
(21)
07
a:CD
ITO
2P>0 ~
0
IT7
t Pin numbers shown on logic symbols are for JT and NT packages only,
3-172
Ci1
PO
00
P1
01
ITOjp
Totem-Pole 220mW
O-C
FH. FN PACKAGES
JT. NT PACKAGES
P>n 13 P4
COMP
a-BIT IDENTITY
COMPARATORS
TEXAS
INSTRUMENTS
9
10
11
12
P2
02
P3
03
GND
14
15
16
17
1a
19
20
21
22
23
24
04
P5
05
P6
06
P7
07
G2
Vcc
P>O
3
6
7
8
9
10
11
12
13
14
~1
PO
00
P1
01
nc
nc
P2
02
P3
03
GND
15
16
17
1a
19
20
21
22
23
24
25
26
27
28
P4
04
P5
05
P6
06
P7
07
G2
Vcc
PRODUCT GUIDE
688, 689
SBIT IDENTITY
COMPARATORS
o...!.!.!.....t:
po.EL-
P'.1&.-
typical performance
P2~
COMPARE
TYPE
TYPE
TIME
OUTPUT
'ALS6B8
9.5 ns
Totem-Pole
'ALS6B9 15 .. 5 ns
D-C
'LS6BB
14.5 ns
Totem-Pole
'LS6B9
23 ns
D-C
SN54ALS6BB (J,FH)
SN54ALS689 (J,FH)
SN54LS6B8 (J,FH)
SN54LS689 (J,FH)
pin assignments
COMP
TOTAL
POWER
37.5 mW
37.5 mW
200mW
200mW
SN74ALS6B8 (J,FN)
SN74ALS689 (N,FN)
SN74LS6B8 (J,N,FNl
SN74LS689 (J,N,FN)
P3.i!!lP4..!.l!L-
PS~
P6~
P7~
QO~
Q'~
Q2.l!L-.
Q3~
Q4~
(141
QS~
Q~~
Q7
[>
Gl
}
}
lP=Q
~P=Q
1
2
3
4
5
6
7
8
9
10
J. N PACKAGES
11 P4
G
PO
12 04
13 P5
00
14 05
PI
01
15 P6
16 06
P2
02
17 P7
18 07
P3
03
19 p=o
GND 20 VCC
FH. FN PACKAGES
1
2
3
4
5
6
7
8
9
10
G
PO
00
PI
01
P2
02
P3
03
GND
11
12
13
14
15
16
17
18
19
20
P4
04
P5
05
P6
06
P7
07
P-O
VCC
logic symbol, 'ALS689, 'LS689t

COMP
o...!.!.!.....t:
po.ELPl.1&.-
P2~
P3.i!!lP4.il1L-
PS~
P6~
P7~
QO~
Ql~
Q2.l!L-.
Q3~
(121
Q4---(141
QS'""--'(161
Q6~
Q7----
Gl
[>
}
}
Ell
lP=QQ
~P=Q
..,
(.)
:::::s
"'C
oa-
D.
TEXAS
INSTRUMENTS
3-173
PRODUCT GUIDE
690, 691
692, 693
pin assignments
J, N PACKAGES
1
SYNCHRONOUS COUNTERS
WITH OUTPUT REGISTERS
Multiplexed three-state
outputs
4-bit cou nters/registers
'LS690, 'LS692: Decade
(19)
RCO
12
13
LOAD
14
ENT
15
DO
16
DC
ENP
17
DB
RCLR
lB
RCK
19
DA
RCO
10
GND
20
VCC
FH, FN PACKAGES
'LS691, 'LS693: Binary

counters
typical performance
MAX
TYPE
CLEAR
CLOCK
FREQ
lEI...
TOTAL
Direct
20 MHz
237 mW
'LS691
Direct
20 MHz
237 mW
'LS692
Sync-L
20 MHz
237 mW
'LS693
Sync-L
20 MHz
237 mW
(J,FHI
(J,FHI
(J,FHI
(J,FHI
(18)
0A
(17)
0B
(16)
(15)
SN74LS690
SN74LS691
SN74LS692
SN74LS693
CCLR 11
RIC
CCK
12
LOAD
13
14
15
0c
Do
16
DC
00
ENP
17
DB
RCLR
18
RCK
19
DA
RCO
10
GND
20
VCC
POWER
'LS690
SN54LS690
SN54LS691
SN54LS692
SN54LS693
counters
RIC
CCK
A
CCLR 11
2
3
ENT
(J,N,FNI
(J,N,FNI
(J,N,FNI
(J,N,FNI
CCK
-c
c.
08
r+
o
c:
C')
(15)
[8]
CCK
CCK
A
B
C
A
B
A
B
c
00
3-174
Oc
00
TEXAS
INSTRUMENTS
A
B
c
00
PRODUCT GUIDE
696, 697, 698, 699
pin assignments
J. N PACKAGES
FH. FN PACKAGES
SYNCHRONOUS UP/DOWN
UIO
11
RI~
UIO
CCK
12
eCK
12
COUNTERS WITH OUTPUT
13
~
LOAD
13
mAD
REGISTERS, MULTIPLEXED
14
ENT
11
14
RIC
ENT
THREE-STATE OUTPUTS
15
aD
15
aD
16
Oc
16
ae
4-bit counters/registers
7
8
ENP
7
8
17
ENP
eCLR 18
'LS696, 'LS698: Decade
RCK
19
aB
OA
RCO
10
GNO
20
VCC
counters
17
CCLR 18
RCK
19
aB
aA
~
GNO
20
Vce
'LS697, 'LS699: Binary

counters
typical performance
MAX
TYPE
CLOCK CLEAR
FREQ
TOTAL
POWER
'LS696 20 MHz Async-L 237mW

'LS697 20 MHz Async-L 237mW
'LS698 20 MHz
Sync-L
237mW
'LS699 20 MHz
Sync-L
237mW
SN54LS696 (J,FHI
SN54LS697 (J,FHI
SN54LS698 (J,FHI
SN54LS699 (J,FHI
SN74LS696
SN74LS697
SN74LS698
SN74LS699
(J,N,FNI
(J,N,FNI
(J,N,FNI
(J,N,FNI
II
.....
(.)
::s
"'C
...o
0..
TEXAS
INSTRUMENTS
POST OFFiCe BOX 225012 DALLAS. TeXAS 75265
3-175
PRODUCT GUIDE
696, 697, 698, 699
continued
'G.!.lli..I:::..
R/C.1.!ll.-
'G.!.lli..I:::..
MUX
EN24
R/C.1.!ll.-
G21
CTRDIV16
CTRDIV10
CCLR.l!L...- 7RB
CCLR.!!.L- 7RB
uio~
LOAD
--i~
M1 (LOAD)
M2 (COUNT)
ENi.ill!.l::::.. G5
3,SCT-9
Z22
ENP.1Z.l.J:::::lII 06
4,SCT-O
V23
22,23
~RCO
..,
."
o
c.
c
A..ill.- 1,70
(1).
B..lli-
(2)
r-
r-
ENP~
8~21J?', ~QA
8 2124\7
~QB
~Qc
~QD
(4)
(B)
B..ill-
(2)
C~
(4)
D...12L
(8)
lAl 121
[>
SN54AS756 (J,FH)
EN
2Al.!!l!-
[>
2A2~
~Oc
757
1(; III
1Y4
O~2Vl
F=>---lli-
2V2
~2V3
~2V4
[>
~1Y2
~
2G
119)
1Y3
~1Y4
lA4~
2Al
2A2
EN
111)
113)
1
2
3
4
5
6
7
8
9
10
H,
lAl
2V4
lA2
2Y3
lA3
2Y2
lA4
2Yl
GNO
11
12
13
14
15
16
11
18
19
20
2Al
lV4
2A2
lY3
2A3
lV2
2A4
lYl
2G
VCC
J, N PACKAGES
Q~1Yl
lA3~
SN74AS757 (N,FN)
-rrrn
RCK
GND
RIC
G
LOAD
ENT
aD
ac
aB
aA
RCa
VCC
FH, FN PACKAGES
RIC
1 U/D
11
2 CCK 12 G
13 mAli
3 A
4 B
14 ENT
15 aD
5 C
6 D
16 ac
7 ENP
17 aB
18 aA
B
9 RCK 19 RCa
10 GND 20 VCC
em
.FH, FN PACKAGES
11
2Al
1 lG'
12 lV4
2 lAl
3 2Y4 13 2A2
4 lA2 14 lY3
5 2Y3 15 2A3
lA3 16 lY2
6
17 2A4
7 2Y2
lA4 18 lYl
8
19 2G
9 2Yl
10 GNO 20 VCC
pin assignments
EN
lAl~
lA2~
Open collector version

of 'AS241
SN54AS757 (J,FH)
1Y 3
logic symbolt
OCTAL BUFFERS/LINE
(WITH OPENCOLLECTOR OUTPUTS)
B
C
D
ENP
11
12
13
14
15
16
17
18
19
20
~QD
~1Y2
2A3~
2A4~
~QA
J, N PACKAGES
SN74AS756 (N,FN)
r
(171 Q
pJ..!.!!.
2G 1191
r-
~B
O~lVl
lA3 161
lA4 181
Open collector version

of 'AS240
J
[>
115)
2A3
1171
2A4
19)
2Yl
171
2V2
15)
2V3
13)
2V4
3-176
22,23
U/D
CCK
A
pin assignments
EN
lA2 141
~RCO
21
8---=::rl
[>
8 2124\7
(1)
lG III
.....
c:
CD
r-
A..l1L- 1,70
logic symbolt
OCTAL BUFFERS/LINE
(WITH OPENCOLLECTOR OUTPUTS)
Z22
4,SCT-O !-V23
06
' - - ~ 2,4,5,6-
(')
3,5CT;'15
ENf.ill!.r:::::a 05
........ I> 2,3,5,6+
756
lEI
M3 (UP)
M4 (DOWN)
t> 2,3,5,6+
' - - ~ 2,4,5,6-
~...12L
M2 (COUNT)
CCK-+- ~C7
CCK.Ea.-- t>C7
c...i2l-
M1 (LOAD)
Uii5~
M3 (UP)
M4 (DOWN)
J, N PACKAGES
1
2
3
4
5
6
7
B
9
10
G21
RCK~ >C11
RCK~ t>C11
--)~
LOAD
pin assignments
MUX
EN24
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
9
10
10'
lAl
2Y4
lA2
2Y3
lA3
2Y2
lA4
2Yl
GNO
11
12
13
14
15
16
17
18
19
20
2Al
lY4
2A2
lY3
2A3
lY2
2A4
lVl
2G
VCC
FH, FN PACKAGES
11
2Al
1 nr
12 lV4
2 lAl
13
2A2
3 2Y4
4 lA2 14 lV3
15 2A3
5 2Y3
lA3 16 lV2
6
17 2A4
7 2Y2
lA4 18 lVl
8
19 2G
9 2Yl
10 GND 20 VCC
PRODUCT GUIDE
758
logic symbol t
aUADRUPLEBUS
TRANSCEIVERS
(WITH OPEN-COLLECTOR OUTPUTS)
GAB-"""'--'-""1
A2 --JI~~------1-~~B2
SN74AS758 (N,FN)
A3
~------1-~~B3
A4
~------1-~~B4
759
logic symbol t
aUADRUPLE BUS
TRANSCEIVERS
GAB
Open-collector version
of 'AS243
SN54AS759 (J,FH)
SN54AS760 (J,FH)
B4
nc
11
nc
nc
B3
GAB
12
B4
A1
10
B2
nc
13
B3
A2
11
B1
A1
14
B2
A3
12
nc
nc
15
nc
A4
13
GBA
A2
16
B1
GND 14
VCC
nc
17
nc
18
nc
A3
A4
19
GBA
GND
20
Vce
FH,FN PACKAGES
J,N PACKAGES
GBA
GAB
B4
nc
11
nc
B3
GAB
12
B4
A1
10
B2
nc
13
83
A1
B1
A2
B2
A3
B3
A3
A4
B4
10
GND
logic symbol t
of 'AS244
GAB
pin assignments
A4
OCTAL BUFFERS/LINE
10
SN74AS759 (N,FN)
760
FH,FN PACKAGES
J,N PACKAGES
GBA~~--~
of 'AS242
SN54AS758 (J,FH)
pin assignments
nc
A2
11
B1
A1
14
B2
A3
12
nc
nc
15
nc
A4
13
GBA
A2
16
B1
GND 14
Vee
nc
17
nc
18
nc
19
GBA
20
Vee
II
pin assignments
FH,FN PACKAGES
J,N PACKAGES
1G
2A1
1G
11
2A1
1G
11
1A1
12
1Y4
1A1
12
1Y4
2Y4
13
2A2
2Y4
13
2A2
1A2
14
1Y3
1A2
14
1Y3
lA1
1V1
1A2
1V2
1A3
1V3
2Y3
15
2A3
2Y3
15
2A3
1A4
1V4
1A3
16
1Y2
1A3
16
1Y2
2Y2
17
2A4
2Y2
17
2A4
1A4
18
1Y1
1A4
18
1Y1
2Y1
19
2G
2Y1
19
2G
10
GND
20
Vee
GND
20
Vee
SN74AS760 (N,FN)
2G
2A1
2V1
2A2
2V2
2A3
2V3
2A4
2V4
10
....,
(.)
:::s
-C
...o
c..
TEXAS
INSTRUMENTS
3-177
PRODUCT GUIDE
762, 763
logic symbol 'AS762 t
OCTAL BUFFERS AND LINE DRIVERS

(OPEN-COLLECTOR OUTPUTSI
Iii III
'AS762 has true and complementary outputs

'AS763 has complementary G and G inputs
'AS762 is open-collector version
of 'AS230
'AS763 is open-collector version
of 'AS231
SN74AS762 (N,FNI
SN74AS763 (N,FNI
C>
(161
lM~
2G 1191
1121
.!!.!.!-
C>
1Yl
1Y2
1Y3
1Y4
EN
2A2~
2A3~
2A4
11S1
1141
lA3l!!.-...i
2A I
SN54AS762 (J,FHI
SN54AS763 (J,FHI
EN
lAl~
lA2~
pin assignments
O~2Yl
~2Y2
~2Y3
~2Y4
..!!!!..-
J,N PACKAGES
1G
11
1
2
1A1
12
2Y4
3
13
4
14
1A2
15
2Y3
5
6
1A3
16
7
2Y2
17
1A4
18
8
2Y1
19
9
GND 20
10
2A1
1Y4
2A2
1Y3
2A3
1Y2
2A4
1Y1
2G
Vec
FH,FN PACKAGES
1 1G
11 2A1
2 1A1
12 1Y4.
3 2Y4
13 2A2
4 1A2
14 1Y3
15 2A3
5 2Y3
6 1A3
16 1Y2
7 2Y2
17 2A4
8 1A4
18 1Y1
9 2Y1
19 2G
10 GND 20 Vce
2G on 'AS763
logic symbol 'AS763 .

la 111
EN
lAl~
C>
lA2~
lA3
1M
2G
2Al
lEI.
"'a
C.
t:
2M
.!!!..(19)
1111
fIJI
11S1
1171
800
C>
O~2Yl
~2V2
~2VJ
~2Y4
pin assignments
J. N PACKAGES
TRIPLE 4-INPUT AND/NAND

1A.J.!L-
Ci)
t:
c:
CD
LOW-
HIGH-
1D~
2A~
LEVEL
LEVEL
POWER!
OUTPUT
OUTPUT
GATE
CURRENT
CURRENT
SN54AS800
40mA
-40mA
25mW
3A~
SN74AS800
48mA
-48mA
25mW
3B...l!L...-
TYPE
SN54AS800 (J,FHI
&[>
1B...!!Z.!-.
lC-1!!L-
typical performance
r+
EN
logic Iymbolt
DRIVERS
(")
~1Y2
~1Y3
~1Y4
.!!!..-
2A2
2A3
O~1Yl
SN74AS800 (N,FNI
2B-EL-
2e~
2D~
3C--1!L3D~
~lY
~1Z
~2Y
'~2Z
~3Y
~3Z
positive logic: Y"'ABCD

Z a ASci)
3-178
TEXAS
INSlRUMENTS
lA
11
3Z
2A
12
3Y
2B
13
2Y
2C
20
14
2Z
15
lZ
3A
16
IV
3B
17
lB
3C
18
lC
3D
19
10
GNO
20
Vcc
9
10
FH. FN PACKAGES
1
lA
11
3Z
2A
12
3Y
2B
13
2Y
2C
14
2Z
20
15
lZ
3A
16
IV
3B
17
lB
8
9
10
3C
18
lC
3D
19
10
GNO
20
VCC
logic symbol t
802
lA~
TRIPLE 4-INPUT ORINOR
lB--4ZL-
LINE DRIVERS
typical performance
TYPE
pin assignments
;;>1[>
LOW-
HIGH-
LEVEL
LEVEL
POWERI
OUTPUT
GATE
OUTPUT
SN54ASB02
40mA
SN74ASB02
4BmA
SN54AS802 (J,FH)
lC~
lD~
~lZ
2A....!!!2B-EL-
~2V
2C--ill.-
25mW
-4BmA
25mW
3
5
6
7
8
3B~
10
3C.....!!!.L
~3Z
3D~
SN74ASB02 (N,FN)
2
4
r-J!!!-3V
3A~
-40mA
~2Z
2D~
CURRENT CURRENT
~lV
positive logic: Y =A+B+C+D
Z = 'A+"B+C+'i5
J. N PACKAGES
11
3Z
lA
2A
12 3Y
13 2Y
28
14 2Z
2C
15
lZ
20
16
lY
3A
18
17
38
18
lC
3C
19
3D
10
GNO 20 Vce
FH. FN PACKAGES
lA
11
3Z
2A
12
3Y
28
13
2Y
14
15
2C
2D
3A
16
2Z
lZ
lY
38
17
16
3C
3D
18
19
10
GNO
20
Vee
9
10
logic symbol t
804
lA~
HEX 2-INPUT NAND DRIVERS
TYPE
2A~
LOW-
HIGH-
LEVEL
LEVEL
OUTPUT
OUTPUT
DELAY
POWERI
SN54ALS804
12mA
-12mA
3 ns
3.4 mW
SN74ALSB04
24 mA
-15mA
3 ns
3.4 mW
SN54AS804A
SN74AS804A
40mA
-40mA
2_7 ns
9mW
4BmA
-4BmA
2.7 ns
9mW
p.......J&2V
~3y
5B~
6A~
6B~
10
J. N PACKAGES
lA
11
4Y
18
12 4A
lY
13 46
14 5Y
2A
15 5A
26
2Y
16
56
3A
17 6Y
3B
18 6A
3Y
19 6B
GNO 20
Vcc
FH. FN PACKAGES
lA
11
4Y
1
2
2B~
5A...i!&-
SN74ALSB04 (N,FN)
SN74ASB04A (N,FN)
~lV
3A....!!l....-
3B~
4A~
4B~
GATE
CURRENT CURRENT
SN54ALS804 (J,FH)
SN54ASB04A (J,FH)
pin assignments
&[>
lB.E.1....-
typical performance
lC
3
4
5
6
~4Y
~5V
~6V
7
8
9
1B
12
4A
3
4
lY
4B
2A
13
14
2B
15
5A
2Y
16
5B
3A
17
6Y
3B
3Y
18
6A
19
20
6B
9
10
GNO
.....
CJ
:::s
"'C
5Y
lIo.
C.
VCC
TEXAS
INSTRUMENTS
3-179
PRODUCT GUIDE
805
pin assignments
1A
18
2A
28
3A
38
4A
48
5A
HEX 2INPUT NOR DRIVERS

typical performance
TYPE
LOW
HIGH
LEVEL
LEVEL
OUTPUT
OUTPUT
DELAY
I<:URRENT CURRENT
SN54ALSSOS
12mA
-12mA
3.S ns
SN74ALSSOS
24mA
-1SmA
3.S ns
POWERI
GATE
4.2mw
4.2mW
SNS4AS80SA
40mA
-40mA
2.7 ns
12mW
SN74AS80SA
48mA
-48mA
2.7 ns
12mW
SNS4ALS80S (J,FH)
SNS4AS80SA (J,FH)
J. N PACKAGES
1
lA
11
4Y
18
12
4A
3
4
lY
13
48
2A
14
5Y
28
15
2Y
16
58
3A
17
16
6Y
6A
38
9
10
lA
11
4Y
18
12
4A
3
4
. 5
lY
2A
13
14
positive logic: y.
A+B
48
28
15
5A
2Y
16
58
3A
17
6Y
808
logic symbol t
HEX 2INPUT AND DRIVfRS
1A
(2)
18
(4)
2A
28
c:::
c:
CD
HIGH
LEVEL
LEVEL
OUTPUT
OUTPUT
DELAY
POWERI
3A
GATE
38
4A
CURRENT CURRENT
a.
c:::
n
....
C)
111
typical performance
TYPE
SN54ALSSOS
12mA
-12mA
4.3 ns
4.5mW
48
SN74ALSSOS
24mA
-15mA
SN54ASSOBA
40mA
-40mA
4.3 ns
3.2 ns
4.SmW
13mW
13 rnW
5A
58
6A
68
SN74AS80SA
4SmA
SN54ALSSOS (J,FH)
SNS4AS80SA (J,FH)
-48mA
3.2 ns
SN74ALS808 (N,FN)
SN74AS808A (N,FN)
38
6Y
18
6A
3Y
19
68
GND
20
Vee
pin assignments
&[>
1
2
3
4
5
6
7
8
9
10
J. N PACKAGES
lA
11
4Y
18
12 4A
lY
13 48
2A
14 5Y
28
15 5A
16 58
2Y
3A
17 6Y
38
18 6A
19 68
3Y
GND 20 Vee
5Y
FH. FN PACKAGES
(19)
(17)
6Y
lA
11
4Y
lB
12
4A
lY
13
48
2A
14
5Y
28
15
5A
2Y
16
5B
3A
38
17
18
6Y
6A
9
10
3-180
68
Vee
""C
19
20
FH. FN PACKAGES
SN74ALS805 (N,FN)
SN74AS80SA (N,FN)
LOW
3Y
GND
68
10
lEI...
5A
TEXAS
INSTRUMENTS
3Y
19
68
GND
20
Vee
PRODUCT GUIDE
821
logic symbolt
10-BIT BUS INTERFACE FLIP-FLOPS

High-speed parallel registers with positive

edge-triggered Ootype flip-flops
JT. NT PACKAGES
I
OC
13
CLK
nc
15
CLK
10
14
100
oc
16
3
4
20
15
16
90
3
4
10
17
100
20
18
90
5
6
7
8
3D
40
19
20
80
70
50
40
50
nc
60
nc
30
20
9
10
60
70
21
22
23
24
10
II
80
25
30
Vee
12
13
14
90
100
26
27
20
10
GNO
28
Vce
20
SN74AS821 (NT, FN)
30
40
50
60
70
(23)
10
(22)
(4)
(6)
(21)
(20)
(19)
(7)
(18)
(5)
5
6
20
50
II
90
100
70
12
GNO
80
80
90
90
100
Inverting outputs
SN54AS822 (JT, FH)
25
SN74AS822 (NT, FN)
FH. FN PACKAGES
nc
15
nc
oe
16
17
CLK
45
16
17
80
70
50
18
60
60
19
50
6
7
75
20
4Q
9
10
80
90
21
22
30
II
105
12
GNO
23
24
20
6
7
40
50
(18)
60
(17)
70
(16)
80
(15)
90
(14) 100
(19)
90
2
3
4
30
(20)
100
823
10
logic symbolt
30
20
10
VCC
100
18
90
80
20
21
70
55
nc
22
60
nc
9
10
60
23
24
50
40
II
80
90
100
25
26
27
28
30
20
10
12
13
14
20
3D
40
JO
GNO
Vee
+J
(.)
JT. NT PACKAGES
I

Non-inverting outputs
(2)
'V
10 (3)
15
19
pin assignments
SN74AS823 (NT, FN)
50
40
CLK
(21)
35
80
SN54AS823 (JT, F H)
23
24
100
90
OC
10
20
(22)
60
75
22
70
60
CLK
13
14
15
2
3
4
(23)
15
45
55
17
18
19
20
21
JT, NT PACKAGES
60
70
80
80
nc
pin assignments
logic symbolt

50
60
3D
40
7
8
9
10
30
40
(17)
(8)
100
822
FH. FN PACKAGES
Dc
10
Non-inverti ng outputs
SN54AS821 (JT, FH)
pin assignments
20 (4)
3D (5)
(23)
(22)
(21)
(20)
40 (6)
(19)
50 (7)
(18)
60 (8)
(17)
70 (9)
(16)
(15)
~~ (10)
10
20
30
40
50
60
_()C
10
3
4
5
20
3D
40
50
60
7D
6
7
8
9
10
80
II
CLR
12
GNO
90
13
14
CLK
nc
eLKEN
15
90
16
17
80
70
60
50
3
4
DC
10
18
19
20
21
22
23
24
:s
FH. FN PACKAGES
20
3D
nc
17
18
19
CLKEN
CLK
40
40
50
nc
22
90
80
70
60
nc
30
20
9
10
60
70
23
24
50
40
10
II
80
Vce
12
90
25 30
26- 20
13
14
CLR
27
10
GNO
28
Vce
5
6
7
"'C
15
16
20
21
70
80
90
t Pin numbers shown On logic symbols are for JT and NT packages only.
TEXAS
INSTRUMENTS
...o
a..
3-181
PRODUCT GUIDE
824
OC~EN

edgetriggered Ootype flip-flops
Inverting outputs
cum;~
G1
(13)
C l K - ~ 1C2
_ (2)
.,
1~~2D
I'"
t>
2~~
3~
SN54AS824 (JT,FH)
SN74AS824 (NT,FN)
iiG:
4~~
~SO
~70
~80
S~~
7~~
8D~
logic symbolt
oc,

edgetriggered Ootype flip-flops
!!L6LJ
~
5C3~
CLR ~
--~
ClKEN
(13)
OC2
"'0
o
c.
50
SO
70
(")
80
c:
13
ClK
nc
15
nc
10
14
CII<EN
OC
16
20
15
90
10
17
ClKEN
30
16
80
20
18
90
40
17
70
3D
19
80
50
18
60
40
20
70
65
19
50
55
21
40
60
nc
ClK
70
20
nc
22
80
21
30
60
23
50
10
90
22
20
10
70
24
40
11
ern
23
10
11
80
25
30
12
GNO
24
VCC
12
90
26
20
13
CLR
27
10
14
GNO
28
VCC
pin assignments
FH. FN PACKAG ES
JT. NT PACKAGES
EN
G1
ClK -1>1C2
(3)
'-1
1D~ 20 I>
20 ~
30 ~
40 t2L-
SN54AS825 (JT,FH)
SN74AS825 (NT,FN)
CJc
rllli- 90
9[)~
~10
~20
~30
~40
r-illL 50
5~ (7)
825
FH. FN PACKAGES
JT. NT PACKAGES
1
CLR~R
pin assignments
logic symbolt
r
V
~10
~20
~30
r--iW-40
OCI
ClK
CLKEN
nc
15
nc
OC2
13
14
OCI
16
ClK
10
15
80
OC2
17
ClKEN
20
26
70
10
18
80
3D
17
60
20
19
70
40
18
50
3D
20
60
.50
nc
50
19
40
40
21
60
20
30
nc
22
70
21
20
50
23
40
10
80
10
60
24
30
ITA
22
2J
10
11
OC3
11
70
25
20
12
GNO
24
VCC
12
80
26
10
13
ClR
27
oa
14
GNO
28
VCC
~50
!Z.!...~
~
~
rl!ZL SO
~70
~80
r+
G')
c:
c:
CD
826
oc,i!LJ:,.LJ


Inverting outputs
SN54AS825 (JT,FH)
SN74AS825 (NT,FN)
pin assignments
logic symbolt
OC2
OC3
JT. NT PACKAGES
1
EN
ClKEN (13)
G1
ClK -~ 1C2
15~20
i5~
35~
45~
50
I'"
t>
.!!L..D.
s5~
75~
85~
V~10
~20
~30
(19) 40
~5Q
r-ill2 "SO
~70
~80
3-182
TEXAS
INSTRUMENTS
FH. FN PACKAGES
13
ClK
nc
15
nc
14
CII<EN
0c1
16
ClK
10
15
80
OC2
17
ClKEN
25
16
70
10
18
80
30
17
60
20
19
70
_CLR
_ ~
~R
00
0C2
40
18
50
30
20
60
50
19
40
40
21
50
60
20
30
nc
22
nc
70
21
20
50
2J
40
10
80
22
10
10
60
24
30
11
CLR
23
OC3
11
70
25
12
GNO
24
VCC
12
80
26
10
13
ClR
27
OC3
14
GNO
28
VCC
20
PRODUCT GUIDE
832
logic symbol t
HEX 2-INPUT OR DRIVERS
lA~
pin assignments
;;'1[>
~lY
1B..ill..-
2A~
typical performance
LOW
3A-l!L-
POWER!
LEVEL
LEVEL
OELAY
OUTPUT OUTPUT
GATE
CURRENT CURRENT
-12mA
4 ns
5.3mW
SN54ALS832
12mA
4 ns
-15mA
5.3 mW
SN74ALS832
24mA
17mW
-40mA
3 ns
SN54AS832A
40mA
TYPE
SN74AS832A
48 mA
-48 mA
3 ns
17mW
SN54ALS832 (J,FH)
SN74ALS832 (N,FN)
SN54AS832A (J,FH)
SN74AS832A (N,FN)
~3Y
3B...!!l....-
4A~
4B~
5A~
5B~
6A~
6B~
841
3
4
2A
28
2Y
~4Y
6
7
8
,J.!!L 5Y
9
10
J,N PACKAGES
1
lA
11
4Y
18
lY
12
4A
48
2
3
5Y
2A
13
14
5Y
3A
38
3Y
5A
58
28
2Y
15
5A
16
58
6Y
6A
7
8
3A
17
38
18
6Y
6A
GNO
68
9
10
3Y
19
68
GNO
20
Vec
12
4A
13
14
15
16
17
18
19
20
Vee
48
~6Y
logic symbolt
Dc
LATCHES WITH 3-STATE OUTPUTS
High-speed parallel latches - noninverting

tra nsparent
SN54AS841 (JT, FH)
18
lY
positive logic: Y =A+B
10-BIT BUS INTERFACE OoTYPE
~2Y
2B~
HIGH
FH,FN PACKAGES
4Y
lA
11
1
2
SN74AS841 (NT, FN)
(11
pin assignments
JT, NT PACKAGES
EN
(131
Cl
10~
20~
30~
40~
50~
60~
70~
80~
90~
100~
10
t>
~la
~2a
~3a
~4a
~5a
~6a
~7a
~8a
~9a
~10a
3
4
OC
10
13
14
20
15
' 16
e
100
90
FH, FN PACKAGES
nc
15 nc
16 e
2 OC
17 100
3 10
1
80
70
17
50
18
60
19
20
50
60
70
6
7
40
9
10
80
90
21
22
11
12
100
GNO
23
24
30
20
10
9
10
11
Vce
5
6
7
3D
40
90
20
3D
18
19
80
40
20
70
50
nc
21
60
22
nc
60
70
23
24
12
80
90
13
14
100
GNO
25
26
27
50
40
30
28
Q)
20
10
"C
Vee
'S
(!)
+J
CJ
842
logic symbolt
Dc
High-speed parallel latches - inverting

transparent
SN54AS842 (JT, FH)
SN74AS842 (NT, FN)
(11
Cl
15~
2D~
35~
40~
55~
10
"C
JT, NT PACKAGES
oe
13 C
1
EN
(131
::J
pin assignments
t>
60.E!....c::.
7D~
8D~
95~
105~
~la
~2a
~3a
~4a
~5a
~6a
~7a
~Ba
~9a
~10a
10
100
2
3
4
20
14
15
90
3D
40
16
17
80
70
18
19
8
9
50
60
70
80
60
50
40
30
3
4
5
6
7
20
21
...
FH, FN PACKAGES
1 nc
15 nc
5
6
7
OC
16
15
17
e
100
25
35
18
19
90
80
45
55
nc
65
20
21
22
23
0..
7Q
60
nc
50
10
90
22
20
8
9
10
70
24
40
11
100
23
10
11
80
25
30
12
GND
24
Vee
12
13
14
90
100
GNO
26
27
20
10
28
Vec
t Pin numbers shown on logic symbols are for J, JT, N, NT packages only.
TEXAS
INSTRUMENlS
3-183
PRODUCT GUIDE
843
logic symbolt
pin assignments
OC
Ci.R

transparent
SN54AS843 (JT, FH)
n. NT PACKAGES
1
PRE
C
SN74AS943 (NT, FN)
13
10
14
20
15
(23)
10
\l
(3)
20
3D
40
50
60
70
80
90
844
OC
(22)
(4)
(21)
(5)
(20)
(6)
(19)
(7)
(18)
(8)
(17)
(9)
(16)
(10)
(15)
10
20
30
FH. FN PACKAGES
1
nc
15
nc
PRE
DC
16
90
10
17
PRE
3D
16
80
18
90
40
17
70
3D
19
SO
50
18
60
40
20
70
60
19
50
50
21
60
70
20
nc
22
40
80
21
30
60
23
50
50
10
90
22
20
10
70
24
40
11
CLR
23
10
12
GNO
24
VCC
60
70
40
20
80
nc
11
80
25
30
12
90
26
20
13
CLR
27
10
14
GNO
28
VCC
90
logic symbolt
pin assignments
Dc

transparent
Jr. NT PACKAGES
1
OC
13
nc
15
nc
CLR
10
14
CLR
DC
16
SN54AS844 (JT, FH)
SN74AS844 (NT, FN)
(23)
(22)
10
20
III...
40
50
60
70
80
90
C.
t:
10
20
(21)
30
(20)
40
(19)
50
(18)
60
(17)
70
(16)
80
(15)
90
30
."
FH. FN PACKAG ES
PRE
20
15
90
10
17
CLR
30
16
so
20
18
90
40
17
70
3D
19
80
50
18
60
40
20
70
60
19
50
50
21
60
70
20
40
nc
22
nc
80
21
30
60
23
50
10
7D
24
40
22
11
90
pfj'E
20
23
10
11
80
25
30
12
GNO
24
VCC
12
90
26
20
13
PRE
27
10
14
GNO
28
VCC
10
(')
r+
845
pin assignments
logic symbolt
Jr. NT PACKAGES

tra nspa re~t
SN54AS845 (JT, FH)
(4)
20
3D (5)
13
15
nc
DC2
14
DCl
16
10
15
80
OC2
17
PRE
20
16
70
10
18
80
60
30
17
20
19
70
40
18
50
3D
20
60
50
19
40
40
21
50
(22) 10
60
20
30
nc
22
(21) 20
70
21
20
50
23
40
10
so
22
10
10
60
24
30
11
CLR
23
DC3
12
GNO
24
VCC
(20)
30
nc
20
11
70
25
40 (6)
(19) 40
12
80
26
10
50 (7)
(lS) 50
13
CLR
27
DC3
60 (S)
(17) 60
14
GNO
2S
VCC
7D (9)
(16) 70
(10)
(15) SO
SO
3-184
nc
2
3
DCl
SN74AS845(NT,FN)
10 (3)
FH. FN PACKAGES
PRE
TEXAS
INSTRUMENTS
PRODUCT GUIDE
846
logic symbolt
a-BIT BUS INTERFACE OoTYPE
OC1~ &
OC2~
OC3~
'-PRE~ S2
LATCH ES WITH 3-STATE OUTPUTS

transparent
SN54AS846 (JT, FH)
SN74AS846(NT,FN)
CLR
!!.!!.t:::.
C~
pin assignments
EN
R
C1
r
I> 2'\l~la
D~'10
20~
--E.!l2a
30~
~3a
~4a
~5a
~6a
~7a
~8a
40~
50~
60~
70~
80.'22.!....t:::.
850, 851
JT. NT PACKAGES
eCl
13 C
14 CLR
eC2
10
15 80
20
16 70
3D
17 60
40
18 50
50
19 40
60
20 30
70
20
21
80
22 10
PRE
23 eC3
GNO 24 VCC
FH. FN PACKAGES
15 nc
1 nc
16 C
2 eCl
3 eC2
17 CLR
4 10
18 80
5 20
19 70
6 3D
20 60
7 40
21 50
8 nc
22 nc
9 50
23 40
24 30
10 60
11 70
25 20
12 80
10
26
13 PRE
27 OC3
14 GND 28 vCC
pin assignments
JD, N PACKAGES
E7
15
0
E6
16
C
17
E5
B
E4
18
A
E3
Y
19
E2
20
E15
6
El
21
E14
7
E13
EO
22
8
GY/GY 23
E12
9
24
Ell
GIG
10
GW
El0
11
25
12
CK/GL 26
E9
27
E8
W
13
14
GNO
28
VCC
1 OF 16DATASELECTORS/MULTIPLEXERS
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
Registered select lines (850)
Latched select lines (851)
4 ns data to output
7 ns clock to output
Three-state outputs controls for both

outputs
SN54AS850 (JD, FH)
SN74AS850 (N, FN)
SN54AS851 (JD, FH)
SN74AS851 (N, FN)

logic symbol t 'AS851
logic symbolt 'AS850
20EN21
GWi!.!L 20EN22
Sl.illL
S2~
S3~
DO~
01~
02~
-ffi--
03
04W05m06m07tn-
~~~}
2303
0
1
2
3
4
5
6
7
8
~:~ 9
010~
10
011~ 11
012 I t ) 12
013 "it) 13
014~ 14
015 ---'-- 15
II
G~
cw.!l!Ll::::.
G.i!.2.!.J:::" G20
cw.!l!Ll::::.
SO~
FH. FN PACKAGES
E7
15
0
E6
16
C
17
E5
B
E4
18
A
E3
19
Y
E2
20
E15
21
E14
El
EO
22
E13
GY/GY 23
E12
GIG
24
Ell
GW
25
El0
CK/GL 26
E9
W
27
E8
GND
28
VCC
MUX
G20
20EN21
Gwi!.!L 20EN22
sc~ C23
MUX
CLK~
1
2
3
4
5
6
7
8
9
10
11
12
13
14
"
so..l1!!..SlJ.!ZL
G15
21 '\7
S2~
S3~
~y
Oo-ffi01W)-
~2~
3~
22'\7
~W
04-;t05m06m-
071~
~:~
010~
.....
(J
:::::s
"C
"OO} "
...
G15
2303
0
1
2
3
4
5
6
7
8
Q.
21 '\7
~Y
22 '\7
~W
10
011{2J) 11
012 I t ) 12
013-(W- 13
14
15
~~:~
t Pin numbers shown on logic symbols are for JD, JT, N, and NT packages only.
, nc -
TEXAS
INSTRUMENTS
PeST OFFICE BOX 225012 DALLAS, TEXAS 75265
3-185
PRODUCT GUIDE
852
8-BIT UNIVERSAL
TRANSCEIVER/PORT
CONTROLLERS
logic symbol t
pin assignments
JT,NT PACKAGES
(PORT CONTROllERI
so 111
51 121
52 131
ClK 1231
8 selectable transceivert/port
functions
24-pin 300-mil package
81
10/21100
12
11/31100
Z14
SN54AS852 (JT,FH)
SN74AS852 (NT,FN)
A2
15
1'0
10121100
82
2
Z17
11/31100
FH,FN PACKAGES
SO
13
08
nc
15
nc
Sl
14
B8
SO
16
08
S2
15
B7
Sl
17
B8
Al
16
B6
S2
18
B7
A2
17
B5
Al
A3
18
B4
A2
20
B5
A4
19
B3
A3
21
B4
A5
20
B2
nc
22
nc
A6
21
Bl
A4
23
B3
19
B6
10
A7
22
SERIN
10
A5
24
B2
11
A8
23
elK
11
A6
25
Bl
12
GND 24
Vee
12
SERIN
A7
26
13
A8
27
elK
14
GND 28
Vee
1'0
AS
88
10121100
33
11131100
08
For further information, contact the factory_
lEI
..,
."
(')
"...
logic symbol t
8-BIT UNIVERSAL
TRANSCEIVER/PORT
CONTROLLERS
pin assignments
8 selectable transceiver/port
functions
SN54AS856 (JT,FH)
SN74AS856 (NT,FN)
3-186
TEXAS
INSfRUMENTS
POST OFFICE BOX 225012 DAllAS. TEXAS 75265
OEB
13
OB
OEA
14
B8
MODE 15
B7
15
3
DEB
16
08
OEA
17
88
Al
16
B6
MODE 18
87
A2
17
85
Al
19
86
A3
A4
18
B4
A2
20
19
83
6
7
A3
21
85
84
A5
20
82
nc
22
A6
21
Bl
A4
23
B3
10
A7
22
SERIN 10
A5
24
B2
11
A8
23
elK
11
A6
25
Bl
GND
24
Vee
12
A7
26
SERIN
13
AB
27
elK
14
GND
2B
VCC
12
FH. FN PACKAGES
J. N PACKAGES
(PORT CONTROLLERI
Q.
t:
856
PRODUCT GUIDE
logic symbol t
857
pin assignments
JT, NT PACKAGES
HEX 2-TO-' UNIVERSAL
MULTIPLEXER
so
Three-state buffer-type
S1 (23)
(13)
True or complementary
outputs
(1)
COM
ENS
data
SN54ALS857 (JT)
SN54ASB57 (JT,FH)
SN74ALSB57 (JT,NT)
SN74ASB57 (NT,FN)
(4) 1V
SO
lA
3
4
18
lY
2A
6
7
8
28
2Y
3A
9
10
36
3Y
11
12
13
eOMP
14
15
16
4Y
48
4A
17
18
5Y
19
20
21
22
OPER=O 23
GND
24
56
SA
6Y
68
6A
SI
Vee
FH, FN PACKAGES
1
nc
2
3
4
SO
lA
16
lY
5
6
7
8
9
10
11
12
13
14
'3 6\7
2A
28
nc
2Y
15
16
17
18
nc
19
4A
20
21
22
5Y
23
24
25
eOMP
4Y
48
56
nc
5A
3A
38
3Y
26
OPER=O 27
6Y
68
6A
SI
GND
Vee
28
(11) OPER=O
Ell
..,
(.)
;j
"'C
o
...
0..
tPin numbers shown on logic symbols are for J, JT, N, and NT packages only.
TEXAS
INSTRUMENTS
3-187
PRODUCT GUIDE
866
pin assignments
logic symbolt
r-----~C~O~M~P----~
8-BIT MAGNITUDE COMPARATORS
Fast compare to zero

Arithmetic and logical comparison
Open-collector output for P = Q
30
3D
poO 3D
(16)
SN54AS866 (JD.FHI
SN74AS866 (N.FNI
P>O
117) P<O
P<O
(13)
p..Q
JD. N PACKAGES
OLE
15 OLE
LlA
16 P>Oout
P<Oin
17 P<Oout
P>Oin
18 PO
a7
19 PI
06
20 P2
05
21 P3
u4
22 P4
03
23 P5
02
24 P6
Ul
Z5 P7
00
26 PlE
P=Ooul 27 ClRO
GNO
28 Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FH. FN PACKAGES
OLE
15 OLE
l/A
16 P>Oout
P<Oin
17 P<Oout
P>Oin
18 PO
07
19 PI
06
20 P2
05
21 P3
a4
22 P4
03
23 P5
02
24 P6
01
25 P7
00
26 PlE
P=Ooul 27 ClRO
GNO
28 vcc
o
6
7
8
9
10
11
12
13
14
867, 869
logic symbol, 'AS867t
8-BIT SYNCHRONOUS
BIDIRECTIONAL COUNTERS
'"'C
""
o
Q.
t:
(')
,..
'AS867 has asynchronous clear
'AS869 has synchronous clear
Ripple carry output for N-bit
Fully programmable witH synchronous
cascading
counting and loading

FUNCTION TABLE
S1
SO
FUNCTION
logic symbol, 'AS869t
Clear
Count Down
Load
Count Up
Supersedes table In 1981 Supplement to TTL Data Book

SN54AS867 (JT.FHI
SN54AS869 (JT.FHI
SN74AS867 (NT.FNI
SN74AS869 (NT.FNI
o
G
H (10)
3-188
TEXAS
INSTRUMENTS
pin assignments
JT. NT PACKAGES
13 RCO
1 SO
2 51
14 ClK
A
15
3
OH
4 6
16 G
17 OF
5 C
18 OE
6 0
7 E
19 00
8 F
20 Oc
21 08
9 G
10 H
22 A
11 ENT 23 ENP
12 GNO 24 Vce
1
2
3
4
5
6
7
6
9
10
11
12
13
14
FH. FN PACKAGES
nc
15 nc
SO
16 RCO
51
17 ClK
A
16 OH
6
19 G
C
20 OF
0
21 E
nc
22 nc
E
23 aD
F
24 Oc
G
25 OB
H
26 A
ENT 27 ENP
GNO 26 Vce
PRODUCT GUIDE
870
logic Iymbol t
pin assignments
DUAL 16-BY-4 REGISTER
Each register file has individual

write/enable controls and
address lines
Has two 4-bit data I/O ports

24'pin 300-mil package
1
2
3
4
5
8
7
8
9
10
11
12
(REG FILE 16 X 4)
FILES
SN54AS870 (JT,FHI
SN74AS870 (NT,FNI
00B1
RAM 16X 1
(REG 1)
MUX
6
1A,O,211/:J)40
1A.1,3,40
1A
ZB
RAM 16X 1
(REG 2)
2A,O,2(113)50
2A,1,3,50
2A
Z9
1
2
3
4
6
8
7
8
9
10
II
12
13
14
JT, NT PACKAGES
SO
13 DOBI
lAO 14 DOB2
lAl 15 DOB3
lA2 18 DOB4
lA3 17 S3
lW
18 2W
S2
19 2AO
DOAI 20 2AI
D0A221 2A2
D0A322 2A3
D0A423 SI
GND 24 Vcc
FH, FN PACKAGES
nc
16 nc
so
18 DOBI
lAO 17 DOB2
IAI lB DOB3
IA2 19 DOB4
IA3 20 S3
lW 21 2W
nc
22 nc
S2
23 2AO
DOAI 24 2Al
D0A2 25 2A2
D0A3 26 2A3
D0A4 27 SI
GND 28 Vcc
II
....
(.)
:::s
"'C
...o
c..
~.
nc - no intemal connection.
TEXAS
INsrRuMENTS
3-189
PRODUCT GUIDE
871
logic symbol t
pin assignments
DUAL 16-BY-4 REGISTER

FILES
Each register file has individual

write/enable controls and
address lines
Has one 4-blt data I/O port;
the other 4-bit data word has
individual data inputs and
data outputs
28-pin. 600-mil package
SN54AS871 (J.FH)
SN74AS871 (N.FN)
(REG FILE 16 X 4)
'~J
1A1..1alA2...!2!.-
lA
1
2
3
4
6
6
7
8
9
10
11
12
13
14
215
lA34- 3
~O~j
2Al~ 0
2A2Ja..
0
2AiS
2A3.J?4L- 3
SO~ CO/Gl0
Sl~Cl/Gll
S2~C2(Ain)
I~
S3 (19
EN12 (Aout)
C3 (Bin)
EN13 [Bout)
lW~C4
2W.E2L..
.,
C5
...
OA1..!!L- Z6
'MuX
OAl..!.l!!4 '\7<312
Z7
RAM 16X 1
[REGt)
6
lA,l!,2(1/l)40
lA.1.3,40
~
13[>'\7
lA
Z8
8,10
9,10
lEI...
IT
11
RAM 16X 1
[REG 2)
6
2A,O,2(113)50
2A,l,3,SO
2A
~OOB2
OA~~
OA3....2!.L.
oQ,
s::
(")
~OOB3
0A3~
OA4~
0A4~
......
f4+-ll.!!L
G')
s::
c:
(I)
t Pin numbers shown on logic symbols are for J and N packages only_
3-190
Das,
Z9
OA2..!&-
"'tJ
u
(15)
TEXAS
INSTRUMENTS
OOB4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
J, N PACKAGES
DAl 16 DOBl
DA2 16 DOB2
50
17 DOB3
lAO lB DOB4
lAl 19 53
lA2 20 2W
lA3 21 2AO
lW
22 2Al
52
23 2A2
OAl 24 2A3
OA2 25 51
CA3 26 DA3
OA4 27 DA4
GND 28 Vcc
FH, FN PACKAGES
DAl 15 DOBl
DA2 16 DOB2
50
17 DOB3
lAO 18 0084
lAl 19 53
lA2 20 2W
lA3 21 2AO
lW
22 2Al
52
23 2A2
OAl 24 2A3
OA2 25 51
OA3 26 DA3
OA4 27 DA4
GND ~8 vcc
PRODUCT GUIDE
pin assignments
873
JT. NT PACKAGES
DUAL 4BIT DTYPE LATCHES
Threestate buffertype outputs

Each 4bit word has enable,
1
2
3
4
5
6
7
8
9
10
11
12
clear, and output control

inputs
typical performance
SN54ALS873(JT,FH)
SN54AS873 (JT,FH)
SN74ALS873 (NT,FN)
SN74AS873 (NT,FN)
201
(18) 201
202
203
(171 202
204
(9)
(16) 203
(10)
(15) 204
10
11
12
13
14
Three-state buffertype outputs

Each 4bit word has clock, clear,
101
102
and output control inputs
103
typical performance
104
DATA TIMES
SN54ALS874
FREQ
POWER
SET-
20C
HOLD
2CLK
50 MHz 86.7 mW
10 nsl
4 nsl
2m
50 MHz 86.7 mW
UP
10 nsl
4 nsl
201
SN54AS874
175 MHz
456 mW
5 nsl
1 nsl
202
SN54AS874
175 MHz
456 mW
4 nsl
1 nsl
SN74ALS874
2ClA
2C
2Q4
2Q3
2Q2
2Ql
lQ4
lQ3
lQ2
lQl
lC
Vee
FH. FN PACKAGES
nc
15
lCIR 16 2ClA
1~ 17
2C
101
18 2Q4
'102 19 2Q3
103 20 2Q2
2Ql
104 21
201
202
203
204
20C
GNO
22
23
24
25
26
27
28
lQ4
lQ3
lQ2
lQl
lC
vcc
JT. NT PACKAGES
DUAL 4BIT DTYPE EDGETRIGGERED FLIP-FLOPS
TYPE
GNO
13
14
15
16
17
18
19
20
21
22
23
24
pin assignments
874
lelA
10C
101
102
103
104
201
202
203
204
20C
203
204
t Rising edgE! of clock pulse

SN54ALS874 (JT,FH)
SN54AS874 (JT,FH)
SN74ALS874 (NT,FN)
SN74AS874 (NT,FN)
1
2
3
4
5
6
7
8
9
10
11
12
1m
1l5C
101
102
103
104
201
202
203
204
20e
GNO
13
14
15
16
17
18
19
20
21
22
23
24
2m
2ClK
2Q4
2Q3
2Q2
2Ql
Ell
...
104
103
lQ2
101
lCLK
CJ
::s
"C
...o
Vee
Q.
1
2
3
4
5
8
7
8
9
10
11
12
13
14
FH. FN PACKAGES
nc
15 nc
1m 18 2m
1l5C 17 2CLK
101 18 2Q4
102
103
104
nc
201
202
203
204
20e
GNO
19
20
21
22
23
24
25
26
27
28
203
2Q2
2Ql
nc
lQ4
103
lQ2
lQl
lCLK
VCC
nc -
TEXAS
INSTRUMENTS
3-191
PRODUCT GUIDE
876
pin assignments
DUAL 4-BIT D-TYPE EDGETRIGGERED FLIP-FLOPS
1
2
3
4
5
6
7
S
9
10
11
12
1PRE
WITH INVERTED OUTPUTS
101
102
103
104
Each 4-bit word has own clock,

preset, and output control inputs
typical performance
2CLK
DATA TIMES
TYPE
FREQ
POWER
SET-
UP
2PRE
HOLD
SN54ALS876
50 MHz 86.7 mW
10 nsl
4 nsl
SN74ALS876
50 MHz 86.7 mW
10 nsl
o nsl
SN54AS876
175 MHz
470mW
5 nsl
nsl
SN74AS876
175 MHz
470mW
4 nsl
1 nsl
201
1
2
3
4
5
6
7
S
9
0
1
2
13
14
202
203
204

SN54ALS876 (JT.FHI
SN54AS876 (JT.FHI
EI...
""C
0
C.
c:
n
r+
G)
c:
c:
CD
SN74ALS876 (NT,FNI
SN74AS876 (NT,FNI
811
logic symbol f
TRANSCEIVER/PORT
CONTROLLERS
8 selectable transceiver/port
functions
Al
81
SN54AS877 (JT,FHI
SN74AS877 (NT,FN)
A2
AS
34.1
34
(1/31100
35(3151
nc - no intema[ connection.
3-192
FH. FN PACKAGES
nc
15 nc
lJ5llr 16 2PAE
10C 17 2ClK
101
IS 2Q4
102 19 203
103 20 2Q2
104 21
201
nc
22 nc
201 23 104
202 24 103
203 25 102
204 26 101
2m; 27 lClK
GNO 2S VCC
pin assignments
[PORT CONTROLLER)
8-BIT UNIVERSAL
JT. NT PACKAGES
lJ5llr 13 2J5llr
1m: 14 2ClK
101 15 204
102 16 203
103 17 202
104 IS 251
19 104
201
202 20 la3
lQ2
203 21
204 22 101
20C 23 lClK
GNO 24 VCC
TEXAS
INSTRUMENlS
POST OFFICE BOX 225012 DAllAS. TEXAS 75265
JT. NT PACKAGES
FH. FN PACKAGES
15 nc
13 OS
1 nc
SO
16 as
14 BS
2 SO
SI
17 SS
15 B7
3 SI
S2
IS B7
4 52
AI
16 B6
19 B6
17 S5
5 AI
A2
20 S5
IS B4
6 A2
A3
21 S4
A4
19 B3
7 A3
22 nc
20 B2
S nc
A5
23 S3
Bl
9 A4
A6
21
24 B2
A7
22 SEAIN 10 A5
25 SI
AS
23 ClK
11 A6
26 SEA IN
GNO 24 VCC 12 A7
27 ClK
13 AS
14 GNO 2S VCC
1
2
3
4
5
6
7
S
9
10
11
12
PRODUCT GUIDE
878
logic symbol. 'ALS878, 'AS878t
Each 4-bit word has clock, clear,

and output control inputs
FREQ
lClR 13
2ClR
lClR (1)
lOC
14
2ClK
15
204
SN54ALS878 50 MHz 86.7 mW

SN74ALS878 50.MHz 86.7 mW
SN54AS878
175 MHz 463mW
175 MHz 463 mW
SN74AS878
(20)
103
DATA TIMES
SETUP HOLD
10 nsf 4 nsf
10 nsf o nsf
3 nst
3 nst
2 nst
2 nst
(19)
104
101
102
16
10J
17
202
104
201
18
19
201
103
6
7
104
202
20
103
20J
21
102
101
102
POWER
JT. NT PACKAGES
lCLK (23)
101
typical performance
TYPE
pin assignments
lOC (2)
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
102
10
20c
2CLK
203
104
204
22
11
20C
23
lCLK
12
GND
24
VCC
101
2CLR
FH. FN PACKAGES
tRising edge of clock pulse

.SN54ALS878 (JT,FH) SN74ALS878 (NT,FN)
SN54AS878 (JT,FH)
SN74AS878 (NT,FN)
201
202
203
204
879
(9)
(10)
lOC
Three state buffer-type outputs
Each 4-bit word has clock, clear,

and output control inputs.
FREQ

SN54AS879 175 MHz
470mW
SN74AS879 175 MHz
470 mW
2ClK
2CLR
18
204
102
19
203
lD3
20
202
lD4
21
201
nc
22
nc
2Dl
2D2
23
24
10J
11
2D3
25
102
12
2D4
26
101
13
14
20C
27
lClK
GND
28
VCC
9
10
104
JT. NT PACKAGES
1
lCLR (1)
lOC
14
2CLK
lDI
15
204
104
2CLK
lClR 13
2CLR
lD2
16
203
103
17
202
6
7
104
2Dl
16
19
201
104
.....
(,)
202
20
103
:::l
"C
2D3
21
102
10
2D4
22
101
11
20C
23
lCLK
12
GND
24
Vee
...o
Q.
2CLR
FH. FN PACKAGES
251
201
rAising edge of clock pulse

SN54ALS879 (JT,FH) SN74ALS879 (NT,FN)
SN54AS879 (JT,FH)
SN74AS879 (NT,FN)
202
203
204
(8)
(9)
(10)
252
203
204
15
lClR 16
nc
2CLR
lOC
17
2CLK
101
18
204
102
19
203
103
20
2 2
104
21
2 1
nc
22
201
104
10
202
23
24
11
12
2DJ
25
102
204
26
101
13
20C
27
lCLK
14
GND
26
VCC
101
17
lCLK (23)
103
POWER
nc
lOC
pin assignments
102
DATA TIMES
SET-UP HOLD
10 nsf 4 nsf
10 nsf o nsf
3 nst
3 nst
2 nsf
2 nst
15
lClR 16
(2)
101
typical performance
nc
2
4
logic symbol, 'ALS879, 'AS879t
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLlpFLOPS

TYPE
(8)
103
JT and NT packages only.
TEXAS
INSTRUMENTS
3-193
PRODUCT GUIDE
logic symbol t
880
Threestate buffertype outputs
Each 4bit word has enable,
preset, and output control
TYPE
I OUTPUT I DELAY I POWER I
881
2D1~
2D2~
""t
0-
s:::
or+
S1~
4bit ALU's/Function
S2~
S3~
Generators
Same operating modes as
'AS181A, 'S181A expanded to
include status register checks
TYPE
CARRY
TIME
M..l&-
16BIT
ADD TIME
l'AS881AI 7.5 ns I
20 ns
SN54AS881A (JT,FH)
SN74AS881A (NT,FN)
}f,
ALU
(0 ... 15) CP
(0 ... 15) CG
6(P=a) Q
(0 .. ,15) CO
~p
~G
~A=B
~Cn+4
a
P
[1]
~ro
[2]
::::......!..!.F1
[4]
:::.....ll!LF2
[8]
~F3
Bo
1
2
3
4
5
AO
53
52
51
so
7
8
9
10
Cn
M
to
11
Fl
F2
12
GNO
FH. FN
1560 mWI 'S1J.W.c:,.. a

A2Jr!.l.c::,. P
B2.mll.J:::. a
A3J!!!l....r:::=. P
B3..ll!!l....r::: a
t Pin numbers shown on logic symbols are for JT and NT packages only
3-194
2~4
203
2Q2
2Ql
lQ4
lQ3
lQ2
lQl
lC
VCC
PACKAGES
nc
15 nc
lPRE 16 2PRE
loe 17 2C
101 18 2Q4
102 19 2Q3
103 20 2Q2
104 21 2Ql
nc
22 nc
201 23 lQ4
202 24 lQ3
203 25 lQ2
204 26 lQl
20C 27 lC
GNO 28 vCC
FH, FN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
JT, NT PACKAGES
...,
A1
2~
2C
~2Q2
~2a3
~2Q4
Cn~CI
IB~~
lPRE 13
1~ 14
101 15
102 16
103 17
104 18
201 19
202 20
203 21
204 22
20C 23
GNO 24
pin assignments
- 1.J1L.t::..
TOTAL
POWER
1
2
3
4
5
6
7
8
9
10
11
12
\J~2Q1
[>
1D
AO.J&.c:::,. P
typical performanco
~1a4
2D3~
2D4~
SO~
FUNCTION GENERATORS
"'C
~1(h
logic symbol t
ARITHMETIC LOGIC UNITS!
~1a2
C1
S
2PRe (13)
I 11.5 ns I 88 mW I
\J~1~1
[>
EN
2C (14)
SN54ALS880(JT,FH) SN74ALS880 (NT,FN)

SN54AS880 (JT,FH) SN74AS880 (NT,FN)
(22)
20C (11)
typical performance
I 'ALS880 I
s
10
1D4~
inputs
C1
1D1~
1D2~
1D3~
Jr, NT PACKAGES
EN
1C (23)
1PRE (1)
pin assignments
10C (2)
DUAL 4BIT DTYPE LATCHES
TEXAS
INSTRUMENTS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
nc
80
AO
53
52
51
50
nc
Cn
M
FO
Fl
F2
GNO
13 F3
14 A=8
15 rs
16 Cn +4
17 (j"
18 83
19 A3
20 B2
21 A2
22 til
23 Al
24 vCC
PACKAGES
15 nc
16 F3
17 A=B
18 ]5
19 Cn +4
20 G
21 83
22 nc
23 A3
24 82
25 A2
26 81
27 Al
28 VCC
PRODUCT GUIDE
882
logic symbol t
32BIT LOOKAHEAD
pin assignments
CARRY GENERATORS
FH. FN PACKAGES
JT. NT PACKAGES
CPG
Directly compatible with

'AS181, 'AS881, and
'S181 ALU's
(6)
typical performance
Cn+8
Cn+16
Cn+24
SN54AS882 (JT,FH)
Cn
13
G4
nc
15
GO
14
P4
Cn
16
nc
PO
15
G5
(;"0
17
P4
PO
18
135
G4
Gl
16
1'5
PI
17
Gl
19
P5
Cn +8
(;2
18
19
C n +24
136
P6
6
7
6
7
PI
20
C n +8
nc
21
22
C n +24
G6
G2
23
P6
P2
24
G7
G3
25
P7
P3
26
C n +32
27
nc
28
VCC
P2
20
G7
G3
21
P7
10
P3
22
C n +32
10
11
C n + 16
GND
23
nc
11
24
Vce
12
13
C n + 16
GND
12
14
Cn+32
nc
SN74AS882 (NT,FN)
136
P7
G7
885
logic symbol t
pin assignments
JT. NT PACKAGES
COMP
aBIT MAGNITUDE
COMPARATORS
Choice of logical or arithmetic

comparisons
SN54AS885 (JT.FH)
SN74AS885 (NT,FN)
P4
P5
13
P>Oout
14
P<Oout
P<O
(13)
(14)
15
16
P>Oout
17
P<Oout
P>Oin
15
PO
16
PI
P<Oin
p>Oin
18
PO
06
17
P2
07
19
PI
Cl)
"'C
06
20
P2
05
21
P3
(!)
04
22
23
P4
P7
10
03
24
P5
23
PlE
11
02
25
P6
24
VCC
01
05
18
P3
04
19
P4
8
9
03
20
P5
02
21
P6
10
01
22
11
00
12
GND
P6
P7
P>O
FH. FN PACKAGES
LlA
07
Latchable P input ports;

power clear
LlA
P<Oin
26
P7
13
00
27
PlE
14
12
GND
28
VCC
...,
CJ
::l
"'C
...
a.
P>O
P<O
00
03
06
07
(4)
nc -
TEXAS
INSTRUMENTS
3-195
PRODUCT GUIDE
888,889
pin assignments
8-BIT PROCESSOR SLICES
WI:
III...
STL-AS technology
Parallel 8-bit ALU with expansion inputs and
outputs
13 arithmetic and logic functions
8 conditional shifts (single and double length)
9 instructions that manipulate bytes
4 instructions that manipulate bits
Add and subtract immediate instructions
Absolute value instruction
Signed magnitude to/from 2's complement
conversion
Polynomial code accumulation (CRC, FIRE,
Computer Generated, etc-l
Single- and double-length normalize
Select functions
Signed and unsigned divides with overflow
detection; input does not need to be
prescaled
Signed, mixed, and unsigned multiples
Three-operand, 16-word register file
Full carry look ahead support
Sign, carry out, overflow, and zero-detect
status capabilities
Excess-3 BCD arithmetic
SN54AS888 (JD)
SN54AS889 (FN)
FN PACKAGE
JD PACKAGE
.,
.3
.2
.0
E1i
imI
.
2
63
62
AI
61
AD
60
C3
OB6
59
085
11
58
Cl
OB4
12
DB3
13
DBl
15
10
60
.
9
56
10
55
11
54
OAS
12
53
52
OA5
13
14
51
OAJ
19
51
EA
50
DAD
21
49
GNO
6IA
Vee1
22
0.
Veel
48
VC C2
23
lliv
57
OA4
15
50
IS
49
17
4"
47
19
20
4S
21
44
22
43
17
23
42
IS
24
25
41
14
13
27
12
2B
29
37
11
3.
Si07
31
34
6i07
32
33
54
53
18
52
GNO
24
Yo
25
5EY
26
17
45
27 28 29 30 31 32 33 34 35 3637 38 3940 41 42 43
10
Cn
SIOo
6iOO
SN74AS888 (JD)
SN74AS889 (FN)
'AS888
'AS889
Co
C
r+
G)
C
c:
CD
GINO-PIOVAQ-
Cnte<:>-ZERO
a--
PPPC>SSFC--
1710~
~GND
3-196
OA2
16
17
-a
o
OA3
DBa
15
40
39
3.
GIN
en I 8
DA5
55
SElY
VCC2
2S
PIOVA
DA6
56
,.
45
DA7
57
TEXAS
INSfRUMENlS
16
PRODUCT GUIDE
pin assignments
890,891
JD PACKAGE
AAOE
MICROSEQUENCERS
2
3
14 bits wide - Addresses up to 16.384 words

of microcode with one chip
Selects address from one of eight sources
STL-AS technology
Independent read pointer for aid in microcode diagnostics
Supports real-time interrupts
Two independent loop counters
Supports 64 powerful instructions
SN54AS890 (JD)
SN54AS891 (FN)
FN PACKAGE
5
6
60
59
OSEL
10
58
MUXO
11
DRAG
57
OSEL
56
10
55
MUXl
11
54
Mux2
12
53
SO
51
S2
cc
SN74AS890(JD)
SN74AS891 (t=N)
50
16 49
17 48
1841
Yl
56
55
RC2
16
54
SI
18
52
V6
S2
19
51
YOE
CC
20
VCCI
21
49
V8
VCC2
CK
22
48
V9
ZERO
STKWRN/RER
24
25
DRBO
26
53
46
20
45
21
44
CK
22
43
23
42
41
'(12
24
25
26
40
J9
i"Nl
y11
27
J8
'"
37
J6
ORB10
DRB9
34
RBOE
32
33
V5
Y7
23
46
Yl1
Y12
272829 30 31 3233.34 35 36 37 38 39 40 41 4243
DRBll
29
35
VI
V2
14
15
YOe
19
31
82
57
RCa
RCI
Y6
Veel
30
81
59
12
VCC2
DABG
M
c:(
987654321~~~~~~~~
1352
1451
15
I"' """ - - - -
..
~ ..;: c:( c:(
<{ '"
U) 0 c:(
o a: a: ([ cr a::: a:: a:: a: cr a: a: a: a: a: ~
mCOQOQOOa:OQOOOOO_
oc:( c:(
_ '"
<{
63
62
61
RAOE
D-----Q'\
/ ' { > - - - - - < l RiCe
...o
:::l
"C
...
Q.
r--r---::J 83 - 80
~VCCl
--cJ
V CC2
-<)GND
---<J
CK
roeD-----t----------4.j
TEXAS
INSTRUMENTS
3-197
PRODUCT GUIDE
897
pin assignments
JD, N PACKAGES
16-BIT EXPANDABLE
BARREL SHIFTER
SN74AS897 (JO)
AS897 16-BIT EXPANDABLE BARREL SHIFTER

015 - 000
NORM
ZN4-ZNO
"'tl
ClK
t:
(')
r+
C)
5.
a.
CD
12 -10
IP
1 - - - - - - - 1 < ' " ) 1 ZL
OP
SYS16
Y15 - YOO
3-198
29 11
30 12
5 D15
31 ClK
6 D14
32 YO
7 D13
33 Yl
8 D12
34 Y2
9 Dll
35 Y3
10 Dl0
36 Y4
11 D9
37 Y5
38 Y6
13 GND
39 Y7
14 D7
40 GND
15 D6
41 Y8
16,D5
42 Y9
17 D4
43 Yl0
18 D3
44 Yll
19 D2
45 '(12
20 Dl
46 Y13,
21 DO
47 Y14
22 IP
48 Y15
23 OP
490EY
24 SYS16
50 NORM
25 ZL
51 lN4
26 S
52 VCCl

III
a.
28 10
3 ZNl
12 D8
Contact factory for additional information
0"'"
27 VCC2
2 lN2
4 ZNO
Performs arithmetic,logical, and circular

shifts on data in one clock cycle
Performs bit set and reset operations and
floating point normalizations
Contains an internal counter for memory
address and FFT bit reverse addressing
Ideal for improving the shift throughout on
a microprocessor or AS888 based
system
SN54AS897 (JO)
1 lN3
TEXAS
INSTRUMENTS
PRODUCT GUIDE
1000
logic Iymbol t
QUAD 2INPUT NAND BUFFERS/DRIVERS
1A-l!L
Increased output drive capability

over
'lSOO, 'AlSOO, 'ASOO
1B..J&...
2A--!!L
TYPE
SN54ALS1000A
LOW
HIGH
LEVEL
OUTPUT
OUTPUT
CURRENT
CURRENT
12mA
-1 mA
SN74ALS1000A
24 mA
- 2.6 rnA
SN54AS1000
40mA
-40 rnA
SN74AS1000
48 mA
-48mA
SN54AlS1000A (J,FH)
SN54AS1000 (J,FH)
WL3Y
3B--.!.!.!!L
DELAY
ns
4 ns
1.7 ns
1.7 ns
4
POWERI
GATE
4A~
4B~
3mW
3mW
positive logic:
~4Y
SN74AlS1000A (N,FN)
SN74AS1000 (N,FN)
logic symbol t
QUAD 2INPUT NOR BUFFER GATES
1A---ill....
1B-'!L
2A~
3A-!!L
LOW
HIGH
LEVEL
LEVEL
OUTPUT
OUTPUT
CURRENT
CURRENT
SN54ALS1002A
12mA
-1 mA
SN74ALS1002A
24mA
- 2.6 rnA
SN54AlS1002A (J,FH)
3B....J!L
DELAY
POWERI
4A-illL
GATE
4B-.!E!...
ns
4 ns
4mW
4mW
FH, FN PACKAGES
1 nc
11 nc
2
12 3Y
3 18
13 3,.
4 lY
14 38
5 nc
15 nc
6
16 4Y
7 nc
17 nc:
8 28
18 4,.
9 2Y
19 48
10 GND 20 Vcc
pin assignments
:>1[>
2B--.!!L
typical performance
J, N PACKAGES
lA
8 3Y
16
9 3,.
lY
10 38
2A
11 4Y
26
12 4,.
2Y
13 48
GND 14 VCC
2,.
8.6mW
Increased output drive capability

over'lS02,
1
2
3
4
5
6
7
I,.
yaM
8.6mW
1002
TYPE
~lY
~2Y
2B~
3A~
typical performance
LEVEL
pin assignments
&[>
positive logic: Y = A+ii
SN74AlS1002A (N,FN)
~1Y
~2Y
~3Y
~4Y
1
2
3
4
5
6
7
J, N PACKAGES
lY
8 3A
lA
9 3B
lB
10 3Y
2Y
11 4A
2A
12 4B
2B
13 4Y
GND 14 Vee
FH. FN PACKAGES
1 nc
11 nc
2 lY
12 3A
3 lA
13 3B
4 lB
14 3Y
5 nc
15 nc
6 2Y
16 4A
7 nc
17 nc
8 2A
18 4B
9 2B
19 4Y
10 GND 20 Vee
....CJ
:J
"'C
...
o
a..
TEXAS
INSTRUMENlS
3-199
PRODUCT GUIDE
logic symbol t
1003
1A-1!L.
QUAD 2-INPUT NAND
O~1~
1B~
BUFFER GATES WITH

OPEN.cOLLECTOR OUTPUTS
pin assignments
&1>
2A~
2B~
Increased drive capability over
~2Y
~3Y
3B~
typical performance
4A.....!.!!!....
HIGHTYPE
LOW-
LEVEL
LEVEL
OUTPUT
VOLTAGE
OUTPUT
SN54AlS1003A
SN74AlS1003A
12mA
24mA
14.5 ns
14.5 ns
typical performance
HIGH
lOW-
SN54AlS1004
..,
LEVEL
lEVEL
OUTPUT
CURRENT
OUTPUT
CURRENT
12mA
-12 mA
-15mA
."
SN74AlS1004
24mA
SN5.4AS1004
40 mA
-40mA
SN74AS1004
48 mA
-48 mA
c.
c::::
or+
SN54AlS1004 (J,FH)
SN54AS1004 (J,FH)
G')
c::::
0:
CD
3mW
3mW
P-ill-1Y
.:::::....J&2Y
3A~
4A~
~3Y
~4Y
5A-!!!L
~5Y
SA....!!&..
::::......!..!&SY
1A-1!.L
2A....L
WITH OPEN.cOLLECTOR
38
11
4Y
28
2Y
12
4A
13
14
Vee
6
7
GNO
48
FH. FN PACKAGES
1 nc
11
nc
2
lA
12 3Y
18
lY
13
14
3A
38
5
6
nc
15
nc
2A
4Y
nc
16
17
28
18
4A
9
10
2Y
19
48
GND
20
Vee
nc
FH. FN PACKAGES
I
nc
II
nc
lA
12
4Y
4A
3
4
lY
13
2A
14
5Y
nc
15
nc
6
7
8
9
10
2Y
16
5A
nc
17
nc
3A
18
6Y
3Y
GND
19
6A
20
Vee

LS05
typical performance
LOW-
HIGH-
LEVEL
LEVEL
pin assignments
I>
O~1Y
.:::....ill.. 2Y
5A-!!!L
~3Y
~4Y
~5Y
SA..J1!L
~SY
3A~
4A~
OUTPUTS
positive logic: Y=A
OUTPUT
OUTPUT
CURRENT CURRENT
SN54A lS1 005
12mA
-1 mA
-2.6mA
SN74AlS1005 (N,FN)
3-200
10
2A
SN74AlS1004 (N,FN)
SN74AS1004 (N,FN)
BUFFER GATES
24 mA
J. N PACKAGES
8 4Y
lA
lY
9 4A
2A
10 5Y
5A
2Y
II
3A
12 6Y
3Y
13 6A
GND 14 Vee
positive logic: Y=A
logic symbol t
SN74AlS1005
1005
SN54AlS1005 (J,FH)
2A....L
,HEX INVERTER
TYPE
3
4
lY'
3Y
3A
pin assignments
I>
1A-1!.L

lS04, AlS04, AS04
3
4
logic symbol t
HEX DRIVERS
TYPE
GATE
SN74AlS1003A (N.FN)
1004
POWER!
~4Y
4B~
CURRENT
5.5 V
5.5 V
SN54AlS1003A (J.FH)
DELAY
lA
18
3A-....!!L
'LS03
J. N PACKAGES
1
2
TEXAS
INSTRUMENTS
POST OFF leE BOX 225012 DALLAS. TEXAS 75265
I
2
3
4
5
6
7
J. N PACKAGES
lA
8 4Y
9 4A
lY
10 5Y
2A
5A
2Y
II
12 6Y
3A
3Y
13 6A
GND 14 Vee
FH. FN PACKAGES
I
nc
II
nc
lA
12
4Y
lY
13
4A
2A
14
5Y
5
6
7
8
9
10
nc
IS
nc
2Y
16
5A
nc
17
nc
3A
18
6Y
3Y
19
6A
GND
20
vee
PRODUCT GUIDE
1008
logic symbol t
QUADRUPLE 2INPUT POSITIVEAND

BUFFERS/DRIVERS
lA--l!L
pin assignments
&[>
lB-E.L
2A~
2B~

LSOa, ALSOa, ASOa
typical performance
TYPE
HIGH
3B -.J.!.QL
LEVEL
LEVEL
4A~
OUTPUT
OUTPUT
4B....!EL.
CURRENT
CURRENT
SN54ALS1008A
12rnA
-1 rnA
SN74ALS1008A
24 rnA
- 2.6 rnA
SN54AS100a
40 rnA
-40 rnA
SN74AS10OB
48 rnA
-48 rnA
SN54ALS10OBA (J,FH)
SN54AS1008 (J,FH)
3
4
5
6
7
28
2Y
GND
3Y
3A
38
4Y
4A
48
VCC
FH. FN PACKAGES
1 nc
11 nc
3
4
11\
18
1Y
12
13
14
3Y
3A
38
15
16
17
18
nc
nc
21\
7
8
9
10
nc
28
2Y
GND
4Y
nc
4A
19
4B
20
VCC
pin assignments
&[>
~lY
lB~

LS10
2A-2.L
OUTPUT
OUTPUT
2B~
2C~
3A~
3B~
CURRENT
CURRENT
3C.J!!!.....
LOW
HIGH
LEVEL
LEVEL
12 rnA
-1 rnA
SN74ALS1 01 OA
24 rnA
-2.6 rnA
1
2
3
lC-1!!L..
SN54ALS1010A
~2V
J. N PACKAGES
lA
8 3Y
18
2A
28
2C
6
7
2Y
GND
9
10
11
12
13
14
3A
38
3C
lY
lC
VCC
FH. FN PACKAGES
1
nc
2
3
4
11\
18
2A
5
6
7
B
9
10
~3V
11
12
nc
13
14
3A
38
nc
15
nc
28
nc
16
17
nc
2C
2Y
GND
18
19
20
VCC
3Y
3C
lY
lC
II
...,
SN74ALS1010A (N,FN)
SN54ALS1010A (J,FH)
(,)
1011
logic aymbol t
TRIPLE 3INPUT POSITIVEAND

BUFFER GATES
1A..J!L
2B~
LOW
HIGH
LEVEL
LEVEL
OUTPUT
OUTPUT
CURRENT
CURRENT
3C-.!!.!L
SN54ALS1011A
12rnA
-1 rnA
SN74ALS10llA -
24 rnA
- 2.6 rnA
1
2
3
4
5
~2V
2C..J!L
3A~,
3B~
SN54ALSl 011 A (J,FH)
~lV
6
7
"'C
lA
lB
2A
9
10
38
FH, FN PACKAGES
nc
11
1 nc
12 3Y
2 lA
13 3A
3 18
28
2C
2Y
GND
11
12
3C
lY
4
5
nc
14
15
13
14
lC
28
16
3C
VCC
nc
nc
2C
2Y
GND
17
18
J. N PACKAGES
&[>
2A-EL
typical performance
:l
pin . .i"nmenta
lB~
lC~

LSll
TYPE
8
9
10
11
12
13
14
~4V
lA-1!L
typical performance
lA
18
lY
2A
logic symbol t
TRIPLE 3INPUT POSITlVENAND

BUFFER GATES
TYPE
~3V
J. N PACKAGES
1
2
SN74ALS1008A (N,FN)
SN74AS1008 (N,FN)
1010
~2V
3A-lL
LOW
~lV
3Y
3A
9
10
2A
19
20
...o
c..
38
nc
IV
lC
VCC
.-!!L3V
SN74ALS10llA (N,FN)
TEXAS
INSTRUMENTS
3-201
PRODUCT GUIDE
1020
logic symbol t
1A-..!!L
DUAL 4INPUT NAND BUFFER GATES
Incr~ased
drive capability over
..
LOW
HIGH
LEVEL
OUTPUT
""0
o
c.
c
(')
....
CURRENT
SN54ALS1020A
12mA
-1 mA
SN74ALS1020A
24mA
-2.6mA
2B..i!&..
18
nc.
lC
10
lY
GNO
9
10
11
2A
28
nc
12
2C
20
13
14
Vee
p:..!!L2Y
FH. FN PACKAGES
1 nc
11 nc
2
12 2Y
lA
3
18
13 2A
4 nc
14 28
5 nc
15 nc
6
16 nc
lC
nc
10
lY
17
18
19
nc
GNO
20
Vce
20...ill.L
2C
20
positive logic: Y =ABeD
SN74ALS1020A (N,FN)
logic symbol t
1A~
BUFFER GATE
1B..J&....
pin assignments
;;'1[>
2A..J!L
2B~
LS32, ALS32, AS32
3A..J!L
typical performance
LOW
HIGH
LEVEL
OUTPUT
LEVEL
OUTPUT
CURRENT
CURRENT
SN54ALS1032A
12mA
-1mA
SN74ALS1032A
24mA
-2.6mA
SN54AS1032
40mA
-40mA
SN74AS1032
48mA
-48mA
SN54ALS1032A (J,FH)
SN74ALS1032A (N,FN)
SN54AS1032 (J,FHI
SN74AS1032 (N,FN)
3B~
4A~
4B~
J. N PACKAGES
~1Y
lA
18
~2Y
3
4
lY
2A
28
2Y
GNO
~3Y
--1lli 4y
positive logic: Y .. A+B
3202
J. N PACKAGES
lA
8 2Y
10
1032
TYPE
3
4
5
_onments
2C.JE.L.
QUADRUPLE 2INPUT POSITIVE-OR
1
2
6
7
2A-l!L
LEVEL
OUTPUT
SN54ALS1020A (J,FHI
lEI...
P:J!L-1Y
1C~
10~
typical P'fformanc:e
CURRENT
&[>
1B~
LS20
TYPE
pin
TEXAS
INSTRUMENTS
6
7
8
9
10
II
3Y
3A
38
4Y
12
4A
13
14
48
Vec
FH. FN PACKAGES
I
nc
II
nc
2
3
4
lA
18
lY
12
13
3Y
3A
5
6
7
8
9
10
14
38
15
16
nc
2A
nc
28
17
18
2Y
GNO
19
20
nc
4Y
nc
4A
48
vcc
PRODUCT GUIDE
1034
logic symbolt
HIGH
4A.-!!L
5A
--.!.!.!L
~5Y
HEX DRIVERS
2A~
3A~
typical performance
LOW
LEVEL
LEVEL
OUTPUT
OUTPUT
CURRENT
CURRENT
SN54ALS1034
12mA
-12mA
SN74ALS1034
24 rnA
-15mA
SN54AS1034
40mA
-40 rnA
SN74AS1034
48 rnA
-48 rnA
TYPE
pin assignments
~1Y
~2Y
~3Y
~4Y
1A---11L-
[>
J. N PACKAGES
lA
4Y
nc
11
nc
lY
4A
lA
12
4Y
2A
10
5Y
lY
13
5Y
nc
4A
2Y
11
5A
3
4
2A
14
3A
12
6Y
nc
15
3Y
13
6A
2Y
16
5A
GNO
14
VCC
7
8
nc
17
18
nc
3Y
19
6A
GND
20
vcc
(12)
6A~
FH. FN PACKAGES
1
2
~6Y
3A
9
10
6Y
positive logic Y = A
SN54ALS 1034 (J,FH) SN74AlS1034 (N,FN)

SN54AS 1034 (J,FH) SN74AS1034 (N,FN)
1035
logic symbolt
HEX BUFFERS WITH OPEN

COLLECTOR OUTPUTS
--.!.!.!L
~6Y
3A~
typical performance
LOW
LEVEL
OUTPUT
CURRENT
SN54ALS1035
12 rnA
SN74ALS1035 24 rnA
6A~
2A-ill-
TYPE
4A.-!!L
HIGHLEVEL
OUTPUT
VOLTAGE
5.5 V
5.5 V
5A
1036
typical performance
TYPE
LOW
HIGH
LEVEL
LEVEL
OUTPUT
OUTPUT
CURRENT
CURRENT
SN54AS1036
40 rnA
-40rnA
SN74AS1036
48 rnA
-48 rnA
4Y
nc
11
nc
4A
5Y
lA
2A
9
10
lY
12
13
4Y
4A
2Y
11
5A
2A
14
5Y
3A
12
6Y
15
nc
3Y
13
6A
5
-6
nc
2Y
16
5A
GND
14
VCC
nc
17
nc
3A
18
6Y
3Y
19
6A
GND
20
vcc
Ell
...
CJ
pin assignments
;;'1[>
1B--.Q!....
Quad version of 'AS805A
lY
Positive logic Y = A
1A~
NOR DRIVERS
FH. FN PACKAGES
lA
(12)
logic symbol t
QUADRUPLE 2INPUT POSITIVE
J. N PACKAGES
1
2
3
10
SN54ALS1035 (J,FH) SN74ALS1035 (N,FN)
pin assignments
Q~1Y
~2Y
~3Y
~4Y
~5Y
[>
1A.-J.!L
2A~
2B~
JA~
3B~
~1Y
~2Y
~3Y
J,N PACKAGES
1
lA
3Y
~4Y
4B~
11
nc
18
3A
lA
12
3Y
lY
10
38
18
13
3A
2A
11
4Y
lY
14
38
28
4A
nc
15
nc
48
2A
16
4Y
vce
nc
17
nc
13
2Y
GND 14
4A....lli.!....
nc
I.
:::s
FH,FN PACKAGES
9
10
28
"'C
o
a.
18
4A
2Y
19
4B
GND
20
Vec
TEXAS
INSTRUMENTS
3-203
PRODUCT GUIDE
1240
lAl~
lA3~
10 (1l
lA4
typical performance
TYPE
MAX
MAX
POWER
DISSIDELAY SOURCE
SINK
CURRENT CURRENT PATION
-12 mA
B mA
9
-15 mA
9
16 mA 47.5 mW
-15 mA 24 mA
9
SN54ALS1240 (J,FH)
2Al~
..."'tJ
lAl
12
lV4
2V4
13
2A2
2V4
13
2A2
~lV3
lA2
14
lV3
lA2
14
lV3
lV4
2V3
15
2A3
2V3
15
2A3
6
7
lA3
2V2
16
lV2
lA3
16
lV2
17
2 ... 4
6
7
2V2
17
2A4
lA4
18
lVl
lA4
18
lVl
t>
\1
(91
(7)
(51
2A4~
2Vl
2Vl
19
2G
2V2
10
GND
20
Vee
SN54ALS1241 (J,FH)
...
2Vl
19
2G
GND
20
Vee
2V4
pin assignments
~t---:--:-
EN
t>
\1
lA3~
lA4~
POWER
MAX
MAX
DISSISINK
DELAY SOURCE
CURRENT CURRENT PATION
-12 mA
B mA
9
-15 mA
16 mA 47.5 mW
9
-15 mA 24 mA
9
9
10
2V3
(31
lAl~
2G 1191
o
Q.
.FH. FN PACKAGES
1 10
11
2Al
lV4
EN
lA2~
typical performance
2Al
12
poo...ill!.
2A2~
2A3~
1(; (1l
Low power version of 'ASL241, LS241
SN54ALS 1241
SN74ALS1241
SN74ALS1241-1
11
lAl
logic symbolt
OCTAL BUFFERS/LINE
Inon-inverted three-state outputs)
TYPE
Ill'
p.-illl.
l!!..-
2G 1191
J. N PACKAGES
1
lVl
1V2
\1~
t>
SN74ALS1240(N, FN)
SN74ALS1240-1 (N,FN)
1241
EN
lA2~
Low power version of 'ALS240, AS240
SN54ALS 1240
SN74ALS1240
SN7 4ALS 1240-1
pin assignments
logic symbolt
OCTAL BUFFERS/LINE
(inverted three-state outputs)
2Al
2A2
J. N PACKAGES
1
1181
(Ill
\1
(lSI
11
lAl
12
2Al
lV4
2A2
2V4
13
2A2
2V4
13
~lV3
lA2
14
lV3
lA2
14
lV3
2V3
15
2A3
2V3
15
2A3
lA3
16.
lV2
lA3
16
lV2
2V2
17
2A4
2V2
17
2A4
lA4
18
lVl
lA4
18
lVl
(91
2Vl
2Vl
19
2G
2V2
10
GND
20
Vee
(71
lSI
2A3
1171
2A4
2Al
lV4
Hr
12
3
4
t>
(131
11
1VI
~lV2
~lV4
EN
FH. FN PACKAGES
lG
lAl
131
2Vl
19
2G
10
GND
20
Vee
2V3
2V4
SN74ALS1241 (N,FN)
(')
G')
c:
c:
(1)
1242
logic symbolt
GBA 113)
QUADRUPLE BUS
TRANSCEIVERS
(inverted three-state outputs)
GAB 11)
A2~
MAX
MAX
SINK
DELAY SOURCE
CURRENT CURRENT
-12 mA
B mA
-15 mA
16 mA
-15 mA 24 mA
SN54ALS1242 (J,FH)
POWER
DISSIPATION
t>
2\1
A3~
A4~
B4
nc.
11
nc
nc
83
GAB
12
B4
Al
10
B2
13
B3
A2
Bl
Al
14
B2
A3
11
12
3
4
nc
(10)
3
4
nc
nc
15
nc
A4
13
GBA
16
81
GND
14
Vee
6
7
A2
nc
17
A3
18
nc
nc
A4
19
GBA
GND
20
Vee
~B2
191
~B3
18)
~B4
SN74ALS1242(N, FN)
SN74ALS1242-1 IN,FN)
3-204
FH. FN PACKAGES
C;AB
~81
Al~\11 <J
typical performance
TYPE
J. N PACKAGES
1
(11)
EN2
131
Low power version of ALS242, LS242
SN 54ALS 1242
SN74ALS1242
SN74ALS1242-1
pin assignments
ENI
TEXAS
INSTRUMENTS
POST OFFICE 80X 225012 . DALLAS. TEXAS 75265
9
10
PRODUCT GUIDE
1243
GBA (131
GAB (1)
QUADRUPLE BUS
TRANSCEIVERS
DELAY
SN54ALS 1243
SN74ALS1243
SN74ALS1243-1
MAX
MAX
SINK
SOURCE
CURRENT CURRENT
-12 mA
8 mA
16 mA
-15 mA
24 mA
-15 mA
SN54ALS1243 (J,FH)
POWER
01551-
<J
[>
2\7
~B2
A3~
tf-
A4~
tf-B4
B3
logic symbolt
10 111
lAl
lA2
lA3
lA4
EN
121
141
161
(81
[>
20 1191
MAX
SN74ALS1244A
SN74ALS1244A1
SN54ALS1244A (J,FH)
MAX
Al
A2
A3
A4
GND
B4
B3
B2
Bl
nc
GBA
Vee
-15mA
SINK
[>
DISSI
\7
J. N PACKAGES
(181 WI
(161 lY2
(141
lY3
(121
W4
-J
EN
POWER
(111
2Al
1131
CURRENT CURRENT PATlaN 2A2 (151
2A3
-12mA
8mA
2A4 1171
16 mA
-15mA
45mW
DELAY SOURCE
9 ns
9 ns
9 ns
nc
8
9
10
11
12
13
14
FH. FN PACKAGES
11 nc
1 nc
2 GAB 12 B4
13 B3
3 nc
14 B2
4 Al
15
nc
5 nc
16 Bl
6 A2
17 nc
7 nc
18 nc
8 A3
19 GBA
9 A4
10 GND 20 vee
pin assignments
typical performance
SN54ALS1244A
GAB
SN74ALS1243 (N,FN)
OCTAL BUFFERS/LINE
TYPE
(11)
ITBI
1101
1
2
3
4
5
6
7
PATION
1244
\71
A2~
typical performance
J. N PACKAGES
ENI
EN2
Al~
TYPE
pin assignments
logic symbolt
\7
191
171
151
131
2Yl
2Y2
2Y3
2Y4
1
2
3
4
5
6
7
8
9
10
lG
lAl
2Y4
lA2
2Y3
lA3
2Y2
lA4
2Yl
GND
11
12
13
14
15
16
17
18
19
20
2Al
lY4
2A2
lY3
2A3
lY2
2A4
lYl
2G
Vee
FH. FN PACKAGES
11 2Al
1 1~
2 lAl 12 lY4
3 2Y4 13 2A2
4 lA2 14 lY3
5 2Y3 15 2A3
6 . lA3 16 lY2
7 2Y2 17 2A4
8 lA4 lB lYl
9 2Yl 19 2G
10 GND 20 Vee
II
24mA
SN74ALS1244A (N,FN)
1245
logic symbolt
G (19)
DIR (1)
pin assignments
A I r \71
<J
C> 2\7
typical performance
A2*TYPE
SN54ALS 1245
SN74ALS1245
SN74ALS1245-1
DELAY
8
8
8
SN54ALS 1245 (J,FH)
POWER
MAX
MAX
SINK
OISSI
SOURCE
CURRENT CURRENT PATlaN
-12 mA
8 mA
-15 mA
16 mA
113 mW
-15 mA
24 mA
J. N PACKAGES
G3
3 ENI IBAI
3 EN2 [AB[
A3~
A4~
A5~
A6~
A7~
A8 ::::.....-
118)
tEBl
1171
~B2
B3
151 B4
~
~
~
13)
B5
B6
B7
1
2
3
4
5
6
7
8
9
10
DIR
Al
A2
A3
A4
A5
A6
A7
A8
GND
11
12
13
14
15
16
17
18
19
20
B8
B7
B6
B5
B4
B3
B2
Bl
G
vec
FH. FN PACKAGES
1 DIR
11 88
12 B7
2 Al
3 A2
13 B6
4 A3
14 B5
15 B4
5 A4
16 B3
6 AS
7 A6
17 B2
8 A7
18 Bl
19 G
9 AB
10 GND 20 vee
~B8
SN74ALS1245 (N,FN)
TEXAS
INSTRUMENlS
3-205
PRODUCT GUIDE
1616
16- x -16-BIT MULTIMODE MULTIPLIERS
Multiplies Any Combination of Unsigned, Signed, Integer, or

Fractional Inputs
Registered Inputs and Outputs
55 ns Typical Unclocked Multiply Time
Comparable to TRW's MPY-16HJ
Power Dissipation Approximately 1,5 W
Choice of Single-Signed, Double-Signed, Unsigned, or

Signed Fractionally Adjusted Output
3-State Outputs
Ideal for Signal Processing, Including Digital Filters, FFTs,

and Automatic Line Integration
Overflow Detected if a Combination of Input Data and/or

Output Formats Result in a Number that Cannot be
Represented
Rounding is Provided for Both Integer and Fractional

Results
Flexible Input-Output Format Aids in Expansion to Multiple

Precision Results
Output may be Complemented
Package Options Include Both Plastic and Ceramic Chip

Carriers in Addition to Plastic and Ceramic DIPs
Dependable Texas Instruments Quality and Reliability
logic symbol
pin assignments
JD PACKAGE
16 X 16 MULTIPLIER
<I>
'AlS1616
C.
....
(")
G)
C
34
PR2S
3
4
X2
35
PR26
Xl
36
PR27
XO
27
OELS
38
PR29
CLKP
39
PR30
CLKY
40
PR31
PR2B
YO/PRO
41
CLKOP
10
Y1/PRl
42
OEMS
11
Y2/PR2
43
OVR
OPO
OP1
12
Y3/PR3
44
13
Y4/PR4
45
OP2
OP2
14
Y5/PR5
46
GND
15
RND
CHGSIGN
ClK X
ClK Y
c:CD
X4
X5
X
PR'V
X15
{
{'
YIlN)'V
PR(OUT)
XO
SN54AlS1616 (JD)
YO/PRO
15
Y15/PR15
(25)
PR16
31
OVER FLOW 'V
3-206
33
X3
OtlS
ClK OP
...
X4
OMS
FT
ClK P
."
0
PR24
1
2
(40)
(43)
FT
Y6/PR6
47
16
Y7/PR7
4B
CHGSIGN
17
YB/PR8
49
18
19
Y9/PR9
50
Yl0/PR10 51
VCC
OP1
20
Y11/PRll
21
Y12/PR12 53
22
Y13/PR13 54
52
GND
OPO
RND
CLKX
X15
23
Y14/PR14 55
X14
24
Y15/PR15 56
X13
25
PR16
57
X12
26
27
PR17
PR18
58
59
Xl0
28
PR19
Xll
PR20
60
61
X9
29
20
PR21
62
X7
31
PR22
63
X6
32
PR23
64
X5
X8
PR31
OVR
SN74ALS1616 (JD)
TEXAS
INSfRUMENTS

contact the .factory,
PRODUCT GUIDE
1620, 1621, 1622, 1623

I~gic symbol, 'ALS1620 t
pin assignments

1
Low power version of AL5 620, 621, 622, 623
GAB
3
4
typical performance
TYPE
5N54AL51620
5N74ALS1620
SN74ALS16201
SN54ALS1621
SN74ALS1621
SN74ALS16211
SN54ALS1622
SN74ALS1622
SN74ALS16221
SN54ALS1623
5N74ALS1623
5N74ALS16231
OUTPUT
35tate
35tate
35tate
OC
O-C
OC
OC
OC
O-C
35tate
35tate
35tate
MAX
MAX
SOURCE
SINK
CURRENT CURRENT
-12
8 rnA
-15
16 rnA
-15
24 rnA
N/A
8 rnA
16 mA
N/A
24 rnA
N/A
N/A
8 rnA
N/A
16 rnA
24 rnA
N/A
-12
8 rnA
-15
16 rnA
-15
24 rnA
7
B
9
10
J. N PACKAGES
B8
GAB 11
A1
12 B7
13 B6
A2
A3
14 65
A4
15 B4
AS
16 63
17 B2
A6
A7
18 B1
19 GBA
A8
GND 20 Vee
FH. FN PACKAGES
1
GAB
11
B8
A1
12
67
3
4
A2
13
B6
A3
14
65
15
16
B4
A4
A5
B3
A6
17
A7
18
B1
A8
19
GBA
GND
20
Vee
10
B2
logic symbol, 'ALS1622 t
logic symbol, 'ALS1621 t

SN54ALS1620 (J,FH)
SN54ALS1621 (J,FH)
SN54ALS1622 (J,FH)
SN54ALS1623 (J,FH)
5N74ALS1620 (N,FN)
5N74ALS 16201 (N,FN)
SN74ALS1621 (N,FN)
5N74AL516211 (N,FN)
5N74AL51622 (N,FN)
5N74ALS16221 (N,FN)
SN74AL51623 (N,FN)
5N74ALS16231 (N,FN)
II
+J
CJ
::l
"'C
...o
0..
nc -
TEXAS
INSTRUMENTS
3-207
PRODUCT GUIDE
pin -ienmenu
1638,1639
J, N PACKAGES
OCTAL BUS mANSCEIVERS

"A" bus outputs are opencollector: "9" bus outputs are
three-state
.
81
DIR
AI
3
4
A2
82
6
7
'ALS1638-inverting logic
83
'ALS1639-true logic
Low power versions of 'ALS638, 'ALS639
_8_
9
10
SN54ALS1638
SN74ALS1638
SN74ALS1638-1
SN54ALS1639
SN74ALS1639
SN74AlS1639-1
A8
11
18
19
GND
20
86
85
84
83
82
81
'C"
Vec
FH. FN PACKAGES
85
MAX
MAX
SINK
DELAY SOURCE
CURRENT CURRENT
8 rnA
-12
mA
7 ns
16 rnA
7 ns
-15 rnA
24 rnA
-15 rnA
7 ns
-12 rnA
8 rnA
6 ns
16 rnA
8 ns
-15rnA
24 rnA
8 ns
-15rnA
SN54ALS1638 (J,FH)
SN54ALS1639 (J,FH)
..
"'C
Q.
SN74AlS1638 (N,FN)
SN74ALS1639 (N,FN)
86
87
88
DIR
A1
81
A2
82
A3
83
A4
84
(")
,...
A5
85
G')
C
A6
86
A7
87
A8
88
Ci
CD
t Pin numbers shown on logic symbols are fot J and N packages only.
nc - no Internai connection.
. 3-208
A5
A6
A7
14
15
16
88
87
84
typical peiformance
TYPE
A3
A4
11
12
13
TEXAS
INSTRUMENTS
DIR
11
Al
3
4
A2
A3
A4
A5
12
13
14
15
16
A6
11
A1
A8
18
19
GND
20
5
6
9
10
88
87
86
85
84
83
82
81
'C"
Vec
PRODUCT GUIDE
1640, 1641, 1642,

1643, 1644, 1645
pin assignments
o Low power versions of 'A LS640A, 'ALS641A, 'ALS642A,

'ALS643A, 'ALS644A, 'ALS645A
typical performance
MAX
TYPE
OUTPUT
DELAY
MAX
SOURCE
SINK
CURRENT
CURRENT
SN54A LS1640A
3-State
7 ns
-12mA
8 mA
SN74ALS1640A
3-State
7 ns
-15mA
16mA
SN74ALS1640A-1
3-State
7 ns
-15mA
24mA
SN54ALS1641
O'C
O-C
N/A
8mA
SN74ALS1641
N/A
16mA
SN74ALS1641-1
O-C
N/A
24mA
SN54ALS1642
O-C
N/A
8mA
SN74ALS1642
O-C
N/A
16mA
SN74ALS1642-1
O-C
N/A
24 mA
SN54A LS 1643
3-State
-12mA
8mA
SN74ALS1643
3-State
-15mA
16mA
SN74ALS1643-1
3-State
-15mA
24 mA
SN54ALS1644
O-C
N/A
8mA
SN74ALS1644
O-C
N/A
16mA
SN74ALS1644-1
O-C
SN54ALS645A
3-State
N/A
24mA
10 ns
-12mA
8 mA
SN74ALS645A
3-State
10 ns
-15mA
16mA
SN74ALS645A-1
3-State
10 ns
-15mA
24 mA
SN54ALS1640A (J,FH)
SN54ALS1641 (J,FH)
SN54ALS1642 (J,FH)
SN54ALS1643 (J,FH)
SN54ALS1644 (J,FH)
SN54ALS1645A (J,FH)
FH. FN PACKAGES
J. N PACKAGES
SN74ALS1640A (N,FN)
SN74ALS1641 (N,FN)
SN74ALS1642 (N,FN)
SN74ALS1643 (N,FN)
SN74ALS1644 (N,FN)
SN74ALS1645A (N,FN)
DIR
11
DIR
11
Al
12
67
Al
12
66
A2
13
66
68
68
67
A2
13
A3
14
65
A3
14
65
A4
15
64
A4
15
64
A5
16
63
AS
16
63
A6
17
62
A6
17
A7
18
81
A7
18
Bl
A8
19
"G
AS
19
rr
GND
20
vCC
GND
20
vCC
9
10
10
62
logic symbol, 'ALS1640A t
(19)
DIR
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
Q)
"'C
logic symbol, 'ALS 1641 t
III
C!J
....(,)
(19)
DIR
:::J
"'C
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
...0
a.
nc -
TEXAS
INSTRUMENTS
3-209
PRODUCT GUIDE
1640, 1641, 1642,

1643, 1644, 1645 continued
logic symbol, 'ALS 1643 t
OIR
OIR
Al
Bl
A1
B1
A2
B2
A2
B2
A3
B3
A3
B3
A4
B4
A4
B4
A5
B5
A5
B5
A6
B6
A6
B6
A7
B7
A7
B7
A8
B8
A8
B8
logIc symbol, 'ALS 1644 t
logic symbol, 'ALS1645At
...
OIR
OIR
s::::
A1
B1
A1
B1
A2
B2
A2
B2
A3
B3
A3
B3
A4
B4
A4
B4
A5
B5
A5
B5
A6
B6
A6
B6
A7
B7
A7
B7
A8
B8
A8
B8
."
0
0-
.(")
r+
Q
s::::
c:
CD
3-210
TEXAS
INSTRUMENTS
PRODUCT GUIDE
2620,2623
pin assignments
J,N PACKAGES
OCTAL BUS
TRANSCEIVERS/MaS DRIVERS
Bidirectional bus transceivers for

driving MaS devices
Local bus latch capability
I/O ports have 25 ohm series
resistors so no external resistors
are required
Choice of True or Inverting logic
3-State outputs
B8
GAB
11
B8
A1
12
B7
A1
12
B7
A2
13
B6
A2
13
B6
A3
14
B5
A3
14
B5
A4
15
B4
A4
15
B4
A5
16
B3
A5
16
B3
A6
17
B2
A6
17
B2
A7
18
B1
A7
18
B1
A8
19
GBA
A8
19
GBA
GND
20
VCC
10
GND
20
VCC
MAX
SOURCE
SINK
CURRENT
CURRENT
48 mA
SN54AS2620
-12mA
SN74AS2620
-15mA
64mA
SN54AS2623
-12mA
48 mA
SN74AS2623
-15mA
64mA
SN54AS2620 (J,FH)
SN54AS2623 (J,FH)
11
10
MAX
TYPE
GAB
typical performance
FH,FN PACKAGES
SN74AS2620 (N,FN)
SN74AS2623 (N,FN)
logic symbol t AS2623
II
...,
(.)
::::J
"C
...o
a.
TEXAS
INSTRUMENlS
3-211
PRODUCT GUIDE
2640, 2645
pin assignments
J,N PACKAGES
OCTAL BUS TRANSCEIVERS/MOS DRIVERS
Bidirectional octal bus transceivers for driving

MOS devices
I/O ports have 25 ohm series resistors so no
external resistors are required
Choice of true or inverting logic
3~tate outputs
typical performance
MAX
MAX
SOURCE
SINK
CURRENT
CURRENT
SN54AS2640
-12mA
48mA
SN74AS2640
-15mA
64mA
SN54AS2645
-12mA
48mA
SN74AS2645
-15mA
64mA
TYPE
SN54AS2640 (J,FH)
SN54AS2645 (J,FH)
III
."
~
0
0.
c::
(')
,..
G)
c::
c:
CD
DIR
11
B8
DIR
11
B8
A1
12
B7
A1
12
B7
A2
13
B6
A2
13
B6
A3
14
B5
A3
14
B5
A4
15
B4
A4
15
B4
A5
16
B3
A5
16
B3
A6
17
B2
A6
17
B2
A7
18
B1
A7
18
B1
A8
19
A8
19
GND
20
Vee
GND
20
Vee
10
9
10
SN74AS2640 (N,FN)
SN74AS2645 (N,FN)
DIR
DIR
A1
B1
A2
B2
A3
A1
Bl
A2
B2
B3
A3
B3
A4
B4
A4
B4
A5
B5
A5
B5
A6
B6
A6
B6
A7
B7
A7
B7
A8
B8
AS
BS
3-212
FH,FN PACKAGES
TEXAS
INSTRUMENTS
PRODUCT GUIDE
8003
logic symbol t
DUAL 2-INPUT POSITIVE-NAND GATE

Dual version of 'ALSOO
1AJ1L
SN54ALS8003 (JG,FH)
pin assignments
&
lB~
2AJL
~1V
~2Y
SN74ALSS003 (P,FN) 2BJ.?L
FH,FN PACKAGE
JG,P PACKAGE
1
lA
nc
11
nc
lB
lA
12
2Y
nc
nc
13
14
nc
nc
2A
lY
GND
2Y
lB
15
2A
nc
16
nc
2B
lY
17
2B
VCC
nc
nc
18
19
nc
nc
GND
20
Vec
10
cu
"'C
.....
(.)
:::s
"'C
0.
t Pin numbers shown on logic symbols are for JG and P packages only.
TEXAS
INSfRUMENTS
3-213
PRODUCT GUIDE
'PAL 16LH
FIELD-PROGRAMMABLE
LOGIC, FIXED-OR ARRAYS
&
EN;;>1
32X64
Octal 16-input AND-OR-INVERT
b-----o
gate array
pin asslgnmonts
10
J, N PACKAGES
1
11
12
13
I/O
14
I/O
15
I/O
16
I/O
17
I/O
I
8
9 'I
18
I/O
19
20
Vee
10
GND
SN54PAL16L8A (J)
Co
C
I/O
b-. .I-4......-
I/O
SN74PAL16L8A (J,N)
-denotes fused Inputs
OE---------------------------------~~
CLK-------------------------------------l>
Quad 16-input registered AND-OR

~-------a
gate array
t--i--;-L-a
pin assignments
(")
r-----r----1~J---a
J, N PACKAGES
elK
11
OE
12
I/O
13
I/O
14
15
16
17
18
I/O
19
I/O
GND
20
Vee
10
SN54PAL16R4A (J)
I--r-----t-L- a
k:>-.....-~~+_--I/O
b-.....+-.,~+--I/O
b-...+-4-l~+-- I/O
b-.....+-.,~+_--I/O
SN74PAL16R4A (J,N)
4
-denotes fused inputs
3-214
0... .1-4.......-
h-.a-l~I-4- I/O
...o
O"....._ H - i / O
16
h-.a-li-oIIl-4- I/O
FIELD-PROGRAMMABLE
."
t>
0-. .-4+-1/0
'PAL 16R4
h-----O
TEXAS
INSTRUMENTS
PRODUCT GUIDE
'PAL16R6
FIELD-PROGRAMMABLE
LOGIC, FIXEDOR ARRAYS
0E--------------------------<fEi2---,
CLK---------------------------------P
r;;;--rI=O~-- a
Hex 16input registered ANDOR

gate array
pin assignments
r--I--""1----.:]~a
J, N PACKAGES
1
elK
11
OE
12
I/O
13
14
I
I
15
16
Q
Q
17
18
I
GND
19
I/O
20
Vee
10
~-..2r-~-+-'-I-
I/O
P--ed--.olt-t~-+--
I/O
SN74PAL16R6A (J,N)
SN54PAL16R6A (J)
'PAL16R8
FIELD-PROGRAMMABLE
CLK---------------------------------P
Octal 16input registered AND-OR

gate array
elK
11
OE
12
13
14
15
16
17
18
19
GND
20
Vee
10
SN54PAL16R8A (J)
a
a
J, N PACKAGES
2
"'C
pin assignments
CD
OE------------------------~~-_,
s
....
(!)
(,)
::l
"'C
0
a..
a..
a
Q
Q
Q
SN74PAL16R8A (J,N)
TEXAS
INSTRUMENTS
POST OFFiCe BOX 225012 OALLAS. TeXAS 75265
3-215
PRODUCT GUIDE
'PAL20L8
FIE LD-PROG RAMMABLE
&
40X64
LOGIC. FIXED-OR ARRAYS
EN ;;.1 \lh-_ _ _ _ 0
2
Octal 20-input AND-OR:INVERT
h-----O
gate array
pin assignments
h-..................-I/O
14
JT. NT PACKAGES
1
13
h-~~I-II_
14
IIPRELOAD
15
16
17
110
110
18
110
19
110
20
110
21
110
10
22
11
23
12
GND
24
VCC
20
1/0
h-...~......-I/O
h-+l1-oII....-1I0
h-~~~-I/O
h-~~I-b- 1/0
SN54PAL20L8A (JT)
SN74PAL20L8A (JT.NT)
'PAL20R4
FIE LD-PROG RAMMAB LE

...'"0
OE------------------------------~~
OUTCLK-------------------------------------[)
&
gate array
Co
t:
n
,..
1----0
40X64
t--;---1_L- 0
pin assignments
t---;---1----l--
JT. NT PACKAGES
1
OUTCLK
13
14
IIPRELOAD
15
110
16
17
18
110
Q
Q
19
20
21
110
10
22
110
11
23
12
GND
24
VCC
SN54PAL20R4A (JT)
3-216
TIE
1-1-l.~L-o
k>-...-..,~+--I/O
k>-....f-..........+-- 1/0
P-.....f-+l.......+--I/O
b-....f-+l~+-- 1/0
SN74PAL20R4A (JT.NT)
TEXAS
INSTRUMENTS
PRODUCT GUIDE
'PAL20R6
FIELDPROGRAMMABLE
OE
-"'EN2
C1
-I.:
OUTCLK
~
--;4OX64
Hex 20input registered AND-OR

gate array.
pin assignments
12
JT, NT PACKAGES
1
OUTCLK
24
Vee
23
22
I/O
21
20
19
18
17
16
15
14
13
a
a
a
a
a
a
10
11
I
GND
12
--7-
f-?"- ...
20
~
~
---
p..;L ,.,
R~
~
( 10
r----..
\I
a
a
a
a
a
1"""-"\
EN ~1
-2
""
....
......
......
~.'"
I/O
110
....
OE
r----..
r4r--
I/O
I/PRELOAD
2\1
r--
IcO
~1
SN54PAL20R6A (JT)
SN74PAL20R6A (JT,NT)
'PAL20R8
denotes fused inputs.
II
FIELDPROGRAMMABLE
OE
1N2
OUTCLK
Octal 2O-input registered AND-QR
JT. NT PACKAGES
24
3
4
I
I
5
6
20
19
18
..
~1D
pin assignments
OUTCLK
1=0
;;'1
40X 64
gate array.
''1C1
r--s:- r-c--
Vec
23
22
a
a
a
a
a
a
a
a
21
17
9
10
16
11
15
14
12
GND
13
SN54PAL20R8A (JT)
12~
1-,4
----
20
e>-:L
I/PRELOAD
~
8
OE
h
~
~
~
2'il
1"""-"\
,.
....
....(J
"C
::s
o
~
a
a
a
a
r----..
SN74PAL20R8A (JT,NT)
TEXAS
INSTRUMENTS
3217
PRODUCT GUIDE
'PL839, PL840
FIELD-PROGRAMMABLE
OE'
LOGIC ARRAYS
0E2~~~L_'
'PL839 - three-state outputs
'PL840 - open-collector outputs
Programmable output polarity
o
o
o
pin assignments
J, JT, NT PACKAGES
3
4
5
6
8
lEI
14
15
16
17
18
19
20
21
10
11
0
0
22
12
GND
24
'PL839 h~s 3-state (V) outputs; 'PL840 has open-collector (S2) outputs.
23
Vee
SN54PL839 (J)
SN74PL839 (JT,NT)
SN54PL840 (J)
SN74PL840 (JT,NT)
."
~
Q.
c:::
(')
r+
G")
c:::
Ci
CD
3-218
TEXAS
INSTRUMENTS
PRODUCT GUIDE
'PALR19L8
FIELD-PROGRAMMABLE

Octal 19-input registered AN D-OR-I NV ERT
: - - - EN ;;'1
&
38 X 64
gate array
f-4r-*f---
pin assignments
13
I/O
14
INCLK/PRELOAD
I/O
15
I/O
16
I/O
I/O
17
I/O
I/O
18
I/O
I/O
19
I/O
I/O
20
I/O
I/O
21
I/O
10
I/O
22
11
I/O
23
I/O
12
GND
24
VCC
SN54PALR19L8 (JT)
OC2
1C2
20
INCLK
JT, NT PACKAGES
I/O
11,
~'"
.-
~<
r--r-- -
...
...
.....
"'"
f---
P---7'-~
8
..
'"" .....
i ~,
......
I
[>
..
- ..
~,
i ~,
~ ~L
~-
MO
M1
,2L
r+-
'"'
6.<
"'"
I/O
I/O
I/O
I/O
I/O
I/O
.oL
SN74PALR19L8 (JT,NT)
'PALR19R4
FIELD-PROGRAMMABLE
,.IEN2
DE
OUTCLK
gate array
&
38X64
pin assignments
OUTCLK
13
OE
I/O
14
INCLK/PRELOAD
I/O
15
I/O
I/O
16
I/O
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
10
I/O
22
I/O
11
I/O
23
I/O
12
GND
24
VCC
SN54PALR19R4 (JT)
;;'1
.4-
C1
1=0
I/O
OC2
1C2
INCLK
11
I / O - + - 20
r
-
SN74PALR19R4 (JT,NT)
,..,
~ ....
MO
M1
[>
~-
4-
+
-+4--+-
~=-----4--
2V
JT, NT PACKAGES
1
E.
.<
4,
+J
a
a
(,)
::l
"C
EN
;;'1
V
""\
""
""\
...
""
...
I/O
...
..
I/O
...
...
I/O
..
I/O
...
"'"
TEXAS
INSTRUMENTS
o...
0..
3-219
PRODUCT GUIDE
'PALH19H6
FIELD-PROGRAMMABLE
DE
'1.EN2
G C1
OUTCLK
r--&
38 X 64
Hex 19-input registered AN D-OR

gate array
)110
pin assignments
JT. NT PACKAGES
1
OUTCLK
13
OE
liD
14
INCLK/PRELOAD
I/O
15
I/O
I/O
16
I/O
17
Qi
I/O
18
I/O
19
I/O
20
I/O
21
10
I/O
22
INCLK
I/O~
I/O
23
I/O
12
GND
24
VCC
OC2
1C2
20
~~-
MO
M1
t>
r---
-4---
,6
-0
~O
-0
>
EN
;;:>1
'V ..... -
:'l
...
...
..
-0
>
~
2/
>
r-*
r*
~~r+-
+
+
r-
1-0 2'V - 0
t--
I/O
11
SN54PALR19R6 (JT)
III...
;;'1
..
_
----...
f--O
_--P'
P'
110
I/O
SN74PALR19R6 (JT.NT)
'PALH19H8
FIELD-PROGRAMMABLE
-c
DE
'1EN2
~ C1
OUTCLK
c.
c:
n
r+
r---;-
Octal 19-input registered AND-OR
3aX 64
gate array
pin assignments
G')
c:
JT. NT PACKAGES
c:CD
OUTCLK
13
OE
I/O
14
INCLK/PRELOAD
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
10
I/O
22
11
I/O
23
I/O
12
GND
24
VCC
SN54PALR19R8 (JT)
3-220
INCLK
OC2
1-1C2
I/O~ 20
r
2/
f-+-~,.,
MO
M1
t>
~-
~-=-----
f-+--
TEXAS
INSTRUMENTS
liD 1-0 2'V ! , - - O
f4-
r - f--O
~
,...-- f--O
~
4-
~a
SN74PALR19R8 (JT.NT)
;;'1
f--O
f - - 1--0
t - - 1--0
~
t - - 1--0
~
PRODUCT GUIDE
'PALT19L8
FIELD-PROGRAMMABLE
~ r-=--EN
38X 64
Octal 19-input latched AND-OR-INVERT
;;'1
i-JL-
\1
gate array
r-+-
pin assignments
INLE
OC2
JT, NT PACKAGES
1
13
I/O
14
INLE/PRELOAD
I/O
15
I/O
16
I/O
I/O
17
I/O
I/O
18
I/O
I/O
19
I/O
I/O
20
I/O
I/O
21
I/O
I/O
20
~
I
I/O
22
I/O
23
I/O
12
GND
24
VCC
I !,
~~'"
MO
Ml
2 ...
t>
..
I/O
4=
~~
=4=
.-
r--""
.... .
------
I/O
I}
"'\
I/O
....
..
....
"" ......
I---
r4-
'"'I
I/O
I/O
I/O
...
SN74PALT19L8 (JT,NT)
'PALT19R4
FIELD-PROGRAMMABLE
~EN2
OE

OUTCLK
gate array_
&
38X64
pin assignments
OUTCLK
13
OE
I/O
14
INLE/PRELOAD
I/O
15
I/O
I/O
16
I/O
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
10
I/O
22
I/O
11
I/O
23
I/O
12
GND
24
VCC
;;'1
C1
1-0
I/O
OC2
11
1C2
20
I/O
~
r---
~ ....
...
t>
~-
-*
P-
t-"\
>
I--- EN
;;'1
\1--- .~
-+-
-'""
SN74PALT19R4 (JT,NT)
TEXAS
INSTRUMENTS
..
.- ..
"' ....
r-- --... .... .
---
~4
-4
CJ
::::s
-C
...o
c..
... ..
...,
+
-
MO
M1
2\1
JT, NT PACKAGES
SN54PALT19R4 (JT)
"\
.-
~':'
8
P-7'-~
10
11
SN54PALT19L8 (JT)
1C2
11"
....
...
I/O
I/O
I/O
I/O
'""
....
3-221
PRODUCT GUIDE
'PALT19R6
FI E LD-PROG RAMMAB LE
~----------------------~~~--,
oUTCLK----------------------------------~
Hex 19-input latched AND-OR
&
38 X 64
gate array
pin assignments
JT, NT PACKAGES
1
OUTCLK
13
DE
I/O
14
INLE/PRELOAD
I/O
15
I/O
I/O
16
I/O
17
I/O
18
lEI..
I/O
19
I/O
20
I/O
21
10
I/O
22
I/O
11
I/O
23
I/O
12
GND
24
VCC
~_~~--.;;~H-T-IIO
0-...+-......--+-- 1/0
SN74PALT19R6 (JT,NTl
'PALT19R8
FIELD-PROGRAMMABLE
"'C
Octal 19-input latched AN 0-0 R
c.
c
n
,...
a
110--';.;.'1---1
SN54PALT19R6 (JTl
iNTI -------Q
~--------------------~~~~~
OUTCLK----------------------------------~
gate array
pin assignments
G')
C
JT, NT PACKAGES
c:
CD
OUTCLK
13
I/O
14
INLE/PRELOAD
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
10
I/O
22
11
I/O
23
I/O
12
GND
24
VCC
SN54PALT19R8 (JT)
3-222
iNTI
OE
"
I/O
a
a
-=
a
a
SN74PALT19R8 (JT,NT)
TEXAS
INSTRUMENTS
PRODUCT GUIDE
TBP14510 ('5287) This product Is no longer In production. it Ia replaced by TBP24S10.

TBP145A 10 ('5387) This product Is no longer In production. it Is replaced by TBP24SA10.
TBP18522 ('5471) This product is no longer in production. It Is replaced by TBP28L22.
TBP185A22 ('5470) This product Is no longer In production. it Is replaced by TBP28LA22.
TBP18S030 ('S288)
logic Iymbol t
pin assignments
PROM32X8
PROGRAMMABLE READ-ONL V
MEMORIES
32 X8
Three-state outputs
Typical address access time
.. 25 ns
Typical power ... 400 mW
AO ~10)
A3 (13)
A4 (14)
TBP18SA03O ('S188)
}A~
A1 1111
A2 (12)
(15)
,......
A\l
~03
A\l
A\l
05
~Q4
(6)
A\l r--12L-07

pin assignments
PROM32X8
J, N PACKAGES
1 00
9 07
10 AO
2 01
11 Al
3 02
4 03
12 A2
13 A3
5 04
14 A4
6 05
15 G
7 06
~ao
32 X 8
AO (10)

.. _ 25ns
A1 1111
A2 112)
1131
Typical power . 400 mW
~01
A\l r---2!-Q2
A\l r---2!-06
EN
MEMORIES
~OO
logic symbol t
PROGRAMMABLE READ-ONL V
A\l
A\l
J NPACKAGES
00
9 07
10 AO
01
11 Al
02
12 A2
03
13
A3
04
14 A4
05
06
15 G
B GNO 16 Vce
1
2
3
4
5
6
7
A3
}A~
A4 1141
~1151
,...." EN
A~
A~ --EL-01
A~ --2L-Q2
A~
A~
A~
~03
(51
(6)
A~
(71
A~
(91
Q4
05
B GNO 16
as
07
Vee

TBP18542 ('5472) This product Ia no longer In production. it is replaced by TBP28S42.

TBP185A42 ('5473) This product is no longer in production. it is replaced by TBP28SA42.
TBP18546 ('5474) This product is no longer In production. it I, replaced by TBP28S46.
TBP185A46 ('5475) This product is no longer In production. it Is replaced by TBP28SA46.
and N packages only.
TEXAS
INSTRUMENTS
3-223
PRODUCT GUIDE
TBP24S10
logic Iymbol t
MEMORIES
AO
A1
Three-state outputs
A2
A3
Typical power .. 375 mW
J, N PACKAGES
(5)
1 A6
9 03
2 A5
3 A4
10 02
11 01
00
4 A3
12 00
01
5 AO
13 G1
02
03
6 A1
14 G2
7 A2
15 A7
16 Vcc
(6)
256 X 4
.. 35 ns
Typical select time ... 20 ns
pin assignments
PROM 256X4
PROGRAMMABLE READ-ONLY
A4
A5
(12)
(3)
(2)
8 GND
A6
A7
02
For chip carrier oPtions and information,

EN
G1
logic Iymbol t
TBP24SA10
PROGRAMMABLE
REA~-ONLY
MEMORIES
AO
256 X 4
A2

... 35 ns
A4
A5
lEI...
J, N PACKAGES
A3
A6
Typical power .. , 375 mW
A7
132
01
(5)
(6)
A1
pin assignments
PROM 256X4
(7)
(12)
(4)
00
01
(3)
(2)
AQ
(1)
(9)
02
Q3
(15)
(14)
EN
(13)
'"tJ
c.
c:
...
(")
TEXAS
3-224
INSTRUMENTS
POST
OFFICE 80X 225012 DALLAS, TEXAS 75265
1 A6
9 03
2 A5
10 02
3 A4
11
4 A3
5 AO
12 00
13 G1
6 A1
7 A2
14 G2
15 A7
8 GND
16
01
Vcc

PRODUCT GUIDE
TBP24841 (,5476)
MEMORIES
logic Iymbol t
1024 X 4
Al
Three-state outputs
___ 40 ns
A2
Typical select time ___ 20 ns

Typical power ___ 475 mW
J, N PACKAGES
10 G2
11 OJ
2 A5
J A4
12 02
PROM 1024 X 4
AD
1 A6
(51
A3
00
01
A4
A5
02
A6
Q3
A\l
A7
AS
A9
1024 X 4
Al
A2

___ 40 ns
A3

Typical power ___ 475 mW
Al
A2
15 A9
16 A8
Gl
17 A7
GND
lB
Vcc
pin _ignments
PROM 1024 X 4
14 00
6
7
logic Iymbol t
AD
AD
EN
(;1
TBP24SA41 (,8477)
AJ
G2
MEMORIES
lJ 01
(51
J, N PACKAGES
A6
10 G2
11 OJ
2 A5
12 02
3 A4
4 A3
13 01
5 AD
14 00
15 A9
6 Al
1
(61
(14)
(13)
AQ
A4
AQ
A5
(121
AQ
A6
(111
AQ
A7
00
01
02
03
AS
A2
Gl
15 A8
17 A7
GND
18
Vcc

A9
02
EN
Gl
II
Cl)
"'C
"S
TBP24881 (,8454)
MEMORIES
2048X4
Three-state outputs
___ 45 ns
logic symbol t
PROM 2048 X4
AO
Al
A2
(51
(61
(71
(141
A4
Typical select time _ , _ 20 ns
A6
Typical power _ , , 625 mW
A7
J, N PACKAGES
10 G
11 Q3
2 A5
12 02
3 A4
4 A3
13 01
14 00
5 AO
6 Al
15 A9
16 AB
7 A2
B Al0 17 A7
9 GND 18 Vce
1 A6
A3
A5
(!'
pin ISIignments
A~7
00
01
02
Q3
AS
::::s
"'C
o
...
Q.

A9
Al0
TEXAS
INSTRUMENTS
3-225
PRODUCT GUIDE
TBP24SA81 (,S455)
MEMORIES
2048 X 4
., .45 ns

logic Iymbol t
pin asignments
J, N PACKAGES
1 AS
10lr
PROM 2048 X4
AO (5)
2 A5
3 A4
A1...!!!.A2 (7)
4 A3
A3..!!l...A4 (3)
5 AO
14 00
AQ
~01
S Al
7 A2
AQ
~03
8
9
15 A9
16 A8
17 A7
AQ
>A~7
AS-ELA6 (1)
A7$--
~ao
AQ ~Q2
A8~
A9....!!!L-
TBP28L22
AO-ill..-
256 X 8
Three-state outputs
A2-EL-
. 45 ns
Typical select time .. 20 ns
A1~
A3~
A4
(5)
A5
(17)
A7 (19)
(1S) ,....,.
G1
n
r+
TBP28LA22
c;)
LOW~OWERPROGRAMMABLE
C'
READONL Y MEMORIES
0:
CD
e
e
256 X8
Opencollector outputs
e
e
. 45 ns
AS~
02
...
o"
c..
pin assignments
PROM 256 X S
READ-ONL Y MEMORIES
(15) ,.....".
]A~
~EN
(6)
A"V
A"V
A"V
A"""
A"V
A"V
A"V
A"V
171
(8)
(9)
(11)
(12)
(13)
(14)
J, N PACKAGES
11 04
2 Al
12 05
3 A2
13 06
4 A3
14 07
5 A4
15 <Tl
6 00
16 02
7 01
17 A5
8 Q2
18 AS
9 03
19 A7
10 GND 20 Vcc
1 AO
ao
01
02
03
04
05
OS
07
For chip carrier options and Information.

logic Iymbol t
pin assignments
J, N PACKAGES
1 AO
11 04
PROM 256X8
AO-ill..A1....E!.-
A2~
A3~
A4~
A5...!!:!!..-
]A~
A6...!.!!!...(19)
A7
(16) ""
02
(15) ...... M E N
G1
(S)
AQ
(7)
AQ
(8)
AQ
(9)
AQ
ao
2 Al
01
3
4
Q2
03
~Q4
AQ ~05
AQ
AQ
AQ
(13)
06
~Q7
3-226
18 VC(
EN
logic Iymbol t
Al0
GND

A10...!!!.- 1<!,
o~
11 03
12 Cl2
13 01
TEXAS
INSTRUMENTS
A2
A3
12 05
13 06
5 A4
14 07
15 Gl
6 00
7 01
17 A5
8 02
18 A6
16 G2
9 03
19 A7
10 GND 20 VCC
For chip carrier options and Information.

PRODUCT GUIDE
TBP28l42
logic symbol t
pin assignments
LOW-POWER PROGRAMMABLE
READ-ONL V MEMORIES
512 X 8
Three-state outputs
AO.-!.ll..-
A\l
Al..EL-
A2~
A3
A4~
AS~
A6
A7
AS
0-
A\l
A\l
(4)

__ . 55 ns
J, N PACKAGES
11 04
AO
PROM 512 X 8
>A5~1
A\l
A\l
(17)
(18)
A\l
(19)
(15)
A\l
r-.....
A\l
(6)
(7)
(8)
(9)
(11)
(12)
(13)
(14)
1
00
AI
12 05
Q1
A2
13 06
02
A3
14 07
03
A4
15
00
16 A5
Ql
02
17 A6
18 A7
04
05
06
07
EN
9
10
03
19 A8
GND
20
Vee

II
...,
(J
~
"'C
Q.
nc -
TEXAS
INSTRUMENTS
3-227
PRODUCT GUIDE
TBP28L45
TBP28L46
READ-ONLY MEMORIES
512 X8
Three-state outputs
55 ns
Typical select time 25 ns
Typical power 275 mW
logic symbol t
pin assignments
PROMS12X8
AO~
(9)
A1....ill.A2 (6)
A\J
A\J
A3~
>A5~1
A4--ill.(3)
~:
A\J
A\J
A\J
A\J
A\J
(2)
A74-
A8~
G4~
G3~
A\J
..!.:...-
(10)
(11)
(13)
(14)
(lS)
(16)
(17)
00
01
02
03
04
OS
06
07
&
EN
G2..l!.!!.-
Gl~
TBP28L85A
TBP28L86A
READ-ONLY MEMORIES
II...
"'0
1024 X 8
Three-state outputs
___ 65 ns
Typical power _ 275 mW
AO~O
Al~
A2~
A\J
A\J
A3~
A4~
A\J
A
1~23
A\J
A\J
A\J
A7--ill.-
A8~
A\J
A\J
A9~
(9)
(10)
(11)
(13)
(14)
(lS)
(16)
(17)
00
01
02
03
04
OS
06
07
G4~ ~
&
G3....!!!L-
o
c.
r:::
6
7
8
9
10
11
12
EN
G2~
Gl~
TBP28L86 ('LS478) This product Is no longer in production, It Is replaced by TBP28L86A.
c:
CD
3-228
G2
G3
01
G4
22 nc
23 A8
24 Vce

r+
r:::
18
19
20
21
J, N PACKAGES
13 03
1 A7
14 04
2 A6
A5
15 as
3
16 06
4 A4
17 07
5 A3
18 G2
6 A2
19 G3
7 Al
20 Gl
8 AO
21 G4
9 00
22 A9
10 01
11 02
23 A8
12 GND 24 Vec
(')
G')
A2
Al
AO
00
01
02
GND
15 05
16 06
17 07
pin assignments
PROM 1024 X 8
A6~
3 A5
4 A4
5 A3
For chip carrier oPtions and Information,

contact tha factory.
logic symbol t
AS-W---
J, N PACKAGES
1 A7
13 03
14 04
2 A6
TEXAS
INSTRUMENTS
PRODUCT GUIDE
TBP28L165
LOW-POWER PROGRAMMABLE
READ-ONLY MEMORIES
2048 X 8
Three-state outputs
... 65 ns
Typical select time. , , 30 ns
Typical power, , , 350 mW
pin assignments
logic symbol t
J. N PACKAGES
PROM 2048 X 8
AO
Al
A2
A3
A4
AS
AS
A7
A8
A9
Al0
(8)
(7)
(5)
(5)
A\l
A\l
(4)
A\l
(3)
A\l
A\l
A~7
(2)
(11
A\l
(23)
A\l
(22)
(21)
A\l
(9)
(10)
(11)
(13)
(14)
(15)
(15)
(17)
A7
13 03
AS
14 04
as
AS
IS
00
A4
16 06
01
S A3
17 07
02
A2
18 G2
03
Al
19 G3
04
AO
20 G1
os
00
21
Al0
OS
10
01
22
A9
07
11
02
23
AS
12
GND
24
Vec
10
G3
G2

EN
01
TBP28L166
pin assignments
logic symbol t
J. N PACKAGES
READ-ONL Y MEMORIES
AO
2048 X 8
Three-state outputs
Al

",65 ns
Typical select time, , , 30 ns
A2
A3
A4
AS
A6
A7
A8
A9
Al0
(8)
(7)
(5)
(5)
A\l
A\l
(4)
A\l
(3)
A~7
(2)
(1)
A\l
A\l
A\l
(23)
(22)
(21)
A\l
A\l
(9)
(10)
(11)
(13)
(14)
(15)
(16)
(17)
A7
13 03
A6
14 04
AS
A4
16 06
01
5 A3
17 07
02
03
A2
18 G2
Al
19 G3
04
AO
20 01
05
00
21
Al0
OS
10
01
22
A9
11
02
23
AS
12
GND
24
Vec
07
G3
EN
IS
as
00
10
G2
II

~
(.)
01
:::s
"C
o
a-
n..
nc -
TEXAS
INSTRUMENlS
3-229
PRODUCT GUIDE
TBP28S42
logic symbol t
pin
PROM 512X 8
PROGRAMMABLE READ'()NL Y
MEMORIES
512 X 8
Three-state outputs
___ 35ns
Typical power __ . 500 mW
AO....!!L-
0
A\J
Al~
A2
A3
A4
A\J
(3)
(4)
A\J
'>A5~1
(5)
A5~
A6
A7
A8
A\J
A\J
A\J
(17)
(18)
A\J
(19)
(15) ,....."
A\J
(6)
(7)
(8)
(9)
(11)
(12)
(13)
(14)
00
AO
11
Al
12 05
04
01
A2
13 06
02
A3
14 07
03
A4
15
04
6
7
00
16 A5
01
17
02
18 A7
03
as
06
07
EN
10 GND
G
A6
19 A8
20 VCC

II...
-c
c.
n
r+
'C:
G')
c:
c:
CD
nc - no internal connectlon_
3-230
a~ignments
J, N PACKAGES
TEXAS
INSTRUMENTS
POST OFFiCE BOX 225012 DALLAS. TEXAS 75265
PRODUCT GUIDE
TBP28SA42
logic symbol t
pin assignments
MEMORIES
512 X 8
35 ns

AO
(1)
A1~
A2
A3
A4
AQ
(3)
(4)
AQ
(5)
AQ
AQ
>A5~1
A5~
AQ
AS~
A7~
A8~
G
TBP28S45
TBP28S46
(15) ,........
AQ
AQ
AQ
8
EN
A\l
A4
13 06
A3
14 07
A4
15 G
6 00
7 01
17 A6
05
02
18 A7
03
19 A8
~06
(14)
A1
A2
04
07
10 GND
16 A5
20
Vee
(S)
(5)
>A5~1
(4)
(3)
A\l
(11)
00
01
02
~03
A\l ~04
A\l
A5
AS...E.!-
A\l
A7.J!L-
A\l
A8~
G4~ ~
&
(10)
(15)
05
(16)
06
A\l r - i l l L - 0 7
G3~
EN
G2....!!!!L(20) r--.,
J, N PACKAGES
13 03
14 04
2 A6
15 05
3 A5
16 06
4 A4
17 07
5 A3
A2
18 G2
6
19 G3
7 A1
20 G1
B AO
21 G4
9 00
1 A7
(9)
A\l
Typical select time . 20 ns
03
12 05
2
3
4
. pin assignments
A3
35 ns
(12)
02
PROM 512 X 8
A2
(9)
(11)
01
AO....!!L-
MEMORIES
(7)
(S)
logic symbol t
512 X 8
~OO

A1~
Three-state outputs
J. N PACKAGES
1 AO
11 04
PROM 512 X S
22
11
23 AS
02
12 GND 24
<h
III
nc
10 01
Vee

Q)
"C
S
...,
(!)
TBP28SA46
logic symbol t
pin assignments
PROM 512 X 8
MEMORIES
512 X 8
Opencollector outputs
.. 35 ns

AO
(8)
A1~
A2~
A3~
A4
A5
AS
AQ
AQ
>A5~1
(4)
(3)
AQ
AQ
(2)
AQ
A7~
AS
AQ
(23)
AQ
AQ
G4~ ----:s;-
G3~
G2~
G1~
(9)
(10)
(11)
(13)
(14)
(15)
(16)
(17)
00 -
01
02
03
04
05
06
07
EN
(,)
J, N PACKAGES
13 03
14 04
3 A5
15 05
16 06
4 A4
17 07
5 A3
18 G2
6 A2
19 G3
7 A1
20 G1
8 AO
21 G4
9 00
10 01
22 nc
11 02
23 A8
12 GND 24 Vee
:::l
"C
1 A7
2 A6
...
c.

nc -
TEXAS
INSTRUMENTS
3-231
PRODUCT GUIDE
TBP28S85A
PROGRAMMABLE REAO-ONL V
MEMORIES
1024 X 8
Three-state outputs
.,.35 ns
Typical select time . 20 ns
Typical power .. , 550 mW
logic Ivmbol t
pin assignments
PROM 1024 X 8
AO~O
Al~
A2~
A\l
A\l
A\l
A3--ill-
A4~
AS-W-
AS~
A7~
>A 1~23
A\l
A\l
A\l
A\l
A\l
A8.....E&-
A9~ 9
G4-.!lli.l:::::.. ~
G3~
G2~
Gl~
(91
(101
-(111
(131
(141
(151
(161
(171
ao
01
02
03
04
05
OS
07
J,
1
2
3
4
5
6
7
S
9
10
11
12
N PACKAGES
A7
13 03
A6
14 04
A5
15 05
A4
16 06
17 Q7
A3
A2
18 G2
AI
19 G3
AO
20 01
00
21 C4
01
22 A9
02
23 AS
GND 24 Vce
For ch ip carrier oPtions and information,

EN
TBP28886 ('8478)
TBP2888660 These products are no 'Ionger in production. They are replaced by TBP28S86A and TBP28S86A50.
...'"C
o
Co
c:
TBP28S86A
logic svmbol t
PROGRAMMABLE REAO-ONL V
MEMORIES
AO~O
,.
(')
~
Cl
c:
c:
CD
pin assignments
PROM 1024 X 8
Al-.l!L-
1024 X 8
Three-state outputs
Tvpical address access time
. 35 ns
Typical power ... 550 mw
A\l
A2~
A\l
A\l
A3--ill-
A4~
AS--'E.-
AS~
A7~
>A 1023
A\l
A\l
A\l
A\l
A\l
A8.....E&-
A9~ 9
(91
(101
(111
(131
(141
(151
(161
(171
ao
01
02
03
04
as
as
07
G4-.!lli.l:::::.. ~
G3~
EN
G2....!.!!1-
J,
1
2
3
4
5
6
7
8
9
10
11
12
N PACKAGES
A7
13 Q3
14 04
AS
15 05
A5
A4
16 06
A3
17 07
A2
18 G2
AI
19 G3
AO
20 Gl
00
21 il4
01
22 A9
02
23 AS
GND 24 Vec
For chip carrier OPtions and information,

Gl~
TBP288A86 ('8479)
TBP288A8660 .These products are no longer in production, They are replaced by TBP28SA86A
3232
TEXAS
INSTRUMENTS
PRODUCT GUIDE
logic symbol t
TBP28SA86A
pin assignments
J, N PACKAGES
PROM 1024 X 8
MEMORIES
(8)
AD
(7)
. Al
1024 X 8
A2
A3
.,,35 ns
Typical select time, , ,20 ns
AQ
(6)
AQ
(5)
AQ
(4)
A4
AQ
A5
AQ
A6
AQ
A7
AQ
A8
AQ
(9)
00
(10)
Q1
(11)
02
(16)
13 03
A6
14 04
3
4
AS
15
A4
16 06
17 07
A3
A2
Al
18 G2
19 G3
as
AO
20 131
00
06
(17)
07
21
~4
10 01
22 A9
02
23 A8
A9
11
04
12 GND
G3
as
6
7
03
(15)
A7
04
(13)
(14)
Vee
24

EN
G2
(;1
TBP28S165
TBP28S166
J, N PACKAGES
PROM 2048 X 8
AO
Al
MEMORIES
A2
2048 X 8
Three-state outputs
A3
A5
A4
A6
A7
A8
A9
Al0
G3
G2
(;1
TYPE
pin assignments
logic symbol t
1 A7
13 03
A6
14 04
AS
15 05
A4
16 06
01
A3
17 07
02
A2
18 G2
03
AI
19 G3
04
AD
20 Gl
00
(8)
(7)
(6)
A\J
(5)
A\J
(4)
A\J
(3)
A~7
(2)
A\J
A\J
(1)
A\J
(23)
A\J
(22)
(21)
A\J
(9)
(10)
(11)
(13)
(14)
(15)
(16)
(17)
00
as
06
07
(19)
(18)
11
23 A8
02
24
II
AID
22 A9
12 GND
10
21
10 01
Vee

EN
(20)
TYPICAL
GUARANTEED
PACKAGE
ADDRESS
MAXIMUM
ROW SPACING
ACCESS
ACCESS
TIME
TIME
TYPICAL
POWER
DISSIPATION
TBP28S165
7.62 mm (0.300 in.)
25 ns
550mW
TBP28S166
15,24 mm (0.600 in.)
35 ns
650mW
Pin numbers shown On logic symbols are for J and N packages only.
nc -
TEXAS
INSTRUMENTS
3-233
II...
-c
o
C.
t:
n
r+
3-234
The TTL Data Book

Volume 1
General Information
i_1I
L....-_Fu_n_c_t_io_n_a_I_,n...;.,d_e_x---...;._______
~_pr_o_d_u_ct_G~ui-d-e__--------____~iC-1II
Logic Symbols
L....-_M_e_c_h_an_i~c...;.,al_D_a_t...;.,a---...;.______~__If_~
4-1
III
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cc
C:i'
en
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4-2
EXPLANATION OF NEW LOGIC SYMBOLS
TABLE OF CONTENTS
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Title
Page
INTRODUCTION ......................................................... 4-5
SYMBOL COMPOSITION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-5
QUALIFYING SYMBOLS .................................................... 4-7
3.1
General Qualifying Symbols ........................................... 4-7
3.2 Qualifying Symbols for Inputs and Outputs ................................ 4-7
3.3
Symbols Inside the Outline ........................................... 4-11
DEPENDENCY NOTATION ................................................. 4-12
4.1
General Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . .. 4-12
4.2
G, AND ......................................................... 4-12
4.3
Conventions for the Application of Dependency Notation in General ............ 4-14
4.4 V, OR ................. ; ........................................ 4-15
4.5
N, Negate (Exclusive OR) ............................................ 4-15
4.6
Z, Interconnection ..................... . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-16
4.7
C, Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-17
4.8
S, Set and R, Reset ................................................ 4-17
4.9
EN, Enable ............................ ; . . . . . . . . . . . . . . . . . . . . . . . . .. 4-18
4.10
M, Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-19
4.11
A, Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-21
BISTABLE ELEMENTS .................................................... 4-24
CODERS.............................................................. 4-25
USE OF A CODER TO PRODUCE AFFECTING INPUTS ............................ 4-26
USE OF BINARY GROUPING TO PRODUCE AFFECTING INPUTS. . . . . . . . . . . . . . . . . . . .. 4-27
SEQUENCE OF INPUT LABELS ........ '...................................... 4-27
SEQUENCE OF OUTPUT LABELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-28
LIST OF TABLES
Table
I.
II.
III.
IV.
nde
Page
General Qualifying Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-8
Qualifying Symbols for Inputs and Outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . .. 4-9
Symbols Inside the Outline. ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-10
Summary of Dependency Notation .......................................... : 4-23
II
rn
(5
.0
IEEE Standards may be purchased from:
If you have questions on this Explanation

of New Logic Symbols. Please contact:
Institute of Electrical and Electronics Engineers. Inc.

345 East 47th Street
New York. N.Y. 10017
F.A. Mann MS 49
Texas Instruments Incorporated
P.O. Box 225012
Dallas. texas 75265
Telephone (214) 995-2867
>
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.2
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International Electrotechnical Commission (IEC)
publications may be purchased from:
American National Standards Institute. Inc.
1430 Broadway
New York. N.Y. 10018
TEXAS
INSTRUMENlS
4-3
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4-4
by F. A. Mann
INTRODUCTION
The International Electrotechnical Commission (I EC) has been developing a very powerful symbolic
language that can show the relationship of each input of a digital logic circuit to each output without
showing explicitly the internal logic. At the heart of the system is dependency notation, which will be
explained in Section 4.
The system was introduced in the USA in a rudimentary form in IEEE/ANSI Standard Y32.14-1973.
Lacking at that time a complete development of dependency notation, it offered little more than a
substitution of rectangular shapes for the familiar distinctive shapes for representing the basic functions
of AND, OR, negation, etc. This is no longer the case.
Internationally, Working Group 2 oflEC Technical Committee TC-3 is preparing a new document
(Publication 617-12) that will consolidate the original work started in the mid 1960's and published
in 1972 (Publication 117-15) and the amendments and supplements that have followed. Similarly
for the USA, IEEE Committee
sec
11.9 is revising the publication IEEE Std 91/ANSI Y32.14.
Texas Instruments is participating in the work of both organizations and this Data Book introduces
new logic symbols in anticipation of the new standards. When changes are made as the standards
develop, future editions will take those changes into account.
The following explanation of the new symbolic language is necessarily brief and greatly condensed
from what the standards publications will finally contain. This is not intended to be sufficient for
those people who will be developing symbols for new devices. Itis primarily intended to make possible
the understanding of the symbols used in this book; comparing the symbols with functional block
diagrams and/or function tables will further help that understanding.
II
(/)
SYMBOL COMPOSITION
15
..c
A symbol comprises an outline or a combination of outlines together with one or more qualifying
E
en>-
symbols. The shape of the symbols is not significant. As shown in Figure 1, gener~1 qualifying symbols
are used to tell exactly what logical operation is performed by the elements. Table I shows the general
qualifying symbols used in this data book. Input lines are placed on the left and output lines are
(.)
.0,
o
placed on the right. When an exception is made to that convention, the direction of signal flow is
..J
indicated by an arrow as shown in Figure 11.

All outputs of a single, unsubdivided element always have identical internal logic states determined by
the function of the element except when otherwise indicated by an
a~sociated
qualifying symbol
or label inside the element.
TEXAS
INSTRUMENTS
4-5

GENERAL QUALIFYING
SYMBOL
OUTLINE
I **
**1
INPUT
LINES
**
OUTPUT
LINES
**
*Possible positions for qualifying symbols relating to inputs and outputs

FIGURE 1 - SYMBOL COMPOSITION
The outlines of elements may be abutted or embedded in which case the following conventions apply.
There is no logic connection between the elements when the line common to their outlines is in the
direction of signal flow. There is at least one logic connection between the elements when the
line common to their outlines is perpendicular to the direction of signal flow. The number of
logic connections between elements will be clarified by the use of qualifying symbols and this is
discussed further under that topic. If no indications are shown on either side of the common line, it
is assumed there is only one connection.
When a circuit has one or more inputs that are common to more than one element of the circuit, the
common-control block may be used. This is the only distinctively shaped outline used in the I EC
system. Figure 2 shows that unless otherwise qualified, by dependency notation,
an input to the
common-control block is an input to each of the elements below the common-control block.
II
COMMON~ONTROLBLOCK
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FIGURE 2 -ILLUSTRATION OF COMMON- CONTROL BLOCK
4-6
TEXAS
INSTRUMENTS

A common output depending on all elements of the array can be shown as the output of a commonoutput element. Its distinctive visual feature is the double line at its top. In addition the commonoutput element may have other inputs as shown in Figure 3. The function of the common-output
element must be shown by use of a general qualifying symbol.
COMMON-OUTPUT
ELEMENT
(must, like other elements,

hive a qualifying symbol to
denote its logic function).
FIGURE 3 -ILLUSTRATION OF COMMON-OUTPUT ELEMENT
QUALIFYING SYMBOLS
3.1 General Qualifying Symbols

Table I shows the general qualifying symbols used in this data book. These characters are placed near
the top center or the geometric center of a symbol or symbol element to define the basic function
of the device represented by the symbol or of the element.
3.2 Qualifying Symbols for Inputs and Outputs
Qualifying symbols for inputs and outputs are shown in Table" and will be familiar to most users
with the possible exception of the logic polarity and analog signal indicators. The older logic negation
indicator means that the external 0 state produces the internal 1 state. The internal 1 state means the
active state_ Logic negation may be used in pure logic diagrams; in order to tie the external 1 and 0
logic states to the levels H (high) and L (low), a statement of whether positive logic (1 = H, 0 = L) or
negative logic (1 = L, 0 = H) is being used is required or must be assumed. Logic polarity indicators
en
15
.c .
en>
eliminate the need for calling out the logic convention and are used in this data book in the symbology
(,)
.s,
for actual devices_ The presence of the triangular polarity indicator indicates that the L logic level will
produce the internal 1 state (the active state) or that, in the case of an output, the internal 1 state will
...I
produce the external L level. Note how the active direction of transition for a dynamic input is
indicated in positive logic, negative logic, and with polarity indication.
TEXAS
INSTRUMENlS
4-7

TABLE 1- GENERAL QUALIFYING SYMBOLS
DESCRIPTION
SYMBOL
EXAMPLE
&
AN D gate or function.
SN7400
.. 1
OR gate or function. The symbol was chosen to indicate that at least

one active input is needed to activate the output.
SN7402
=1
Exclusive OR. One and only one input must be active to activate the output.
Logic identity. All inputs must stand at same state.
',SN7486
SN74180
2k
An even number of inputs must be active.
SN74180
2k+1
1'
An odd number of inputs must be active.
SN74ALS86
The one input must be active.
SN7404
A buffer or element with more than usual output capability (symbol

is oriented in the direction of signal flow).
SN74S436
IT
Schmitt trigger; element with hysteresis.
SN74LS18
X/V
Coder, code converter (DEC/BCD, BIN/OUT, BIN/7SEG, etc.).
SN74 LS347
MUX
Multiplexer/data selector.
SN74150
to or <l
OMUX or OX
Demultiplexer.
SN74138
Adder.
SN74LS385
p-u
Subtracter.
SN74 LS385
CPG
Lookahead carry generator.
SN74182
rr
Multiplier.
SN74LS384
COMP
Magnitude comparator.
SN74LS682
AlU
Arithmetic logic unit.
SN74LS381
IG
J'l.1'\..
GI
..n.n...
Retriggerable monostable.
SN74LS422
Nonretriggerable monostable (oneshot).
SN74121
Astable element. Showing waveform is optional.
SN74LS320
Synchronously starting astable.
SN74LS624
Astable element that stops with a completed pulse .
SRGm
Shift register. m = number of bits.
SN74LS595
CTRm
Counter. m = number of bits; cycle length = 2m.
SN54 LS590
SN74 LS668
CTR OIVm
Counter with cycle length = m.
RCTRm
Asynchronous (ripplecarry) counter; cycle length = 2m.
ROM
Readonly memory.
SN74187
RAM
Randomaccess read/write memory.
SN74170
FIFO
First-in, first-out memory.
SN74LS222
1=0
Element powers up cI~ared to 0 state.
SN74AS877
<I>
Highly complex function; "gray box" symbol with limited detail

shown under special rules .
SN74LS608
Not all of the general qualifying symbols have been used in this book, but they are included here for the sake of completeness.
4-8
TEXAS
INSTRUMENTS
EXPLANATION Of NEW LOGIC SYMBOLS

TABLE II - QUALIFYING SYMBOLS FOR INPUTS AND OUTPUTS
Logic negation at input. External 0 produces internal 1.
Logic negation at output. Internal 1 produces external
o.
Active-low input. Equivalent to ~ in positive logic.

Active-low output. Equivalent to p-in positive logic.
Active-low input in the case of right-to-Ieft signal flow.
Active-low output in the case of right-to-Ieft signal flow.
Signal flow from right to left. If not otherwise indicated, signal flow is from left to right.
Bidirectional signal flow.
POSITIVE
LOGIC
not used
not used
not used
Nonlogic connection. A label inside the symbol will usually define the nature of this pin.
Input for analog signals.
----r---
Internal connection. 1 state on left produces 1 state on right.
---~2----
Negated internal connection. 1 state on left produces 0 state on right.
----f:f-----}
POLARITY
INDICATION
1Lo 1Io
HLLH
OI1 L 1 LS
Dynamic
inputs
active
on
indicated
transition
*1
--l1
NEGATIVE
LOGIC
Dynamic internal connection. Transition from 0 to 1 on left produces transitory 1 state on

right.
Internal input (virtual input). It always stands at its internal 1 state unless affected by an
overriding dependency relationship.
II
Internal output (virtual output). Its effect on an internal input to which it is connected is
indicated by dependency notation.
The internal connections between logic elements abutted together in a symbol may be indicated by
the symbols shown. Each logic connection may be shown by the presence of qualifying symbols at one
or both sides of the common Iine and if confusion can arise about the numbers of connections, use can
be made of one of the internal connection symbols.
The internal (virtual) input is an input originating somewhere else in the circuit and is not connected
directly to a terminal. The internal (virtual) output is likewise not connected directly to a terminal.
TEXAS
INSTRUMENTS
4-9
TABLE III - SYMBOLS INSIDE THE OUTLINE

Postponed output (of a pulsetriggered flipflop). The output changes when input
initiating change (e.g., a C input) returns to its initial external state or level. See 5.
Bi-threshold input (input with hysteresis)
NPN open-collector or similar output that can supply a relatively
low-impedance L level when not turned off. Requires external
pull-up. Capable of positive-logic wired-AND connection.
Passive-pull-up output is similar to NPN open-collector output but

is suplemented with a built-in passive pull-up.
NPN open-emitter or similar output that can supply a relatively lowimpedance H level when not turned off. Requires external pulldown.
Capable of positivelogic wired-OR connection.
Passive-pull-down output is similar to NPNopen-emitter output but
is supplemented with a builtin passive pull-down.
3-state output
Output with more than usual output capability (symbol is oriented in the direction
of signal flow).
Enable input
When at its internal 1-state, all outputs are enabled.
When at its internal astate, open-collector and openemitter outputs are off,
three-state outputs are at normally defined internal logic states and at external
highimpedance state, and all other outputs (e.g., totempoles) are at the
internal astate.
J, K, R, S, T
III
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m
-<
3
C"
---1D
---1-m ~-m
-1+m --1-m
Usual meanings associated with flip-flops (e.g., R

Data input to a storage element equivalent to:
Shift right (left) inputs, m
= 1,2,3 etc.
toggle)
..,..-1 S
LclR
= 1,
it is usually not shown.
Counting up (down) inputs, m = 1,2,3 etc. If m = 1, it is usually not shown.
D:}
Binary grouping. m is highest power of 2.
---1CT = 15
The contents-setting input, when active, causes the content of a register to take
on the indicated value.
CT=9~
The content output is active if the content of the register is as indicated.

Input line grouping .... indicates two or more terminals used to implement a single
logic input.
en
e.g., The paired expander inputs of
"1"~
4-10
If m
= reset, T
~N745a. ~~JE
Fixedstate output always stands at its internal
state. For example, see SN74185.
TEXAS
INSTRUMENTS

The application of internal inputs and outputs requires an understanding of dependency notation,
which is explained in Section 4.
In an array of elements, if the same general qualifying symbol and the same qualifying symbols
associated with inputs and outputs would appear inside each of the elements of the array, these
qualifying symbols are usually shown only in the first element. This is done to reduce clutter and to
save time in recognition. Similarly, large identical elements that are subdivided into smaller elements
may each be represented by an unsubdivided outline. The SN54 LS440 symbol illustrates this principle.
3.3 Symbols Inside the Outline
Table III shows some symbols used inside the outline. Note particularly that open-collector, openemitter, and three-state outputs have distinctive symbols. Also note that an EN input affects all of the
outputs of the circuit and has no effect on inputs. When an enable input affects only certain outputs
andlor affects one or more inputs, a form of dependency notation will indicate this (see 4.9). The
effects of the EN input on the various types of outputs are shown.
It is particularly important to note that a D input is always the data input of a storage element. At
its internal 1 state, the D input sets the storage element to its 1 state, and at its internal 0 state it resets
the storage element to its 0 state.
The binary grouping symbol will be explained more fully in Section 8. Binary-weighted inputs are
arranged in order and the binary weights of the least-significant and the most-significant lines are
indicated by numbers. In this data book weights of input and output lines will be represented by
powers of two usually only when the binary grouping symbol is used, otherwise, decimal numbers will
be used. The grouped inputs generate an internal number on which a mathematical function can be
performed or that can be an identifying number for dependency notation. See Figure 28. A frequent
use is in addresses for memories.
II
en
Reversed in direction, the binary grouping symbol can be used with outputs. The concept-is analogous
to that for the inputs and the weighted outputs will indicate the internal number assumed to be
developed within the circuit.
Other symbols are used inside the outlines in this data book in accordance with the IEell E EE
standards but are not shown here. Generally,these are associated with arithmetic operations and are
self-explanatory.
When nonstandardized information is shown inside an outline, it is usually enclosed in square brackets
[like these] .
TEXAS
INSTRUMENTS
4-11
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os,
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4
DEPENDENCY NOTATION
4.1 General Explanation

Dependency notation is the powerful tool that sets the IEC symbols apart from previous systems and
makes compact, meaningful, symbols possible. It provides the means of denoting the relationship
between inputs, outputs, or inputs and outputs without actually showing all the elements and interconnections involved. The information provided by dependency notation supplements that provided
by the qualifying symbols for an element's function.
In the convention for the dependency notation, use will be made of the terms "affecting" and
"affected". In cases where it is not evident which inputs must be considered as being the affecting
or the affected ones (e.g., if they stand in an AND relationship), the choice may be made in any
convenient way.
So far, ten types of dependency have been defined and all of these are used in this data book. They are
listed below in the order in which they are presented and are summarized in Table IV following
4.11.
Section
4.2
4.3
4A
4.5
4.6
4.7
4.8
4.9
4.10
4.11
r
o
CO
Dependency Type or Other Subject

G, AND
General rules for dependency notation
V, OR
N, Negate, (Exclusive OR)
Z, Interconnection
C, Control
S, Set and R, Reset
EN, Enable
M, Mode
A, Address
5'
en
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3
C"
o
(j)
4-12
4.2 G (AND) Dependency

A common relationship between two signals is to have them ANDed together. This has traditionally
been shown by explicitly drawing an AN D gate with the signals connected to the inputs of the gate.
The 1972 IEC publication and the 1973 IEEE/ANSI standard showed several ways to show this AND
relationship using dependency notation. While nine other forms of dependency have since been
defined, the waysto invoke AND dependency are now reduced to one.
TEXAS
INSTRUMENTS

In Figure 4 input b is ANDed with input a and the complement of b is ANDed with c. The letter G has
been chosen to indicate AND relationships and is placed at input b, inside the symbol. A number
considered appropriate by the symbol designer (1 has been used here) is placed after the letter G and
also at each affected input.
_-
Not~
the bar over the 1 at input c.
:~--
=i
G1
C~
FIGURE 4 - G DEPENDENCY BETWEEN INPUTS
In Figure 5, output b affects input a with an AND relationship. The lower example shows that it is
the internal logic state of b, unaffected by the negation sign, that is ANDed. Figure 6 shows input a to
be ANDed with a dynamic input b.
-r-:--r-
1 G1
---
1b
-.= '~--rb
__
a~---
FIGURE 5 - G DEPENDENCY BETWEEN OUTPUTS AND INPUTS
II
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FIGURE 6 - G DEPENDENCY WITH A DYNAMIC INPUT
The rules for G dependency can be summarized thus:

When a Gm input or output (m is a number) stands at its internal 1 state, all inputs and outputs
affected by Gm stand at their normally defined internal logic states. When the Gm input or output
stands at its 0 state, all inputs and outputs affected by Gm stand at their internal 0 states.
TEXAS
INSTRUMENTS
'0
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(.)
.s,
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4-13

4.3 Conventions for the Application of Dependency Notation in General
The rules for applying dependency relationships in general follow the same pattern as was illustrated
for G dependency.
Application of dependency notation is accomplished by:
1)
labeling the input (or output) affecting other inputs or outputs with the letter symbol
2)
appropriately chosen, and

,labeling each input or output affected by that affecting input (or output) with that same
indicating the relationship involved (e.g., G for AND) followed by an identifying number,
number.
If it is the complement ofthe internal logic state ofthe affecting input or output that does the affecting,
then a bar is placed over the"identifying numbers at the affected inputs or outputs. See Figure 4.
If two affecting inputs or outputs have the same letter and same identifying number, they stand in an
OR relationship to each other. See Figure 7.
a~G-'G1
a~~1
b
&
FIGURE 7 - OR'ED AFFECTING INPUTS
If the affected input or output requires a label to denote its function (e.g., "D"), 'this label will be
III
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(J)
prefixed by the identifying number of the affecting input. See Figure 12.
If an input or output is affected by more than one affecting input, the identifying numbers of each of
the affecting inputs will appear in the label of the affected one, separated by commas. The normal
reading order of these numbers is the same as the sequence of the affecting relationships. See Figure
12.
-<
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en
If the labels denoting the functions of affected inputs or outputs must be numbers, (e.g., outputs
of a coder), the identifying numbers to be associated with both affecting inputs and affected inputs or
outputs will be replaced by another character selected to avoid ambiguity, e.g., Greek letters. See
Figure 8.
4-14
TEXAS
INSTRUMENTS
=[
--
=[
--
c<
~c<
~1
c<
FIGURE 8 - SUBSTITUTION FOR NUMBERS
4.4 V (OR) Dependency

The symbol denoting OR dependency is the letter V. See Figure 9.
-=w
;;.1
b _
3 = -a
. FIGURE 9 - V (OR) DEPENDENCY
When a Vm input or output stands at its inter.nal 1 state, all inputs and outputs affected by Vm stand
at their internal 1 states. When the Vm input or output stands at its internal 0 state, all inputs and
outputs affected by Vm stand at their normally defined internal logic states.
4.5 N (Negate) (X-OR) Dependency
The symbol denoting negate dependency is the letter N. See Figure 10. Each input or output affected
by an Nm input or output stands in an exclusive-OR relationship with the Nm input or output.
tJ)
(5
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en
(,)
If a = 0, then c = b
If a ="
then c = b
'0,
...J
FIGURE 10 - N (NEGATE) (X-OR) DEPENDENCY
TEXAS
INSTRUMENTS
4-15

When an Nm input or output stands at its internal 1 state, the internal logic state of each input and each
output affected by Nm is the complement of what it would otherwise be. When an Nm input or
output stands at its internal 0 state, all inputs and outputs affected by Nm stand at their normally
defined internal logic states.
4.6 Z (Interconnection) Dependency
The symbol denoting interconnection dependency is the letter Z.
Interconnection dependency is used to indicate the existence of internal logic connections between
inputs, outputs, internal inputs, and/or internal outputs.
The internal logic state of an input or output affected by a Zm input or output will be the same as the
internal logic state of the Zm input or output, unless modified by additional dependency notation.
See Figure 11.
....
0
a-f~tb
E=z}--a
r=~a
CC
ri'
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'W'
W'
W
:=qgr
ba~lj-c
1Z.!
where
~=-{>-
where
-[}-=-<l--
FIGURE 11 - Z (INTERCONNECTION) DEPENDENCY
4-16
TEXAS.
INSIRUMENTS

4.7 C (Control) Dependency
The symbol denoting control dependency is the letter C.
Control inputs are usually used to enable or disable the data (0, J, K, R, or S) inputs of storage
elements. They may take on their internal 1 states (be active) either statically or dynamically. In the
latter case the dynamic input symbol is used as shown in the third example of Figure 12.
a-fc7
b-r O
a~l
b
C2
1.20
/-
==
at' _
b
1C2
20
a~&S-
&
Note AND relationship of a and b

a
b
a~& S
G1
1,20
C2
b
c
a~&;;'1' -.:..
120
1,20
G1
C2
& R
&
&
&
R
-
Input c selects which of a or b is stored when d goes low.

FIGURE 12 - C (CONTROL) DEPENDENCY
II
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When a Cm input or output stands at its internal 1 state, the inputs affected by Cm have their normally
.c
defined effect on the function of the element,. i.e., these inputs are enabled. When a em input or
output stands at its internal 0 state, the inputs affected by Cm are disabled and have no effect on the
>en
function of the element.
.0,
(.)
-I
4.8 S (Set) and R (Reset) Dependencies

. The symbol denoting set dependency is the letter S. The symbol denoting reset dependency is the
letter R.
TEXAS
INSTRUMENlS
4-17

Set and reset dependencies are used if it is
necessary to specify the effect of the combi-
CASE 1
s--fl-:
nation R=S=1 on a bistable element. Case 1 in
.~o
Figure 13 does not use S or R dependency.
a a
S
0
0
R
0
nc nc
1
1
1
?
a a
When an Sm input is at its internal 1 state,

CASE 2
outputs affected by the Sm input will react,

regardless of the state of an R input, as they
normally would react to the combination S=1,
R=O. See cases 2, 4, and 5 in Figure 13.
When an Rm input is at its internal 1 state,
outputs affected by the Rm input will react,
regardless of the state of an S input, as they
normally would react to the combination S=O,
R=1. See cases 3, 4, and 5 in Figure 13.
When an Sm or Rm input is at its internal 0
state, it has no effect.
Note that the noncomplementary output
patterns in cases 4 and 5 are only pseudo stable.
The simultaneous return of the inputs to
S= R=O produces an unforeseeable stable and
complementary output pattern.
s~:
S
0
0
1
1
.-U
s-n.-tJ-n
s-Fl-:
.-Us-Fl-:
.-U-
nc =no change
1
1
0
0
S
0
0
a a
1
1
nc nc
1
1
0
1
0
a a
0
1
S
0
0
1
1
nc nc
0
1
1
1
a a
1
0
1
S
0
0
1
1
nc nc
0
0
1 = external 1 state
? = unspecified
FIGURE 13- S (SET) AND

R (RESET) DEPENDENCIES
4.9 EN (Enable) Dependency
(J)
<
3
CASE 5
(Q
(i'
CASE 4
o= external 0 state
r-
nc nc
CASE 3
The symbol denoting enable dependency is the combination of letters EN.
C'
en
An ENm input has the same effect on outputs as an EN input, see 3.1, but it effects only those outputs
labeled with the identifying number m. It also affects those inputs labeled with the identifying number
m. By contrast, an EN input affects all outputs and no inputs. The effect of an ENm input on an
affected input is identical to that of a
4-18
em input. See Figure 14.
TEXAS
INSfRUMENTS

When an ENm input stands at its internal 1 state, the inputs affected by ENm have their normally
defined effect on the function of the element and the outputs affected by this input stand at their
normally defined internal logic states, i.e., these inputs and outputs are enabled.
tV
--..-------IENt
If a =0, b is disabled and d =c

If a = 1, c is disabled and d =b
FIGURE 14 - EN (ENABLE) DEPENDENCY
When an ENm input stands at its internal 0 state, the inputs affected by ENm are disabled and have no
effect on the function of the element, and the outputs affected by. ENm are also disabled. Opencollector outputs are turned off, three-state outputs stand at their normally defined internal logic
states but externally exhibit high impedance, and all other outputs (e.g., totem-pole outputs) stand at
their internal 0 states.
4.10
M (Mode) Dependency
The symbol denoting mode dependency is the letter M.
Mode dependency is used to indicate that the effects of particular inputs and outputs of an element
depend on the mode in which the element is operating.
If an input or output has the same effect in different modes of operation, the identifying numbers
of the relevant affecting Mm inputs will appear in the label of that affected input or output between
parentheses and separated by solidi. See Figure 19.
4.10.1
M Dependency Affecting Inputs
II
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When an Mm input or Mm output stands at its internal 0 state, the inputs affected by this Mm input or
"0
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C)
Mm output have no effect on the function of the element. When an affected input has several sets of
..J
M dependency affects inputs the same as C dependency. When an Mm input or Mm output stands at
its internal 1 state, the inputs affected by this Mm input or Mm output have their normally defined
effect on the function of the element, i.e., the inputs are enabled.
labels separated by solidi (e.g.,
C4/2~/3+),
any set in which the identifying number of the Mm input
or Mm output appears has no effect and is to be ignored. This represents disabling of some of the
functions of a multifunction input.
TEXAS
INSTRUMENTS
4-19

The circuit in Figure 15 has two inputs, band c, that control which one of four modes (0, 1,2, or 3)
will exist at any time. Inputs d, e, and fare D inputs subject to dynamic control (clocking) by the a
input. The numbers 1 and 2 are in the series chosen to indicate the modes so inputs e and f are only
enabled in mode 1 (for parallel loading) and input d is only enabled in mode 2 (for serial loading).
Note that input a has three functions. It is the clock for entering data. In mode 2, it causes right
shifting of data, which means a shift away from the control block. In mode 3, it causes the contents of
the register to be incremented by one count.
Note that all operations are synchronous.
In MODE 0 (b = 0, c = 01, the outputs
remain at their existing states as none
of the inputs has an effect.
In MODE 1 (b =1, ~ =01, parallel loading
takes place thru inputs e and f.
In MODE 2 (b = 0, c = 11, shifting down
and serial loading thru input d take place.'
In MODE 3 (b = c = 11, counting up by
increment of 1 per clock pulse takes place.
1,4D
FIGURE 15 - M (MODEl DEPENDENCY AFFECTING INPUTS
4.10.2
M Dependency Affecting Outputs
When an Mm input or Mm output stands at its internal 1 state, the affected outputs stand at their
normally defined internal logic states, Le., the outputs are enabled.
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When an Mm input or Mm output stands at its internal 0 state, at each affected output any set of labels
containing the identifying number of that Mm input or Mm output has no effect and is to be ignored.
When an output has several different sets of labels separated by solidi (e.g., 2,4/3,5), only those sets
in which the identifying number of this Mm input or Mm output appears are to be ignored.
In Figure 16, mode 1 exists when the a input
stands at its internal 1 ~tate. The delayed
output symbol is effective only in mode 1
(when input a
1) in which case the device
CZ
ZD
'1
not in mode 1 so the delayed output symbol

has no effect and the device functions as a
transparent latch.
4-20
all1
functions as a pulse-triggered flip-flop. See

Section 5. When input a = 0, the device is
FIGURE 16 - TYPE OF FLIP-FLOP DETERMINED

BY MODE
TEXAS
INSTRUMENTS
In Figure 17, if input a stands at its internal 1
a-1M1
state establish ing mode 1, output b will stand

at its internal 1 state only when the content
I
I
of the register equals 9. Since output b is

located in the common-control block with no
defined function outside of mode 1, the state
of this output outside of mode 1 is not defined
~b
1CT=9
FIGURE 17 - DISABLING AN OUTPUT OF THE

COMMON~ONTROLBLOCK
by the symbol.
In Figure 18, if input a stands at its internal 1
state establishing mode 1, output b will stand
at its internal 1 state only when the content
of the register equals 15. If input a stands at
I
I
its internal 0 state, output b will stand at its
internal 1 state only when the content of the
register equals O.
FIGURE 18 - DETERMINING AN OUTPUT'S
FUNCTION
In Figure 19 inputs a and b are binary weighted

to generate the numbers 0, 1, 2, or 3. This
determines which one of the four modes
exists.
At output e the label set causing negation
(if c = 1) is effective only in modes 2 and 3.
In modes 0 and 1 th is output stands at its
normally defined state as if it had no labels.
At output f the label set has effect when the
FIGURE 19 _ DEPENDENT RELATIONSHIPS

AFFECTED BY MODE
mode is not 0 so output e is negated (if

c
= 1)
in modes 1, 2, and 3. In mode 0 the label set has no effect so the output stands at its normally
defined state. In this example 0,4 is equivalent to (1/2/3)4. At output 9 there are two label sets. The
first set, causing negation (if c = 1), is effective only in mode 2. The second set, subjecting 9 to AND
dependency on d, has effect only in mode 3.
__
en
"0
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>-
(J)
Note that in mode 0 none of the dependency relationships has any effect on the outputs, so e, f, and 9
will all stand at the same state.
4.11
CJ
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A (Address) Dependency
The symbol denoting address dependency is the letter A.
TEXAS
INSTRUMENTS
4-21

Address dependency provides a clear representation of those elements, particularly memories, that use
address control inputs to select specified sections of a multidimensional array. Such a section of a
memory array is usually called a word. The purpose of address dependency is to allow a symbolic
presentation of the entire array. An input of the array shown at a particular element of this general
section is common to the corresponding elements of all selected sections of the array. An output
of the array shown at a particular element of this general section is the result of the OR function of
the outputs of the corresponding elements of selected sections. If the label of an output of the array
shown at a particular element of this general section indicates that this output is an open-circuit
output or a three-state output, then this indication refers to the output of the array and not to those
of the sections of the array.
Inputs that are not affected by any affecting address input have their normally defined effect on all
sections of the array, whereas inputs affected by an address input have their normally defined effect
only on the section selected by that address input.
An affecting address input is labelled with the letter A followed by an identifying number that
corresponds with the address of the particular section of the array selected by this input. Within
the general section presented by the symbol, inputs and outputs affected by an Am input are labelled
with the letter A, which stands for the identifying numbers, i.e., the addresses, of the particular
sections.
b
c
d
f
h
II
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(Q
r;"
en
-<
3
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FIGURE 20 - A (ADDRESS) DEPENDENCY
Figure 20 shows a 3-word by 2-bit memory having a separate address line for each word and uses
'EN dependency to explain the operation. To select word 1, input a is taken to its 1 state, which
establishes mode 1. Data can now be clocked into the inputs marked "1,40". Unless words 2 and 3
are also selected, data cannot be clocked in at the inputs marked "2,40" 'and "3,40". The outputs
will be the OR functions of the selected outputs, i.e., only those enabled by the active EN functions.
The identifying numbers of affecting address inputs correspond with the addresses of the sections
selected by these inputs. They need not necessarily differ from those of other affecting dependencyinputs (e.g., G, V, N, ... ), because in the general section presented by the symbol they are replaced by
the letter A.
4-22
TEXAS
INSTRUMENTS

If there are several sets of affecting Am inputs for the purpose of independent and possibly
simultaneous access to sections of the array, then the letter A is modified to 1A, 2A, ... Because they
have access to the same sections of the array, these sets of A inputs may have the same identifying
numbers.
Figure 21 is another illustration of the concept.
RAM16X4
EN
)A~
C1
FIGURE 21
FIGURE 21 - ARRAY OF 16 SECTIONS OF FOUR TRANSPARENT LATCHES WITH 3STATE OUTPUTS
COMPRISING A 16WORD X 4BIT RANDOM-ACCESS MEMORY
TABLE IV - SUMMARY OF DEPENDENCY NOTATION
TYPE OF
DEPENDENCY
LETTER
SYMBOL *
AFFECTING INPUT
AT ITS O-STATE
AFFECTING INPUT
AT ITS 1-STATE
Address
Perm its action (address selected)
Prevents action (address not selected)
Control
Permits action
Prevents action
Enable
EN
Permits action
Prevents action of inputs.

ooutputs off.
'\l outputs at external high impedance,
no change in internal logic state.
Other outputs at internal 0 state.
AND
Permits action
Imposes 0 state
Mode
Permits action (mode selected)
Prevents action (mode not selected)
Negate (XO R)
Complements state
No effect
RESET
Affected output reacts as

it would to S = 0, R = 1
No effect
SET
Affected output reacts as

it would to S = 1, R = 0
No effect
.~
OR
Imposes 1 state
Permits action
-I
Interconnection
Imposes 1 state
Imposes 0 state
II
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en>Cl
"These letter symbols appear at the AFFECTING input (or output) and are followed by a number. Each input
(or output) AFFECTE D by that input is labeled with that same number. When the labels EN, R, and S appear at
inputs without the following numbers, the descriptions above do not apply. The action of these inputs is
described under "Symbols Inside The Outline", see 3.1.
TEXAS
INSTRUMENTS
4-23

5
BISTABLE ELEMENTS
The dynamic input symbol, the postponed output symbol, and dependency notation provide the tools
to differentiate four main types of bistable elements and make synchronous and asynchronous inputs
easily recognizable. See Figure 22. The first column shows the essential distinguishing features; the
other columns show examples.
Transparent latches have a . level-operated control input. The 0 input is active as long as the C input
is at its internal 1 state. The outputs respond immediately. Edge-triggered elements accept data from
0, J, K, R~ or S inputs on the active transition of C. Pulse-triggered elements require the setup of data
before the start of the control pulse; the C input is considered static since the data must be maintained
as long as C is at its 1 state. The output is postponed until C returns to its 0 state. The data-lock-out
element is similar to the pulse-triggered version except that the C input is considered dynamic in that
shortly after C goes through its active transition, the data inputs are disabled and data does not have to
be held. However, the output is still postponed until the C input returns to its initial external level.
Notice that synchronous inputs can be readily recognized by their dependency labels (10, lJ, 1 K, lS,
1 R) compared to the asynchronous inputs (S, R), which are not dependent on the C inputs.
r---,
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lCm
I
C2
20
L __ .J
TRANSPARENT
LATCHES
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fl
Ct
1/2 SN7475
-ten ~
IL ___ .JI
{]=
EDGE-TRIGGERED
1/2 SN7474
1/2 SN74LS107
SN74L71
1/2 SN74107
to
Ct
R
fl
J
Ct
tK
R
r--..,
-lCm
-'r-
IL ___ .JI
PULSE-TRIGGERED
r---,
+cm~~
IL ___ .JI
1/2 SN74111
OAT A-LOCK-OUT
FIGURE 22 - FOUR TYPES OF BISTABLE CIRCUITS
4-24
TEXAS
INSTRUMENlS

6
CODERS
The general symbol for a coder or code

converter is shown in Figure 23. X and Y
may be replaced by appropriate indications
of the code used to represent the information at the inputs and at the outputs,
FIGURE 23 - CODER GENERAL SYMBOL
respectively.
Indication of code conversion is based on the following rule:

Depending on the input code, the internal logic states of the inputs determine an internal value.
This value is reproduced by the internal logic states of the outputs, depending on the output
code.
The indication of the relationships between the internal logic states of the inputs and the internal
value is accomplished by:
1)
labelling the inputs with numbers. In this case the internal value equals the sum of the
weights associated with those inputs that stand at their internal 1-state, or by
2)
replacing X by an appropriate indication of the input code and labelling the inputs with
characters that refer to this code.
The relationships between the internal value and the internal logic states of the outputs are
indicated by:
1)
II
labelling each output with a list of numbers representing those i.nternal values that lead to
the internal 1-state of that output. These numbers shall be separated by solidi as in Figure
24. This labelling may also be applied when Y is replaced by a letter denoting a type of
CJ)
dependency (see Section 7). If a continuous range of internal values produces the internal 1
"0
.c
state of an output, this can be indicated by two numbers that are inclusively the beginning
and the end of the range, with these two numbers separated by three dots, e.g., 4 ... 9
4/5/6/7 /8/9, or by
2)
replacing Y by an appropriate indication of the output code and labelling the outputs with
characters that refer to this code as in Figure 25.
>
en
.CJ
'0,
...J
Alternatively, the general symbol may be used together with an appropriate reference to a table in
which the relationship between the inputs and outputs is indicated. This is a recommended way
to symbolize a PROM after it has been programmed.
TEXAS
INSTRUMENlS
4-25

TRUTH TABLE
INPUTS
c
b a
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
0
XIV
1
2
1/4
V3
OUTPUTS
f
8
d
3/4
7
1
1
1
0
0
0
1
1
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
FIGURE 24 - AN X/Y CODE CONVERTER

TRUTH TABLE
INPUTS
c b a
X/OCT
1
2
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
0
1
1
1
i
0
0
0
0
0
0
1
OUTPUTS
f
h 9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FIGURE 25 - AN X/OCTAL CODE CONVERTER
USE OF A CODER TO PRODUCE AFFECTING INPUTS

XIY
It often occurs that a set of affecting inputs
III
r-
to
for dependency notation is produced by
<
CO
fir
C3
element. In such a case use can be made of

the symbol for a coder as an embedded
symbol. See Figure 26.
FIGURE 26 - PRODUCING VARIOUS TYPES OF

DEPENDENCIES
If all affecting inputs produced by a coder

are of the same type and their identifying
numbers correspond with the numbers shown
at the outputs of the coder, Y (in the
qualify~
ing symbol X/V) may be replaced by the
=[J
letter denoting the type of dependency ..

The indications of the affecting inputs should
then be omitted. See Figure 27.
4-26
V4
2/3 N5
decoding the signals on certain inputs to an
C:;"
(J)
G1
1 G2
2
X/M
1
2
I
I
--
'Y
=D
--
M.D
Ml
2 M2
I
I
FIGURE 27 - PRODUCING ONE TYPE OF

DEPENDENCY
TEXAS
INSTRUMENTS
EXPLANATION OF NEW LOGIC

8
SYM~OLS
USE OF BINARY GROUPING TO PRODUCE AFFECTING INPUTS

If all affecting inputs produced by a coder are of the same type and have consecutive identifying
numbers not necessarily corresponding with the numbers that would have been shown at the outputs
of the coder, use can be made of the binary grouping symbol (see 3.1). k external lines effectively
generate 2k internal inputs. The bracket is followed by the letter denoting the type of dependency
followed by ~. The m1 is to be replaced by the smallest identifying number and the m2 by the
largest one, as shown in Figure 28.
x/v
=f:}~~
D
1
2
3
AD
A1
A2
A3
A4
5 A5
6 A6
7 A7
I
I
x/v
=f>~t
G5
G6
G7
G8
FIGURE 28 - USE OF THE BINARY GROUPING SYMBOL
SEQUENCE OF INPUT LABELS

If an input having a single functional effect is affected by other inputs, the qualifying symbol (if there
is any) for that functional effect is preceded by the labels corresponding to the affecting inputs.
II
The left-to-right order of these preceding labels is the order in which the effects or modifications
en
must be applied. The affected input has no functional effect on the element if the logic state of any
(5
one of the affecting inputs, considered separately, would cause the affected input to have no effect,
.c
E
regardless of the logic states of other affecting inputs.
>
en
If an input has several different functional effects or has several different sets of affecting inputs,
depending on the mode of action, the input may be shown as often as required. However, there are
cases in which this method of presentation is not advantageous. In those cases the input may be shown
once with the different sets of labels separated by solidi. See Figure 29. No meaning is attached to the
order of these sets of labels. If one of the functional effects of an input is that of an unlabelled input
of the element, a solidus will precede the first set of labels shown.
TEXAS
INSTRUMENTS
4-27
disabled (caused to have no effect on the
a=[l--b
G2
function of the element), the internal logic
1~/~.~~
If all inputs of a combinational element are
states of the outputs of the element are not

specified by the symbol. If all inputs of a
sequential element are disabled, the content
of this element is not changed and the outputs remain at their existing internal logic
states.
Labels
may
be
factored
using
algebraic
FIGURE 29 - INPUT LABELS
techniques.
FIGURE 30 - FACTORING INPUT LABELS
10
SEQUENCE OF OUTPUT LABELS

If an output has a number of different labels, regardless of whether they are identifying numbers of
affecting inputs or outputs or not, these labels are shown in the following order:
r-
1)
2)
(Q
CO
en
4-28
followed by the labels indicating modifications of the internal logic state of the output,
such that the left-to-right order of these labels corresponds with the order in which their
n'
en
-<
if the postponed output symbol has to be shown, this comes first, if necessary preceded by
the indications of the inputs to which it must be applied;
effects must be applied;

3)
followed by the label indicating the effect of the output on inputs and other outputs of the
element.
TEXAS
INSTRUMENTS

Symbols
for
open-circuit
or
three-state
outputs, where applicable, are placed just

inside the outside boundary of the symbol
adjacent to the output line. See Figure 31.
If an output needs several different sets of
FIGURE 31 - PLACEMENT OF 3-STATE SYMBOLS
labels that represent alternative functions
(e.g., depending on the mode of action), these sets may be shown on different output lines that must
be connected outside the outline. However, there are cases in which this method of presentation is not
advantageous. In those cases the output may be shown once with the different sets of labels separated
by solidi. See Figure 32.
Two adjacent identifying numbers of affecting' inputs in a set of labels that are not already separated
by a nonnumeric character should be separated by a comma.
I
If a set of labels of an output not containing a
aiM1--ic;:~b
solidus contains the identifying number of an

affecting Mm input standing at its internal 0
1CT=15
-------
state, this set of labels has no effect on that
ai~-~~;=;n~;=~tb
output.
Labels may
techniques.
be factored
using algebraic
---------
= at~--1c;::~b
-
1CT=15
------
FIGURE 32 - OUTPUT LABELS
II
en
(5
.c
FIGURE 33 - FACTORING OUTPUT LABELS

If you have questions on this Explanation
of New Logic Symbols. please contact:
IEEE Standards may be purchased from:
F .A. Mann MS 49
Texas Instruments Incorporated
P.O. Box 225012
Dallas. Texas 75265
Telephone (214) 995-2867
Institute of Electrical and Electronics Engineers, Inc.

345 East 47th Street
New York, N.Y. 10017
en>(.)
.s,
...J
International Electrotechnical Commission (lEC)

publications may be purchased from:
American National Standards Institute, Inc.
1430 Broadway
New York, N.Y. 10018
TEXAS
INSTRUMENlS .
4-29
ro
CO
c=i'
en
-<
3
co
en
4-30
The TTL Data Book

. Volume 1
General Information
~_Fu_n_c_t_io_'n_a_I_ln_d_e_x______________'t_PII
'i__1II
~_p_ro_d_u_c_t_G_U_id_e____~~________
Logic Symbols
~_M_e_c_h_an_i_c_al_D__at_a______________If_fII
5-1
5-2
MECHANICAL DATA
ORDERING INSTRUCTIONS
Electrical characteristics presented in this data book, unless otherwise noted, apply for circuit type(s) listed
in the page heading regardless of package. The availability of a circuit function in a particular package
is denoted by an alphabetical reference above the pin-connection diagram(s). These alphabetical references
refer to mechanical outline drawings shown in this section.
Factory orders for circuits described in this catalog should include a four-part type number as explained
in the following example.
EXAMPLE:
( 1. Prefix
SN
54ALS01
-00
)r---------/
MUST CONTAIN TWO TO FOUR LETTERS

SN
Standard Prefix
SNJ
MIL-STD-883 Processed
JANB
MIL-M38510 Processed
2. Unique Circuit Description

MUST CONTAIN SIX TO TWELVE CHARACTERS
Examples:
54ALSOOA
74AS74
74ALS1645A
74ALS1645A-1
MUST CONTAIN ONE OR TWO LETTERS

J, JD, JT, JW, N, NT, NW (Dual-in-line packages) t
FH, FK, FE or FN (Chip carriers)
(From pin-connection diagram on individual data sheet)
4. Instructions (Dash No.)

MUST CONTAIN TWO NUMBERS
- 00 No special instructions
-
10 Solder-dipped leads (N and NT packages only)
t These circuits in dual-in-line packages are shipped in one of the carriers shown below. Unless a specific method of shipment is specified by the ciJstomer
(with possible additional costs), circuits will be shipped in the most practical carrier. Please contact your TI sales representative for the method that will
best suit your particular needs.
Dual-in-line (J, JD, JT, JW, N, NT, NW)

- Slide Magazines
-
A-Channel Plastic Tubing
Barnes Carrier (N only)
Sectioned Cardboard Box
- Individual Plastic Box
TEXAS
5-3
INSTRUMENTS
POST OFFICE BOX 225012 DALLAS.
TEXA~
75265
"AL
DATA
. ceramic chip carrier packages

Each of these hermetically sealed lead less chip carrier packages has a metal cap, a 3-layer ceramic base, and a brazed
seal. The packages are intended for surface mounting on solder lands on 1 ,27-mm (O.050-inch) centers. Terminals require no additional cleaning or processing when used in soldered assembly.
RECTANGULAR FE CERAMIC CHIP CARRIER PACKAGE
(2aterminal package shown)
12
11
10
NUMBER
OF
TERMINALS
28
32
27
1'14(0'04~)
0,89
(0.035)
3 CORNERS
S
CD
28
A1
A2
B1
112
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
8,76
(03451
11,30
104451
9,02
(0.3551
11,56
104551
13,84
(05451
13,84
10.5451
14,10
(0.5551
14,10
105551
7,80
10.3071
10.34
10407)
7.95
103131
13,03
10.5131
12,88
(0.5071
12,88
(0.5071
13,03
10.5131
13,03
(0.5131
1,65
10.0651
1,65
10.0651
2,01
100791
2,01
10.0791
(0.045~
114
0:89 (0.035)
(")
::r
Q)
:::J
Cr
eL
C
,..
Q)
Q)
ALL DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES.
5-4
C2
MIN
TEXAS
INSTRUMENTS
POST OFFICE BOX nS012 DALLAS, TEXAS 75265
MECHANICAL DATA
FH and FK ceramic chip carrier packages

Both versions of these hermetically sealed chip carrier packages have ceramic bases. The FH package
has a single-layer base with a ceramic lid and glass seal. The FK package has a three-layer base with a
metal lid and braze seal.
The packages are intended for surface mounting on solder lands on 1,27 (O.050-inch) centers. Terminals
require no additional cleaning or processing when used in soldered assembly.
FH and FK packages are identical to the FC and FD packages, respectively. The new designations are used
to indicate devices whose terminal assignments conform to a forthcoming JEDEC Standard.
FH AND FK CERAMIC CHIP CARRIER PACKAGES
128-terminal package shown)
CERI!-MIC CHIP CARRIERS

JEDEC
OUTLINE
DESIGNATION
NO.OF
TERMINALS
MS004CB
20
MS004CC
28
MS004CD
44
MS004CE
52
MS004CF
68
MS004CG
84
MIN
MAX
MIN
MAX
8,69
(0.342)
11,23
(0.422)
16,26
(0.640)
18,78
(0.739)
23,83
(0.938)
28,83
(1.135)
9,09
(0.358)
11,63
(0.458)
16,76
(0.660)
19,32
(0.761)
24,43
(0.962)
29,59
(1.165)
7,80
(0.307)
10,31
(0.406)
12,58
(0.495)
12,58
(0.495)
12,6
(0.495)
12,6
(0.495)
9,09
(O.35B)
11,63
(0.458)
14,22
(0.560)
14,22
(0.560)
21,8
(0.862)
27,0
(1.065)
All dimensions and notes tor the specified JEOEC outline apply.
IJ--lr- ,
0.51 (0.020)
0,25 (0.010) - +
~j
-C
FH (FC)
co
FK (FD)
CO
0,51 (0.020)
0,25 (0.010)
16
(,)
"2
CO
.s::.
(,)
CI)
~I
2,54(0.100)
j.---t--l,63 (0.064)
~I
H-
2,03 (0.080)
II
1,63 (0.064)
TEXAS
INSTRUMENTS
5-5
MECHANICAL DATA
FN plastic chip carrier package
Each of these chip carrier packages consists of a circuit mounted on a lead frame and encapsulated within an electrically nonconductive plastic compound. The compound withstands soldering temperatures with no deformation, and
circuit performance characteristics remain stable when the devices are operated in high-humidity conditions. The
packages are intended for surface mounting on solder lands on 1,27 7mm (O.050-inch) centers. Leads require no additional cleaning or processing when used in soldered assembly.
FN PLASTIC CHIP CARRIER PACKAGE

128terminal packaiJe shown)
NO.OF
TERMINALS
20
28
44
52
68
A
MIN
9,70
(0.382)
12,24
(0.482)
17,32
(0.682)
19,86
(0.782)
24,94
(0.982)
B
MAX
10,03
(0.395)
12,57
(0.495)
17,65
(0.695)
20.19
(0.795)
25,27
(0.995)
MIN
8,89
(0.350)
11,43
(0.450)
16,51
(0.650)
19,05
(0.750)
24.13
(0.950)
C
MAX
9,04
(0.356)
11,58
(0.456)
16,66
(0.656)
19,20
(0.756)
24,28
(0.956)
MIN
8,08
(0.318)
10,62
(0.418)
15,70
(0.618)
18,24
(0.718)
23,32
(0.918)
MAX
8,38
(0.330)
10,92
(0.430)
16,00
(0.630)
18,54
(0.730)
23,62
(0.930)
18
17
16
15
14
13
( 19
( 20
I 21
I 22
I 23
8)
1,14 (0.045)
0,63 (0.025)
2,41 (0.095) MIN
1,27 (0.050) X 45
NOM
[ 24
25
26
27
28
2'' 0.04 ''''+

51
NOM
L
0,81 (0.032)
0,66 (0.026)
3 NOM
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES.
5-6
7 )
4,78 (0.188)
4,06 (0.160)
"TIT
TEXAS
INSTRUMENTS
1,35 (0.053)
1,19 (0.047)
MECHANICAL DATA
JG ceramic dual-in-Iine package
This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and 8-lead frame. Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers
(see Note a). Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the
board during soldering. Non-shiny tin-plated leads require no additional cleaning or processing when used in soldered
assembly.
8-PIN JG CERAMIC
r~1
1~0~1
Ii.~' ~~f:
...,
1,27 (0.050) NOM
E!r\
~
90'
8 PLACES
'"'.,,'"~o
--r5,08(0.200)
_ SEATING PLANE
.-\14-
M~X
i':~'~.~"'~~
GLASS
SEALANT
j [_It__
.0.51 (0.020'
MIN
0.356 (0.014)
0,203 (0.008)
8 PLACES
I.
.... 3.30 (0.130)

MIN
1,6 (0.065)
0.4 (0.015)
4 PLACES
--'r
0.76 (0.030) MIN

8 PLACES
0,58 (0.023)
038 (0015)
8 'PLACES
PIN SPACING
2,54 (0.100) T.P.
(SHNotoa)

NOTE: a. Each pin center~ine is located within 0,25 (0.010) of its true longitudinal position.
....cuCU
C
C6
(J
"2
CU
..c:
(J
Q)
:!:
II
TEXAS
INSTRUMENTS
5-7
MECHANICAL DATA
J ceramic packages (including JT and JW dual-in-line and JQ quad-in-line packages)
Each of these hermetically sealed dual-in-line packages consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The JT packages are intended for insertion in mounting-hole rows on
7,62 (0.300) centers, JW packages for mounting-hole rows on 15,24 (0.600) centers, and the JQ quad-in-line
package for mounting-hole rows on 15;24 (0.600) and 20,32 (0.800) centers. Once the leads are compressed and
inserted sufficient tension is provided to secure the package in the board during soldering. Tin-plated ("bright-dipped")
leads require no additional cleaning or processing when used in soldered assembly.
NOTE:
For the 14-, 16-, and 20-pin packages, the letter J is used by itself since these packages are available only in the 7,62 (0.300) row spacing. For the
24-pin packages, if no second letter or row spacing is specified, the package is assumed to have'15,24 (0.600) row spacing.
14-PIN J CERAMIC
~
"'~~'''O'~:''"~''''"f::: :: : I
19'94(0 785)
19,1810755)
@@@ @0
Falls Within JEOEC ~O.116 and
Q Q Q Q Q
7,87(0310)
",=107.J8,="'~~
114----ft-- _7=-",1'10(0.290)
6,22 (0.245)
-I
}-i
m
-,
1,27
(0.050) NOM
lOS"
5,0810.2001
MAX
90'
(2)
0 0 00 0
1,7810.070) MAX 14 PLACES
0,51 10.020) MIN
- SEATING PLANE
eEl
r;;;;:;~;;;;;;;;~ SEALANT
GLASS
~:~: :~:~~~:
14 PLACES,..-l140,356 (0.014)
0203(00081
;4 PLACES
3,30 (0.1301
MIN
2.54(0.100)
1,78 (0.070)
4 PLACES
1.-1
~
14 PLACES
PIN SPACING 2,54 (0.100) T.P.

(Se. Not. 0)
ALL DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES,

16-PIN J CERAMIC
Ih J,~;,~;~~"
If\
1050
""",_,,",,,_~I!""II!""II!""Ii'*SE~lL';,.~T
SEATING PLANE --r'---,......I~
90'
16PLACES
00000
I1I-It-It-ftto,76 10.030) MIN
~\..-~:~~~:~:~~::
16 PLACES
j~ ~~~L(~~~~116PLACES
-I~ 0,3810.0151
~:~ :~~~~: 4 PLACES

For memories of 64 bits and up and a few MSI/LSI products in Series 54174 and Series 54S/74S that are derived from memory circuit bars, this maximum is 7,62 (0.300), All other dimensions apply without modification.
NOTE: a. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
5-8
TEXAS
INSTRUMENTS
MECHANICAL DATA
J ceramic dual-in-Iine packages (continued)
2~PIN
J CERAMIC
24,7610.975)
\oI!ef----- 23,62(0.9l0) -----<~I
'ig'i
1
.~,"=",~{~~~~~~~~j
~:~~:~~~~:
7,62 (0 lOO)
6,22 (0.245)
1,27 10.050) NOM
-SEATING PLANE
lOS'
20 PLACES
II
MAX
l,30 (0 130)
90'
MIN
0,35610.014)
(0.008)
20 PLACES
~....--0,203
GLASS
SEALANT
1P-...........,..."'111'..,.........'111"".........~
5,0810.200)
'1:-------1-
O,l05 (0.012) MIN

4 PLACES
1114>-tt--H-ttt-0,76 (0.030) MIN

16 PLACES
II
~:~ :~:~~~: 20 PLACES
~~~ :~:~~~: 4 PLACES
PIN SPACING 2,54 (0.100) T. P.

ISeeNo' )
24-PIN JT CERAMIC, O.300-INCH ROW SPACING

.....- - - - 31,811.250) MAX - - - - - - . j
..,co
8,26 (0.325)
7,37 (0.290)
CO
1,27 (0.050) NOM
CO
(.)
"2
0,51 (0.020)
MIN
GLASS
SEALANT
SEATING PLANE----.-..L...----.-+,
105
24 PLACES
--\ r
CO
.c
(.)
Q)
II
0,356 (0.014)
0,203 (0.008)
24 PLACES
ALL DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICA!;.LY IN INCHES.

TEXAS
INSTRUMENTS
5-9
MECHANICAL DATA
J ceramic dual-in-line packages (continu!!dl
24-PIN JW CERAMIC
32.811.2901
31.311.2351
@@@@@@@@@@@@
0.83 10.025) R
NOM
00000@@@
1,9110.0751
0 0 70
GLASS SEALANT 1.27 10.0501 _ _---=.1.7_8.,;.1_._ .;.,1M_AX_2_4P_L_AC_E_S+~_I;"
~
. SEATING PLANE,1,78 10.0701
0,5110.0201
0.51 10.020)
0,4110.016)
24 PLACES
~~ ~
PIN SPACING 2,5410.100) T. P.
ISeeNo .. bl
Falls within JEDEC MO-015AA dimensions

NOTE: a, Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
CD
(')
::r
Q)
:::s
C;"
et
C
Q)
r+
Q)
II
5-10
TEXAS
INSTRUMENTS
MECHANICAL DATA
ceramic packages - side-braze (JD suffix)
This is a hermetically sealed ceramic package with a metal cap and side-brazed tin-plated leads.
<t.
Ai :~~:::IO=r~h
."
<t.
f,,
\I 1::
-.II---
r - 5,1 (0.200)
." """1 ~
~jt~ '.""'' '
MAX
1,02 (0.0401
~~~(0.010)
'--
0,53 (0.021)
2,54 (0.100) T.P.
PIN SPACING
(See Note a)
DIM
,
~
A 0,25 (0,010)
BMAX
CNOM
MAX
~~~ (0.120)
0,38 (0.015)
24
28
40
48
52
64
15,24 (0.600)
31,8 (1.25)
15,0 (0.590)
15,24 (0.600)
36,8 (1.45)
15,24 (0.600)
52,1 (2.05)
15,0 (0.590)
15,24 (0.600)
62,2 (2.45)
15,24 (0.600)
67,3 (2.65)
15,0 (0.590)
22,8610.900)
82,613.25)
22,6 (0.890)
15,0 (0.590)
15,0 (0.590)
..,co
CO

CO
(J
"2
CO
.c
(J
Q)
II
TEXAS
INSTRUMENlS
5-11
MECHANICAL DATA
N plastic packages (including NT and NW dual-in-packages)
Each of these dual-in-line packages consists of a circuit mounted on a lead frame and encapsulated within an electrically nonconductive plastic compound. The compound will withstand soldering temperature with no deformation and
circuit performance characteristics remain stable when operated in high-humidity conditions. The packages are intended for insertion in mounting-hole rows on 7,62 (0.300) centers for the NT packages and on 15,24 (0.600) centers for
the NW packages. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in
the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly.
NOTE:
For the 14, 16-, 20-. and 28-pin packages. the letter N is used by itself since these packages are av~ilable in only one row-spacing width - 7,62
(0.3001 for the 14-. 16-. 18-. and 20-pin packages and 15.24 (0.6001 for the 28-pin package. For the 24-pin package. if no second letter or row
spacing is specified. the package is assumed to have 15.24 (0.6001 row spacing.
14-PIN N PLASTIC
IC~ ~ (
198 (0.7801
18.0 (0.7101
'~:~::f::VVVI
0000000
Falls Within JEDEC TO116 and EtA MOOO1AA Dimensions
ALL DIMENSIONS ARE IN MI LLiMETERS AND PARENTHETICALLY IN INCHES.

16-PIN N PLASTIC
2.410.0931 R NOM
2,8 (0.1101 NOM'i~rrrrrrrrrrn4

00000000
ALTERNATE SIDE VIEW
Parts may be supplied in accordance with the

altemate side view at the option of TI plants
located in Europe. In this case; the overall
length of the package is 22.1 (0.8701 max ..

NOTES: a. Each pin centerline is located within 0.25 (0.0101 of its true longitudinal position.
b. This dimension does not apply for solder-dipped leads.
c. When solder-dipped leads are specified. dipped area of the lead extends from the lead tip to at least 0.51 (0.020) above seating plane.
5-12
TEXAS
INSTRUMENlS
MECHANICAL DATA
N plastic dual-in-line packages (continued)
20-PIN N PLASTIC
<I.
,62.0."
Si
61
10.300'0010)
-,
6.86
0.25
0 010)
20 PLACES
23,22(0.914)
80000000
---1 t-- ,
2,0 10 080) NOM
,78 (0070) MAX 20 PLACES
~:::~::~:L::: !
10"
-gf:ii
"I
24,71109751
':::::o~:~=i V0: : v: VJ
Ii.
10.270
\.
5,08
-4t-- (O~O;~ : ~'~~3)
(D'fO'51100201~1
ra)
MAX
MIN
~I
ZOPLACES
(See NolesbandCi
--J
lJL
3,94 (0 155)
3,11 (0 125)
0,"100331 MIN
~I
1,68(0066)
~09i
16 PLACES
~ r--- (~:~~~: ~:~~~)
20 PLACES
PIN SPACING 2,54 (0 1001 T.P
ALTERNATE SIDE VIEW
---1
Parts may be supplied in accordance

with the alternate side view at the option of TI plants located in Europe. In
this case, the overall length of the
package is 26,7 (1.050) max.
t--1.78
to 070} MAX 20 PLACES
24-PIN NT PLASTIC. O.300-INCH ROW SPACING
t - - - - - - - 31.8 (1.250) MAX ------.-j
<::;:::,:::=1::::::::::
<t.~<t.
7,62:t0,25
(0.300 0.010)
7,1 (0.280) MAX
-,
(;\
-1.
~L
I~\
2,0 (0.080) NOM
0,25 (0.010) NOM
5,08~.200)
--SEATING PLANE
l~4Pi~CES ~,
_I\-
MIAX
_
0,28 :t 0,08
(0.011 0.003)
24 PLACES
CO
C
cti
0000000
0,38 (0.015)
MIN
..,co
CJ
'2
1.78 (0.070)
--I j+- 0,83 (0.033) 24 PLACES
CO
ruO~
-f~J-
3,17 (0.125) MIN
2,16 (0.085) MAX

4 PLACES
-.j
~
J:
CJ
Q)
f.-- 0,8424(0.033)
MIN
PLACES
.-J I--- (0.018

0,457 ~ 0,076
0.003)
24 PLACES
PIN SPACING 2,54 (0.100) T.P.

(See
:2:
II
Notea)
ALL DIMENSIONS ARE IN MI LLiMETERS AND PARENTHETICALLY IN INCHES.

NOTES:
a. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
c. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating plane.
TEXAS
INSTRUMENlS
5-13
MECHANICAL DATA
N plastic dual-in-line packages (continued)
24-PIN NW PLASTIC
32,8 (1,2901 M A X - - - - - - - - i
@@@@@@@@@@@
14'~~~5501~
2,0 (0.0801 NOM
Q)000@@@
-1 r
--*-----~-r
-Ij
~25 (0.0101 NOM
1,78 (0.0701 MAX 24 PLACES
5,08 (0.2001 MAX
UT
-SEATINGPLANE--.--:-0.51 (0.0201 MIN
0,28 t 0,08 .-.It(0.011 t 0.0031
24 PLACES
(See Notes b and cl
JI
0,457 :t 0,076
(0.018:t 0.0031
24 PLACES
(See Notes b Ind cl
0,83 (0.0331 MIN

24 PLACES
2,42 (0.0951 MAX
4 PLACES
PIN SPACING 2,54 (0.1001 T. P.
(See Note 01
[3,17 (0.1251 MIN

24 PLACES

NOTES:
a. Each pin centerline Is located within 0,25 (0.010) of its true longitudinal position.
c. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating plane.
s:
CD
::r
Q)
::s
(i"
et
C
....
Q)
Q)
II
5-14
TEXAS
INSTRUMENTS
2
"0
PI...
28-PIN N PLASTIC
0'
"0
Ql
"
Ql
tC
,e
CD
36,6 (1.440) MAX
@@@@)@@@@@@@@@
.1
en
0o
...
:l
:i'
t:
CD
2::
EITHER
INDEX
."
3n_
:;;z
~~~
CD000G)@00G)@@@@@
;:;C~
~3:
:l>1T\
:=z
~~
x
~
'"
en
'"
3.:
C"':)
:c
:z:.
2
ALL DIMENSIONS ARE IN MI LLIMETERS AND PARENTHETICALLY IN INCHES.
Cf
.....
01
II
Mechanical Data
n:z:.
r0-
c
:z:.
-4
:z:.
MECHANICAL DATA
N plastic packages (continued)
-------r
40-PIN N PLASTIC
40
. . . ._
53,l (2.090)
MAX---------.t'l
@
EITHER""""---""---J
INDEX
(D----------------------------0,51 (0.020)
MIN~------------------------------------_,
~~rrr"rrlrrr"rrI~~~~~~~~
r--tI
0,457 0,076 -+j~

(0.018 t 0.003)
.
PIN SPACING 2,54 (0.100) T. P.

(See Note 8)
ALL DIMENSIONS ARE IN MI LLIMETERS AND PARENTHETICALLY IN INCHES.
48-PIN, 52-PIN, AND 64-PIN N PLASTIC
I~~-N~.:============_B_MA_X_-_-_-_-_-_-_-_---.:--"--.:---I1=-~11
--::=J
EITHER "'-..
INDEX
"'"
'
~====================~
L...J
LJ
(D--------------------------------+
PIN SPACING IS 2,54 (0.100)T.P.

(See Note 8)
~
DIM
A 0,25 (0.0101
BMAX
48
52
64
15,24(0.6001
62.2 (2.451
15,24 (0.600)
67,3 (2.651
22.86 (0.9001
81,3 (3.201

NOTE: a. Each pin centerline is located within 0,25 (0.0101 of its true longitudinal position.
5-16
TEXAS
INSTRUMENTS
MECHANICAL DATA
P plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on an a-lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation and circuit performance
characteristics remain stable when operated in high-humidity conditions. The package is intended for insertion in
mounting-hole rows on 7,62-mm (0.3001 centers (see Note al. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Solder-plated leads require no additional
cleaning or processing when used in soldered assembly.
8PIN P PLASTIC
INDEX DOT
J~
0,28 0,08
\\---10.011 . 0.003)
8 PLACES
(See Noteal

NOTE: a. Each pin is within 0,13 (0,0005) radius of true position (TP) at the gauge plane with maximum material condition and unit installed.
TEXAS
INSTRUMENTS
5-17
5-18
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
NOTES
Tl Sales Offices
ALABAMA: Hunllville. 500 Wynn Drive, Sui 514,
Huntsville, Al 35805, (205) B377530.
ARIZONA: Phc<nix. P.o. Box 35160, BI02 N. 23rd Ave.,
Sui A, Phoenix, AZ B5021, (602) 995-1007.
CALIFORNIA: EI Segundo. BlI S. Douglas St., EI Segundo,
CA 90245, (213) 9732571, Irvine. 17B91 Cartwright Rd ..
Irvme, CA 92714, (714) 6601200, Sacralll<nto. 1900 Point
West Way, Suite 171, Sacramento, CA 95B15, (916)
9291521, San Diexo. 4333 View Ridge Ave .. Suite B., San
Diego, CA 92123, (714) 2789600, Santa Clara. 5353 Betsy
Ross Dr., Sanla Clara, CA 95054, (408) 9809000, Woodland
Hill 21220 Erwin St., Woodland Hills, CA 91l67, (21l)
7047759.
COLORADO: Denver. 9725 E. Hampden St., Sui 30\,
Denver, CO 802l\, (l03) 6952800.
CONNECTICUT: Wallingford. 9 Barnes Industrial Park
Rd., Barnes Industrial Park, Wallmgford,
06492, (203)
2690074.
cr
FlORIDA: Ft, lauderdale. 2765 N.W. 62nd St., Ft.

lauderdale, Fl 3Jl09, (l05) 97)8502, Maitland. 2601
Maitland Cenr Parkway, Maitland, Fl 32751, (l05)
6469600, Tampa. 5010 W. Kennedy Blvd., Suite 101, Tampa,
Fl 33609, (BI3) 8706420.
GEORGIA: Atlanta. BOO No"heast Expy., Building 9,
Atlanta, GA 30341, (404) 4524600.
UTAH: Murny. SlOI South Green SE, Sui 200, Murray,

UT 84107, (801) 1668972.
VIRGINIA: Falrf... 3001 Prosperity, Fairfax, VA 2103\,
(703) 8491400.
WISCONSIN: Brookfield. 450 N. Sunny Slope, SUite 150,
Brookfield, WI 53005, (414) 7857140.
CANADA: Ottawa. 436 Mclaren St., OttaWll, Ontario,

Canada, K1POM8,(61l) lll II 77; Richmond Hill. 180
Centre St. E., RIChmond HiIIL4CIBI, Ontario, Canada,
(416) 8849181, St, laurent. Ville St. laurent Quebec, 9460
Trans Canada Hwy., St. laurent, Quebec, Canada H4SIR7,
(514) Jl43635.
E
MARYlAND: Arrow (301) 1475200; Diplomat (l01)

.
9951216, Kierulff(301) 1475020, Milgray (l01) 468-6400.
CALIFORNIA: Northan. 5353 Betsy Ross Dr., Santa Clara,

CA 95054, (408) 7482110, Hotline: (408) 980-0305.
Southern. 17891 Cartwright Rd .. Irvine, CA 91714, (714)
6608140, Hotline: (114) 6608164.
NEW HAMPSHIRE: Arr<:Ni (603) 668-6968.
GEORGIA: Atlanta. 3300 Northeast Expressway, Building 8,

Atlanta, GA 30341, (404) 4514681, Hotline: (404)
4514686.
IOWA: Cedar Rapidl. 373 Colliru Rd. NE, Suite 200, Cedar
Rapids, IA 52402, (319) 3959550.
TEXAS: DalIu. 1001 E. Campbell Rd .. Richardson, TX

75081, (114) 680.5066, Hotline: (214) 6805096.
89Q.4171.
MASSACHUSETTS: Waltham. 504 Totn Pond Rd.,

Waltham, MA 02154, (617) 8959100.
TI Distributors
MICHIGAN: Farmington HiU 33737 W. 12 Mile Rd.,

Farmington Hills, MI48018, (l13) 5531500.
ALABAMA: Arrc:NI (205) 8822730, Marshall (105)

8819235.
MINNESOTA: Edina. 7625 Parklawn, Edina, MN 55435.

(612) 8301600.
ARIZONA: Phoenix. Arrow (601) 9684800, Kierulff (601)

1434101, Marshall (601) 9686181, Wyle (602) 2491232,
Tunon. Kierulff (601) 6149986.
NEW YORK: wt Syracuoe. 6700 Old Collamer Rd., East

Syracuse, NY Il057, (l15) 4639291; Endicott. 112
Nanticoke Ave., P.o. Box 618, Endicott, NY 13760, (607)
7543900, Melville. I Huntington Quadrangle, Sui 3C10,
P.o. Box 1936, Melville, NY 11747. (516) 4546600,
Poughkeepsie. 385 South Rd .. Poughkeepsie, NY 11601, (914)
4731900, Rochester. 1110 Jefferson Rd., Rochester, NY
14623, (716) 'Il454OO.
NORTH CAROLINA: Charlot.... 8 Woodlawn Green,
WlXldlawn Rd., Charlotte, NC 18110, (04) 5170930,
Raleigh. 2809 HghW<X>ds Blvd., Suite 100, Raleigh, NC
27615, (919) 876-1725.
OHIO: Beachwood. lJ408 Commerce Park Rd., Beachwood,
OH 44111, (216) 4646100, Dayton. Kingsley Bldg .. 4114
linden Ave .. Dayton, OH 454Jl, (51l) 15B3B77.
OKLAHOMA, rul... 7615 East 63rd Place, 3 Memorial
Place, Tulsa, OK 74lll, (918) 15006H.
OREGON: Beavenon. 6700 SW 105th St .. Suite 110,
Beaverton, OR 97005, (503) 6436758.
PENNSYlVANIA: Ft, W..hington. 160 New York Dr., Ft.
Washmgton, PA 19034, (115) 6436450, Coraopolil. 410
Ruuser Rd., 3 A,,!,,,,, Office Park, Curaopolis, PA 15108,
(412) 7718510.
TEXAS: Austin. 12101 Research Blvd .. P.O. Box 2909,
Austm, TX 787l1, (512) 1507655, Dallao. 1001 E. Campbell
Rd .. Richardson, TX 750B0, (114) 6805082, Houoton. 9100
S. .. thwest Frwv., Suite 237, H,..ston, TX 77036, Oil)
7786591, San Antonio. 1000 Central Parkway South, San
Antonin, TX 7Blll, (SI1) 4961779.
MISSOURI: Kanau City, LCOMP (816) 1l114OO, St,

louiI. Arrow (l14) 5676888, HallMark (314) 2915350,
Kierulff(314) 739-0855.
NEW JERSEY, Arrow (201) 5755300, (609) 596-8000,

Diplotnat (101) 7851830, General Radio (609) 9648560,
Kierulff (101) 5756750, Marshall (101) 881-0320, Mi\gray
(609) 9835010.
NEW MEXICO: Arrow (505) 2434566, International
Electronics (505) 3458111.
NEW YORK: lonJ bland. Arww (516) 2311000, Diplomat
(516) 454-6334,]ACO (516) 173.5500, Marshall (516)
2732424, Milgray (516) 4209800, Rocheoler, Arrc:NI (716)
175-0300, Manhall (716) 2357610, Rochester Radio Supply
(716) 4547800, Syracuae. Arrow (315) 651.1000; Diplomat
(315) 6515000, Marshall (607) 754-1570.
NORTII CAROLINA: AfTCNI (919) 876313l, (919)
7158711, Kierulff (919) 8718410.
MARYlAND: Baltimore, I Rutherford PI., 7tH Rutherford

Rd .. Baltimore, MD 21207, (l01) 944-6600.
NEW MEXICO: Albuquerque. 5907 Alice NSE. Suite E.,

Albuquerque, NM 87110, (505) 2658491.
MICHIGAN: Detroit. Arww (lll) 9718100, Marshall (lll)

5255850, Newa:k (31l) 967-0600, Grand Rapids. Arrow
(616) l4J0912.
MINNESOTA: Arrow (612) 8301800, HallMark (612)
8543123, Kierulff (611) 9417500.
MASSACHUSETTS: Booton. 4002 Totten Pond Road,

Waltham, MA 01154, (617) 890-661\, Hodine: (617)
West, Clark, NJ
MASSACHUSETIS: Arrow (617) 93J81l0, Diplomat (617)

9356611, Kierulff(617) 6678331; Manhall (617) 2718100,
Time (617) 9358080.
TI Regional
Technology Centers
INDIANA: Ft. Wayne. 2020 Inwood Dr.. Ft. Wayne, IN

46815, (219) 4245174, Indianapolil. 2346 S. Lynhunt, Sui
J.4OO, Indianapolis, IN 46241, (l\7) 2488555.
Ave.
IOWA: Arrow (319) 3957130.

KANSAS: KaruaA City. HallMark (913) 8884747, WIChita.
LCOMP (316) 2659507.
IlliNOIS: Chico&<>. 515 W. Algonquin Road, Arlington

Heights, IL6OOO5, (lIl) 6401909, Hotline: (J1l) 1186008.
NEW JERSEY: Clark. 292 Terminal

07066, (201) 5749800.
(lIl) 6384411.
INDIANA: Indianapolil. Arrow (317) 2439353, Graham
(l17) 6348101; Ft, Wayne. Graham (219) 4lJ.3412.
WASHINGTON: Redmond. 2723152nd Ave., N.E. Bldg. 6,

Redmond, WA 98051, (206) 88130B0.
ILLINOIS: Arlington Height.. 515 W. Algonquin,

Arlington Heights, Il6OOO5, (l12) 6402934.
MISSOURI: Kanau City. 8080 Ward Pkwy., Kansas City,

MO 64114, (816) 5232500, SI, louil. 11861 Westline
Industrial Drive. St. LoUiS, MO 6314\' (l14) 5697600.
ILLINOIS: ArwN (J11) 397-3440, o.plomat (lll) 5951000,

HallMark (J12) 8603800, Kierulff(lll) 6400100, Newark
CALIFORNIA: los Anll<leslOnnIl< County. Arrc:NI (213)

7017500, (714) 8385411, Kierulff (113) 715-0315, (714)
7lI.5711, Marshall (213) 999.5001, (21l) H27204, (714)
5566400, R.V. Weatherford (714) 6)49600, (lll) 8493451,
(714) 6lJ.1161; Wyle (lll) 3118100, (714) 863.9953,
Sacramento. Arrc:NI (916) 925 7456, Wyle (916) 6385181,
San Dieco. Arrow (619) 5654800, Kierulff (619) 178.1I12,
Manhall (619) 5789600, R. V. Weatherford (619) 6951700,
Wyle (619) 5659171, San Francioco Bay Area. Arrow (408)
7456600, Kierulff (415) 9686191, Marshall (408) 7311100,
Wyle (408) 7171500, Santa Barbara. R. V. Weatherford (805)
9658551.
COLORADO: Arrow (l03) 6961111, Kierulff (J03')
7904444, Wyle (303) 4579953.
CONNECTICUT: Arrow (103) 1657741, o.plomat (203)
7979674, Kierulff (203) 2651115, Manhall (203) 2653822,
Milgtay (103) 7950714.
FlORIDA: Ft, lauderdale. Arrow (l05) 7767790, Diplomat
(l05) 9749700, Kierulff (l05) 6516950, Orlando. Arrow
(l05) 7151480, Milgray (l05) 6475747, Tampa. Diplomat
(81l) 441-4514, Kierulff (81l) 5761966.
GEORGIA: Arrow (404) 4498152, Kierulff (404) 4475251,
Marshall (404) 9235150.
TEXAS
INSTRUMENTS
Creating useful products
and services for you.
OHIO: Cincinnati. Graham (513) 7721661, HallMark (51l)

5635980; Cleveland. Arrow (116) 2483990, HallMark (116)
47J.l907, Kierulff (216) 587-6558; Columbua. HallMark
(614) 8914555, Dayton. Arrow (513) 4355563; ESCO (51l)
22611l3, Marshall (513) 2368088.
OKLAHOMA: Arrow (918) 6657700, HallMark (918)
6653100, Kierulff (918) 1517537.

OREGON: Arrow (503) 684-1690, Kierulff (503) 6419150,
Wyle (503) 6406000.
PENNSYlVANIA: Arrow (412) 8567000, (215) 9181800,
General Radio (215) 9117037.
TEXAS: Auatin. Arrow (511) 8354180, HallMark (511)
2588848, Kierulff (511) 8351090, Dallaa. ArraN (214)
3867500, HallMark (114) 3411147, International
Electronics (114) 2339313, Kierulff (214) 3432400, EI Paao.
International Electroniu (915) 7789761, Houaton. Arrow
Oil) 5304700, HallMark (713) 781-6100, Harrison
Equipment Oil) 8792600, Kierulff (71l) 5307030.
UTAH: Dlplotnat (801) 48641)4, Kierulff (801) 973-69Il,
Wyle (801) 9749953.
VIRGINIA: Arrow (804) 281-041l.
WASHINGTON: ArraN (206) 643-4800; Kierulff (206)
5754410, Wyle (106) 4538300.
WISCONSIN: Arrow (414) 7646600, HallMark (414)
7613000, Kierulff (414) 7848160.
CANADA: Calpey. Future (403) 159-6408, Varah (403)
23012l5, Hamilton. Varah (416) 5619111; Montreal.
CESCO (514) 7355511, Future (514) 6947710, Ottawa.
CESCO (61l) 2266905, Future (61l) 820831l, ITT
Components (613) 2167406, Quebec City, CESCO (418)
6874111; ITT Components (514) 7351171; Toronto.
CESCO (116) 661-0220, Future (416) 6635563, ITT
Components (416) 6307971, Vancouver. Future (604)
438.5545, Varah (604) 8733211, ITT Components (604)
2707805, WIlUlipes. Varah (204) 6H6190.
BE
TI Worldwide
Sales Offices
ALABAMA. HunlO.ilIe, 500 Wynn Drive, Suit< 514,
HuntSVIlle, AL35805, (205) 8377530.
ARIZONA. Pboonix, P.O. Box 35160, 8102 N. 23rd Ave.,
Suite A, Phoenix, AZ 85021, (602) 9951007.
CALIFORNIA. EI Segundo, 831 S. Douglas St., EI Segundo,
CA 90245, (213) 9732571; Irvine. 17891 Carrwright Rd .
Irvine, CA 92714, (714) 6601200; Sacramento. 1900 Point
West Way, Suite 171, Sacramento, CA 95815, (916) 9291521;
San DiCiO. 4333 Viow Ridge Ave., Suite B., San Diego, CA
92123, (714) 2789600; San~ Clara. 5353 Betsy Ross Dr.,
Santa Clara, CA 95054, (408) 9809000; Woodland Hill"
21220 Erwin St., Woodland Hills, CA 91367, (213) 7047759.
o.REGON. Bea""rton. 6700 SW 105th St., Suite 110,

Beaverton, OR 97005, (503) 6436758.
PENNSYLVANIA. ft. W..hin~on. 260 New York Dr., Ft.
. Washington, PA 19034, (215) 6436150; Coraopolis, 420
Rouser Rd., 3 Airport Office Park, Coraopolis, PA 15\08,
(412) 7718550.
TEXAS. AUllin. 12501 Research Blvd., P.O. Box 2909,
Austin, TX 78723, (512) 2507655; Dalla., 1001 E. Campbell
Rd., Richardson, TX 75080. (214) 6805082; Houllon. 9100
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TEXAS
INSTRUMENTS
Creating useful prooucts
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Printed in U.S.A.
Creating useful product~

and senices for ) ou.
SDYD001

1984 The TTL Data Book Vol 1

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SDYD001

The TTL Data Book

Alphanumeric Index and

The TTL Data Book

Texas Instruments reserves the right to make changes at

Copyright 1984 Texas Instruments Incorporated

The TTL Data Book

The TTL Data Bool<

SN7414 .............. , .......

SN74H103 ......... " .........

........ .... .... ............

. .......... ....... ..........

SN74LS123 ...... .............

SN74164 ..... ' " ............. 2

SN74ALS251 ......... .........

54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS

Texas Instruments transistor-transistor-Iogic (TTL)

Typical characteristics of the seven TTL series offered

Typical Power Dissipation-mW

saturated logic gate from the indicated families.

TABLE 1-54/74 FAMILY TYPICAL SSI PERFORMANCE CHARACTERISTICS

Full compatibility provides choice from seven distinct performance ranges

FULL COMPATIBILITY IS DESIGNED INTO TI TTL

All series are designed for single 5-volt power supply

t Integrated Schottky-Barrier di'ode-clamped

U.S. Patent Number 3,463,975.

54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS

Interemitter voltage (see Note 2)

'16, '17, '26

Operating free-air temperature range

Storage temperature range

High-level voltage applied to a disabled 3-state output

Off-state (high-level) voltage applied

Supply voltage, Vee (see Note 1)

unused inputs of positive-AND/NAND gates

54174 FAMILIES OF COMPATIBLE TTL CIRCUITS

STANDARD INPUTS (ONE LOAD)t

INPUT PULL-UP RESISTOR

PART I - OPERATING CONDITIONS AND CHARACTERISTICS (IN SEQUENCE BY LETTER SYMBOLS)

Maximum clock frequency

Supply current, outputs high

Supply current. outputs low

High-level input current

low-level input current

High-level output current

low-level output current

Short-circuit output current

* Current out of a ,terminal is given as a negative value.

High-level input voltage

High-level output voltage

Low-level output voltage

Disable time (of a three-state outputl

Enable time (of a three-state output)

a terminal Is given as a negative value.

Propagation delay time

Propagation delay time. high-to-Iow-Ievel output

Disable time (of a three-state output) from high level

Propagation delay time. low-to-high-Ievel output

Disable time (of a three-state output) from low level

Enable time (of a three-state output) to high level

Enable time (of a three-state output) to low level

Sense recovery time

Pulse duration (width)