UCR LOGIC

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//3_UCR
ASSIGN 3E1_NRR * ~3E1_NNR * (74_NWKR.C6C4 * 94_NWKR.C7C4 + 3_UCR) *
OV1_21_NRR * ~OV1_21_NNR + 3E2_NRR * ~3E2_NNR * (74_RWKR.C6C4 *
94_RWKR.C7C4 + 3_UCR) * OV2_23_NRR * ~OV2_23_NNR
TO 3E1.E2_UCR.INT;
ASSIGN CH1_NR.C6C4 * (CH15_NR.C7C4 * 3A_NRR * ~3A_NNR * (61_NWKR.C6C4 *
96_NWKR.C7C4 * 111_NWKR.C7C4 + 3_UCR) * OV17_NRR * ~OV17_NNR +
CH2_NR.C6C4 * CH3_NR.C6C4 * CH7_NR.C6C4 * CH13_NR.C7C4 *
CH14_NR.C7C4 * (61_RWKR.C6C4 * 62_RWKR.C6C4 * 63_NWKR.C6C4 *
66_NWKR.C6C4 * 69_NWKR.C6C4 * 113_NWKR.C7C4 * 95_NWKR.C7C4 +
3_UCR) * ((73_NWKR.C6C4 * 93_NWKR.C7C4 + 3_UCR) * 3E1.E2_UCR.INT
+
3E3_NRR * ~3E3_NNR * (73_RWKR.C6C4 * 92_RWKR.C7C4 * 93_RWKR.C7C4
*
95_NWKR.C7C4 + 3_UCR) * OV1_25_NRR * ~OV1_25_NNR))
TO 3A.E1_E3_UCR.INT;
ASSIGN CH13_NR.C7C4 * CH14_NR.C7C4 * (71_NWKR.C6C4 * 92_NWKR.C7C4 *
93_RWKR.C7C4 * 113_NWKR.C7C4 + 3_UCR) * (3E4_NRR * ~3E4_NNR *
(72_NWKR.C6C4 * 91_NWKR.C7C4 + 3_UCR) * ((95_NWKR.C7C4 + 3_UCR)
*
OV1_27_NRR * ~OV1_27_NNR + 3E5_NRR * ~3E5_NNR * (72_RWKR.C6C4 *
91_RWKR.C7C4 + 3_UCR) * ((95_NWKR.C7C4 + 3_UCR) *
OV1_29_NRR * ~OV1_29_NNR)))
TO 3E4.E5_UCR.INT;

ASSIGN CH1_NR.C6C4 * CH2_NR.C6C4 * CH3_NR.C6C4 * CH4_NR.C6C4 *

CH6_NR.C6C4 * (61_RWKR.C6C4 * 62_RWKR.C6C4 * 63_RWKR.C6C4 *
64_NWKR.C6C4 * 66_NWKR.C6C4 * 67_NWKR.C6C4 * 69_NWKR.C6C4 *
70_NWKR.C6C4 + 3_UCR) * (3E6_NRR * ~3E6_NNR * CH16_NR.C7C4 *
(71_RWKR.C6C4 * 97_RWKR.C7C4 * 98_RWKR.C7C4 * 99_RWKR.C7C4 *
100_RWKR.C7C4 * 101_RWKR.C7C4 + 3_UCR) * OV31_NRR *
~OV31_NNR + 3E4.E5_UCR.INT)
TO 3E4.E5.E6_UCR.INT;
ASSIGN CH1_NR.C6C4 * CH2_NR.C6C4 * CH3_NR.C6C4 * CH4_NR.C6C4 *
CH6_NR.C6C4 * CH8_NR.C6C4 * CH16_NR.C7C4 * (61_RWKR.C6C4 *
62_RWKR.C6C4 * 63_RWKR.C6C4 * 64_NWKR.C6C4 * 66_NWKR.C6C4 *
67_NWKR.C6C4 * 69_NWKR.C6C4 * 70_RWKR.C6C4 * 100_RWKR.C7C4 *
101_RWKR.C7C4 + 3_UCR) * (78_NWKR.C6C4 * 99_RWKR.C7C4 * (3F1_NRR
*
~3F1_NNR * (79_NWKR.C6C4 * 97_NWKR.C7C4 * 98_RWKR.C7C4 + 3_UCR)
* OV33_NRR * ~OV33_NNR + 3F2_NRR * ~3F2_NNR * (79_RWKR.C6C4 *
98_NWKR.C7C4 + 3_UCR) * OV35_NRR * ~OV35_NNR) + 3F3_NRR * ~3F3_N
NR *
(78_RWKR.C6C4 * 99_NWKR.C7C4 + 3_UCR) * OV37_NRR * ~OV37_NNR)
TO 3F1.F2.F3_UCR.INT;
ASSIGN CH10_NR.C6C4 * CH17_NR.C7C4 * CH19_NR.C7C4 * (80_NWKR.C6C4 *
81_NWKR.C6C4 * 107_NWKR.C7C4 * 108_NWKR.C7C4 +

3_UCR) * (82_NWKR.C6C4 * (3G2_NRR * ~3G2_NNR * (83_NWKR.C6C4 *

* 103_RWKR.C7C4 * 109_RWKR.C7C4 + 3_UCR) * OV41_NRR * ~OV41_NNR
+
3G3_NRR * ~3G3_NNR * (83_RWKR.C6C4 * 103_NWKR.C7C4 *
104_RWKR.C7C4 + 3_UCR) * OV43_NRR * ~OV43_NNR) + 3G4_NRR *
~3G4_NNR * (82_RWKR.C6C4 * 103_NWKR.C7C4 * 104_NWKR.C7C4 + 3_UCR
) *
OV45_NRR * ~OV45_NNR)
TO 3G2.G3.G4_UCR.INT;
ASSIGN CH10_NR.C6C4 * CH11_NR.C6C4 * CH12_NR.C6C4 * CH18_NR.C7C4 *
CH19_NR.C7C4 * CH20_NR.C14C4 * (80_NWKR.C6C4 * 81_RWKR.C6C4 *
86_RWKR.C6C4 * 107_NWKR.C7C4 * 108_NWKR.C7C4 * 114_NWKR.C7C4 +
3_UCR) * (3G5_NRR * ~3G5_NNR * (84_RWKR.C6C4 * 106_NWKR.C7C4 +
3_UCR) * OV47_NRR * ~OV47_NNR + 84_NWKR.C6C4 * 106_RWKR.C7C4 *
(3G6_NRR * ~3G6_NNR * (85_RWKR.C6C4 * 105_RWKR.C7C4 + 3_UCR) *
OV49_NRR * ~OV49_NNR + 3G7_NRR * ~3G7_NNR * CH21_NR.C14C4 *
(85_NWKR.C6C4 * 105_NWKR.C7C4 + 3_UCR) * OV51_NRR * ~OV51_NNR))
TO 3G5.G6.G7_UCR.INT;
ASSIGN CH1_NR.C6C4 * CH2_NR.C6C4 * CH3_NR.C6C4 * CH4_NR.C6C4 *
CH5_NR.C6C4 * CH6_NR.C6C4 * CH9_NR.C6C4 * (61_RWKR.C6C4 *
62_RWKR.C6C4 * 63_RWKR.C6C4 * 64_RWKR.C6C4 * 65_NWKR.C6C4 *
66_NWKR.C6C4 * 67_NWKR.C6C4 * 70_NWKR.C6C4 + 3_UCR) * (3G1_NRR *
~3G1_NNR * CH16_NR.C7C4 * CH19_NR.C7C4 * (80_RWKR.C6C4 *
101_RWKR.C7C4 * 109_NWKR.C7C4 + 3_UCR) * OV39_NRR * ~OV39_NNR +
3G2.G3.G4_UCR.INT + 3G5.G6.G7_UCR.INT)
TO 3G1_G7_UCR.INT;
ASSIGN (3A.E1_E3_UCR.INT + 3E4.E5.E6_UCR.INT + 3F1.F2.F3_UCR.INT +
3G1_G7_UCR.INT) * ~C3_UCR
TO 3_UCR,
3_UCR.C4C7,
3_UCR.C4C8;
//3AUTO_UCR
ASSIGN CH1_NR.C6C4 * 61_NWKR.C6C4 * 3AUTO_NRR
TO 3AUTO_UCR;
//C3_UCR
ASSIGN CH1_NR.C6C4 * CH2_NR.C6C4 * CH3_NR.C6C4 * 61_RWKR.C6C4 *
62_RWKR.C6C4 * 66_NWKR.C6C4 * (69_NWKR.C6C4 * (CH7_NR.C6C4 *
CH13_NR.C7C4 * 63_NWKR.C6C4 * 113_NWKR.C7C4 * (73_NWKR.C6C4 *
(C3E1_NRR * ~C3E1_NNR * 74_NWKR.C6C4 + C3E2_NRR * ~C3E2_NNR *
74_RWKR.C6C4) + C3E3_NRR * ~C3E3_NNR * 73_RWKR.C6C4) + CH4_NR.C6
C4 *
CH6_NR.C6C4 * 63_RWKR.C6C4 * 64_NWKR.C6C4 * 67_NWKR.C6C4 *
70_NWKR.C6C4 * (CH13_NR.C7C4 * 71_NWKR.C6C4 * 113_NWKR.C7C4 *
(C3E4_NRR * ~C3E4_NNR * 72_NWKR.C6C4 + C3E5_NRR * ~C3E5_NNR *
72_RWKR.C6C4) + C3E6_NRR * ~C3E6_NNR * 71_RWKR.C6C4)) +
C3F_G_UCR.INT) * (~UP_TCPR.C6C4 + C3_UCR) * ~3_UCR
TO C3_UCR;
ASSIGN CH4_NR.C6C4 * CH6_NR.C6C4 * 63_RWKR.C6C4 * 67_NWKR.C6C4 *

(CH8_NR.C6C4 * CH16_NR.C7C4 * 64_NWKR.C6C4 * 69_NWKR.C6C4 *

70_RWKR.C6C4 * (78_NWKR.C6C4 * (C3F1_NRR * ~C3F1_NNR *
79_NWKR.C6C4 + C3F2_NRR * ~C3F2_NNR * 79_RWKR.C6C4 * 100_NWKR.C7
C4) +
C3F3_NRR * ~C3F3_NNR * 78_RWKR.C6C4) + C3G1_G7_UCR.INT)
TO C3F_G_UCR.INT;
ASSIGN CH5_NR.C6C4 * CH9_NR.C6C4 * 64_RWKR.C6C4 * 65_NWKR.C6C4 *
70_NWKR.C6C4 * (C3G1_NRR * ~C3G1_NNR * 80_RWKR.C6C4 +
CH10_NR.C6C4 * 80_NWKR.C6C4 * (81_NWKR.C6C4 * 108_NWKR.C7C4 *
109_NWKR.C7C4 * (82_NWKR.C6C4 * (C3G2_NRR * ~C3G2_NNR *
83_NWKR.C6C4 + C3G3_NRR * ~C3G3_NNR * CH19_NR.C7C4 *
83_RWKR.C6C4) + C3G4_NRR * ~C3G4_NNR * CH19_NR.C7C4 *
82_RWKR.C6C4) + CH11_NR.C6C4 * CH12_NR.C6C4 *
CH20_NR.C14C4 * 81_RWKR.C6C4 * 86_RWKR.C6C4 * 114_NWKR.C12C4 *
(C3G5_NRR * ~C3G5_NNR * 84_RWKR.C6C4 + 84_NWKR.C6C4 *
(C3G6_NRR * ~C3G6_NNR * 85_RWKR.C6C4 + C3G7_NRR *
~C3G7_NNR * 85_NWKR.C6C4))))
TO C3G1_G7_UCR.INT;
//SH5_UCR
ASSIGN CH2_NR.C6C4 * CH3_NR.C6C4 * 62_NWKR.C6C4 * 66_RWKR.C6C4 *
(69_NWKR.C6C4 * (CH7_NR.C6C4 * 63_NWKR.C6C4 * (73_NWKR.C6C4 *
(SH5A_NRR * ~SH5A_NNR * 74_NWKR.C6C4 + SH5B_NRR * ~SH5B_NNR *
74_RWKR.C6C4) + SH5C_NRR * ~SH5C_NNR * 73_RWKR.C6C4) +
CH4_NR.C6C4 * CH6_NR.C6C4 * 63_RWKR.C6C4 * 64_NWKR.C6C4 *
67_NWKR.C6C4 * (70_NWKR.C6C4 * (71_NWKR.C6C4 * (SH5D_NRR *
~SH5D_NNR * 72_NWKR.C6C4 + SH5E_NRR * ~SH5E_NNR * 72_RWKR.C6C4)
+
SH5F_NRR * ~SH5F_NNR * 71_RWKR.C6C4) + CH8_NR.C6C4 * 70_RWKR.C6C
4
* (78_NWKR.C6C4 * (SH5G_NRR * ~SH5G_NNR * 79_NWKR.C6C4 + SH5H_NR
R
* ~SH5H_NNR * 79_RWKR.C6C4) + SH5J_NRR * ~SH5J_NNR *
78_RWKR.C6C4))) + SH5K_R_UCR.INT)
TO SH5_UCR;
ASSIGN CH4_NR.C6C4 * CH5_NR.C6C4 * CH9_NR.C6C4 * 63_RWKR.C6C4 *
64_RWKR.C6C4 * 65_NWKR.C6C4 * 67_NWKR.C6C4 * (SH5K_NRR *
~SH5K_NNR * 80_RWKR.C6C4 + CH10_NR.C6C4 * 80_NWKR.C6C4 *
(81_NWKR.C6C4 * (82_NWKR.C6C4 * (SH5L_NRR * ~SH5L_NNR *
83_NWKR.C6C4 + SH5M_NRR * ~SH5M_NNR * 83_RWKR.C6C4) + SH5N_NRR *
~SH5N_NNR * 82_RWKR.C6C4) + CH11_NR.C6C4 * CH12_NR.C6C4 *
81_RWKR.C6C4 * 86_RWKR.C6C4 * (SH5P_NRR * ~SH5P_NNR *
84_RWKR.C6C4 + 84_NWKR.C6C4 * (SH5Q_NRR * ~SH5Q_NNR *
85_RWKR.C6C4 + SH5R_NRR * ~SH5R_NNR * 85_NWKR.C6C4))))
TO SH5K_R_UCR.INT;
//SH7_UCR
ASSIGN CH3_NR.C6C4 * CH4_NR.C6C4 * 63_NWKR.C6C4 * 67_RWKR.C6C4 *
(CH6_NR.C6C4 * 64_NWKR.C6C4 * (CH7_NR.C6C4 * 66_NWKR.C6C4 *
69_RWKR.C6C4 * 70_NWKR.C6C4 * (SH7B_NRR * ~SH7B_NNR * 73_RWKR.C6
C4 +
73_NWKR.C6C4 * (SH7C_NRR * ~SH7C_NNR * 74_RWKR.C6C4 +

SH7D_NRR * ~SH7D_NNR * 74_NWKR.C6C4)) + 69_NWKR.C6C4 *

(70_NWKR.C6C4 * (71_NWKR.C6C4 * (SH7A_NRR * ~SH7A_NNR *
72_NWKR.C6C4 + SH7E_NRR * ~SH7E_NNR * 72_RWKR.C6C4) + SH7F_NRR *
~SH7F_NNR * 71_RWKR.C6C4) + CH8_NR.C6C4 * 70_RWKR.C6C4 *
(78_NWKR.C6C4 * (SH7G_NRR * ~SH7G_NNR * 79_NWKR.C6C4 + SH7H_NRR
*
~SH7H_NNR * 79_RWKR.C6C4) + SH7J_NRR * ~SH7J_NNR *
78_RWKR.C6C4))) + SH7K_R_UCR.INT)
TO SH7_UCR;
ASSIGN CH5_NR.C6C4 * CH9_NR.C6C4 * 64_RWKR.C6C4 * 65_NWKR.C6C4 *
(SH7K_NRR * ~SH7K_NNR * 69_RWKR.C6C4 * 80_RWKR.C6C4 +
CH10_NR.C6C4 * 80_NWKR.C6C4 * (81_NWKR.C6C4 * (82_NWKR.C6C4 *
69_RWKR.C6C4 * (SH7L_NRR * ~SH7L_NNR * 83_NWKR.C6C4 + SH7M_NRR *
~SH7M_NNR * 83_RWKR.C6C4) + SH7N_NRR * ~SH7N_NNR * 82_RWKR.C6C4)
+
CH11_NR.C6C4 * CH12_NR.C6C4 * 81_RWKR.C6C4 * 86_RWKR.C6C4 *
(SH7P_NRR * ~SH7P_NNR * 84_RWKR.C6C4 + 84_NWKR.C6C4 * (SH7Q_NRR
*
~SH7Q_NNR * 85_RWKR.C6C4 + SH7R_NRR * ~SH7R_NNR *
85_NWKR.C6C4)))))
TO SH7K_R_UCR.INT;
//SH9_UCR
ASSIGN CH5_NR.C6C4 * 68_RWKR.C6C4 * (CH10_NR.C6C4 * CH11_NR.C6C4 *
CH12_NR.C6C4 * 65_NWKR.C6C4 * 81_NWKR.C6C4 * 86_NWKR.C6C4 *
(84_NWKR.C6C4 * (SH9A_NRR * ~SH9A_NNR * 85_NWKR.C6C4 + SH9B_NRR
*
~SH9B_NNR * 85_RWKR.C6C4) + SH9C_NRR * ~SH9C_NNR * 84_RWKR.C6C4)
+
CH4_NR.C6C4 * CH9_NR.C6C4 * 64_NWKR.C6C4 * 65_RWKR.C6C4 *
(CH10_NR.C6C4 * 80_NWKR.C6C4 * 81_NWKR.C6C4 * (SH9D_NRR *
~SH9D_NNR * 82_RWKR.C6C4 + 82_NWKR.C6C4 * (SH9E_NRR *
~SH9E_NNR * 83_RWKR.C6C4 + SH9F_NRR * ~SH9F_NNR * 83_NWKR.C6C4))
+
SH9G_NRR * ~SH9G_NNR * 80_RWKR.C6C4) + CH12_NR.C6C4 * 65_NWKR.C6
C4 *
86_RWKR.C6C4 * (SH9H_NRR * ~SH9H_NNR * 87_NWKR.C6C4 *
88_RWKR.C8C4 + SH9J_NRR * ~SH9J_NNR * 87_RWKR.C6C4))
TO SH9_UCR;
//SL11_UCR
ASSIGN SL11_NRR * ~SL11_NNR * CH4_NR.C6C4 * 67_NWKR.C6C4
TO SL11_UCR; // TO BE CONFIRMED
//SL13_UCR
ASSIGN SL13_NRR * ~SL13_NNR * CH5_NR.C6C4 * 68_NWKR.C6C4
TO SL13_UCR;