TUTORIAL 1

1. Assuming 1024*16 memory model, calculate the size of

a) PC b) AR c) IR d) DR e) AC
2. Show the block diagram of the hardware that implements the following register
transfer statement:
Xyz: R2<- R1, R1<-R2.
3. Draw the block diagram for the hardware that implements the following
statements
X+YZ: AR<- AR+BR
4. Explain the memory operation in each case
a) R2<- M [AR]
b) M [AR] <- R3
c) R5<- M [R5]
5. A digital Computer has a common bus system for 16 register 32 bit each. The bus
is constructed with MUX.
a) How many selection bits are there in each MUX?
b) What size of MUX is required?
c) How many multiplexers are there in the bus?
6. Show the block diagram of the hardware that implements the following register
transfer statements
T: R5<- R0
T1: R5<- R1
T2: R5<-R2
T3:R5<-R3
Note only one variable is equal to one at any given time
7. Represent the following conditional control statements by two register transfer
statements with control functions.
If (P=1 then (R1<-R2) else if (Q=1) then (R1<-R3)
8. Register A holds 8 bit binary 11011001. Determine the B operand and the logic
operation to be performed in order to change the value in A to
1. 01101101
2.11111101
9. What is wrong with the following register transfer statements?
1. XT: AR<-AR, AR<-0
2. yT: R1<-R2,R1<-R3
3. zT:PC<-AR,PC<-PC+1
10 AR=11110010, BR=111111, CR=10111001, DR=11101010. What will value of
register after sequence of micro operation?
AR <-AR+BR, AR<-AR OR BR
CR <-CR OR DR