.

/ &

5. ATMEL AVR

AVR ATMEL.

. o
60 .!
:
5V, 2.7V ( L)
1.8V ( V).
"

(interrupt) ,
# (ADC), (oscillator)
(counters),
USART, SPI . . "
LCD
USB interface.
" AVR
Flash
(firmware), eeprom ,
RAM $ .%
AVR $
.
&

AVR .
' $
. (, RAM ,

. %

. !

40 MHz AVR.
"
AVR AT90S2313

ATmega169.

137
 . / &

5.1 AT90S2313

• RISC ) 118
.
• 32x8bit .
• 10 MIPS 10MHz.
• 2Kbytes Flash.
• 128 bytes RAM.
• 128 bytes EEPROM.
• 8-bit 16-bit / (timer/counter) Watchdog
timer.
• (analog comparator).
• ! .
• SPI bus .
• UART .
• 15 2 (Port B D).
• & 2.7-6V ( AT90S2313-4) 4-6V (
AT90S2313-10).
• " 4 MHz ( AT90S2313-4) 10 MHz (
AT90S2313-10).

" 5-1. *

+ " 5-1. )

.+
" 5-2.

" 5-2. ! AT90S2313

138
 . / &

5.2 AT90S2313

" 5-3. & AT90S2313

" $
AT90S2313. 32
8 bits ) , & (ALU)

. - (Status), &
( (Program Counter – 10bits)
Flash
.

139
 . / &

" 8-bit

/ , EEPROM,
(interrupt unit), SPI UART interfaces .
D .

5.3

" 5-4. " /

" XTAL1/XTAL2
(crystal resonator) 4 MHz
10 MHz .+
" 5-4. !
XTAL1. "
XTAL2 .

5.4 H

" 5-5. + ( & ( *

140
 . / &

' (firmware) &

( Flash. & Flash Memory
$ $
. +
.!
Flash 20
0 0x3ff. & (
firmware.
1 & * , $ 0
0xdf. 32 $
. 64
. 128 (
0x60 ) RAM .

" 5-6. 0

" 5-
6. 1
SBCI, SUBI, CPI, ANDI, ORI
R16-R31. R26-R31
16-bit 2,3,4
(indirect addressing)
/ (auto increment/decrement)
.
+ EEPROM EEPROM Address, Data,
Control . "
141
 . / &

. '

. / (
5-1

( 5-1. + & ! /!

142
 . / &

5.5 !

• 5 * (Direct Addressing). '

(" 5-7 ).
• 5 2 (Register Direct). ' 2
(" 5-7$).
• 5 (Direct I/O). '
/ (" 5-
7 ).
• 5 * (Data Direct). +

16 bits
(" 5-7 ).
• * ! (Data Indirect with Displacement). '
3 4
("
5-7 ).
• * (Data Indirect). ' $
X,Y, Z (" 5-7 ).
• * & ) * (Data Indirect with Pre-
decrement or post –increment. " (2,3 4)
1
." ,
1 (" 5-7 /7 ).
• " & ( (Constant using LPM).
2 LPM byte
.+ $ 15 bits 4
bit byte
(" 5-7 ).
• ( (Program Indirect). 4
& ( .
2 IJMP, ICALL (" 5-7 ).
• " & ( (Relative Program). '
, & ( .2
RJMP, RCALL (" 5-7 ).

143
. / &

( ) ($)

( ) ( )

( ) ( )

( ) ( )

( ) ()
144
 . / &

( )
" 5-7. ' * AVR

5.6 " # # $
& "
! (RISC)
pipelining. AVR , RISC ,
#
,
«& ! 0 / ». (" 5-8).

" 5-8. ! # 2

" " 5-9

.

" 5-9. '

145
 . / &

" 5-10. ( RAM

' RAM
" 5-10. 1 ’
WR RD

5.7 O % & % (SREG)

" 5-11. 0 0

' # 0 0 " 5-11

:

• 6 (Global Interrupt Enable): ! .

• ' (Target): bit
.
• + (Half Carry): 0
# .
• S (Sign): * , «) 7»
V N.
• V (Overflow): * 2.
• N (Negative): *
.
• 4 (Zero): * 0.
146
 . / &

• C (Carry): * #
.

5.8 ' ( () (Stack Pointer - SP)

$ (stack)
(firmware)
$ . +
$ 0x60. 0
$ byte SP 1,
(2 bytes)
$ SP 2.
" byte
SP 1,
$ 2 bytes SP 2.

5.9 $ # ( (Reset
and Interrupt Handling)
O AT90S2313 10
& (
(Interrupt Service Routine – ISR).
( * (Interrupt Vector)
( 5-2.

( 5-2. ( *

147
 . / &

ISR
:

" 0 RESET. ' RESET

(( ) ’
! .) 2

INT0/INT1. 4
/ T1 T0. 3

UART.

5.9.1

Reset ! 0. 0

Reset (" 5-12 ). '

Reset
.) $
.' !
" 5-12$. ! Reset
!
! (" 5-
12 ).

148
 . / &

. Reset

$. Reset

. Reset

" 5-12

& !
Watchdog Timer 1 MHz.

Prescaler Watchdog Timer Control Register

(WDTCR). 1 0 !
."
$
(time out). ) $ ,
149
 . / &

$ ! . *
(timeout period) $
Reset.

5.9.2

AT90S2313 2
(Global Interrupt Masking-GMSK, Timer Interrupt Masking-TIMSK)
2
(Global Interrupt Flags Register-GIFR, Timer Interrupt Flags Register-TIFR).

" 5-13. 0

' INT1/INT0 GIMSK #

INT1/INT0. ' ' 6!1
TIMSK
'1. ) ' 6!0
'0. ' OCIE1A (Output Compare, 0x4a 0x4b)
'1
OCR1A. ' TICIE1 (Input
Capture) $
ICP $ '1 ICR1
( 0x44, 0x45).
" GIFR TIFR
# " (flags) 1
# (
). 0
0
.)
150
 . / &

3 .
1 68'0/68'1
,
.'

MCUCR ( 0x35). !
68'0/68'1 . )

$ ,
GIMSK 6
0 0 . ) *
, (Software Interrupts).

5.9.3 Sleep

AT90S2313
sleep
SE MCUCR . (SM)
sleep idle
(power down). " sleep
.
) sleep idle KME $ $
/ , Watchdog timer,

.
"
(reset) Watchdog timer.

5.10 /
AT90S2313 2 / (timer/counter). 8-
bit T/C0 16-bits T/C1. 0

. 0
/8, /64, /256,
/1024 prescaler " 5-14.

151
 . / &

" 5-14. 2 prescaler T/C0, T/C1

' T/C0 " 5-15.

TIMSK, TIFR TCCR0
/
." TIFR
T/C0 $ (TOIE0).

152
 . / &

" 5-15. T/C0

/
16-bits. + " 5-16. !
TIMSK, TIFR, 6 T/C1
TCCR1A, TCCR1B, OCR1A (H L), ICR1 (H L).

" 5-16. + T/C1

153
 . / &

T/C1 T/C0
,
TCNT1 OCR1A
OC1, ICR
ICP. ' T/C1
(Pulse Width
Modulation – PWM). & OC1 8, 9
10 bits. " , T/C1 0 ' /
(255, 511, 1023 8, 9 10 bits ). 1
0. " , ,
8, 9 10 LSBits
OCR1A, OC1 .+
glitch (" 5-17).

" 5-17. PWM

' PWM11, PWM10 TCCR1A

PWM .' COM1A1, COM1A0
T/C1 OC1
PWM. " TCCR1B ICNC1
$ (Noise Canceller) ICP
. ' ICES1
ICP, CTC1
/ (Output Compare)
CS12 CS11, CS10
" 9-18.

154
 . / &

" 5-18. TCCR1A, TCCR1B

5.11 EEPROM
' AVR 128 bytes EEPROM
/ $ 100000 .
2.5 4 ms Vcc.
155
 . / &

" #
,
Reset
. 5
EEPROM power
down sleep
Flash $
$ .
1

.
3 EEPROM,
(EEAR), (EEDR)
(EECR). ' " 5-19.

" 5-19. 0 EEPROM

" 7 (EEAR)
128 bytes EEPROM, EEDR
.
EECR.
' EEWE EEDR
EEAR. ) 9 EEMWE
1 . +
$ :

1. ( EEWE 0.
2. ( # EEAR.
3. ( # EEDR.
4. % # EEMWE 1 EEWE 0.
5. & 4 # EEWE 1,
hardware EEMWE 0.

156
 . / &

% EEAR
EERE 0, 1. 1 bit
0. ( ( bit
!!WE) .

5.12 * + # & ( UART

AT90S2313
. '
" 5-20 5-21.

" 5-20. + UART Transmitter

" , (UDR)
Shift Register
byte ,
Start Bit, bit. 1 Shift
157
 . / &

Register bit UDRE 1

byte . Shift Register 11 bits
Start/Stop bits . "
$ 9-bit 9 bit $
TXB8 UCR. )
UDR bit TX Complete Flag USR 1. +
Baud Rate Generator
. UART bit TXEN UCR 1.
" PD1/TXD
.

" 5-21. + UART Receiver

1 UART Receiver,
PD0/RXD # . 1 Start bit
, bits Shift Register
Stop bit. ' UDR
bit RX Complete USR 1, byte
.) # byte $
byte UDR
158
 . / &

UDR .' bit OverRun USR. !

$ # bit Framing
Error – FE USR. + Receiver UART bit
RXEN UCR. ) # 9-bit , 9 bit
bit RXB8 UCR.
UCR, USR
" 5-22. ' bit TXCIE
(interrupt) byte. ' bit RXCIE
# byte. ' bit UDRIE
UDR . bit
I SREG 1. ' bit CHR9 1 # 9 bit
.

" 5-22. UCR, USR

Baud Rate Generator

:

Baud Rate = Fck/(16UBRR+1)

' Fck , UBRR

. UBRR $
( 5-3.

159
 . / &

( 5-3. UBBR

5.13 *
) " )680
(/.0) )681 (/.1). )
)681, 1
Input Compare / T/C1, .+
$ 0 1, 1
0 $ .' "
" 5-23.

160
 . / &

" 5-23. ) "

) " ACSR. '

" 5-24.

" 5-24. ACSR

' ACD 1, ACO

, ACIE
ACIS0/1 (" 5-
25). ' bit ACI ) " .'
ACIC Input Capture T/C1.

161
 . / &

" 5-25. ( ) "

5.14 ,+ + +
1 ,
, Reset
/ (general purpose I/O). )
1 0

" 5-26. . D

AT90S2313 2 ,
. 8 (/.0-/.7) D 7 (PD0-PD6). 0
162
 . / &

2 ,
(Data Direction Register: DDRB, DDRD) (PORTB
PORTD) .) ,
bit PORTB PORTD
.% 1 bit DDRB DDRD
0 .
+ /.2 /.4

/ " 5-27.
#
(UART, ) " , 2 /& , !
* SPI – bus )

" 5-27. % " ! /

' flip-flop DDBn $ PORTBn

."
, RP
Data bus. & $ RD, RL
bit
DDB, PORTB. PB2, PB4
pull up p-MOS
" 5-27
PORTBn flip-flop 1.

163
 . / &

5.15 " " &

Flash/EEPROM
Flash EEPROM AT90S2313

PORTB " 5-28.

" 5-28. ( Flash/EEPROM

' 2)0, 2)1 byte

PORTB ! , * * " 5-29. '
OE AT90S2313 Data bus
. '
WR .
* 16-bits BS byte
(BS=1: High Byte, BS=0: Low Byte). +
Flash EEPROM $
( )
.
+ Flash
" 5-30. (0x10)
data bus (PORTB). ' 2)1 1 2)0 0 0x10
.+ XTAL1 ( ) #
AT90S2313. ) byte (
BS=1) data bus 2)0, 2)1 0 ’
164
 . / &

.' byte
BS=0. 0 , Low Byte ( 2)0=1, 2)1=0,
BS=0) data bus AT90S2313
XTAL1. : byte
WR. ' RDY/BSY

byte .' high byte data bus (XA0=1,

XA1=0, BS=1), . ;
’ Reset 12
Volt. )
$ .

" 5-29. 0 2)0,2)1

165
 . / &

" 5-30. ! Flash

+ EEPROM
byte (BS=0). 0
flash EEPROM $
, ( byte EEPROM
Flash). " Flash low byte data bus
!, BS 1 ! $
high byte. " EEPROM byte $
!.

Flash EEPROM
166
 . / &

1. ; 2)0=0, 2)1=1
2. BS=0
3. Data=1000 0000 (chip erase)
4. ; XTAL1
5. ) WR ( RDY/BSY)

5.16 "
' SPI bus

.) Master In Slave Out (MISO), Master Out

Slave In (MOSI), Serial Clock (SCK). ) Master
AT90S2313 (Slave)
, bit bit AT90S2313 MOSI . +
MISO . ' SCK
Master , bit.
'
" 5-31. ' XTAL1
high low SCK
. ' Reset
GND Programming Enable
. + bit
SCK . "
" 5-32 bits
byte.

" 5-31. '

167
 . / &

" 5-32. " bits byte

" ( 5-4, .
0 4 bytes. 0
AT90S2313 (
MOSI ) (MISO). +
byte $ $ $

.! , byte MOSI
« » MISO byte.
+ Programming Enable
4 bytes. %
Programming Enable byte MOSI,
MISO .)
byte, Master
SCK,
$ $
$ $ (acknowledge) .

( 5-4.
168
 . / &

% EEPROM $
.)
, (auto-erase)
( bits
1). & byte EEPROM,
0x80 auto-
erase. " 0x7f, EEPROM
.
& Flash,
0x7f ."
,
.

5.17 RISC CISC # -

+ AVR
RISC (Reduced Instruction Set Computer). ! 8086
6800 80286 68000
, ,
, . '

.!
CISC (Complex Instruction Set Computers).
" CISC,
RISC

Accumulator .
.! ,
RISC , 2 bytes. CISC

bytes 4 , RISC
bytes
. 3 RISC

$
.

CISC
.

5.18 # AT90S2313

169
. / &

170
. / &

171
. / &

172
. / &

173
 . / &

5.19 ' ATmega169

ATmega169 AVR.
; AT90S2313

$
.' $ ATmega169
" 5-33.

" 5-33. ' $ ATmega169

64 $ TQFP (Thin
Quad Flat Package) 16x16 mm MLF (Micro
Lead Frame Package) 9x9 mm. ' $
AT90S2313 :

174
 . / &

• 16K Flash, 512 EEPROM, 1K RAM 20, 128 128

AT90S2313.
• JTAG interface boundary scan debug.
• 53 - 6 (PA-
PF).
• 4x25 segment LCD display.
• * 8-bit Timer/Counter AT90S2313.
• 4 PWM .
• 10-bit A/D Converters.
• USART ( ) UART AT90S2313.
• " 16 MHz.

+ ATmega169 " 5-34.

" 5-34. ) ATmega169

175
 . / &

5.19.1 JTAG Interface

' JTAG Interface

, (flash, eeprom, ram) . +

bits (shift)
.! $ Test Data In
(TDI), Test Data Out (TDO), Test Clock (TCK). '
JTAG interface
bit bit TDI. ' bit
bit

. 0
.
'
JTAG interface Test Access Point Controller (TAP). "
5-35 .

" 5-35. JTAG interface

176
 . / &

5.19.2 LCD

" 5-36. ( # segment/com

' ATmega169
(LCD) # 25 segments. '
# . 0 #
(segment, com)
(" 5-36). ( segments com
. " com0, com1, com2, com3
# . 1
# « $ ». %
, (segment, com) DC

segment com (" 5-37). " COM0

SEG0
. $

177
 . / &

. %
.

" 5-37. SEG0/COM0

+ LCD driver " 5-38. &

,
Prescaler 64, 128, 256, ..., 4096. %
1:8.
prescaler LCDFRR.
LCDCRA, LCDCRB LCD,
, interrupt frame,
, ,
(LCD bias) segments
(13 25).
LCDDR0-18 #
(Com/Segment) " 5-39.

178
. / &

" 5-38. ) LCD driver

179
 . / &

" 5-39. # LCD driver

5.19.3
ATmega169
# . &

ADC1. + 10-bits.
' AVCC. !
1.1V. "
$ AVCC/210 1.1/210
Volts. 13usec-260usec. &

A/D .+ " 5-40.

180
. / &

" 5-40. ) A/D &

ADCSRA ,
, . '
16-bit ADCH/ADCL.

181