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DosXX Dunkel 1.

0
MV1_BUILD
2007.02.28

EE DATE POWER DATE


DRAWER
DESIGN
INVENTEC
CHECK TITLE
RESPONSIBLE DD1.0
SIZE = 3 VER : SIZE CODE DOC. NUMBER REV
FILE NAME : XXXX-XXXXXX-XX A3 CS Model_No A02
DATE CHANGE NO. REV P/N XXXXXXXXXXXX SHEET 1 OF 60
TABLE OF CONTENTS

PAGE PAGE PAGE


5- DC& BATTERY CHARGER 28- DDR2-DIMM0 52-MINI CARD(WWAN/WLAN)& SIM CARD
6- SELECT & BATTERY CONN 29- DDR2-DIMM1 53-ODD extension board
7- SYSTEM POWER(3V/5V) 30- DDR2-DAMPING 54- DOCKING CONN
8- SYSTEM POWER(+V1.8/+V1.25S) 31- CRT& SVIDEO CONN 55- LED/SWITCH CONN
9- GRAPHIC POWER(+VGFX_CORE) 32- LCD CONN 56- SCREW
10- SYSTEM POWER(+VCCP/+V1.5S) 33- ICH8-1 57- SWITCH DOUGHTER BOARD
11- CPU POWER(VCC_CORE) 34- ICH8-2
58- 58- Finger Print board
12- DDR TERMINATION VOLTAGE 35- ICH8-3
36- ICH8-4 59- 5 IN 1 CONTROLLER(Northstar)
13- POWER(SLEEP) 60- 5 IN 1 CONNECTOR(Northstar)
14- POWER(SEQUENCE) 37- ICH8-5
15- CLOCK_GENERATOR 38- HDD CONN
16- MEROM-1 39- ODD CONN
17- MEROM-2 40- USB CONN/USB(DB)
18- MEROM-3 41- FINGER PRINT&BlueTooth
19- MEROM-4 42- TPM V1.2
20- THERMAL&FAN CONTROLLER 43- FWH/SPI/HDD PROTECTION
21- Crestline-1 44- KBC
45- INT.KBC/POINT DEVICES
22- Crestline-2 46- SUPER I/O
23- Crestline-3-HOST 47- DAUGHTER BOARD CONN
24- Crestline-4-DDR2 48- 5 IN 1 CONTROLLER
25- Crestline-5-POWER 49- 5 IN 1 CONNECTOR
26- Crestline-6-POWER 50- LAN INTERFACE-1
27- Crestline-7-POWER 51- LAN RJ45 CONN

INVENTEC
TITLE
DD1.0
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 2 OF 60
XDP
Merom/Penyrm
P19 (uFCPGA)
P16~19 CK505
Clock generator
P15

S-VIDEO FSB
677/800 DDR II _SODIMM0 DDR II _SODIMM1
P36
533/667 P28 533/667 P29

Crestline DDR2 Interface


LCM LVDS 1299 PCBGA
DDR2 Interface
P32 GM / GMZ P21~27
SPI
EEPROM 24 Pin Debug port
P46
(LPC, SPI, Serial debug)
CRT RGB
ACCELEROMETER SMBUS DMI
STMicro LIS3LV02SQ SATA
P36
HDD
P38

3.3V, PCI_Interface,33MHz
PCI_EXPRESS
FIX ODD P52 ICH8-M USB4
676 BGA USB5
FINGER PRINT

P33~37
Bluetooth
CONN A

CONN B

CONN D
CONN C

USB7
USB3

USB6

USB9
USB1

USB2

USB8
USB0

Dock

Dock MINI CARD2 FLASH MEDIA MINI CARD1 RICOH-5C803


(WWAN) SMSC USB2228 (WLAN) CARD BUS
P52 P48 P52 P54~56

P64 P41 P53 P53 P53 P53 P54 P60

PCIE
SIM 5 IN1 Cardbus 1394
CARD
SLOT SLOT A CONN
3.3V, 33MHz/Azalia
PORT REPLICATOR LPC P56 P55

TPM Super I/O


BATTERY MDC_1.5/Modem BROADCOM Kahuna Lite2
P5~6 Module 56K AZALIA_1981HD 10/100 V1.2 47N217
(DB) BCM5906M
(FF) (FF) KBC1070
OR P43
P62 P48 P46 P46
10/100/1000
BCM5787M
System Charger &
DC/DC System power RJ11 KEY TOUCH INVENTEC
RJ45 BOARD PAD TITLE
DD1.0
P7~13
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 3 OF 60
LIMIT_SIGNAL ADP_EN
OCP OCP_OC#
ADP_PS0
ADP_PS1 +V5A +V5S

+V3A
CHGCTRL_3 5/3.3V
Charger
Adapter ADP_PRES +V5AL
(BQ24703) ADP_PRES KBC_PW_ON (TPS51120)
(90W) +V3S
SLP_S3#_5R +V3AL
AC_AND_CHG

+VBDC

LR +V0.9S
Main Battery
BATSELB (G2997)
+VBATA SLP_S3# M_VREF
Selector
AC_AND_CHG (Discrete) +VBATB
Travel Battery LR
+V1.8 +V1.5S
CHGCTRL_3 (APL5913)
SLP_S5#_3R V1.8_PG V1.5S_PG
IO POWER
BATCON (TPS51124) SLP_S3#
+VBATR +V1.25S
SLP_S3# LR +VCCP
V1.25S_PG
VCCP_PG

SLP_S3#

+VGFX_CORE

GPU POWER

DFGT_VR_EN (ADP3209)
VGFX_PG

+VCC_CORE
IMVP VI

PWR_GOOD_3 (ADP3208)
PM_DPRSLPVR
PSI# VR_PWRGD_CK410

H_DPRSTP#

INVENTEC
TITLE
DD1.0
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 4 OF 60
NOTES: +VBDCR +VBDC
Kevin sense 5-,10-,11-,13-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54-
+VBDC & +VBDCR at pin 1&2 of U505 to connect 5-,6- 5-,6-
this node directly to pin 2&1 of R134 R516 BAT54S_30V_0.2A +V5S 5-,10-,11-,13-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54-
1 2 D32
U505 ON_LM339DR2G_SOP_14P
10K_5% C512 9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
1
1OUT VCC
8 2 1 2 3
DC JACK 1 2
S D +VBATR +V5S +V3S
+VADPBL +VADP 0.22UF_10V 2 7 Q38 5-,6-,7-,8-,9-,11-,13-,32-,44-
Q507 L1 FOX_JPD113E_NB103_7F_9P 1IN- 2OUT 3 G
SSM3K7002F R99 2
1 1
5-,6- FDS6673BZ 14-,54-
NFM60R30T222 JACK1 3 6
8 3.3A_150mil 1IN+ 2IN- 1 1 1 10K_5%
D S 1 1 2 1
7 2 2 1 R519 2 C530 R94 1 R98
4
GND 2IN+
5
1UF_16V R373 R23 133K_1% R97
6 3 3 3 330K_5% 330K_5% 1 2
5 4 C7 4 100K_1% 1 1 1 C277 10K_5%

0.1UF_16V
G 4 TI_LM358ADR_SOP_8P 3 100K_5%

C26

0.1UF_25V

10PF_50V

0.1UF_25V
2 2 2
1 1 1 C8 1 C1 1 C2

10PF_50V
5 2 2 1UF_25V 9 + 3
1 R562 14
2
11 + U2
R59 2 2 2 2 OUT
220K_5% 6 7 8 9 619_1% 1
8 - 13
2
10 - OUT
2
D9025 1
R517 1 U2
2 2K_1% R374 12 ON_LM339DR2G_SOP_14P
1 RLZ18C
R563 1 2
10_5% 2 12
7.68K_1% 3D
R9252 2 R95
1 1 1 2
220K_5% 2B E
G
ADP_PRES 1
LIMIT_SIGNAL 5-,14-,54-
3 2 2 S 5-,6-,7-,44-,50- R93 1 1 C37 604K_1%
D
1 REF Q509 C 2 Q39 R96
Q539 G 1 14- 3.9K_5%
SSM3K7002F BATCAL#
3 SST3906 3 SSM3K7002F 80.6K_1% 2 0.027UF_10V
2
S D510 ANODE 2
SSM14_1A40V 2
D12 R60 2 2 7- MAX_LX5
CATHODE
100K_5% 2
1
C510 2
D17 Place near L14 D8
ADP_EN# 14- CHENKO_LL4148_2P
1 11-,14-
1 2 2 1 0.1UF_16V 1 U504 PWR_GOOD_3
Q514
CHENKO_LL4148_2P Q22 Q21 3 2 1
8 D S 1 1 2 BSS84_3P CHENKO_LL4148_2P
7 2 ANPEC_APL431LBAC_SOT23_3P 2 3 R515
R565 1 2 1B C 14- OCP_OC
6 3 20K_5%
U504 keep near U505 LIMIT_SIGNAL S D
E
5 4 5-,14-,54- 1 100K_5% 1
G G
R518 MMBT3904 2 R521 1 R33 2
34-
1 OCP_OC#
1 AM4825P_AP 3.9K_1% 1 C511 OPEN
R76 R25 2
Q6 3 OPEN
1 5-,6-,7-,44-,50- 2 3900PF_16V 2
15K_5% ADP_PRES 2 D

270K_5% 1G

OCP
1
2 +VBATR S
R27 14-
100K_1% +V5AL VBIAS SSM3K7002F 2
5-,6-,7-,8-,9-,11-,13-,32-,44-
5-,7-
2 +VBDC
8 +VBDCR
5-,6-
5 + U1 AP_AM4835P_T1_PF 5-,6-R134
7 Q506 0.015_1%_1W C32
L6
1
6 - OUT ON_LM393DR2G_SOP_8P 0.1UF_25V 10UF_25V 10UF_25V 1 S D 8 1 2 1 2 10UF_25V
2 7 PCMB063T_100MS
R26 4 1 3 6
8.25K_1% R91 C56 4 5
1 1UF_25V G
150K_5% 1 1 1
2 1 C36 C517 C31
+V3AL R89 2 1 1 1 1 C515 1 C516 1 1 1 1 2 2 2 10UF_25V
R29 10K_5% 2 4.7UF_25V 1 1 R575 3 R564 R136
2
6-,7-,14-,33-,44-,45-,47-,55-,57- R82 2 2 2 R137
1 1M_5% 2 6- 100_5% 1K_5% 0_5% 2 1K_1% 1K_1%
2 D511
AC_AND_CHG 2 2 1 2 SSM34_3A40V 2 2 C30
2
10UF_25V
1 R84 2 C55
+V5AL 0.033UF_16V
1 R32 1K_5% D21 D515
5-,7- U5 RLZ18C CHENMKO_BAT54_3P 1 2
Kevin sense
4.7K_5% 8
ACN ACDRV#
25
8 ALARM 6- 9
ACP VCC
22 Kevin sense
3 + U1 26 21
2VREF 2 ACDET PWM#
1 1 2 5 16
2 - OUT
ENABLE SRP
7-,14- R28 1K_5% 28 15
ACSEL SRN
1 C11 R30 19 12
4 ALARM BATP
1

2 0.1UF_16V 2 24
Q3 3 100K_5% SRSET BATDRV#
3 ACSET 18
D VS
C14 ON_LM393DR2G_SOP_8P 1G 1 2 27
VHSP
20
1 ACPRES
24703VREF 13 BATSET6
1 S
R90 100K_5% IBAT
2 0.22UF_6.3V SSM3K7002F 2 4 VREF BATDEP1
R31 7 COMP GND17
14.3K_1% 1 R35 2 14 11
Q4 3 NC NC 1
23 10
2
SSM3K7002F 1 G
D 100_5% 1
NC NC R78
THERMAL 29
31.6K_1%
S
2 R85 TI_BQ24703_QFN_28P 2
60.4K_1% 2
1
CHENKO_LL4148_2P 2 R92
154K_1% 1
R88
6-,44-1 2 R81
CHGCTRL_3 D509 1 2 300K_0.1%
200K_1% 1
R87 1 C16 2

140K_1% 2 1UF_10V
1 C34
2
2 4.7UF_6.3V 1
R80 1 1
C15 1 150_5% R36 R83
1 R526 2 20K_1% 24K_0.1%
+VADPBL 1UF_6.3V 2 1 C13 2
1M_5% 1 2 2
5-,6- +V5AL 2 150PF_50V 1 C35
U501 R86 1 C12 C33 1
R506 5-,7- 2 180PF_50V
1 1IN+ 60.4K_1%
+VBDC
1 2
Vcc+ 5 2 2 4.7UF_6.3V OPEN 2 1 3 D Q20
100K_1% R79
5-,6- 2 GND G 1
8.87K_1%
R525 3 1IN-
S

OUT 4
1 2 2 SSM3K7002F
3 D Q5 2
100K_1%
R507
23.7K_1%
1
TI_LMV321IDBVR_SOT23_5P
1 C10 R37
7.87K_1%
1

S
G 1 6-
CFET_B
INVENTEC
2 0.1UF_16V 2 TITLE
1 R524 2
2 2 DD1.0
DC &BATTERY CHARGER
24K_1% SSM3K7002F
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 5 OF 60
+V3AL +V3AL
5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
PDS540_5A_40V

+VBATR +VBDCR 2 1
3 1 1
5-,7-,8-,9-,11-,13-,32-,44- 5- 1 R513
+VADPBL +VBDC D517 +VBATA R510 R509 100K_5%
10K_5% 10K_5%
5- D16 5-,6- Q508 Q515 6- 2
R73 2 1 1 8 8 1 2 2
1 2 S D D S
Q17 2 7 7 2 CN7
3K_5% 1 8 1 3 6 6 3
RLZ18C S D
2 7 4 5 5 4 1
Q12 G G SDA_MAIN 44- 6 6 G 8
3 6 R57 R55 1 C21 G 7
470K_5% MMBT3904 AM4825P_AP SCL_MAIN 44- 5 5
4 5 3 AM4825P_AP 470K_5% 2 4 4
G 2 OPEN
R56 2 1 R514 2
C

AM4825P_AP
1 1 B
1 2
C2 C1
3 3
10K_5% E
100_5% 2 2
2 R58 1 1
470K_5% D508 A FOX_BP12067_C7201_7F_6P
CHENMKO_CHPZ6V2_3P 1 C509
2 1
R54 2 470PF_50V 1 C20
D10 4.7K_5%
+V3AL 2 0.1UF_25V
3 Q11
R561 D 2
5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
1 2 1G SSM3K7002F 1 2
10K_5% S
CHENKO_LL4148_2P
SSM3K7002F
2
Q10 MAIN BATT
1 1 C528

3
6- CFET_A#
R560

D
S
6- BATSELB# 2 0.1UF_16V
C529 1 OPEN 44-
5 100K THM_MAIN#

1G
0.1UF_16V 2 U503 2
SSM3K7002F
6-,44- 1 6 1 8 3 Q8
BATSELB CFET_A D
7 1G
2 TC7PA14FU 2 Q9
+V3AL S
3
4 U506 2 D

5-,6-,7-,14-,33-,44-,45-,47-,55-,57- 1G
TC7W08FU SSM3K7002F
S

+VBDC D514 SSM34_3A40V 2


1
1 2 +VBATB
+V3AL 5-,6-
1 R9204
C9143 6-
0.047UF_10V2 470K_5% 5-,6-,7-,14-,33-,44-,45-,47-,55-,57- Q513 Q516
C526 2 5 1 8 8 1 5A_200mil
1000PF_50V U502 S D D S
1 1 6 2 7 7 2
2 1 +V3AL +V3AL
5-,44- 1 R9203 2 3 6 6 3
CHGCTRL_3 4 5 5 4 1
1K_5% TC7PA14FU R74 Q29 G G 5-,6-,7-,14-,33-,44-,45-,47-,55-,57- 5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
3 2 470K_5% R572 1 C540
D MMBT3904
1G 3 AM4825P_AP AM4825P_AP 470K_5%
1 1 R75 2 C 2 OPEN
CFET_B# 6- 1 2 1 B
2
S
R554 R559 1 1 1 1
1 1 2 Q531 10K_5% E
SYN_200263MS006G114ZT_6P
10K_5% 220K_5% 2 R135 R129 R61 R130
D14 R552 SSM3K7002F 10K_5% 100K_5% CN502
2 2 D20 470K_5% 1
10K_5%
CHENKO_LL4148_2P 2 470K_5% 2 2 2 2
1
1
R126 44- 2
2 Q16 Q18 4.7K_5% SDA_MBAY 2
SSM3K7002F 1 2 44- 3
SSM3K7002F 8 U506 SCL_MBAY 3
5 3 CHENKO_LL4148_2P 4
2

AC_AND_CHG 5- R77 2 4
D 2 R131
D
S

3 1 1G 1 2 5
5
6-,44- 6 6
BATSELB 10K_5% S Q19 100_5% 6
1G

4 TC7W08FU 2 SSM3K7002F THM_TRAVEL#


44-
Q25

3
5- CFET_B

D
SSM3K7002F

S
ADP_PRES 3
5-,6-,7-,44-,50- D
1 C54 1 C541

1G
1G
+V3AL
S 2 47PF_50V 2 0.1UF_25V
2 3 C1 C2
5-,6-,7-,14-,33-,44-,45-,47-,55-,57- D
1G Q26
SSM3K7002F D15
+VBATA +VBATB S
2 CHENMKO_CHPZ6V2_3P A TRAVEL BATT
1 C72
6- 6-
2 0.1UF_16V
1 Q27
SSM3K7002F
5 8 U12 D518 3 1 R573 2 3 2 1 R150 2 +V3AL
5- 1 8 U12 3 TC7W02FU DAN202K D S
ALARM 100_5% 0_5% 1 5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
7 6
TC7W02FU2 1 1 G
2 R128
4 2 1 0_5%_OPEN
1 4 C53 2 R127
0.1UF_25V 1.5M_5% 1 2
R156 2 1 C527
2 D24 CFET_A#
47K_5% 6-
2 0.1UF_16V
220K_5%
2 D519 CHENKO_LL4148_2P 1 R553
1
1 5
Q512 U502
C514 SSM3K7002F 2 UDZW7.5B D13 3 3 4 44-
1000PF_50V 3 DAP202K BATCON
D
6- 2 1 1G TC7PA14FU
BATSELB# 2
1 S Q30 2
2 2 3
R523 5 U503 S D

22K_5% 3 4 CFET_B# 6-
SSM3K7002F G
2 1 1
2 TC7PA14FU
R574
0_5%_OPEN +V3AL
Q511 5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
C513 SSM3K7002F 2

1000PF_50V D
3
6-,44- 2 1
BATSELB

R522
1
1G
S
2 3 D Q510
G 15-,6-,7-,44-,50-
INVENTEC
22K_5% ADP_PRES TITLE
S DD1.0
2 2 SELECT & BATTERY CONN
SSM3K7002F
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 6 OF 60
+VBATR +VBATP
5-,6-,8-,9-,11-,13-,32-,44- 7-
PAD6
3
4
POWERPAD_4A
+V5AL
5-,7-

5-,6-,44-,50- 1 5 U27
ADP_PRES
4
44- 2
KBC_PW_ON TC7SET32FU
3 2VREF
5-,7-,14-

1 R9353 2 1
OPEN C341 2 7.32K_1% 30K_1%
1000PF_50V R421 2 R420 2
1 R423 2 1 1
2 R425 1 2 R424 1
0_5%
17.4K_1% 7.32K_1% C340
C342 51120GND 51120GND 51120GND 1 2
OPEN
OPEN
2 1

+VBATP R413 +VBATP


2 OPEN1
7- SLP_S3#_3R 7-
8-,9-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54-
U28

8
7
6
5
4
3
2
1
VO2
COMP2
VFB2
GND
VREF2
VFB1
COMP1
VO1
C304 1 8 7 6 5 5 6 7 8 1 1 C306 8-,9-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49-
10UF_25V
2 TI_TPS51120_QFN_32P 2VREF C307 2 2 OPEN +V5A
13-,14-,19-,32-,34-,35-,36-,41-,42-,43-,50-,52-,54-,55- D Q43 9
EN5
33 R422 D
10UF_25V
G FDS8884 10 32 OPEN 5-,7-,14- G
+V3A EN3 SKIPSEL
C337 11 31 2 1
R417 PGOOD2 TONSEL
S 0.1UF_16V 12 30 S
EN2 PGOOD1
1 4.7_5% 2 13 29
R412 C332 Q42
VBST2 EN1 0.1UF_16V
1 2 3 4 1 2 14 28 1 4.7_5% 2 4 3 2 1 SI4800DY
PAD5 L21 DRVH2 VBST1 PAD4
2 1 15
LL2 DRVH1
27 1 2 L20
CYNTEC_PCMC063_3R3 16
DRVL2 LL1
26 1 2
POWERPAD_2_0610
8 7 6 5 25 5 6 7 8
DRVL1 SLF10040_4R7N7R0 POWERPAD_2_0610
R9317

PGND2

PGND1
VREG3

VREG5
V5FILT
D 0_5% 5- D
MAX_LX5

CS2

CS1
G G

VIN
34-,44-
C290 Q49 1 2 1 1
C291 1 FDS6690AS RSMRST# C276 C289
1 18
17

19
20
21
22
23
24
S S
Q48 220UF_6.3V 2 1UF_10V
1UF_10V 2 330UF_4V 1 2 3 4 4 3 2 1 FDS6690AS

1 1
+V3AL R416 R414
10K_1% 10K_1%
5-,6-,14-,33-,44-,45-,47-,55-,57-
2 2 1 C305
2 4.7UF_25V

1 C336
4.7UF_6.3V +V5AL
2
5-,7-

1 R415 2

10_5%

1 C333 1 C334
1 C335
2 4.7UF_6.3V 2 0.1UF_16V
2 1UF_10V

51120GND

INVENTEC
TITLE
DD1.0
SYSTEM POWER(3V/5V/12V)
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 7 OF 60
1 R187 2 1 R186 2 1 R188 2 1 R189 2

43.2K_1% 30K_1% 30K_1% 20.5K_1%

C99 OPEN C98 OPEN


1 2 51124GND 51124GND 1 2

+VBATR
5-,6-,7-,8-,9-,11-,13-,32-,44- V1.8_PG 14-

12-,34-,41-
SLP_S4#_3R 7-,9-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54-
2 R157 1
1 R194 2
SLP_S3#_3R +VBATR
34-,40-,49-,54- OPEN
SLP_S5#_3R OPEN C74 1 5-,6-,7-,8-,9-,11-,13-,32-,44-
1 C139 1 C140 U13
OPEN 2

1
2 2 OPEN 1
10UF_25V 5 6 7 8

VO2

VFB2

TONSEL

GND

VFB1

VO1
8 7 6 5 R9259 1 C77
OPEN 25 D +V1.25S
GND 2
D 7 PGOOD1 24 14- G
+V1.8 Q33 G
2 PGOOD2 V1.25S_PG 10UF_25V 10-,21-,26-,36-

10-,12-,21-,25-,26-,28-,29-
SI4800DY 8
EN2 EN1 23 S
S C100 Q28
R190 R158 C76 0.1UF_16V
0.1UF_16V 1 2 9 VBST2 VBST1 22 1 2 4 3 2 1 FDS8884
1 2 3 4 1 2 4.7_5% 4.7_5% 1 2
10 DRVH1 21
PAD3 DRVH2
L12 L7 PAD1
1 2 11 TI_TPS51124RGER_QFN_24P
LL2 LL1 20 1 2
POWERPAD_2_0610
PCMC063T_2R2MN PCMC063T_2R2MN POWERPAD_2_0610
12
DRVL2 DRVL1 19 5 6 7 8
8 7 6 5

PGND2

PGND1
C138 C75

V5FILT
D

TRIP2

TRIP1
V5IN
1 D G 1
G +V5A
220UF_2.5V 7-,9-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49- 220UF_2.5V

13

14

15

16

17

18
S
S
4 3 2 1 Q31
FDS6690AS
Q32 1 2 3 4
FDS6690AS

1 R193 2
10_5%
1 C102 1 C101
1 1 2 1UF_10V 2 4.7UF_6.3V
R191 R159
15.4K_1% 15.4K_1%
2 2

1 R192 2

0_5%

51124GND

INVENTEC
TITLE
DD1.0
SYSTEM POWER(+V1.8/+V1.25S)
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 8 OF 60
+V3S
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
21-
DFGT_VID_3
1 R9281 2 1 R9282 2

21-
22K_5% 22K_5%
DFGT_VID_2
21-
DFGT_VID_1
1 R9283 2

21-
22K_5%
DFGT_VID_0
1 R9284 2
22K_5%
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
+V3S

1 R800 2 +V5A
OPEN 7-,8-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49-

21- 1 R801 2
DFGT_VR_EN
OPEN
VGFX_PG 14-
1 R138 2
1 R9338 2
SLP_S3#_3R 10_5% +VBATR
7-,8-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54- 0_5% 1 C61
1 2.2UF_6.3V 5-,6-,7-,8-,9-,11-,13-,32-,44-
R9332 2
OPEN 1
R9331 5 6 7 8
2 1 C59 1 C60
0_5% ADP3209AGND
2
D19 +VGFX_CORE
Q517 D
2 CHENMKO_BAT54_3P 2 4.7UF_25V2 4.7UF_25V
R118 U8 SI4800DY G
25-

32
31
30
29
28
27
26
25
33.2K_1%
3 1 S

PGDLY
PWRGD
EN
VID0
VID1
VID2
VID3
VID4
1
ADP3209AGND
R113 4 3 2 1
C63 330PF_50V 1 24 4.7_5% C38
FBRTN VCC 1UF_16V
2 23 1 2 L8 PAD2
FB BST
1 2 3 22 1 2 PCMC063T_1R0MN 2
1 C47 COMP DRVH
4 21 1 2 1 3
SS SW
2 22PF_50V 5 20 4
ST PVCC 1
2 1 2 1 2 1 6 19 POWERPAD_4A
1 1 C46 PMON DRVL R160
R141 7
PMONFS PGND
18 5 6 7 8
C48 R121 C45 2 2 680PF_50V 8 17 1 C539 OPEN
1K_1% CLIM GND
470PF_50V 20K_1%

CSCOMP
0.012UF_16V 33 2 1UF_10V D
TML 2

CSSUM
CSREF
G

RAMP
LLINE

VRPM
1 C78

RPM
RT
ADP3209AGND 2 S
2 OPEN
R119 ADP3209AGND

9
10
11
12
13
14
15
16
ADP3209AGND 100K_1% ADI_ADP3209_LFCSP_32P 4 3 2 1
2
1 2
R115
255K_1% R114
2 357K_1%
R571 1 Q520 2
OPEN
1 FDS6690AS
ADP3209AGND 1 C41 R117
1 158K_1%
2 0.01UF_16V 1
2
R570
0_5% ADP3209AGND
ADP3209AGND

1 1 C43 1 C44
2 220PF_25V 2 470PF_50V R569 R53
1 2 2 1
+VBATR
0_5% 140K_1%
5-,6-,7-,8-,9-,11-,13-,32-,44- R52 R116
1 2 1 2

1K_5% 261K_1%

C42 1

1 R139 2
100PF_50V 2

0_5% 1
C538
2 1000PF_50V
ADP3209AGND

ADP3209AGND ADP3209AGND
R609
OPEN
1 2

1
R610 2
0_5%
1 C537
2 1000PF_50V

ADP3209AGND INVENTEC
TITLE
DD1.0
GRAPHIC POWER (+VGFX_CORE)
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 9 OF 60
+V5S +V5A +V1.8
5-,11-,13-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54- 7-,8-,9-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49- 8-,12-,21-,25-,26-,28-,29-

+VCCP
+V1.25S
Q518 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36- 1 C614
8-,10-,21-,26-,36- FDS6690AS +V1.5S
1 2 22UF_6.3V
8 D S 1 PAD501 13-,18-,22-,26-,36-,47-,52-
7 2 1 C655
6 3 R639
1 C546 POWERPAD_2_0610 OPEN 2 1UF_10V
5 4 PAD502
G 1 1 2
2 4.7UF_6.3V R582 R638
113_1% OPEN POWERPAD_2_0610
+V5A 1 C613 1 C653
1 2 1 C549 1 C548 2
7-,8-,9-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49- R9335
R581 2 22UF_6.3V2 1UF_10V
1 2
47_5% 2 10UF_6.3V 2 10UF_6.3V
OPEN 1 U514
6
GMT_G9338_ADJTBUf_SOT23_6P 2
R580 VCNTL
1 6 100_1% 7 5
VCC DRV 1 C547 +V1.25S POK VIN 1
2
C545 1 2 5 2 0.033UF_16V 8-,10-,21-,26-,36- 3 1 C654 R659
0.1UF_16V 2 GND ADJ VOUT 27.4K_1%
4 2 39PF_50V
VOUT
3 4 2
PGD EN
1 R9336 2 8 2
EN FB
U511 OPEN VIN GND
9 1 ANPEC_APL5913_KAC_TRL_SOP_8P 1
R636
1 1 1 1 1 30K_1%
R579 R576 C9174 1 R578 R577 R637
2
0_5% OPEN OPEN 0_5% 0_5%
OPEN 2 +VCCP
2 2 2 2 2
10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-

14- V1.5S_PG
VCCP_PG 14-

SLP_S3#_3R
7-,8-,9-,11-,12-,13-,14-,32-,34-,44-,50-,54-

R579 R576 R578 R577

G9338 0 ohm OPEN OPEN 0 ohm

SC339 OPEN 0 ohm 0 ohm OPEN

INVENTEC
TITLE
DD1.0
SYSTEM POWER(+VCCP/+V1.5S)
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 10 OF 60
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57- +V3S
+V3S 5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
CHENKO_LL4148_2P
2 1
1 R9323 2 D30 C255
1 2 0.1UF_16V
1K_5% 5 U20
1 R311 2 2 4 21-,34-
1 SB_3S_VRMPWRGD
665K_1%
R310 3 TI_SN74LVC1G17DCKR_SC70_5P
1K_5%
1
2 C254
0.1UF_16V 2

11-,15- 1 R312 2
VR_PWRGD_CK505
0_5%_OPEN

+VBATR
5-,6-,7-,8-,9-,11-,13-,32-,44-
H_VID6 18-
+V5A
H_VID5 18-
H_VID4 7-,8-,9-,10-,12-,13-,14-,31-,32-,36-,40-,49-
18-
H_VID3 18-
H_VID2 18- 2 C103
H_VID1 18- R657 1 9 8 7 6 5
H_VID0 1 C644 1 C658 1 C646 1 C645 Q525
18-
10_5% 100UF_25V SI7686DP_T1_E3
R277 2 2 2 2 G
17- 1 2 1 1 C211
PSI#
OPEN 2 2.2UF_6.3V
1
R256 2 4 1 2 3
H_DPRSTP# 17-,21-,33-
1 C650 4.7UF_25V X 3 0.01UF_50V +VCC_CORE
OPEN
R257 2 2.2UF_6.3V 18-
PM_DPRSLPVR 21-,34- 1 2 D25 L16
499_1% BAT54A 3 ETQP4LR36WFC_PANASONIC
2 2 1
R254 R656 1 2
1 0_5% 2 100K_5%
PWR_GOOD_3 5-,14- Q522 56 7 8 5 6 7 8 Q521
1 FDS6676AS FDS6676AS 1
1 R253 2 D D
SLP_S3#_3R VCOREGND G G
7-,8-,9-,10-,12-,13-,14-,32-,34-,44-,50-,54-
OPEN R664 1
49
48
47
46
45
44
43
42
41
40
39
38
37
VCOREGND
OPEN D522 2
S S
TML
DPRSLP
DPRSTP
PSI
VID0
VID1
VID2
VID3
VID4
VID5
VID6
SP
VCC
C213 2 R309
C609 R276 2
4700PF_25V 1 36 1 4.7_5%2 1UF_16V 4 3 2 1 4 3 2 1 1 10_1%
EN BST1 C657
VR_PWRGD_CK505 11-,15- 2
PWRGD DRVH1
35 1 2 OPEN 2 1
2 1 3 34 1
PGDELAY SW1 C643
4 33 OPEN 2
CLKEN PVCC1
5 32
2 1 6
FBRTN DRVL1
31
SSM34_3A40V_OPEN
FB PGND1 1 C212
C175 7 30 CSREF 11-
1 COMP U18 PGND2
330PF_50V C174 8 29 2 2.2UF_6.3V
220PF_25V C173 SS ADI_ADP3208_LFCSP_48P DRVL2
2 18PF_50V 9 28
2 1 1 R251 ST PVCC2
1 2 2 10 27
VARFREQ SW2
R252 11 26
68.1K_1% VRTT DRVH2 2
CSCOMP

1 2
PMONFS

1.65K_1% 12
TTSEN
25
CSSUM

BST2 R308
CSFEF
PMON

RAMP

1 2
LLINE

VRPM

R275
CLIM

9 8 7 6 5
RPM

GND

C172 1 C210 10_1%


RT

C171 1 4.7_5% 1UF_16V 1 1 C648 1 C647 1 C659 Q526


0.012UF_16V 2 1
680PF_50V G SI7686DP_T1_E3
13
14
15
16
17
18
19
20
21
22
23
24

2 R250 2 2 2 2
1 2
+V5S OPEN C649
R274 0.01UF_50V
237K_1% 4.7UF_25V X 3 4 1 2 3
VCOREGND R249 L15
1 2 2 1 2 2 1
5-,10-,13-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54-
0_5% R272
80.6K_1% ETQP4LR36WFC_PANASONIC
56 7 8 56 7 8 1
1 2 1 D D
G R665
C207 G
OPEN
2 2 2 0.01UF_16V +VBATR Q523 1
2
2 R247 R244 R246 5-,6-,7-,8-,9-,11-,13-,32-,44-
S S FDS6676AS D523
R248 R271
OPEN OPEN 191K_1% 274K_1%
VCOREGND
4 3 2 1 4 3 2 1 2
OPEN 1 1 1 R268 2 1
1 C660
1 2 1 100_5% OPEN 2
1
C169 1 C206 1
2 1000PF_50V C651
OPEN 2 OPEN 2 SSM34_3A40V_OPEN
VCOREGND 1 R9225 2
Q524
OPEN FDS6676AS
VCOREGND
2 2 1 R9226 2 1 R9224 2
R245 R273 OPEN OPEN
OPEN 0_5% 1 R266 2
1 1 169K_1%
VCOREGND
1 R267 2

CSREF 11- 169K_1%


1 R269 2
C170 1
1000PF_50V 220K_1%
R608 2 2 1
1 2 18- VCCSENSE 1 C209 1 C208 R270 R278
OPEN 76.8K_1% 220K_5%
R607 2 2 1000PF_50V2 150PF_50V
1 18- VSSSENSE 1 2
VCOREGND
1 C176 OPEN NTC thermistor, place near L16
2 1000PF_50V
1 R255 2
INVENTEC
TITLE
0_5% DD1.0
CPU POWER(VCC_CORE)
VCOREGND SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 11 OF 60
8-,34-,41-
SLP_S4#_3R

7-,8-,9-,10-,11-,13-,14-,32-,34-,44-,50-,54- +V5A
SLP_S3#_3R
7-,8-,9-,10-,11-,13-,14-,31-,32-,36-,40-,49-

+V1.8
8-,10-,21-,25-,26-,28-,29-
+V0.9S
30-

U15
GMT_G2997F6U_MSOP10_10P
11 1
TML VDDQSNS
10 2
VIN VLDOIN
9 3
S5 VTT
8 4
GND PGND
7 5
S3 VTTSNS
6
VTTREF
1 C134 1 C135
1 C137 1 C160 1 C159
2 OPEN 2 4.7UF_6.3V
2 1UF_10V 21-,28-,29- 2 2 10UF_6.3V
M_VREF 10UF_6.3V

1 C136

2 0.1UF_16V

NOTE: DDR2 REGULATOR

INVENTEC
TITLE
DD1.0
DDR TERMINATION VOLTAGE
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 12 OF 60
+V3A +V3S
7-,13-,14-,19-,32-,34-,35-,36-,41-,42-,43-,50-,52-,54-,55- 5-,9-,11-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-

+V5A +V5S
7-,8-,9-,10-,11-,12-,14-,31-,32-,36-,40-,49- 5-,10-,11-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54-

Q51 Q41
6 D S 4 6 D S 4
5 5
2 2
1 G 3 1 G 3
+V1.5S
R380 FDC655BN R731
120K_1% FDC655BN
120K_1% 10-,18-,22-,26-,36-,47-,52-
1 2 1 2
GATE_3S 13- GATE_5S 13-

1 C699
2 0.047UF_16V
1 C309
2 0.047UF_16V
1
1 1 C308 1 R378
C288
R379 10UF_6.3V 100_5%
47_5% 2 1 2 10UF_6.3V
2
2 R377
100_5%
2

Q46 3 Q47 3
Q52 3 D D
D 1G 1G
1G S S
S SSM3K7002F 2 SSM3K7002F 2
SSM3K7002F 2

+VBATR
+VBATR
5-,6-,7-,8-,9-,11-,13-,32-,44-
5-,6-,7-,8-,9-,11-,13-,32-,44-

1
1 R9339
C9189 1 R9205 2.7K_5%
47K_5%
0.033UF_16V 2 2
2
Q534 2
1B E
C

MMBT3906 3 1 R9212 2
0_5%
3 1 1
1 C
D9029 R9207 R9209
SLP_S3#_3R B
1 0_5% 0_5%
E
7-,8-,9-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54- Q9001
MMBT3904 2 2 2
2 RLZ18C
13- GATE_5S 13- GATE_3S
1

7-,13-,14-,19-,32-,34-,35-,36-,41-,42-,43-,50-,52-,54-,55- R9340
130K_1%
+V3A 1 1
2
R9208 R9210
0_5% 0_5%
1 2 2
R9206 1 R9211 2
100K_5%
1K_5%
2
Q533 3
D
1G
S

SSM3K7002F 2
Q532 3
7-,8-,9-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54- D

SLP_S3#_3R 1G
S

SSM3K7002F 2

INVENTEC
TITLE
DD1.0
POWER(SLEEP)
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 13 OF 60
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
+V3A
1 R302 2 7-,13-,14-,19-,32-,34-,35-,36-,41-,42-,43-,50-,52-,54-,55-

1M_5%
D27 CHENKO_LL4148_2P +V5A 1

1 2 R304
7-,8-,9-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49-
10K_5%
U19 2
8
5-,11-,14- 1 R305 2 1 R303 2 3 +
PWR_GOOD_3
140K_1% 20K_5% 1 44- PWR_GOOD_KBC
2 - OUT
1
1 C247 R301 4 1 C246 +V3AL +V3AL
OPEN ON_LM393DR2G_SOP_8P
2 0.1UF_16V 2 0.1UF_16V 5-,6-,7-,14-,33-,44-,45-,47-,55-,57- 5-,6-,7-,14-,33-,44-,45-,47-,55-,57-
9- R297 2
1 2
VGFX_PG 1 C49
10K_5% 1
8- R298 2 R123 2 0.1UF_16V
1 5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
V1.25S_PG 100K_1%
10K_5%
10-
1 R292 2 2VREF +V3S 2
V1.5S_PG 5 U10
10K_5% 5-,7-
8-
2 4 44- VCC1_POR#_3
1R293 2
V1.8_PG 1 1 C50 1
10K_5% 1 R300 2 R9330 3 R122
10- 1 2 0.1UF_16V
1 R291 2 0_5%_OPEN TI_SN74LVC1G17DBVR_SOT_5P 100K_5%
VCCP_PG 100K_5% R306
10K_5% 1 R299 2 10K_5% 2 2
7-,8-,9-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54-
1 2 D26
SLP_S3#_3R 1M_5% 2
R9126 1 2
+V3S 1K_5% CHENKO_LL4148_2P +V5A
7-,8-,9-,10-,11-,12-,13-,14-,31-,32-,36-,40-,49-
8
1 R290 2 1 R294 2 5 + U19
7 5-,11-,14-
68.1K_1% 20K_5% PWR_GOOD_3
6 - OUT
5-,10-,11-,13-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54- ON_LM393DR2G_SOP_8P
+V5S 1 4
R295 1 C244 1 C245
R296 49.9K_1% 2 1000PF_50V 2 0.1UF_16V
1 2
2
102K_1%
+V3S
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
+VADP
5-,10-,11-,13-,14-,20-,31-,34-,36-,38-,39-,45-,46-,47-,54-
5-,14-,54-
+V5S

1
LIMIT_SIGNAL 5-,54- 5- VBIAS R24
71.5K_1%
7-,13-,14-,19-,32-,34-,35-,36-,41-,42-,43-,50-,52-,54-,55-
1 C17 1 C18
1 +VADP 2 R40
1 2
R109 +V3A 2 1UF_6.3V 2 0.1UF_16V
210K_1% 5-,14-,54- R38 1 R39 2
1M_5%
OCP_OC 5- 1 2
1 C19 1
2 47K_5% 470K_5% R41
1 D18 ON_LM393DR2G_SOP_8P 2 0.1UF_25V 10K_5%
+VADP 1
3
1 R47 U2 2
2 CHENKO_LL4148_2P R48 1 2 5 +
5-,14-,54-
Q24 R108 10K_5%
1 3 22.6K_1% 10K_5% 4 - OUT 2 44- ADP_PS0
E C
1
8 2
3 + U6
1 2 12
B
SST3906 R103 1 44-
R110 2 137K_1% OUT ADP_ID 7-,8-,9-,10-,11-,12-,13-,14-,32-,34-,44-,50-,54- 1
2 - SLP_S3#_3R
47K_5% R46
2 4 21K_1%
2 ON_LM339DR2G_SOP_14P
5- BATCAL# 2
1
R112 1 R43 2
200K_5% 1 R102 2 3
R9258 2 C 1M_5%
2 1M_5% 1 1 B Q545 1
100K_5% E MMBT3904
54- 2 R42
ACOCP_EN# 10K_5%
1 1
1
3 2
R100 R105 R44 U2
FF only 10K_1% 1.65K_1% R49
1

21K_1%
2 7 +
1 44- ADP_PS1
1 R106 2 47K_5% 6 - OUT
2 2 1 1 1 ON_LM339DR2G_SOP_14P
1M_5% R107 R50 2
R45 12
47K_5% 220K_5% 44- 3.48K_1%
ADP_EN
3 D Q23 8
2 D9 2 2

G 2 5 + U6 CHENKO_LL4148_2P 3
D
Q7
S
6 - OUT 7 1G
1 1 2N7002_OPEN 1 2 S
SSM3K7002F
1 1 2
R101 4
0_5% R104 ON_LM393DR2G_SOP_8P R51
8.25K_1% 220K_5%
2
2 2

INVENTEC
TITLE
5- ADP_EN# DD1.0
POWER(SEQUENCE)
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 14 OF 60
+V3S
+V3S
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
Layout note: All decoupling 0.1uF disperse closed to pin
L2017
BLM18AG471SN1D 5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-

Layout note: All decoupling 0.1uF disperse closed to pin


1

2
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
1 C261 1 C268 1 C271 1 C664 1 C266 1 C662 1 C661
+V3S +V3S
2 10UF_10V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V L18
BLM18AG471SN1D R806
10K_5%

2
1 C259 1 C6651 C663 1 C675 1 C265 1 C267 1 C9179 1 C9180
2 10UF_10V 2 10UF_10V 2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1 1 1 1 1
R317 R315 R9116
10K_5% 10K_5% 10K_5%
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
+VCCP
+V3S 2 2 R318 2 2 2
10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
10K_5%

1
U21 34- PCISTOP#_3
R694 26 48 34-
VDDSRC_IO NC CPUSTOP#_3
15-,34- R9183 1 10K_5%
2 10K_5%_OPEN 45
CLKREQ_R_SATA# VDDSRC_IO
0_5% 1 2 R332
36 38 23- CLK_R_MCHBCLK
PCI_STOP#

2
VDDSRC_IO
CLKREQ_R_LAN# 15-,50- R9184 1 2 10K_5%
CPU_BSEL0 17-,21- 1 R700 2 12 37 0_5% 1 2 R333 23- CLK_R_MCHBCLK#
VDD96_IO CPU_STOP#
2.2K_5% 2 39
VDDSRC
61 51 CLK_MCHBCLK 0_5% 1 2 R330 16-
R329 VDDREF CPUT1_F
CLK_MCHBCLK# 0_5% 1 2 R331
CLK_R_CPUBCLK
20 50 16- CLK_R_CPUBCLK#
OPEN VDDPLL3_IO CPUC1_F
49
VDDCPU_IO
1 54 CLK_CPUBCLK 0_5% 1 2 R678 19-
+VCCP CPUT0
CLK_CPUBCLK# 0_5%_OPEN
2 1 R802
CLK_R_XDP
53 47- CLK_R_PEG_DL
CPUC0
10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36- CLK_PEG_DL 0_5%_OPEN
2
9 47 1 R803 47-
VDD48 CPUT2_ITP_SRCT8
CLK_PEG_DL# 2 R677
CLK_R_PEG_DL#
2 2
VDDPCI CPUC2_ITP_SRCC8
46 0_5% 1 19- CLK_R_XDP#
1 C9134 34- R697 1 2 33_5% 55
CLK_R3S_ICH48 VDDCPU 475_1% 1 54-
10K_5% 2 22PF_16V 16
VDD SRCT11_CR#_H
33 CPPE#_R 2 R321
CPPE#
R314 SRCC11_CR#_G
32 CLK_REQD# 475_1% 2 1 R676 52- CLK_R_REQD#
1 CLK_3S_ICH48 34 CLK_DOCK_REF 0_5% 2 1 R320 54-
17-,21-
SRCT10
0_5% 2 1
CLK_R_DOCK_REF
10 35 CLK_DOCK_REF# R319 54-
CPU_BSEL1 2 2.2K_5%
SUB_48MHZ_FSLA SRCC10 CLK_R_DOCK_REF#
CPU_BSEL2 17-,21- R681 1 57
FSLB_TEST_MODE
15- R682 1 2 0_5% 62 30 CLK_PCIE_MINI2 0_5% 1 2 R334 52-
CLK_3S_REF R680 1 2 R9177 1 2 475_1% CLKREQ_SATA# REF0_FSLC_TEST_SEL SRCT9
0_5% 1 2 R335
CLK_R_PCIE_MINI2
15-,34- 31 CLK_PCIE_MINI2# 52-
10K_5% CLKREQ_R_SATA# CLKREQ_MCH#
SRCC9 CLK_R_PCIE_MINI2#
1
1 5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57- PCI0_CR#_A 47-
C9133
+V3S CLK_R3S_DEBUG 44- R364 1 2 22_1% 3
PCI1_CR#_B SRCT7_CR#_F
44 CLKREQ_DL# OPEN 1 2 R804
CLKREQ_R_DL#
2 5.6PF_50V CLK_R3S_SIOPCI 46- 1, 0.5 R360 1 2 22_1% CLK_3S_SIOPCI 4
PCI2_TME SRCC7_CR#_E
43 CLKREQ_LAN# 475_1% 2 1 R9178 15-,50- CLKREQ_R_LAN#
CLK_R3S_CBPCI 47- 1, 0.5 R712 1 2 22_1% CLK_3S_CBPCI 5
PCI3
CLK_R3S_TPM 42- R9169 1 2 22_1%
SRCT6
41 CLK_PCIE_LAN 0_5% 2 1 R674 50- CLK_R_PCIE_LAN
R316 1 CLK_PCIE_LAN# 0_5% 2 1 R672
+V3S 56 40 50- CLK_R_PCIE_LAN#
10K_5% 1 C9135 1 C9136 1 C9137 1 C9175 CK_PWRGD_PD# SRCC6
22_5% 2 1 R358 52-
R675 CLK_3S_KBPCI CLK_3S_KBPCI 22_5% 2 1 1, 0.5
CLK_R3S_MINICARD
2 2 2 2 64 6 R708 44- CLK_R3S_KBPCI
475_1%
5.6PF_50V 5.6PF_50V 5.6PF_50V 5.6PF_50V
R362 SCLK PCI4_27_Select
1 2 63 7 CLK_3S_ICHPCI 33_5% 1 2 R704 35-
2
1 2
SDTAT PCI_F5_ITP_EN CLK_R3S_ICHPCI
CLKREQ_R_MCH# 21-
10K_5% CLK_PEG_MCH
0_5% 2 1 R673
60 27 21- CLK_R_PEG_MCH
R9213 2 5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57- X1 SRCT4
34- 1 28 CLK_PEG_MCH# 0_5% 1 2 R671 21-
CLK_PWRGD SRCC4 CLK_R_PEG_MCH#
59
0_5%_OPEN X2 CLK_PCIE_ICH
0_5% 2 1 R689
ICH_3S_SMCLK 20-,28-,29-,34-,43- 24 34- CLK_R_PCIE_ICH
SRCT3_CR#_C
20-,28-,29-,34-,43- 8 25 CLK_PCIE_ICH# 0_5% 2 1 R688 34-
R679 2
ICH_3S_SMDATA GNDPCI SRCC3_CR#_D CLK_R_PCIE_ICH#
11- 1 11
VR_PWRGD_CK505 GND48 CLK_SATA1
0_5% 2 1 R691
15 21 33- CLK_R_SATA1
0_5% GND SRCT2_SATAT
0_5% 2 1 R690
19 22 CLK_SATA1# 33-
GND SRCC2_SATAC CLK_R_SATA1#
23
GNDSRC
29 17 SSCLK1_DREF 0_5% 2 1 R693 21-
GNDSRC 27MHz_NonSS_SRCT1_SE1
0_5% 2
SSCLK1_R_DREF
42 18 SSCLK1_DREF# 1 R692 21-
FSA FSB FSC FSB CLOCK HOST CLOCK X2 GNDSRC 27MHz_SS_SRCC1_SE2 SSCLK1_R_DREF#
14.31818MHZ 58
FREQUENCY FREQUENCY 52
GNDREF
13 CLK_DREF 0_5% 2 1 R698 21-
1 2 GNDCPU SRCC0_DOTT_96
0_5% 2
CLK_R_DREF
14 CLK_DREF# 1 R695 21-
SRCT0_DOTC_96 CLK_R_DREF#
1 1 0 667 166
C260 1 1 ICS_ICS9LPRS355BGLFT_TSSOP_64P
30PPM C262
0 1 0 33PF_50V 2 2 33PF_50V
800 200 5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-
+V3S +V3S

ITP_EN =0 2 R703 1 1 R714 2 27_Selet =0


Please place close to CLKGEN within 500mils LCD_SST 100MHZ
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E SRC8/SRC8# 10K_5% OPEN
*CLKREQ# pin controls SRC Table. 2R707 1 1 R711 2 27_Selet =1
CR#_E ITP_EN =1
ITP/ITP# OPEN 10K_5% 27MHZ non-spread clock

Byte5: bit6 =0(PWD) Byte5: bit6 =1 Byte5: bit4 =0(PWD) Byte5: bit4 =1 SRC6

CR#_A SRC0 SRC2


CR#_B SRC1 SRC4 Byte6: bit6=0, disable CR#_F; 1,enable CR#_F 1 2 44- CLK_R3S_KBC14
R684 15_5%
CR#_F CLK_3S_REF 15- 1 2 46-
CLK_R3S_SIO14
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A Byte5: bit5=0, disable CR#_B; 1,enable CR#_B SRC8 R685 15_5%
1 2 34- CLK_R3S_ICH14
R683 15_5%
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
LAYOUT NOTES : THE R684 , R685 , R683 CLOSED TO U21
CR#_G
Byte5: bit2 =0(PWD) Byte5: bit2 =1 Byte5: bit0 =0(PWD) Byte5: bit0 =1 SRC9
INVENTEC
CR#_C SRC0 SRC2 SRC1 SRC4 Byte6: bit4=0, disable CR#_H; 1,enable CR#_H TITLE
CR#_D DD1.0
CR#_H CLOCK_GENERATOR
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C Byte5: bit1=0, disable CR#_D; 1,enable CR#_D SRC10 SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 15 OF 60
H_A#(35:3) 23- CN24
H_A#(3) J4
A3# ADS#
H1 23- H_ADS#
H_A#(4) L5 E2 23- +VCCP
A4# BNR# H_BNR#
H_A#(5) L4
A5# BPRI#
G5 23- H_BPRI# 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
H_A#(6) K5
A6# 1

ADDR GROUP 0
H_A#(7) M3 H5 23- H_DEFER#
A7# DEFER# R650
H_A#(8) N2 F21 23- H_DRDY#
H_A#(9) J1
A8# DRDY#
E1 23- 56_5% CLOSED TO CPU
A9# DBSY# H_DBSY#
H_A#(10) N3
A10# 2

CONTROL
H_A#(11) P5
A11# BR0#
F1 23- H_BREQ#0
H_A#(12) P2
A12#
H_A#(13) L2
A13# IERR#
D20
H_A#(14) P4
A14# INIT#
B3 33- H_INIT#
H_A#(15) P1
+VCCP
A15# 51 ohm +/-1% pull-up to +VCCP
H_A#(16) R1
A16# LOCK#
H4 23- H_LOCK# 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
23- M1 1 R600 2 (VCCP) if ITP is implemented
H_ADSTB#0 ADSTB0#
H_REQ#(4:0) 23- C1 19-,23- H_CPURST# 51_5% 23- H_RS#(2:0)
RESET#
H_REQ#(0) K3
REQ0# RS0#
F3 H_RS#(0)
H_REQ#(1) H2
REQ1# RS1#
F4 H_RS#(1)
H_REQ#(2) K2 G3 H_RS#(2)
REQ2# RS2#
H_REQ#(3) J3
REQ3# TRDY#
G2 23- H_TRDY#
H_REQ#(4) L1
REQ4#
G6 23- H_HIT#
HIT#
H_A#(17) Y2
A17# HITM#
E4 23- H_HITM#
H_A#(18) U5
A18#
H_A#(19) R3
A19# BPM0#
AD4 19- H_BPM0_XDP#

ADDR GROUP 1
H_A#(20) W6
A20# BPM1#
AD3 19- H_BPM1_XDP#
H_A#(21) U4 AD1 19-

XDP/ITP SIGNALS
A21# BPM2# H_BPM2_XDP#
H_A#(22) Y5
A22# BPM3#
AC4 19- H_BPM3_XDP#
H_A#(23) U1
A23# PRDY#
AC2 19- H_BPM4_PRDY#
H_A#(24) R4 AC1 16-,19-
A24# PREQ# H_BPM5_PREQ#
H_A#(25) T5
A25# TCK
AC5 16-,19- H_TCK
H_A#(26) T3
A26# TDI
AA6 16-,19- TDI_FLEX
H_A#(27) W2
A27# TDO
AB3 19- H_TDO
H_A#(28) W5
A28# TMS
AB5 16-,19- H_TMS
H_A#(29) Y4
A29# TRST#
AB6 19- H_TRST#
H_A#(30) U2
A30# DBR#
C20 19-,34- XDP_DBRESET#
H_A#(31) V4
A31# 1
H_A#(32) W3
A32#
H_A#(33) AA4 +VCCP R587
A33# THERMAL 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36- 51_5%
H_A#(34) AB2
A34#
H_A#(35) AA3 D21 R651 1 2 56_5%
A35# PROCHOT# 10mils/10mils 2
23- V1 A24 20-
H_ADSTB#1 ADSTB1# THERMDA H_THERMDA
B25 20- THERM_MINUS
THERMDC
H_A20M# 33- A6
A20M#
H_FERR# 33- A5 C7 21-,33- PM_THRMTRIP#
FERR# THERMTRIP#
ICH

H_IGNNE# 33- C4
IGNNE#

H_STPCLK# 33- D5
STPCLK#
H_INTR 33- C6
LINT0
H CLK
H_NMI 33- B4 A22 15- CLK_R_CPUBCLK
LINT1 BCLK0
H_SMI# 33- A3 A21 15- CLK_R_CPUBCLK#
SMI# BCLK1

M4
RSVD01
N5
RSVD02
RESERVED
T2
RSVD03 +VCCP
V3
RSVD04
B2 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
RSVD05
C3
RSVD06
D2
RSVD07 R588
D22 1 2 16-,19-
RSVD08 H_BPM5_PREQ#
D3
RSVD09 51_5%
F6
RSVD010 R586 2
1 16-,19- TDI_FLEX
51_5%
FOX_PZ4782K_274M_41_478P 1 R606 2 16-,19- H_TMS
51_5%
1 R589 2 16-,19-
+VCCP H_TCK
GMCH CPU ICH8 51_5%

INVENTEC
TITLE
PM_THRMTRIP# should be T at CPU DD1.0
MEROM-1
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 16 OF 60
H_D#(63:0) 17-,23- CN24 17-,23- H_D#(63:0)
1, 0.5 E22 Y22
H_D#(0) D0# D32# H_D#(32)
H_D#(1) 1, 0.5 F24 AB24 H_D#(33)
D1# D33#
H_D#(2) 1, 0.5 E26 V24 H_D#(34)
D2# D34#
H_D#(3) 1, 0.5 G22 V26 H_D#(35)
D3# D35#

DATA GRP 2
DATA GRP 0
H_D#(4) 1, 0.5 F23 V23 H_D#(36)
D4# D36#
H_D#(5) 1, 0.5 G25 T22 H_D#(37)
D5# D37#
H_D#(6) 1, 0.5 E25 U25 H_D#(38)
D6# D38#
H_D#(7) 1, 0.5 E23 U23 H_D#(39)
D7# D39#
H_D#(8) K24 Y25 1, 0.5 H_D#(40)
D8# D40#
H_D#(9) G24 W22 H_D#(41)
D9# D41#
H_D#(10) 1, 0.5 J24 Y23 H_D#(42)
D10# D42#
H_D#(11) 1, 0.5 J23 W24 H_D#(43)
D11# D43#
H_D#(12) 1, 0.5 H22 W25 1, 0.5 H_D#(44)
D12# D44#
H_D#(13) 1, 0.5 F26 AA23 H_D#(45)
D13# D45#
H_D#(14) K22 AA24 H_D#(46)
D14# D46#
H_D#(15) 1, 0.5 H23 AB25 H_D#(47)
D15# D47#
H_DSTBN#0 23- J26 Y26 23- H_DSTBN#2
DSTBN0# DSTBN2#
H_DSTBP#0 23- H26 AA26 23- H_DSTBP#2
DSTBP0# DSTBP2#
H_DINV#0 23- H25 U22 23- H_DINV#2
DINV0# DINV2#

H_D#(63:0) 17-,23- 17-,23- H_D#(63:0)


H_D#(16) 1, 0.5 N22 AE24 H_D#(48)
D16# D48#
H_D#(17) 1, 0.5 K25 AD24 H_D#(49)
D17# D49#
H_D#(18) 1, 0.5 P26 AA21 H_D#(50)
D18# D50#
H_D#(19) R23 AB22 H_D#(51)
D19# D51#
H_D#(20) 1, 0.5 L23 AB21 H_D#(52)
D20# D52#

DATA GRP 1

DATA GRP 3
H_D#(21) M24 AC26 H_D#(53)
D21# D53#
H_D#(22) L22 AD20 H_D#(54)
D22# D54#
H_D#(23) 1, 0.5 M23 AE22 H_D#(55)
D23# D55#
H_D#(24) 1, 0.5 P25 AF23 H_D#(56)
D24# D56#
H_D#(25) 1, 0.5 P23 AC25 H_D#(57)
D25# D57#
H_D#(26) P22 AE21 H_D#(58)
D26# D58#
H_D#(27) T24 AD21 H_D#(59)
D27# D59#
H_D#(28) R24 AC22 H_D#(60)
+VCCP D28# D60#
H_D#(29) 1, 0.5 L25 AD23 H_D#(61)
D29# D61#
10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36- H_D#(30) T25 AF22 H_D#(62)
D30# D62#
H_D#(31) N25 AC23 H_D#(63)
1 D31# D63#
H_DSTBN#1 23- L26 AE25 23- H_DSTBN#3
R654 DSTBN1# DSTBN3#
H_DSTBP#1 23- M26 AF24 23- H_DSTBP#3
1K_1% DSTBP1# DSTBP3#
H_DINV#1 23- N24 AC20 23- H_DINV#3
DINV1# DINV3#
2 GTLREF AD26
GTLREF COMP0
R26 R652 1 2 27.4_1%
1 COMP1
U26 R653 1 2 54.9_1%
C23
TEST1 COMP2
AA1 R605 1 2 27.4_1%
R655 D25 Y1 R604 1 2 54.9_1%
2K_1% Layout note: Zo=55 ohm, TEST2 COMP3
C24
AF26
TEST3 MISC E5 CLOSED TO CPU
2 0.5" max for GTLREF. TEST4 DPRSTP#
11-,21-,33- H_DPRSTP#
AF1 B5 33- H_DPSLP#
TEST5 DPSLP#
A26 D24 23- H_DPWR#
TEST6 DPWR#
D6 33- H_PWRGD
PWRGOOD
CPU_BSEL0 15-,21- B22 D7 23- H_CPUSLP#
BSEL0 SLP#
CPU_BSEL1 15-,21- B23 AE6 11- PSI#
BSEL1 PSI# R602
15-,21- C21 1 2 19-
CPU_BSEL2 BSEL2 H_PWRGD_XDP
1 1K_5%
FOX_PZ4782K_274M_41_478P
R603
OPEN
Place series resistor (R602 = 1K ohm) on H_PWRGD_XDP without stub
2 +VCCP
10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
1 1 1 C642
R648 R649 2 OPEN
OPEN OPEN
2 2
Place C642(0.1uF_16V) close to the TEST4 pin.
Make sure TEST4 routing is reference
to GND and away from other noisy signals.

INVENTEC
TITLE
DD1.0
MEROM-2
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 17 OF 60
+VCC_CORE +VCC_CORE
11-,18- 11-,18-

CN24
A7 AB20
VCC001 VCC068
A9 AB7
VCC002 VCC069
A10 AC7
PLACE THESE INSIDE SOCKET 1 C634 1 C596 1 C636 1 C635 1 C638 VCC003 VCC070
A12 AC9
VCC004 VCC071
A13 AC12
CAVITY ON L8 (NORTH SIDE 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V VCC005 VCC072
A15 AC13
VCC006 VCC073
A17 AC15
SECONDARY) VCC007 VCC074
A18 AC17
VCC008 VCC075
A20 AC18
VCC009 VCC076
B7 AD7
VCC010 VCC077
B9 AD9
VCC011 VCC078
B10 AD10
VCC012 VCC079
B12 AD12
1 C220 1 C633 1 C598 1 C597 1 C637 VCC013 VCC080
B14 AD14
VCC014 VCC081
B15 AD15
2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V VCC015 VCC082
B17 AD17
VCC016 VCC083
B18 AD18
VCC017 VCC084
B20 AE9
VCC018 VCC085
C9 AE10
VCC019 VCC086
C10 AE12
VCC020 VCC087
C12 AE13
VCC021 VCC088
C13 AE15
VCC022 VCC089
C15 AE17
1 C604 1 C214 1 C603 1 C640 1 C607 VCC023 VCC090
C17 AE18
VCC024 VCC091
C18 AE20
PLACE THESE INSIDE SOCKET 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V VCC025 VCC092
D9 AF9
VCC026 VCC093
D10 AF10
CAVITY ON L8 (SOUTH SIDE VCC027 VCC094
PLACE THESE INSIDE SOCKET
D12 AF12
VCC028 VCC095 +VCCP
SECONDARY) D14
VCC029 VCC096
AF14 CAVITY ON L8 (NORTH SIDE
D15 AF15 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36- SECONDARY)
VCC030 VCC097
D17 AF17
VCC031 VCC098
D18 AF18
VCC032 VCC099 +VCCP
E7 AF20
1 C641 1 C639 1 C605 1 C602 1 C606 VCC033 VCC0100
E9 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
VCC034
E10 G21
2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V VCC035 VCCP01
E12 V6
VCC036 VCCP02 1 C599 1 C600 1 C601 1 C219 1 C217 1 C216
E13 J6
VCC037 VCCP03 C218
E15 K6 2 2 2 2 2 2
VCC038 VCCP04 1
E17 M6
VCC039 VCCP05 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V
E18 J21
E20
VCC040 VCCP06
K21
220UF_2V_15mR_Panasonic
VCC041 VCCP07
PLACE THESE INSIDE SOCKET F7 M21
VCC042 VCCP08
F9 N21
1 C221 1 C184 1 C186 1 C187 1 C188 1 C185 VCC043 VCCP09
CAVITY ON L1 (NORTH SIDE F10 N6
VCC044 VCCP10
F12 R21
2 10UF_6.3V2 10UF_6.3V2 10UF_6.3V2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V VCC045 VCCP11
PRIMARY) F14 R6
VCC046 VCCP12
F15 T21
VCC047 VCCP13
F17 T6 +V1.5S
VCC048 VCCP14
F18 V21
VCC049 VCCP15
F20 W21 10-,13-,22-,26-,36-,47-,52-
VCC050 VCCP16
AA7
VCC051
AA9 B26
VCC052 VCCA01
AA10 C26
PLACE THESE INSIDE SOCKET VCC053 VCCA02
AA12
1 C215 1 C181 1 C182 1 C179 1 C180 1 C183 VCC054
CAVITY ON L1 (SOUTH SIDE AA13 AD6 11- H_VID0
VCC055 VID0
AA15 AF5 11- H_VID1
2 10UF_6.3V2 10UF_6.3V2 10UF_6.3V2 10UF_6.3V 2 10UF_6.3V 2 10UF_6.3V VCC056 VID1 +VCC_CORE
AA17 AE5 11- H_VID2
PRIMARY) VCC057 VID2
AA18 AF4 11- H_VID3 11-,18-
VCC058 VID3 1 1
AA20
VCC059 VID4
AE3 11- H_VID4 C632 C631
1
AB9
VCC060 VID5
AF3 11- H_VID5 0.01UF_16V 2 2 10UF_6.3V
AC10
VCC061 VID6
AE2 11- H_VID6 R631
AB10
VCC062 100_1%
AB12
C177 C178 C608 AB14
VCC063
AF7
2
11-
LAYOUT NOTE:
1 1 1 VCC064 VCCSENSE VCCSENSE PLACE C2461 NEAR PIN B26
AB15
SOUTH SIDE SECONDARY VCC065
AB17
330UF_2V_6mR 330UF_2V_6mR OPEN VCC066
AB18 AE7 11-
330UF_2V_9mR_Panasonic 330UF_2V_9mR_Panasonic 330UF_2V_9mR_Panasonic

VCC067 VSSSENSE VSSSENSE


FOX_PZ4782K_274M_41_478P

R630
100_1%
2
C189 C190 C222
1 1 1
NORTH SIDE SECONDARY
330UF_2V_6mR 330UF_2V_6mR OPEN
330UF_2V_9mR_Panasonic 330UF_2V_9mR_Panasonic 330UF_2V_9mR_Panasonic

LAYOUT NOTE:
ROUTE VCCSENSE AND VSSSENSE TRACE AT
24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU

INVENTEC
TITLE
DD1.0
MEROM-3
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 18 OF 60
CN24
A4 P6
VSS001 VSS082
A8 P21
VSS002 VSS083
A11 P24
VSS003 VSS084
A14 R2
VSS004 VSS085
A16 R5
VSS005 VSS086
A19 R22
VSS006 VSS087
A23 R25
VSS007 VSS088
AF2 T1
VSS008 VSS089
B6 T4
VSS009 VSS090
B8 T23
VSS010 VSS091
B11 T26
VSS011 VSS092
B13 U3
VSS012 VSS093
B16 U6
VSS013 VSS094
B19 U21
VSS014 VSS095
B21 U24
VSS015 VSS096
B24 V2
VSS016 VSS097
C5 V5
VSS017 VSS098
C8 V22
VSS018 VSS099
C11 V25
VSS019 VSS100
C14 W1
VSS020 VSS101
C16 W4
VSS021 VSS102
C19 W23

XDP CONNECTOR
VSS022 VSS103
C2 W26
VSS023 VSS104
C22 Y3
VSS024 VSS105
C25 Y6
VSS025 VSS106
D1 Y21
VSS026 VSS107
D4 Y24
VSS027 VSS108
D8 AA2
VSS028 VSS109
D11 AA5 +V3A
VSS029 VSS110
D13 AA8
VSS030 VSS111 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
D16 AA11 CN11 7-,13-,14-,32-,34-,35-,36-,41-,42-,43-,50-,52-,54-,55-
VSS031 VSS112
D19 AA14 1 2
VSS032 VSS113 GND0 GND1 +VCCP
D23 AA16 H_BPM5_PREQ# 16- 3 4
VSS033 VSS114 OBSFN_A0 OBSFN_C0
D26 AA19 H_BPM4_PRDY# 16- 5 6
VSS034 VSS115 OBSFN_A1 OBSFN_C1
E3 AA22 7 8
VSS035 VSS116 GND2 GND3

2
1
E6 AA25 H_BPM3_XDP# 16- 9 10
VSS036 VSS117 OBSDATA_A0 OBSDATA_C0 R591
E8 AB1 H_BPM2_XDP# 16- 11 12 R592
VSS037 VSS118 OBSDATA_A1 OBSDATA_C1 1K_5%
E11 AB4 13 14 54.9_1%
VSS038 VSS119 GND4 GND5
E14 AB8 H_BPM1_XDP# 16- 15 16
VSS039 VSS120 OBSDATA_A2 OBSDATA_C2 2

1
E16 AB11 H_BPM0_XDP# 16- 17 18
VSS040 VSS121 OBSDATA_A3 OBSDATA_C3 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36-
E19 AB13 19 20
VSS041 VSS122 GND6 GND7 +VCCP
E21 AB16 21 22
VSS042 VSS123 OBSFN_B0 OBSFN_D0
E24 AB19 23 24
VSS043 VSS124 OBSFN_B1 OBSFN_D1
F5 AB23 25 26
VSS044 VSS125 GND8 GND9
F8 AB26 27 28
VSS045 VSS126 OBSDATA_B0 OBSDATA_D0 1 C562
F11 AC3 10-,15-,16-,17-,18-,19-,22-,23-,25-,26-,33-,36- 29 30
VSS046 VSS127 OBSDATA_B1 OBSDATA_D1
F13 AC6 31 32 2 0.1UF_16V
VSS047 VSS128 +VCCP GND10 GND11
F16 AC8 33 34
VSS048 VSS129 OBSDATA_B2 OBSDATA_D2
F19 AC11 35 36
VSS049 VSS130 OBSDATA_B3 OBSDATA_D3
F2 AC14 37 38
VSS050 VSS131 GND12 GND13
F22 AC16 H_PWRGD_XDP 17- 39 40 15- CLK_R_XDP
VSS051 VSS132 PWRGOOD_HOOK0 ITPCLK_HOOK4
F25 AC19 1 2 41 42 15-
VSS052 VSS133 HOOK1 ITPCLK#_HOOK5 CLK_R_XDP#
G4 AC21 43 44 1K_5%
VSS053 VSS134 VCC_OBS_AB VCC_OBS_CD
G1 AC24 R9192 45 46 R590 2 1 16-,23-
VSS054 VSS135 HOOK2 RESET#_HOOK6 H_CPURST#
G23
VSS055 VSS136
AD2 54.9_1% 47
HOOK3 DBR#_HOOK7
48 16-,34- XDP_DBRESET#
G26 AD5 1 C563 49 50
VSS056 VSS137 GND14 GND15
H3 AD8 2 0.1UF_16V 51 52 16- H_TDO
VSS057 VSS138 SDA TDO
H6 AD11 53 54 16- H_TRST#
VSS058 VSS139 SCL TRSTn
H21 AD13 55 56 16- TDI_FLEX
VSS059 VSS140 TCK1 TDI
H24 AD16 H_TCK 16- 57 58 16- H_TMS
VSS060 VSS141 TCK0 TMS
J2 AD19 59 60
VSS061 VSS142 GND16 GND17
J5 AD22
VSS062 VSS143
J22 AD25
VSS063 VSS144 SAMTEC_BSH_030_01_L_D_A_TR_60P
J25 AE1
VSS064 VSS145
K1 AE4
VSS065 VSS146
K4 AE8
VSS066 VSS147
K23 AE11
VSS067 VSS148
K26 AE14
VSS068 VSS149
L3 AE16
VSS069 VSS150
L6 AE19
VSS070 VSS151
L21 AE23
VSS071 VSS152
L24 AE26
VSS072 VSS153
M2 A2
VSS073 VSS154
M5 AF6
VSS074 VSS155
M22 AF8
VSS075 VSS156
M25 AF11
VSS076 VSS157
N1 AF13
VSS077 VSS158
N4 AF16
VSS078 VSS159
N23 AF19
VSS079 VSS160
N26 AF21
VSS080 VSS161
P3 A25
VSS081 VSS162
AF25
VSS163

FOX_PZ4782K_274M_41_478P

INVENTEC
TITLE
DD1.0
MEROM-4
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 19 OF 60
+V5S

5-,10-,11-,13-,14-,31-,34-,36-,38-,39-,45-,46-,47-,54-

Q528
2 3
S D

CN8
AO3409
G
1 1 C39 1
VCC
2 0.01UF_16V 2 G1
GND G
3 G2
REFENCE G
+V5S MLX_53398_0371_3P

5-,10-,11-,13-,14-,31-,34-,36-,38-,39-,45-,46-,47-,54-

5 U7
PWM_3S_FAN#
44- 1
4 1 R9185 2
THERM_3S_WARN# 20- 2 5.6K_5%
3
TC7SET08F

+V3S
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-

1 C656
2 0.1UF_16V
C630
1000PF_50V
We have to change R9346, R9347 to 100 ohm to support Penryn CPU.
1 2
R9346 U515
0_5% 1 VDD SCLK 8 15-,28-,29-,34-,43-
ICH_3S_SMCLK
16- 1 2 2 D+ SDATA 7 15-,28-,29-,34-,43-
ICH_3S_SMDATA
H_THERMDA 16- 1 2 3 6
THERM_MINUS D- ALERT# 5
34-,35- THERM_SCI#
20- 4 THERM# GND
THERM_3S_WARN#
R9347
0_5% A&D_ADM1032AR_SO_8P
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-

+V3S

2 1
LAYOUT NOTES: PUT THE THERMAL SENSOR CLOSE TO CPU
R663
2.2K_5%

INVENTEC
TITLE
DD1.0
THERMAL&FAN CONTROLLER
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 20 OF 60
LOW=DMIx2 MCH_CFG(9)
MCH_CFG(5)
MCH_CFG(7) LOW=RSVD
PCIE Graphics
LOW=Reverse Lane NOTE : USE 4K-OHM RESISTOR WHEN INSTALLING MCH_CFG(16) 21-
21-
HIGH=DMIx4 (CPU Strap) HIGH=Mobile CPU Lane HIGH=Normal operation PULL-UP/PULL-DOWN RESISTOR ON ANY MCH_CFG(9)
MCH_CFG(7) 21-
MCH-CFG CONNECTION/PINS. MCH_CFG(5) 21-
1 1 1 1
MCH_CFG(13:12) 00=PARTIAL CLOCK GATING DISABLE MCH_CFG(16) LOW=Dynamic ODT MCH_CFG(11) R622 R619 R625 R613
Disable LOW=CALISTOGA
(FSB Dynamic PSB 4X CLK OPEN OPEN OPEN OPEN
01=XOR MODE ENABLE
XOR/ALLZ 10=ALL-Z MODE ENABLE HIGH=Dynamic ODT HIGH=RESERVED 2 2 2 2
ODT) ENABLE
Enable
11=NORMAL OPERATION U17
P36 AV29 28- M_CLK_DDR0
RSVD1 SM_CK_0
P37 BB23 28- M_CLK_DDR1
NOTE: CFG[2:0] STRP : 001b : 533 MT/S RSVD2 SM_CK_1
R35 BA25 29- M_CLK_DDR2
RSVD3 SM_CK_3
011b : 667 MT/S N35 AV23 29- M_CLK_DDR3
RSVD4 SM_CK_4
AR12
RSVD5
AR13 AW30 28- M_CLK_DDR0#
+V1.8 RSVD6 SM_CK#_0
AM12 BA23 28- M_CLK_DDR1#
RSVD7 SM_CK#_1
8-,10-,12-,21-,25-,26-,28-,29- AN13 AW25 29- M_CLK_DDR2#

DDR MUXING
RSVD8 SM_CK#_3
J12 AW23 29- M_CLK_DDR3#
RSVD9 SM_CK#_4
AR37
RSVD10
AM36 BE29 28-,30- M_CKE0
1 RSVD11 SM_CKE_0
AL36 AY32 28-,30- M_CKE1
R285 RSVD12 SM_CKE_1
AM37 BD39 29-,30- M_CKE2
20_1% RSVD13 SM_CKE_3
D20 BG37 29-,30- M_CKE3
RSVD14 SM_CKE_4
2
BG20 28-,30- M_CS0#
SM_CS#_0
21- SM_RCOMP BK16 28-,30- M_CS1#
SM_CS#_1
BG16 29-,30- M_CS2#
SM_CS#_2
21- SM_RCOMP# BE13 29-,30- M_CS3#
SM_CS#_3
H10
RSVD20
B51 BH18 28-,30- M_ODT0
1 RSVD21 SM_ODT_0
BJ20 BJ15 28-,30- M_ODT1
R284 RSVD22 SM_ODT_1
Note: R1351,R1352 BK22
RSVD23 SM_ODT_2
BJ14 29-,30- M_ODT2
20_1% BF19 BE16 29-,30-
For Calero : 80.6 ohm RSVD24 SM_ODT_3 M_ODT3
BH20
2 RSVD25
For Crestline : 20 ohm BK18
RSVD26 SM_RCOMP
BL15 21- SM_RCOMP
BJ18
RSVD27 RSVD SM_RCOMP#
BK14 21- SM_RCOMP#
BF23
RSVD28
BG23 BK31 21- SM_RCOMP_VOH
RSVD29 SM_RCOMP_VOH
BC23 BL31 21- SM_RCOMP_VOL
RSVD30 SM_RCOMP_VOL
BD24
RSVD31
MA_A(14) 28-,30- BJ29 AR49
RSVD32 SM_VREF_0
MB_A(14) 29-,30- BE24 AW4 12-,28-,29- M_VREF
RSVD33 SM_VREF_1
BH39
RSVD34
AW20
RSVD35
BK20 B42 15- CLK_R_DREF
RSVD36 DPLL_REF_CLK 1 C9141
+V3S C48 C42 15- CLK_R_DREF#
RSVD37 DPLLREF_CLK#
CPU_BSEL0 15-,17- D47 H48 15- SSCLK1_R_DREF 2 0.1UF_16V
RSVD38 DPLL_REF_SSCLK
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57- B44 H47 15- SSCLK1_R_DREF#
RSVD39 DPLL_REF_SSCLK#
CPU_BSEL2 15-,17- C44
RSVD40
1 2 15-,21- A35 K44 15-
CLKREQ_R_MCH# RSVD41 PEG_CLK CLK_R_PEG_MCH
R195
1 2
10K_5% 1 1
B37
RSVD42 CLK PEG_CLK#
K45 15- CLK_R_PEG_MCH#
PM_EXTTS#0_R B36 34- DMI_TXN(3:0)
R646 R647 RSVD43 +V1.8
R202 10K_5% B34
RSVD44 DMI_RXN_0
AN47 DMI_TXN(0)
1 2 1K_5% 1K_5% C34 AJ38 DMI_TXN(1)
PM_EXTTS#1_R RSVD45 DMI_RXN_1 8-,10-,12-,21-,25-,26-,28-,29-
R198 10K_5% 2 2 DMI_RXN_2
AN42 DMI_TXN(2)
DMI_RXN_3
AN46 DMI_TXN(3) 1
P27 34- DMI_TXP(3:0)
CFG_0 R258
CPU_BSEL1 15-,17- N27
CFG_1 DMI_RXP_0
AM47 DMI_TXP(0)
21- N24 AJ39 DMI_TXP(1) 1K_1%
MCH_CFG(17:3) CFG_2 DMI_RXP_1
MCH_CFG(3) C21
CFG_3 DMI_RXP_2
AN41 DMI_TXP(2) 2
MCH_CFG(4) C23
CFG_4 DMI_RXP_3
AN45 DMI_TXP(3) 21- SM_RCOMP_VOH
MCH_CFG(5) F23 34- DMI_RXN(3:0)
+V3S MCH_CFG(6) N23
CFG_5
CFG_6
DMI DMI_TXN_0
AJ46 DMI_RXN(0)
1

MCH_CFG(7) G23 AJ41 DMI_RXN(1) R259 1 C192 1 C195


CFG_7 DMI_TXN_1 3K_1%
5-,9-,11-,13-,14-,15-,20-,21-,22-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57- MCH_CFG(8) J20
CFG_8 DMI_TXN_2
AM40 DMI_RXN(2) 2 0.01UF_16V 2 2.2UF_6.3V
MCH_CFG(9) C20
CFG_9 DMI_TXN_3
AM44 DMI_RXN(3) 2
MCH_CFG(10) R24 34- DMI_RXP(3:0)
CFG_10
MCH_CFG(11) L23 AJ47 DMI_RXP(0)
MCH_CFG(12) J23
CFG_11
CFG_12
CFG DMI_TXP_0
DMI_TXP_1
AJ42 DMI_RXP(1)
1 1
MCH_CFG(13) E23
CFG_13 DMI_TXP_2
AM39 DMI_RXP(2)
MCH_CFG(14) E20
CFG_14 DMI_TXP_3
AM43 DMI_RXP(3) 21- SM_RCOMP_VOL
R200 R196 MCH_CFG(15) K23
OPEN OPEN CFG_15 1
MCH_CFG(16) M20
CFG_16 R260 1 C197 1 C198

GRAPHICS VID
2 2 MCH_CFG(17) M24
CFG_17
L32 1K_1%
MCH_CFG(18) CFG_18 2 0.01UF_16V 2 2.2UF_6.3V
MCH_CFG(19) 21- N33 2
CFG_19
MCH_CFG(20) 21- L35
CFG_20
MCH_CFG(19) 21- E35 9- DFGT_VID_0
GFX_VID_0
34- 1 2 G41 A39 9-
BM_BUSY# PM_BM_BUSY# GFX_VID_1 DFGT_VID_1
MCH_CFG(20) 21- H_DPRSTP# 11-,17-,33- R197 1 2 0_5% L39
PM_DPRSTP# GFX_VID_2
C38 9- DFGT_VID_2
R9326 PM_EXTTS#0 28- R201 1 2 0_5% PM_EXTTS#0_R L36 B39 9- DFGT_VID_3
PM_EXT_TS#_0 GFX_VID_3
0_5%_OPEN PM_EXTTS#1 29- R9345 1 2 0_5% PM_EXTTS#1_R J36 E36 9- DFGT_VR_EN
11-,34- 2 1 R199 0_5% AW49
PM_EXT_TS#_1 DFGT_VR_EN +V1.25S
SB_3S_VRMPWRGD PWROK
PLT_RST# 35- R662 1 2 100_5% AV20 8-,10-,26-,36-
RSTIN#
21-,34-,44- 2 1 16-,33- R9344 1 2 0_5% N20
PM_PWROK PM_THRMTRIP# THRMTRIP#
R9193 PM_DPRSLPVR 11-,34- G36
DPRSLPVR PM AM49 34-
1
0_5% CL_CLK CL_CLK0 R9119
BJ51 AK50 34- CL_DATA0
NC1 CL_DATA 1K_1%
BK51
BK50
NC2 ME CL_PWROK
AT43
AN49
R91871
0_5%
2 21-,34-,44-
34-
PM_PWROK
NC3 CL_RST# CL_RST#0 2
BL50 AM50
NC4 CL_VREF
BL49
NC5 1 C9095 1
BL3
NC6
BL2
NC7 2 0.1UF_16V R9118
392_1%
BK1
MCH_CFG(19) LOW=NORMAL BJ1
NC8 NC H35
MCH_CFG(18) LOW=1.05V NC9 SDVO_CTRL_CLK 2
E1 K36
(DMI LANE A5
NC10 SDVO_CTRL_DATA
G39 15-,21-
VCC SELECT HIGH=1.5V REVERSAL) HIGH=LANES REVERSED NC11 CLK_REQ# CLKREQ_R_MCH#
C51 G40 34- MCH_ICH_SYNC#
NC12 ICH_SYNC#

MCH_CFG(20) LOW=ONLY SDVO OR PCIE X1 IS


B50
A50
A49
BK2
NC13
NC14
NC15 MISC TEST_1
TEST_2
A37
R32 1 2
1
INVENTEC
OPERATIONAL NC16 R612 R597 TITLE
(PCIE BACKWARD DD1.0
HIGH=SDVO AND PCIE X1 ARE 20K_5% 0_5%
INTERPOERABILITY ITL_CRESTLINE_FCBGA_1299P CRESTLINE-1
OPERATING SIMULTANEOUSLY 2
MODE SIZE CODE DOC. NUMBER REV
VIA THE PEG PORT
A3 CS Model_No A02
CHANGE by MORRIS CHANG 28-Feb-2007 SHEET 21 OF 60
+V3S
5-,9-,11-,13-,14-,15-,20-,21-,25-,26-,28-,29-,31-,32-,33-,34-,35-,36-,37-,39-,41-,42-,43-,44-,46-,47-,49-,50-,52-,55-,57-

1 1
R598 R599
10K_5% 10K_5%
+VCCP
2 2
10-,15-,16-,17-,18-,19-,23-,25-,26-,33-,36-

U17
32- J40 N43 1 R593 2
INV_PWM_3 L_BKLT_CTRL PEG_COMPI
L_BKLT_EN 32- H39 M43
L_BKLT_EN PEG_COMPO 24.9_1%
E39
1 L_CTRL_CLK
E40 J51
L_CTRL_DATA PEG_RX#_0
R596 LVDS_DDC_CLK 32- C37 L51
L_DDC_CLK PEG_RX#_1
100K_1% LVDS_DDC_DATA 32- D35 N47
L_DDC_DATA PEG_RX#_2
LVDS_VDD_EN 32- K40 T45
2 L_VDD_EN PEG_RX#_3
T50
1 PEG_RX#_4
L41 U40
LVDS_IBG PEG_RX#_5
R594 L43 Y44
100K_1% 1 LVDS_VBG PEG_RX#_6
R595 N41
LVDS_VREFH PEG_RX#_7
Y40
2 2.4K_1% N40
LVDS_VREFL PEG_RX#_8
AB51

LVDS
LVDSA_CLK# 32- D46 W49
LVDSA_CLK# PEG_RX#_9
LVDSA_CLK 32- C45 AD44
2 LVDSA_CLK PEG_RX#_10
LVDSB_CLK# 32- D44 AD40
LVDSB_CLK# PEG_RX#_11
LVDSB_CLK 32- E42 AG46
LVDSB_CLK PEG_RX#_12
AH49
R595 32- G51
PEG_RX#_13
AG45
LVDSA_DATA#0 LVDSA_DATA#_0 PEG_RX#_14
LVDSA_DATA#1 32- E51 AG41
LVDSA_DATA#_1 PEG_RX#_15
For Calero 1.5K LVDSA_DATA#2 32- F49
LVDSA_DATA#_2
J50
PEG_RX_0
For Crestline 2.4K PEG_RX_1
L50
LVDSA_DATA0 32- G50 M47
LVDSA_DATA_0 PEG_RX_2
LVDSA_DATA1 32- E50 U44
LVDSA_DATA_1 PEG_RX_3

PCI-EXPRESS GRAPHICS
LVDSA_DATA2 32- F48 T49
LVDSA_DATA_2 PEG_RX_4
T41
PEG_RX_5
+V1.5S W45
PEG_RX_6
LVDSB_DATA#0 32- G44 W41
LVDSB_DATA#_0 PEG_RX_7
10-,13-,18-,22-,26-,36-,47-,52- LVDSB_DATA#1 32- B47 AB50
LVDSB_DATA#_1 PEG_RX_8
LVDSB_DATA#2 32- B45 Y48
LVDSB_DATA#_2 PEG_RX_9
AC45
PEG_RX_10
AC41
PEG_RX_11
LVDSB_DATA0 32- E44 AH47
1 1 1 LVDSB_DATA_0 PEG_RX_12
LVDSB_DATA1 32- A47 AG49
R629 R628 R626 LVDSB_DATA_1 PEG_RX_13
LVDSB_DATA2 32- A45 AH45
OPEN OPEN OPEN LVDSB_DATA_2 PEG_RX_14
AG42
PEG_RX_15
2 2 2
N45
PEG_TX#_0
U39
PEG_TX#_1
VIDEO_COMP 31- E27 U47
TVA_DAC PEG_TX#_2
SVID_LUMA 31- G27 N51
TVB_DAC PEG_TX#_3
SVID_CHROMA 31- K27 R50
TVC_DAC PEG_TX#_4
+V1.5S T42
Install for FF R614