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ForProblem4ofHW10,useVDD =1.8VandVTH =0.4V Note:Midterm#2willbeheldonThursday11/15
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Commongatestage Sourcefollower
Reading:Chapter7.37.4
EE105Fall2007 Lecture19,Slide1 Prof.Liu,UCBerkeley
DiodeConnectedMOSFETs
Diode-connected NMOSFET Diode-connected PMOSFET
RX
1 = ro 1 g m1
RY =
1 gm2
ro 2
SummaryofMOSFETImpedances
Lookinginto thegate,the impedanceis i d i infinite(). Lookinginto thedrain,the impedanceis i d i ro ifthegate andsource are(ac) are (ac) grounded. Lookingintothe source,the impedanceis1/gm i d i 1/ inparallelwithro if thegateanddrain are(ac)grounded. are (ac) grounded
EE105Fall2007
Lecture19,Slide3
Prof.Liu,UCBerkeley
CommonGateAmplifierStage
AnincreaseinVin decreasesVGS andhencedecreasesID. ThevoltagedropacrossR decreases The voltage drop across RD decreases Vout increases t Thesmallsignalvoltagegain(Av)ispositive.
Av = gmRD
EE105Fall2007
Lecture19,Slide4
Prof.Liu,UCBerkeley
OperationinSaturationRegion
ForM1 tooperateinsaturation,VoutcannotfallbelowVbVTH. Trade offbetweenheadroomandvoltagegain. Tradeoff between headroom and voltage gain
EE105Fall2007
Lecture19,Slide5
Prof.Liu,UCBerkeley
I/OImpedancesofCGStage( =0)
Small-signal analysis circuit for determining input resistance, Rin Small-signal analysis circuit for determining output resistance, Rout
1 Rin = gm
EE105Fall2007 Lecture19,Slide6
Rout = RD
Prof.Liu,UCBerkeley
CGStagewithSourceResistance
Small-signal equivalent circuit seen at input
vX =
1 gm 1 RS + gm
vin
For = 0:
Av =
RD 1 + RS gm
EE105Fall2007
Lecture19,Slide7
Prof.Liu,UCBerkeley
TheoutputimpedanceofaCGstagewithsourceresistanceis identicaltothatofCSstagewithdegeneration. g g
Small-signal analysis circuit for determining output resistance, Rout
Rout = rO (1 + g m RS ) + RS = (1 + g m rO )RS + rO
EE105Fall2007 Lecture19,Slide8 Prof.Liu,UCBerkeley
CGStagewithBiasing
R1andR2 establishthegatebiasvoltage. R3 provides a path for the bias current of M1 to flow. 3providesapathforthebiascurrentofM1toflow.
EE105Fall2007
Lecture19,Slide9
Prof.Liu,UCBerkeley
CGStagewithGateResistance
Forlowsignalfrequencies,thegateconductsnocurrent. GateresistancedoesnotaffectthegainorI/Oimpedances. Gate resistance does not affect the gain or I/O impedances
EE105Fall2007
Lecture19,Slide10
Prof.Liu,UCBerkeley
CGStageExample
Small-signal equivalent circuit seen at input
1 1 g m1 g m 2 1 1 + RS g m1 g m 2
vX =
vin =
1 vin 1 + (g m1 + g m 2 )RS
Lecture19,Slide11
SourceFollowerStage
vout rO || RL Av = <1 vin 1 +r || R O L gm
Small-signal analysis circuit for g g g , determining voltage gain, Av Equivalent circuit
vin = v1 +vout
EE105Fall2007
vout = gmv1(ro RL )
= gm(vin vout)(ro RL )
Lecture19,Slide12 Prof.Liu,UCBerkeley
SourceFollowerExample
Inthisexample,M2 actsasacurrentsource.
Av =
rO1 || rO 2 1 + rO1 || rO 2 g m1
Prof.Liu,UCBerkeley
EE105Fall2007
Lecture19,Slide13
Rout ofSourceFollower
Theoutputimpedanceofasourcefollowerisrelativelylow, whereastheinputimpedanceisinfinite(atlowfrequencies); p p ( q ); thus,itisusefulasavoltagebuffer.
Small-signal analysis circuit for determining output resistance, Rout o tp t resistance
Rout
1 1 = || rO || RL || RL gm gm
EE105Fall2007
Lecture19,Slide14
Prof.Liu,UCBerkeley
SourceFollowerwithBiasing
RG setsthegatevoltagetoVDD;RS setsthedraincurrent.
(SolvethequadraticequationtoobtainthevalueofI ) (Solve the quadratic equation to obtain the value of ID.)
Assuming =0:
EE105Fall2007
Lecture19,Slide15
Prof.Liu,UCBerkeley
SupplyIndependentBiasing
IfRs isreplacedbyacurrentsource,thedraincurrentID becomesindependentofthesupplyvoltageV becomes independent of the supply voltage VDD.
EE105Fall2007
Lecture19,Slide16
Prof.Liu,UCBerkeley