CEN226/CSC225

Chapter 3
8086 Addressing Modes
1 11 11 11 1

What is the Addressing Mode ?

add dest, source ; dest +sourcedest
add ax,bx ; ax +bxax
The addressing mode means where and how the The addressing mode means where and how the The addressing mode means where and how the The addressing mode means where and how the
CPU gets the operands when the instruction is CPU gets the operands when the instruction is CPU gets the operands when the instruction is CPU gets the operands when the instruction is
executed. executed. executed. executed.
2 22 22 22 2

Three types of 8086 addressing modes

Immediate Addressing Mode
--- --- --- ---CPU gets the operand from the instruction CPU gets the operand from the instruction CPU gets the operand from the instruction CPU gets the operand from the instruction
Register Addressing Mode
--- --- --- ---CPU gets the operand from one of the internal registers CPU gets the operand from one of the internal registers CPU gets the operand from one of the internal registers CPU gets the operand from one of the internal registers
Memory Addressing Mode
--- --- --- ---CPU gets the operand from the memory location(s) CPU gets the operand from the memory location(s) CPU gets the operand from the memory location(s) CPU gets the operand from the memory location(s)
3 33 33 33 3

1. Immediate Addressing Mode

Exp Exp Exp Exp
MOV MOV MOV MOV AL, AL, AL, AL, 80 80 80 80H HH H
Machine Machine Machine Machine code code code code: :: :B BB B0 00 080 80 80 80H HH H
4 44 44 44 4
AL
B0H
80H
Instruction Queue
MACHINE
CODE
B8
12H
Instruction Queue
AL
MACHINE
CODE
AH
34H
12
34
80H
80H
12 34
MOV MOV MOV MOV AX, AX, AX, AX, 1234 1234 1234 1234H HH H
Machine Machine Machine Machine code code code code: :: :B BB B8 88 83412 3412 3412 3412H HH H

2. Register Addressing Mode

Exp MOV AX, CX
5 55 55 55 5
89
C1
Memory
AX
CX
Machine code

3. Memory Addressing Mode

Specify an offset address (effective address) using expressions of the form (different parts of
expression are optional):
[ Base Register + Index Register+ Displacement]
1) Base Register---BX, BP
2) Index Register---SI, DI
3) Displacement ---constant value
Example: 1) add ax,[20h] 2) add ax,[bx]
3) add ax,[bx+20h] 4) add ax, [bx+si]
5) add ax, [bx+si+20h]
6 66 66 66 6

3. Memory Addressing Mode

Direct Addressing Mode
Exp: MOV AL, [1064H]
Machine code:A06410H
The offset address of the operand is provided in the
instruction directly;
The physical address can be calculated using the content
of DS and the offset :
PA = (DS)*10H+Offset
7 77 77 77 7

Direct Addressing Mode

Example: MOV AL, [1064h] ;Assume (DS)=2000H
Machine code: A06410H
8 88 88 88 8
21064H
DS)*10H=20000H
20000H
21064H
AL
A0
64
10
45

Code
Segment
Data
Segment
45
45
+ 1064H

3. Memory Addressing Mode

Register Indirect Addressing Mode
The address of memory location is in a register
(SI,DI,or BX only)
The physical address is calculated using the content of DS
and the register(SI,DI,BX)
PA = (DS)*10H+(SI)/(DI)/(BX)
9 99 99 99 9

Register Indirect Addressing Mode

ASSUME: (DS)=3000H, (SI)=2000H, (BX)=1000H
10 10 10 10 10 10 10 10
50
40

M
AX
30000H
(DS)*10H=30000H
(SI)= 2000H
+
32000H
32000H
40 50
50
40

64H
M
AL
30000H
(DS)*10h= 30000H
(BX)= 1000H
+
31000H
31000H
64H
64H
MOV [BX], AL
MOV AX, [SI]

Register Relative Addressing

11 11 11 11 11 11 11 11
EA=
(BX)
(BP)
(DI)
(SI)
+
Displacement
For physical address calculation:
DS is used for BX,DI,SI;
SS is used for BP
PA=(DS)* PA=(DS)* PA=(DS)* PA=(DS)*10 10 10 10H+(BX)/(DI)/(SI)+Disp H+(BX)/(DI)/(SI)+Disp H+(BX)/(DI)/(SI)+Disp H+(BX)/(DI)/(SI)+Disp
OR OR OR OR
PA=(SS)* PA=(SS)* PA=(SS)* PA=(SS)*10 10 10 10H+(BP)+Disp H+(BP)+Disp H+(BP)+Disp H+(BP)+Disp

Register Relative Addressing

MOV CL, [BX+1064H] ;assume: (DS)=2000h, (bx)=1000h
;Machine Code: 8A8F6410
12 12 12 12 12 12 12 12
22064H
22064H
8F
64
10
45

Code
Segment
Data
Segment
8A

CL
45
45
21000H
(BX)= 1000H
(DS)*10h= 20000H
20000H
+ 1064H
PA=(ds)* PA=(ds)* PA=(ds)* PA=(ds)* PA=(ds)* PA=(ds)* PA=(ds)* PA=(ds)*10 10 10 10 10 10 10 10h+(bx)+ h+(bx)+ h+(bx)+ h+(bx)+ h+(bx)+ h+(bx)+ h+(bx)+ h+(bx)+10 10 10 10 10 10 10 10
64 64 64 64 64 64 64 64h hh hh hh h

Based Indexed Addressing

13 13 13 13 13 13 13 13
EA=
(BX)
(BP)
+
(DI)
(SI)
Base register(bx or bp) determines which
segment(data or stack) the operand is stored;
if using BX, the operand is defaultly located
in Data segment,then:
PA=(DS)* PA=(DS)* PA=(DS)* PA=(DS)*10 10 10 10H+(BX)+(DI)/(SI) H+(BX)+(DI)/(SI) H+(BX)+(DI)/(SI) H+(BX)+(DI)/(SI)
if using BP, the operand is defaultly located
in stack segment,then:
PA=(SS)* PA=(SS)* PA=(SS)* PA=(SS)*10 10 10 10H+(BP)+(DI)/(SI) H+(BP)+(DI)/(SI) H+(BP)+(DI)/(SI) H+(BP)+(DI)/(SI)

Based Indexed Addressing

Example: MOV AH, [BP][SI];Assume(ss)=4000h,(bp)=2000h,(si)=1200h
14 14 14 14 14 14 14 14
56H

M
AH
40000H
(SS)*10H= 40000H
(BP)= 2000H
+
43200H
43200H
(SI)= 1200H
56H
56H
PA=(ss)* PA=(ss)* PA=(ss)* PA=(ss)* PA=(ss)* PA=(ss)* PA=(ss)* PA=(ss)*10 10 10 10 10 10 10 10h+(bp)+(si) h+(bp)+(si) h+(bp)+(si) h+(bp)+(si) h+(bp)+(si) h+(bp)+(si) h+(bp)+(si) h+(bp)+(si)

Based Indexed Relative Addressing

15 15 15 15 15 15 15 15
EA=
(BX)
(BP)
+
(DI)
(SI)
+
Displacement
if using BX, the operand is defaultly located in
Data segment,then:
PA=(DS)* PA=(DS)* PA=(DS)* PA=(DS)*10 10 10 10H+(BX)+(DI)/(SI)+disp H+(BX)+(DI)/(SI)+disp H+(BX)+(DI)/(SI)+disp H+(BX)+(DI)/(SI)+disp
if using BP, the operand is defaultly located in
stack segment,then:
PA=(SS)* PA=(SS)* PA=(SS)* PA=(SS)*10 10 10 10H+(BP)+(DI)/(SI)+disp H+(BP)+(DI)/(SI)+disp H+(BP)+(DI)/(SI)+disp H+(BP)+(DI)/(SI)+disp

Based Indexed Relative Addressing

MOV [BX+DI+1234H], AH
;assume (ds)=4000h,(bx)=0200h,(di)=0010h
;machine code:88A13412h
16 16 16 16 16 16 16 16
A1
34
12

Code
segment
Data
segment
88

45 AH
40000H
(DS)*10H=40000H
(BX)= 0200H
+
(DI)= 0010H
1234H
45
45
41444H
41444H

17 17 17 17 17 17 17 17
Summary on the 8086 memory addressing modes
operand offset address
effective address Segment Register
3. Register [SI/DI/BX/BP+disp]
Relative Addressing
2. Register [BX]/[SI] /[DI]
Indirect Addressing
1. Direct Addressing [disp]
4. Based Indexed [BX+SI/DI]
Addressing [BP+SI/DI]
5. Based Indexed [BX+SI/DI+disp]
Relative Addressing [BP+SI/DI+disp]
Default Overridden
Segment Register
(SI)/(DI)/(BX)/(BP)+disp DS CS ES SS
Content of the R DS CS ES SS
disp DS CS ES SS
(BX)+disp DS CS ES SS
(BP)+disp SS CS ES DS
(BX)+(SI)/(DI)+disp DS CS ES SS
(BP)+(SI)/(DI)+disp SS CS ES DS

18 18 18 18 18 18 18 18
Examples: Examples: Examples: Examples:
Assume: Assume: Assume: Assume: (BX)=6000H, (BP)=4000H, (SI)=2000H,
(DS)=3000H, (ES)=3500H, (SS)=5000H
30000520 30520H Direct Addressing
2. MOV AX, [BX]
1. MOV AX, [0520H]
5. MOV AX, ES: [BX+SI+0050H]
4. MOV AX, [BP+6060H]
Register Indirect Addressing 30006000 36000H
Register Relative Addressing
Register Relative Addressing
3. MOV AX, [SI+1000H] 30003000 33000H
5000A060 5A060H
35008050 3D050H Based Indexed Relative
Addressing
Instruction Instruction Instruction Instruction Instruction Instruction Instruction Instruction addressing addressing addressing addressing addressing addressing addressing addressing logical logical logical logical logical logical logical logical
physical physical physical physical physical physical physical physical
mode mode mode mode mode mode mode mode address address address address address address address address address address address address address address address address