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FSM takes two bits xi and yi at a time (every clock cycle) as inputs. The output of The FSM should be 00 if the two values are equal. In both FSM, a would be start state as at beginning we don't know anything about the numbers. You can also assume that 'A' is start state, in which the machine can start out or reset.
FSM takes two bits xi and yi at a time (every clock cycle) as inputs. The output of The FSM should be 00 if the two values are equal. In both FSM, a would be start state as at beginning we don't know anything about the numbers. You can also assume that 'A' is start state, in which the machine can start out or reset.
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FSM takes two bits xi and yi at a time (every clock cycle) as inputs. The output of The FSM should be 00 if the two values are equal. In both FSM, a would be start state as at beginning we don't know anything about the numbers. You can also assume that 'A' is start state, in which the machine can start out or reset.
Drepturi de autor:
Attribution Non-Commercial (BY-NC)
Formate disponibile
Descărcați ca PDF, TXT sau citiți online pe Scribd