CHAPTER-1 INTRODUCTION 1.

1 OVERVIEW
Since many years, the aid for accident victims is given only after the arrival of the ambulance. The accidents that occur in the highways or the unpopulated area or a deserted place cannot be detected due to lack of technology and source, hence the victims lose their lives. There are many cases where people have lost their lives due to lack of assistance and help at the right time. As we see from many years the death rate has been increasing mainly due to accidents. These days the density of traffic has been increasing in the increasing population resulting too many accidents India is ranking no. 1 in road accident deaths and they are about 1, 05,000 annually. As road traffic crashes takes the lives of nearly 1.3 million every year, and injure up to 2050 million and more in the world. Poor road infrastructure, failure to compile with speed limits, increasing drunken drive habits, and refusal to usage of proper motorcycle helmets and car seat belts are one among the main factors for the cause for increase to deaths by road accidents. The irregular roads also lead to the accidents and inspite of this usage technology. WHO (Worlds health organization) said in its report that Decade f action for road safety 2011-2010 1.2 STATEMENT OF THE PROBLEM The problem here is that due to lack of assistance and help at the right time the people lose their lives in the accidents. There is no indication to the concern people about the place where it took place and the information of the person and the vehicle who met with the accident. For this particular problem there are many solutions to handle. Our project is one of the solutions Accident Alerting System using RF. Accident Alerting System is mainly a device that identifies the accident that has been accrued and sends the information to the destination that may be any control room, hospital or the victims home.

This particular system uses radio frequency (RF) signals for its communication from recover to trams miter i.e. from victim to the required office. Since the medium is wireless system the cost of this system is low compared to other and also less power consumption takes place. This accident alerting system is significantly used to help the victims and to reduce the death rate in India.

1.3 OBJECTIVE OF THE STUDY

The main objective of our project is to save the life of the victims who met with road accidents by providing the information of the incident to the respective destination. Accident Alerting System, in this we use sensors to detect the occurrence of the accident. This system consists of transmitter and receiver where vehicle is considered to be transmitter and respective destination is considered to be receiver. Once accident occurs it is sensed by the sensor. Then the information is sent though air (RF) to the receiver where LCD is placed for the information display. By this process person in the vehicle would be saved by taking precautionary actions. All the components in this system are interfaced with each other using microcontroller unit. It provides the logics gate inputs to the encoder circuit sends to the receiver circuit by decoding it by using a decoder. At both ends s desired antenna is fixed according to the frequency

1.4 LITERATURE SURVAY

EMBEDDED SYSTEMS Embedded systems are designed to do some specific task rather than be a generalpurpose computer for multiple tasks.Some also has real time performance constraints that must be met, for reason such as safety and usability; others may have low or no performance requirements, allowing the system hardware to be simplified to reduce costs. An embedded system is not always a separate block - very often it is physically built-in to the device it is controlling. The software written for embedded systems is often called firmware, and is stored in read-only memory or flash convector chips rather than a disk drive. It often runs with limited computer hardware resources: small or no keyboard, screen, and little memory.

Communication: Communication refers to the sending, receiving and processing of information by electric means. As such, it started with wire telegraphy in the early 80s, developing with telephony and radio some decades later. Radio communication became the most widely used and refined through the invention of and use of transistor, integrated circuit, and other semi-conductor devices. Most recently, the use of satellites and fiber optics has made communication even more wide spread, with an increasing emphasis on computer and other data communications. A modern communications system is first concerned with the sorting, processing and storing of information before its transmission. The actual transmission then follows, with further processing and the filtering of noise. Finally we have reception, which may include processing steps such as decoding, storage and interpretation. In this context, forms of communications include radio, telephony and telegraphy, broadcast, point to point and mobile communications (commercial and military), computer communications, radar, radio telemetry and radio aids to navigation. It is also important to consider the human factors influencing a particular system, since they can always affect its design, planning and use. Wireless communication has become an important feature for commercial products and a popular research topic within the last ten years. There are now more mobile phone subscriptions than wired-line subscriptions. Lately, one area of commercial interest has been low-cost, low-power, and short-distance wireless communication used for personal wireless networks." Technology advancements are providing smaller and more cost effective devices for integrating computational processing, wireless communication, and a host of other functionalities. These embedded communications devices will be integrated into applications ranging from homeland security to industry automation and monitoring. They will also enable custom tailored engineering solutions, creating a revolutionary way of disseminating and processing information. With new technologies and devices come new business activities, and the need for employees in these technological areas. Engineers who have knowledge of embedded systems and wireless communications will be in high demand.

Unfortunately, there are few adorable environments available for development and classroom use, so students often do not learn about these technologies during hands-on lab exercises. The communication mediums were twisted pair, optical fiber, infrared, and generally wireless radio.

1.5 ORGANISATION OF THESIS

This thesis consists of six chapters. This chapter discuss about overview of project, statement of the problem, objective of the study, literature survey and organization of thesis. Chapter 2 contains a brief description of block diagram. Chapter 3 includes the project methodology. It will give detailed explanation about the materials and methods used in the project. Also in this topic discusses the methodology of the system, circuit design, software design and the mechanical design. Chapter 4 includes the flow chart and the programming code used in the project. Chapter 5 gives the more details about the results and the project implementation. The last chapter contained the detailed description about conclusion and recommendation. This chapter will conclude the whole project and give a future recommendation to make this project perfect.

PASSPORTS
A passport is a document, issued by a national government, which certifies, for the purpose of international travel, the identity and nationality of its holder. The elements of identity are name, date of birth, sex, and place of birth. Most often, nationality and citizenship are congruent. A passport does not of itself entitle the passport holder entry into another country, nor to consular protection while abroad or any other privileges. It does, however, normally entitle the passport holder to return to the country that issued the passport. Rights to consular protection arise from international agreements, and the right to return arises from the laws of the issuing country. A passport does not represent the right or the place of residence of the passport holder in the country that issued the passport. The terminology related to passports has become generally standardized around the world. The typical passports include:

ORDINARY PASSPORT also called Tourist or Regular passport:

Issued to ordinary citizens

OFFICIAL PASSPORT also called Service passport:

Issued to government employees for work-related travel, and to accompanying dependents

DIPLOMATIC PASSPORT:
Issued to diplomats and consuls for work-related travel, and to accompanying dependents Having a diplomatic passport is not the equivalent of having diplomatic immunity. A grant of diplomatic status, a privilege of which is diplomatic immunity, has to come from the government of the country in relation to which diplomatic status is claimed. Also, having a diplomatic passport does not mean visa-free travel. A holder of a diplomatic

passport usually has to obtain a diplomatic visa, even if a holder of an ordinary passport may enter a country visa-free or may obtain a visa on arrival. In exceptional circumstances, a diplomatic passport is given to a foreign citizen with no passport of his own, such as an exiled VIP who lives, by invitation, in a foreign country.

EMERGENCY PASSPORT also called Temporary passport:

Issued to persons whose passports were lost or stolen, and who do not have time to obtain replacement passports.

COLLECTIVE PASSPORT:
Issued to defined groups for travel together to particular destinations, such as a group of school children on a school trip to a specified country

FAMILY PASSPORT:
Issued to family membersfather, mother, son, daughter. There is one passport holder. The passport holder may travel alone or with one or more other family members. A family member who is not the passport holder cannot use the passport for travel unless accompanied by the passport holder.

LAISSEZ-PASSER:
Not a full passport, but a document which serves the function of a passport. Laissez-passer is issued by international organizations to their officers and employees for official travel.

CERTIFICATE OF IDENTITY also called Alien's passport

Not a full passport, but a document issued under certain circumstances, such as statelessness, to non-citizen residents. An example of this is the "Nansen passport".

In Latvia, an alien's passport is a passport for non-citizens - former citizens of the Soviet Union who reside in Latvia, but are not entitled to citizenship. It is used as an internal passport inside Latvia, and as a travel document outside Latvia.

REFUGEE TRAVEL DOCUMENT:

Not a full passport, but a document issued to a refugee by the state in which she or he normally resides allowing him or her to travel outside that state and to return there. Refugees are unlikely to be able to obtain passports from their state of nationality (from which they have sought asylum) and therefore need travel document so that they might engage in international travel.

INTERNAL PASSPORT:
Not a full passport, but an identity document which keeps track of migration within a country. Examples: The internal passport of Russia or the hukou residence-registration system in mainland China, both dating back to imperial times.

CAMOUFLAGE AND FANTASY PASSPORTS:

A Camouflage passport is a document that appears to be a regular passport but is actually in the name of a country that no longer exists, never existed, or the previous name a country that has changed its name. Companies that sell camouflage passports make the rather dubious claim that in the event of a hijacking they could be shown to terrorists to aid escape. There is no known instance of this happening. Because a camouflage passport is not issued in the name of a real country, it is not a counterfeit and is not illegal per se to have. However attempting to use it to actually enter a country would be illegal in most jurisdictions.

 A fantasy passport is likewise a document not issued by a recognized government and invalid for legitimate travel. Fantasy passports are distinguished from camouflage passports in that they are issued by an actual, existent group, organization, or tribe. In some cases the goal of the fantasy passport is to make a political statement or to denote membership in the organization. In other cases they are issued more or less as a joke or for novelty souvenir purposes, such as those sold as "Conch Republic" passports.

BIOMETRICS
Biometrics refers to methods for uniquely recognizing humans based upon one or more intrinsic physical or behavioral traits. In information technology, in particular, biometrics is used as a form of identity access management and access control. It is also used to identify individuals in groups that are under surveillance. Biometric characteristics can be divided in two main classes:

Physiological are related to the shape of the body. Examples include, but are not limited to fingerprint, face recognition, DNA, hand and palm geometry, iris recognition, which has largely replaced retina, and odor/scent. Behavioral are related to the behavior of a person. Examples include, but are not limited to typing rhythm, gait, and voice. Some researchers have coined the term behaviometrics for this class of biometrics.

It is possible to understand if a human characteristic can be used for biometrics in terms of the following parameters

Universality each person should have the characteristic. Uniqueness is how well the biometric separates individuals from another. Permanence measures how well a biometric resists aging. Collect ability ease of acquisition for measurement. Performance accuracy, speed, and robustness of technology used. Acceptability degree of approval of a technology. Circumvention ease of use of a substitute.

A biometric system can provide the following two functions

Verification Authenticates its users in conjunction with a smart card, username or ID number. The biometric template captured is compared with that stored against the registered user either on a smart card or database for verification. Identification Authenticates its users from the biometric characteristic alone without the use of smart cards, usernames or ID numbers. The biometric template is compared to all records within the database and a closest match score is returned. The closest match within the allowed threshold is deemed the individual and authenticated.

The main operations a system can perform are enrollment and test. During the enrollment, biometric information from an individual is stored. During the test, biometric information is detected and compared with the stored information. Note that it is crucial that storage and retrieval of such systems themselves be secure if the biometric system is to be robust. The first block (sensor) is the interface between the real world and the system; it has to acquire all the necessary data. Most of the times it is an image acquisition system, but it can change according to the characteristics desired. The second block performs all the necessary pre-processing: it has to remove artifacts from the sensor, to enhance the input (e.g. removing background noise), to use some kind of normalization, etc. In the third block features needed are extracted. This step is an important step as the correct features need to be extracted in the optimal way. A vector of numbers or an image with particular properties is used to create a template. A template is a synthesis of all the characteristics extracted from the source, in the optimal size to allow for adequate identifiably. If enrollment is being performed the template is simply stored somewhere (on a card or within a database or both). If a matching phase is being performed, the obtained template is passed to a matcher that compares it with other existing templates, estimating the distance between them using any algorithm (e.g. Hamming distance). The matching program will analyze the template with the input. This will then be output for any specified use or purpose (e.g. entrance in a restricted area).

Hand geometry systems are commonly available in two main forms. Full hand geometry systems take an image of the entire hand for comparison while Two Finger readers only image two fingers of the hand. Hand recognition technology is currently one of the most deployed biometrics disciplines world wide and is used in over 46% of the worlds Time and Attendance / Access Control solutions. Hand recognition systems are especially useful in outdoor environments. Hand recognition templates are also extremely small, a characteristic that makes the templates very portable. Typical templates sizes are as small as 9 bytes. Iris recognition is a Biometrics technology that uses a camera, much like face recognition does, to capture an image of the Iris and then convert that image to a template using complex algorithms and 2D Gabor Wavelets. Iris recognition is widely regarded as the most accurate biometrics technology and is used very effectively all over the world. The structures creating the human Iris pattern are highly advanced by the 8th month of gestation and are complete during the first postnatal years. This makes Iris recognition ideal for use with humans of all ages. Iris recognition technology is safe, accurate and capable of performing 1-to-many matches at extraordinarily high speeds, without sacrificing accuracy. Iris recognition has also become more passive, and acquisition devices can be situated at distances of up to 10" away from the individual attempting verification. Due to its accuracy, and speed capabilities, Iris recognition is sometimes used within the Bio MAP platform as the primary reference biometrics technology. The primary reference biometrics technology is that biometrics technology which performs the one-to-many search and identifies the subject for verification by the other linked biometrics. Face recognition is a Biometrics technology that uses an image or series of images either from a camera or photograph to recognize a person. Unlike other biometrics technologies, face recognition is a passive biometrics and does not require a persons cooperation. It can recognize people from a distance without them realizing that they are being analyzed. Face recognition is completely oblivious to differences in appearance as a result of race or gender differences and is a highly robust Biometrics. This Biometrics

technology has been used extensively throughout the world over the last three to five years in industries like Banking, Gaming, Healthcare, Law enforcement, Customs and excise and Retail. The technology has proven it extremely successful and is currently the fastest growing Biometrics in the world. The technology uses any one of a number of sophisticated algorithms and techniques. Some technologies use an algorithm called LFA (Local Feature Analysis) to identify and derive a representation in terms of the spatial relationships between irreducible local features, or nodal points on the face. Others use an approach known as Eigen faces while some use an advanced neural network technology to recognize faces electronically. Fingerprint recognition is an extremely useful biometrics technology since fingerprints have long been recognized as a primary and accurate identification method. It is as a direct result of this recognition, that large fingerprint databases can be found within law enforcement agencies the world over. Fingerprint technology can be used for both verification (1:1) matching as well as for Identification (1:n) matching. Electronic Fingerprint matching can be achieved through one of two methodologies. The first uses the ridge endings and bifurcation's on a persons finger to plot points known as Minutiae (Minutiae based approach). These Minutiae allow for the comparison of two fingerprints to be achieved electronically. The second methodology uses a pattern based approached. This comparison technique (Pattern based) is performed in two fundamental blocks: Image Enhancement and Distortion Removal. In each instance that a finger is applied to a fingerprint device, the ridge pattern exhibits a different degree of distortion. The key to accurate comparison of the ridge pattern is the ability to ascertain and then remove the relative distortion between the fingerprint template and the candidate fingerprint image. In a recent competition, one Pattern based technology outperformed almost all other technologies to take top honors. Fingerprint technology is available as an option on all of our products and can be used either stand-alone, or in conjunction with our Face recognition, Iris recognition and/or Hand Geometry technologies. The Biocom fingerprint systems integrate into our Bio MAP

platform seamlessly and perform exceptionally well when used in a Multi-Modal configuration with other biometrics technologies.

CHAPTER-2 BLOCK DIAGRAM

RFID READER

LCD

MAX 232

KEYPAD

OP-69 (FINGER PRINT MODULE) ATMEGA 162 AT24C08

GREEN LED

RED LED & BUZZER

ATMEGA162 FEATURES:
High-performance, Low-power AVR 8-bit Microcontroller Advanced RISC Architecture 131 Powerful Instructions Most Single-clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 16 MIPS Throughput at 16 MHz

On-chip 2-cycle Multiplier 16K Bytes of In-System Self-programmable Flash Endurance: 1,000 Write/Erase Cycles Endurance: 10,000 Write/Erase Cycles for ATmega16

Non-volatile Program and Data Memories

Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-WhileWrite Operation

512 Bytes EEPROM Endurance: 100,000 Write/Erase Cycles 1K Bytes Internal SRAM Programming Lock for Software Security

Peripheral Features Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode Real Time Counter with Separate Oscillator Six PWM Channels

Dual Programmable Serial USARTs Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby I/O and Packages 35 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, and 44-pad MLF

 Operating Voltages 1.8 - 3.6V for ATmega162V 2.4 - 4.0V for ATmega162U 2.7 - 5.5V for ATmega16L 4.5 - 5.5V for ATmega16

Speed Grades 0 - 1 MHz for ATmega162V 0 - 8 MHz for ATmega16L/U 0 - 16 MHz for ATmega16

OVERVIEW:
The ATmega162 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega162 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

BLOCK DIAGRAM:

PIN CONFIGURATIONS

PIN CONFIGURATION:

PIN DESCRIPTIONS: VCC:

Digital supply voltage

GND:
Ground

PORT A (PA7PA0):
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. When pins PA0 to PA7 are used as inputs and are externally

pulled low, they will source current if the internal pull-up resistors are activated. The PortA pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega162.

PORT B (PB7PB0):
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATmega162.

PORT C (PC7PC0):
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the JTAG interface is enabled, the pull-up resistors on pins PC5 (TDI), PC3 (TMS) and PC2 (TCK) will be activated even if a reset occurs. Port C also serves the functions of the JTAG interface and other special features of the ATmega16

PORT D (PD7PD0):
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the ATmega162.

PORT E (PE2...PE0):
Port E is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the ATmega162

RESET:
Reset Input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.

XTAL1:
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

XTAL2:
Output from the inverting Oscillator amplifier

USART:
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a highly flexible serial communication device. The main features are: Full Duplex Operation (Independent Serial Receive and Transmit Registers) Asynchronous or Synchronous Operation Master or Slave Clocked Synchronous Operation High Resolution Baud Rate Generator Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits Odd or Even Parity Generation and Parity Check Supported by Hardware Data Over Run Detection Framing Error Detection Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter Three Separate Interrupts on TX Complete, TX Data Register Empty, and RX Complete Multi-processor Communication Mode Double Speed Asynchronous Communication Mode

DUAL USART:
The ATmega162 has two USARTs, USART0 and USART1. The functionality for both USARTs is described below. USART0 and USART1 have different I/O Registers. Note that in ATmega161 compatibility mode, the double buffering of the USART Receive Register is disabled. Note also that the shared UBRRHI Register in ATmega161 has been split into two separate registers, UBRR0H and UBRR1H, in ATmega162.

OVERVIEW:
A simplified block diagram of the USART transmitter is shown in Figure below. CPU accessible I/O Registers and I/O pins are shown in bold.

AVR USART vs. AVR UART COMPATIBILITY

The USART is fully compatible with the AVR UART regarding: Bit locations inside all USART Registers Baud Rate Generation Transmitter Operation Transmit Buffer Functionality Receiver Operation However, the receive buffering have two improvements that will affect the compatibility in some special cases: A second buffer register has been added. The two buffer registers operate as a circular FIFO buffer. Therefore the UDR must only be read once for each incoming data! More important is the fact that the error flags (FE and DOR) and the 9th data bit (RXB8) are buffered with the data in the receive buffer. Therefore the status bits must always be read before the UDR Register is read. Otherwise the error status will be lost since the buffer state is lost. The receiver Shift Register can now act as a third buffer level. This is done by allowing the received data to remain in the serial Shift Register if the buffer

registers are full, until a new start bit is detected. The USART is therefore more resistant to Data Over Run (DOR) error conditions. The following control bits have changed name, but have same functionality and register location: CHR9 is changed to UCSZ2 OR is changed to DOR

CLOCK GENERATION
The clock generation logic generates the base clock for the Transmitter and Receiver. The USART supports four modes of clock operation: Normal Asynchronous, Double Speed Asynchronous, Master Synchronous and Slave Synchronous mode. The UMSEL bit in USART Control and Status Register C (UCSRC) selects between asynchronous and synchronous operation. Double Speed (Asynchronous mode only) is controlled by the U2X found in the UCSRA Register. When using Synchronous mode (UMSEL = 1), the Data Direction Register for the XCK pin (DDR_XCK) controls whether the clock source is internal (Master mode) or external (Slave mode). The XCK pin is only active when using Synchronous mode. Figure below shows a block diagram of the clock generation logic.

RFID
The first disturbing fact is that RFID is not a new technology. It was first used over sixty years ago by Britain to identify aircraft in World War II and was part of the refinement of radar. It was during the 1960s that RFID was first considered as a solution for the commercial world. The first commercial applications involving RFID followed during the 70s and 80s. These commercial applications were concerned with identifying some asset inside a single location. They were based on proprietary infrastructures. The third era of RFID started in 1998, when researchers at the Massachusetts Institute of Technology (MIT) Auto ID Center began to research new ways to track and identify objects as they moved between physical locations. This research which has a global outlook, centered on radio frequency technology and how information that is held on tags can be effectively scanned and shared with business partners in near real time.To do this we needed standards. The work of the Auto ID Center focused on:

Reducing the cost of manufacturing RFID tags. Optimizing data networks for storing and delivering larger amounts of data. Developing open standards. Radio-frequency-identification (RFID) is an automatic identification method,

relying on storing and remotely retrieving data using devices called RFID tags or transponders. The technology requires some extent of cooperation of an RFID reader and an RFID tag. An RFID tag is an object that can be applied to or incorporated into a product, animal, or person for the purpose of identification and tracking using radio waves. Some tags can be read from several meters away and beyond the line of sight of the reader. Most RFID tags contain at least two parts. One is an integrated circuit for storing and processing

information, modulating and demodulating a radio-frequency (RF) signal, and other specialized functions. The second is an antenna for receiving and transmitting the signal. Future Chip less RFID allows for discrete identification of tags without an integrated circuit, thereby allowing tags to be printed directly onto assets at a lower cost than traditional tags. Currently none of the chip less concepts has become operational. Today, RFID is used in enterprise supply chain management to improve the efficiency of inventory tracking and management. RFID is an identification technology. It holds data you can access by using a reader. RFID uses radio technology. RFID (Radio Frequency Identification) is best described as a wireless memory chip. Today RFID is the most intelligent technology for managing and collecting a product's data or tracking it as it moves through the supply chain. RFID technology has been used in various applications for many years, but now chips are getting smaller and tags cheaper. With new applications developing, the benefits are undeniable. No single RFID transponder technology is ideal for implementation in all areas. Different frequency bands are better suited for specific applications. When selecting the proper solution, the following issues should be taken into consideration. Geographical region Regional regulatory requirements General performance characteristics Application requirements Two frequency ranges are generally distinguished for smart RFID systems, High Frequency (HF) 13.56 MHz and Ultra High Frequency (UHF) 860-956 MHz. SATO can support the encoding requirements for both Wal-Mart and Metro following the general epic and ISO regulations. This plays a major work in some applications like: If this RFID is implemented in a library as the RFID tag can contain identifying information, such as a book's title or material type without having to be pointed to a separate database. The information is read by an RFID reader, which replaces the standard

barcode reader commonly found at a library's circulation desk. It may replace or be added to the barcode, offering a different means of inventory management by the staff and self service by the borrowers. It can also act as a security device, taking the place of the more traditional electromagnetic security strip and not only the books, but also the membership cards could be fitted with an RFID tag. The scenarios focus on a bicycle manufacturer that produces high-end bicycles for the global market. All parts are purchased from vendors, except for the frames, which are made in-house from raw steel pipe. The description shows the potential of RFID to deliver benefits at every stage of the supply chain as the bikes are assembled, distributed to retailers, and finally sold to customers.

LCD
A liquid crystal display (LCD) is a thin, flat panel used for electronically displaying information such as text, images, and moving pictures. Its uses include monitors for computers, televisions, instrument panels, and other devices ranging from aircraft cockpit displays, to every-day consumer devices such as video players, gaming devices, clocks, watches, calculators, and telephones. Among its major features are its lightweight construction, its portability, and its ability to be produced in much larger screen sizes than are practical for the construction of cathode ray tube (CRT) display technology. Its low electrical power consumption enables it to be used in battery-powered electronic equipment. It is an electronically-modulated optical device made up of any number of pixels filled with liquid crystals and arrayed in front of a light source (backlight) or reflector to produce images in color or monochrome. The earliest discovery leading to the development of LCD technology, the discovery of liquid crystals, dates from 1888. By 2008, worldwide sales of televisions with LCD screens had surpassed the sale of CRT units.

PIN DESCRIPTION:

PIN DESCRIPTION:
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SYMBOL VSS VCC VEE RS R/W EN DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 I/O ---I I I/O I/O I/O I/O I/O I/O I/O I/O I/O DESCRIPTION Ground +5V power supply Power supply to control contrast RS=0 to select command register RS=1 to select data register R/W=0 for write R/W=1 for read Enable The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus

LCD COMMAND CODES: CODE (HEX) 1 2 4 6 5 7 8 A C E COMMAND TO LCD INSTRUCTION REGISTER CLEAR DISPLAY SCREEN RETURN HOME DECREMENT CURSOR(SHIFT CURSOR TO LEFT) INCREMENT CURSOR(SHIFT CURSOR TO RIGHT) SHIFT DISPLAY RIGHT SHIFT DISPLAY LEFT DISPLAY OFF,CURSOR OFF DISPLAY OFF,CURSOR ON DISPLAY ON,CURSOR OFF DISPLAY ON CURSOR BLINKING

F 10 14 18 1C 80 C0 38

DISPLAY ON CURSOR BLINKING SHIFT CURSOR POSITION TO LEFT SHIFT CURSOR POSITION TO RIGHT SHIFT THE ENTIRE DISPLAY TO THE LEFT SHIFT THE ENTIRE DISPLAY TO THE RIGHT FORCE CURSOR TO BEGINNING OF 1ST LINE FORCE CURSOR TO BEGINNING OF 2ND LINE 2 LINES AND 5x7 MATRIX

ADVANTAGES:
LCD interfacing with 8051 is a real-world application. In recent years the LCD is finding widespread use replacing LEDs (seven segment LEDs or other multi segment LEDs). This is due to following reasons: The declining prices of LCDs.

The ability to display numbers, characters and graphics. This is in contrast to LEDs, which are limited to numbers and a few characters. An intelligent LCD displays two lines, 20 characters per line, which is interfaced to the 8051.

Incorporation of a refreshing controller into the LCD, thereby relieving the CPU to keep displaying the data. Ease of programming for characters and graphics.

LIGHT EMITTING DIODE

A light-emitting diode (LED) is a semiconductor diode that emits incoherent narrow spectrum light when electrically biased in the forward direction of the pn-junction, as in the common LED circuit. This effect is a form of electroluminescence.

Like a normal diode, the LED consists of a chip of semi-conducting material impregnated, or doped, with impurities to create a p-n junction. As in other diodes, current flows easily from the p-side, or anode, to the n-side, or cathode, but not in the reverse direction. Charge-carrierselectrons and holesflow into the junction from electrodes with different voltages. When an electron meets a hole, it falls into a lower energy level, and releases energy in the form of a photon. The wavelength of the light emitted, and therefore its color, depends on the band gap energy of the materials forming the p-n junction. In silicon or germanium diodes, the electrons and holes recombine by a non-radiative transition which produces no optical emission, because these are indirect band gap materials. The materials used for the LED have a direct band gap with energies corresponding to near-infrared, visible or near-ultraviolet light. LED development began with infrared and red devices made with gallium arsenide. Advances in materials science have made possible the production of devices with evershorter wavelengths, producing light in a variety of colors. LEDs are usually built on an n-type substrate, with an electrode attached to the p-type layer deposited on its surface. P-type substrates, while less common, occur as well. Many commercial LEDs, especially GaN/InGaN, also use sapphire substrate. Most materials used

for LED production have very high refractive indices. This means that much light will be reflected back in to the material at the material/air surface interface. Therefore Light extraction in LEDs is an important aspect of LED production, subject to much research and development. Solid state devices such as LEDs are subject to very limited wear and tear if operated at low currents and at low temperatures. Many of the LEDs produced in the 1970s and 1980s are still in service today. Typical lifetimes quoted are 25,000 to 100,000 hours but heat and current settings can extend or shorten this time significantly. wavelength range and voltage drop. Conventional LEDs are made from a variety of inorganic semiconductor materials; the following table shows the available colors with

ADVANTAGES OF LEDS:
LEDs have many advantages over other technologies like lasers. As compared to laser diodes or IR sources LEDs are conventional incandescent lamps. For one thing, they don't have a filament that will burn out, so they last much longer. Additionally, their small plastic bulb makes them a lot more durable. They also fit more easily into modern electronic circuits. The main advantage is efficiency. In conventional incandescent bulbs, the lightproduction process involves generating a lot of heat (the filament must be warmed). Unless you're using the lamp as a heater, because a huge portion of the available electricity isn't going toward producing visible light. LEDs generate very little heat. A much higher percentage of the electrical power is going directly for generating light, which cuts down the electricity demands considerably. LEDs offer advantages such as low cost and long service life. Moreover LEDs have very low power consumption and are easy to maintain.

DISADVANTAGES OF LEDS:

 LEDs performance largely depends on the ambient temperature of the operating environment. LEDs must be supplied with the correct current. LEDs do not approximate a "point source" of light, so cannot be used in applications needing a highly collimated beam. But the disadvantages are quite negligible as the negative properties of LEDs do not apply and the advantages far exceed the limitations.

OP-69 FINGERPRINT INTEGRATED MODULE

OP-69 is the fingerprint module for secondary development which has integrated fingerprint Collecting and single chip processor together. It features small size, low power consumption, simple ports, high reliability, small fingerprint template (512bytes), large fingerprint capacity, etc. It is convenient to be embedded to user system for realizing clients required fingerprint verification products. OP-69 outstandingly features selflearning function. During the fingerprint verification process, the latest collected

fingerprint features would be integrated into the fingerprint database automatically so that the users would obtain better and better fingerprint verification result. SM Series module is UART communication interface with adjustable safety level function, fingerprint data reading & writing function, 1: N and 1:1 verification function.

MAIN FUNCTIONS:
Communication interface :UART Optic sensor is reliable and Low-cost, High ESD Protection 1:N Identification (One-to-Many) 1:1 Verification (One-to-One) High speed fingerprint identification algorithm engine Self study function Fingerprint template data read from /write to FLASH memory function Get Feature Data of Captured fingerprint and Verify/Identify Downloaded Feature with Captured fingerprint(Specially designed for fingerprint stored in IC card) Identify Downloaded Feature with Captured fingerprint Security Level setting Able to set Baud Rate / Device ID/Device Password

APPLICATIONS:
Access control systems Time & Attendance Locks, safes POS, handheld terminals

HARDWARE FEATURES:

CONNECTOR SIGNAL DESCRIPTION:

1. Module Tx : 2. Module Rx : 3. GND 4. DC3.3V : :

Transmit Output 3.3V TTL Logic Receive Input 3.3V TTL Logic GND Power Supply DC3.3V5%

Note: Module power supply is DC3.3V, UART Port is 3.3V TTL

MODULE TECHNICAL PARAMETERS:

DEFAULT FACTORY SETTINGS:

COMMAND MODE USERS GUIDE:

The module is used as a slave device. The Master device sends relative commands to control it. The CMD sent by the master and the ACK signal returned by the module. Command interface : UART (Universal Asynchronous Receiver Transmitter) 1 start-bit 1 stop-bit (no check bit) 115200bps

THE PROCESS OF COMMUNICATION:

CLASSIFY OF COMMUNICATION PACKET: COMMAND PACKET

Command Packet is the instruction from Host to Target (OP-69), Total length of the command packet is 24 Bytes

RESPONSE PACKET
Response packet is result of execute command packet, from Target (OP-69) to Host, Total length of the command packet is 24 Bytes

 DATA PACKET
When length of Command Parameter or Data is larger than 16 Bytes, Utilize Data Packet to transmit block Data, the maximum length of Data Packet is 512Bytes

PACKET STRUCTURE: PACKET IDENTIFY CODE

Section start 2byte prefix define type of packet

STRUCTURE OF COMMAND PACKET

RESPONSE PACKET

 COMMAND DATA PACKET

Before send Command Data packet, Host first send Command packet which set the length of next command data packet in Data Field

RESPONSE DATA PACKET

STRUCTURE OF FINGERPRINT TEMPLATE DATA:

Template Data(496Bytes) + Check Sum(2Bytes) = 498Bytes

RADIO FREQUENCY IDENTIFICATION (RFID)

Radio frequency identification (RFID) in a variety of ways including automatic identification and data capture (AIDC) solutions. We pride ourselves in providing customers with inexpensive RFID solutions that integrate well with other systems.

RFID Reader Module, are also called as interrogators. They convert radio waves returned from the RFID tag into a form that can be passed on to Controllers, which can make use of it. RFID tags and readers have to be tuned to the same frequency in order to communicate. RFID systems use many different frequencies, but the most common and widely used & supported by our Reader is 125 KHz. The reader has been designed as a Plug & Play Module and can be plugged on a Standard 300 MIL-28 Pin IC socket form factor.

FUNCTIONS:
1. Supports reading of 64 Bit Manchester Encoded cards 2. Pins for External Antenna connection 3. Serial Interface (TTL)

4. Wigand Interface also available 5. Customer application on request

TECHNICAL DATA:
Frequency Read Range Power supply Current consumption max. Operating temperature Storing temperature Interface Dimensions (l x w x h) Serial Interface Format : 125 kHz : up to 8 cm : 5V DC ( 5 %) : 60 mA : -20 ... +65 C : -40 ... +75 C : RS232 ( TTL),Wiegand and others (on Demand) : 36 x 18 x 10 mm : 9600Baud, No Parity, 8 Data bits,1 Stop bit

Note: The TTL RS-232 Interface can not be connected directly to a PC COM port. Therefore the signal must be converted to RS 232 level for PC connection. This Firmware has the following Functions:

Read Tag-ID Send Tag-ID in ASCII Format through the Serial/ Wiegand Interface.

Sequence starts with Tag ID follows from Carriage-Return/Line-Feed (0Dh 0Ah), Example: '041201938C<CR><LF>' RFID 125 Reader Module PIN Diagram:

PIN NO. 6 4 8 TxD

SIGNAL

DESCRIPTION Transmit data (TTL level) output from module to serial interface It will give DATA HIGH signal. Receive data (TTL level) input to the module from serial interface LED will glow for 280 ms when tag is detected It will give DATA LOW signal. Buzzer will buzz for 280 ms when tag is detected

Wiegand DATA HIGH ( available in Wiegand ) RxD LED ( active low) (available in RS 232 )

14 Wiegand DATA LOW ( available in Wiegand ) 12 Buzzer (active low)

Note:
Reader module has to be mounted on non-metallic surface, else it may affect the operation of reader. 1. Buzzer & LED are Active low signals.

2. For Buzzer & LED current limiting Resister has to be mounted. MAX current is 20mA. (470 or 510 ohms for LED and 240 or 270 Ohms for Buzzer) 3. LEDs Anode and Buzzers Positive marked pin to be connected to Vcc. 4. Wiegand out put format is also available in select readers.

APPLICATIONS:
RFID readers can be used for Access control, Time & Attendance, Vending machines, industrial and other applications where Reading the data from the Card only is required.

4X4 KEYPAD
A keypad is a set of buttons arranged in a block or "pad" which usually bear digits and other symbols and usually a complete set of alphabetical letters. If it mostly contains numbers then it can also be called a numeric keypad. Keypads are found on many alphanumeric keyboards and on other devices such as calculators, push-button telephones, combination locks, and digital door locks, which require mainly numeric input. There are many methods depending on how you connect your keypad with your controller, but the basic logic is same. We make the coloums as I/p and we drive the rows making them o/p, this whole procedure of reading the keyboard is called scanning. In order to detect which key is pressed from the matrix, we make row lines low one by one and read the coloums. Lets say we first make Row1 low, and then read the columns. If any one of the key in row1 is pressed it will make the corresponding column as low i.e. if second key is pressed in Row1, then the column2 will be low. So we come to know that key 2 of Row1 is pressed. This is how scanning is done.

INTERFACING THE KEYBOARD TO THE MICROCONTROLLER:

At the lowest level, keyboards are organized in a matrix of rows and columns. The CPU accesses both rows and columns through ports; therefore, with two 8-bit ports, an 8x8 matrix of keys can be connected to a microprocessor. When a key is pressed, a row and a column make a contact; otherwise, there is no connection between rows and columns. In IBM PC keyboards, a single microcontroller (consisting of a microprocessor, RAM and EPROM, and several PORTS all on a single chip) takes care of hardware and software interfacing of the keyboard, in such systems, it is the function of programs stored in the

EPROM of the microcontroller to scan the keys continuously, identify which one has been activated, and present it to the motherboard. In this section we look at the mechanism by which the microcontroller scans and identifies the key.

SCANNING AND IDENTIFYING THE KEY:

Fig shows a 4x4 matrix connected to two ports. The rows are connected to an output port and the columns are connected to an input port. If no key has been pressed, reading the input port will yield 1s for all columns since they are all connected to high (Vcc). If all the rows are grounded and a key is pressed, one of the columns will have 0 since the pressed provides the path to ground. It is the function of the microcontroller to scan the keyboard continuously to detect and identify the key pressed. How it is done is explained next.

GROUNDING ROWS AND READING THE COLUMNS:

To detect a pressed key, the microcontroller grounds all rows by providing 0 to the output latch, and then it reads the columns. If the data read from the columns is D3D0=1111, no key has been pressed and the process continues until a key press is detected. However, if one of the column bits has a 0, this means that a key press has occurred. For

Example, if D3-D0=1101, this means that a key in the D1 column has been pressed. After a key press is detected the microcontroller will go through the process of identifying the key. Starting with the top row, the microcontroller grounds it by providing a low to row D0 only; then it reads the columns. If the data reads is all 1s, no key in that row is activated and the process is moved to the next row. It grounds the next row, reads the columns, and checks for any 0. This process continues until the row is identified. After identification of the row in which the key has been pressed, the next task is to find out which column the pressed key belongs to. This should be easy since the microcontroller knows at any time which row and column are being accessed.

THE PROCESS OF SCANNING A KEY GOES THROUGH THE FOLLOWING 4 STEPS:

1. To make sense that the preceding key has been released, 0s are output to all rows at

once and the columns are read and checked repeatedly until all the columns are high. When all columns are found to be high, the program waits for a short amount of time before it goes to the next stage of waiting for a key to be pressed. 2. To see if any key is pressed, the columns scanned over and over in an infinite loop until one of them has a zero (0) on it. Remember that the output latches connected to rows still have their initial zeros making them grounded. After the key press detection it waits 20ms for bounce and then scans the columns again. This serves two functions It ensures that the first key detection was not an erroneous one due to a spike noise and The 20ms delay prevents the same key press from being interpreted as a multiple key press .If after 20 ms delay the key is still pressed, it goes to the next stage to detect which row it belongs to ;otherwise it goes back in to the loop to detect a read key press. 3. To detect which row the key press belongs to, it grounds one row at a time reading the column search time .If it finds that all columns are high this means that the key press does not belongs to the row, therefore it grounds the next row and continues until it finds the

row key press belongs to, it sets up the starting address for the look up table holding the scan codes for that row and goes to The next stage to identify the key. 4. To identify the key press, it rotates the column bits one bit at a time in to the carry flag and check to see if it is low. Upon finding the zero, it pulls out the (ASCII code) character for that key from the look up table. Otherwise it increments the pointer to point to the next element of the look up table.

MAX232 FEATURES:
Operates From a Single 5-V Power Supply With 1.0-_F Charge-Pump Capacitors Operates Up To 120 kbit/s Two Drivers and Two Receivers 30-V Input Levels Low Supply Current . . . 8 mA Typical ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) Upgrade With Improved ESD (15-kV HBM) and 0.1-_F Charge-Pump Capacitors is Available With the MAX202 Applications TIA/EIA-232-F, Battery-Powered Systems, Terminals, Modems, and Computers

PIN CONFIGURATION

DESCRIPTION:

The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/EIA-232-F voltage levels from a single 5-V supply. Each receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers have a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept +/-30-V inputs. Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels.

LOGIC DIAGRAM (POSITIVE LOGIC)

MAX232:
The MAX232 is an integrated circuit that converts signals from an RS-232 serial port to signals suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS signals. The drivers provide RS-232 voltage level outputs (approx. 7.5 V) from a single + 5 V supply via on-chip charge pumps and external capacitors. This makes it useful for implementing RS-232 in devices that otherwise do not need any voltages outside the 0 V to + 5 V range, as power supply design does not need to be made more complicated just for driving the RS-232 in this case. The receivers reduce RS-232 inputs (which may be as high as 25 V), to standard 5 V TTL levels. These receivers have a typical threshold of 1.3 V, and a typical hysteresis of 0.5 V. The later MAX232A is backwards compatible with the original MAX232 but may operate at higher baud rates and can use smaller external capacitors 0.1 F in place of the 1.0 F capacitors used with the original device.

RS232:
In telecommunications, RS-232 (Recommended Standard 232) is a standard for serial binary data signals connecting between a DTE (Data Terminal Equipment) and a DCE (Data Circuit-terminating Equipment). It is commonly used in computer serial ports. A charge pump is a kind of DC to DC converter that uses capacitors as energy storage elements to create either a higher or lower voltage power source. Charge pump circuits are capable of high efficiencies, sometimes as high as 90-95% while being electrically simple circuits. Charge pumps use some form of switching device(s) to control the connection of voltages to the capacitor. For instance, to generate a higher voltage, the first stage involves the capacitor being connected across a voltage and charged up. In the second stage, the capacitor is disconnected from the original charging voltage and reconnected with its negative terminal to the original positive charging voltage. Because the capacitor retains the voltage across it (ignoring leakage effects) the positive terminal voltage is added to the original, effectively doubling the voltage. The pulsing nature of the higher voltage output is typically smoothed by the use of an output capacitor. This is the charge pumping action, which typically operates at tens of kilohertz up to several megahertz to minimize the amount of capacitance required. The capacitor used as the charge pump is typically known as the "flying capacitor". AC converter (the switches) followed by a voltage multiplier. Another way to explain the operation of a charge pump is to consider it as the combination of a DC to The voltage is load-dependent; higher loads result in lower average voltages. Charge pumps can double voltages, triple voltages, halve voltages, invert voltages, fractionally multiply or scale voltages such as x3/2, x4/3, x2/3, etc. and generate arbitrary voltages, depending on the controller and circuit topology. The term 'charge pump' is also used in phase-locked loop (PLL) circuits. This is a completely different application. In a PLL the phase difference between the reference signal (often from a crystal oscillator) and the output signal is translated into two signals - UP and DN. The two signals control switches to steer current into or out of a capacitor, causing the voltage across the capacitor to increase or decrease. In each cycle, the time during which the switch

is turned on is proportional to the phase difference, hence the charge delivered is dependent on the phase difference also. The capacitor acts to smooth out abrupt changes on the voltage and to ensure the PLL's closed-loop stability. The voltage on the capacitor is used to tune a voltage-controlled oscillator (VCO), generating the desired output signal frequency. The charge pump in a PLL design is constructed in integrated-circuit (IC) technology, consisting of pull-up, pull-down transistors and on-chip capacitors and resistors.

AT24C08 FEATURES:
Low-voltage and Standard-voltage Operation 2.7 (VCC = 2.7V to 5.5V) 1.8 (VCC = 1.8V to 5.5V)

Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bi-directional Data Transfer Protocol 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes Partial Page Writes are Allowed Self-timed Write Cycle (10 ms max) High-reliability Endurance: 1 Million Write Cycles Data Retention: 100 Years

Automotive Grade and Extended Temperature Devices Available 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages.

DESCRIPTION:
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP, 8-lead

JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.

PIN CONFIGURATION

PIN DESCRIPTION: SERIAL CLOCK (SCL):

The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.

SERIAL DATA (SDA):

The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices.

DEVICE/PAGE ADDRESSES (A2, A1 and A0):

The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system. The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect. The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connects. The AT24C16 does not use the device address pins, which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are no connects.

WRITE PROTECT (WP):

The AT24C01A/02/04/16 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND).

DEVICE OPERATION CLOCK AND DATA TRANSITIONS:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time. Data changes during SCL high periods will indicate a start or stop condition as defined below.

START CONDITION:
A high-to-low transition of SDA with SCL high is a start condition which must precede any other command.

STOP CONDITION:
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode.

ACKNOWLEDGE:
All addresses and data words are serially transmitted to and from the EEPROM in 8bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.

STANDBY MODE:
The AT24C01A/02/04/08/16 features a low-power standby mode which is enabled: (a) upon power-up (b) after the receipt of the STOP bit and the completion of any internal operations.

MEMORY RESET:
After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps: 1. Clock up to 9 cycles. 2. Look for SDA high in each cycle while SCL is high. 3. Create a start condition.

WRITE OPERATIONS: BYTE WRITE:

A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete.

PAGE WRITE:
The 1K/2K EEPROM is capable of an 8-byte page write, and the 4K, 8K and 16K devices are capable of 16-byte page writes. A page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to seven (1K/2K) or fifteen (4K, 8K, 16K) more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a stop condition. The data word address lower three (1K/2K) or four (4K, 8K, 16K) bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than eight (1K/2K) or sixteen (4K, 8K, 16K) data words are transmitted to the EEPROM, the data word address will roll over and previous data will be

overwritten.

ACKNOWLEDGE POLLING:
Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero allowing the read or write sequence to continue.

READ OPERATIONS:
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: current address read, random address read and sequential read.

CURRENT ADDRESS READ:

The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll over during read is from the last byte of the last memory page to the first byte of the first page. The address roll over during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The

microcontroller does not respond with an input zero but does generate a following stop condition.

RANDOM READ:
A random read requires a dummy byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following stop condition.

SEQUENTIAL READ:
Sequential reads are initiated by either a current address read or a random Address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is

reached, the data word address will roll over and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition.

TRANSISTOR AS A SWITCH
Transistor's collector current is proportionally limited by its base current, it can be used as a sort of current-controlled switch. A relatively small flow of electrons sent through the base of the transistor has the ability to exert control over a much larger flow of electrons through the collector. When used as an AC signal amplifier, the transistors Base biasing voltage is applied so that it operates within its "Active" region and the linear part of the output characteristics curves are used. However, both the NPN & PNP type bipolar transistors can be made to operate as an "ON/OFF" type solid state switch for controlling high power devices such as motors, solenoids or lamps. If the circuit uses the Transistor as a Switch, then the biasing is arranged to operate in the output characteristics curves seen previously in the areas known as the "Saturation" and "Cut-off" regions as shown below.

TRANSISTOR CURVES:

The shaded area at the bottom represents the "Cut-off" region. Here the operating conditions of the transistor are zero input base current (Ib), zero output collector current (Ic) and maximum collector voltage (Vce) which results in a large depletion layer and no current flows through the device. The transistor is switched "Fully-OFF". The lighter blue area to the left represents the "Saturation" region. Here the transistor will be biased so that the maximum amount of base current is applied, resulting in maximum collector current flow and minimum collector emitter voltage which results in the depletion layer being as

small as possible and maximum current flows through the device. The transistor is switched "Fully-ON". Then we can summarize this as: Cut-off Region: Both junctions are Reverse-biased, Base current is zero or very Saturation Region: Both junctions are Forward-biased, Base current is high

small resulting in zero Collector current flowing, the device is switched fully "OFF". enough to give a Collector-Emitter voltage of 0v resulting in maximum Collector current flowing, the device is switched fully "ON".

TRANSISTOR SWITCHING CIRCUIT:

An NPN Transistor as a switch being used to operate a relay is given above. With inductive loads such as relays or solenoids a flywheel diode is placed across the load to dissipate the back EMF generated by the inductive load when the transistor switches "OFF" and so protect the transistor from damage. If the load is of a very high current or voltage nature, such as motors, heaters etc, then the load current can be controlled via a suitable relay as shown. The circuit resembles that of the Common Emitter circuit we looked at in the previous tutorials. The difference this time is that to operate the transistor as a switch the transistor needs to be turned either fully "OFF" (Cut-off) or fully "ON" (Saturated). An ideal transistor switch would have an infinite resistance when turned "OFF" resulting in zero current flow and zero resistance when turned "ON", resulting in maximum current flow. In practice when turned "OFF", small leakage currents flow through the transistor and

when fully "ON" the device has a low resistance value causing a small saturation voltage (Vce) across it. In both the Cut-off and Saturation regions the power dissipated by the transistor is at its minimum. To make the Base current flow, the Base input terminal must be made more positive than the Emitter by increasing it above the 0.7 volts needed for a silicon device. By varying the Base-Emitter voltage Vbe, the Base current is altered and which in turn controls the amount of Collector current flowing through the transistor as previously discussed. When maximum Collector current flows the transistor is said to be saturated. The value of the Base resistor determines how much input voltage is required and corresponding Base current to switch the transistor fully "ON". Transistor switches are used for a wide variety of applications such as interfacing large current or high voltage devices like motors, relays or lamps to low voltage digital logic IC's or gates like AND Gates or OR Gates.

ISP PROGRAMMER

In-System Programming (abbreviated ISP) is the ability of some programmable logic devices, microcontrollers, and other programmable electronic chips to be programmed while installed in a complete system, rather than requiring the chip to be programmed prior to installing it into the system. The primary advantage of this feature is that it allows manufacturers of electronic devices to integrate programming and testing into a single production phase, rather than requiring a separate programming stage prior to assembling the system. ISP (In System Programming) will provide a simple and affordable home made solution to program and debug your microcontroller based project. ISP is performed using only 4 lines, and literally, data is transferred through 2 lines only, as in a I2C interface, where data is shifted in bit by bit though MOSI line, with a clock cycle between each bit and the next (on the SCK line). MISO line is used for reading and for code verification; it is only used to output the code from the FLASH memory of the microcontroller. The RST pin is also used to enable the 3 pins (MOSI, MISO and SCK) to be used for ISP simply by setting RST to HIGH (5V), otherwise if RST is low (0V), program start running and those three pins, are used normally as P1.5, P1.6 and P1.7. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK frequency is 2 MHz.

DB-25 Male pin description:

Pin no 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 74LS244:

Name GND TXD RXD RTS CTS DSR GND CD ----STF S.CD S.CTS S.TXD TCK S.RXD RCK LL S.RTS DTR RL RI DSR XCK TI

Direction

Pin Description Shield Ground Transmit Data Receive Data Request to Send Clear to Send Data Set Ready System Ground Carrier Detect Reserved Reserved Select Transmit Channel Secondary Carrier Detect Secondary Clear to Send Secondary Transmit Data Transmission Signal Element Timing Secondary Receive Data Receiver Signal Element Timing Local Loop Control Secondary Request to Send Data terminal Ready Remote Loop Control Ring Indicator Data Signal Rate Selector Transmit Signal Element Timing Test Indicator

The 74LS244 is used to work between PRINT ports to the chips AT89S52. We cannot observe 74LS244 on the PCB which is AT89S52 located. It hid in the joint between PC and 6 transmission lines. The 74LS244 pin configuration, logic diagram, connection and function table is on the below.

AT89S8252 microcontroller features an SPI port, through which on-chip Flash memory and EEPROM may be programmed. To program the microcontroller, RST is held high while commands, addresses and data are applied to the SPI port.

ATMEL ISP FLASH PROGRAMMER:

This is the software that will take the HEX file generated by whatever compiler you are using, and send it - with respect to the very specific ISP transfer protocol - to the microcontroller. This programmer was designed in view of to be flexible, economical and easy to built, the programmer hardware uses the standard TTL series parts and no special components are used. The programmer is interfaced with the PC parallel port and there is no special requirement for the PC parallel port, so the older computers can also be used with this programmer.

SUPPORTED DEVICES:
The programmer software presently supports the following devices AT89C51 AT89C2051 AT89S8252 AT89S51 D87C52 AT89C51RC AT89C1051 AT89C55 UD87C51 AT89S53 AT89C52 AT89C4051 AT89S52 AT89C55WD

Note: For 20 pin devices a simple interface adapter is required. The ISP-3v0.zip file contains the main program and the I/O port driver for Windows 2000 & XP. Place all files in the same folder, for win-95/98 use the "ISPPgm3v0.exe"File, for win-2000 & XP use the "ISP-XP.bat" file. The main screen view of the program is shown in fig below.

Following are the main features of this software: Read and write the Intel Hex file Read signature, lock and fuse bits Clear and Fill memory buffer Verify with memory buffer Reload current Hex file Display buffer checksum

 Program selected lock bits & fuses Auto detection of hardware The memory buffer contains both the code data and the EEPROM data for the devices which have EEPROM memory. The EEPROM memory address in buffer is started after the code memory, so it is necessary the hex file should contains the EEPROM start address after the end of code memory last address. i.e., for 90S2313 the start address for EEPROM memory is 0 x 800. The software does not provide the erase command because this function is performed automatically during device programming. If you are required to erase the controller, first use the clear buffer command then program the controller, this will erase the controller and also set the device to default setting.

CHAPTER 4 IMPLEMENTATION
4.1. FLOW CHART:

4.2.SCHEMATIC:

U V C

L C

C V

C C G C N D 1 2 3 4 5 6 7 8 9

R8 R7 R6 R5 R4 R3 R2 R1

R1 R2 R3 R4 R5 R6 R7 R8

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4.3 TOOLS
CODEVISION AVR
Assembly code is used for one or more of three reasons: speed, compactness or because some functions are easier to do in assembler than in a higher level language. It is well known that using a high level language always results in the faster program development but there are times when, for the reasons stated above, one wants to use assembly language. The Code Vision AVR C Compiler, like other compilers meant for microcontroller development, has an easy interface to assembly language. Assembler code may be imbedded anywhere in a C program.

FEATURES:
Installing and Configuring Code Vision AVR to work with the Atmel STK500 starter kit and AVR Studio debugger. Creating a New Project using the Code Wizard AVR Automatic Program Generator Editing and Compiling the C code Loading the executable code into the target microcontroller on the STK500 starter kit.

INTRODUCTION:
This is an introduction to the user through the preparation of an example C program using the Code Vision AVR C compiler. The example, which is the subject of this application note, is a simple program for the Atmel AT90S8515 microcontroller on the STK500 starter kit.

PREPARATION:
Install the Code Vision AVR C Compiler by executing the file setup.exe. It is assumed that the program was installed in the default directory: C:\cvavr. Install the Atmel AVR Studio debugger by executing the file setup.exe. It is assumed that AVR Studio was installed in the default directory: C:\Program Files\Atmel\AVR Studio. Setup the starter kit (STK500) according to the instructions in the STK500 User Guide. Make sure the power is

off and insert the AT90S8515 chip into the appropriate socket marked SCKT3000D3. Set the XTAL1 jumper. Also set the OSCSEL jumper between pins 1 and 2. Connect one 10 pin ribbon cable between the PORTB and LEDS headers. This will allow displaying the state of AT90S8515s PORTB outputs. Connect one 6 pin ribbon cable between the ISP6PIN and SPROG3 headers. This will allow Code Vision AVR to automatically program the AVR chip after a successful compilation. In order to use this feature, one supplementary setting must be done: Open the Code Vision AVR IDE and select the Settings | Programmer menu option. Make sure to select the Atmel STK500 AVR Chip Programmer Type and the corresponding Communication Port which is used with the STK500 starter kit. Then press the STK500.EXE Directory button in order to specify the location of the stk500.exe command line utility supplied with AVR Studio. Select the c:\Program Files\Atmel\AVR Studio\STK500 directory and press the OK button. Then press once again the OK button in order to save the Programmer Settings. In order to be able to invoke the AVR Studio debugger/simulator from within the Code Vision AVR IDE one final setting must be done. Select the Settings | Debugger menu option.

SHORT REFERENCE: PREPARATIONS:

Install the Code Vision AVR C compiler Install the Atmel AVR Studio debugger Install the Atmel STK500 starter kit Configure the STK500 programmer support in the Code Vision AVR IDE by selecting: Settings->Programmer-> AVR Chip Programmer Type: STK500-> Specify STK500.EXE Directory: C:\Program Files\Atmel\AVR Studio\STK500-> Communication Port Configure the AVR Studio support in the Code Vision AVR IDE by selecting: Settings->Debugger-> Enter: C:\Program Files\Atmel\AVR Studio.

GETTING STARTED:
Create a new project by selecting: File->New->Select Project

 Specify that the Code Wizard AVR will be used for producing the C source and project files: Use the Code Wizard? ->Yes In the Code Wizard AVR window specify the chip type and clock frequency: Chip>Chip: AT90S8515->Clock: 3.86MHz Configure the I/O ports: Ports->Port B- >Data Direction: all Outputs->Output Value: all 1s Configure Timer 1: Timers->Timer1- >Clock Value: 3.594 kHz->Interrupt on: Timer1 Overflow->Val: 0xF8FB Generate the C source, C project and Code Wizard AVR project files by selecting: File | Generate, Save and Exit-> Create new directory: C:\cvavr\led-> Save: led .c ->Save: led.prj->Save: led.cwp Edit the C source code View or Modify the Project Configuration by selecting Project->Configure-> After Make->Program the Chip Compile the program by selecting: Project->Make Automatically program the AT90S8515 chip on the STK500 starter kit: Apply power->Information->Program.

4.4. SCREEN SCHOOTS

CHAPTER -5 RESULTS
The result of the project is that it indicates the accident occurred and it indicates it on the LCD screen at the receiver. For seeing the output in the hardware kit particular steps has to be followed. Mainly as we have two sections. The power supply is given to the kit. When the vehicle i.e. transmitter is running when we press the sensor attached to it then the vehicle stops and through RF communication the signal are sent to the receiver. Then LEDs and buzzers indicate that the accident is occurred and then the information is placed on the LCD screen at the required receiver. Through this project we can assist the people who suffered with accident.

CHAPTER 6 CONCLUSION
The project ACCIDENT ALERTING SYSTEM USING RF has been successfully designed and tested. Integrating features of all the hardware components used are developed it. Presence of every module has been reasoned out and placed carefully thus contributing to the best working of the unit. Finally, using highly advanced ICs and with the help of growing technology the project has been successfully implemented.

FUTURE ASPECTS
Wireless is finding a huge development in Communications. In this project, the PC desktop operation is controlling through RF remote. So that we can perform the mouse operations and as well as some of the operations of the keyboard. For further enhancement we can add some of the keys to the RF remote section to perform the operation of the keyboard in the wireless manner. This project can further be enhanced with the help GSM, Bluetooth and Zigbee etc communication technologies.

BIBLIOGRAPHY
[1] Wireless vehicular Accident Detection and Reporting System, Mechanical and Electrical Technology (ICMET), 2010 2nd International Conference on Issue Date: 10-12 Sept. 2010, on page(s): 636 - 640. [2] An embedded system and RFID solution for transport related issues,This paper appears in: Computer and Automation Engineering (ICCAE), 2010 The 2nd International Conference on ,Issue Date: 26-28 Feb. 2010, Volume: 1, On page(s): 298 - 302. [3] RFID-Technology and Applications (RFID-TA), 2010 IEEE International Conference on Date: 17-19 June 2010 [4] RFID Technology and Applications,This paper appears in: Pervasive Computing, IEEE ,Issue Date: Jan.-March 2006, Volume: 5 Issue: 1 ,On page(s): 22 - 24 [5] Raj Kamal(2000), The Concepts and Features of Microcontrollers (68HC11, 8051 and 8096) includes Programmable Logic Controllers, New Delhi. [6] Cady, Fredick M. (1997), Software and Hardware Engineering-Motorola m68hc11, New York: Oxford University Press.