Electrical Characteristics of PtSi/Porous Si Schottky barrier as a 2-Dimentional Multi Tunneling Junction

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Transactions on Electron Devices TED-2011-07-0755-R Regular 11-Jul-2011 mehrara, hamed; K.N.Toosi University of Technology, Seyyed-Khandan Bridge, Department of Electrical Engineering, Porous Si, PtSi, Schottky barriers, MTJ, SET , SIMON, Coulomb oscillation

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Electrical Characteristics of PtSi/Porous Si Schottky barrier as a 2-Dimentional Multi Tunneling Junction

Hamed Mehrara Department of Electrical Engineering, K.N.Toosi University of Technology, Seyyed-Khandan Bridge, Tehran, Iran

Corresponding author

Hamed Mehrara, Department of Electrical Engineering, K.N.Toosi University of Technology, Seyyed-Khandan Bridge, Tehran, Iran, Tel:+982122941055, h.mehraraa@gmail.com

Abstract: We report a multi tunneling junction characteristics in porous silicon (PS) core coated with platinum shell which has been fabricated on P-silicon substrate obtained by anodic etching in HF-based solutions. Detailed analysis of the electron transport in this structure ,admits the existence of a two-dimensional Multi Tunneling Junction (2D-MTJ) structure clearly originate from the peaks of fabricated platinum silicide (PtSi) on PS as an extension for multi tunneling junction devices using PtSi/Porous Si Schottky barrier. Furthermore, using SIMON simulator, we investigate the electrical characteristics of 2D-MTJ that modeled as a network of islands, to approve experimental data curves. In accordance with both studies, the temperature dependence of the Coulomb oscillation in 2D-MTJs offers higher operation degree as a function of gate voltage without cooling payments in comparison to MTJs. The value of current tends to increase proportionally with temperature and for high drain voltage; the device behaves like a Single Island Single Electron Tunneling (SET) junction. This is probably due to this fact that multiple tunneling junctions are electrically enlarged and merged into a single island owing to the high applied drain voltage.

Keywords: Porous Si; PtSi; Schottky barriers; MTJ; SET; SIMON; Coulomb oscillation

1. Introduction
Silicides are of the great interest as low-cost stable materials for solid-state microelectronics and as radiation detectors. In particular, by incorporating noble metals such as platinum into silicon, the polysilicon interconnect resistance can be reduced up to electrical properties of pure platinum. Platinum silicide (PtSi) is uniform , reliable and easy to fabricate . There is a band bending in Pt and Si energy band diagram and a Schottky barrier is formed which barrier height at the junction is 0.25 eV [1-4]. Regular PtSi Schottky detectors, which use p or n-type Si surface, have been extensively studied and are in common usage in IR detection of 35 m spectral range [5-9], but a few of these studies has evaluated the properties of porousificated Si substrate, specifically about the electron transfer at the surface of these film [10-14].

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As Si pores dimension reaches sub-micron range, electrical properties of annelid silicide at the peak of each pore, is maintained and Porous Si will compose a high density tunneling junctions structure between these pores. One possible model that can suggest for this structure is a multi tunneling junction spreads in two dimensions. Their main advantages in comparison to single-island single electron tunneling junction with identical dimensions of islands and tunneling junctions are a higher threshold voltage of Coulomb blockade and, as a consequence, a higher operation temperature [15-21]. In this work, we are combining PtSi layer with Porous Si which consists of many nanometric silicon residuals and increases Si band gap energy to investigate the electrical characteristics of PtSi/Porous Si Schottky barriers. We firstly describe experimental processes of the device fabrication. Then in simulation section a new simple schematic model of 2D-MTJ with 4-island will be depicted. In continue, using SIMON simulator, we investigate, the electrical characteristics of produced device and finally inspect the temperature dependence of the coulomb oscillation as a function of gate voltage in the temperature range from T = 5 to 70 K for both studies and compare them with nanometric SETs. 2. Experimental Section The starting material was P-type Si (100) with a resistivity in 1733 cm range. After RCA cleaning, electrochemical prosification is accomplished by using an electrolytic cell with 40% HF-C2H5OH-H2O solution with the ratio of 1:2:1 at constant current density of 30 mA/cm2 for 15 minutes. 40 of platinum is then deposited on the porous Si surface, using e-beam evaporation to observe the best conducting transition on thin PtSi lm [22, 23]. The deposited layer was then annealed at 450 C for 30 minutes. It forms a new phase of material at the interface of platinum and Si. Pt reacts with Si, creating a thin platinum silicides layer over the pores 'peak [Fig.1]. Some unreacted Pt remains inside the pores, which is then etched away and finally an array of metal (i.e., platinum silicide) on semiconductor with different band gap energy is constructed. To make contact to the silicide surface, 6 m of molybdenum is deposited on the surface using e-beam evaporation (107 Torr). Passivation layer was provided by 10 m of Sio and Sio2. 6 m of Al is then thermally evaporated on the formed surface followed by 20 minutes of annealing at 200 C. Molybdenum is also used as blocking barrier layer for stopping the diffusion of Al into the underlying substrate. After device fabrication, I-V measurements were made at 77 and 300 K temperature using a HP4145B semiconductor parameter analyzer.

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Al G D Sio2 Sio Mo PtSi

Porous Si

P-substrate

Fig. 1. The cross-sectional structure and SEM of PtSi/Porous Si MTJ and interior used in this study.

AFM profile is taken from PtSi/porous Si sample shown in Figures 2. The curve in the right side of this figure shows the height of the porous nanowires in the Y axis as a function thickness for a side sliced view of the structure .Phase shifting over pores admit existence of metallic PtSi islands on each pore that

forms many potential barriers.

Height

A A B
Phase

Fig. 2. AFM schematic diagram of PtSi/Porous Si MTJ and height profile along the selected line in sample.

3. Simulation Section In PtSi/PS layer, carriers collect on the peak of pores and under a reverse bias, depletion layer of PtSi/Porous Si schottky diode increase. Therefore a network of PtSi islands remain on this layer that can

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interpret as tunneling junctions, transport electrons individually between PtSi islands and the batch of these tunneling barriers play the role of a 2D-MTJ. Here a Square MTJ is modeled as a network of resistors and capacitors to explain the behavior of a finite element 2D-MTJ [Fig. 3]. The number of electrons on each dot is N11, N12, N21 and N22. Each dot is capacitively coupled to gate voltage (Vg) through a capacitor (Cg) and to the source (S) or drain (D) contact through a tunnel junction represented by a resistor R and a capacitor C connected in parallel. We assume dots are coupled to each other by a same tunnel barrier stand for a resistor Rm and a capacitor Cm in parallel. The bias voltage, Vs, is applied to the drain contact with the source contact grounded (asymmetric bias). Suppose cross-capacitances, other voltage sources and stray capacitances are negligible. Using SIMON 2.0 simulator, a same structure for 10x10, 30x30, 50x50 and 70x70 array of islands simulated to investigate the electrical characteristics of PtSi dots on Porous Si structure.

Fig. 3. Network of resistors and capacitors representing Square MTJ.

c
4. Results and discussion 4.1. Bias voltage and polarization Fig. 4. shows the absolute value of drain current Id as a function of the gate voltage Vg for both under study sample at 77K and simulated 10x10 array of tunneling junctions at 5K. We use only one polarization source Vd because we choose the source potential at zero. By increasing gate voltage, depletion layer of PtSi/PS schottky diode extend into Porous Si region and consequently carriers transfer into source is interrupted by tunneling numbers. For a high applied drain voltage, the 2D-MTJ behaves as a single island SET. This is probably because the islands are electrically enlarged and merged into a single island owing to the high applied drain voltage. The height of tunnel barriers is lowered at a high Vd. Owing to the various barrier heights in the devices; the Fermi level of the electrode exceeds the height of one of the tunnel barriers at a certain Vd. Thus, the device effectively behaves as a one-island device. Comparing the IdVgs characteristics of two figures in a. and b. at different Vd, remark us

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ordered increase in PtSi/Ps current value due to its huge number of tunneling elements carried out carriers transform.
8 7 6 5 1.0 x 10- 8
Vd=.05v Vd=.04v Vd=.035v Vd=.03v Vd=.025v

x 10- 6 1.6 1.4 1.2

Vd = -12V Vd = -11.2V Vd = -10.4V Vd = -9.6V Vd = -8.8V Vd = -8V Vd = -7.2V Vd = -6.4V

Id (A)

Id (A) 0.8
3 2 1 0 -1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.6 0.4 0.2 0

Vg (v) (a)

Vg (v) (b)

Fig. 4. The behavior of IdVg characteristic for various drain voltages for (a) simulated 10x10 array of tunneling junctions[T=5k], (b) under study sample [T=77k and negative drain voltage].

4.2 Temperature dependence The IdVg characteristic for 10x10 array of tunneling junctions is presented in Fig. 5.a. We note that, for this array, there are two picks at low temperature, and at higher temperature, smaller peaks disappeared and only one major peak at the same value supply stands [Fig. 5.b]. The temperature depends on Id at the peaks and It is observed that the value of central peak increases with increasing temperature value. For large temperature, our structure tends to a structure with an island.
x 10 -8 2
70k

c
50k 25k 5k

x 10 - 6
Vd = -10.4V

10

1.8 300 K 1.6

Vd = -11.2V Vd = -12V

1.4

Id (A)
1.2

Id (A)
4

1 2 0.8 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 77 K

0 -15

Vgs (v) (a)

-10

-5

Vgs (v) (b)

10

Fig. 5. Coulomb oscillation of (a) simulated 10x10 array of tunneling junctions for Vd =0.03v and different temperatures, (b) Under study sample measured at T=77k and 300K

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4.3. Increasing tunneling junctions Adding the number of junctions in the MTJs is often motivated by the necessity to increase the Coulomb energy of the system and to reduce spontaneous cotunneling events. These events, which are the higher-order processes, are associated with electron tunneling occurring in several junctions simultaneously and quantum-coherently. In order to make these devices more accurate and reliable, the number of series-connected junctions should be increased in two directions. Their main advantages in comparison to single tunneling junctions with identical dimensions of islands are a higher threshold voltage of Coulomb blockade [Fig. 6] and, as a consequence, a higher operation temperature. To make sure that the current increases with elements number in 2D-MTJs, Fig. 7 will be used. It describes the characteristics for large 2D-MTJs to estimate experimental data, respectively, for 10x10, 20x20,30x30, 50x50 and 70x70 island of tunneling junction simulated at T = 5K and Vd=0.03v . Because, the simulation time highly intensified by elements order it couldn't process larger ones. Our simulated result resembles the experimental data at low temperature, but the experimental data is larger than the modeled data with large current value and has less asymmetry. The discrepancy can be resulted from several approximations in our simulations, including that there isn't always same tunneling barriers and capacitance and resistance for each pore pair due to prosification procedure .Also cross-tunneling was not taken into account in the present model.

c
x 10 - 6
Vg= 0V Vg= 2V Vg= 4V Vg= 6V Vg= 8V Vg=10V Vg=12V

x 10 -9

10
Vg= 0.03V Vg=0 .02V

10

Vg= 0.01V Vg=0 .005V

Id (A) 6
4

Id (A)

2 2 0 0
0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

-4

-4.5

-5

-5.5

-6

-6.5

-7

-7.5

-8

Vd (v) (a)

Vd (v) (b)

Fig. 6. IdVd characteristics for (a) Simulated 10x10 array of tunneling junctions [T=5k] (b) under study sample at T=77k.

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-6 x 10 4.5 4 3.5 3 2.5

10x10 20x10 30x30 50x50 70x70

Id (A) 2
1.5 1 0.5 0 0.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Vg (v)

Fig. 7. IdVg characteristics of large element 2D-MTJ, respectively, for 10x10, 20x20,30x30, 50x50 and 70x70 island of tunneling junction simulated at T = 5K, Vd =0.03v .

5. Conclusion Using PtSi on porous Si we fabricated a two-dimensional multi tunneling junction and by applying SIMON simulator, we investigate the electrical characteristics of modeled device and show the temperature dependence of the coulomb oscillation of the 2D-MTJs as a function of gate voltage Vg in the temperature range from T =5 to 70K. In conclusion, current value tends to increase as temperature increases and for a high drain voltage, the 2D-MTJ behaved as a single-island single electron tunneling junction. It follows output I-V characteristics of fabricated device by extending model elements. This approach may be used to provide a simple fabrication method for 2D-MTJs used in memory cell's development. Acknowledgement The authors acknowledge discussions with Dr. M. Malekmohammad from Sharif University of Technology.

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