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SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
O D I S Z A P C *
ADD reg, immed
* * * * *
ADD mem, reg ADD mem, immed ADD reg, mem ADD accum, immed Is this permitted : ADD X, Y ?
SYSC-3006 Pearce,Schramm,Wainer
MOV reg,immed MOV mem, immed MOV mem16, segreg MOV segreg, mem16
Can you explain why we always initialise our data segment with the following sequence ? MOV AX, @data MOV DS, AX
SYSC-3006 Pearce,Schramm,Wainer
Copy src value to dest state variable register and memory operands only (I/O ??)
SYSC-3006 Pearce,Schramm,Wainer
(bitwise add)
iff result = 0 iff msbit of result = 1 (sign = negative) iff carry out of msbit iff result overflowed signed capacity
SYSC-3006 Pearce,Schramm,Wainer
carry?
AL := B3H ( = 1011 0011 B) ZF := 0 result 0 SF := 1 result is negative (signed) CF := 0 (no carry out of msbit) OF := 1 +v + +v = v
SYSC-3006 Pearce,Schramm,Wainer
ZF := 1 SF := 1 CF := 1 OF := 1
Syntax : Semantics :
iff result = 0 iff msbit of result = 1 (sign = negative) iff borrow into msbit iff result overflowed signed capacity
CMP dest, src (Compare) Modifies FLAGS only to reflect dest - src
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
MOV AL, [0000] ADD AL, [0001] ADD AL, [0002] MOV [0010h], AL
DS:0002
14h
AL=10h/30h/44h
SYSC-3006 Pearce,Schramm,Wainer
Problem : Write a program to perform the following operation : z = x + y where x = 55667788h and y = 99669988h Solution: .data x DW 7788h DW 5566h y DW 9988h DW 9966h z DW ? DW ? .code MOV AX, x MOV BX, x+2 ADD AX, y ADD BX, y+2 MOV z, AX MOV z+2, BX END
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
4, BH ????
SYSC-3006 Pearce,Schramm,Wainer
Example :
MOV
AL, [5]
BEWARE : Compare To Immediate Mode!! MOV AL, 5
Example :
MOV
X, AX
Assumes variable declared in data segment Write contents of word at address DS:X
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
Example : MOV BYTE PTR [0FF3E], 1 8 bit destination, no ambiguity MOV WORD PTR [1234h], 0 16-bit destination, no ambiguity
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer
8-bit divisor 8-bit division: DIV src where src = 8-bit operand Semantics: divide 16-bit value in AX into src Integer result AL := AX src (unsigned divide) AH := AX mod src (unsigned modulus) Integer remainder Flags undefined after DIV (values may have changed, no meaning)
SYSC-3006 Pearce,Schramm,Wainer
16-bit division : DIV src where src = 16-bit operand Semantics: divide 32-bit value obtained by concatenating DX and AX (written DX:AX) into src
Integer result AX := DX:AX src (unsigned divide) DX := DX:AX mod src ( unsigned modulus) Integer remainder flags undefined after DIV (values may have changed, no meaning)
Question : In either case, what if the result is too big to fit in destination? eg : AX 1 ?? AL = ?? overflow trap more later!
SYSC-3006 Pearce,Schramm,Wainer
SHL SAL
AL, 1 AL, 1
SYSC-3006 Pearce,Schramm,Wainer
SYSC-3006 Pearce,Schramm,Wainer