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Introductory Assembly Language

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Intel 8086 Instruction Set


Instructions have two components: operation and operands operation: what is being done operands: date to use in the operation Example : C=A+B operations: addition (+) and assignment (=) operands: A , B & C Source operands provide values to use (inputs) In the example : A & B Destination operands: receive results (outputs) In the example : C The same state variable can play multiple roles Example : A = A + A
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Breakdown of Intel 8086 Instructions


1. Data transfer: copy data among variables (registers, memory and I/O ports)

Do not modify FLAGS

2. Data manipulation: modify variable values

Executed within the ALU data path Modify the FLAGS


3. Control-flow: determine next instruction to execute

Allow non-sequential execution

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Intel 8086 Assembly Instructions


Assembly instructions: readable form of machine instructions Mnemonic encoding of instructions in a human-oriented short form Examples MOV (move) SUB (subtract) JMP (jump) Operands; specified in a variety of ways, called addressing modes (later) Instruction encoding (binary value): must account operation and operand information
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Learning how to read a reference manual on assembly instructions


Instructions have restrictions registers, addressing mode Each instruction: permitted operands and the side-effects are given ADD Instruction Formats : ADD reg, reg

O D I S Z A P C *
ADD reg, immed

* * * * *

ADD mem, reg ADD mem, immed ADD reg, mem ADD accum, immed Is this permitted : ADD X, Y ?

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Learning how to read a reference manual on assembly instructions O D I S Z A P C


MOV Instruction Formats : MOV reg, reg MOV mem, reg MOV reg, mem MOV reg16, segreg MOV segreg, reg16

MOV reg,immed MOV mem, immed MOV mem16, segreg MOV segreg, mem16

Can you explain why we always initialise our data segment with the following sequence ? MOV AX, @data MOV DS, AX

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Data Transfer Instruction


MOV (Move) Instruction Syntax: Semantics: MOV dest , src dest := src

Copy src value to dest state variable register and memory operands only (I/O ??)

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Data Manipulation Instructions


Use data to compute new values

Modify variables to hold results Modify flags during on the results


set = 1, clear = 0 iff ==If-and-only-if ZF = zero flag set iff result = 0 CF = carry flag reflect carry value SF = sign flag set iff result < 0 assumes 2s complement encoding! specific use of overflow not the same as the general concept! OF = overflow flag set iff signed overflow What about unsigned overflow ?
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Data Manipulation : ADD


Syntax : Semantics : ADD dest, src dest := dest + src

(bitwise add)

dest is both a source and destination operand FLAGS ZF := 1 SF := 1 CF := 1 OF := 1

iff result = 0 iff msbit of result = 1 (sign = negative) iff carry out of msbit iff result overflowed signed capacity

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Data Manipulation : ADD


Example: AL = 73H, then we execute: ADD AL, 40H 73 H + 40 H = B3H results:

carry?

AL := B3H ( = 1011 0011 B) ZF := 0 result 0 SF := 1 result is negative (signed) CF := 0 (no carry out of msbit) OF := 1 +v + +v = v

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Data Manipulation : SUB and CMP


Syntax : Semantics : SUB dest, src dest := dest - src (bitwise subtract)

ZF := 1 SF := 1 CF := 1 OF := 1
Syntax : Semantics :

iff result = 0 iff msbit of result = 1 (sign = negative) iff borrow into msbit iff result overflowed signed capacity
CMP dest, src (Compare) Modifies FLAGS only to reflect dest - src

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Data Manipulation : Logical Operations


Syntax : Semantics : Example : Example : Example : BOOLEAN_MNEMONIC dest, src dest = dest BOOLEAN_MNEMONIC src AND AL, 80h OR XOR XOR Control, BH AX, AX AH, 0FFh (where BH=02h)

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Programs to do simple arithmetic


Problem : Write a code fragment to add values of memory locations at DS:0000, DS:0001, and DS:0002, and save the result at DS:0010h. Solution: Memory Step 1 AL m[DS:0000] Step 2 AL AL + m[DS:0001] DS:0000 10h Step 3 AL AL + m[DS:0002] DS:0001 20h Step 4 DS:0010h AL
Processor

MOV AL, [0000] ADD AL, [0001] ADD AL, [0002] MOV [0010h], AL

DS:0002

14h

AL=10h/30h/44h

DS:0010h FFh 44h

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Problem : Write a program to perform the following operation : z = x + y where x = 55667788h and y = 99669988h Solution: .data x DW 7788h DW 5566h y DW 9988h DW 9966h z DW ? DW ? .code MOV AX, x MOV BX, x+2 ADD AX, y ADD BX, y+2 MOV z, AX MOV z+2, BX END

1 111 5566 7788 + 9966 9988 EECD 1110

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Intel 8086 Addressing Modes


Operands can be specified in a variety of ways that are called addressing modes Simple modes: register, immediate, direct More powerful: indirect Instruction encoding (as binary value) must account for both aspects of instructions: operation and operand information

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Addressing Mode : (1) Register


Register mode allows a register to be specified as an operand As a source operand: instruction will copy register value As a destination: write value to register Example : MOV AX, DX AX := DX Contents of DX is copied to AX
register addressing mode for both dest and src

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Instruction Syntax : Operand Compatibility


For all instructions with two operands, the two operands must be compatible In high level languages: type checking In assembly: same size Examples : MOV AH, CL MOV AL, CX

8-bit src and dest J ????? L


Example uses register mode, but compatibility is required for all addressing modes to come.

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Addressing Mode : (2) Immediate


Immediate mode: constant specified as source
constant value assembled into the instruction (hard-coded; static value) constant value loaded into IR as part of instruction constant value obtained from IR as instruction executed

Example : MOV AL, 5


AL: 8-bit destination; instruction encoding includes 8-bit value 05h

Example : MOV AX, 5


AX: 16-bit destination; instruction encoding includes 16-bit value 0005h

Question : Is this possible ? MOV

4, BH ????

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Addressing Mode : (3) Direct Memory


Direct memory mode : address offset of a memory variable specified as an operand
constant address offset: encoded as part of the instruction address offset static: must be known at assembly-time. Remains constant through execution (contents of the address may be dynamic) During execution, address offset implicitly combined with DS

Example :

MOV

AL, [5]
BEWARE : Compare To Immediate Mode!! MOV AL, 5

Reads contents of byte at address DS:[0005]

Example :

MOV

X, AX

Assumes variable declared in data segment Write contents of word at address DS:X

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Operand Compatibility with Memory Operands


Clear and unambiguous Examples MOV [BC], AX MOV [1234h], AL Why? REGISTER operand determinates size Ambiguous Examples : MOV [BC], 1 MOV [1234h], 0 Why? Immediate operand could be 8 bits or 16 bits. How does the assembler decide ?

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Operand Compatibility with Memory Operands


Memory Access Qualifiers WORD PTR BYTE PTR word pointer 16-bit operand byte pointer 8-bit operand

Example : MOV BYTE PTR [0FF3E], 1 8 bit destination, no ambiguity MOV WORD PTR [1234h], 0 16-bit destination, no ambiguity

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Assembler Tip About Operand Compatibility


W DW ... MOV AL, W
16-bit memory src operand 8-bit register dest operand

The assembler will generate an error Basic type checking

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Data Manipulation : DIV


Unsigned Integer Division Syntax: DIV src Semantics: integer division: accumulator / src size of divisor (8-bit or 16-bit) determined by size of src src specified using register, direct or indirect mode ( not immediate)
16-bit dividend

Two 8-bit results

8-bit divisor 8-bit division: DIV src where src = 8-bit operand Semantics: divide 16-bit value in AX into src Integer result AL := AX src (unsigned divide) AH := AX mod src (unsigned modulus) Integer remainder Flags undefined after DIV (values may have changed, no meaning)

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Data Manipulation: DIV

32-bit dividend 16-bit divisor

Two 16bit results

16-bit division : DIV src where src = 16-bit operand Semantics: divide 32-bit value obtained by concatenating DX and AX (written DX:AX) into src
Integer result AX := DX:AX src (unsigned divide) DX := DX:AX mod src ( unsigned modulus) Integer remainder flags undefined after DIV (values may have changed, no meaning)

Question : In either case, what if the result is too big to fit in destination? eg : AX 1 ?? AL = ?? overflow trap more later!

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Data Manipulation : Shift


Versions for : Left/Right and Arithmetic/Logical
Logical Shift Right SHR AL, 1
0 b7 ----------------- b0 C

Arithmetic Shift Right MOV SAR CL, 2 AL, CL


b7 ----------------- b0 C

Logical or Arithmetic Shift Left


C b7 ----------------- b0 0

SHL SAL

AL, 1 AL, 1
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Data Manipulation : Rotate


Versions for : Left/Right and with/out carry
Rotate-Carry-Left RCL AL, 1
b7 ----------------- b0 C

Rotate Left MOV CL, 4 ROL AL, CL


b7 ----------------- b0 C

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