ECEN 468 Advanced Logic Design

Lecture 1: Introduction

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Course Overview
Digital system design
o With an emphasis on system-level design o Only hardware

SystemC Verilog VerilogAMS Some component designs

o Bus o UART o Chip I/O

Lab: image processing chip design

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Main References

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Acknowledgement
Prof. Peng Li for suggesting SystemC and Verilog AMS Dr. Welson Sun of Xilinx for extensive discussions and suggestions Feedback from faculties at Computer Engineering and Systems Group Mr. Jae-Yeon Won for tremendous effort on designing the lab

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System/Architecture Level Decisions

Should a function be implemented in hardware, software or an alternative algorithm? Does this function use less power in hardware or software? Do we have enough interconnect bandwidth for our algorithm? What is the minimum precision required for our algorithm to work?

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Design Abstraction Levels

Architecture Behavioral RTL Gates Transistor
SystemC Verilog

Circuit netlist

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Design Complexity Growth

100M

#Lines of Code

1M

Behavioral

Architect

10K

100

Yesterday

Today
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Tomorrow
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Gates

RTL

ESL (Electronic System Level) Design

Design complexity growth Pressure of time-to-market, or design turn-around time Traditionally, system/architecture design is done by a few experts according to ideas and experiences in their minds The ad hoc approach is not scalable with the design complexity

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Examples
A company spent weeks of time to design and verify a function on a chip. Later, it was found this function was not used by the software. Poor architecture level decisions made a company to overdesign a chip. The chip satisfied customers needs, but its design and verification unnecessarily wasted resources and time.

ECEN 468 Lecture 1

Overview of SystemC
User Libraries SystemC Verification Library Other IP

Predefined Primitive Channels: Mutexs, FIFOs, & Signals

SystemC

Simulation Kernel

Threads & Methods Events, Sensitivity & Notifications

Channels & Interfaces Modules & Hierarchy

Data types: Logic, Integers, Fixed Point

C++
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STL
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C++ Class
Concept abstraction Information encapsulation
o Member data o Member function

Constructor/destructor Inheritance Polymorphism

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An Example of C++
class iMeter{ double value; string iName; public: iMeter(const string& nm); void setV(double val); double getVal(); }; iMeter::iMeter(const string& nm):value(0.0){ iName = nm; } void iMeter::setV(double v){ value = v; } double iMeter::getVal(){ return value: } int main(){ iMeter m1(tommy); m1.setV(6.7); cout << m1.getVal(); }

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SystemC Example
#include <systemc> SC_MODULE(Hello) { SC_CTOR(Hello) { SC_THREAD(main_thread); } void main_thread(void) { SC_REPORT_INFO(Hi!); } }; int sc_main(int sc_argc, char* sc_argv[]){ Hello iHello(iHello); sc_start(); return 0; }

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SystemC Compilation Flow

Systemc STL

Systemc.h File1.h File1.cpp Source files

g++

File1.o File2.o Filen.o Object files

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ld

.exe

Compiler

Linker

Executable
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Beyond C++
Time model Hardware data types Hierarchy and structure Communications management Concurrency

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SystemC Simulation
sc_main()

Elaborate

SystemC Simulation Kernel

sc_start()

Initialize

Evaluate Advance time

Cleanup

Update

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