Transmitters and Receivers for Wireless Applications

Fadhel M. Ghannouchi

Communication System Bloc Diagram for Wireless Communication

Transmitter
Info. Source Source Coder Channel Coder Modulator RF Electronics

RFout

Wireless Medium
Destination Source Decoder Channel Decoder Demodulator RF Electronics RFin

Receiver

April 13, 2005

Outline
Transmitters
Transmitters Architectures Solid State Power Amplifier Frequency Generators Examples of Commercial Specifications

Receivers
Receivers Architectures Key Factors Example of Commercial Specifications

April 13, 2005

Transmitters

Transmitters : Introduction
Info. Source Source Coder Channel Coder Modulator RF Electronics RFout

Base-Band Modulation
Digital or analog

Frequency Transposition
From Base-Band to RF One or more stages

Power Amplification
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Provide the required gain and power level Gain control

Transmitters
Transmitters Architectures
Direct Conversion Architecture Double Conversion Architecture Low IF Architecture

Solid State Power Amplifier

Power Amplifier Components Driver Amplifier Output Section : High Power Amplifier Example of Power Amplifier

Frequency Generators
Crystal Oscillator Configuration PLL Configuration

Examples of Commercial Specifications

April 13, 2005

Transmitters
Transmitters Architectures
Direct Conversion Architecture Double Conversion Architecture Low IF Architecture

Solid State Power Amplifier

Power Amplifier Components Driver Amplifier Output Section : High Power Amplifier Example of Power Amplifier

Frequency Generators
Crystal Oscillator Configuration PLL Configuration

Examples of Commercial Specifications

April 13, 2005

Transmitters : Direct Conversion Architecture

IQ Modulator & Up-converter

DAC

LPF
LO

Pwr Cond.

0 90

BPF

VGA

HPA

RF BPF

DAC

LPF

Advantages :
Simple architecture Do not require image rejection filter and fast DAC

Drawbacks :
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Gain an phase imbalance DC offset

Transmitters : Double Conversion Architecture

IQ Modulator

Pwr Cond.
Mixer

DAC

LPF
LO

0 90

IF BPF

VGA

RF BPF 1

HPA

RF BPF 2

DAC

LPF
LO

Advantages :
Low constraints on the image rejection filter Do not require a fast DAC

Drawbacks :
Gain an phase imbalance DC offset Complicated and expensive

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Pwr Cond. I Q
Mixer

Transmitters : Low-IF Architecture

RF BPF 1
HPA

IQ Mod.

DAC

LPF

Amp

RF BPF 2

LO

Advantages :
Good performances : No imbalance, no offset Simple Configurable : suitable for multi-standards

Drawbacks :
Fast DAC High constraints on the image rejection filter
April 13, 2005

Transmitters
Transmitters Architectures
Direct Conversion Architecture Double Conversion Architecture Low IF Architecture

Solid State Power Amplifier

Power Amplifier Components Driver Amplifier Output Section : High Power Amplifier Example of Power Amplifier

Frequency Generators
Crystal Oscillator Configuration PLL Configuration

Examples of Commercial Specifications

April 13, 2005

Low power section

Variable attenuator

Transmitters : Solid State Power Amplifiers

Input Amplifier Variable attenuator Inter-stage Amplifier

RF_in

Isolator

Isolator

Isolator

Isolator

Isolator

Gain control circuit

Output Amplifier RF_out 2nd Harmonic Filter BSF

Driver Amplifier

Isolator

High power section

Biasing Circuit Telemetry Circuit

Power detector April 13, 2005

Transmitters : Power Amplifier Components

Variable Attenuators
Variable attenuators (PIN diodes) and fixed resistive attenuators Current controlled gain Gain adjustment via the control circuit Maintain a constant output power

Input, Inter-Stage and Driver Amplifiers

Provide the required gain for the output section. The input and inter-stage amplifiers : class A The driver amplifiers : class AB or B The isolators avoid the interaction between the adjacent modules

Output Section
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Transmitters : Driver Amplifier

Variable attenuator

Variable attenuator

Polarization circuit

Polarization circuit

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Power amplification 90 Power splitter P1

Transmitters : High Power Amplifier

90 Power combiner

2nd Harmonic Filter

BSF

RF_out

Output isolator P2/ 2 P2 G*P2/ 2

G*P2 P2/ 2 G*P2/ 2

Power detector

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Transmitters : Example of Power Amplifier (HMC408)

Parameters Frequency range Gain Gain variation over tempreture Input return loss Output return loss P1dB Psat IP3 Harmonics 2f0 3f0 Noise figure Supply current Control current Switching speed
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Min. 5.1 17 27 40 0.002 -

Typ. 20 0.045 8 14 30 32.5 43 -50 -90 6 14 50

Max. 5.9 0.055 750 -

Units GHz dB dB/C dB dB dBm dBm dBm dBc dB mA mA ns

Transmitters
Transmitters Architectures
Direct Conversion Architecture Double Conversion Architecture Low IF Architecture

Solid State Power Amplifier

Power Amplifier Components Driver Amplifier Output Section : High Power Amplifier Example of Power Amplifier

Frequency Generators
Crystal Oscillator Configuration PLL Configuration

Examples of Commercial Specifications

April 13, 2005

Transmitters : Frequency Generators

IF signal f1 Mixer f2=f1+fLO RF signal

Applications :
Local oscillators Carrier generators

fLO

Local oscillator

2 Configurations :
Crystal oscillator Phase locked loop oscillator (PLL)

Carrier generator

Modulator

Signal modulator

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Transmitters : Crystal Oscillator Configuration

113.055 MHz 339.166 MHz 1.0175 GHz 2.035 GHz

Crystal oscillator

x3
Bipolar

x3
Bipolar

x2
Bipolar

Coupler/ Detector 8.14 GHz

x4
SDR

ALC
Typical Configuration for an 8 GHz Generator
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Transmitters : Crystal Oscillator Configuration Components

Frequency multipliers
Doublers & triplers : bipolar transistors (< 2GHz), FETs (> 2GHz) High order multipliers : SRD (Step Recovery Diodes)

Band-pass filters
Eliminate harmonics Filtering operation is more difficult with high order multipliers

Automatic Level Control (ALC)

Control the output power level

Low-pass filter
High frequency attenuation
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Transmitters : PLL Configuration

Crystal oscillator xN
fRef

ALC
f0/M f0

f0

f0 = M.fRef
M : division factor f0 : output frequency fRef : reference frequency
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Transmitters
Transmitters Architectures
Direct Conversion Architecture Double Conversion Architecture Low IF Architecture

Solid State Power Amplifier

Power Amplifier Components Driver Amplifier Output Section : High Power Amplifier Example of Power Amplifier

Frequency Generators
Crystal Oscillator Configuration PLL Configuration

Examples of Commercial Specifications

April 13, 2005

Direct Conversion Example : Prism 3 Intersil Transceiver for 2.4 GHz

April 13, 2005

Double Conversion Example : WiFLEX RF Solutions Transceiver for 5 GHz

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Double Conversion Example : Skyworks Transceiver for GSM Applications

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Low IF Example : Micro Linear Transceiver for 2.4 GHz Applications

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Receivers

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Traditional Architecture

Pwr Cond.
Mixer IQ Demodulator

LPF 0 90
LO

ADC

RFin

RF BPF 1

LNA

IF BPF

VGA

LPF
LO

ADC

With a good choice of the LO frequencies, the image filtering after the down-conversion and demodulation can be made easier Analog implementation is less flexible than the digital one Analog demodulation is subject to phase and gain unbalance
April 13, 2005

Receivers : Direct Conversion (Zeros IF) Architecture

Pwr Cond.
IQ Demodulator

LPF 0 90
LO

ADC

RFin

RF BPF 1

LNA

VGA

LPF

ADC

Less analog circuitry than the previous architecture Analog demodulation is subject to phase and gain unbalance

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Receivers : IF Sampling Architecture

RFin

RF BPF 1

Mixer

LNA

IF BPF 70-250 MHz

Amp

ADC

Digital Receiver

I Q

LO

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Receivers : Multimode/Multicarrier IF Sampling Receivers

Digital Receiver
Mixer Ch1

RFin

RF BPF 1

LNA

RF BPF 2

Amp

IF BPF
70-250 MHz

WideBand ADC

Digital Receiver

Ch2

LO

Digital Receiver

Ch n

April 13, 2005

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Components Specifications (1/2)

The Input Band Pass Filter :
This filter, usually in wave guide technology, must have a good selectivity to attenuate the unwanted signals. Its insertion loss should be small to minimize the noise figure of the receiver.

The Low Noise Amplifier (LNA) :

This amplifier must exhibit good noise performances since its Noise Figure (NF) greatly influences the sensitivity of the receiver. The gain of the LNA has to be large enough so that the contribution of the other components (especially the mixer) to the receivers NF is minimized.
April 13, 2005

Receivers : Components Specifications (2/2)

The mixer :
The mixer is used to down-convert the RF signal to an IF signal. Due to its inherent non-linearity, the mixer generates a large number of unwanted spectral components that must be filtered at its output.

The Local Oscillator (LO) :

The LO is reference signal required to down-convert the received signal. The LO frequency must be stable and accurate.

The Variable Gain Amplifier (VGA) :

The VGA greatly contributes to the receivers gain. It should also exhibits a good linearity.
April 13, 2005

This section contains fixed and variables attenuators to compensate for the temperature drifts and to adjust the gain of the receiver.

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Noise Factor

The noise factor is a dimensionless ratio of the input signal-tonoise ratio and the output signal-to-noise ratio :
Si NF = So Ni No

S and N refer to the signal and noise level respectively. The i and o indexes refer to the input and output of the receiver.

Noise temperature (T), expressed in Kelvin, is the conversion of noise factor to an equivalent input temperature that will produce the output noise power. For amplifiers, the noise temperature at the input is defined by :

T = T0 ( NF 1)

NF is the Noise Figure of the amplifier

For passive components, the noise temperature is defined by :

April 13, 2005

T = T0 (Lc 1)

Lc is the loss in the passive component

Receivers : Noise Factor

April 13, 2005

Example : SSB receiver noise and signal cascade (normalized to bn=1Hz).

MDS : Minimum Discernable Signal

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Intermodulation
The in-band two-tone output 3rd Order Intercept Point (3OIP) is a measure of the non-linearity of a component. This particular product is important because it can easily result in an undesired signal that is close to the desired signal, which would be impossible to eliminate by filtering.

April 13, 2005

By definition, the 3OIP is found by injecting 2 equal amplitude signals (F1 and F2) that are not only close to each other in frequency, but are also both within the passband of the component or system. The 3rd order intermodulation products are then given by nFmF where n+m=3.

Receivers : Intermodulation

MSI : Maximum Signal of Interest April 13, 2005

Example : SSB receiver 3OIP and signal

Receivers : Useful Formulas

Amp. 1 Amp. 2 Amp. n-1 Amp. n

G1 IPi,1 NF1

G2 IPi,2 NF2

Gn-1 IPi,n-1 NFn-1

Gn IPi,n NFn

Gain of the cascaded amplifiers :

Gtot = G1 G2 L Gn1 Gn
IP3 of the cascaded amplifiers :
IP 3 tot = 1 G G L G n 1 1 G1 G G + + 1 2 +L + 1 2 IP 3 1 IP 3 2 IP 3 3 IP 3 n

Noise Factor of the cascaded amplifiers :

NFtot = NF + 1
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NFn 1 NF2 1 NF3 1 + + L+ G1 G1G2 G1G2 LGn1

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Sensitivity & Dynamic Range

The sensitivity of a receiver is the smallest power level at its input that leads to a given signal/noise ratio so that the signal can be detected at the receivers output.

The dynamic range of a receiver is defined as the difference between the input power level that produces a 1dB compression in the receivers gain and the lowest input level detectable at the receivers output.

For analog systems, the signal starts to get fuzzy or objectionably noisy at about 10 dB above the noise floor. For digital systems, the allowable bit error rate determines the acceptable margin above the noise floor.
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Receivers : Sensitivity & Dynamic Range

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Example : SSB receiver spur free dynamic range normalized to 6

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Potential For Trouble (1/2)

The electromechanical considerations : Vibrations and mechanical shocks will result in physical relative movement of hardware. Movement, even very small deflections, will result in small changes in circuit performance. These problems are generally addressed by proper mechanical design methods, investigating and eliminating mechanical resonance, and minimizing shock susceptibility.

The optical injection : Semiconductor devices are easily affected by electromagnetic energy in the optical region. Photons impinging on the surface of an active semiconductor create extra carriers, which appear as noise.
April 13, 2005

This is easily countered by proper packaging to prevent light from hitting optically sensitive components.

Receivers : Potential For Trouble (2/2)

The electromagnetic coupling : E-field coupling usually is associated with high impedance circuits, which allow relatively high E-fields to exist. E-field or capacitive coupling can be eliminated or minimized by any grounded metal shielding. M-field coupling is associated with low impedance circuits in which relatively high currents and the associated magnetic fields are present. M-field or magnetic coupling requires a magnetic shielding material.

Proper design, spacing, shielding, and grounding is essential to eliminate coupled energy between circuits.

April 13, 2005

Receivers
Receivers Architectures
Traditional Architecture Direct Conversion (zero IF) Architecture IF Sampling Architecture Outlook : Multimode/Multicarrier IF Sampling Receivers

Key Factors
Components Specifications Noise Factor Intermodulation Sensitivity & Dynamic Range Potential For Trouble

April 13, 2005

Example of Commercial Specifications

Receivers : Example of Commercial Specifications

April 13, 2005

Block diagram of the MAX2323 (maxim)

Receivers : Example of Commercial Specifications

April 13, 2005

DC Electrical Characteristics

Receivers : Example of Commercial Specifications

April 13, 2005

AC Electrical Characteristics

THE END