Surviving the SOC Revolution

A Guide to Platform-Based Design

Henry Chang Larry Cooke Merrill Hunt Grant Martin Andrew McNelly Lee Todd

KLUWER ACADEMIC PUBLISHERS

NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW

Contents

Authors Acknowledgments Preface Chapter 1 Moving to System-on-Chip Design Chapter 2 Overview of the SOC Design Process Chapter 3 Integration Platforms and SOC Design Chapter 4 Function-Architecture Co-Design Chapter 5 Designing Communications Networks Chapter 6 Developing an Integration Platform Chapter 7 Creating Derivative Designs Chapter 8 Analog/Mixed-Signal in SOC Design Chapter 9 Software Design in SOCs Chapter 10 In Conclusion Index

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eBook ISBN: Print ISBN:

0-306-47651-7 0-7923-8679-5

2002 Kluwer Academic Publishers New York, Boston, Dordrecht, London, Moscow Print 1999 Kluwer Academic Publishers Dordrecht All rights reserved No part of this eBook may be reproduced or transmitted in any form or by any means, electronic, mechanical, recording, or otherwise, without written consent from the Publisher Created in the United States of America Visit Kluwer Online at: and Kluwer's eBookstore at: http://kluweronline.com http://ebooks.kluweronline.com

Authors

Henry Chang, Ph.D. is a senior member of consulting staff in Cadence Design Systems Design Methodology Engineering group, and is the chair of the VSI Alliances mixed-signal development working group. Larry Cooke is an independent consultant to the EDA and electronics design industry. Merrill Hunt is a fellow of Cadence Design Systems. Grant Martin is a senior architect in Cadence Design Systems Design Methodology Engineering group. Andrew J. McNelly was a senior director of Solutions Architecture in Cadence Design Systems Strategic Marketing group, and is currently the senior director of Strategic Marketing at Simutech, LLC. Lee Todd was a senior director of Solutions Development in Cadence Design Systems Strategic Marketing group, and is currently the senior director of Business Development and Product Marketing at Simutech, LLC.

Acknowledgments

A collective work of this nature is not possible without a considerable amount of mutual support. For that, we would like to thank and acknowledge each others contribution to the book. The support and encouragement of many other people were also essential for achieving our goal. We would like to acknowledge Steve Glaser, Bob Hon, Patrick Scaglia, Joe Mastroianni, and Alberto Sangiovanni-Vincentelli for their key support. The pivotal roles of Doug Fairbairn, Diana Anderson, and Larry Rosenberg in establishing and growing the VSI Alliance deserve special acknowledgment. Shannon Johnston, Fumiyasu Hirose, Eric Marcad, and Alain Rabaeijs reviewed the material and provided very useful comments and suggestions. A special debt of gratitude is owed to Linda Fogel, our editor, whose relentless pursuit of consistency, clarity, and completeness was critical to pulling the diverse styles and thoughts of all the authors together. This book might never have been finished without her tireless contributions. We would also like to thank Maria Pavlick, Mary Stewart, Gloria Kreitman and Cathereene Huynh for their hard work in getting this volume to production. Cadence Design Systems provided the fertile environment for discussing and exploring the ideas in this book. As the book took shape, the corporate marketing team was instrumental in seeing to the details of layout, graphics, cover design, and handoff to the publisher. Many of the ideas in this book were built after extensive discussions with many different people. In particular, we would like to thank Mike Meyer, Jim Rowson, Rich Owen, Mark Scheitrum, Kent Shimasaki, Sam George, Pat Sheridan, Kurt Jagler, Leif Rosqvist, Jan Rabaey, Dan Jefferies, Bill Salefski, Stan Krolikoski, Paolo Giusto, Sanjay Chakravarty, Christopher Lennard, Jin Shyr, Kumar Venkatramani, Pete Paterson, Tony Kim, Steve Manser, Graham Matthew, and Ted Vucurevich for their part in these discussions. The particular conclusions drawn in this book, of course, are the responsibility of the authors alone. There are many others not specifically named who also con-

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tributed, and to them we would like to extend our thanks. In addition, each author would like to especially acknowledge the following people. Henry Chang would like to pay special thanks to his wife, Pora Park, and to his colleagues on the VSI Alliances mixed-signal development working group. Larry Cooke would like to acknowledge with heartfelt thanks his wife, Diane, and their son, David, for their unwavering support during the long hours of writing. Merrill Hunt would like to acknowledge his wife, Pamela, and children for their support and encouragement. He would also like to acknowledge his appreciation of the many chip designers with whom he has worked and shared successes and failures. Grant Martin would like to pay special thanks to his wife, Margaret Steele, for constant support and encouragement, and to his daughters, Jennifer and Fiona, for their willingness to tolerate his moods as the deadlines approached. Andrew McNelly would like to especially acknowledge the unending support and encouragement of his wife, Merridee, and son, Trent. Lee Todd would like to thank his wife, Linda, for her support and guidance as the process for pulling the book together wore on in the final stages. He would also like to thank the systems designers with whom he has worked, who shaped many of the perspectives in this book. Henry Chang Larry Cooke Merrill R. Hunt Grant Martin Andrew J. McNelly Lee Todd San Jose, California July 1999

Preface

By the year 2002, it is estimated that more information appliances will be sold to consumers than PCs (Business Week, March 1999). This new market includes small, mobile, and ergonomic devices that provide information, entertainment, and communications capabilities to consumer electronics, industrial automation, retail automation, and medical markets. These devices require complex electronic design and system integration, delivered in the short time frames of consumer electronics. The system design challenge of the next decades is the dramatic expansion of this spectrum of diversity. Small, low-power, embedded devices will accelerate as microelectronic mechanical system (MEMS) technology becomes available. Microscopic devices, powered by ambient energy in their environment, will be able to sense numerous fields, position, velocity, and acceleration, and communicate with substantial bandwidth in the near area. Larger, more powerful systems within the infrastructure will be driven by the continued improvements in storage density, memory density, processing capability, and system-area interconnects as single board systems are eclipsed by complete systems on a chip. The overall goal of electronic embedded system design is to balance production costs with development time and cost in view of performance and functionality considerations. Production cost depends mainly on the hardware components of the product. Therefore, to minimize production cost, we must do one of the following: Tailor the hardware architecture to the functionality of the product so that the minimum cost solution is chosen for that particular application, or Determine a common denominator that could be shared across multiple applications to increase production volume. The choice of one policy over the other depends on the cost of the components and on the agreements on costs versus volume in place with the manufacturers of the hardware components (IC manufacturers in primis). It is also rather obvious that the common denominator choice tends to minimize

Preface

development costs as well. The overall trend in industry is in fact to try to use a common hardware platform for a fairly large set of functionalities. As the complexity of the products under design increases, the development efforts increase exponentially. To keep these efforts in check, a design methodology that favors reuse and early error detection is essential. Both reuse and early error detection imply that the design activity must be defined rigorously, so that all phases are clearly identified and appropriate checks are enforced. To be effective, a design methodology that addresses complex systems has to start at high levels of abstraction. In most of the embedded system design companies, designers are familiar with working at levels of abstraction that are too close to implementation so that sharing design components and verifying designs before prototypes are built is nearly impossible. Design reuse is most effective in reducing cost and development time when the components to be shared are close to the final implementation. On the other hand, it is not always possible or desirable to share designs at this level, since minimal variations in specification can result in different, albeit similar, implementations. However, moving higher in abstraction can eliminate the differences among designs, so that the higher level of abstraction can be shared and only a minimal amount of work needs to be carried out to achieve final implementation. The ultimate goal is to create a library of functions and of hardware and software implementations that can be used for all new designs. It is important to have a multilevel library, since it is often the case that the lower levels that are closer to the physical implementation change because of the advances in technology, while the higher levels tend to be stable across product versions. We believe that it is most likely that the preferred approaches to the implementation of complex embedded systems will include the following aspects: Design costs and time are likely to dominate the decision-making process for system designers. Therefore, design reuse in all its shapes and forms will be of paramount importance. Flexibility is essential to be able to map an ever-growing functionality onto an ever-evolving hardware. Designs have to be captured at the highest level of abstraction to be able to exploit all the degrees of freedom that are available. Such a level of abstraction should not make any distinction between hardware and software, since such a distinction is the consequence of a design decision. Next-generation systems will use a few highly complex (Moores Law Limited) part-types, but many more energy-power-cost-efficient, medium-complexity ((10M-100M) gates in 50nm technology) chips, working concurrently to implement solutions to complex sensing, computing, and signaling/actuating problems. Such chips will most likely be developed as an instance of a particular platform. That is, rather than being assembled from a collection of

Preface

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independently developed blocks of silicon functionality, they will be derived from a specific family of micro-architectures, possibly oriented toward a particular class of problems, that can be modified (extended or reduced) by the system developer. These platforms will be extended mostly through the use of large blocks of functionality (for example, in the form of co-processors), but they will also likely support extensibility in the memory/communication architecture as well. These platforms will be highly programmable. Both system and software reuse impose a design methodology that has to leverage existing implementations available at all levels of abstraction. This implies that pre-existing components should be assembled with little or no effort. This book deals with the basic principles of a design methodology that addresses the concerns expressed above. The platform concept is carried throughout the book as a unifying theme to reuse. This is the first book that deals with the platform-based approach to the design of embedded systems and is a stepping stone for anyone who is interested in the real issues facing the design of complex systems-on-chip.

Alberto Sangiovanni-Vincentelli Chief Technical Advisor Cadence Design Systems, Inc. Rome June 1999