Laptop Shema

W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQ-C
Preface
Notebook Computer W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C/ W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQ-C Service Manual

Preface
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 2.0 March 2011
Preface
Trademarks
Intel and Intel Core are trademarks of Intel Corporation. Windows is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and /or registered trademarks of their respective companies.
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Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the W250HU/ W250HUQ/W251HUQ-C/W252HUM/W252HUM-C/W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQC series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system.
Preface
Appendix A, Part Lists Appendix B, Schematic Diagrams Appendix C, Updating the FLASH ROM BIOS
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Preface
IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 3.42A or 18.5V, 3.5A (65W) minimum AC/DC Adapter.
Preface
CAUTION
This Computers Optical Device is a Laser Class 1 Product
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: This device may not cause harmful interference. This device must accept any interference received, including interference that may cause undesired operation.
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Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Dont drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer to any shock or vibration. Do not place it on an unstable surface. Do not place anything heavy on the computer.
2.
Keep it dry, and dont overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive heat or direct sunlight. Do not leave it in a place where foreign matter or moisture may affect the system. Dont use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents.
Preface
3.
Follow the proper working procedures for the computer. Shut the computer down properly and dont forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer.
Preface
4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices.
Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices.
Preface
Power Safety
The computer has specific power requirements:
Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord.
Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on.
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Preface
Battery Precautions
Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. Recharge the batteries using the notebooks system. Incorrect recharging may make the battery explode. Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. Keep the battery away from metal appliances. Affix tape to the battery contacts before disposing of the battery. Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have. If you do not use the battery for an extended period, then remove the battery from the computer for storage. Before removing the battery for storage charge it to 60% - 70%. Check stored batteries at least every 3 months and charge them to 60% - 70%.
Preface
Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturers instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
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Preface
Related Documents
You may also need to consult the following manual for additional information: Users Manual on CD/DVD This describes the notebook PCs features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. 2. 3. 4. Remove all packing materials. Place the computer on a stable surface. Insert the battery and make sure it is locked in position. Securely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports. 5. Attach the AC/DC adapter to the DC-In jack at the rear of the computer, then plug the AC power cord into an outlet, and connect the AC power cord to the AC/DC adapter. 6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not exceed 130 degrees); use the other hand (as illustrated in Figure 1) to support the base of the computer (Note: Never lift the computer by the lid/LCD). 7. Press the power button to turn the computer on.
Preface
Shut Down Note that you should always shut your computer down by choosing Shut Down from the Start Menu. This will help prevent hard disk or system problems.
130
Figure 1
Opening the Lid/LCD/ Computer with AC/DC Adapter Plugged-In
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Preface
Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1 Specifications ..................................................................................1-2 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right Side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 Combo ............................................................................................ A-6 DVD ............................................................................................... A-7 LCD (W25X HUQ) ....................................................................... A-8 LCD (W25X HUM) ....................................................................... A-9
Schematic Diagrams................................. B-1

System Block Diagram ...................................................................B-2 CPU 1/7 (DMI, PEG, FDI) .............................................................B-3 CPU 2/7 (CLK, MISC, JTAG) .......................................................B-4 CPU 3/7 (DDR3) ............................................................................B-5 CPU 4/7 (Power) .............................................................................B-6 CPU 5/7 (Graphics Power) .............................................................B-7 CPU 6/7 (GND) ..............................................................................B-8 CPU 7/7 (RESERVED) ..................................................................B-9 DDR3 SO-DIMM_0 .....................................................................B-10 DDR3 SO-DIMM_1 .....................................................................B-11 LVDS, Inverter .............................................................................B-12 HDMI, CRT ..................................................................................B-13 CougarPoint - M 1/9 .....................................................................B-14 CougarPoint - M 2/9 .....................................................................B-15 CougarPoint - M 3/9 .....................................................................B-16 CougarPoint - M 4/9 .....................................................................B-17 CougarPoint - M 5/9 .....................................................................B-18 CougarPoint - M 6/9 .....................................................................B-19 CougarPoint - M 7/9 .....................................................................B-20 CougarPoint - M 8/9 .....................................................................B-21 CougarPoint - M 9/9 .....................................................................B-22 New Card, Mini PCIE ...................................................................B-23 CCD, 3G, TPM .............................................................................B-24 Card Reader/LAN JMC251C .......................................................B-25 LAN (JMC251C), SATA HDD, ODD .........................................B-26 IX
Disassembly ...............................................2-1
Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Removing the Optical (CD/DVD) Device ......................................2-8 Removing the System Memory (RAM) ..........................................2-9 Removing and Installing a Processor ............................................2-11 Removing the Wireless LAN Module ...........................................2-14 Removing the Keyboard ................................................................2-15
Preface
Part Lists ..................................................A-1

Part List Illustration Location ........................................................ A-2 Top (W251HU/W252HU/W255HU SERIES) ............................... A-3 Top (W258HU SERIES) ................................................................ A-4 Bottom ............................................................................................ A-5
Preface USB 3.0 NEC, USB Charger ....................................................... B-27 KBC-ITE IT8518 ......................................................................... B-28 LED, MDC, BT ............................................................................ B-29 Audio Codec ALC269 .................................................................. B-30 USB, Fan, TP, Multi-Conn ........................................................... B-31 5VS, 3VS, 1.05VS, 1.5VS_CPU .................................................. B-32 VDD3, VDD5 ............................................................................... B-33 Power 1.5V/0.75V/1.8VS ............................................................. B-34 Power 1.05VS ............................................................................... B-35 Power 0.85VS ............................................................................... B-36 Power V-Core1 ............................................................................. B-37 Power V-Core2 ............................................................................. B-38 Charger, DC In ............................................................................. B-39 Click Board .................................................................................. B-40 Audio Board/USB ........................................................................ B-41 Power Switch & LID Board ......................................................... B-42 External ODD Board .................................................................... B-43 Power Sequence ........................................................................... B-44
Preface
Updating the FLASH ROM BIOS......... C-1

To update the FLASH ROM BIOS you must: C-1 Download the BIOS ....................................................................... C-1 Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive ................................................................................................ C-1 Set the computer to boot from the external drive ........................... C-1 Use the flash tools to update the BIOS .......................................... C-2 Restart the computer (booting from the HDD) .............................. C-2
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W250HU/W250HUQ/W251HUQ-C/ W252HUM/W252HUM-C/W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQ-C series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the Users Manual. Information about dri-vers (e.g. VGA & audio) is also found in the Users Manual. The manual is shipped with the computer. Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application softwares (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals.
1.Introduction
The W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C/W255HU/W255HU-C/W255HUM/W255HUMC/W258HUQ-C series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated by the symbol. The balance of this chapter reviews the computers technical specifications and features.
Overview 1 - 1
Introduction
Specifications
Latest Specification Information The specifications listed here are correct at the time of sending them to the press. Certain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center for more details.
Processor Options
Intel Core i7 Processor i7-2620M (2.70GHz) 4MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Intel Core i5 Processor i5-2540M (2.60GHz), i5-2520M (2.50GHz), i5-2410M (2.30GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Intel Core i3 Processor i3-2310M (2.10GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W
Storage
(Factory Option) One Changeable 12.7mm(h) Optical Device Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive Module) One Changeable 2.5" 9.5 mm (h) SATA HDD
Audio
High Definition Audio Compliant Interface 2 * Built-In Speakers Built-In Microphone
Communication
Built-In Gigabit Ethernet LAN (Factory Option) 300K/1.3M Pixel USB PC Camera Module (Factory Option) 3.75G/HSPA Mini-Card Module
Core Logic
1.Introduction
Intel HM65 Chipset
LCD
CPU The CPU is not a user serviceable part. Accessing the CPU in any way may violate your warranty.
WLAN/ Bluetooth Half Mini-Card Modules:

(Factory Option) Intel Centrino Wireless-N 100 (802.11b/ g/n) (Factory Option) Intel Centrino Wireless-N 130 Wireless LAN (802.11b/g/n) + Bluetooth 3.0 (Factory Option) Intel Centrino Wireless-N 1030 Wireless LAN (802.11b/g/n) + Bluetooth 3.0 (Factory Option) Third-Party Wireless LAN (802.11b/g/n) (Factory Option) Third-Party Wireless LAN (802.11b/g/n) + Bluetooth 3.0
15.6" (39.62cm) HD/HD+ TFT LCD
Memory
Two 204 Pin SO-DIMM Sockets Supporting DDR3 1066/ 1333MHz Memory Memory Expandable up to 8GB
Video Adapter
Intel HM65 Integrated Video Shared Memory Architecture of up to 1748MB MS DirectX 10 compatible
Keyboard
Full-size WinKey keyboard (with numeric keypad)
BIOS
One 32Mb SPI Flash ROM AMI BIOS
Pointing Device
Built-in Touchpad
Security
Security (Kensington Type) Lock Slot BIOS Password
Mini Card Slots

Slot 1 for WLAN Module or Combo WLAN and Bluetooth Module (Factory Option) Slot 2 for 3.75G/HSPA Module
1 - 2 Specifications
Introduction
Interface
Three USB 2.0 Ports One HDMI-Out Port One Headphone-Out Jack One Microphone-In Jack One RJ-45 LAN Jack One DC-in Jack One External Monitor Port
Dimensions & Weight

374mm (w) * 250mm (d) * 14.3 - 34.1mm (h) 2.3 kg (with 48.84WH Battery and ODD) Or 374mm (w) * 250mm (d) * 14.3 - 35.3mm (h) 2.3 kg (with 48.84WH Battery and ODD)
Card Reader
Embedded Multi-In-1 Card Reader MMC (MultiMedia Card) / RS MMC SD (Secure Digital) / Mini SD / SDHC/ SDXC MS (Memory Stick) / MS Pro / MS Duo
1.Introduction
Power
6 Cell Smart Lithium-Ion Battery Pack, 48.84WH (Factory Option) 6 Cell Smart Lithium-Ion Battery Pack, 62.16WH (Factory Option) 4 Cell Smart Lithium-Ion Battery Pack, 32.56WH Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 3.42A or 18.5V, 3.5A (65W) Energy Star 5.0 Compliant
Environmental Spec
Temperature Operating: 5C - 35C Non-Operating: -20C - 60C Relative Humidity Operating: 20% - 80% Non-Operating: 10% - 90%
Specifications 1 - 3
Introduction Figure 1
Top View 1. PC Camera (Optional) 2. LCD 3. Power Button 4. LED Status Indicators 5. Keyboard 6. Built-In Microphone 7. Touchpad & Buttons 1
External Locator - Top View with LCD Panel Open
1.Introduction
15.6 (39.62cm)
6 7
1 - 4 External Locator - Top View with LCD Panel Open
Introduction
External Locator - Front & Right Side Views
Figure 2
Front View 1. LED Power Indicator
FRONT VIEW
1.Introduction
Figure 3
Right Side View RIGHT SIDE VIEW 1. Microphone-In Jack 2. Headphone-Out Jack 3. USB 2.0 Port 4. Optical Device Drive Bay 5. Emergency Eject Hole
External Locator - Front & Right Side Views 1 - 5
Introduction
External Locator - Left Side & Rear View

Figure 4
Left Side View 1. DC-In Jack 2. External Monitor Port 3. RJ-45 LAN Jack 4. HDMI-Out Port 5. USB 2.0 Port 6. Vent 7. USB 2.0 Port 8. Multi-in-1 Card Reader
/
LEFT SIDE VIEW
2 1
5 6
1.Introduction
Figure 5
Rear View 1. Security Lock Slot 2. Battery 1
REAR VIEW
1 - 6 External Locator - Left Side & Rear View
Introduction
External Locator - Bottom View

Figure 6
Bottom View 1 1. Battery 2. Component Bay Cover 3. Vent 4. Hard Disk Bay Cover 5. Speakers 6. USIM Card Cover
1.Introduction
2 6
Overheating To prevent your computer from overheating, make sure nothing blocks any vent while the computer is in use.
External Locator - Bottom View 1 - 7
Mainboard Top Key Parts 1. KBC-ITE IT8518 2. Audio Codec ALC269
Mainboard Overview - Top (Key Parts)
1.Introduction
1 2
1 - 8 Mainboard Overview - Top (Key Parts)
Introduction
Mainboard Overview - Bottom (Key Parts)
Figure 8
Mainboard Bottom Key Parts 1. Memory Slots DDR3 SO-DIMM 2. CPU Socket (no CPU installed) 3. Platform Controller Hub 4. Mini-Card Connector (WLAN Module)
1.Introduction
2 1
Mainboard Overview - Bottom (Key Parts) 1 - 9
Mainboard Top Connectors 1. 2. 3. 4. HDMI-Out Port USB Port 2.0 USB 2.0 Port Speaker Cable Connector 5. Microphone Cable Connector 6. Audio Board Connector 7. TouchPad Cable Connector 1 8. TouchPad Cable Connector 2 9. Keyboard Cable Connector 10. Switch Board Cable Connector
Mainboard Overview - Top (Connectors)
10
1.Introduction
1 2
5 7 3
1 - 10 Mainboard Overview - Top (Connectors)
Introduction
Mainboard Overview - Bottom (Connectors)

9
Figure 10
Mainboard Bottom Connectors 1. Battery Connector 2. ODD Connector 3. HDD Connector 4. CMOS Battery Connector 5. CPU Fan Cable Connector 6. Multi-in-1 Card Reader 7. RJ-45 LAN Jack 8. External Monitor Port 9. DC-In Jack 10. CCD Cable Connector 11. LCD Cable Connector
11 1
10
1.Introduction
Mainboard Overview - Bottom (Connectors) 1 - 11
Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W250HU/W250HUQ/W251HUQ-C/W252HUM/ W252HUM-C/W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQ-C series notebooks parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the Users Manual but are repeated here for your convenience. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar.
2.Disassembly
Information
Warning
Overview 2 - 1
Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start.
Pressure sockets for multi-wire connectors
Pressure sockets for ribbon connectors
Board-to-board or multi-pin sockets
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions.
Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on.
2.Disassembly
6. Peripherals Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:

1. Remove the battery page 2 - 5 page 2 - 5 page 2 - 6 page 2 - 5 page 2 - 8 page 2 - 5 page 2 - 9 page 2 - 5 page 2 - 11 page 2 - 13 page 2 - 5 page 2 - 14 page 2 - 5 page 2 - 15
To remove the HDD:

1. Remove the battery 2. Remove the HDD
2.Disassembly
To remove the Optical Device:

1. Remove the battery 2. Remove the Optical device
To remove the System Memory:

1. Remove the battery 2. Remove the system memory 1. Remove the battery 2. Remove the processor 3. Install the processor 1. Remove the battery 2. Remove the WLAN module
To remove and install a Processor:
To remove the Wireless LAN Module:
To remove the Keyboard:

1. Remove the battery 2. Remove the keyboard
2 - 4 Disassembly Steps
Disassembly
Removing the Battery

1. 2. 3. 4. Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow (Figure 1a). Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). 3 Slide the battery 6 in the direction of the arrow 4 (Figure 1b).
Figure 1
Battery Removal
a. Slide the latch and hold it in place. b. Slide the battery in the direction of the arrow.
a. 2 1
b. 3
2.Disassembly
3. Battery
Removing the Battery 2 - 5
Disassembly
Removing the Hard Disk Drive

Figure 2
HDD Assembly Removal
a. Locate the HDD bay cover and remove the screws.
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating systems installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the Users Manual) when setting up a new hard disk.
Hard Disk Upgrade Process

1. Turn off the computer, and remove the battery (page 2 - 5). 2. Locate the hard disk bay cover and remove screws 1 & 2 (Figure 2a).
2.Disassembly
a.
HDD System Warning New HDDs are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium.
2 Screws
2 - 6 Removing the Hard Disk Drive
Disassembly
3. 4. 5. 6. 7.
3 Remove the hard disk bay cover 6 (Figure 3b). Grip the tab and slide the hard disk in the direction of arrow 4 (Figure 3c). 5 Lift the hard disk assembly 6 out of the bay 6 (Figure 3d). Remove the screw 7 - 10 and the mylar cover 11 from the hard disk 12 (Figure 3e). Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
Figure 3
HDD Assembly Removal (contd.)
b. Remove the HDD bay cover. c. Grip the tab and slide the HDD assembly in the direction of the arrow. d. Lift the HDD assembly out of the bay. e. Remove the screws and mylar cover.
b.
d.
2.Disassembly
55
c.
e.
7 8
10
9
3. HDD Bay Cover 5. HDD Assembly 11. Mylar Cover 12. HDD
44 12
11
4 Screws
Removing the Hard Disk Drive 2 - 7
Disassembly Figure 4
Optical Device Removal
a. Remove the screw at point 1 . b. Use a screwdriver to carefully push out the optical device at point 2 .
Removing the Optical (CD/DVD) Device

1. 2. 3. 4. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6). Remove the screw at point 1 (Figure 4a). Use a screwdriver to carefully push out the optical device 3 at point 2 (Figure 4b). Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The screw holes should line up). 5. Restart the computer to allow it to automatically detect the new device. a. b.
2.Disassembly
3. Optical Device
1 Screw
2 - 8 Removing the Optical (CD/DVD) Device
Disassembly
Removing the System Memory (RAM)

The computer has two memory sockets for 204 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting DDRIII (DDR3) Up to 1066/1333 MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn on your computer.
Figure 5
RAM Module Removal
a. Remove the screws from the component bay cover. b. The RAM modules will be visible at point 5 on the mainboard. c. Pull the release latches. d. Remove the module.
Memory Upgrade Process

1. 2. 3. 4. a. 1 2 Turn off the computer, turn it over and remove the battery (page 2 - 5). Remove screws 1 - 4 from the component bay cover (Figure 5a). The RAM modules will be visible at point 5 on the mainboard (Figure 5b). Gently pull the two release latches ( 6 & 7 ) on the sides of the memory socket in the direction indicated by the arrows (Figure 5c). The RAM module 8 will pop-up (Figure 5d), and you can then remove it. c. 6 d.
2.Disassembly
Contact Warning Be careful not to touch the metal pins on the modules connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the modules performance.
3 4 b. 8
8. RAM Module
4 Screws
Removing the System Memory (RAM) 2 - 9
Disassembly
5. Pull the latches to release the second module if necessary. 6. Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot. 7. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE IT; it should fit without much pressure. 8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 9. Replace the component bay cover and the screws (see page 2 - 9). 10. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2.Disassembly
2 - 10 Removing the System Memory (RAM)
Disassembly
Removing and Installing a Processor

Processor Removal Procedure
1. 2. 3. 4. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8). The CPU heat sink will be visible at point A (Figure 6a). Loosen the CPU heat sink screws in the order 3 , 2 & 1 (the reverse order as indicated on the label Figure 6a). Grip the heat sink tab and carefully lift the heat sink 4 up and off the computer (Figure 6b). a.
Figure 6
Processor Removal
a. The CPU heat sink will be visible at point A . Remove the screws from the CPU heatsink. b. Grip the heat sink tab and carefully lift the heat sink up and off the computer.
3 A 1 2
2.Disassembly
b.
4. Heat Sink
3 Screws
Removing and Installing a Processor 2 - 11
Disassembly
5. 6. 7. 8. Turn the release latch 5 towards the unlock symbol to release the CPU (Figure 7d). Carefully (it may be hot) lift the CPU 6 up and out of the socket (Figure 7e). Reverse the process to install a new CPU. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). c.
Figure 7
Processor Removal (contd)
c. Turn the release latch to unlock the CPU. d. Lift the CPU out of the socket.
2.Disassembly
Unlock d.
Lock
Caution
6. CPU
The heat sink, and CPU area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts.
2 - 12 Removing and Installing a Processor
Disassembly
Processor Installation Procedure

1. Insert the CPU (Figure 8a), pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and turn the release latch B towards the lock symbol (Figure 8b). 2. Remove the sticker C (Figure 8c) from the heat sink. 3. Insert the heat sink D as indicated in Figure 8d. 4. Tighten the CPU heat sink screws in the order 1 , 2 & 3 (the order as indicated on the label and Figure 8d). 5. Replace the component bay cover (dont forget to replace the fan cable) and tighten the screws (page 2 - 9).
A
Figure 8
Processor Installation
a. Insert the CPU. b. Turn the release latch towards the lock symbol. c. Remove the sticker from the heat sink and insert the heat sink. d. Tighten the screws.
a. A
c.
2.Disassembly
b.
d. D 3 B 1 2
Note: Tighten the screws in the order as indicated on the label.
A. CPU D. Heat Sink
3 Screws
Removing and Installing a Processor 2 - 13
Disassembly Figure 9
Wireless LAN Module Removal
a. Locate the WLAN. b. Disconnect the cable and remove the screw. c. The WLAN module will pop up. d. Remove the Wireless LAN module.
Removing the Wireless LAN Module

1. 2. 3. 4. a. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9). The Wireless LAN module will be visible at point 1 on the mainboard (Figure 9a). Carefully disconnect the cable 2 , and then remove the screw 3 (Figure 9b). The Wireless LAN module 4 (Figure 9c) will pop-up, and you can remove it from the computer (Figure 9d). c.
2.Disassembly
Note: Make sure you reconnect the antenna cable to the 1 + 2 socket (Figure 9b).
1
b. 3 2
d.
4.Wireless LAN Module
1 Screw
2 - 14 Removing the Wireless LAN Module
Disassembly
Removing the Keyboard

1. Turn off the computer, and remove the battery (page 2 - 5). 2. Remove screws 1 - 4 from the bottom of the computer. Press at points 5 to unsnap the LED cover module 6 (you may need to use the Eject Pin Tool to do this (Figure 10a). 3. Remove the LED cover module 6 and screws 7 - 11 from the keyboard (Figure 10b). 4. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable 12 . Disconnect the keyboard ribbon cable 12 from the locking collar socket 13 (Figure 10c) 5. Carefully lift up the keyboard 14 (Figure 10d) off the computer. a. c. 1 2 5 3 5 4
12 13
Figure 10
Keyboard Removal
a. Remove screws from the bottom of the computer. Press at points 5 to unsnap the LED cover module. b. Remove the LED cover module and screws from the keyboard. c. Carefully lift the keyboard up and disconnect the keyboard ribbon cable from the locking collar socket. d. Remove the keyboard.
2.Disassembly
b. 7 8 9
10 11
d.
Re-Inserting the Keyboard When re-inserting the keyboard firstly align the four keyboard tabs at the bottom (Figure 10c) at the bottom of the keyboard with the slots in the case.
14 6
6. LED Cover Module 14. Keyboard
Keyboard Tabs
9 Screws
Removing the Keyboard 2 - 15
Disassembly
2.Disassembly
2 - 16
Appendix A:Part Lists

This appendix breaks down the W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C/W255HU/W255HUC/W255HUM/W255HUM-C/W258HUQ-C series notebooks construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturers part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used.
A.Part Lists
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration. Table A - 1
Part List Illustration Location
Part W251HUQ-C/W252HUM/ W252HUM-C/W255HU/ W255HU-C/W255HUM/ W255HUM-C W258HUQ-C
Top Bottom Combo
page A - 3 page A - 5 page A - 6 page A - 7 page A - 8 page A - 9
page A - 4
A.Part Lists
DVD Dual Drive LCD (W25XHUQ) LCD (W25XHUM)
A - 2
Top (W251HU/W252HU/W255HU SERIES)
Figure A - 1
Top (W251HU/ W252HU/W255HU SERIES)
A.Part Lists
Top (W251HU/W252HU/W255HU SERIES) A - 3
Top (W258HU SERIES)
A.Part Lists
Figure A - 1
Top (W258HU SERIES)
A - 4 Top (W258HU SERIES)
Bottom
Figure A - 2
Bottom
A.Part Lists
Bottom A - 5
Combo
A.Part Lists
Figure 3
Combo
A - 6 Combo
DVD
Figure A - 4
DVD
A.Part Lists
DVD A - 7
LCD (W25X HUQ)
Figure A - 5
A.Part Lists
LCD (W25X HUQ)
A - 8 LCD (W25X HUQ)
LCD (W25X HUM)
Figure A - 6
LCD (W25X HUM)
A.Part Lists
LCD (W25X HUM) A - 9
A.Part Lists
A - 10
Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C/W255HU/ W255HU-C/W255HUM/W255HUM-C/W258HUQ-C notebooks PCBs. The following table indicates where to find the appropriate schematic diagram.
Diagram - Page
System Block Diagram - Page B - 2 CPU 1/7 (DMI, PEG, FDI) - Page B - 3 CPU 2/7 (CLK, MISC, JTAG) - Page B - 4 CPU 3/7 (DDR3) - Page B - 5 CPU 4/7 (Power) - Page B - 6 CPU 5/7 (Graphics Power) - Page B - 7 CPU 6/7 (GND) - Page B - 8 CPU 7/7 (RESERVED) - Page B - 9 DDR3 SO-DIMM_0 - Page B - 10 DDR3 SO-DIMM_1 - Page B - 11 LVDS, Inverter - Page B - 12 HDMI, CRT - Page B - 13 CougarPoint - M 1/9 - Page B - 14 CougarPoint - M 2/9 - Page B - 15 CougarPoint - M 3/9 - Page B - 16 CougarPoint - M 4/9 - Page B - 17 CougarPoint - M 5/9 - Page B - 18
Diagram - Page
CougarPoint - M 6/9 - Page B - 19 CougarPoint - M 7/9 - Page B - 20 CougarPoint - M 8/9 - Page B - 21 CougarPoint - M 9/9 - Page B - 22 New Card, Mini PCIE - Page B - 23 CCD, 3G, TPM - Page B - 24 Card Reader/LAN JMC251C - Page B - 25 LAN (JMC251C), SATA HDD, ODD - Page B - 26 USB 3.0 NEC, USB Charger - Page B - 27 KBC-ITE IT8518 - Page B - 28 LED, MDC, BT - Page B - 29 Audio Codec ALC269 - Page B - 30 USB, Fan, TP, Multi-Conn - Page B - 31 5VS, 3VS, 1.05VS, 1.5VS_CPU - Page B - 32 VDD3, VDD5 - Page B - 33 Power 1.5V/0.75V/1.8VS - Page B - 34 Power 1.05VS - Page B - 35
Diagram - Page
Power 0.85VS - Page B - 36 Power V-Core1 - Page B - 37 Power V-Core2 - Page B - 38 Charger, DC In - Page B - 39 Click Board - Page B - 40 Audio Board/USB - Page B - 41 Power Switch & LID Board - Page B - 42 External ODD Board - Page B - 43 Power Sequence - Page B - 44
Table B - 1
SCHEMATIC DIAGRAMS
B.Schematic Diagrams
Version Note The schematic diagrams in this chapter are based upon version 6-7P-W24H5-002. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required).
B - 1
Schematic Diagrams
System Block Diagram

CLICK BOARD
6 -7 1- W2 40 2-D 01
AUDIO BOARD
U SB +E AR PH ONE +E XT .M IC 6 -7 1- C4 50 8-D 03
Huron River System Block Diagram

Sandy Bridge
37.5*37.5 mm Memory Termination 800/1067 MHz DDR3 / 1.5V DDR3 SO-DIMM0 SYSTEM SMBUS
0 .1 "~1 3
VDD3,VDD5 5V,3V,5VS,3VS,1.5VS, 1.5VS_CPU 1.5V,0.75VS(VTT_MEM) 1.8VS 1.05VS, 1.05VS_VTT VCORE, 0.85VS VGFX_CORE
AU DI O BO AR D
POWER SWITCH BOARD

P OW ER S WI TCH +H OT KE Y X 3 6 -7 1- E5 1Q S-D 02
EXTERNAL ODD BOARD

E XT . OD D 6 -7 1- E5 1Q N-D 01
PROCESSOR
rPGA989/988
DDR3 SO-DIMM1
FDI
HD MI 0. 5" ~6 .5 "
DMI*4
<= 8"
Sheet 1 of 43 System Block Diagram
CLI CK BO ARD
T OU CH P AD S yn ap ti c
810 602-1 703
CR T CO NN EC TO R
<1 5"
L CD C ON NE CT OR ,
<8 "
CougarPoint Platform Controller Hub (PCH)

T PM
S HEET 23
MIC IN
HP OUT
INT S PK R
32. 768 K Hz
EC IT E 85 18 E
128pins LQFP 14 *14*1 .6 mm
S PI Sh ar e RO M
25x25x0.6 mm 989 Balls FCBGA

AZALIA LINK PCIE
<1 2"
Az al ia C od ec ALC269/ VT1802P Co-layout
INT S PK L
33 MHz LPC
0. 5" ~1 1"
INT M IC
24 MHz 100 MHz
I NT . K/ B TH ER MA L SE NS OR W 83 L7 71 AW G
EC SMBUS
S MA RT F AN S MA RT B AT TE RY
3 2.76 8KHz
SATA I/II 3.0Gb/s
< 12 "
USB2.0 480 Mbps

1" ~1 6"
Mi ni P CI E S OC KE T 3 G CA RD ( US B9 )
(Op tion al)
Mi ni P CI E S OC KE T WL AN ( US B2 )
JMICRO
JMC251 C LAN CARD READER 25

MH z 9 IN 1 SO CK ET
RJ45
S AT A HD D
SA TA O DD
USB P OR T (U SB 0)
U SB P OR T (U SB 1) US B3 .0
(Optional )
US B PO RT ( US B9 ) A UD IO B OA RD
C CD (U SB 5)
NEC uPD720200 USB3.0 IC

(O ption al)
B - 2 System Block Diagram
Schematic Diagrams
CPU 1/7 (DMI, PEG, FDI)

Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
1 .0 5V S _V TT U 3 4A B2 7 B2 5 A2 5 B2 4 B2 8 B2 6 A2 4 B2 3 G2 1 E2 2 F21 D2 1 G2 2 D2 2 F20 C2 1 P E G_ IC OM P I P E G_ I CO MP O P E G _R CO MP O J22 J21 H 22
20 mil
P E G_ C OM P
R6 3
2 4 .9_ 1 % _ 04
[ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [
15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ] 15 ]
D D D D D D D D D D D D D D D D
MI_ T X N 0 MI_ T X N 1 MI_ T X N 2 MI_ T X N 3 MI_ T X P 0 MI_ T X P 1 MI_ T X P 2 MI_ T X P 3 MI_ R MI_ R MI_ R MI_ R MI_ R MI_ R MI_ R MI_ R XN XN XN XN XP XP XP XP 0 1 2 3 0 1 2 3
D D D D D D D D
MI_ RX # [0 ] MI_ RX # [1 ] MI_ RX # [2 ] MI_ RX # [3 ] MI_ RX [0 ] MI_ RX [1 ] MI_ RX [2 ] MI_ RX [3 ]
D MI_ T X# [0 ] D MI_ T X# [1 ] D MI_ T X# [2 ] D MI_ T X# [3 ] D D D D MI_ T X[ MI_ T X[ MI_ T X[ MI_ T X[ 0] 1] 2] 3]
P E G_ R X # [ 0 ] P E G_ R X # [ 1 ] P E G_ R X # [ 2 ] P E G_ R X # [ 3 ] P E G_ R X # [ 4 ] P E G_ R X # [ 5 ] P E G_ R X # [ 6 ] P E G_ R X # [ 7 ] P E G_ R X # [ 8 ] P E G_ R X # [ 9 ] P E G_ R X# [1 0 ] P E G_ R X# [1 1 ] P E G_ R X# [1 2 ] P E G_ R X# [1 3 ] P E G_ R X# [1 4 ] P E G_ R X# [1 5 ]
K3 3 M 35 L34 J35 J32 H 34 H 31 G 33 G 30 F35 E3 4 E3 2 D 33 D 31 B3 3 C 32 3 .3 V J33 L35 K3 4 H 35 H 32 G 34 G 31 F33 F30 E3 5 E3 3 F32 D 34 E3 1 C 33 B3 2 M 29 M 32 M 31 L32 L29 K3 1 K2 8 J30 J28 H 29 G 27 E2 9 F27 D 28 F26 E2 5 M 28 M 33 M 30 L31 L28 K3 0 K2 7 J29 J27 H 28 G 28 E2 8 F28 D 27 E2 6 D 25
DMI
Q1 7 5 4 VC C *T MP 2 0 Q1 6 2 VC C C9 9 3 0 .1 u_ 1 0 V _ X7 R _0 4 G ND G 71 1 S T 9 U O UT 1 V O G ND NC GN D 1 2 3
SC70-5 & SC70-3 Co-lay
PCI EXPRESS* - GRAPHICS
Intel(R) FDI
[1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ] [1 5 ]
FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD
I_T X N I_T X N I_T X N I_T X N I_T X N I_T X N I_T X N I_T X N
0 1 2 3 4 5 6 7
A2 1 H1 9 E1 9 F18 B2 1 C2 0 D1 8 E1 7
FD FD FD FD FD FD FD FD
I0 _T X # [0 ] I0 _T X # [1 ] I0 _T X # [2 ] I0 _T X # [3 ] I1 _T X # [0 ] I1 _T X # [1 ] I1 _T X # [2 ] I1 _T X # [3 ]
CAD N OTE: DP _COMPIO and I COMPO s ignals shoul be sh d orted n ear ba lls and routed with - typ ical im pedance < 25 mohms
1 .05 V S _ V T T 1 . 0 5V S _ V TT
I_T X P 0 I_T X P 1 I_T X P 2 I_T X P 3 I_T X P 4 I_T X P 5 I_T X P 6 I_T X P 7
A2 2 G1 9 E2 0 G1 8 B2 0 C1 9 D1 9 F17 J18 J17 H2 0 J19 H1 7
FD FD FD FD FD FD FD FD
I0 _T X [0 ] I0 _T X [1 ] I0 _T X [2 ] I0 _T X [3 ] I1 _T X [0 ] I1 _T X [1 ] I1 _T X [2 ] I1 _T X [3 ]
P E G_ RX [ 0 ] P E G_ RX [ 1 ] P E G_ RX [ 2 ] P E G_ RX [ 3 ] P E G_ RX [ 4 ] P E G_ RX [ 5 ] P E G_ RX [ 6 ] P E G_ RX [ 7 ] P E G_ RX [ 8 ] P E G_ RX [ 9 ] P E G_ R X [1 0 ] P E G_ R X [1 1 ] P E G_ R X [1 2 ] P E G_ R X [1 3 ] P E G_ R X [1 4 ] P E G_ R X [1 5 ] P E G _ TX # [ 0 ] P E G _ TX # [ 1 ] P E G _ TX # [ 2 ] P E G _ TX # [ 3 ] P E G _ TX # [ 4 ] P E G _ TX # [ 5 ] P E G _ TX # [ 6 ] P E G _ TX # [ 7 ] P E G _ TX # [ 8 ] P E G _ TX # [ 9 ] P E G_ T X# [1 0 ] P E G_ T X# [1 1 ] P E G_ T X# [1 2 ] P E G_ T X# [1 3 ] P E G_ T X# [1 4 ] P E G_ T X# [1 5 ] P E G _T X [ 0 ] P E G _T X [ 1 ] P E G _T X [ 2 ] P E G _T X [ 3 ] P E G _T X [ 4 ] P E G _T X [ 5 ] P E G _T X [ 6 ] P E G _T X [ 7 ] P E G _T X [ 8 ] P E G _T X [ 9 ] P E G _ TX [1 0 ] P E G _ TX [1 1 ] P E G _ TX [1 2 ] P E G _ TX [1 3 ] P E G _ TX [1 4 ] P E G _ TX [1 5 ]
1: 2 (4 mi ls :8 mi ls )
C 10 0 0 .1 u _1 0 V _ X 7R _ 04
T H E RM _ V OL T [2 7 ]
1 3
9/20 EVT
PLACE NEAR U3
Sheet 2 of 43 CPU 1/7 (DMI, PEG, FDI)
[1 5 ] F D I_ F S Y NC 0 [1 5 ] F D I_ F S Y NC 1 [ 1 5 ] F DI _IN T
F D I0 _F S Y N C F D I1 _F S Y N C F D I_ INT F D I0 _L S Y N C F D I1 _L S Y N C
R 3 89 1 K_ 0 4
R3 9 0 24 .9 _ 1 %_ 0 4
[1 5 ] F D I_ L S Y NC 0 [1 5 ] F D I_ L S Y NC 1
On Board CPU Thermal Sensor

3.3 V
EDP Function Disable EDP_HPD: Pull-up10K- DISABLED
Analog Thermal Sensor

C9 7 *0 .1 u_ 1 6 V _ Y 5 V _ 0 4 D +_ C P U C Q1 8 * 2N 3 9 04 E B D -_C P U 3 5 DG ND SD AT A S CL K 7 8 S M D _ C P U _ T HE R M [1 4 , 2 7 ] S M C _ C P U _ T HE R M [1 4 , 2 7 ] 1 2 U 11 VD D D+ TH E R M AL ERT 4 6 R1 2 2 *1 0 m i _ 0 4 l C RIT _ T E MP _ R E P # [1 8 ] TS # _ D IMM 0_ 1 [9 ,1 0 ]
DP Compensation Signal
D [1 1] E MB _ H P D G S PQ 4 7 * MT N7 0 0 2 Z H S 3 [1 1] DP _ A U XP [1 1] DP _ A U XN C3 2 5 C3 2 4 *0 . 1 u _1 0 V _ X 7R _ 04 *0 . 1 u _1 0 V _ X 7R _ 04
E DP _ C OM P A 1 8 A1 7 E DP _ H P D # B 1 6 D P _ A U X_ P C 1 5 D P _ A U X_ N D 1 5 C1 7 F16 C1 6 G1 5 C1 8 E1 6 D1 6 F15
e D P _ C OM P IO e D P _ IC OM P O e D P _ H P D#
e DP_ AU X e DP_ AU X#
R3 8 8 *1 0 0 K _ 04 [1 1] [1 1] [1 1] [1 1] [1 1] [1 1] [1 1] [1 1] DP _ T X P 0 DP _ T X P 1 DP _ T X P 2 DP _ T X P 3 DP _ T X N0 DP _ T X N1 DP _ T X N2 DP _ T X N3 C3 3 0 C3 2 9 C3 2 7 C5 4 0 C3 3 1 C3 2 8 C3 2 6 C5 4 1 *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R *0 . 1 u _1 0 V _ X 7R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 D D D D D D D D P _ T XP P _ T XP P _ T XP P _ T XP P _ T XN P _ T XN P _ T XN P _ T XN _0 _1 _2 _3 _0 _1 _2 _3 e D P _ T X [0 ] e D P _ T X [1 ] e D P _ T X [2 ] e D P _ T X [3 ] e D P _ T X # [0] e D P _ T X # [1] e D P _ T X # [2] e D P _ T X # [3] P Z 98 8 2 7- 36 4 B -0 1 F
eDP
* W 8 3L 7 7 1 A W G
11/03
[3 ,8 , 11 ,1 3 , 1 4, 15 , 1 7 ,1 8, 1 9 ,2 0 ,22 ,2 3 ,2 6 ,28 ,3 0 ,3 1,3 3 ,3 4 ,3 5] 3.3 V [3 ,5, 18 , 1 9 ,2 0, 3 4 ,3 6 ] 1 .05 V S _V T T
CPU 1/7 (DMI, PEG, FDI) B - 3
Schematic Diagrams
CPU 2/7 (CLK, MISC, JTAG)

Processor Pullups/Pull downs
1 . 05 V S _ V T T
PU/PD for JTAG signals

1. 0 5 V S _ V T T R R R R R R 41 6 10 8 10 9 41 5 41 4 95 5 1 _ 04 5 1 _ 04 * 51 _ 0 4 5 1 _ 04 5 1 _ 04 5 1 _ 04 XD XD XD XD XD XD P _ TM S P _ TD I _ R P _ P RE Q # P _ TD O_ R P _ TC L K P _ TR S T #
Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG )

U3 4 B
H _P R O C H O T # H _C P U P W R G D _ R
R 41 0
62 _ 0 4
R 41 2 C 58 5
10 K _ 0 4 * 0. 1 u _ 10 V _ X 7 R _ 0 4
11/0 3 TRA CE W ID TH 1 0MI L, L EN GT H < 50 0M IL S

B C LK BC L K# A 28 A 27 C L K _ E XP _P C L K _ E XP _N [ 14 ] [ 1 4]
MISC
3 . 3V S AN 3 4 R 40 7 1 K_ 0 4 XD P _ D B R _R S K T OC C #
CLOCKS
[ 18 ] H _S N B _ I V B #
H_ S N B _ IV B #
C 26
P RO C_ S E L E CT #
DDR3 Compensation Signals

S M _ R C OMP _0 R 41 3 R 38 2 R 38 1 1 4 0_ 1 % _ 04 2 5 . 5 _1 % _ 04 2 0 0_ 1 % _ 04 S M _ R C OMP _1 S M _ R C OMP _2
D P L L _R E F _ S S C LK DP L L _ RE F _ S S C L K #
A 16 A 15
CL K _ DP _ P [1 4 ] C L K _ D P _ N [ 14 ]
H _ C A TE R R #
AL 3 3 CA T E RR #
[ 1 8 , 27 ] H _ P E C I
R4 1 1
*1 0 mi l _ 04
H_ P E C I_ R
AN 3 3 P E CI
THERMAL
R8 S M_ D R A MR S T #
C P U D R A MR S T #
[ 3 6]
H _ P R O C H OT #
R4 0 5
5 6 _1 % _ 04
H _ P R OC H O T# _ D A L 3 2 P R O C H OT #
DDR3 MISC
Sheet 3 of 43 CPU 2/7 (CLK, MISC, JTAG)
If P RO CH OT # i s no t us ed, t he n it m ust be t er mi na ted w it h a 68- O +- 5% p ul l-u p re si st or t o 1 .0 5V S_ VT T .

[ 1 8 ] H _ T H R MT R I P # R4 1 7 *1 0 mi l _ 04 H _ T H R MT R I P #_ R
S M _ R C OMP [ 0] S M _ R C OMP [ 1] S M _ R C OMP [ 2]
AK1 A5 A4
S M_ R C O MP _ 0 S M_ R C O MP _ 1 S M_ R C O MP _ 2
S3 circuit:- DRAM PWR GOOD logic
AN 3 2 TH E R M T R I P #
P R DY # PREQ # T CK T MS TR S T # T DI T DO
AP2 9 AP2 7 AR2 6 AR2 7 AP3 0 AR2 8 AP2 6
X DP _ P R DY # X D P _ P R E Q# X DP _ T CL K X D P _ T MS X DP _ T RS T # X DP _ T DI_ R X D P _ T D O _R
3 . 3V
10/2 8
R7 3 *2 0 0_ 1 % _0 4 D2 0
1 .5 V _ CP U
R 57 1 0 K _ 04 A C 3 2 A P MS Y S _P W R G D _ B U F
[ 1 5 ] H _ P M _S Y N C
P M_ S Y N C
JTAG & BPM
R4 1 9
*1 0 mi l _ 04
P M_ S Y N C _R
PWR MANAGEMENT
AM 3 4
[ 1 8] H _ C P U P W R G D
R4 1 8
*1 0 mi l _ 04
H _ C P U P W R GD _ R A P 3 3
[ 1 5]
P M_ D R A M_ P W R GD
U N C OR E P W R GO OD
[ 1 5, 3 3 ] 1 . 8 V S _ P W R G D A L3 5 DBR # BPM BPM BPM BPM BPM BPM BPM BPM # [ 0] # [ 1] # [ 2] # [ 3] # [ 4] # [ 5] # [ 6] # [ 7] A T2 8 AR2 9 AR3 0 A T3 0 AP3 2 AR3 1 A T3 1 AR3 2 XDP_ B PM XDP_ B PM XDP_ B PM XDP_ B PM XDP_ B PM XDP_ B PM XDP_ B PM XDP_ B PM 0_ R 1_ R 2_ R 3_ R 4_ R 5_ R 6_ R 7_ R X DP _ DB R_ R
P M S Y S _ P W R GD _ B U F
R 60
1 3 0_ 1 % _0 4
V D D P W R GO OD _ R
V8 S M_ D R A MP W R O K
*B A T5 4 A W G H R 58 * 39 _ 0 4 R5 9 0 _ 04 D [ 6 , 3 1, 3 3 , 3 4 ] S U S B G * MT N 7 0 0 2Z H S 3 S Q 10
1 .0 5 VS_ VT T R1 0 5
Buffered reset to CPU

7 5_ 1 % _0 4 6 D R 1 04 43 _ 1 %_ 0 4
B U F _C P U _ R S T# A R 3 3 RESE T #
11/ 04
3 .3 VS R5 3 0 1 0K _ 0 4 3 D 5 G S 4 [ 17 , 2 3 ] P L T_ R S T # R5 3 1 1 00 K _ 0 4 C9 6 2 G
Q3 6 A MT D N 7 0 02 Z H S 6 R S 1
P Z 98 8 2 7-3 6 4 B -0 1F
10/29
Q3 6 B MT D N 7 0 02 Z H S 6 R D Q1 4 H _ P R OC H OT #
S3 circuit:- DRAM_RST# to memory should be high during S3

1 . 5V C 51 5 R4 7 4 7 p_ 5 0 V _ N P O _0 4 *0 _0 4 R4 5 1K _ 0 4 Q8 MT N 70 0 2 Z H S 3 S D R4 6 4 . 9 9K _ 1 % _0 4 D R A M R S T _ C N TR L [ 8 , 14 ] C2 2 0 . 0 47 u _ 10 V _ X 7R _ 04 G
R 1 12
*1 . 5K _1 % _ 04 [ 2 7 ] H _ P R OC H O T_ E C R 10 6 *7 5 0_ 1 % _0 4 1 0/1 C AD N ote: Capa cito r n eed to be pla ced c lose to b uffe ou r tput pin R9 1 G MT N 70 0 2 Z H S 3 S 1 0 0 K _ 04
*6 8 p _5 0 V _ N P O _ 04
R9 0
* 0 _0 4
C P UD RA M RS T #
R 48
1K _0 4
D D R 3_ D R A M R S T # [ 9 , 10 ]
[ 2 , 5 , 1 8, 1 9 , 2 0 , 34 , 3 6 ] 1 . 05 V S _ V T T [ 6 , 3 1 ] 1 . 5V _C P U [ 6 , 8 , 9, 1 0 , 2 0, 2 6 , 2 8 , 31 , 3 3 ] 1 . 5V [ 2, 8 , 1 1 , 13 , 1 4 , 1 5, 1 7 , 1 8, 19 , 2 0 , 22 , 2 3 , 2 6, 2 8 , 3 0, 3 1 , 3 3 , 34 , 3 5 ] 3 . 3V [ 9, 1 0 , 1 1 , 12 , 1 3 , 14 , 1 5 , 1 6, 1 7 , 1 8, 19 , 2 0 , 23 , 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 6 ] 3 . 3V S
B - 4 CPU 2/7 (CLK, MISC, JTAG)
Schematic Diagrams
CPU 3/7 (DDR3)

Sandy Bridge Processor 3/7 ( DDR3 )
U34C U34D
[ 9] M _D _A Q[63:0] M DQ0 _A_ M DQ1 _A_ M DQ2 _A_ M DQ3 _A_ M DQ4 _A_ M DQ5 _A_ M DQ6 _A_ M DQ7 _A_ M DQ8 _A_ M DQ9 _A_ M DQ10 _A_ M DQ11 _A_ M DQ12 _A_ M DQ13 _A_ M DQ14 _A_ M DQ15 _A_ M DQ16 _A_ M DQ17 _A_ M DQ18 _A_ M DQ19 _A_ M DQ20 _A_ M DQ21 _A_ M DQ22 _A_ M DQ23 _A_ M DQ24 _A_ M DQ25 _A_ M DQ26 _A_ M DQ27 _A_ M DQ28 _A_ M DQ29 _A_ M DQ30 _A_ M DQ31 _A_ M DQ32 _A_ M DQ33 _A_ M DQ34 _A_ M DQ35 _A_ M DQ36 _A_ M DQ37 _A_ M DQ38 _A_ M DQ39 _A_ M DQ40 _A_ M DQ41 _A_ M DQ42 _A_ M DQ43 _A_ M DQ44 _A_ M DQ45 _A_ M DQ46 _A_ M DQ47 _A_ M DQ48 _A_ M DQ49 _A_ M DQ50 _A_ M DQ51 _A_ M DQ52 _A_ M DQ53 _A_ M DQ54 _A_ M DQ55 _A_ M DQ56 _A_ M DQ57 _A_ M DQ58 _A_ M DQ59 _A_ M DQ60 _A_ M DQ61 _A_ M DQ62 _A_ M DQ63 _A_ C5 D5 D3 D2 D6 C6 C2 C3 F10 F8 G10 G9 F9 F7 G8 G7 K4 K5 K1 J1 J5 J4 J2 K2 M 8 N10 N8 N7 M 10 M 9 N9 M 7 A G6 A G5 A K6 A K5 A H5 A H6 AJ5 AJ6 AJ8 A K8 AJ9 A K9 A H8 A H9 AL9 AL8 A P11 A N11 A L12 A 12 M A 11 M A L11 A P12 A N12 A J14 A H14 A L15 A K15 A L14 A K14 A J15 A H15 S A_D Q[0] S A_D Q[1] S A_D Q[2] S A_D Q[3] S A_D Q[4] S A_D Q[5] S A_D Q[6] S A_D Q[7] S A_D Q[8] S A_D Q[9] S A_D Q[10] S A_D Q[11] S A_D Q[12] S A_D Q[13] S A_D Q[14] S A_D Q[15] S A_D Q[16] S A_D Q[17] S A_D Q[18] S A_D Q[19] S A_D Q[20] S A_D Q[21] S A_D Q[22] S A_D Q[23] S A_D Q[24] S A_D Q[25] S A_D Q[26] S A_D Q[27] S A_D Q[28] S A_D Q[29] S A_D Q[30] S A_D Q[31] S A_D Q[32] S A_D Q[33] S A_D Q[34] S A_D Q[35] S A_D Q[36] S A_D Q[37] S A_D Q[38] S A_D Q[39] S A_D Q[40] S A_D Q[41] S A_D Q[42] S A_D Q[43] S A_D Q[44] S A_D Q[45] S A_D Q[46] S A_D Q[47] S A_D Q[48] S A_D Q[49] S A_D Q[50] S A_D Q[51] S A_D Q[52] S A_D Q[53] S A_D Q[54] S A_D Q[55] S A_D Q[56] S A_D Q[57] S A_D Q[58] S A_D Q[59] S A_D Q[60] S A_D Q[61] S A_D Q[62] S A_D Q[63]
S _CLK A [0] S _CLK A #[0] S A_C [0] KE
A6 B A6 A V 9
M _C _A LK_D DR0 [9] M _C _A LK_D DR# [9] 0 M _C 0 [9] _A KE
[10] M _B_D Q[63:0] M _DQ0 _B M _DQ1 _B M _DQ2 _B M _DQ3 _B M _DQ4 _B M _DQ5 _B M _DQ6 _B M _DQ7 _B M _DQ8 _B M _DQ9 _B M _DQ1 _B 0 M _DQ1 _B 1 M _DQ1 _B 2 M _DQ1 _B 3 M _DQ1 _B 4 M _DQ1 _B 5 M _DQ1 _B 6 M _DQ1 _B 7 M _DQ1 _B 8 M _DQ1 _B 9 M _DQ2 _B 0 M _DQ2 _B 1 M _DQ2 _B 2 M _DQ2 _B 3 M _DQ2 _B 4 M _DQ2 _B 5 M _DQ2 _B 6 M _DQ2 _B 7 M _DQ2 _B 8 M _DQ2 _B 9 M _DQ3 _B 0 M _DQ3 _B 1 M _DQ3 _B 2 M _DQ3 _B 3 M _DQ3 _B 4 M _DQ3 _B 5 M _DQ3 _B 6 M _DQ3 _B 7 M _DQ3 _B 8 M _DQ3 _B 9 M _DQ4 _B 0 M _DQ4 _B 1 M _DQ4 _B 2 M _DQ4 _B 3 M _DQ4 _B 4 M _DQ4 _B 5 M _DQ4 _B 6 M _DQ4 _B 7 M _DQ4 _B 8 M _DQ4 _B 9 M _DQ5 _B 0 M _DQ5 _B 1 M _DQ5 _B 2 M _DQ5 _B 3 M _DQ5 _B 4 M _DQ5 _B 5 M _DQ5 _B 6 M _DQ5 _B 7 M _DQ5 _B 8 M _DQ5 _B 9 M _DQ6 _B 0 M _DQ6 _B 1 M _DQ6 _B 2 M _DQ6 _B 3 C 9 A 7 D1 0 C 8 A 9 A 8 D 9 D 8 G 4 F 4 F 1 G 1 G 5 F 5 F 2 G 2 J 7 J 8 K1 0 K 9 J 9 J1 0 K 8 K 7 M 5 N 4 N 2 N 1 M 4 N 5 M 2 M 1 A5 M A6 M A3 R A3 P A3 N A2 N A1 N A2 P A5 P A9 N AT 5 AT 6 A6 P A8 N A6 R A5 R A9 R AJ1 1 AT 8 AT 9 A 1 H1 A8 R AJ1 2 A 2 H1 AT 1 1 A 4 N1 A 4 R1 AT 4 1 AT 2 1 A 5 N1 A 5 R1 AT 5 1 S DQ[0] B_ S DQ[1] B_ S DQ[2] B_ S DQ[3] B_ S DQ[4] B_ S DQ[5] B_ S DQ[6] B_ S DQ[7] B_ S DQ[8] B_ S DQ[9] B_ S DQ[10] B_ S DQ[11] B_ S DQ[12] B_ S DQ[13] B_ S DQ[14] B_ S DQ[15] B_ S DQ[16] B_ S DQ[17] B_ S DQ[18] B_ S DQ[19] B_ S DQ[20] B_ S DQ[21] B_ S DQ[22] B_ S DQ[23] B_ S DQ[24] B_ S DQ[25] B_ S DQ[26] B_ S DQ[27] B_ S DQ[28] B_ S DQ[29] B_ S DQ[30] B_ S DQ[31] B_ S DQ[32] B_ S DQ[33] B_ S DQ[34] B_ S DQ[35] B_ S DQ[36] B_ S DQ[37] B_ S DQ[38] B_ S DQ[39] B_ S DQ[40] B_ S DQ[41] B_ S DQ[42] B_ S DQ[43] B_ S DQ[44] B_ S DQ[45] B_ S DQ[46] B_ S DQ[47] B_ S DQ[48] B_ S DQ[49] B_ S DQ[50] B_ S DQ[51] B_ S DQ[52] B_ S DQ[53] B_ S DQ[54] B_ S DQ[55] B_ S DQ[56] B_ S DQ[57] B_ S DQ[58] B_ S DQ[59] B_ S DQ[60] B_ S DQ[61] B_ S DQ[62] B_ S DQ[63] B_
SB K[0] _CL SB _CLK #[0] S CK B_ E[0]
A2 E A2 D R 9
M _B_C _DDR [10 LK 0 ] M _B_C _DDR [ 1 LK #0 0] M _B_C 0 [10] KE
A5 A A5 B V 10
M _C _A LK_D DR1 [9] M _C _A LK_D DR# [9] 1 M _C 1 [9] _A KE
A1 E A1 D R 10
M _B_C _DDR [10 LK 1 ] M _B_C _DDR [ 1 LK #1 0] M _B_C 1 [10] KE
A4 B A4 A W 9
A2 B A2 A T 9
A3 B A3 A W 10
A1 A A1 B T 10
S _CS A #[0] S _CS A #[1] S _CS A #[2] S _CS A #[3]
A3 K A L3 A G1 A H1
M _C _A S#0 [9] M _C _A S#1 [9]
SB _CS #[0] SB _CS #[1] SB _CS #[2] SB _CS #[3]
A3 D A3 E A6 D A6 E
M _B_C 0 [10] S# M _B_C 1 [10] S#
DDR SYSTEM MEMORY A
S _DQS A #[0] S _DQS A #[1] S _DQS A #[2] S _DQS A #[3] S _DQS A #[4] S _DQS A #[5] S _DQS A #[6] S _DQS A #[7]
C 4 G 6 J3 M 6 A L6 A 8 M A R12 A 15 M
M A_D #0 _ QS M A_D #1 _ QS M A_D #2 _ QS M A_D #3 _ QS M A_D #4 _ QS M A_D #5 _ QS M A_D #6 _ QS M A_D #7 _ QS
M _DQS _A #[7:0] [ 9 ]
DDR SYSTEM MEMORY B
S A_O [0] DT S A_O [1] DT S A_O [2] DT S A_O [3] DT
A H3 A G3 A G2 A H2
M _O 0 [9] _A DT M _O 1 [9] _A DT
S ODT B_ [0] S ODT B_ [1] S ODT B_ [2] S ODT B_ [3]
A4 E A4 D A5 D A5 E
Sheet 4 of 43 CPU 3/7 (DDR3)
M _B_O 0 [10] DT M _B_O 1 [10] DT
S _DQS B #[0] S _DQS B #[1] S _DQS B #[2] S _DQS B #[3] S _DQS B #[4] S _DQS B #[5] S _DQS B #[6] S _DQS B #[7]
D 7 F 3 K 6 N 3 A5 N A9 P A 12 K A 15 P
M DQS _B_ #0 M DQS _B_ #1 M DQS _B_ #2 M DQS _B_ #3 M DQS _B_ #4 M DQS _B_ #5 M DQS _B_ #6 M DQS _B_ #7
M _DQ _B S#[7:0] [10]
S _DQS A [0] S _DQS A [1] S _DQS A [2] S _DQS A [3] S _DQS A [4] S _DQS A [5] S _DQS A [6] S _DQS A [7]
D 4 F 6 K 3 N 6 A L5 A 9 M A R11 A 14 M
M A_D 0 _ QS M A_D 1 _ QS M A_D 2 _ QS M A_D 3 _ QS M A_D 4 _ QS M A_D 5 _ QS M A_D 6 _ QS M A_D 7 _ QS
M _DQS _A [7:0] [ 9]
S _DQ B S[0] S _DQ B S[1] S _DQ B S[2] S _DQ B S[3] S _DQ B S[4] S _DQ B S[5] S _DQ B S[6] S _DQ B S[7]
C 7 G 3 J 6 M 3 A6 N A8 P A 11 K A 14 P
M DQS _B_ 0 M DQS _B_ 1 M DQS _B_ 2 M DQS _B_ 3 M DQS _B_ 4 M DQS _B_ 5 M DQS _B_ 6 M DQS _B_ 7
M _DQ _B S[7:0] [10]
[9] M BS _A_ 0 [9] M BS _A_ 1 [9] M BS _A_ 2
A E10 A F10 V6
S A_B [0] S S A_B [1] S S A_B [2] S
[9] M _CA # _A S [9] M _RA # _A S [ 9 M A_W # ] _ E
A E8 A D9 A F9
S A_C # AS S A_R # AS S A_W # E
SA A _M [0] SA A _M [1] SA A _M [2] SA A _M [3] SA A _M [4] SA A _M [5] SA A _M [6] SA A _M [7] SA A _M [8] SA A _M [9] S _M [10] A A S _M [11] A A S _M [12] A A S _M [13] A A S _M [14] A A S _M [15] A A
A D10 W 1 W 2 W 7 V 3 V 2 W 3 W 6 V 1 W 5 A D8 V 4 W 4 A8 F V 5 V 7
M A_A _ 0 M A_A _ 1 M A_A _ 2 M A_A _ 3 M A_A _ 4 M A_A _ 5 M A_A _ 6 M A_A _ 7 M A_A _ 8 M A_A _ 9 M A_A _ 10 M A_A _ 11 M A_A _ 12 M A_A _ 13 M A_A _ 14 M A_A _ 15
M _A[15:0] [9] _A
[10] M _B 0 _B S [10] M _B 1 _B S [10] M _B 2 _B S
A9 A A7 A R 6
S BS B_ [0] S BS B_ [1] S BS B_ [2]
[1 M 0] _B_C # AS [1 M 0] _B_R # AS [10] M _WE _B #
A 0 A1 A8 B A9 B
S CA B_ S# S RA B_ S# S WE B_ #
SB A[0] _M SB A[1] _M SB A[2] _M SB A[3] _M SB A[4] _M SB A[5] _M SB A[6] _M SB A[7] _M SB A[8] _M SB A[9] _M SB A _M [10] SB A _M [11] SB A _M [12] SB A _M [13] SB A _M [14] SB A _M [15]
A8 A T 7 R 7 T 6 T 2 T 4 T 3 R 2 T 5 R 3 A7 B R 1 T 1 A 10 B R 5 R 4
M B0 _B_ M B1 _B_ M B2 _B_ M B3 _B_ M B4 _B_ M B5 _B_ M B6 _B_ M B7 _B_ M B8 _B_ M B9 _B_ M B10 _B_ M B11 _B_ M B12 _B_ M B13 _B_ M B14 _B_ M B15 _B_
M _B 1 _B [ 5:0] [10]
P Z988 27-364B 0 - 1F
P 8827-364B Z9 -01F
CPU 3/7 (DDR3) B - 5
Schematic Diagrams
CPU 4/7 (Power)

Sandy Bridge Processor 4/7
U 34F
POWER
PROCESSOR UNCORE POWER
1 .0 5 V S _ V T T 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 1 00 A H 13 A H 10 A G 10 A C 10 Y1 0 U1 0 P1 0 L10 J14 J13 J12 J11 H1 4 H1 2 H1 1 G1 4 G1 3 G1 2 F1 4 F1 3 F1 2 F1 1 E1 4 E1 2 E1 1 D1 4 D1 3 D1 2 D1 1 C1 4 C1 3 C1 2 C1 1 B1 4 B1 2 A1 4 A1 3 A1 2 A1 1 J23 V CC IO 4 0 + V 1 .0 5 S _ V C CP _ F
V CO RE
48A
A G3 5 A G3 4 A G3 3 A G3 2 A G3 1 A G3 0 A G2 9 A G2 8 A G2 7 A G2 6 AF3 5 AF3 4 AF3 3 AF3 2 AF3 1 AF3 0 AF2 9 AF2 8 AF2 7 AF2 6 A D3 5 A D3 4 A D3 3 A D3 2 A D3 1 A D3 0 A D2 9 A D2 8 A D2 7 A D2 6 A C3 5 A C3 4 A C3 3 A C3 2 A C3 1 A C3 0 A C2 9 A C2 8 A C2 7 A C2 6 AA3 5 AA3 4 AA3 3 AA3 2 AA3 1 AA3 0 AA2 9 AA2 8 AA2 7 AA2 6 Y3 5 Y3 4 Y3 3 Y3 2 Y3 1 Y3 0 Y2 9 Y2 8 Y2 7 Y2 6 V3 5 V3 4 V3 3 V3 2 V3 1 V3 0 V2 9 V2 8 V2 7 V2 6 U3 5 U3 4 U3 3 U3 2 U3 1 U3 0 U2 9 U2 8 U2 7 U2 6 R3 5 R3 4 R3 3 R3 2 R3 1 R3 0 R2 9 R2 8 R2 7 R2 6 P3 5 P3 4 P3 3 P3 2 P3 1 P3 0 P2 9 P2 8 P2 7 P2 6 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC V CC IO 1 V CC IO 2 V CC IO 3 V CC IO 4 V CC IO 5 V CC IO 6 V CC IO 7 V CC IO 8 V CC IO 9 V CC IO 1 0 V CC IO 1 1 V CC IO 1 2 V CC IO 1 3 V CC IO 1 4 V CC IO 1 5 V CC IO 1 6 V CC IO 1 7 V CC IO 1 8 V CC IO 1 9 V CC IO 2 0 V CC IO 2 1 V CC IO 2 2 V CC IO 2 3 V CC IO 2 4 V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 C3 6 1
PROCES SOR CORE POWER ICCMAX Maximum Proces sor

V C OR E C 353 C 371 C 366 C 354 C 359 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8 2 2u _ 6 . 3 V _ X 5 R _ 0 8
8.5A
C3 5 7 22 u _ 6 . 3 V _ X 5R _ 0 8 C 365 2 2 u _ 6 . 3 V _ X 5R _ 0 8 C 398 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8 C 350 + 22 u _ 6 . 3 V _ X 5 R _ 0 8 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8 22 0 u _ 6 . 3 V _ 6 . 3 *6 . 3 *4 . 2 C4 0 2
SV 48
C3 5 5 *2 2 u _6 . 3 V _ X 5 R _0 8
C3 4 4 *2 2 u _6 . 3 V _ X 5 R _0 8
C 364 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8
C 358 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8
C 346 + 2 2 u _ 6 . 3 V _ X5 R _ 0 8
C4 1 7
22 0 u _ 6 . 3 V _ 6 . 3 *6 . 3 *4 . 2
C3 9 6 *2 2 u _6 . 3 V _ X 5 R _0 8
C4 1 9 *2 2 u _6 . 3 V _ X 5 R _0 8
C 406 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8
C 397 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8
C 384 2 2 u _ 6 . 3 V _ X5 R _ 0 8
C 337 C 332 C 351 C 336
PEG AND DDR
C 363
C3 2 1 *2 2 u _6 . 3 V _ X 5 R _0 8
C4 1 8 *2 2 u _6 . 3 V _ X 5 R _0 8
C 375 2 2 u _ 6 . 3 V _ X 5R _ 0 8
C 383 2 2 u _ 6 . 3 V _ X 5R _ 0 8
C 382 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8
Sheet 5 of 43 CPU 4/7 (Power)
V C OR E C 69 C 33 C 74 C 56 C 34 C 53 1 0u _ 6 . 3 V _ X 5 R _ 0 6 1 0u _ 6 . 3 V _ X 5 R _ 0 6 1 0u _ 6 . 3 V _ X 5 R _ 0 6 1 0u _ 6 . 3 V _ X 5 R _ 0 6 1 0u _ 6 . 3 V _ X 5 R _ 0 6 1 0u _ 6 . 3 V _ X 5 R _ 0 6
C4 0 7 *2 2 u _6 . 3 V _ X 5 R _0 8
C3 7 2 22 u _ 6 . 3 V _ X 5R _ 0 8
C 352 2 2 u _ 6 . 3 V _ X 5R _ 0 8
C 367 2 2 u _ 6 . 3 V _ X 5R _ 0 8
C 385 2 2 u _ 6 . 3 V _ X5 R _ 0 8
C3 8 1 *2 2 u _6 . 3 V _ X 5 R _0 8 R 62
C3 9 4 *2 2 u _6 . 3 V _ X 5 R _0 8 * 2 0m i l _ 0 4
C 420 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8 1 .0 5 V S _ V T T
C 368 * 2 2 u_ 6 . 3 V _ X 5 R _ 0 8
V C OR E C 362 C 360 C 334 C 333 C 356 C 62 C 72 C 59 C 66 *2 2 u _ 6. 3V _X 5 R _ 08 *2 2 u _ 6. 3V _X 5 R _ 08 *2 2 u _ 6. 3V _X 5 R _ 08 *2 2 u _ 6. 3V _X 5 R _ 08 *2 2 u _ 6. 3V _X 5 R _ 08 *1 0 u _ 6. 3V _X 5 R _ 06 *1 0 u _ 6. 3V _X 5 R _ 06 *1 0 u _ 6. 3V _X 5 R _ 06 *1 0 u _ 6. 3V _X 5 R _ 06
CORE SUPPLY
CAD Note: H_CPU_SVIDALRT#_R,H_CPU_SVIDDAT_R Place the PU resistors close to CPU
SVID Signals
1 .0 5 V S_ VT T
SVID
VID AL ER T # V ID S CL K VI DSO U T
AJ 2 9 AJ 3 0 AJ 2 8
H _ C P U _ S V I D A L R T # _R H _ CP U_ S V IDC L K _ R H _ CP U_ S V IDD A T _ R
R 40 6 R 88 R 85
4 3 _ 1 % _0 4 0_04 0_04
H _C P U _ S V I D A L R T # [ 3 6 ] H _C P U _ S V I D C L K [ 3 6] H _C P U _ S V I D D A T [ 3 6]
H _ C P U _S V I D A L R T # H _ C P U _S V I D C L K H _ C P U _S V I D D A T _ R
R4 0 8 R8 9 R8 6
7 5_ 1 % _ 0 4 *5 4 . 9 _ 1 % _0 4 1 30 _ 1 % _ 0 4
CAD Note: H_CPU_SVIDCLK_R Place the PU resistors close to VR
V C OR E _ V C C _ S E N S E [ 3 6 ] V C OR E _ V S S _ S E N S E [ 3 6 ]
1 .0 5 V S _ V T T
SENSE LINES
V C C_ S E N S E V SS_ SEN SE
AJ 3 5 AJ 3 4
R 3 79 10_04
V C C I O_ S E N S E V S S I O_ S E N S E
B1 0 A1 0
V C CIO _ S E N S E _ R V S S I O_ S E N S E
R 3 84
*0 _ 0 4
V C CIO _ S E N S E
[ 34 ]
[ 3 6 , 37 ] [ 2, 3 , 1 8 , 1 9 , 2 0 , 3 4 , 36 ] R 3 83 10_04
V CO R E 1. 05 V S _ V T T
P Z 9 88 2 7 -3 6 4 B -0 1 F
B - 6 CPU 4/7 (Power)
Schematic Diagrams
CPU 5/7 (Graphics Power)

Sandy Bridge Processor 5/7
POWER
V G F X _ CO RE U 3 4G
( GRAPHICS POWER )
1 .5 V R 11 9
All VAXG = 33A

C 3 91 2 2 u _ 6. 3 V _ X 5 R _ 0 8 C 39 2 2 2 u_ 6 . 3 V _ X5 R _ 08 C3 6 9 *2 2 u_ 6 . 3 V _ X 5R _ 08 C 3 88 2 2 u _6 . 3 V _ X 5R _ 0 8 C3 8 7 2 2u _ 6 . 3 V _X 5 R _0 8
C 3 86 2 2 u _ 6. 3 V _ X 5 R _ 0 8
C 37 6 2 2 u_ 6 . 3 V _ X5 R _ 08
C3 7 4 22 u _ 6 . 3V _X 5 R _ 0 8
C 3 17 2 2 u _6 . 3 V _ X 5R _ 0 8
C3 7 7 2 2u _ 6 . 3 V _X 5 R _0 8
C 3 89 2 2 u _ 6. 3 V _ X 5 R _ 0 8
C 39 0 2 2 u_ 6 . 3 V _ X5 R _ 08
C3 2 2 22 u _ 6 . 3V _X 5 R _ 0 8
C 3 18 * 22 u _ 6 . 3V _X 5 R _ 0 8
C3 7 3 2 2u _ 6 . 3 V _X 5 R _0 8
C 3 15 + * 3 30 U _2 . 5 V _ D 2_ D
C 31 4 + 5 6 0u _ 2 . 5 V _6 . 6 * 6. 6 * 5. 9
SA RAIL
AT2 4 AT2 3 AT2 1 AT2 0 AT1 8 AT1 7 A R2 4 A R2 3 A R2 1 A R2 0 A R1 8 A R1 7 AP2 4 AP2 3 AP2 1 AP2 0 AP1 8 AP1 7 A N2 4 A N2 3 A N2 1 A N2 0 A N1 8 A N1 7 A M2 4 A M2 3 A M2 1 A M2 0 A M1 8 A M1 7 AL 2 4 AL 2 3 AL 2 1 AL 2 0 AL 1 8 AL 1 7 AK2 4 AK2 3 AK2 1 AK2 0 AK1 8 AK1 7 AJ 2 4 AJ 2 3 AJ 2 1 AJ 2 0 AJ 1 8 AJ 1 7 A H2 4 A H2 3 A H2 1 A H2 0 A H1 8 A H1 7
VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
SENSE LINES
VA XG _ SENSE V SSA XG _ SENSE
AK3 5 AK3 4
V C C _ GT _ S E N S E [ 3 6] V S S _ GT _ S E N S E [ 3 6 ] V _ S M _V R E F R1 1 4 *1 0 0K _1 % _ 04
Q1 5 *A O3 4 02 L S D
1 K _ 1 % _0 4 V _ S M _ V RE F _ C NT
R 11 7 G
11/03
C5 8 6 *0 . 1 u _1 0 V _ X 7R _ 04
1 1/03
S U S B # [ 3, 3 1 , 3 3 , 34 ]
1 K _ 1 % _0 4
VREF
AL 1 SM _ VREF
V_ SM _ VREF R1 1 6
0 _0 4
V _ S M _V R E F _ C N T
CAD Note: + V_SM_V REF sho uld have 10 mil trace width
1. 5 V _ C P U
DDR3 -1.5V RAILS
VD DQ 1 VD DQ 2 VD DQ 3 VD DQ 4 VD DQ 5 VD DQ 6 VD DQ 7 VD DQ 8 VD DQ 9 V D D Q1 0 V D D Q1 1 V D D Q1 2 V D D Q1 3 V D D Q1 4 V D D Q1 5
AF7 AF4 AF1 A C7 A C4 A C1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
All VDDQ = 12A

C6 3 10 u _ 6 . 3V _X 5 R _ 0 6 C 65 1 0 u _6 . 3 V _ X 5R _ 0 6 C5 8 1 0u _ 6 . 3 V _X 5 R _0 6 +C 4 00 2 2 0 u _6 . 3 V _ 6 . 3* 6 . 3 *4 . 2
GRAPHICS
11/29
C7 1 10 u _ 6 . 3V _X 5 R _ 0 6 C 60 1 0 u _6 . 3 V _ X 5R _ 0 6 C6 7 1 0u _ 6 . 3 V _X 5 R _0 6
Sheet 6 of 43 CPU 5/7 (Graphics Power)
0. 8 5 V S V V V V V V V V CC CC CC CC CC CC CC CC SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 M2 7 M2 6 L 26 J 26 J 25 J 24 H2 6 H2 5
All VDDQ = 6A
C3 2 3 10 u _ 6 . 3V _X 5 R _ 0 8 C 3 45 1 0 u _6 . 3 V _ X 5R _ 0 8 C2 8 1 0u _ 6 . 3 V _X 5 R _0 6 P C1 6 7 + * 3 30 u _ 2 . 5V _9 m _ 6. 3* 6
1.8V RAIL
1 .5 V _ CP U
1 .8 V S
All VCCPLL = 1.2A

C 4 58 + 3 3 0 uF _2 . 5 V _ 9 m_ 6 . 3 *6 C3 1 6 1 0 u_ 6 . 3 V _ X5 R _0 6 C3 1 9 1u _ 6 . 3 V _X 5 R _0 4 C 32 0 1 u _ 6. 3 V _ X 5 R _ 0 4
MISC
B6 A6 A2
H2 3 V CCS A _ S E NS E
V C CP L L 1 V C CP L L 2 V C CP L L 3
V C C S A _S E N S E R5 3 2 * 0 _0 4 R 56 1 0K _0 4
V CC S A _ S E NS E [3 5 ] V CC S A _ V ID0 [3 5 ]
R3 9 3 *1 0 K _ 0 4 V C C S A _ V I D 1 [ 35 ]
F C _ C2 2 V C CS A _ V ID 1
C2 2 C2 4
P Z 98 8 2 7-3 6 4 B -0 1 F
R3 8 6 1 0 K _0 4
[ 3 5] [ 19 , 2 9 , 3 1] [ 18 , 1 9 , 3 3] [ 3 , 8 , 9 , 10 , 2 0 , 2 6, 28 , 3 1 , 3 3] [ 3 , 3 1] [ 3 7] [ 3 , 9 , 1 0, 1 1 , 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 2 9, 30 , 3 1 , 3 6]
0. 8 5 V S 1. 5 V S 1. 8 V S 1. 5 V 1. 5 V _ C P U V GF X _ C O R E 3. 3 V S
CPU 5/7 (Graphics Power) B - 7
Schematic Diagrams
CPU 6/7 (GND)

Sandy Bridge Processor 6/7 ( GND )
U34H AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10 A T7 A T4 A T3 A R25 A R22 A R19 A R16 A R13 A R10 A R7 A R4 A R2 AP 34 AP 31 AP 28 AP 25 AP 22 AP 19 AP 16 AP 13 AP 10 AP 7 AP 4 AP 1 A N30 A N27 A N25 A N22 A N19 A N16 A N13 A N10 A N7 A N4 A M29 A M25 A M22 A M19 A M16 A M13 A M10 A M7 A M4 A M3 A M2 A M1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10 A L7 A L4 A L2 AK 33 AK 30 AK 27 AK 25 AK 22 AK 19 AK 16 AK 13 AK 10 AK 7 AK 4 AJ25 V SS1 V SS2 V SS3 V SS4 V SS5 V SS6 V SS7 V SS8 V SS9 V SS10 V SS11 V SS12 V SS13 V SS14 V SS15 V SS16 V SS17 V SS18 V SS19 V SS20 V SS21 V SS22 V SS23 V SS24 V SS25 V SS26 V SS27 V SS28 V SS29 V SS30 V SS31 V SS32 V SS33 V SS34 V SS35 V SS36 V SS37 V SS38 V SS39 V SS40 V SS41 V SS42 V SS43 V SS44 V SS45 V SS46 V SS47 V SS48 V SS49 V SS50 V SS51 V SS52 V SS53 V SS54 V SS55 V SS56 V SS57 V SS58 V SS59 V SS60 V SS61 V SS62 V SS63 V SS64 V SS65 V SS66 V SS67 V SS68 V SS69 V SS70 V SS71 V SS72 V SS73 V SS74 V SS75 V SS76 V SS77 V SS78 V SS79 V SS80 V SS81 V SS82 V SS83 V SS84 V SS85 V SS86 V SS87 V SS88 V SS89 V SS90 V SS91 V SS92 V SS93 V SS94 V SS95 V SS96 V SS97 V SS98 V SS99 V 1 00 SS V 1 01 SS V 1 02 SS V 1 03 SS V 1 04 SS V 1 05 SS V 1 06 SS V 1 07 SS V 1 08 SS V 1 09 SS V 1 10 SS V 1 11 SS V 1 12 SS V 1 13 SS V 1 14 SS V 1 15 SS V 1 16 SS V 1 17 SS V 1 18 SS V 1 19 SS V 1 20 SS V 1 21 SS V 1 22 SS V 1 23 SS V 1 24 SS V 1 25 SS V 1 26 SS V 1 27 SS V 1 28 SS V 1 29 SS V 1 30 SS V 1 31 SS V 1 32 SS V 1 33 SS V 1 34 SS V 1 35 SS V 1 36 SS V 1 37 SS V 1 38 SS V 1 39 SS V 1 40 SS V 1 41 SS V 1 42 SS V 1 43 SS V 1 44 SS V 1 45 SS V 1 46 SS V 1 47 SS V 1 48 SS V 1 49 SS V 1 50 SS V 1 51 SS V 1 52 SS V 1 53 SS V 1 54 SS V 1 55 SS V 1 56 SS V 1 57 SS V 1 58 SS V 1 59 SS V 1 60 SS AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE 5 3 AE 4 3 AE 3 3 AE 2 3 AE 1 3 AE 0 3 AE 9 2 AE 8 2 AE 7 2 AE 6 2 AE 9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB 5 3 AB 4 3 AB 3 3 AB 2 3 AB 1 3 AB 0 3 AB 9 2 AB 8 2 AB 7 2 AB 6 2 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2 U3 4I T 35 T 34 T 33 T 32 T 31 T 30 T 29 T 28 T 27 T 26 P9 P8 P6 P5 P3 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34 L33 L30 L27 L9 L8 L6 L5 L4 L3 L2 L1 K35 K32 K29 K26 J34 J31 H33 H30 H27 H24 H21 H18 H15 H13 H10 H9 H8 H7 H6 H5 H4 H3 H2 H1 G35 G32 G29 G26 G23 G20 G17 G11 F34 F31 F29 V 1 61 SS V 1 62 SS V 1 63 SS V 1 64 SS V 1 65 SS V 1 66 SS V 1 67 SS V 1 68 SS V 1 69 SS V 1 70 SS V 1 71 SS V 1 72 SS V 1 73 SS V 1 74 SS V 1 75 SS V 1 76 SS V 1 77 SS V 1 78 SS V 1 79 SS V 1 80 SS V 1 81 SS V 1 82 SS V 1 83 SS V 1 84 SS V 1 85 SS V 1 86 SS V 1 87 SS V 1 88 SS V 1 89 SS V 1 90 SS V 1 91 SS V 1 92 SS V 1 93 SS V 1 94 SS V 1 95 SS V 1 96 SS V 1 97 SS V 1 98 SS V 1 99 SS V 2 00 SS V 2 01 SS V 2 02 SS V 2 03 SS V 2 04 SS V 2 05 SS V 2 06 SS V 2 07 SS V 2 08 SS V 2 09 SS V 2 10 SS V 2 11 SS V 2 12 SS V 2 13 SS V 2 14 SS V 2 15 SS V 2 16 SS V 2 17 SS V 2 18 SS V 2 19 SS V 2 20 SS V 2 21 SS V 2 22 SS V 2 23 SS V 2 24 SS V 2 25 SS V 2 26 SS V 2 27 SS V 2 28 SS V 2 29 SS V 2 30 SS V 2 31 SS V 2 32 SS V 2 33 SS VS S234 VS S235 VS S236 VS S237 VS S238 VS S239 VS S240 VS S241 VS S242 VS S243 VS S244 VS S245 VS S246 VS S247 VS S248 VS S249 VS S250 VS S251 VS S252 VS S253 VS S254 VS S255 VS S256 VS S257 VS S258 VS S259 VS S260 VS S261 VS S262 VS S263 VS S264 VS S265 VS S266 VS S267 VS S268 VS S269 VS S270 VS S271 VS S272 VS S273 VS S274 VS S275 VS S276 VS S277 VS S278 VS S279 VS S280 VS S281 VS S282 VS S283 VS S284 VS S285 F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
CAD Note: 0 ohm resistor should be placed close to CPU
Sheet 7 of 43 CPU 6/7 (GND)
VSS
VSS
P Z9882 7-364 B 01F -
PZ98827- 364B-01 F
B - 8 CPU 6/7 (GND)
Schematic Diagrams
CPU 7/7 (RESERVED)

Sandy Bridge Processor 7/7 ( RESERVED )
U 34 E L7 AG 7 AE7 AK2 W8 CF G 0 CF G 2 CF G CF G CF G CF G 4 5 6 7 AK2 8 AK2 9 AL 2 6 AL 2 7 AK2 6 AL 2 9 AL 3 0 A M3 1 A M3 2 A M3 0 A M2 8 A M2 6 AN2 8 AN3 1 AN2 6 A M2 7 AK3 1 AN2 9 CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G [0 ] [1 ] [2 ] [3 ] [4 ] [5 ] [6 ] [7 ] [8 ] [9 ] [ 1 0] [ 1 1] [ 1 2] [ 1 3] [ 1 4] [ 1 5] [ 1 6] [ 1 7] R R R R R SVD SVD SVD SVD SVD 28 29 30 31 32
CFG Straps for Processor

PEG Stati Lane Reve c rsal - CFG is for th 16x 2 e
CFG2
1: (Defa ult) Normal Oper ation Lan # ; e de finit ion m atches sock pi map defi et n nition 0: Lane Rever sed
CF G 2
R 11 1
*1 K _ 0 4
R S V D 33 R S V D 34 R S V D 35
AT2 6 AM 3 3 AJ 2 7
Disp lay P ort Pr esenc Str e ap 1: (Defa ult) Disabl ed; N Phy o sical Disp lay Po rt CFG4 attached to Embedded Display Port 0: Enabl ed; A exte n rnal Displ Po de ay rt vice i s co nnect to the E ed mbedd Di ed splay Port
H_ CPU H_ CPU H_ CPU H_ CPU _ RSV D _ RSV D _ RSV D _ RSV D
R S V D 37 R S V D 38 R S V D 39 R S V D 40
T8 J16 H 16 G 16
CF G 4
R 11 0
*1 K _ 0 4
1 AJ 3 1 2 AH3 1 3 AJ 3 3 4 AH3 3 AJ 2 6
V A X G_ V A L _ S E N S E V S S A X G_ V A L _ S E N S E V C C _ V A L _S E N S E VS S _ V AL _ S ENSE
R R R R R
SVD SVD SVD SVD SVD
41 42 43 44 45
AR 3 5 AT3 4 AT3 3 AP3 5 AR 3 4
Sheet 8 of 43 CPU 7/7 (RESERVED)
RS V D 5
RESERVED
PCIE Port Bifur catio Str n aps 11: 10: 01: 00:
*1 K _ 0 4 *1 K _ 0 4
V R E F _ C H _A _ D IMM B 4 V R E F _ C H _B _ D IMM D 1
RS V D 6 RS V D 7
CFG[6:5]
CF G 5 R 99 R 92
( Defau lt) x - Device 1 fu 16 nctio 1 and 2 disab ns led x x8 - De 8, vice 1 func tion 1 ena bled ; func tion 2 dis abled R eserv - (Devi 1 f ed ce uncti 1 disab on led ; funct ion 2 enab led) x 8,x4, - Devic 1 fu x4 e nctio 1 and 2 enabl ns ed
R R R R R
SVD SVD SVD SVD SVD
46 47 48 49 50
B3 4 A3 3 A3 4 B3 5 C 35 1 .5 V R 40 * 0 _0 4 R3 8 Q7 * A O3 4 0 2L S D 1K _ 1 % _ 04 MV R E F _ D Q _ D I M 0 M V R E F _D Q_ D I MMA R3 1 G 1K _ 1 % _ 04 [ 9]
CF G 6
F25 F24 F23 D2 4 G2 5 G2 4 E2 3 D2 3 C3 0 A3 1 B3 0 B2 9 D3 0 B3 1 A3 0 C2 9
RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
R S V D 51 R S V D 52
AJ 3 2 AK3 2
AH 2 7 V C C_ DIE_ SE N S E
V R E F _ C H _ A _ D I MM
R3 9 R S V D 54 R S V D 55 AN 3 5 AM 3 5 *1 K _ 0 4
10/29
PEG DEFER TRAIN ING 1: (Def ault) PEG T rain immed iatel fol y lowing xxRE SETB de as sertio n CFG7 0: PEG Wait for BIOS for training
J20 B1 8 A1 9 J15
RS V D 2 4 RS V D 2 5 V C C I O_ S E L RS V D 2 7
D R A M R S T _ C N TR L R S V D 56 R S V D 57 R S V D 58 AT2 AT1 AR 1 R 44 B1 KE Y V R E F _ C H _ B _ D I MM Q6 * A O3 4 0 2L S D M V R E F _ D Q_ D I M 1 * 0 _0 4 1 .5 V
D R A M R S T _ C N TR L [ 3, 14 ]
CF G 7
R 93
*1 K _ 0 4
R 28 1 K _ 1% _ 0 4 M V R E F _D Q_ D I MMB [ 10 ]
10/29
R4 9 R 29 G *1 K _ 0 4 R3 9 1 * 10 m i _ 0 4 l H _S N B _ I V B # _P W R C TR L D R A M R S T _ C N TR L 1 K _ 1% _ 0 4
10/29
3 .3 V R 39 2 10 K _ 0 4
P Z 9 8 8 27 -3 6 4B - 01 F
On C RB H_SN B_IVB #_PWR CTRL = low, 1.0V H_SN B_IVB #_PWR CTRL = high /NC, 1.05V
[ 3 , 6 , 9, 1 0 , 2 0, 2 6 ,2 8 ,31 ,3 3 ] 1 . 5V [ 2, 3 ,1 1 , 13 , 1 4 , 1 5, 1 7 , 1 8, 19 , 2 0 , 22 , 2 3 , 2 6, 2 8 , 3 0, 3 1 ,3 3 ,34 ,3 5 ] 3 . 3V
CPU 7/7 (RESERVED) B - 9
Schematic Diagrams
DDR3 SO-DIMM_0
SO-DIMM A
[ 4] M_ A _ A [ 1 5 : 0] M M M M M M M M M M M M M M M M _ A_ A0 _ A_ A1 _ A_ A2 _ A_ A3 _ A_ A4 _ A_ A5 _ A_ A6 _ A_ A7 _ A_ A8 _ A_ A9 _ A _ A 10 _ A _ A 11 _ A _ A 12 _ A _ A 13 _ A _ A 14 _ A _ A 15
CHANGE TO STANDARD
J D I M M2 A 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187 M M M M M M M M M M M M M M M M _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ _ A _ DQ S0 S1 S2 S3 S4 S5 S6 S7 S #0 S #1 S #2 S #3 S #4 S #5 S #6 S #7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 /AP A1 1 A 1 2 /B C# A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # CK 0 CK 0 # CK 1 CK 1 # CK E 0 CK E 1 CA S # RA S # W E# SA0 SA1 S CL S DA OD T 0 OD T 1 DM DM DM DM DM DM DM DM DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ 0 1 2 3 4 5 6 7 S0 S1 S2 S3 S4 S5 S6 S7 S0 # S1 # S2 # S3 # S4 # S5 # S6 # S7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ _ A_ DQ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
M _ A _ D Q [ 63 : 0 ] [ 4 ]
J D I MM 2B 1. 5V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 199 V D DS PD 3 .3 V S R1 2 4 [ 2 , 1 0 ] T S # _D I MM 0 _1 [ 3 , 1 0 ] D D R 3 _ D R A MR S T # C 24 C 23 [ 8 ] M V R E F _D Q_ D I MM A R4 1 MV R E F _ D I M 0 C 92 C 91 * 0_ 0 4 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 1 u _6 . 3 V _ X 5R _ 04 0 . 1 u_ 1 0 V _ X5 R _0 4 *1 0K _0 4 77 122 125 198 30 N C1 N C2 N CT E ST EVEN T# R ESET# VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 D1 7 D1 8 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V SS1 6 SS1 7 SS1 8 SS1 9 SS2 0 SS2 1 SS2 2 SS2 3 SS2 4 SS2 5 SS2 6 SS2 7 SS2 8 SS2 9 SS3 0 SS3 1 SS3 2 SS3 3 SS3 4 SS3 5 SS3 6 SS3 7 SS3 8 SS3 9 SS4 0 SS4 1 SS4 2 SS4 3 SS4 4 SS4 5 SS4 6 SS4 7 SS4 8 SS4 9 SS5 0 SS5 1 SS5 2 44 48 49 54 55 60 61 65 66 71 72 12 7 12 8 13 3 13 4 13 8 13 9 14 4 14 5 15 0 15 1 15 5 15 6 16 1 16 2 16 7 16 8 17 2 17 3 17 8 17 9 18 4 18 5 18 9 19 0 19 5 19 6
3 .3 VS
20 mi ls
C 10 1 1 u _6 . 3 V _ Y 5 V _ 0 4 C1 0 2 0 . 1 u_ 1 6 V _ Y 5 V _ 04
Sheet 9 of 43 DDR3 SO-DIMM_0

3 .3 V S
[4 ] M _ A_ BS0 [4 ] M _ A_ BS1 [4 ] M _ A_ BS2 [4 ] M _ A_ CS # 0 [4 ] M _ A_ CS # 1 [ 4 ] M_ A _ C L K _ D D R [ 4 ] M_ A _ C L K _ D D R [ 4 ] M_ A _ C L K _ D D R [ 4 ] M_ A _ C L K _ D D R [4 ] M _ A_ CK E0 [4 ] M _ A_ CK E1 [ 4 ] M_ A _ C A S # [ 4 ] M_ A _ R A S # [ 4 ] M_ A _ W E #
0 #0 1 #1
S A 0_ D I M0 S A 1_ D I M0
[ 10 , 1 4 ] S MB _C L K [ 1 0 , 1 4 ] S MB _ D A T A [ 4 ] M _ A _ OD T 0 [ 4 ] M _ A _ OD T 1
1 126
V R E F _ DQ V R E F _ CA
R N2 1 0 K _ 8P 4 R _0 4 1 8 S A 1 _D I M1 2 7 S A 0 _D I M1 3 6 S A 1 _D I M0 4 5 S A 0 _D I M0
S A 1 _ D I M 1 [ 10 ] S A 0 _ D I M 1 [ 10 ]
1 u _6 . 3 V _ X 5R _ 04 0 . 1 u_ 1 0 V _ X5 R _0 4
V T T _ ME M VTT1 VTT2 G1 G2 20 3 20 4 GN D 1 GN D 2
CLOSE TO S O- DIMM _0
[ 4 ] M_ A _ D Q S [ 7 : 0 ]
1. 5 V
R 94
1 K _ 1 %_ 0 4
MV R E F _ D I M 0
R1 0 3 1K _ 1 % _ 04
D D R S K -2 0 40 1 -T R 5 B
[ 4 ] M _A _ D QS # [ 7 : 0 ]
D D R S K -2 04 0 1 -T R 5 B V T T _ ME M
C1 0 3 1 u_ 6 . 3 V _ X 5R _ 04
C1 0 5 1 u_ 6 . 3 V _ X5 R _0 4
C1 0 4 1u _ 6 . 3 V _X 5 R _ 0 4
C 1 06 1 u _ 6 . 3V _ X 5 R _ 0 4
C 1 11 1 0 u _6 . 3 V _ X 5R _ 06
1 .5 V
+ C3 4 7
C3 7 0 *2 2 0 u_ 4 V _ V _ A
C 64 1 0 u_ 1 0 V _ Y 5 V _ 08
C5 7 1 0u _ 1 0 V _Y 5 V _ 08
C5 5 1 0u _ 6 . 3V _X 5 R _ 0 6
C6 1 1u _ 6 . 3V _X 5 R _ 0 4
C 40 1 u _ 6 . 3V _ X 5 R _ 0 4
C 70 1 u _ 6. 3 V _ X 5 R _ 0 4
C 84 1 u _6 . 3 V _ X 5R _ 04
C4 6 1 u_ 6 . 3 V _ X5 R _ 04 [ 3 , 6, 8 , 1 0 , 2 0, 26 , 2 8 , 31 , 3 3 ] [ 10 , 3 3 ] [ 3 , 1 0, 11 , 1 2 , 13 , 1 4 , 1 5, 16 , 1 7 , 18 , 1 9 , 2 0, 23 , 2 4 , 25 , 2 7 , 2 8, 29 , 3 0 , 31 , 3 6 ] [ 1 9 , 29 , 3 1 ] 1 .5 V V T T _M E M 3 .3 VS 1 .5 VS
5 6 0 u_ 2 . 5 V _ 6 . 6* 6 . 6* 5 . 9
1 . 5V
C3 7 0 . 1 u_ 1 0 V _ X5 R _0 4
C8 6 0 . 1u _ 1 0V _X 5 R _ 0 4
C6 8 0. 1 u _ 1 0V _ X 5 R _ 0 4
C 82 0 . 1 u _ 10 V _ X 5 R _ 0 4
C 48 0 . 1 u _1 0 V _ X 5R _ 04
C 49 0 . 1 u_ 1 0 V _ X5 R _0 4
C5 1 0 . 1 u_ 1 0 V _ X5 R _0 4
C5 0 0 . 1u _ 1 0V _X 5 R _ 0 4
C5 2 0. 1 u _ 1 0V _ X 5 R _ 0 4
C 47 0 . 1 u _ 10 V _ X 5 R _ 0 4
B - 10 DDR3 SO-DIMM_0
Schematic Diagrams
DDR3 SO-DIMM_1 CHANGE TO STANDARD SO-DIMM B

[ 4 ] M _ B _B [ 15 : 0 ] J D I M M1 A M M M M M M M M M M M M M M M M _ B_ B0 _ B_ B1 _ B_ B2 _ B_ B3 _ B_ B4 _ B_ B5 _ B_ B6 _ B_ B7 _ B_ B8 _ B_ B9 _ B _ B 10 _ B _ B 11 _ B _ B 12 _ B _ B 13 _ B _ B 14 _ B _ B 15 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187 [ 4 ] M_ B _ D QS [ 7 : 0 ] M M M M M M M M M M M M M M M M _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS _ B _ D QS 0 1 2 3 4 5 6 7 #0 #1 #2 #3 #4 #5 #6 #7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0/ A P A1 1 A 1 2/ B C # A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # CK0 CK0 # CK1 CK1 # CKE 0 CKE 1 CAS # RAS # W E# SA0 SA1 S CL S DA OD T0 OD T1 DM DM DM DM DM DM DM DM DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ 0 1 2 3 4 5 6 7 S0 S1 S2 S3 S4 S5 S6 S7 S 0# S 1# S 2# S 3# S 4# S 5# S 6# S 7# D Q0 D Q1 D Q2 D Q3 D Q4 D Q5 D Q6 D Q7 D Q8 D Q9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 M_ B _ D Q [ 6 3: 0 ] [ 4 ] 1 . 5V J D I M M1 B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 44 48 49 54 55 60 61 65 66 71 72 1 27 1 28 1 33 1 34 1 38 1 39 1 44 1 45 1 50 1 51 1 55 1 56 1 61 1 62 1 67 1 68 1 72 1 73 1 78 1 79 1 84 1 85 1 89 1 90 1 95 1 96
[ 4 ] M _B _ B S 0 [ 4 ] M _B _ B S 1 [ 4 ] M _B _ B S 2 [ 4 ] M _B _ C S # 0 [ 4 ] M _B _ C S # 1 [ 4] M_ B _ C L K _ D D [ 4] M_ B _ C L K _ D D [ 4] M_ B _ C L K _ D D [ 4] M_ B _ C L K _ D D [ 4 ] M _B _ C K E 0 [ 4 ] M _B _ C K E 1 [ 4 ] M _ B _C A S # [ 4 ] M _ B _R A S # [ 4 ] M _ B _W E # [ 9 ] S A 0_ D I M1 [ 9 ] S A 1_ D I M1 [ 9 , 1 4] S MB _ C L K [ 9 , 14 ] S MB _ D A T A [ 4 ] M _B _ O D T 0 [ 4 ] M _B _ O D T 1
R0 R# 0 R1 R# 1
3. 3 V S
2 0 mil s
C4 1 6 1u _ 6 . 3V _Y 5 V _0 4 C4 1 5 0 . 1u _ 1 6V _Y 5 V _0 4
199 V DD S P D 77 122 125 198 30 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 NC1 NC2 NCT E S T E V E NT # RES ET #
SA 0 _ DIM 1 SA 1 _ DIM 1
[ 2 , 9 ] T S # _D I MM 0 _1 [ 3 , 9 ] D D R 3 _ D R A MR S T # C2 6 C2 5 [ 8] MV R E F _ D Q_ D I MM B R 42 MV R E F _ D I M 1 C 89 C 88 1 u_ 6 . 3 V _ X5 R _0 4 0 . 1u _ 1 0V _X 5 R _ 0 4 * 0 _0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 0 . 1 u _1 0 V _ X 5R _ 04
V RE F _ D Q V RE F _ C A VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5
Sheet 10 of 43 DDR3 SO-DIMM_1
V TT _ ME M VTT1 VTT2 G1 G2 2 03 2 04 GN D 1 GN D 2
C LO SE TO SO -DI MM_ 1
R 97 1 K _ 1% _ 0 4 MV R E F _ D I M 1
1 .5 V
D D R S K -2 0 4 01 -T R 9D R 98 1 K _ 1% _ 0 4
[ 4 ] M _B _D QS # [ 7 : 0 ]
D D R S K -20 4 0 1-T R 9D
La y out Note : S O- DIMM_1 i s pla c ed fa rthe r from the G MC H t ha n S O- DIMM_0

V T T _ ME M
C1 1 0 1 u_ 6 . 3 V _ X5 R _0 4
C1 0 9 1u _ 6 . 3V _X 5 R _ 0 4
C 1 07 1 u _ 6. 3 V _ X 5 R _ 0 4
C1 0 8 1 u _6 . 3 V _ X 5R _0 4
C1 1 2 10 u _ 6 . 3V _ X 5 R _ 0 6
1 .5 V
C3 7 9 1 0u _ 1 0V _Y 5 V _0 8
C7 8 10 u _ 10 V _ Y 5V _ 0 8
C 3 80 1 0 u _1 0 V _ Y 5 V _ 0 8
C4 4 1 u _6 . 3 V _ X 5R _0 4
C8 3 1u _ 6 . 3 V _X 5 R _ 0 4
C 76 1 u _ 6. 3V _ X 5 R _ 0 4
C 39 1 u _6 . 3 V _ X 5R _ 04
C7 3 1 u_ 6 . 3 V _ X5 R _0 4 [ 1 9 , 29 , 3 1 ] [ 3, 6 , 8 , 9 , 2 0, 2 6 , 2 8 , 31 , 3 3 ] [9 ,3 3 ] [ 3 , 9 , 1 1, 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0, 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 6 ] 1 . 5V S 1 . 5V V T T_ M E M 3 . 3V S
1 . 5V
C4 5 0 . 1u _ 1 0 V _X 5 R _ 0 4
C4 2 0. 1 u _ 10 V _ X 5 R _ 0 4
C 41 0 . 1 u _1 0 V _ X 5R _ 04
C8 1 0 . 1 u_ 1 0 V _ X5 R _ 0 4
C3 6 0. 1u _ 1 0V _ X 5 R _ 0 4
C 85 0 . 1 u _ 10 V _ X 5R _ 04
C 35 0 . 1 u_ 1 0 V _ X5 R _0 4
C3 8 0 . 1u _ 1 0V _X 5 R _ 0 4
C7 5 0. 1 u _ 10 V _ X 5 R _ 0 4
C 43 0 . 1 u _1 0 V _ X5 R _0 4
DDR3 SO-DIMM_1 B - 11
Schematic Diagrams
LVDS, Inverter
PANEL CONNECTOR
30Pin
V IN V IN VL ED R1 0 2 . 2 K _0 4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 P _ DD C_ DA T A P _ DD C_ CL K B R I GH T N E S S I N V _B L O N L V D S -L 2 N L V D S -L 2 P E M B _H P D 3 .3 V S R9 2 . 2K _ 0 4
2A
L2 * H C B 16 0 8 K F -1 21 T 25
30Pin & 40 Pin Co-layout--LED PANEL.

PLVDD HI LVDS:3.3V 3A HI eDP:3.3V 3A LOW eDP;5V 3A PLVDD_SEL HI ? 5V 3A LOW ? 3.3V 3A
2A
PL VD D_ S EL
J _L C D 2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 8 7 21 6 -3 00 6
Q4 7 R 60 7 1 M_ 0 4 P 20 0 3 E V G
3 2 1
8 7 6 5
C5 1 7 0. 1 u _ 50 V _ Y 5 V _ 06 L V D S -LC LK N L V D S -LC LK P L V D S -L1 N L V D S -L1 P L V D S -L0 N L V D S -L0 P
C 58 7 * 0. 1 u _ 50 V _ Y 5 V _ 0 6
Q4 8 MT N 7 0 02 Z H S 3 G N B _E N A V D D
1A 3A
3 .3 VS PL VDD 5 VS
3. 3 V S
R5 7 9
0 _ 06 P L V DD
3 .3 VS R5 8 0 R5 8 1 *1 0 0 K _0 4
C5 1 8
C 5 19
C 52 0
Q 43 *A O 34 1 5 S D
3A
>10 mi 0 l
Q 41 A O 34 1 5 S D
3A
>10 0mil
C5 4 3 0 . 1u _ 1 6V _ Y 5 V _ 0 4 C5 4 5 R 5 77 R 6 08 * 2 00 _ 1% _ 0 4 S D
> 100 mil

C 54 2 G C5 4 4 0 . 1 u _1 6 V _ Y 5 V _ 04 G 0 . 1 u_ 1 6 V _Y 5 V _ 0 4
11/3
4 . 7 u _1 0 V _ Y 5 V _ 08 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5V _0 4
*1 0 0K _0 4 D Q4 4 *M T N 7 00 2 Z H S 3 S 5V S Q 45 *A O 34 1 5 S D R5 7 8 G 3 3 0 K _0 4 Q 42 M T N 7 00 2 Z H S 3 G S D R2 4 4 1 00 K _ 0 4 1 0u _ 10 V _ Y 5 V _ 08
P L V D D _S E L
Sheet 11 of 43 LVDS, Inverter
40Pin
VL ED
> 100 mil
2A
P L V D D _S E L
J _ L CD1 * 8 72 1 6-4 0 0 6 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 P _ DD C_ DA T A P _ DD C_ CL K B R I GH TN E S S B R I G H T N E S S [ 27 ] I N V _B L O N L V D S -L 2 N L V D S -L 2 P E M B _H P D L V D S -L2 N [ 16 ] L V D S -L2 P [ 1 6 ] P _ D D C _ D A TA [ 16 ] P _ D D C _ C LK [ 1 6 ]
[ 1 6 , 2 7] N B _ E N A V D D
R 37 0 1 0 0K _ 0 4
Q4 9 *M TN 7 00 2 Z H S 3 G
[ 1 6] L V D S -L C L K N [ 1 6] L V D S -L C L K P [ 1 6 ] L V D S -L 1 N [ 1 6 ] L V D S -L 1 P [ 1 6] LV D S -L 0N [ 1 6 ] L V D S -L 0 P [ 1 6 ] L V D S -U C L K N [ 1 6 ] L V D S -U C L K P
L V D S -L C L K N L V D S -L C L K P L V D S -L 1 N L V D S -L 1 P L V D S -L 0 N L V D S -L 0 P
11/0 3
RN1 2 8 7 6 5 RN1 3 8 7 6 5 RN1 4 8 7 6 5 RN1 5 8 7 6 5 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4
1A 3A
MU MU MU MU X _2 N X _2 P X _0 N X _0 P
E MB _ H P D
[ 2] 3 .3 VS PL VD D [ 16 ] [1 6 ] [1 6 ] [1 6 ] [ 16 ] [1 6 ] [2 ] [2 ] [2 ] [2 ] [2 ] [2 ] L V D S -U 2 N LV D S -U 2 P LV D S -U 1 N LV D S -U 1 P L V D S -U 0 N LV D S -U 0 P D P _ T XN 1 D P _ TX P 1 D P _ T XN 0 D P _ TX P 0 DP _ A UX N D P _ A UXP 0 _ 8P 4 R _0 4 M M M M M M U X _ 2N U X _ 2P U X _ 1N U X _ 1P U X _ 0N U X _ 0P
0 _ 8P 4 R _0 4
G1
G2
M U X _ 1N M U X _ 1P
* 0_ 8 P 4 R _ 04 D P _ TX P 2 [ 2 ] D P _ T XN 2 [ 2] * 0_ 8 P 4 R _ 04 D P _ TX P 3 [ 2 ] D P _ T XN 3 [ 2]
G 1
INVERTER CONNECTOR
3 .3 V 3. 3 V R2 6 8 * 10 0 K _ 04 B K L _E N [ 2 7 ] B K L_ E N [ 1 6 ] B L ON R2 6 7 B LO N 2 5 7 1 0 0K _0 4 7 1 3 4 6 14 U1 6 A 7 4L V C 08 P W 14 U1 6 B 7 4L V C 08 P W C 2 14 * 0 . 1u _ 10 V _ Y 5 V _ 0 4 3. 3 V
G2
U 1 6C 74 L V C 0 8 P W 8 I N V _ B LO N R2 8 0 *1 M_ 0 4 C2 1 3 0 . 1 u_ 1 6V _Y 5V _ 0 4 [ 1 2, 1 9 , 2 0, 2 5 , 2 9, 3 0 , 3 1, 3 6 , 3 7] [ 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 6, 3 7 , 3 8] [ 2 , 3 , 8 , 13 , 1 4, 15 , 1 7, 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 6, 2 8 , 3 0, 3 1 , 3 3, 3 4 , 3 5] [ 3, 9 , 1 0 , 12 , 1 3 , 14 , 1 5, 16 , 1 7, 1 8 , 1 9, 2 0 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 6] [ 3 1, 3 2 , 3 4] 5 VS VI N 3 .3 V 3 .3 VS S Y S 1 5V
[ 1 8] S B _B L O N 3. 3 V R 2 66 *1 0 0K _0 4 U1 6 D 7 4L V C 08 P W 11 13 [ 1 5, 2 7 , 3 6] A L L _ S Y S _ P W R GD 7 14 12
9 10 7
[ 2 7, 3 0 ] L I D _ S W #
B - 12 LVDS, Inverter
14
*1 00 K _ 0 4
Schematic Diagrams
HDMI, CRT
HDMI PORT
FOR INTEL GRAPHIC
U5 [ 1 6] H D MI B_ D 2B P [ 1 6] H D MI B_ D 2B N [ 1 6] H D MI B_ D 1B P [ 1 6] H D MI B_ D 1B N [ 1 6] H D MI B_ D 0B P [ 1 6] H D MI B_ D 0B N [ 1 6] H D MI B_ C LK B P [ 1 6] H D MI B_ C LK B N [1 6] H D MI _C T R LC L K [ 1 6] H D MI _C T R LD A TA [ 16 ] POR T C _H P D 3 . 3V S R6 1 R6 8 R 39 8 * 10 mil _0 4 *4. 7 K_ 04 *0_ 04 H D MI _C T RLC L K H D MI _C T RLD A TA 39 38 42 41 45 44 48 47 9 8 IN _ D 1+ IN _ D 1IN _ D 2+ IN _ D 2IN _ D 3+ IN _ D 3IN _ D 4+ IN _ D 4SC L SD A H PD OE# D C C _E N # P C0 P C1 R 3 96 R5 3 R5 1 4. 02 K _1% _0 4 *4. 7 K_ 04 *4. 7 K_ 04 32 10 3 4 6 34 35 D C C _E N # R T_E N# PC 0 PC 1 R EX T OE_ 1 QE_ 2 22 OU T_D 1+ 23 OU T _D 1 19 OU T_D 2+ 20 OU T _D 2 16 OU T_D 3+ 17 OU T _D 3 13 OU T_D 4+ 14 OU T _D 4 28 S C L _S I N K 29 S D A _S I N K 30 H P D _S I N K 2 V C C [ 1 ] 11 V C C [ 2 ] 15 V C C [ 3 ] 21 V C C [ 4 ] 26 V C C [ 5 ] 33 V C C [ 6 ] 40 V C C [ 7 ] 46 V CC[8 ] 1 GN D [ 1 ] 5 GN D [ 2 ] 12 GN D [ 3 ] 18 GN D [ 4 ] 24 GN D [ 5 ] 27 GN D [ 6 ] 31 GN D [ 7 ] 36 GN D [ 8 ] 37 GN D [ 9 ] 43 GN D [ 10 ] H D MI B _D A T A2 P H D MI B _D A T A2 N H D MI B _D A T A1 P H D MI B _D A T A1 N H D MI B _D A T A0 P H D MI B _D A T A0 N H D MI B _C L OC K P H D MI B _C L OC K N H D MI B _E X T1_ S C L H D MI B _E X T1_ S D A H D MI B _E X T1 _S D A H D MI _ H PD -C R 55 10 0K _ 04 3. 3V S C 33 8 0. 1 u_ 16V _ Y 5V _0 4 C 3 39 0. 1 u_ 16 V_ Y 5V _ 04 8 T MD S _D A TA 1# T MD S _D A TA 1 C 31 0. 1 u_ 16V _ Y 5V _0 4 C 3 40 0. 1 u_ 16 V_ Y 5V _ 04 6 4 TMD S D A TA 1+ 2 S H I EL D 2 TMD S D A TA 2+ G ND GND GND GND T MDS D A T A2 1 T MD S _C LO C K# T MD S _C LO C K C 3 48 1 0u _1 0V _Y 5 V_ 08 C 349 10u _1 0V _Y 5 V _0 8 18 16 S DA 14 R E SE R V E D 12 10 TMD S C LO C KTMD S C LO C K+ T MDS D A T A0 S H I EL D 0 TMD S D A TA 0+ TMD S D A TA 1S H I E LD 1 CE C CLK S H IE L D 11 9 7 5 3 TM D S_ DA TA 2# TM D S_ DA TA 2 TM D S_ DA TA 0# TM D S_ DA TA 0 S CL 13 HOT P LU G D E TE C T +5 V D D C/ C E C GN D 19 17 15 HD MI B _E XT 1_ S C L HD MI _C EC R 70 *0_ 04 HD MI _H PD -C J_H D MI1 5V S R 4 00 1_ 04 5 VS _ H D MI _I N R 40 1 1 _0 4 5V S _H D MI R 4 03 2. 2K _ 04 R 404 2. 2 K _04 H D MI _ H PD-C 5 VS _ H D MI
For ESD
C C RD2 A A RD1
A RD3
AC
AC
*B A V9 9 R E C TI F I E R *B AV 9 9 R E C TI F I ER *B A V 99 R EC T I FI E R
H D MI B _E X T1_ S C L H D MI B _E X T1_ S D A
M_P OR TB _ H PD # _R 7 25
AC
10/28
3. 3 VS
4 3 L1 0 1 2 *W CM20 12 F2 S -SH OR T R 69 *0_ 04 R 72 *0_ 04 4 3 L1 2 1 2 *W CM20 12 F2 S -SH OR T R 71 *0_ 04
H D MI B _D A TA 0 N H D MI B _D A T A0 P
H D MI B _D A TA 2 N H D MI B _D A T A2 P
49
GN D S N 75 D P 139 P I N 4 9= GN D
C 30 0. 1 u_ 16V _ Y 5V _0 4 R 64 HD MI B_ C LOC K P HD MI B_ C LOC K N *0_ 04 T MD S _C L OC K T MD S _C L OC K # 4 3 L9 1 2 *W C M20 12 F 2S -SH OR T R 65 *0_ 04 R 66 *0_ 04 4 3 L 11 1 2 *W C M20 12 F 2S -SH OR T R 67 *0_ 04
C 12 81 7-11 9A 5 L
PS8101 (6-03-08101-032) PIN TO PIN

3. 3V S R 54 R 52 R 395 ? ? ? 4. 7 K_ 04 4. 7 K_ 04 *4. 7 K_ 04 D C C _E N # HD MI B_ D A TA 1P P C0 HD MI B_ D A TA 1N P C1
T MD S _D A TA 1 T MD S _D A TA 1 #
CRT PORT
3. 3 V S
5 VS
GND1 GND2 GND3 GND4
Sheet 12 of 43 HDMI, CRT
6-19-3100 1-264
1 2 3 4 RE D [ 16 ] D AC _ R E D [ 16 ] D AC _ GR E EN [ 16 ] D AC _ BL UE 1 50 _1 %_0 4 *10 p_ 50 V_ N P O _0 4 C 2 1 *1 0p _5 0V _N P O _ 04 C 1 7 * 10 p_5 0V _ N PO _ 04 150 _1 %_ 04 15 0_ 1% _04 RN1 2. 2 K _8P 4 R _0 4
J_ C R T1 10 8A H 15 F ST 04 A 1C C 1 9 2 GR N B LU E 10 p_5 0V _ N PO _ 04 3 4 12 5 13 6 14 7 15 C 1 5 1 000 p_ 50 V_ X 7R _ 04 8 C 19 C 18 GN D1 GN D2
6-20-14X30-015 10/29
2 2p _5 0V _N P O _0 4
22 p_ 50 V_ N P O _0 4
1 0p _50 V _N P O _0 4
10 p_ 50 V_ N P O _0 4
22p _5 0V _ N PO _ 04
[ 16 ] D A C _D D C AD A TA [ 16 ] D A C _D D C AC L K [ 16 ] D A C _HS Y N C [ 16 ] D A C _ VS Y N C 5V S 3 . 3V S 3. 3V S 0. 2 2u _1 0V _Y 5V _ 04 0. 22 u_ 10 V_ Y 5V _0 4 C 3 11 0 . 22u _1 0V _Y 5 V_ 04
10 11 13 15 1
U 33 DDC_ IN1 DDC_ IN2 S Y N C _ IN 1 S Y N C _ IN 2 V C C _ SY N C
D D C _OU T 1 D D C _OU T 2 S Y N C _OU T 1 S Y N C _OU T 2 V ID E O_ 1
9 12 14 16 3 4 C R T_ H S Y N C C R T_ V SY N C R 37 2 R 37 3 3 3_0 4 3 3_0 4
DD C D A TA DD C L K HS Y N C
R1 4
C2 0
C1 4
R 15
R 13
C 13
C 12
C 16
B LU E GR N RE D
2 V C C _ VI D E O 7 8 V CC_ DDC BYP TP D 7S 0 19 V ID E O_ 2 V ID E O_ 3 GN D
5 6
C 3 13
C 31 2
[ 3, 9 ,1 0, 1 1, 13 , 14 , 15, 1 6, 1 7, 18 , 19 ,2 0, 2 3, 24 , 25 , 27, 2 8, 2 9, 30 , 31 ,3 6] 3. 3 VS [ 1 1, 19 , 20 , 25, 2 9, 3 0, 31 , 36 ,3 7] 5V S
C 11 22 0p _50 V _N P O _0 4
C 9 2 20 p_ 50 V_ N PO _04
VS Y NC
C 7 10 00 p_ 50 V_ X 7R _0 4
. . .
. . .
8 7 6 5
L7 L6 L4
0_ 04 0_ 04 0_ 04
L8 L5 L3
FC M1 00 5MF -60 0T 01 FC M1 00 5MF -60 0T 01 FC M1 00 5MF -60 0T 01
24 mil
10 11 DDCDAT A HS Y NC V S Y NC DDCL K
HDMI, CRT B - 13
Schematic Diagrams
CougarPoint - M 1/9
RT C V CC
20mil
V DD 3 R T C_ V B A T _ 1
D 17 B A T5 4 C S 3 1 A C 3 2 A
20mil
C 4 66 1 u_ 6 . 3 V _ X5 R _0 6 C4 6 8 1 8 p_ 5 0 V _ N P O _0 4
2 1
2 1
R 47 6 1 K_ 0 4
11 /05
R4 7 7 2 0K _1 % _ 04 1 C4 6 5
CougarPoint - M (HDA,JTAG,SATA)
X 12 *3 2 . 7 68 K H z R 4 78 1 0 M_ 0 4 RT C_ X 1 R TC _ X2 R T C _ R S T# S R T C _ R S T# A2 0 C2 0 D2 0 G2 2 K2 2 C1 7 I N T V R ME N RT CX 1 RT CX 2 RT CR S T # S RT C RS T # INT RU DE R # F W H0 F W H1 F W H2 F W H3 / / / / L AD L AD L AD L AD 0 1 2 3 C3 8 A3 8 B3 7 C3 7 D3 6 LP C LP C LP C LP C _ A D0 _ A D1 _ A D2 _ A D3 U 3 7A 3 4
3 .3 VS S A T A _ L E D # R 4 45 S E R IRQ G P I O2 1 R 1 68 R 1 83 *1 0 K _ 0 4 1 0K _0 4 1 0K _0 4
R TC CL EA R
JO P E N 1 *OP E N _ 1 0m i l -1M M 2 X1 3 MC -30 6 _ 32 . 7 6 8K H z
J _R T C 1 R T C_ V B A T 1
1 u _6 . 3 V _ X5 R _0 6
J _RTC 1
2 8 52 0 5 -02 7 0 1
R2 3 7 2 0K _1 % _ 04 R 2 36 1 M _0 4 C2 0 6 1 u _6 . 3 V _ X5 R _0 6 R T CVC C
Zo= 5 0O? 5%
LPC
10mil
C4 6 3 1 8 p_ 5 0 V _ N P O _0 4
3 4
[ 2 3 , 27 ] [ 2 3 , 27 ] [ 2 3 , 27 ] [ 2 3 , 27 ]
R 2 30 3 . 3V S 1 0 K_ 0 4 R2 2 9 *1 0 K _ 04
F W H 4 / LF R A M E #
LP C _ F R A M E # [ 23 , 2 7 ] E3 6 K3 6 V5 B o a rd I D S E R I R Q [ 2 3 , 2 7]
R2 3 5
3 3 0 K _0 4
P C H _I N T V R M E N
RTC
1 2
S M_ I N T R U D E R #
L DRQ 0 # L D R Q1 # / GP I O 2 3 S E RI RQ S AT A0 RXN S A TA 0 R XP S A T A 0T X N S A T A 0 T XP S AT A1 RXN S A TA 1 R XP S A T A 1T X N S A T A 1 T XP S AT A2 RXN S A TA 2 R XP S A T A 2T X N S A T A 2 T XP
H DA _ B IT CL K _ R
N3 4 L34 HD A _ SYN C T10 SPKR K3 4 HD A _ RS T # E3 4
3. 3 V S
NO REBOOT STRAP
R 19 5 *1 K _ 0 4 HD A _ S P K R
3 . 3A _ 1 . 5 A _ H D A _I O [2 9 ] HD A _ S P K R
R2 2 4
1 K_ 0 4
H DA _ S Y N C_ R H DA _ S P K R H DA _ RS T # _ R
SATA 6G
HD A _ B CL K
A M3 A M1 AP7 AP5 A M1 0 A M8 AP1 1 AP1 0 A D7 A D5 A H5 A H4 AB8 AB1 0 AF3 AF1 Y7 Y5 A D3 A D1 Y3 Y1 AB3 AB1 Y1 1 S A T A I C OMP
S A TA S A TA S A TA S A TA
RX N0 RX P 0 TX N 0 TX P 0
[2 5 ] [ 2 5] [2 5 ] [2 5 ]
SATA HDD
[2 5 ] [ 2 5] [2 5 ] [2 5 ]
IHDA
Sheet 13 of 43 CougarPoint - M 1/9
N O REB OO T ST RA P: HD A_ SP KR Hi gh E na bl e
[ 29 ] H D A _ S D I N 0 [ 28 ] H D A _ S D I N 1
HD A _ S DIN 0 G3 4 HD A _ S DIN 1 C3 4 HD A _ S DIN 2 HD A _ S DIN 3
3. 3 V S
iTPM ENABLE/DISABLE
R 16 7 *1 K _ 0 4 SPI_ SI 3. 3 A _ 1 . 5 A _H D A _ I O R2 6 9 *1 K _ 04
S A T A RX N2 S A T A RX P 2 S A T A TX N 2 S A T A TX P 2
SATA ODD
10 /29
* 28 m i l_ 0 6 R B 7 5 1S - 40 C 2 A C D1 2 H DA _ S DO UT _ R
A3 4 A3 6
T PM FU NC TI ON :S PI_ SI H ig h Ena bl e
[ 2 7 ] M E _W E R 46 8
S AT A3 RXN S A TA 3 R XP S A T A 3T X N S A T A 3 T XP
SATA
HD A _ S DO R5 3 8 R5 3 9 * 1 0K _ 0 4 0_04 C3 6 N3 2 H D A _ D OC K _ R S T # / GP I O1 3 H D A _ D OC K _ E N # / G P I O3 3
11/0 5 Flash Descriptor Security Overide

[ 26 ] U S B 3 0_ S M I #
3. 3 V
S AT A4 RXN S A TA 4 R XP S A T A 4T X N S A T A 4 T XP S AT A5 RXN S A TA 5 R XP S A T A 5T X N S A T A 5 T XP
HDA_SDOUT
HIGH = Enable LOW = Disable
P C H _ J T A G_ T D I P C H _ J T A G_ T D O
K5 J TA G _ TD I H 1 J TA G _ TD O
JTAG
10 /28 Flash Descriptor Security Overide Low = Disabled-(Default) High = Enabled
P C H _ J T A G_ T C K _ B U F P C H _ J T A G_ T MS
J3 J TA G _ TC K H 7 J TA G _ TM S
S A TA I C OM P O Y1 0 S A T A I C O MP I AB1 2 S A T A 3 R C OM P O AB1 3 S A T A 3 C O MP I S A T A 3 C O MP
R1 7 2
3 7. 4 _ 1 % _0 4
1. 0 5 V S
3. 3 V S NC 1
BIOS ROM
SPI_* = 1.5"~6.5"
U 17 3 .3 VS_ SPI R2 9 4 *3 . 3 K _ 1% _ 0 4 S P I _W P # 8 VD D SI 2 SO 3 W P# CE # 6 S CK 4 H OL D # VSS 1 S P I_ CS 0 # S P I_ S O SPI_ SCL K R 4 41 *3 3 _ 04 S P I _ S O_ R U 3 SPI_ SO
R1 7 1
4 9. 9 _ 1 % _0 4
1. 0 5 V S
*N C _ 0 4 C 22 1 * 0. 1 u _ 16 V _ Y 5V _ 0 4
32Mbit
5 SPI_ SI
SPI
S P I_ S CL K _ R S P I_ S I_ R S P I _ S O_ R S P I_ CS 0 # _ R
R N 16 0_ 8 P 4 R _ 0 4 8 1 7 2 6 3 5 4
S P I _ S C LK H S P I _ S C L K [ 2 7] H S P I _ M S I [ 2 7] HS P I_ M S O [2 7 ] H S P I _ C E # [ 27 ] S P I _ C S 0#
R4 4 4 R1 7 6
* 0 _0 4 * 0 _0 4
S P I_ S CL K _ R T 3 S P I_ CL K S P I _ C S 0 # _R Y 1 4 S P I_ CS 0 # S P I_ CS 1 # T1 S P I_ CS 1 # S A TA L E D # S A TA 0 G P / GP I O 2 1 S A TA 1 G P / GP I O 1 9 S A T A 3 RB IA S
A H1
R B IA S _ S A T A 3
R4 3 2
7 50 _ 1 %_ 0 4
P3 V1 4 P1
S A TA _L E D # G P I O 21
S A T A _ L E D# [2 8 ]
S P I_ S I
R1 7 8
* 0 _0 4
S P I_ S I_ R
V4
S P I _ MO S I S P I _ MI S O C o u g ar P oi n t _ R e v _ 1p 0
R2 9 1 *3 . 3 K _ 1% _ 0 4 S P I _H OL D # 7
B B S _ B I T 0 [ 1 7]
* P C T 2 5 V F 0 32 B P C B F oo t p ri nt = M -S OP 8B 3. 3 V
10/29
R 23 8 2 1 0_ 1 % _0 6
R 21 8 2 1 0_ 1 % _0 6
R 22 3 2 1 0_ 1 % _ 06 P C H _ J T A G_ T MS P C H _ J T A G_ T D I P C H _ J T A G_ T D O
[ 2 8 ] H D A _ S D O _M D C [ 2 8 ] H D A _ S Y N C _ MD C [ 2 8] H D A _R S T #_ M D C [ 2 8 ] H D A _ B I T C L K _ MD C
R N1 7 * 3 3_ 8 P 4 R _ 0 4 8 1 7 2 6 3 5 4
H H H H
D A _ S D OU T _ R DA _ S Y NC_ R D A _ R S T# _ R DA _ B IT CL K _ R
4 3 2 1
5 6 7 8
H D A _ S D O U T [ 2 9] H D A _ S Y N C [ 2 9] H DA _ RS T # [2 9 ] H D A _ B I TC L K [ 2 9]
11/04
33 _ 8 P 4R _ 04 R N1 8 [ 11 , 1 2 , 1 9, 2 0 , 2 5, [ 2 2, [ 2 , 3, 8, 1 1 , 1 4, 1 5 , 1 7 , 18 , 1 9 , 20 , 2 2 , 2 3, 2 6 , 2 8, [ 3 , 9 , 10 , 1 1 , 1 2, 1 4 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 20 , 2 3 , 2 4, 2 5 , 2 7, [ [ 20 ] 3 . 3 A _ 1. 5 A _ H D A _ I O [ 15 , 2 0 ] R T C V C C 29 , 3 0 , 31 , 3 6 , 3 7] 5 V S 24 , 2 7 , 31 , 3 2 , 3 8] V D D 3 30 , 3 1 , 33 , 3 4 , 3 5] 3 . 3 V 28 , 2 9 , 30 , 3 1 , 3 6] 3 . 3 V S 14 , 1 5 , 19 , 2 0 , 3 4] 1 . 0 5 V S
R 45 9 10 0 _ 1% _ 0 4
R 21 1 1 0 0_ 1 % _0 4
R 20 9 1 0 0_ 1 % _ 04
R4 5 8
5 1 _0 4
P C H _ J T A G_ T C K _ B U F
B - 14 CougarPoint - M 1/9
Schematic Diagrams
CougarPoint - M 2/9
3 .3 V
CougarPoint - M (PCI-E,SMBUS,CLK)
U 3 7B T 71 T 72 T 12 T 13 [ 26 ] [ 26 ] [2 6 ] [2 6 ] P C I E _ R XN P C I E _ R XP P C I E _ T XN P C I E _ T XP 2 _ US B 3 0 2_ U S B 3 0 2 _ US B 3 0 2_ U S B 3 0 P CI E _ RX N1 P CI E _ RX P 1 P C I E _ TX N 1 P C I E _ TX P 1 B G 34 B J 34 A V 32 A U 32 BE BF BB AY 34 34 32 32 P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P P E RN 1 E RP 1 E T N1 ETP1 E RN 2 E RP 2 E T N2 ETP2 E RN 3 E RP 3 E T N3 ETP3 E RN 4 E RP 4 E T N4 ETP4 E RN 5 E RP 5 E T N5 ETP5 E RN 6 E RP 6 E T N6 ETP6 E RN 7 E RP 7 E T N7 ETP7 E RN 8 E RP 8 E T N8 ETP8
S MB _ C L K S MB _ D A T A S ML 0 _ D A T A S ML 0 _ C L K
R N9 2 . 2 K _ 8P 4R 8 7 6 5
_ 04 1 2 3 4
S MC _ C P U _ TH E R M R 2 49 S MD _ C P U _ TH E R M R 2 56 D R A MR S T _ C N TR L R 4 82 S MB A LE R T # / GP I O1 1 S MB C L K C 9 SM BD ATA S MB _D A T A E1 2 H 14 B T _S B D # S MB _C L K B T _ S B D # [ 2 2] S M B _ CL K [9 ,1 0 ] S M B _ DA T A [9 ,1 0 ] B T _S B D # LP D _ S P I _ I N T R # P E G_ B _ C L K R Q # P C I E C L K R Q0 # P C I E C L K R Q7 # P E G_ C L K R E Q # 3G _ B _ C L K R Q# R 2 48 R 2 50 R 4 81 R 5 40 R 5 41 R 2 19 R 2 62
2. 2 K _ 0 4 2. 2 K _ 0 4 1K _ 0 4 10 K _ 0 4 10 K _ 0 4 *1 0 K _ 04 *1 0 K _ 04 *1 0 K _ 04 *1 0 K _ 04 *1 0 K _ 04 3 .3 V S
SMBUS
C 13 1 C 13 2
0 . 1 u _1 0 V _ X 7R _ 0 4 0 . 1 u _1 0 V _ X 7R _ 0 4
P C I E _ TX N 2_ C P C I E _ TX P 2 _ C
A1 2 S M L 0A LE R T # / GP I O6 0 C 8 S M L0 C L K G 12 S M L0 D A T A
D R A MR S T _ C N T R L S ML 0 _ C L K S ML 0 _ D A T A
[ 22 ] P C I E _ R XN 3 _ W L A N [ 22 ] P C I E _ R XP 3_ W L A N [ 22 ] P C I E _ T X N 3 _ W L A N [ 2 2 ] P C I E _ T XP 3_ W L A N [ 2 4 ] P C I E _ R X N 4_ G L A N [ 2 4 ] P C I E _ R X P 4 _ GL A N [ 2 4 ] P C I E _ T XN 4 _G L A N [ 2 4 ] P C I E _T X P 4 _ GL A N
C 14 2 C 14 3
0 . 1 u _1 0 V _ X 7R _ 0 4 0 . 1 u _1 0 V _ X 7R _ 0 4
B G 36 B J 36 A V 34 A U 34 BF BE AY BB 36 36 34 34
DR A M RS T _ CN T RL [3 ,8 ]
1 0/ 29
C 13 L P D_ S P I_ IN T R#
P C I E C L K R Q1 # D G P U _ P R S N T# P C I E C L K R Q2 #
R 5 43 R 4 63 R 1 69
*1 0 K _ 04 *1 0 K _ 04 *1 0 K _ 04
C 13 0 C 12 9
0 . 1 u _1 0 V _ X 7R _ 0 4 0 . 1 u _1 0 V _ X 7R _ 0 4
S M L1 A L E R T # / P C H H OT # / GP I O7 4
PCI-E*
B G 37 B H 37 A Y 36 B B 36
S M L1 C LK / GP I O5 8 S ML 1 D A TA / GP I O7 5
E1 4 M 16
S MC _ C P U _ T H E R M S MD _ C P U _ T H E R M
S M C _ C P U _ T H E R M [ 2 , 27 ] S M D _ C P U _ T H E R M [ 2 , 27 ]
10 /2 9
Controller
B J 38 B G 38 A U 36 A V 36 B G 40 B J 40 A Y 40 B B 40 BE BC AW AY 38 38 38 38
M7 C L _C L K 1
CL _ CL K 1
CL _ CL K1 [2 2 ] C L _ D A TA 1 [ 22 ]
CL K _ B U F _ CP Y CL K _ N CL K _ B U F _ CP Y CL K _ P C L K _ B U F _ D O T9 6 _ N C L K _ B U F _ D O T9 6 _ P
R1 3 2 R1 3 4 R2 3 2 R2 4 0 R N1 9 1 0 K _ 8P 4R _ 0 4 8 1 7 2 6 3 5 4
1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4
Link
T11 C L _D A T A 1 P1 0 CL _ RS T 1 #
C L _ D A TA 1 C L _ R S T# 1
PCI-E x1 Lane Lane Lane Lane Lane Lane Lane Lane 1 2 3 4 5 6 7 8
Usage X USB3. 0 WLAN GLAN / CARD R EADER NEW C ARD X X X
C L _ R S T# 1 [ 2 2 ]
CL K _ P C IE _ ICH CL K _ P C IE _ ICH # CL K _ S A T A # CL K _ S A T A
M 10 Y 40 Y 39 P C I E C L K R Q0 # J2 P C I E C L K R Q 0 # / GP I O7 3 A B 49 A B 47 P C I E C L K R Q1 # M1 A A 48 A A 47 P C I E C L K R Q2 # V 10 P C I E C L K R Q 2 # / GP I O2 0 Y 37 Y 36 A8 P C I E C L K R Q 3 # / GP I O2 5 Y 43 Y 45 L A N _ C LK R E Q # L 12 V 45 V 46 L 14 P C I E C L K R Q 5 # / GP I O4 4 A B 42 A B 40 P E G _B _C L K R Q # E6 P E G_ B _ C LK R Q # / GP I O 5 6 Y 47 V 40 V 42 3 G_ B _ C L K R Q# T 13 V 38 V 37 P C I E C L K R Q7 # K 12 P C I E C L K R Q 7 # / GP I O4 6 A K 14 A K 13 C L K OU T _ I T P XD P _ N C L K OU T _ I T P XD P _ P C o u g arP oi n t _ R e v _ 1 p 0 X C L K _ R C OM P C L K OU T _ P C I E 6N C L K OU T _ P C I E 6P P C I E C L K R Q 6 # / GP I O4 5 K4 3 C LK I N _ P C I L OO P B A C K V4 7 V4 9 C LK I N _ D OT _ 96 N C L K I N _D OT _ 9 6 P C L K OU T _ P C I E 4N C L K OU T _ P C I E 4P P C I E C L K R Q 4 # / GP I O2 6 C L K IN_ S A T A _ N CL K IN _ S A T A _ P G 24 E2 4 P E G _A _C L K R Q # / GP I O4 7 C L K OU T _ P C I E 0N C L K OU T _ P C I E 0P AB3 7 AB3 8
P E G_ C L K R E Q #
P E G_ C L K R E Q # P C I E C L K R Q2 # CL K _ B U F _ RE F 1 4 LA N _ C L K R E Q #
R R R R
2 12 1 75 2 08 2 39
*1 0 K _ 04 10 K _ 0 4 10 K _ 0 4 *1 0 K _ 04
CLOCKS
C L K O U T _ P E G_ A _ N CL K O UT _ P E G _ A _ P
C L K OU T _ P C I E 1N C L K OU T _ P C I E 1P P C I E C L K R Q 1 # / GP I O1 8
C L K OU T _D MI _ N CL K O UT _ DM I_ P
AV2 2 AU 2 2
10 0M Hz
C L K _ D P _ N _R C L K _ DP _ P _ R
C LK _E XP _N C LK _E XP _P *1 0 m i _ 0 4 l *1 0 m i _ 0 4 l
[3 ] [3 ]
CL K O UT _ DP _ N C LK O U T_ D P _ P C L K OU T _ P C I E 2N C L K OU T _ P C I E 2P C L K I N _D MI _ N CL KIN _ DM I_ P
AM 1 2 AM 1 3
R 154 R 150
1 20 M Hz
C L K _ D P _N C L K _ D P _P [3 ] [3 ]
[ 2 6 ] C LK _P C I E _ U S B 3 0 # [2 6 ] CL K _ P C IE _ US B 3 0 [ 2 6 ] P C I E C LK R Q 2#
BF1 8 BE1 8
C L K _ P C I E _I C H # C L K _ P C I E _I C H C L K _ BUF _ C PY C L K_ N C L K _ BUF _ C PY C L K_ P
10 0M Hz
1 00 MHz
[ 2 2 ] C L K _P C I E _ M I N I # [ 2 2] C L K _ P C I E _ MI N I [ 2 2 ] W LA N _ C L K R E Q #
C L K OU T _ P C I E 3N C L K OU T _ P C I E 3P
C L K I N _ G N D 1_ N C L K I N _G N D 1 _ P
BJ 3 0 BG 3 0
[ 2 4 ] C L K _ P C I E _ GL A N # [ 2 4 ] C L K _ P C I E _G L A N
1 00 MHz
C L K _ B U F _ D OT 9 6 _N C L K _ B U F _ D OT 9 6 _P
96 M Hz 1 00 M Hz 1 4.3 1 8M Hz 3 3M Hz
C LK _P C I _ F B [ 17 ] *X 8 A 0 25 0 0 0 F G1 H _2 5 M H z C4 4 7 22 p _ 5 0 V _N P O _0 4
O nly PC IECLKRQ [ 2:1 ]# on PCH a re core w e l l pow e re d. Al l othe r PC IECLKRQ x # a re suspe nd w e ll pow e re d.
1 0/ 29
AK7 AK5 K4 5
C L K_ SATA# C L K_ SATA
R E F C LK 14 I N H 45
C L K _ BUF _ R EF 1 4
X1 2 3 2 1 M _ 04
R 43 8
1 X 11 X 8A 02 5 0 0 0F G1 H _ 2 5 MH z C4 4 4 22 p _ 5 0 V _N P O _0 4
C L K OU T _ P E G_ B _ N C L K OU T _ P E G_ B _ P
X T A L 2 5_ I N X T A L 25 _ OU T
X T A L 2 5_ I N X T A L 2 5_ O U T
X C LK _R C O MP
R4 3 7
9 0 . 9 _1 % _ 0 4
1 . 0 5V S [ 2 , 3, 8, 1 1 , 1 3 , 1 5, 1 7 , 1 8 , 1 9, 20 , 2 2 , 2 3 , 26 , 2 8 , 3 0 , 31 , 3 3 , 3 4 , 35 ] [ 3, 9, 1 0 , 1 1 , 1 2, 1 3 , 1 5 , 1 6, 1 7 , 1 8 , 1 9, 20 , 2 3 , 2 4 , 25 , 2 7 , 2 8 , 29 , 3 0 , 3 1 , 36 ] [ 1 3 , 15 , 1 9 , 2 0 , 34 ] 3. 3 V 3. 3 V S 1. 0 5 V S
9 9- ? % p lu to + cI 0. O ul p Vc O ( 05 1. V, S r l) os to 0 ai cl e P CH FLEX CLO S CK
C L K O U T F L E X 0 / GP I O6 4 F47 C L K O U T F L E X 1 / GP I O6 5 H 47 C L K O U T F L E X 2 / GP I O6 6 K4 9 C L K O U T F L E X 3 / GP I O6 7 D GP U _ P R S N T #
CougarPoint - M 2/9 B - 15
Schematic Diagrams
CougarPoint - M 3/9
CougarPoint -M (DMI,FDI,GPIO)
A C _ P RE S E NT U3 7 C P C IE _ W A K E # [ [ [ [ [ [ [ [ [ [ [ [ 2] 2] 2] 2] 2] 2] 2] 2] 2] 2] 2] 2] D MI D MI D MI D MI D MI D MI D MI D MI D MI D MI D MI D MI _R _R _R _R _R _R _R _R XN0 XN1 XN2 XN3 XP0 XP1 XP2 XP3 BC 2 4 BE2 0 BG 1 8 BG 2 0 BE2 4 BC 2 0 BJ 1 8 BJ 2 0 AW 2 4 AW 2 0 BB1 8 AV1 8 AY AY AY AU 24 20 18 18 DM I0 RX N DM I1 RX N DM I2 RX N DM I3 RX N DM DM DM DM DM DM DM DM DM DM DM DM I0 RX P I1 RX P I2 RX P I3 RX P I 0 TX N I 1 TX N I 2 TX N I 3 TX N I 0 TX P I 1 TX P I 2 TX P I 3 TX P F F F F F F F F DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N XP XP XP XP XP XP XP XP 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 B J 14 AY1 4 BE1 4 B H1 3 B C1 2 B J 12 B G1 0 B G9 B G1 4 BB1 4 BF1 4 B G1 3 BE1 2 B G1 2 B J 10 B H9 AW 1 6 F DI_ IN T 1 . 0 5V S R4 2 3 49 . 9 _ 1% _ 0 4 D M I _C OM P _ R BJ 2 4 D M I _ Z C O MP BG 2 5 D M I _ I R C OM P R4 2 2 75 0 _ 1% _ 0 4 D M I _2 R B I A S BH 2 1 DM I2 RB IAS F DI_ F S Y NC 1 F DI_ L S Y NC 0 F DI_ L S Y NC 1 AV1 4 BB1 0 F DI_ F S Y NC 0 B C1 0 F D I_ F S Y N C1 [2 ] F D I _ LS Y N C 0 [ 2 ] F D I _ LS Y N C 1 [ 2 ] D S W O DV R E N R4 7 2 R4 7 9 3 30 K _ 0 4 *3 3 0 K _ 04 AV1 2 F D I_ F S Y N C0 [2 ] R TC V C C F D I_ INT [2 ] FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N 0 1 2 3 4 5 6 7 [ [ [ [ [ [ [ [ 2] 2] 2] 2] 2] 2] 2] 2] P M _ S L P _ LA N # S W I# P W R_ B T N# P M _ B A T L OW # S U S _ P W R _A C K R 48 6 R 24 7 R 48 5 R 25 2 R 24 6 R 48 3 1 0K _0 4 *1 0 K _ 0 4 1 0K _0 4 *1 0 K _ 0 4 8 . 2 K _0 4 1 0K _0 4 3. 3V S P M _ CL K R UN # R 44 7 8 . 2 K _0 4 R 54 4 1 0K _0 4 3. 3V
DMI
[ 2 ] D MI _ T X P 0 [ 2 ] D MI _ T X P 1 [ 2 ] D MI _ T X P 2 [ 2 ] D MI _ T X P 3
System Power Management

S U S _ P W R_ A C K 3. 3 V S R 45 3 1 0 K_ 0 4 S Y S _ RE S E T # S Y S _ P W RO K C 5 89 [ 27 ] P M_ P C H _ P W R OK R2 7 0 *0 . 1 u _ 16 V _ Y 5V _0 4 1 0 K _ 04 P M_ P C H _ P W R OK _ R L22 L10 A P W R OK B1 3 D R A MP W R O K R S MR S T # 1 0K _0 4 S US _ P W R _ A CK P W R _ B T N# C 21 K1 6 RS M RS T # K3 SYS_ R ESET # P1 2 S Y S_ P W RO K P W R OK C 12 S USA CK #
FDI
_T X N 0 _T X N 1 _T X N 2 _T X N 3
F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R
I _ TX P 0 I _ TX P 1 I _ TX P 2 I _ TX P 3 I _ TX P 4 I _ TX P 5 I _ TX P 6 I _ TX P 7
[2 ] [2 ] [2 ] [2 ] [2 ] [2 ] [2 ] [2 ]
A1 8 DS W V RM E N D P W R OK E2 2 B9 W AKE # N3 C L K R U N # / GP I O 3 2 S U S _ S T A T # / GP I O 6 1 G8 N1 4 S U S C LK / GP I O 6 2 D1 0 S L P _ S 5 # / GP I O 6 3 SL P_ S4 # H4 F4 SL P_ S3 # G1 0 P W R B TN # A C_ PR E S ENT H 20 E1 0 B A T L OW # / G P I O7 2 A1 0 RI# C o u g a rP oi n t _ R e v _ 1 p 0 S LP _L A N # / GP I O 2 9 P MS Y N C H K1 4 A C P R E S E N T / GP I O 3 1 S L P _A # S L P_ S US # G1 6 AP1 4
D S W OD V R E N
D P W RO K
R2 5 7
* 1 0m i l _0 4
R S MR S T #
DSWODVREN - On Die DSW VR Enable HI Enabled (DEFAULT)
P C IE _ W A K E # P M _ CL K RU N#
P C I E _W A K E # [ 2 2 , 24 , 2 6 ]
LOW Disabled
P M _ C L K R U N # [ 23 ] S 4 _ S T A T E # [ 2 3]
R2 1 3
*1 0 mi l _ 04
P M_ MP W R O K
S U S CL K SL P_ S5 #
11/03
[ 3 ] P M_ D R A M_ P W R G D
[ 27 ] R S MR S T #
R 26 1
S U S C # [ 27 , 3 3 ]
[ 2 7]
S US _ P W R _ A CK [2 7 ] P W R_ B T N#
S U S W A R N # / S U S P W R D N A C K / GP I O3 0 E2 0
S U S B # [ 2 6 , 2 7, 3 1 ] SL P_ A#
[ 17 , 2 7 ] A C _P R E S E N T
SL P_ SU S#
P M_ B A T L OW # SW I#
H _ P M_ S Y N C P M _ S LP _L A N #
[3 ]
[2 7 ] S W I#
3 .3 V U 1 5D 7 4 L V C0 8 PW 12 [ 3 6] D E L A Y _P W R G D 13 [ 27 ] P M_ P C H _ P W R O K 3 .3 V 3 .3 V U 15 A 7 4 LV C 0 8 P W 14 4 [ 3, 33 ] 1 . 8 V S _ P W R GD 3 DD R_ 1 .0 5 V S _ P W RG D 6 5 R 54 5 7 1 0 K _ 04 1 . 0 5 V S _ V T T _E N [3 4 ] 7 7 1 [ 3 3] [ 3 4] DD R1 .5 V _ P W RG D 1. 0 5 V S _ P W R GD 2 14 U 1 5B 7 4 L VC0 8 P W 14 9 [ 35 ] 0 . 8 5 V S _ P W R GD 1 . 0 5 V S _ V T T_ E N 10 8 A L L _S Y S _ P W R GD [ 1 1 , 27 , 3 6 ] 3 .3 V U 15 C 7 4 L V C0 8 P W 7 R2 5 3 1 0 K _0 4 1 1 S Y S _ P W R _O K R 23 4 * 1 0m i l _0 4 S Y S _ P W R OK 14 R 27 8 *1 0 K _ 0 4 P M_ M P W R O K [ 9 , 1 0 , 3 3] [ 1 3 , 2 0] [ 1 3 , 1 4, 19 , 2 0 , 3 4] [ 2 , 3 , 8, 11 , 1 3 , 1 4, 1 7 , 1 8 , 19 , 2 0 , 2 2, 2 3 , 2 6 , 28 , 3 0 , 3 1, 33 , 3 4 , 3 5] [ 3 , 9 , 10 , 1 1 , 1 2, 13 , 1 4 , 1 6, 1 7 , 1 8 , 19 , 2 0 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 2 9, 30 , 3 1 , 3 6] V TT _ ME M RT CV C C 1. 0 5 V S 3. 3 V 3. 3 V S
ON
Schematic Diagrams
CougarPoint - M 4/9
CougarPoint -M (LVDS,DDI,CRT)
U3 7 D [ 1 1 ] B L ON NB _ E NA V DD J47 M4 5 P4 5 L _ B K LT C T L V er:1.0 p ull up 2.2K 3 .3 VS R1 6 3 R2 1 5 R1 7 0 [ 1 1 ] P _D D C _ C L K [1 1 ] P _ D DC _ D A T A L _ C T RL _ CL K L _ C T RL _ DA T A L V D S _ IB G T40 K4 7 T45 P3 9 AF3 7 AF3 6 AE4 8 AE4 7 L _ D DC _ CL K L _ D D C _ D A TA L _ C T RL _ CL K L _ C T RL _ DA T A L V D _ IBG L VD _ VBG L VD _ VR EFH L VD _ VR EFL S D V O_ C T R L C L K S D V O _ C TR L D A T A P3 8 M 39 S D V O_ S T A L L N SD VO _ ST AL L P S D V O _ INT N S D V O_ I N T P L _ B K LT E N L _ V D D_ E N S D V O _ T V CL K I NN S D V O_ T V C L K I N P AP 4 3 AP 4 5 AM 4 2 AM 4 0 AP 3 9 AP 4 0
[ 1 1, 27 ]
1 0 K _ 04 1 0 K _ 04 2 . 3 7K _ 1% _ 0 4
LVDS
Digital Display Interface
[ 1 1 ] L V D S -L 0 N [ 1 1 ] L V D S -L 1 N [ 1 1 ] L V D S -L 2 N
A N4 8 A M4 7 AK4 7 AJ 4 8 A N4 7 A M4 9 AK4 9 AJ 4 7
L VD L VD L VD L VD L VD L VD L VD L VD
SA_ D SA_ D SA_ D SA_ D SA_ D SA_ D SA_ D SA_ D
ATA# 0 ATA# 1 ATA# 2 ATA# 3 ATA0 ATA1 ATA2 ATA3
[ 1 1 ] L V D S -L 0 P [ 1 1 ] L V D S -L 1 P [ 1 1 ] L V D S -L 2 P
DD PB_ 0 N D DP B_ 0 P DD PB_ 1 N D DP B_ 1 P DD PB_ 2 N D DP B_ 2 P DD PB_ 3 N D DP B_ 3 P
R 271 R 272
2 . 2 K _0 4 2 . 2 K _0 4
3 .3 VS
D DP C_ C T RL C L K D D P C _ C TR L D A T A
P4 6 P4 2
H D M I _ C TR L C L K [ 1 2 ] H D M I _ C TR L D A T A [ 1 2 ]
[ 1 1 ] L V D S -U 0 N [ 1 1 ] L V D S -U 1 N [ 1 1 ] L V D S -U 2 N
A H4 5 A H4 7 AF4 9 AF4 5 A H4 3 A H4 9 AF4 7 AF4 3
L VD L VD L VD L VD L VD L VD L VD L VD
SB_ D SB_ D SB_ D SB_ D SB_ D SB_ D SB_ D SB_ D
ATA# 0 ATA# 1 ATA# 2 ATA# 3 ATA0 ATA1 ATA2 ATA3
D D P C _A U X N D DP C _ A U X P D D P C_ H P D D D DD D D DD D D DD D D DD P C_ 0 N PC _ 0 P P C_ 1 N PC _ 1 P P C_ 2 N PC _ 2 P P C_ 3 N PC _ 3 P
P C H_ D DP C_ H P D H H H H H H H H DM DM DM DM DM DM DM DM IB_ D IB_ D IB_ D IB_ D IB_ D IB_ D IB_ C IB_ C 2B 2B 1B 1B 0B 0B LK LK N_ C P_ C N_ C P_ C N_ C P_ C B N_ C BP_ C
R1 5 3 C C C C C C C C 140 141 124 125 126 127 137 138
*1 0 m i l _0 4 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R 0 . 1 u _1 0 V _ X 7 R _0 4 _0 4 _0 4 _0 4 _0 4 _0 4 _0 4 _0 4
P O RT C _ HP D [1 2 ] H H H H H H H H DM DM DM DM DM DM DM DM IB _ D IB _ D IB _ D IB _ D IB _ D IB _ D IB _ C IB _ C 2 B N [1 2 ] 2 B P [1 2 ] 1 B N [1 2 ] 1 B P [1 2 ] 0 B N [1 2 ] 0 B P [1 2 ] L K BN [1 2 ] L K B P [ 1 2]
[ 1 1 ] L V D S -U 0 P [ 1 1 ] L V D S -U 1 P [ 1 1 ] L V D S -U 2 P
AY AY AY AY BA BA BB BB
47 49 43 45 47 48 47 49
[ 12 ] [ 12 ] [ 12 ]
DAC _ B L U E D A C _ GR E E N DAC _ RE D
DA C_ B L U E C 196 * 3 3p _ 5 0 V _ N P O_ 0 4 C 188 * 3 3p _ 5 0 V _ N P O_ 0 4 C 169 * 3 3p _ 5 0 V _ N P O_ 0 4 DA C_ R E D DA C_ G RE E N
R2 0 0 R1 8 7 R1 9 2
1 5 0_ 1 % _ 0 4 1 5 0_ 1 % _ 0 4 1 5 0_ 1 % _ 0 4
DA C_ B L U E DA C_ G RE E N DA C_ R E D
N4 8 P4 9 T49
C R T_ B L U E C R T_ G R E E N C R T_ R E D
D DP D_ C T RL C L K D D P D _ C TR L D A T A
M 43 M 36
EMI
NEAR PCH
R1 6 5
[ 1 2 ] D A C _D D C A C L K [1 2 ] D A C _ DD CA DA T A
T39 M4 0
C R T_ D D C _ C LK C R T_ D D C _ D A T A
D D P D _A U X N D DP D _ A U X P D D P D_ H P D D D DD D D DD D D DD D D DD P D_ 0 N PD _ 0 P P D_ 1 N PD _ 1 P P D_ 2 N PD _ 2 P P D_ 3 N PD _ 3 P
[ 12 ] [ 12 ]
DAC _ H S YN C DAC _ V SY N C DA C_ IR E F
M4 7 M4 9
C R T_ H S Y N C C R T_ V S Y N C
1K _1 % _ 0 4
T43 T42
D A C _ IRE F C R T_ I R T N C o u g a rP o n t _ R e v _ 1 p 0 i
BB 4 3 BB 4 5 BF 4 4 BE 4 4 BF 4 2 BE 4 2 BJ 4 2 BG 4 2
Connect to GND
[ 11 , 1 2 , 1 9 , 2 0 , 2 5 , 2 9, 30 , 3 1 , 3 6 , 3 7 ] 5 V S [ 3 , 9 , 1 0 , 1 1 , 1 2, 13 , 1 4 , 1 5 , 1 7 , 1 8 , 1 9, 20 , 2 3 , 2 4 , 2 5 , 2 7 , 2 8, 29 , 3 0 , 3 1 , 3 6 ] 3 . 3 V S
Display Port D
CRT
AT4 5 AT4 3 BH 4 1
Display Port C
[ 1 1 ] L V D S -U C L K N [ 1 1 ] L V D S -U C L K P
AF4 0 AF3 9
L VD SB_ C L K# L VD SB_ C L K
AP 4 7 AP 4 9 AT3 8
SDVO
[ 1 1 ] LV D S - LC L K N [ 1 1 ] L V D S -L C L K P
AK3 9 AK4 0
L VD SA_ C L K# L VD SA_ C L K
AV AV AV AV AU AU AV AV
42 40 45 46 48 47 47 49
Display Port B
D D P B _A U X N D D PB_ AU XP DD PB_ H PD
AT4 9 AT4 7 AT4 0
Schematic Diagrams
CougarPoint - M 5/9
Boot BIOS Strap
BB BI S_ T1 0 0 1 1 BB BI S_ T0 0 1 0 1 Bo ot B S L at n IO oc io LP C Re rv se ed PC I SP I
CougarPoint -M (PCI,USB,NVRAM)
U 37 E BG 2 6 BJ 2 6 BH 2 5 BJ 1 6 BG 1 6 AH 3 8 AH 3 7 A K4 3 A K4 5 C 18 N 30 H 3 AH 1 2 AM 4 AM 5 Y 13 K2 4 L24 A B4 6 A B4 5 R SVD 1 R SVD 2 R SVD 3 R SVD 4 R SVD 5 R SVD 6 R SVD 7 R SVD 8 R SVD 9 R SVD 1 0 R SVD 1 1 R SVD 1 2 R SVD 1 3 R SVD 1 4 R SVD 1 5 R SVD 1 6 R SVD 1 7 R SVD 1 8 R SVD 1 9 R SVD 2 0 R SVD 2 1 R SVD 2 2 R SVD 2 3 R SVD 2 4 R SVD 2 5 R SVD 2 6 R SVD 2 7 TP2 5 TP2 6 TP2 7 TP2 8 TP2 9 TP3 0 TP3 1 TP3 2 TP3 3 TP3 4 TP3 5 TP3 6 TP3 7 TP3 8 TP3 9 TP4 0 R SVD 2 8 R SVD 2 9 AY 5 BA2 AT1 2 BF3 AY 7 AV7 AU 3 BG 4 AT1 0 BC 8 AU 2 AT4 AT3 AT1 AY 3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD 4 BF6 AV5 AV1 0 AT8 FO LAY R OUT SW AP R N5 1 0K _8 P 4 R _ 04 4 5 3 6 2 7 1 8 R N4 _8 P 4 R _ 04 5 6 7 8 3 .3 V S TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP1 0 TP1 1 TP1 2 TP1 3 TP1 4 TP1 5 TP1 6 TP1 7 TP1 8 TP1 9 TP2 0 I N T _ P I R QD # D_ G P U_ P W R_ E N # S A T A _ OD D _D A # I N T _ P I R QG #
( ND NA )
R2 2 6 R4 4 6
* 1 K _ 04 * 1 K _ 04
B B S _ B I T1 B B S _ B I T0 [ 1 3 ]
1 0K 4 IN T _ P IRQ A# D GP U _ H OL D _ R S T # 3 D GP U _ S E L E C T # 2 1 IN T _ P IRQ E# I N T _ P I R QB # I N T _P I R Q C # I N T _P I R Q H # D G P U _P W M_ S E LE C T #
Flash Descriptor security override strap PCI_GNT#3

LOW = PCI_GNT#3 swap override HIGH = Default
* 1K _0 4 P C I _ GN T #3
10 K _ 0 4 10 K _ 0 4 10 K _ 0 4 *1 0 K _ 0 4
R2 2 8 R2 6 5 R2 5 1 R2 4 1
R2 2 5
B2 1 M 20 AY 1 6 BG 4 6
TP2 1 TP2 2 TP2 3 TP2 4
R 2 43
*1 K _ 0 4
IN T _ P IRQ E #
MPC Switch Control MPC ON -- 0 MPC OFF -- 1 DEFAULT
B E2 8 BC 3 0 B E3 2 BJ 3 2 BC 2 8 B E3 0 B F32 BG 3 2 A V2 6 B B2 6 AU 2 8 AY 3 0 AU 2 6 AY 2 6 A V2 8 A W30
RSVD
3 .3 V C2 0 7 * 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 5 1 4 2 3
PI N P LT_R ST# to B uff er

U1 3 74 A H C 1 G 0 8G W B U F _ P L T _ R S T # [ 2 2 , 2 4 , 26 , 2 7 ] R2 4 5 1 00 K _ 0 4
P L T _R S T #
PCI
IN IN IN IN
T _P T _P T _P T _P
IRQ IRQ IRQ IRQ
A# B# C# D#
K4 0 K3 8 H 38 G 38
P IR P IR P IR P IR
QA # QB # QC # QD #
USB
D GP U _ H O L D _ R S T # C 4 6 C 44 D GP U _ S E L E C T# E4 0 D _G P U _ P W R _E N # D 47 B B S _B I T 1 D G P U _ P W M_ S E L E C T # E 4 2 F46 P C I _ GN T #3 G G C D 42 40 42 44
R E Q1 # / G P I O5 0 R E Q2 # / G P I O5 2 R E Q3 # / G P I O5 4 GN T 1 # / GP I O 5 1 GN T 2 # / GP I O 5 3 GN T 3 # / GP I O 5 5
[ 2 5 ] S A TA _O D D _ D A #
I N T _P I R Q E # S A T A _ O DD _ DA # I N T _P I R Q G# I N T _P I R Q H #
U SBP0 N U SBP0 P U SBP1 N U SBP1 P U SBP2 N U SBP2 P U SBP3 N U SBP3 P U SBP4 N U SBP4 P U SBP5 N U SBP5 P U SBP6 N U SBP6 P U SBP7 N U SBP7 P U SBP8 N U SBP8 P U SBP9 N U SBP9 P U SBP1 0 N U S B P 10 P U SBP1 1 N U S B P 11 P U SBP1 2 N U S B P 12 P U SBP1 3 N U S B P 13 P
C2 4 A2 4 C2 5 B2 5 C2 6 A2 6 K2 8 H2 8 E2 8 D2 8 C2 8 A2 8 C2 9 B2 9 N2 8 M2 8 L 30 K3 0 G3 0 E3 0 C3 0 A3 0 L 32 K3 2 G3 2 E3 2 C3 2 A3 2
US US US US US US
B _ PN0 B_ PP0 B _ PN1 B_ PP1 B _ PN2 B_ PP2
[2 6 ] [2 6 ] [3 0 ] [3 0 ] [2 2 ] [2 2 ]
10/29
US B _ P N4 [2 3 ] US B _ P P 4 [2 3 ] US B _ P N5 [2 3 ] US B _ P P 5 [2 3 ]
USB PORT0 (J_USB_1) USB PORT1 (J_USB3_1; USB3.0) WLAN NEW CARD 3G CCD
US B _ P N9 [3 0 ] US B _ P P 9 [3 0 ]
USB PORT2 (AJ_USB1) BT PORT11
U S B _P N 1 1 [ 2 8 ] U S B _ P P 1 1 [2 8 ]
P IR P IR P IR P IR
QE # / G P I O 2 QF # / G P I O 3 QG # / GP I O4 QH # / GP I O5
C3 3 US BR B IA S # B3 3
U S B _ B IA S
R 4 67
2 2 . 6 _1 % _ 0 4 U U U U SB_ O SB_ O SB_ O SB_ O C# 4 5 C # 1 0 11 C# 6 7 C # 1 2 13
K1 0 [ 27 ] P ME # [ 3 , 2 3 ] P L T _ R S T# P L T _ RST # C 6 H 49 H 43 J48 K4 2 H 40 PM E# P L T RS T # O O O O O
U SB R B IA S C 0# / C 1# / C 2# / C 3# / C 4# / O C5 # O C 6# / O C 7# / G P IO 5 9 G P IO 4 0 G P IO 4 1 G P IO 4 2 G P IO 4 3 / G P IO 9 G P IO 1 0 G P IO 1 4 A1 4 K2 0 B1 7 C1 6 L 16 A1 6 D1 4 C1 4 U U U U U U U U S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC #01 #23 #45 #67 #89 # 1 01 1 # 1 21 3 #14 U S B _ O C# 0 1 [3 0 ]
R N6 1 0K _8 P 4 R 5 6 7 8 R N7 1 0K _8 P 4 R 5 6 7 8
3 .3 V _ 04 4 3 2 1
10/29
[ 2 3] [ 1 4]
PCL K_ T P M CL K _ P C I_ F B
R2 1 4 R2 2 7 R2 6 0
*2 2 _ 0 4 2 2 _0 4 2 2 _0 4
P C L K _ TP M_ P C H C LK _P C I _ F B _ R C LK _P C I _ K B C _ R
[ 2 7 ] P C LK _K B C
CL KO CL KO CL KO CL KO CL KO
UT _ P C UT _ P C UT _ P C UT _ P C UT _ P C
I0 I1 I2 I3 I4
U S B _ O C# 0 1 U S B _ O C# 1 4 U S B _ O C# 2 3 U S B _ O C# 8 9
_ 04 4 3 2 1
R2 3 3 C ou g a rP o i nt _R e v _ 1 p0
* 0 _0 4
A C _ P R E S E N T [ 1 5 , 27 ]
[ 2 , 3 , 8 , 1 1, 13 , 1 4 , 1 5 , 1 8, 1 9 , 2 0 , 2 2 , 23 , 2 6 , 2 8 , 3 0, 31 , 3 3 , 3 4 , 3 5] 3. 3V [ 3, 9, 1 0 , 1 1 , 1 2 , 13 , 1 4 , 1 5 , 1 6, 18 , 1 9 , 2 0 , 2 3, 2 4 , 2 5 , 2 7 , 28 , 2 9 , 3 0 , 3 1, 36 ] 3 . 3 V S
Schematic Diagrams
CougarPoint - M 6/9
3 .3V S R1 8 0 1 0K _0 4 B IO S _ RE C R1 8 4 *0 _ 0 4
CougarPoint - M (GPIO,VSS_NCTF,RSVD)
U 3 7F S _G P IO [2 7 ] S M I # S MI# D GP U _ H P D _ IN T R # T7 B M B U S Y # / GP I O0 A4 2 T A C H 1 / GP IO1 H3 6 T A C H 2 / GP IO6 E3 8 C1 0 G P I O8 G P IO 12 H OS T_ A L E R T #1 C4 L A N _ P H Y _ P W R _ C T R L / GP I O 1 2 [ 27 ] O C P P E # R3 1 4 *0 _ 04 G2 G P I O1 5 S A TA _D E T # 4 U2 S A T A 4 G P / GP IO1 6 R CIN # D GP U _ P W R OK B IOS _ R E C D4 0 T A C H 0 / GP IO1 7 T5 S C LO C K / GP I O2 2 H OS T_ A L E R T #2 E8 G P I O2 4 / M E M_ L E D E1 6 [ 1 1] S B _ B L ON IC C _ E N # P LL _ OD V R _E N G P IO 34 P C H _M U T E # [2 5 ] S A T A _ OD D _ P R S N T # S A TA _O D D _ P R S N T # F D I_ OV R V L T G 3 .3 V S R4 4 9 10 K _ 0 4 M F G _M OD E G F X _ CR B _ DE T 3 .3 V S R1 8 1 R4 3 5 R2 2 2 H OS T _ A L E R T# 1 H OS T _ A L E R T# 2 G P IO 12 10 K _ 0 4 *0 _ 04 10 0 K _ 0 4 T E S T _ S E T _ UP C R IT _ T E M P _R E P # _ R T E S T _ DE T P8 G P I O2 8 K1 K4 G P I O3 5 V8 S A T A 2 G P / GP IO3 6 M5 S A T A 3 G P / GP IO3 7 N2 S L OA D / G P IO 38 M3 S D A T A OU T 0 / GP IO 3 9 V1 3 S D A T A OU T 1 / GP IO 4 8 V3 S A T A 5 G P / GP IO4 9 D6 G P I O5 7 V S S _ N CT F _ 1 7 B H4 7 V S S _ N CT F _ 1 8 A4 V S S _ N CT F _ 1 V S S _ N CT F _ 1 9 V S S _ N CT F _ 2 0 V S S _ N CT F _ 2 1 BJ 4 4 BJ 4 5 V S S _ N CT F _ 3 S C I# S M I# G A2 0 K B C _ R S T# A4 6 V S S _ N CT F _ 4 A5 V S S _ N CT F _ 5 A6 V S S _ N CT F _ 6 BJ 4 V S S _ N CT F _ 2 V S S _ N CT F _ 1 6 B H3 V S S _ N CT F _ 1 5 B G4 8 B G2 NC _ 1 P3 7 TS _ V S S 4 TS _ V S S 3 S T P _ P C I# / GP IO 3 4 TS _ V S S 2 G P I O2 7 A 2 0 GA TE A U1 6 P E CI P5 H P E C I_R K B C _ R S T# P4 R1 3 7 R1 3 8 * 1 0K _ 0 4 *0 _ 0 4 GA 2 0 [2 7 ] 1 .0 5 VS_ VT T H _ P E C I [3 , 2 7] T A C H 3 / GP IO7 T A C H 6 / GP I O 7 0 T A C H 7 / GP I O 7 1 A4 0 T A C H 5 / GP I O 6 9 C4 1 T A C H 4 / GP I O 6 8 B4 1 P C H _ G P IO 57 G P I O 70 G P I O 71 R4 6 9 R4 7 4 R4 7 1 1 . 5K _1 % _ 0 4 1 . 5K _1 % _ 0 4 1 . 5K _1 % _ 0 4 3 .3 VS 3 .3 VS C4 0 S A TA _O D D _ P W R GT S A T A _ OD D _ P W R GT [2 5 ]
BI OS R OV Y EC ER DI BL -- 34 NO S FF ( FA SA E- -R 9 TU DE ULT ) EN LE -- 34 ST F AB -- -R 9 UF
3 .3V S
R4 5 1 R4 5 0
*1 0 K _ 04 10 0 K _ 0 4
GF X _ C R B _ D E T [2 7 ] S C I # S C I# IC C_ E N #
10/28
Internal GFX: Low (Default) External GFX: High
K B C _ R S T # [ 27 ] H _ C P U P W R GD [ 3 ]
GPIO
AY1 1
CPU/MISC
P R OC P W R G D AY1 0 T H R MT R I P # T 14 I N IT 3 _ 3 V # AY1 D F _T V S N V _ CL E R4 2 9 1 K_ 0 4 IN IT 3 _3 V # H T H R MT R I P #_ R R1 2 5 3 90 _ 1 % _0 6 R4 3 0
3 .3V
H _ T H R MT R I P # [3] 2 . 2K _0 4 1 .8 VS
R4 8 4 R4 6 5
*1 0 K _ 0 4 1 K _ 04
1 0/28
A H 8 R 54 7 A K 1 1 R 54 8 A H 1 0 R 54 9 A K 1 0 R 55 0 *1 0 mi l _ 04 *1 0 mi l _ 04
H _ S N B _ IV B # [ 3 ]
TS _ V S S 1
DM & FD Te in io Vo ag I I rm at n lt e NV LE _C S et t Vs o s w n LO he W S et t Vc wh o c en H H IG
*1 0 mi l _ 04 *1 0 mi l _ 04
I EG TE C CK NT RA LO D AB -- R4 IS LE -- 65 NO S FF ( FA T) TU DE UL E BL -- R4 NA E- -- 65 ST F UF
3.3 V
[ 2 ] C R I T _ T E MP _ R E P #
R 46 2 R 25 4 R 46 1 3 .3 V S
1 K_ 0 4 1 K_ 0 4 * 10 K _ 0 4
10 /28
R N8 1 0 K _ 8 P 4R _ 0 4 1 8 2 7 3 6 4 5
A4 4 A4 5
NCTF
BJ 4 6 V S S _ N CT F _ 2 2 BJ 5 V S S _ N CT F _ 2 3 BJ 6 V S S _ N CT F _ 2 4 V S S _ N CT F _ 2 5 V S S _ N CT F _ 2 6 D1 V S S _ N CT F _ 2 7 D4 9 V S S _ N CT F _ 2 8 E1 V S S _ N CT F _ 2 9 E4 9 V S S _ N CT F _ 3 0 F1 V S S _ N CT F _ 3 1 F49 V S S _ N CT F _ 3 2 C2 C4 8
R R R R R R R R
17 9 16 6 26 4 47 0 45 5 43 6 48 0 44 2
1 0 K _ 04 2 0 0K _0 4 1 0 K _ 04 1 K_ 0 4 * 1K _ 0 4 1 0 K _ 04 * 10 K _ 0 4 1 0 K _ 04
S _ GP IO S A T A _ OD D _ P R S N T # D G P U _ H P D _ IN T R # S A T A _ OD D _ P W R GT GP IO 3 4 C R I T _T E M P _ R E P #_ R DG P U_ P W RO K S A T A _ DE T # 4
B3 B4 7
V S S _ N CT F _ 7 V S S _ N CT F _ 8
BD 1 V S S _ N CT F _ 9 B D4 9 V S S _ N CT F _ 1 0 BE1 V S S _ N CT F _ 1 1
R 19 4 R 20 1
* 1K _ 0 4 1 0 0K _0 4
P L L _ OD V R _ E N F D I_ OV R V L T G
BE4 9 V S S _ N CT F _ 1 2 BF1 V S S _ N CT F _ 1 3 BF4 9 V S S _ N CT F _ 1 4 C o ug a rP o i nt_ R e v _1 p 0
[ 2, 3,5 , 1 9 ,2 0 , 34 ,3 6 ] 1 .0 5 V S _ V T T [ 6 , 1 9, 3 3 ] 1 . 8 V S [2 , 3 ,8 ,11 ,1 3 , 1 4, 15 ,1 7 , 1 9, 20 ,2 2 ,2 3,2 6 , 2 8 ,3 0,3 1 , 3 3 , 3 4, 3 5 ] 3 . 3 V [ 3 ,9 , 10 , 1 1 ,1 2 , 13 ,1 4 , 1 5, 16 ,1 7 , 1 9, 20 ,2 3 ,2 4,2 5 , 2 7 ,2 8,2 9 , 3 0 , 3 1, 3 6 ] 3 . 3 V S
Schematic Diagrams
CougarPoint - M 7/9
CougarPoint -M (POWER)
1 .0 5 VS U3 7 G 3 . 3V S L17 HC B 1 00 5 K F -1 2 1 T2 0
POWER
1mA
U4 8 CO CO CO CO CO CO CO CO CO CO CO CO CO CO CO CO CO R E [1 ] R E [2 ] R E [3 ] R E [4 ] R E [5 ] R E [6 ] R E [7 ] R E [8 ] R E [9 ] R E [1 0 ] R E [1 1 ] R E [1 2 ] R E [1 3 ] R E [1 4 ] R E [1 5 ] R E [1 6 ] R E [1 7 ] V C CA D A C C 4 51 U4 7 VSSAD AC
5 VS V C CA _ D A C_ 3 . 3 V S U 39 5 C4 5 2 0 .1 u_ 1 0 V _ X5 R _0 4 C4 5 3 1 0u _ 6 .3 V _ X5 R _0 6 C5 3 9 *0 .1 u _ 10 V _ X 5 R_ 0 4 C 45 7 *2 2 u _ 6.3 V _ X 5 R _ 0 8 R 45 7 * 23 . 7 K _ 1 %_ 0 4 4 SET 3 .3 V S _ V C CA _ L V D AK3 6 V CC A L V D S AK3 7 V SS AL VDS C1 5 6 * 10 K _ 1 % _0 4 0 . 1u _ 1 0 V _X 5 R _0 4 1 .8 V S _ V C C T X_ L V D A M3 7 A M3 8 V CC T X_ L V DS [2] AP3 6 V CC T X_ L V DS [3] AP3 7 0 .0 1 u_ 1 6 V _ X7 R _ 04 0 .0 1u _ 1 6V _X 7 R _ 0 4 2 2u _ 6 .3 V _ X5 R _0 8 V CC T X_ L V DS [4] C 1 53 C1 5 0 C4 3 9 L 34 HC B 1 60 8 K F -1 2 1 T2 5 3 S H DN # 2 G ND * 1 u_ 6 . 3 V _ X5 R _0 4 OU T IN 1 C4 5 9
A VCCO = 1. ll RE 3A
C1 6 8 1 0u _ 6 . 3 V _ X5 R _0 6 C 1 58 1 u_ 6 .3 V _ Y 5 V _ 0 4 C1 7 8 1 u _ 6. 3V _ Y 5 V _0 4 C1 7 4 1 u _6 . 3 V _ Y 5 V _ 0 4 AA2 3 AC 2 3 AD 2 1 AD 2 3 AF2 1 AF2 3 AG 2 1 AG 2 3 AG 2 4 AG 2 6 AG 2 7 AG 2 9 AJ 2 3 AJ 2 6 AJ 2 7 AJ 2 9 AJ 3 1 V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC
CRT
0 .0 1 u_ 1 6 V _ X7 R _ 04
V CC CORE
* A P L 5 6 03 -3 3 B R 1 59 * 20 m i l_ 0 4 3. 3 V S
1mA
R 46 0
LVDS
1. 0 5 V S
1 . 0 5V S _V CC A P L L_ E X P
V CC T X_ L V DS [1]
60m A
1 . 8V S
AP L560333B 6-0 2-5603 3-4C0 G9 091-33 0T11UF 6-02-9 0913-4C 0
R1 5 2
*2 0 m li _ 0 4 1 .05 V S _ V C CA P LL _ E X P AN 1 9
V CC I O[ 1 5 ] AN 1 7 V CC I O[ 1 6 ] AN 2 1
* 1 0u _ 6 . 3V _X 5 R_ 0 6
HV CMOS
1 .0 5 V S
C 14 7 1 0 u _6 . 3 V _ X 5R _ 06
C 1 71 1 u _ 6.3 V _ Y 5V _0 4
C 1 49 1 u _ 6. 3V _ Y 5V _0 4
DM I
AP2 6 V CC I O[ 2 3 ] AT2 4 AN 3 3 V CC I O[ 2 5 ] 3 .3 V S AN 3 4 V CC I O[ 2 6 ] V CC I O[ 2 4 ]
VCC I O
266mA
C 14 4 0 .1 u _1 0 V _ X 5R _ 0 4 1 . 0 5V S _V CC A P L L_ F D I 1.0 5 V S R 42 1 *0 _ 0 4 1 .5 V S _ 1 . 8V S
DF T / S PI
F DI
42mA
1 .0 5 V S _ V TT
R 1 49
1. 0 5 V S
1 .5 V S
1 .8V S
1.5 V S _1 . 8 V S
R 14 3 R 14 8 R 14 7
*0 _ 0 4 *2 0 m li _ 0 4 *0 _ 0 4
.
C 4 24 C 1 51 1 u _ 6. 3V _ Y 5 V _0 4 C 1 52
L3 1 *HC B 1 0 05 K F -12 1 T 20 V C C A _P L L _ E X P BJ 2 2
V CC I O[ 2 8 ] 3. 3V S V CC A P L L E X P V3 3 AN 1 6 V C C3 _ 3 [ 6] C1 7 9 0 .1 u_ 1 0 V _ X5 R _0 4 V C C3 _ 3 [ 7] V3 4 1. 5V S _1 . 8 V S
2 66mA
V CC I O[ 1 7 ]
All VCCIO = 2.92 A
AN 2 6 V CC I O[ 1 8 ] AN 2 7 V CC I O[ 1 9 ] AP2 1 V CC I O[ 2 0 ] AP2 3 V CC I O[ 2 1 ] AP2 4 V CC I O[ 2 2 ] V CC DM I [ 1] AT2 0 V CC V RM [3] AT1 6
160mA 4 2mA
1 .0 5 V S_ VT T
1 u _ 6 . 3V _Y 5 V _ 04
2 mA
AB3 6 V C CC LK D MI V C CC L K DM I R1 6 4 * 2 0m i l _0 4 1 . 05 V S
C 14 6 1u _ 6 .3 V _Y 5 V _ 04
C1 2 8 10 u _ 6 .3V _ X 5 R_ 0 6
A G1 6 V C CD F T E RM [1] A G1 7 V CC 3 _3 [ 3 ] V C CD F T E RM [2] AJ 1 6 V C CD F T E RM [3] AJ 1 7 V C CD F T E RM [4] V CC ME 3 .3 V R 43 9 *0 _ 0 4 0 _ 04 3 .3 V S 3. 3V 0 . 1u _ 1 0 V _X 5 R _0 4 C1 6 0
190mA
V _ N V RA M _ V CC Q R1 4 0 R 1 41 * 20 m i _ 0 4 l * 0_ 0 4
1 .8 V S
3 .3 VS
Z2501
BH 2 9
CougarPoint power supply range Min 1.00V 1.43V 1.71V 3.14V 4.75V Voltage 1.05V 1.5V 1.8V 3.3V 5V Max 1.10V 1.58V 1.89V 3.47V 5.25V
160mA
AP1 6 V CC V R M [2 ] BG 6 AP1 7 V CC I O[ 2 7 ] V c cA F DI P L L
11/ 01
1. 0 5 S _ V CC _ DM I * 20 m i l _0 4
V1 V C CSPI
20mA
R 44 0 C4 4 6 1 u _6 . 3 V _ Y 5 V _ 0 4
AU 2 0 V CC DM I [ 2 ]
11/03
Co u g ar P oi n t _ Re v _ 1 p 0
[2 0] [1 1, 1 2 , 2 0 , 2 5, 2 9 , 3 0 , 31 ,3 6 ,3 7] [2 ,3 , 8,1 1 ,1 3 ,14 , 1 5 , 1 7 , 18 ,2 0 ,2 2, 2 3 , 2 6 , 2 8, 3 0 , 3 1 , 33 ,3 4 ,3 5] [ 3 ,9, 10 , 1 1 , 1 2,1 3 ,1 4 ,15 , 1 6 , 1 7 , 18 ,2 0 ,2 3, 2 4 , 2 5 , 2 7, 2 8 , 2 9 , 30 ,3 1 ,3 6] [6 ,1 8 ,3 3] [2 9 ,3 1] [ 2 , 3 , 5 , 1 8 , 20 ,3 4 ,3 6] [ 1 3 , 1 4 , 15 ,2 0 ,3 4]
1. 5V S _1 . 8 V S 5V S 3. 3V 3. 3V S 1. 8V S 1. 5V S 1. 05 V S _ V T T 1. 05 V S
Schematic Diagrams
CougarPoint - M 8/9
CougarPoint power supply range Min 1.00V 1.43V 1.71V 3.14V 4.75V Voltage 1.05V 1.5V 1.8V 3.3V 5V Max 1.10V 1.58V 1.89V 3.47V 5.25V
3. 3 V S 1 . 05 V S 3 . 3V C1 9 4 0 . 1u _ 1 0V _X 5 R _ 0 4 AD 4 9 V CC A CL K V C C I O[ 29 ] P2 6 T16 V CC DS W 3 _ 3 V C C I O[ 31 ] C 1 90 L 16 H C B 1 0 0 5K F -12 1 T 20 *0 . 1 u _1 0 V _ X5 R _0 4 P C H_ V CC DS W V1 2 DC P S US B Y P T38 V C C 3_ 3 [ 5 ] V C C I O[ 32 ] T29 V C C I O[ 33 ] T23 BH 2 3 1 0u _ 6 . 3V _X 5 R _ 0 6 L 30 * H C B 1 00 5 K F -1 2 1T 2 0 1 . 05 V S 1 .0 5 VS + V C C A P L L _C P Y _ P C H AL 2 4 1 u _ 6. 3 V _ Y 5 V _ 0 4 AL 2 9 V C C S U S 3 _3 [ 7 ] V C C A P L LD MI 2 V C C S U S 3 _3 [ 8 ] V C C I O[ 1 4 ] V2 3 T24 V C C S U S 3 _3 [ 9 ] V2 4 V C C S U S 3 _ 3[ 10 ] P2 4 V C C S U S 3 _3 [ 6 ] AA1 9 V CC A S W [1 ] AA2 1 C 4 41 2 2 u _6 . 3 V _ X 5R _ 08 C4 3 8 2 2u _ 6 . 3V _X 5 R _ 0 8 C 2 00 1 u _ 6. 3 V _ Y 5V _ 0 4 C1 7 3 1 u_ 6 . 3 V _ Y 5 V _ 04 C 1 83 AA2 4 AA2 6 V CC A S W [4 ] AA2 7 V CC A S W [5 ] AA2 9 V CC A S W [6 ] AA3 1 V CC A S W [7 ] 1 u _ 6. 3 V _ Y 5 V _ 0 4 V CC A S W [2 ] M 26 V CC A S W [3 ] V 5 R E F _S U S + V 5 A _P C H _ V C C 5 R E F S U S V C C I O[ 34 ] T26 R1 9 6 * 20 m i _ 0 4 l 1 .0 5 V S D 10 C R2 4 2 C2 0 3 R B 7 5 1 S -40 C 2 A 1 0 _0 4 0 . 1 u _1 0 V _ X5 R _0 4 3 . 3V 5V C 18 4 0 . 1 u _1 0 V _ X5 R _0 4 C1 9 7 0 . 1u _ 1 0V _ X 5 R _ 0 4 3 .3 V T27 V C C I O[ 30 ] P2 8 C 19 2 1 u _ 6. 3 V _ Y 5 V _ 0 4 U3 7 J
CougarPoint - M (POWER)
1 . 0 5V S _V C C A _C LK L 36 * H C B 1 00 5 K F -1 2 1T 2 0
PO WE R
N 26
All VCCIO=2.92A
1 .0 5 V S
3mA
Vo lt age R ai l Vol ta ge V_ CP U_I O 1. 05 V5 RE F 5 V5 RE F_S us 5 Vc c3 _3 3. 3 Vc cA DAC 3 1. 05 Vc cA DPL LA 1. 05 Vc cA DPL LB 1. 05 Vc cC ore 1. 05 Vc cD MI Vc cI O Vc cA SW Vc cS PI Vc cD SW3 _3 Vc cD FTE RM Vc cS us3 _3 Vc cS usH DA Vc cV RM Vc cC lKD MI Vc cS SC Vc cD IFF CL KN Vc cA LVD S Vc cT X_L VD S 1. 1 1. 05 1. 05 3. 3 3. 3 1. 8 3. 3 3. 3 1. 5 1. 05 1. 05 1. 05 3. 3 1. 8
S0 I cc ma x Cur re nt ( A) 1 (m A) 1 (m A) 1 (m A) 0. 26 6 1 (m A) 0. 08 0. 08 1. 3 0. 04 2 2. 92 5 1. 01 0. 02 0 2 (m A) 0. 19 0. 09 7 1 (m A) 0. 16 0. 02 0. 09 5 0. 05 5 1 (m A) 0. 06
V C C3 _ 3
2 66 mA
11/01
C1 7 6
C 1 87
97mA
US B
1 1/01
C 1 61
*1 u _ 6. 3 V _ X 5R _ 04
DCP S US
DC P S US [3 ]
A ll V CC ASW =1 .0 1A
1mA
Clock and Miscellaneous
DCP S US [4 ] V C C S U S 3 _3 [ 1 ]
A N 2 3 + V C C A _ U S B S U S C 15 4 AN 2 4
*1 u _6 . 3 V _ X 5R _ 04 3 .3 V + 5 V _P C H _ V C C 5 R E F S U S D 11 C R2 6 3
Note: C128 9- ST UFFED ONLY FOR CPT I NTERP OSER; UNSTU FF FO CPT R
AC 2 6 V CC A S W [8 ] AC 2 7 V CC A S W [9 ] AC 2 9 V CC A S W [1 0 ] AC 3 1 V CC A S W [1 1 ] AD 2 9 V CC A S W [1 2 ] AD 3 1 V CC A S W [1 3 ] W21 V CC A S W [1 4 ] W23 V CC A S W [1 5 ] W24 V CC A S W [1 6 ] W26 V CC A S W [1 7 ] W29 V CC A S W [1 8 ]
P3 4 V 5R E F
1mA
R B 7 5 1 S -40 C 2 A 3 . 3V S 1 0 _0 4 1u _ 6 . 3 V _X 5 R _ 0 4 3 .3 V 5 VS
PC I/ GP IO /L PC
V C C S U S 3 _3 [ 2 ] V C C S U S 3 _3 [ 3 ] V C C S U S 3 _3 [ 4 ] V C C S U S 3 _3 [ 5 ]
N 20 N 22 P2 0 P2 2 AA1 6
97mA
11/03
C2 0 2
3. 3 V S
C 18 6 1 u _6 . 3 V _ Y 5 V _ 0 4
266mA
V C C 3 _3 [ 1 ] W16 V C C 3 _3 [ 8 ] T34 V C C 3 _3 [ 4 ] C 1 81 0 . 1 u _1 0 V _ X 5R _0 4 C1 9 3 0 . 1u _ 1 0V _ X 5 R _ 0 4 C 1 80 0 . 1 u _1 0 V _ X5 R _0 4
C2 0 1 1 . 0 5 V S L3 2 H C B 1 0 0 5K F -12 1 T 20 +C 4 36 * 2 20 u _ 6. 3 V _ 6 . 3 *4 . 2 1 . 0 5V S _V C C A _A _ D P L
0 . 1 u _1 0 V _ X 5R _0 4
W31 V CC A S W [1 9 ] W33 V CC A S W [2 0 ] V C C 3 _3 [ 2 ] V C C I O[ 5 ]
AJ 2 + V 1 . 0 5S _S A T A 3 AF1 3
All VCCIO=2.92A
C 16 6
L1 5 H C B 16 0 8 K F -1 21 T 2 5
1. 5 V S _ 1 . 8 V S +V C C R T C E X T N 16 Y 49 V C C V R M [ 4] DC P RT C
1 .0 5 V S
C1 5 9 *1 0 u_ 6 . 3 V _ X5 R _ 0 6
AH 1 3 V C C I O[ 12 ] AH 1 4 V C C I O[ 13 ] V C C I O[ 6 ] AF1 4 AK1 AF1 1 V C C V R M[ 1 ] V C C I O[ 2 ] V C C I O[ 3 ] AC 1 6 AC 1 7 C 16 7 AD 1 7 1 u _ 6. 3 V _ Y 5 V _ 0 4 [ 13 ] 3 . 3 A _ 1. 5 A _ H D A _ I O [ 19 ] 1 . 5 V S _ 1 . 8V S [ 1 3 , 15 ] R T C V C C [ 2 3 , 2 6, 30 , 3 1 , 33 , 3 4 , 35 ] 5 V [ 1 1 , 1 2, 1 9 , 2 5, 29 , 3 0 , 31 , 3 6 , 37 ] 5 V S [ 2 , 3 , 8, 11 , 1 3 , 14 , 1 5 , 17 , 1 8 , 1 9, 2 2 , 2 3, 2 6 , 2 8, 30 , 3 1 , 33 , 3 4 , 35 ] 3 . 3 V [ 3 , 9 , 1 0, 1 1 , 1 2, 13 , 1 4 , 15 , 1 6 , 17 , 1 8 , 1 9, 2 3 , 2 4, 2 5 , 2 7, 28 , 2 9 , 30 , 3 1 , 36 ] 3 . 3 V S [ 3 , 6 , 8 , 9, 10 , 2 6 , 28 , 3 1 , 33 ] 1 . 5 V [ 13 , 1 4 , 15 , 1 9 , 34 ] 1 . 0 5 V S [ 2, 3 , 5 , 1 8 , 19 , 3 4 , 36 ] 1 . 0 5 V S _ V TT 1 . 5 V S _ 1 . 8V S R 25 8 1 . 05 V S R 25 9 *0 _ 06 0_ 0 6 1 . 0 5 V S _ V C C A P L L_ S A T A 3 L 33 *H C B 1 0 05 K F -1 2 1 T2 0 1 . 05 V S 3 . 3 A _ 1. 5 A _ H D A _ I O 3. 3V 1. 5V 1 u _ 6. 3 V _ Y 5 V _ 0 4
C 4 23 2 2 u _6 . 3 V _ X 5R _ 08
C4 2 7 R 4 24 1 u_ 6 . 3 V _ Y 5 V _ 04 * 0 _0 4 1. 1 V S _ V C C A _ B _ D P L
16mA 80mA 80mA

C 1 63
SA TA
L3 5 H C B 1 0 0 5K F -12 1 T 20
BD 4 7 V CC A DP L L A BF4 7 V CC A DP L L B
V C C A P LL S A T A
C 4 49 * 2 2u _ 6 . 3V _X 5 R _ 0 8
C 4 22 2 2 u _6 . 3 V _ X 5R _ 08
C4 2 6
1. 05 V S C 1 64
1 u_ 6 . 3 V _ Y 5 V _ 04 1 u _ 6. 3 V _ Y 5V _ 0 4
AF1 7 AF3 3 1 u _ 6. 3 V _ Y 5 V _ 0 4 A F 3 4 AG 3 4
55mA
11/03
1 .0 5 V S C1 5 5 1 u_ 6 . 3 V _ Y 5V _0 4 C1 9 1 C1 8 2 V C CS S T 0 . 1 u _1 0 V _ X 5R _0 4 + V 1 . 05 M _V C C S U S * 1 u_ 6 . 3 V _X 5 R _ 0 4 AG 3 3 V1 6
V CC V CC V CC V CC
I O[ 7 ] DIF F C L K N[1 ] DIF F C L K N[2 ] DIF F C L K N[3 ]
V CC S S C
V C C I O[ 4 ]
DC P S S T T17 V1 9 DC P S US [1 ] DC P S US [2 ] V C C A S W [ 22 ] T21 V2 1 V C C A S W [ 23 ] V C C A S W [ 21 ] T19
1. 01 A
1 .0 5 VS
1 . 0 5 V S _ V TT C 4 03
C4 1 2 *0 . 1 u _1 0 V _ X5 R _0 4
C4 1 3
V _P R OC _ I O
4 . 7 u _6 . 3 V _ X 5R _ 06
*0 . 1 u _1 0 V _ X5 R _0 4 A2 2
CP U
1mA
BJ 8
MI SC
RT C
C 4 60 1 u _ 6. 3 V _ Y 5V _ 0 4
C4 6 2 0 . 1u _ 1 0V _X 5 R _ 0 4
C4 6 1 0 . 1u _ 1 0V _X 5 R _ 0 4
HD A
RT CV CC
V CC RT C
V CCS US H DA
P3 2
16mA
3 . 3A _ 1 . 5 A _ H D A _I O
11/ 01
C2 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4
C o u g arP o i n t _R e v _1 p 0
Schematic Diagrams
CougarPoint - M 9/9
CougarPoint
U37 I AY 4 AY 42 AY 46 AY 8 B11 B15 B19 B23 B27 B31 B35 B39 B7 F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38 B B4 BB46 BC14 BC18 BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46 BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BD3 BF30 BF38 BF40 B F8 BG17 BG21 BG33 BG44 BG8 BH11 BH15 BH17 BH19 H10 BH27 BH31 BH33 BH35 BH39 BH43 BH7 D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42 D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34 F3 VSS [15 9] VSS [16 0] VSS [16 1] VSS [16 2] VSS [16 3] VSS [16 4] VSS [16 5] VSS [16 6] VSS [16 7] VSS [16 8] VSS [16 9] VSS [17 0] VSS [17 1] VSS [17 2] VSS [17 3] VSS [17 4] VSS [17 5] VSS [17 6] VSS [17 7] VSS [17 8] VSS [17 9] VSS [18 0] VSS [18 1] VSS [18 2] VSS [18 3] VSS [18 4] VSS [18 5] VSS [18 6] VSS [18 7] VSS [18 8] VSS [18 9] VSS [19 0] VSS [19 1] VSS [19 2] VSS [19 3] VSS [19 4] VSS [19 5] VSS [19 6] VSS [19 7] VSS [19 8] VSS [19 9] VSS [20 0] VSS [20 1] VSS [20 2] VSS [20 3] VSS [20 4] VSS [20 5] VSS [20 6] VSS [20 7] VSS [20 8] VSS [20 9] VSS [21 0] VSS [21 1] VSS [21 2] VSS [21 3] VSS [21 4] VSS [21 5] VSS [21 6] VSS [21 7] VSS [21 8] VSS [21 9] VSS [22 0] VSS [22 1] VSS [22 2] VSS [22 3] VSS [22 4] VSS [22 5] VSS [22 6] VSS [22 7] VSS [22 8] VSS [22 9] VSS [23 0] VSS [23 1] VSS [23 2] VSS [23 3] VSS [23 4] VSS [23 5] VSS [23 6] VSS [23 7] VSS [23 8] VSS [23 9] VSS [24 0] VSS [24 1] VSS [24 2] VSS [24 3] VSS [24 4] VSS [24 5] VSS [24 6] VSS [24 7] VSS [24 8] VSS [24 9] VSS [25 0] VSS [25 1] VSS [25 2] VSS [25 3] VSS [25 4] VSS [25 5] VSS [25 6] VSS [25 7] VSS [25 8] VS S[25 9] VS S[26 0] VS S[26 1] VS S[26 2] VS S[26 3] VS S[26 4] VS S[26 5] VS S[26 6] VS S[26 7] VS S[26 8] VS S[26 9] VS S[27 0] VS S[27 1] VS S[27 2] VS S[27 3] VS S[27 4] VS S[27 5] VS S[27 6] VS S[27 7] VS S[27 8] VS S[27 9] VS S[28 0] VS S[28 1] VS S[28 2] VS S[28 3] VS S[28 4] VS S[28 5] VS S[28 6] VS S[28 7] VS S[28 8] VS S[28 9] VS S[29 0] VS S[29 1] VS S[29 2] VS S[29 3] VS S[29 4] VS S[29 5] VS S[29 6] VS S[29 7] VS S[29 8] VS S[29 9] VS S[30 0] VS S[30 1] VS S[30 2] VS S[30 3] VS S[30 4] VS S[30 5] VS S[30 6] VS S[30 7] VS S[30 8] VS S[30 9] VS S[31 0] VS S[31 1] VS S[31 2] VS S[31 3] VS S[31 4] VS S[31 5] VS S[31 6] VS S[31 7] VS S[31 8] VS S[31 9] VS S[32 0] VS S[32 1] VS S[32 2] VS S[32 3] VS S[32 4] VS S[32 5] VS S[32 8] VS S[32 9] VS S[33 0] VS S[33 1] VS S[33 3] VS S[33 4] VS S[33 5] VS S[33 7] VS S[33 8] VS S[34 0] VS S[34 2] VS S[34 3] VS S[34 4] VS S[34 5] VS S[34 6] VS S[34 7] VS S[34 8] VS S[34 9] VS S[35 0] VS S[35 1] VS S[35 2] H46 K1 8 K2 6 K3 9 K4 6 K7 L1 8 L2 L2 0 L2 6 L2 8 L3 6 L4 8 M12 P1 6 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P3 0 N47 P1 1 P1 8 T3 3 P4 0 P4 3 P4 7 P7 R2 R48 T1 2 T3 1 T3 7 T4 W3 4 T4 6 T4 7 T8 V1 1 V1 7 V2 6 V2 7 V2 9 V3 1 V3 6 V3 9 V4 3 V7 W1 7 W1 9 W2 W2 7 W4 8 Y 12 Y 38 Y4 Y 42 Y 46 Y8 B G2 9 N24 A J3 A D4 7 B4 3 B E10 B G4 1 G14 H16 T3 6 B G2 2 B G2 4 C22 A P13 M14 A P3 A P1 B E16 B C1 6 B G2 8 B J28 H5 AA 1 7 A A2 A A3 AA 3 3 AA 3 4 AB 1 1 AB 1 4 AB 3 9 A B4 AB 4 3 A B5 A B7 AC 1 9 AC2 AC 2 1 AC 2 4 AC 3 3 AC 3 4 AC 4 8 AD 1 0 AD 1 1 AD 1 2 AD 1 3 AD 1 9 AD 2 4 AD 2 6 AD 2 7 AD 3 3 AD 3 4 AD 3 6 AD 3 7 AD 3 8 AD 3 9 AD4 AD 4 0 AD 4 2 AD 4 3 AD 4 5 AD 4 6 AD8 A E2 A E3 AF 1 0 AF 1 2 AD 1 4 AD 1 6 AF 1 6 AF 1 9 AF 2 4 AF 2 6 AF 2 7 AF 2 9 AF 3 1 AF 3 8 A F4 AF 4 2 AF 4 6 A F5 A F7 A F8 AG 1 9 AG2 AG 3 1 AG 4 8 AH 1 1 AH3 AH 3 6 AH 3 9 AH 4 0 AH 4 2 AH 4 6 AH7 AJ 1 9 AJ 2 1 AJ 2 4 AJ 3 3 AJ 3 4 AK 1 2 A K3 U37H VS S[0] VS S[1] VS S[2] VS S[3] VS S[4] VS S[5] VS S[6] VS S[7] VS S[8] VS S[9] VS S[10 ] VS S[11 ] VS S[12 ] VS S[13 ] VS S[14 ] VS S[15 ] VS S[16 ] VS S[17 ] VS S[18 ] VS S[19 ] VS S[20 ] VS S[21 ] VS S[22 ] VS S[23 ] VS S[24 ] VS S[25 ] VS S[26 ] VS S[27 ] VS S[28 ] VS S[29 ] VS S[30 ] VS S[31 ] VS S[32 ] VS S[33 ] VS S[34 ] VS S[35 ] VS S[36 ] VS S[37 ] VS S[38 ] VS S[39 ] VS S[40 ] VS S[41 ] VS S[42 ] VS S[43 ] VS S[44 ] VS S[45 ] VS S[46 ] VS S[47 ] VS S[48 ] VS S[49 ] VS S[50 ] VS S[51 ] VS S[52 ] VS S[53 ] VS S[54 ] VS S[55 ] VS S[56 ] VS S[57 ] VS S[58 ] VS S[59 ] VS S[60 ] VS S[61 ] VS S[62 ] VS S[63 ] VS S[64 ] VS S[65 ] VS S[66 ] VS S[67 ] VS S[68 ] VS S[69 ] VS S[70 ] VS S[71 ] VS S[72 ] VS S[73 ] VS S[74 ] VS S[75 ] VS S[76 ] VS S[77 ] VS S[78 ] VS S[79 ] Coug arPoi n t_Rev _1p 0 VSS [80 ] VSS [81 ] VSS [82 ] VSS [83 ] VSS [84 ] VSS [85 ] VSS [86 ] VSS [87 ] VSS [88 ] VSS [89 ] VSS [90 ] VSS [91 ] VSS [92 ] VSS [93 ] VSS [94 ] VSS [95 ] VSS [96 ] VSS [97 ] VSS [98 ] VSS [99 ] VS S[100 ] VS S[101 ] VS S[102 ] VS S[103 ] VS S[104 ] VS S[105 ] VS S[106 ] VS S[107 ] VS S[108 ] VS S[109 ] VS S[110 ] VS S[111 ] VS S[112 ] VS S[113 ] VS S[114 ] VS S[115 ] VS S[116 ] VS S[117 ] VS S[118 ] VS S[119 ] VS S[120 ] VS S[121 ] VS S[122 ] VS S[123 ] VS S[124 ] VS S[125 ] VS S[126 ] VS S[127 ] VS S[128 ] VS S[129 ] VS S[130 ] VS S[131 ] VS S[132 ] VS S[133 ] VS S[134 ] VS S[135 ] VS S[136 ] VS S[137 ] VS S[138 ] VS S[139 ] VS S[140 ] VS S[141 ] VS S[142 ] VS S[143 ] VS S[144 ] VS S[145 ] VS S[146 ] VS S[147 ] VS S[148 ] VS S[149 ] VS S[150 ] VS S[151 ] VS S[152 ] VS S[153 ] VS S[154 ] VS S[155 ] VS S[156 ] VS S[157 ] VS S[158 ] A K38 A K4 A K42 A K46 A K8 AL 16 AL 17 AL 19 AL 2 AL 21 AL 23 AL 26 AL 27 AL 31 AL 33 AL 34 AL 48 A M1 1 A M1 4 A M3 6 A M3 9 A M4 3 A M4 5 A M4 6 A M7 A N2 A N2 9 A N3 A N3 1 A P12 A P19 A P28 A P30 A P32 A P38 A P4 A P42 A P46 A P8 A R2 A R4 8 AT 11 AT 13 AT 18 AT 22 AT 26 AT 28 AT 30 AT 32 AT 34 AT 39 AT 42 AT 46 AT 7 A U2 4 A U3 0 A V16 A V20 A V24 A V30 A V38 A V4 A V43 A V8 A W14 A W18 A W2 A W22 A W26 A W28 A W32 A W34 A W36 A W40 A W48 A V11 AY1 2 AY2 2 AY2 8
-M
(GND)
Cou garPoint_Rev _1p 0
Schematic Diagrams
New Card, Mini PCIE

NEW CARD(Port 3)
Sheet 22 of 43 New Card, Mini PCIE

10 /29
MINI CARD WLAN

11/01
J _M I N I 1 [ 15 , 2 4 , 26 ] P C I E _ W A K E # 3 .3 V R 4 90 1 0 K _ 04 R6 0 5 *0 _ 04 1 3 5 7 11 13 9 15 W AKE# C O E X1 C O E X2 C L K R E Q# REF C L KREF C L K+ GN D 0 GN D 1 3. 3 V A U X_ 0 1 . 5V _ 0 U I M _P W R UIM _ DA T A U I M_ C L K UIM _ RE S E T U I M_ V P P GN D 5 2 6 8 10 12 14 16 4
3 .3 V
20 mil
C4 7 2 0 . 1 u_ 1 6V _Y 5 V _0 4
R5 5 2 R4 9 1
*0 _ 0 4 *1 0 m li _ 04
B T_ S B D #
VD D3 8 0C LK [ 27 ]
[ 1 4 ] W L A N _ C L K R E Q# [1 4 ] CL K_ PCIE _ M INI# [ 1 4 ] C L K _ P C I E _M I N I
3 I N 1 [ 2 7]
KEY
21 27 29 [ 2 7 ] W L A N _ D E T# [ 14 ] P C I E _ R X N 3 _ W L A N [ 1 4 ] P C I E _R XP 3_ W L A N [ 1 4 ] P C I E _T X N 3 _ W L A N [ 1 4] P C I E _ T XP 3_ W L A N R4 9 4 3. 3 V R 1 99 R 2 04 R 4 98 R4 9 9 R5 0 1 B T _S B D # [ 1 4 ] B T _S B D # R5 5 3 * 0_ 0 4 CL _ CL K _ 1 * 0_ 0 4 CL _ DA T A _ 1 * 0_ 0 4 CL _ RS T # _ 1 * 10 K _ 0 4 0 _0 4 *0 _ 04 *0 _ 04 35 23 25 31 33 17 19 37 39 41 43 45 47 49 51 GN D 2 GN D 3 GN D 4 GN D 1 1 P E T n0 P E T p0 P ERn 0 P ERp 0 R e s erv ed 0 R e s erv ed 1 GN D 1 2 3. 3V A U X _3 3. 3V A U X _4 GN D 1 3 R e s erv ed 2 R e s erv ed 3 R e s erv ed 4 R e s erv ed 5 GN D 6 GN D 7 GN D 8 GN D 9 G ND1 0 W _ DIS A B L E # P ERSE T # SM B _ CL K S M B _ DA T A U S B _D U S B_ D+ 3. 3 V A U X_ 1 1 . 5V _ 1 1 . 5V _ 2 3. 3 V A U X_ 2 L E D _W W A N # L E D_ W L A N# L E D _W P A N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46 W L A N _ E N [ 27 , 2 8 ] B U F _ P L T _R S T # [ 17 , 2 4 , 26 , 2 7 ] US B _ D # US B _ D R3 5 7 R3 5 6 * 1 0m i _ 0 4 l * 1 0m i _ 0 4 l R4 8 9 0 _ 04 B T _D E T # [ 2 7 , 2 8] U S B _ P N 2 [ 17 ] USB _ P P 2 [1 7 ] 3 . 3V 3 . 3V W L A N _ L E D # [ 2 7 , 28 ]
[ 27 , 2 8 ] B T _E N
[ 1 4] [ 1 4] [ 1 4]
C L _C L K 1 C L _D A T A 1 C L _R S T #1 3 . 3V
[ 27 , 2 8 ] B T _E N
MP C E C - S 00 F 1 -T P 0 0
1 0/ 29
[ 3 , 6, 8, 9 , 1 0 , 20 , 2 6 , 28 , 3 1 , 33 ] 1 . 5 V [ 19 , 2 9 , 31 ] 1 . 5 V S [ 2 , 3, 8 , 1 1 , 13 , 1 4 , 1 5, 1 7 , 1 8, 1 9 , 2 0, 2 3 , 2 6, 2 8 , 3 0, 31 , 3 3 , 34 , 3 5 ] 3. 3 V [ 3, 9 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9, 2 0 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 29 , 3 0 , 31 , 3 6 ] 3. 3 V S [ 1 3 , 2 4, 27 , 3 1 , 32 , 3 8 ] V D D 3
New Card, Mini PCIE B - 23
Schematic Diagrams
CCD, 3G, TPM

MINI CARD 3G(Port 6)
3 G_ 3 . 3V 1 3 5 7 11 13 9 15 J_ 3 G1 W AKE # C OE X 1 C OE X 2 C R R G G LK R E Q# E F CL K E F CL K + ND0 ND1 3. 3V A U X_ 0 1 . 5V _ 0 U I M _P W R U I M_ D A T A U I M_ C L K UIM _ RE S E T U I M_ V P P GN D 5 2 6 8 10 12 14 16 4
3G POWER
3 .3 V
R5 0 9
*0 _ 06 Q3 0 A O 34 1 5 S D 3G _3 . 3 V
>48 mil
>48 mil
60m ils
U I M_ P W R U I M_ D A TA U I M_ C L K U I M_ R S T U I M_ V P P G C 50 0 C2 0 9 C2 1 2 0. 1 u _ 16 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 04 R5 1 9 D 3 30 K _ 04 + 22 0 u_ 6 . 3 V _6 . 3 *6 . 3 *4 . 2 D 1 0 0K _ 0 4 G S C 2 87 1 0 u_ 1 0V _Y 5V _ 0 8 0 . 1 u _1 6 V _ Y 5 V _0 4 R5 2 0 1 0 _0 6 C5 0 7 C 4 83 R 51 5 0. 1 u _1 6 V _ Y 5 V _ 04
Q 33 M TN 7 00 2 Z H S 3
KEY
21 27 29 [ 2 7 ] 3 G_ D E T # 35 23 25 31 33 17 19 37 39 41 43 45 47 49 51 G ND2 G ND3 G ND4 G ND1 1 PETn 0 PETp 0 P E R n0 P E R p0 R es e rv e d0 R es e rv e d1 G ND1 2 3 .3 V A UX _ 3 3 .3 V A UX _ 4 G ND1 3 R es e rv e d2 R es e rv e d3 R es e rv e d4 R es e rv e d5 88 9 10 -5 2 04 M-0 1 GN D 6 GN D 7 GN D 8 GN D 9 G ND1 0 W _ DIS A B L E # P E RS E T # S MB _ C L K S M B _ DA T A U S B _D US B _ D+ 3. 3V A U X_ 1 1 . 5V _ 1 1 . 5V _ 2 3. 3V A U X_ 2 LE D _ W W A N # L E D_ W L A N# LE D _ W P A N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46 + 2 20 u _4 V _ V _ A U I M _C LK U I M _R S T U I M _P W R R 5 04 *1 0m i l _0 4 U I M _C 3 G _E N [ 2 7] [ 2 7 ] 3 G_ P W R _ E N
G S
Q3 5 MT N 70 0 2Z H S 3
Fro H8 def m ault HI
3 G_ 3 . 3 V
U S B _P N 4 [ 17 ] U S B _P P 4 [ 1 7 ] 3 G_ 3 . 3 V
SIM CONN
U I M_ P W R R5 0 3 *4 . 7K _ 0 4 U I M_ D A T A C2 3 5 0. 1 u _ 16 V _ Y 5 V _ 04 J_ S I M 1
Sheet 23 of 43 CCD, 3G, TPM
C2 4 2 0 . 1u _ 1 6V _ Y 5 V _ 0 4
C2 6 7 1 0u _ 10 V _ Y 5 V _ 0 8
3G _3 . 3 V C2 8 6
C 3 C 2 C 1
LOCK (TOP VIEW)

U I M_ C L K U I M_ R S T U I M_ P W R U I M_ D A T A U I M_ V P P U I M_ GN D
R 48 8 * 1 0m i _ 0 4 l C 7 U I M_ D C 6 C 5 C 4 70 C 46 9 * 22 p _ 50 V _ N P O _0 4 U I M_ D A T A U I M_ V P P
OPEN
C 4 89 C 1 7 70 6 61 -1 S I M LO C K * 22 p _ 50 V _ N P O _0 4
C4 7 1 *2 2 p_ 5 0V _ N P O_ 0 4
* 2 2p _ 50 V _ N P O _0 4
A sse rted bef ore en te ring S3

C5 0 8 C2 8 5 *0 . 1 u_ 1 6V _Y 5V _ 0 4 C2 9 4 *0 . 1 u_ 1 6V _ Y 5V _ 0 4 C 3 00 *1 u_ 1 6 V _X 5 R _ 0 6 5V V D D1 V D D2 V D D3 10 19 24 C2 U 41 4 5 3 3 . 3V S 5 L F RA M E # L RE S E T # S E R IRQ C LK R U N # L P CP D # T P M_ B A D D TP M _P P 9 T E S T B I/B A DD 7 PP XT A L I XTAL O N C_ 1 N C_ 2 N C_ 3 TESTI * S L B 96 3 5T T R3 4 9 P C LK _ T P M *3 3 _0 4 P C LK _ T P M1 X TA L I *1 0 p_ 5 0V _ N P O_ 06 3 . 3V S T P M _P P T P M _B A D D R 3 41 R 3 48 R 3 52 *1 0 K _0 4 *1 0 K _1 % _0 4 *1 0 K _1 % _0 4 1 2 4 3 C 2 92 X TA L O G ND_ 1 G ND_ 2 G ND_ 3 G ND_ 4 14 4 11 18 25 VSB C2 8 2 *0 . 1 u_ 1 6V _Y 5V _ 0 4 GP I O G P I O2 6 2 13 T P M3 0 0 4 T P M3 0 0 5 X TALI X TALO C 3 05 * 18 p _ 50 V _ N P O _0 4 4 3 1 2 X7 * MC -1 4 6 _3 2 . 7 68 K H z C 30 2 [ 27 ] C C D _ E N [ 17 ] U S B _P N 5 [ 1 7] U S B _ P P 5 [2 7 ] CC D_ DE T # C C D _D E T # J _ CC D1 1 2 3 4 5 8 5 2 05 -0 50 0 1 *1 u _6 . 3 V _ Y 5 V _ 04 EN G ND G 5 24 3 A 5 1 VIN VIN V OU T R1 1 2 *1 00 K _ 0 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 1 u_ 6 . 3 V _Y 5 V _0 4 1 u_ 6 . 3 V _Y 5 V _0 4 C 6 C5 C4 MJ_ 1 CCD 1
TPM 1.2
3. 3 V S
L PC r es et timing:
*0 . 1 u_ 1 6 V _Y 5V _ 0 4
L PCPD# inact iv to LRST# inact iv 3 2~96us e e

U 28 [ 1 3 , 27 ] L P C _ A D 0 [ 1 3 , 27 ] L P C _ A D 1 [ 1 3 , 27 ] L P C _ A D 2 [ 1 3 , 27 ] L P C _ A D 3 [ 17 ] P C LK _ T P M [ 1 3 , 27 ] [ 3 , 17 ] [ 1 3 , 27 ] [ 15 ] L P C _ F R A ME # P L T _R S T # S E R IRQ P M _C L K R U N # 26 23 20 17 21 L CL K 22 16 27 15 28 L A D0 L A D1 L A D2 L A D3
CCD
5 V _C C D
48 mil
TPM
[ 15 ] S 4 _ S TA TE #
HI: AC CESS L OW NO : RMAL ( Int ernal PD) HI: 4E/ 4F H T PM _B D L OW 2E/ 2F H AD : T PM _PP
T P M 30 0 1 1 T P M 30 0 2 3 T P M 30 0 3 12 8
6-22-32R76-0B4
Fro H8 def m ault HI
* 18 p _5 0 V _ N P O _0 4
Co-layout X7, X8
X8 *1 T JS 12 5 D J 4 A 42 0 P _ 32 . 7 68 K H z
[ 2 , 3, 8, 1 1 , 13 , 1 4 , 15 , 1 7 , 18 , 1 9, 20 , 2 2, 2 6 , 2 8, 3 0 , 3 1, 3 3 , 3 4, 3 5 ] 3 . 3V [ 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 14 , 1 5 , 16 , 1 7 , 18 , 1 9, 20 , 2 4, 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 1, 3 6 ] 3 . 3V S [ 2 0 , 2 6, 3 0 , 3 1, 3 3 , 3 4, 3 5 ] 5 V
6-22-32R76-0B2 6-22-32R76-0BG
B - 24 CCD, 3G, TPM
Schematic Diagrams
Card Reader/LAN JMC251C

JMC251C
3 . VS 3 C 16 5 R 49 7 R 49 3 V C C _ C AR D R 15 8 1 K_ 04 S D _W P U 36 *4 . 7K _0 4 1 0K _0 4 S D _C D # MS _I N S # C 17 0 0. 1 u_ 16 V_ Y 5V _0 4 2. 2 u_ 6. 3V _ Y 5V _0 6 S D _C L K C 4 54 ne ar P in# 41 *1 0p _5 0V _N P O_0 6 SD _ C LK R 4 48 *2 0mi l _0 4 1 /0 2 1 Switch ing Regulator close to PIN33 (>20 mil) R E GLX L3 7 DV DD (>20mil) C 17 7 10 u_ 6. 3 V_ X5 R _0 6 Pi n#3 3 C 44 8 LA N _ SD A For REGL X JMC251/261 only 0. 1 u_ 16 V_ Y 5V _0 4 Pi n# 33 6 5 4 D VD D 10/29 R 42 5 LA N _ SC L R 42 6 3. 3V _ LA N 3 . V S V DD3 3 * 4. 7K _ 04 * 4. 7K _ 04 8 U 35 VCC WP 7 MP D 1 2 3 R 21 6 R 21 7 C 44 0 1 0K _0 4 * 4. 7K _0 4 0 . 1u _16 V _Y 5 V_ 04 S D X C _P OWE R 3. 3V _ LA N SD X C _ POW E R S D _ C LK _C S D _ BS S D _D3 S D _D2 S D _D1 S D _D0 DV DD MD I O1 1 LA N _ LE D0 LA N _ LE D1 I SON_ 25 1C S WF 25 20 C F -4R 7M-M
V DD3
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
Ca rd Rea der Pu ll High /Lo w Re sis tor s

49 50 51 52 53 54 A V D D 12 _55 55 56 57 58 59 LA N _ MD I P2 60 LA N _ MD I N 2 61 A V D D 12 _62 62 LA N _ MD I P3 63 LA N _ MD I N 3 64 MD I O10 MD I O9 MD I O8 A V D D 12 _52 MD I O1 0 MD I O9 MD I O8 V DD V I P _1 V I N _1 A V D D 12 V I P _2 V I N _2 GN D A V D D 33 V I P _3 V I N _3 A V D D 12 V I P _4 V I N _4
MDI O1 1 LA N _ LE D0 LA N _ LE D1 I SON GND VD DI O VD DO M DI O5 M DI O4 M DI 3 O MD I 2 O MD I O1 MD I O0 F B1 2 GND LX
R 2 07 * 28m li _0 6 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 (>20mil) VD D R EG 3 . 3V S V C C _ C AR D MPD LA N _P C I E _W A KE # LA N _S C L LA N _S D A C PP E N SD _ WP MD I O12 MD I O14 SD _ C D # BU F _ PL T_ R ST # [ 17 , 22 , 6, 2 7] 2 3 . 3V _L AN (>20mil) C 1 99 1 0u _6 . 3V _X 5R _ 06 P in# 32 (>20mi l)
D VD D D VD D
R 162 R 156
*2 0mi l _04 2 [ 5] LA N _ MD I P0 2 *2 0mi l _04 [ 5] LA N _ MD I N 0 2 [ 5] LA N _ MD I P1 2 [ 5] LA N _ MD I N 1 3. 3 V_ LA N 2 [ 5] LA N _ MD I P2 2 [ 5] LA N _ MD I N 2 2 [ 5] LA N _ MD I P3 2 [ 5] LA N _ MD I N 3
JMC251 C
(LQFP 64)
D VD D
R 144
*2 0mi l _04
REXT A V DD 33 X IN X OUT C LK N C LK P AV DD 1 2 R XP RXN GND T XN T XP A V DD 12 MDI O1 3 MDI O7 C R_C D1 N
V DDRE G V C C 3V P W RCR TE S T MP D W AK E N LA N _L ED 2 C R _ LE D R ST N C PP E N GN D V DDIO MD I 6 O MD I O1 2 MD I O1 4 C R _C D 0 N
10/2 9 J MC 25 1-LGB Z 0C
1 2 3 4 5 6 7 AV D D1 2_ 7 *20 mi _ 04 8 l 9 10 11 12 A V DD 12 _13 13 MD I O1 3 14 MD I O7 15 16 CR _CD 1 N
PCIe D ifferential Pairs = 100 Ohm
LA N X I N LA N X OUT
R E X T_C
R 14 2
12 K_ 1% _0 4 AV D D 1 2_ 7 AV D D 1 2_ 13 3. 3 V_ LA N C 43 5 0. 1u _1 6V _Y 5 V _0 4 Pi n#7 C 13 9 0. 1u _1 6V _Y 5V _0 4 Pi n#1 3 DV DD R 1 46 *2 0m li _0 4 R 14 5
DVDD
R 13 6 R 42 7
*0 _0 4 *2 0m li _0 4
MS _I N S # 1 /0 2 1 P C I E _R X P 4_GL A N [ 1 4] PC I E _ R XN 4 _GLA N [ 14 ]
P C I E_ R XP _4 _GL A N P C I E_ R XN _ 4_ GLA N
C 4 33 C 4 34
0. 1 u_ 10 V_ X7 R _0 4 0. 1 u_ 10 V_ X7 R _0 4
AV D D 1 2_ 52
AV D D 1 2_ 55
A VD D 1 2_ 62
A VD D 12_ 7
C 44 5 0. 1u _1 6V _Y 5 V _0 4 Pi n#5 2
C 15 7 0. 1u _1 6V _Y 5V _0 4 Pi n#5 5
C 14 5 0. 1 u_1 6V _ Y 5V _0 4 Pi n# 62
C 13 6 *1 0u_ 6. 3 V_ X5 R _0 6 Pi n# 7 Re se rv ed R 428 X 10 2 1 *1 M_04
L AN X OU T LA N X I N For JMC251 C
P C I E _TX N 4_ GLA N [ 14 ] P C I E_ TX P4 _GL A N [ 1 4] C L K_ P C I E_ GLA N [ 14 ] C LK _ PC I E _GL A N # [ 14 ]
3. 3 V_ LA N
FS X 5L_ 25 MH Z X9 3 4 C 45 0 C 43 1 2 1 * FS X5 L_ 25 MH z 2 2p _50 V _N P O_0 4 C 432 22p _5 0V _N PO_ 04 0 . 1u _16 V _Y 5 V_ 04 P in #2 C 19 5 C 14 8 0. 1u _1 6V _Y 5V _0 4 Pi n#4 3
3. 3 V_ LA N
C 13 4 0. 1u _1 6V _Y 5 V _0 4 Pi n#4 3
* 10u _6 . 3V _X 5R _ 06 P in #2
3. 3 V_ LA N 6-22-25R00-1B4 6-22-25R00-1B5 C 13 3 *10 u_ 6. 3V _ X5R _06 Pi n#5 9 Re ser ve d C 13 5 *0. 1 u_ 16V _ Y 5V _0 4 Pi n#5 9 C 18 9 C 43 7 C 4 78 * 0. 1u _1 6V _Y 5 V _0 4 C 4 81 *0 . 1u _1 6V _Y 5 V_ 04 C 4 80 *0 . 1u _1 6V _Y 5 V_ 04 V C C _C A R D VC C _C A R D
*0. 1 u_ 16 V_ Y 5V _0 4 0. 1 u_ 16 V_ Y 5V _0 4 Pi n# 2 Pi n# 21
P lac e a l c a p ac ito rs c lo se d to c h ip . T h e s u b sc rip t in e ac h CA P in c ic ate s th e p in n u mb er o f J M C 25 1 /JM C2 6 1 t h at s h o u ld b e c o s e d to . l
Near Ca rdr ead er CON N
*0 . u_ 16 V_ Y 5V _0 4 1
SCL SDA A0 A1 GN D A2 *A T2 4C 0 2B N
V D D R EG (>20mil) C 198 0 . 1u _1 6V _Y 5 V _04 P in #3 2 C 44 3
3. 3 V S
C 44 2 0. 1u _1 6V _ Y 5V _0 4 Pi n# 31 3 . 3V _L A N R 43 1 V DD3 *0_ 06
*10 u_ 6. 3V _ Y 5V _0 6 P in #3 1
V DD3
I S ON _2 51 C 1 91 R R 1 90
1 /0 2 1 *20 mi _ 04 l *10 0K _0 4 R 434 D1 6 1 0K _0 4 3. 3 V_ LA N
[ 15 , 22, 2 6] P C I E_ WA K E #
P C I E_ WA K E #
C R B 7 51 S-4 0C 2
LA N _ PC I E _W A K E#
LA N _P C I E _W AK E # [ 27 ]
4 IN 1 SO CKET SD/MM C/MS/ MS Pr o

S D _C D # S D _D 2 S D _D 3 S D _B S V CC_ CA RD C 48 2 0. 1u _1 6V _Y 5 V _0 4 R 49 6 *7 5_ 04 V CC_ CA RD C 47 9 0. 1u _1 6V _Y 5 V _0 4 S D _D 0 S D _D 1 S D _W P S D _C L K S D _D 3 MS _I N S # S D _D 2 S D _D 0 S D _D 1 S D _B S S D _C L K P1 P2 P3 P4 P5 P6 P7 P8 P9 P 10 P 11 P 12 P 13 P 14 P 15 P 16 P 17 P 18 P 19 P 20 P 21 J_ C AR D -R E V 1 C D _ SD D A T2 _S D C D / D A T3 _S D C MD _ SD V S S_ S D V D D _S D C L K_ S D V S S_ S D D A T0 _S D D A T1 _S D W P _S D V S S_ MS V C C _MS S C LK _ MS D A T3 _MS I N S _MS D A T2 _MS S D I O/ D A T0_ MS D A T1 _MS B S _MS GN D V S S_ MS GN D MD R 01 9-C 0 - 04 2 1
Card Reader Power

V C C _C A R D
Sheet 24 of 43 Card Reader/LAN JMC251C
P2 2 P2 3
VD D 3
2A
P C 99
V DD3 P C 1 02 5 9 7 8 1 U 20 VIN VIN P OK EN GN D *A X 6 6 1 0 * 82 p_5 0V _ N PO_ 04 VFB 2 PC9 8 V C N TL V OU T V OU T 4 3 P R 1 16 * 1. 27 K _1 %_0 4 6 *1 u_ 10 V_ Y 5V _ 06
1.2V
1A
D VD D
P R 1 15 *0 _0 4
GS 711 3 6- 02- 071 13- 320 AX 661 0 6- 02- 066 10- 320
PR 1 14 *2. 4 9K _1 %_ 04
10/29
[ 13, 2 2, 2 7, 31 , 32 , 8] V D D 3 3 [ 25 ] D VD D [ 3, 9 , 10 1 1, 1 2, 13 , 14 , 15, 1 6, 1 7, 18 , 19 , 0, 2 3, 25 , 27 , 28, 2 9, 3 0, 31 , 36 ] 3 . 3V S , 2 3 [ , 6, 8 9 , 10 , 20, 2 6, 2 8, 31 , 33 ] 1 . 5V , [ 2 0, 23 , 26 , 30, 3 1, 3 3, 34 , 35 ] 5 V
Card Reader/LAN JMC251C B - 25
Schematic Diagrams
LAN (JMC251C), SATA HDD, ODD

R3 7 4 * 0_ 0 4 2
GIGA LAN (JMC251C)

L29 DV D D [2 4 ] L A N _ M D IP 0 [2 4 ] L A N _ M D IN 0 [2 4 ] L A N _ M D IP 1 [2 4 ] L A N _ M D IN 1 L A N_ MD L A N_ MD L A N_ MD L A N_ MD L A N_ MD L A N_ MD L A N_ MD L A N_ MD IP 0 IN 0 IP 1 IN 1 IP 2 IN 2 IP 3 IN 3 12 11 9 8 6 5 3 2 10 7 4 1 C 54 C3 4 3 C3 4 2 C3 4 1 T D4 + T D4 T D3 + T D3 M X4 + M X4 M X3 + MX 3 13 14 16 17 19 20 22 23 15 18 21 24 L MX 1+ L MX 1L MX 2+ L MX 2L MX 3+ L MX 3L MX 4+ L MX 4R 75 * 0_ 0 4 [2 4 ] L A N _ M D IP 2 [2 4 ] L A N _ M D IN 2 [2 4 ] L A N _ M D IP 3 [2 4 ] L A N _ M D IN 3 T D2 + T D2 T D1 + T D1 T CT 4 T CT 3 T CT 2 T CT 1 G S T 50 0 9 LF N N N N MC MC MC MC T_ 1 T_ 2 T_ 3 T_ 4 MX 2 + M X2 MX 1 + MX 1 MC T 4 MC T 3 MC T 2 MC T 1
1L 25
4 3 * W CM 20 1 2 F 2 S -S H O R T R3 7 5 * 0_ 0 4
R3 7 6 1L 26
* 0 _0 4 2 J _R J 1 D L MX 1 + D L MX 1 D L MX 2 + D L MX 2 D L MX 3 + D L MX 3 D L MX 4 + D L MX 4 1 2 3 6 4 5 7 8 DA + DA DB + DB s h e ld i s h e ld i GN D 1 GN D 2
R3 7 8 1L 27
*0 _ 04 2
4 3 *W C M 2 01 2 F 2 S -S H O R T R3 7 7 * 0 _0 4
G ND
4 3 * W CM 20 1 2 F 2 S -S H O R T R3 8 0 *0 _ 04
R3 8 5 1L 28
* 0 _0 4 2
DC+ DCDD+ DDP J S -0 8S L 3 B
4 3 *W C M 2 01 2 F 2 S -S H O R T R3 8 7 * 0 _0 4
W2 40HU PJS -08SL 3B W2 50HU PJS -08SO 1B-1
0 .0 1u _ 1 6V _ X 7 R _ 0 4
*0 . 0 1u _ 1 6V _ X 7 R _ 0 4 *0 .0 1 u_ 1 6 V _X 7 R _ 0 4 *0 .0 1u _ 16 V _ X 7 R _ 04
R4 0 2 R3 9 9 R3 9 7 R3 9 4
75 _ 1 %_ 0 4 75 _ 1 %_ 0 4 75 _ 1 %_ 0 4 75 _ 1 %_ 0 4
N M C T _R
C 3 35
Sheet 25 of 43 LAN(JMC251C), SATA HDD, ODD
1 0 0 0p _ 2 K V _ X7 R _ 1 2
SATA HDD
J _ HD D1 S1 S2 S3 S4 S5 S6 S7 P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 A LL T OP -C 16 6 N 5 -1 2 20 5 -L P IN G N D1 ~ 2 = G N D S A TA _ T X P 0 S A TA _ T X N 0 S A TA _ R XN 0 S A TA _ R XP 0 C4 8 7 C4 8 6 C4 8 5 C4 8 4 0 .0 1 u_ 1 6 V _X 7 R _ 0 4 0 .0 1 u_ 1 6 V _X 7 R _ 0 4 0 .0 1 u_ 1 6 V _X 7 R _ 0 4 0 .0 1 u_ 1 6 V _X 7 R _ 0 4 3 . 3V S S A TA T X P 0 [1 3] S A TA T X N 0 [1 3 ] S A TA R X N 0 [ 1 3] S A TA R X P 0 [ 13 ]
SATA ODD
Zero Power ODD
J _ OD D 1 G ND 1 A+ AG ND 2 BB+ G ND 3 S1 S2 S3 S4 S5 S6 S7 C4 3 0 C4 2 8 C4 2 5 C4 2 1 0 .0 1u _ 1 6V _ X 7 R _ 0 4 0 .0 1u _ 1 6V _ X 7 R _ 0 4 0 .0 1u _ 1 6V _ X 7 R _ 0 4 0 .0 1u _ 1 6V _ X 7 R _ 0 4 S A T A T X P 2 [13 ] S A T A T X N 2 [1 3] S A T A R XN 2 [ 13 ] S A T A R XP 2 [1 3 ] C 5 21 P1 P2 P3 P4 P5 P6 5 V S _ OD D U 42 1 V O UT C4 1 1 C 4 10 C4 0 8 C4 0 4 +C 3 9 3 2 *1 0 0 u_ 6 . 3 V _B 2 0 . 1u _ 1 6V _ Y 5V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 u_ 6 .3 V _Y 5 V _0 4 10 u _ 10 V _ Y 5 V _ 0 8 R 5 55 + C 2 08 *1 00 u _ 6. 3 V _ B _ A 5 V S [1 1 ,12 ,1 9 ,2 0,2 9 ,3 0,3 1 ,3 6,3 7 ] D V D D [ 24 ] 3 .3 V [2 , 3, 8 ,1 1 ,1 3,1 4 ,1 5,1 7 ,1 8,1 9 ,2 0,2 2 ,2 3,2 6 ,2 8, 30 ,3 1 , 33 ,3 4 , 35 ] 1 .5 V [3 , 6, 8 ,9 ,1 0 , 20 ,2 6 , 28 ,3 1 , 33 ] 3 .3 V S [3 , 9 ,10 , 1 1 ,12 , 1 3 ,14 , 1 5 ,16 , 1 7 ,18 , 1 9 ,2 0, 2 3 ,2 4, 2 7 ,2 8, 2 9 ,3 0,3 1 ,3 6] GN D G5 2 43 A 1 0 0K _ 0 4 EN 3 S A T A _ OD D_ P W R GT [1 8] VIN VIN 4 5 C 5 22 5 VS
1.5A
5V S
1A
0 . 1u _ 1 6V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _ Y 5 V _ 0 4 H D D _N C 1 H D D _N C 2 H D D _N C 3 *0 . 1 u _1 6 V _ Y 5 V _0 4 10 u _ 10 V _ Y 5 V _ 08 1u _ 6 . 3V _Y 5 V _ 0 4 H D D _N C 0
DP V_ 5 0 V _5 0 _ 1 MD G ND 4 G ND 5
S A T A _ OD D_ P R S N T # [1 8 ] S A T A _ OD D_ D A # [1 7 ]
0 . 1 u _1 6 V _ Y 5 V _ 04 * 0 .01 u _ 16 V _ X 7R _ 04
C 18 5 5 3-1 1 3 05 -L
C4 7 3
C4 7 4
W 240H AL U LTOP -C166 N5-12 205L W 250H 1U 16210056 1
B - 26 LAN (JMC251C), SATA HDD, ODD
C2 1 0
C4 7 6
C4 7 5
Schematic Diagrams
USB 3.0 NEC, USB Charger

3. 3 V L 63 C 54 8 0. 1 u_ 10 V _X 5 R _0 4 3 3 VA . 1. 0 5 V 3. 3 V A
.
C 54 9 C 5 51 0. 1 u _1 0V _ X5 R _ 04 0. 1 u_ 1 0V _ X5 R _ 04 0. 1 u_ 10 V _X 5 R _0 4 C 55 0 C5 5 2 C 5 53 C 5 54 5p _ 50 V _N P O_ 0 4 0 . 1u _ 10 V _X 5R _0 4 0 . 01 u_ 1 6V _ X7 R _ 04 3 . 3V A
W/O U SB Cha rg er
RE /R F
G_ D M0 _0 G_ D P 0_ 0 R 55 6 R 55 7 0 _ 04 0 _ 04 1 0 /2 9 U S B _P N 1_ A U S B _P P 1 _A
H C B 1 60 8 K F-1 2 1T 25
C 55 6 0 . 01 u _1 6V _ X7 R _ 04
C 55 9 0 . 01 u _1 6V _ X7 R _ 04
USB C har ger c omp one nt s

80 m il
IN PPAD 1 2 3 DP_ O 4 I L I M_S E L R 56 0 P P ON VD D 5 R 58 2 [ 2 7, 3 1, 3 2] D D _ON *1 0K _ 04 *0 _0 4 5 6 CT L 1 7 CT L 2 8 CT L 3 NC F A U LT # 13 R 56 6 *0_ 0 4 G _ OC # I L I M1 9 E N/DS C GN D I L I M0 16 15 R 56 1 R 56 3 *17 . 8K _ 1 %_ 04 *40 . 2K _ 0 4 D P _I N 14 U 43 17 V DD5 V C C _ T PS 2 5 40 12 O UT D M_I N 11 10 U S B _P N 1 _A U S B _P P 1_ A
C5 5 5 C 55 7 C 55 8 0 . 01 u_ 1 6V _ X7 R _ 04 0. 0 1u _1 6 V_ X 7R _ 0 4 0 . 01 u _1 6V _ X7 R _ 04 C 5 61 C 5 64 0. 0 1 u_ 16 V _X 7R _0 4 0. 0 1 u_ 16 V _X 7R _0 4 C 56 0 C 5 62 C 56 3 C 5 65 0. 0 1u _1 6 V_ X 7R _ 0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _1 6 V_ X 7R _ 0 4 0 . 01 u_ 16 V _X 7 R _0 4 H1 1 K1 1 K1 2 L8 E 11 E1 2 L13 L1 4 P1 3 L9 L 10 F3 G3 G4 D10 F 13 F 14 H 3 H4 L5 N4 N5 N6 P3 E3 E4 C4 C5 C6 C7 D5 C8 C9 D8 D9 D7
8 mil 0
C 56 6
C 56 7
G _D M0_ 0 G _D P 0_ 0
D M _O
U4 4
0. 1 u_ 10 V _X 5 R _0 4 0 . 0 1u _1 6V _ X7 R _ 04 U2 A V DD3 3
V DD3 3 V DD 33 V D D33
V DD3 3 V DD3 3 V DD3 3
V DD3 3 V DD3 3
V DD 33 V D33 D V DD3 3 V DD3 3
V DD1 0 V DD 10 V D D10 V DD1 0 V DD1 0
V DD1 0 V DD 10 V D D10 V DD1 0
V DD1 0 V DD1 0
V DD1 0 V DD1 0 V DD 10
V D10 D V DD1 0 V DD1 0 V DD1 0
V DD 33 V D33 D
V D D10 V D10 D
[ 14 ] C LK _ P C I E _U SB 3 0 [ 1 4] C L K _P C I E _ U S B 30 # [ 1 4] P C I E _ R XP 2 _U SB 3 0 [ 14 ] P C I E _R X N 2 _U SB 3 0 [ 1 4] P C I E _ TX P 2_ U S B 30 [ 14 ] P C I E _T XN 2_ U S B 30 3 . 3V [ 17 , 22 , 2 4, 2 7] B U F _ P LT _R S T # [ 1 5, 2 2, 2 4] P C I E _ W AK E # [ 14 ] P C I E C LK R Q2# D2 2 R B7 5 1S -4 0C 2 A R 58 6 39 2K _ 1% _0 4 1 /0 1 1 3 . 3V A U X D E T_ R 1 1 /0 1 R 58 7 1 0K _ 04 [ 1 3] U S B 3 0_ S MI # C 56 8 C 56 9
B2 B1 0 . 1u _ 10 V _X 5R _0 4 D 2 0 . 1u _ 10 V _X 5R _0 4 D 1 F2 F1
P E CL K P P E CL K N P E T XP P E T XN P E RX P P E RX N
U3A V D D 33
B6 A6 N8 P8 B8 A8
U 3T XD P2 U 3 TX D N 2 U 2 D M2 U 2D P2 U 3 R XD P2 U 3R X D N 2
S S TX 2 S S TX 2 # U 2 D M2 U2 DP 2 S S RX 2 S S R X 2# R 56 2 10 K _0 4 G_ OC # P P ON 3. 3 V
VD D 5
R 5 64 R 5 65
*1 0K _ 04 *1 0K _ 04 A C _ I N D G
[ 27 , 38 ] A C _I N #
Q37 *TP S 2 54 0 *MT N 7 00 2Z H S 3
11 /19 CTL 1 CTL 1 CTL 1 CTL 2 CTL 2 CTL 2
M_ P FP16 Q
H2 K1 K2 J2 J1 H1 P5 U S B _ S PI _ S C L K M2 U S B _ S PI _ C E # N 2 U S B _ S PI _ S I N1 U S B _ S PI _ S O M1 R 5 93 47 K _0 4 K1 3 K1 4 J1 3 P4
P E RS T B PEW AKEB P E C R E QB A U XD E T PSEL S M IB P O N R S TB
OC I 2B OC I 1B P P ON2 P P ON1
G1 4 H1 3 H1 4 J1 4
CT L3 : 0 CT L3 : 1 CT L3 : X
X 1 1
1-- ---> De dic ate d Cha rg in g P o rt , Aut o- de tec t 1- --- -> Ch ar g ing Do wn dtr ea m P or t, BC S pe c 1. 1 0-- ---> S ta nd ar d Dow nstr ea m P or t, US B 2.0 Mo de . St uf f R A/ RB , US B 3. 0 c om po ne nt s,
CL OS E TO C O NN EC TO R
S S TX 1 S S TX 1 # G_ D M0 G_ D P 0 S S RX 1 S S R X 1# C 5 70 C 5 72 0 . 1 u_ 10 V _X 5 R _0 4 0 . 1 u_ 10 V _X 5 R _0 4 T XP 0 _R T XN 0 _ R
1 0 /2 8
C 57 1 1 u _6 . 3V _ X5 R _ 04 3 .3 V
U 3T XD P1 S P IS CK S P ICS B SPISI SPISO U 3 TX D N 1 U 2 D M1 U 2D P1 U 3 R XD P1 U 3R X D N 1
B 10 A 10 N1 0 P 10 B 12 A 12
W / US B 3. 0, U SB C ha rg er W / US B 3. 0, W /o U SB C ha r ge r W /o U S B3 .0 , US B Ch ar ge r
U SB C ha rg er c om p on en ts , RH R A/ RB , US B 3. 0 c om po ne nt s, R E/ RF , RG R C/ RD , RE /R F, R G
1 1/19
uPD 720200
G ND G ND G ND G ND
Sheet 26 of 43 USB 3.0 NEC, USB Charger
RRE F U 2A V S S C1 4 N1 4 M1 4 P6 R 59 0 1 1 /0 5 1 0 0_ 04 A1 A2 A3 A4 A5 A7 A9 A1 1 A1 3 A1 4 B3 B4 B5 B7 B9 B1 1 B1 3 B1 4 C1 C2 C3 C1 0 C1 1 G ND XT1 XT2 C S EL G G G G G G G G G G G G G G G G G G G G G G G G G GN D GN D G ND GND GND GND GND GN D G ND GND GND GND GND GN D G ND GND GND GND GND GN D G ND G ND GND GND GND GN D G ND G ND GND GND GND GN D GN D G ND GND GND GND GND GN D G ND GND GND GND GND GN D G ND GND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND U 2P V S S U 3A V S S
P 12 R 5 89 N1 2 N1 1 D6
1. 6 K _1 % _0 4
US B 3 .0/ PC H U SB 2.0 C o-l ayo ut

RG W/ o US B C ha rg er P ow er
US B V CC R 5 58 0_ 0 6 1 0 /2 9 U S B 30 V C C C 16 2 *0 _0 6 C 49 5 + 0 . 1u _ 16 V _Y 5 V _ 04 1 0 0u _6 . 3V _ B _B
U GN D P 14 P 11 P9 P7 P2 P1 N1 3 N9 N7 N3 M1 3 M1 2 M1 1 M1 0 M9 M8 M7 M6 M5 M4 M3 L1 2 L1 1 L7 L6
W/ U SB C h ar ge r Po we r
VC C _T P S 25 4 0
RH
R 5 59
J _U S B3 _ 1
1 1/0 2 X 15 2 C5 7 3 2 0 p_ 50 V _N PO _0 4 1 2 4. 0 0 0MH z / 16 pF / + 30 pp m C 57 4 2 0 p_ 50 V _N P O_0 4
G G G G G G G G G G G G G G G G G G G G G G G
ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND
U S B _P N 1 _A
4 L 64 1
3 2
TX N 0 _R U S B _P N 1 _A _ R U S B _P P 1 _A _ R SS R X1 SS R X1 #
Diff. tr a 90ohm ce
U S B _P P 1_ A
S tandar d-A
TX P 0_ R
*W C M2 0 12 F 2S -S H OR T
9 1 8 2 4 3 6 7 5
S S T X+ V B US S S T XD G ND D + S S RX + G ND_ D S S RX -
S H I E LD S H I E LD
G ND1 G ND3
S H I E LD S H I E LD
G ND4 G ND2
R A/ RB
G_ D M0 G_ D P 0 R 1 86 R 1 93 0_ 04 0_ 04
U S B -09 E C E B -S D 0 01 P C B F o ot p ri nt = U S B C 19 00 5 W 2 4 0H U: 6 -2 1 -B4 A 1 0 -0 0 9 /2 d: 6 -2 1 -B4 A 0 0 -0 0 9 n W 2 5 0H UQ: G_ D M0 _0 G_ D P 0_ 0 6 - 2 1- B4 A2 0 -0 0 9
R C/ RD
[ 1 7] U SB _ P N 0 [ 1 7] U SB _ P P 0 R 1 97 R 2 03 *0 _0 4 *0 _0 4
C12 C1 3 D3 D4 D1 1 D 12 D13 D14 E1 E2 E1 3 E1 4 F4 F6 F7 F8 F9 F11 F12 G1 G2 G6 G7 G8 G9 G11 G1 2 G1 3 H6 H7 H 8 H9 H1 2 J3 J4 J6 J7 J8 J9 J1 1 J 12 K3 K4 L1 L2 L3 L4
PCH USB2.0
R 59 1
* 15 mi l _0 6
3. 3 V NC 3
U GN D *N C _0 4 3 .3 V 5V R 5 95 10 K _0 4 A U X D E T_ R 8 D EN Q4 6 1 [ 5 , 27 , 31 ] S U S B # G S *MT N 7 00 2Z H S 3 0 . 1u _1 6 V _Y 5 V _0 4 C 58 4 C 5 83 1 0 u_ 10 V _Y 5V _ 08 0 . 1u _1 6V _ Y 5 V _0 4 2 . 4 K_ 1 %_ 04 R 60 3 C5 8 1 R 58 8 *0_ 0 4 C 5 77 1u _ 6. 3 V _Y 5 V _0 4 AX 6610 C 58 2 0 . 0 15 u_ 10 V _ X7 R _0 4 1 GN D VFB 2 R 60 2 75 0_ 1 %_ 04 C5 7 8 * 10 U _1 0 V _0 8 C 57 9 10 u_ 10 V _Y 5V _ 08 0 . 1u _1 6V _ Y 5 V _0 4 R 5 96 10 K _0 4 5 9 7 U4 6 V IN V IN P OK V C N TL V OU T V OU T C 5 80 4 3 6 1 u_ 6. 3 V _Y 5V _ 04 1. 5 V 5V C5 7 5 0 . 1u _1 6 V_ Y 5 V _0 4 U4 5 U S B _S P I _ V D D _ 1 C5 7 6 1. 5V 0 R 5 98 1 K _0 4 U SB _ F LA S H 3 8 VD D SI SO 1 W P# CE # 5 2 U S B _ SP I _ S I _R U S B _ SP I _ S O_ R R 59 4 R 59 7 47 _0 4 U S B _ SP I _ S I 15 _1 %_ 0 4 U S B _ SP I _ S O 15 _1 %_ 0 4 U S B _ SP I _ C E # 47 _0 4 U S B _ SP I _ S C L K
512K bit
KB SP C_ I_* _R = 0 "~ 5" .1 0.
2A
3A
U S B _ SP I _ C E # _R R 59 9
R 6 01
4 . 7K _ 04 U SB _ H OL D # 7
6 U S B _ SP I _ S C L K_ R R 60 0 SC K 4 H O LD # V S S MX 25 L5 1 21 E MC -2 0G
[ 30 ] U S B V C C [ 31 , 3 2] V D D 5 3 [ , 6 , 8, 9 , 10 , 20 , 28 , 31 , 3 3] 1 . 5V [ 2, 3 , 8, 1 1 , 3 , 14 , 15 , 17 , 18 , 1 9, 2 0, 2 2, 2 3 , 8 , 30 , 31 , 33 , 34 , 3 5] 3 . 3V 1 2 [ 2 0 , 3 , 30 , 31 , 33 , 34 , 3 5] 5 V 2
(15nF~ 48nF)
USB 3.0 NEC, USB Charger B - 27
Schematic Diagrams
KBC-ITE IT8518
K B C_ A V DD V D D3 C 2 22 0 . 1 u _1 6 V _ Y 5 V _ 04 C2 6 6 10 u _ 10 V _ Y 5 V _ 0 8 C2 1 1 0 . 1u _ 1 6V _ Y 5V _ 0 4 C 26 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 C 2 56 C2 3 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1u _ 1 6V _ Y 5V _ 0 4 *0 . 1 u _1 6 V _ Y 5 V _ 04 *0 . 1 u_ 1 6 V _Y 5 V _0 4 1 0 0K _ 0 4 K B C_ W R E S E T # C 23 3 L1 9 H C B 1 0 0 5K F -12 1 T 20 V D D3 C2 3 2 R 29 9 VD D3 RN1 1 2 . 2 K _8 P 4 R _ 0 4 4 5 3 6 2 7 1 8 RN1 0 1 0 K _8 P 4 R _ 0 4 4 5 3 6 2 7 1 8 V D D3 M OD E L_ I D V D D3
MO DE L_I D V 1. 0
RA 1 0K X RA
R 29 2 R 29 3
RB X 10K W 24 0H U W 25 0H UQ W 27 0H UQ
V D D3 1 0K _0 4 *1 0 K _ 04
26 50 92 11 4 1 21 127
11
U2 3 [ 1 3 , 23 ] L P C _A D 0 [ 1 3 , 23 ] L P C _A D 1 [ 1 3 , 23 ] L P C _A D 2 [ 1 3 , 23 ] L P C _A D 3 [ 1 7] P C L K _ K B C [ 1 3, 2 3 ] L P C _ F R A ME # [ 13 , 2 3 ] S E R I R Q [ 1 7 , 2 2, 2 4 , 2 6] B U F _ P L T_ R S T# 10 9 8 7 13 6 5 22 14 W R ST# 1 26 4 16 20 23 15
74
VSTBY VS TBY VSTBY VST BY VSTBY VST BY
VBAT
VCC
AVCC
[ 1 8 ] GA 2 0 [ 26 , 3 8 ] A C _ I N # [ 28 ] L E D _ A C I N [ 15 , 1 7 ] A C _ P R E S E NT [ 1 5 ] P M_ P C H _ P W R O K [ 18 ] S M I # [ 18 ] S C I # [ 2 2, 2 8 ] W L A N _ E N [ 29 ] K B C _M U T E # [ 1 3 ] ME _W E [ 3 0] C P U _F A N [3 0 ] W E B _ W W W #
Sheet 27 of 43 KBC-ITE IT8518
[ 3 8 ] B A T _ DE T [ 3 8] B A T_ V O LT [3 0 ] AP_ KEY # [ 2 ] T H E R M_ V OL T [ 3 8 ] T OT A L _C U R [ 2 3 ] 3 G_ D E T # [ 2 3] C C D _ D E T #
[ 38 ] S M C _ B A T [ 38 ] S M D _ B A T [ 3 , 18 ] H _P E C I S MC _ C P U _ T H E R M S MD _ C P U _ T H E R M R 6 06 R 3 28
[ 2 , 1 4] [ 2 , 1 4]
[ 2 9] K B C _ B E E P
LOW ACTIVE HIGH ACTIVE

[ 22 ] 8 0 C L K [ 22 , 2 8 ] B T _D E T # [ 2 2 ] 3I N 1 [ 3 0 ] W E B _ E MA I L # [ 30 ] T P _ C L K [ 30 ] T P _ D A T A [ 2 3 ] 3G _ E N [ 3 1] P W R _ S W # [ 1 1 , 30 ] L I D _ S W # [1 5 ] P W R_ B T N#
AVSS
VSS VS S VSS VSS VSS VSS VSS
[ 2 2, 2 8 ] W L A N _ L E D # [ 2 2 ] W L A N _ D E T#
1 12 27 49 91 113 1 22
75
[1 1 ] B RIG HT NE S S
R2 8 8 C2 1 9
B - 28 KBC-ITE IT8518
3. 3 V S
L 21
HC B 10 0 5K F -12 1 T 20 C2 5 2 0 . 1u _ 1 6V _ Y 5V _ 0 4
E C_ V C C
K B C _ A GN D 1 J_K B1 J _K B 2 8 5 2 01 -2 4 05 1 4 5 6 8 11 12 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 2 4
W 24 0HU /W 27 0HU
K S I0 /S T B # K S I1 /A F D # K S I2 /INIT # K S I 3/ S LI N # KSI4 KSI5 KSI6 KSI7 58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O
P C LK _ K B C
L AD 0 L AD 1 L AD 2 L AD 3 L P C CL K L F R A ME # S E RIRQ L P C R S T # / W U I 4 / GP D 2 ( P U )
LPC K/B MATRIX
K B C _W RE S E T #
*0 _ 0 4 *0 _ 0 4
R 30 0 R 30 3
G A 2 0/ G P B 5 K B R S T #/ GP B 6 ( P U ) P W U R E Q # / GP C 7( P U ) L 8 0 LL A T / GP E 7 ( P U ) E C S CI# /G P D3 ( P U ) E C S MI # / G P D 4 ( P U )
76 77 78 79 80 81
DAC
G G D D D D PJ 0 PJ 1 A C 2 / GP J2 A C 3 / GP J3 A C 4 / GP J4 A C 5 / GP J5
IT8518
FLASH
K S O 0/ P D 0 K S O 1/ P D 1 K S O 2/ P D 2 K S O 3/ P D 3 K S O 4/ P D 4 K S O 5/ P D 5 K S O 6/ P D 6 K S O 7/ P D 7 K S O8 / A C K # K S O 9/ B U S Y K S O 1 0/ P E K S O1 1 / E R R # K S O1 2 / S LC T K S O1 3 K S O1 4 K S O1 5
B A T _ DE T B A T _ V OL T AP_ KEY # 3 G_ D E T# C C D _ D E T# M OD E L_ I D
66 67 68 69 70 71 72 73 1 10 1 11 1 15 1 16 1 17 1 18 24 25 28 29 30 31 32 34
ADC
AD AD AD AD AD AD AD AD SM SM SM SM SM SM C 0 / GP C 1 / GP C 2 / GP C 3 / GP C 4 / GP C 5 / GP C 6 / GP C 7 / GP I0 I1 I2 I3 I4 I5 I6 I7
F L F R A ME # / GP G 2 F L A D0 /S C E # F L A D 1/ S I F L A D2 /S O F L A D 3 / GP G 6 F L CL K /S CK ( P D )F LR S T #/ W U I 7 / GP G 0/ T M
10 0 10 1 10 2 10 3 10 4 10 5 10 6
K B C_ S P I_ C E # K B C_ S P I_ S I K B C_ S P I_ S O K B C _ S P I _ S C LK
GPIO
( P D )K S O1 6 / GP C 3 ( P D )K S O1 7 / GP C 5 ( ( ( ( ( ( ( ( PD PD PD PD PD PD PD PD )GP H )GP H )GP H )GP H )GP H )GP H )GP H )GP G 0/ I D 1/ I D 2/ I D 3/ I D 4/ I D 5/ I D 6/ I D 1/ I D 0 1 2 3 4 5 6 7
S M C_ B A T S M D_ B A T 0 _0 4 *0 _ 0 4 L C D _B R I GH T N E S S
SMBUS
C L K 0 / GP B 3 D A T 0 / GP B 4 C L K 1 / GP C 1 D A T 1 / GP C 2 C L K 2 / GP F 6 ( P U ) D A T 2 / GP F 7 ( P U )
56 57 93 94 95 96 97 98 99 10 7 82 83 84 35 17 47 48 12 0 12 4 P MP C H _ P W R OK _ R
11/ 03
PWM
PW PW PW PW PW PW PW PW M0 / GP A 0 ( M1 / GP A 1 ( M2 / GP A 2 ( M3 / GP A 3 ( M4 / GP A 4 ( M5 / GP A 5 ( M6 / GP A 6 ( M7 / GP A 7 ( PU PU PU PU PU PU PU PU ) ) ) ) ) ) ) )
[ 2 8 ] LE D _ S C R OL L # [ 2 8 ] L E D _ N U M# [2 8 ] L E D_ CA P # [ 28 ] L E D _B A T _ C H G [ 2 8] LE D _ B A T_ F U LL [ 2 8] LE D _ P W R 80 C L K R 32 0 0 _0 4 8 0 P OR T _ D E T #
EXT GPIO
( P D )E G A D / G P E 1 ( P D )E GC S # / G P E 2 ( P D )E GC L K / G P E 3
R 3 06 R 3 15
11/04
85 86 87 88 89 90
PS/ 2
PS PS PS PS PS PS 2C 2D 2C 2D 2C 2D LK 0 / G A T0 / G LK 1 / G A T1 / G LK 2 / G A T2 / G PF0 ( PF1 ( PF2 ( PF3 ( PF4 ( PF5 ( PU PU PU PU PU PU ) ) ) ) ) )
WAKE UP
( P D )W U I 5 / G P E 5 ( P D )L P C P D# / W U I 6 / G P E 6
PWM/COUNTER
( P D )T A C H 0 / GP D 6 ( P D )T A C H 1 / GP D 7 ( P D )T MR I 0/ W U I 2 / GP C 4 ( P D )T MR I 1/ W U I 3 / GP C 6
1 25 18 21
WAKE UP
P W RS W /G P E 4 ( P U ) R I 1 #/ W U I 0 / GP D 0( P U ) R I 2 #/ W U I 1 / GP D 1( P U )
CIR
( P D )C R X / GP C 0 ( P D )C TX / G P B 2
11 9 12 3
P ME # _ R
R 3 29 R 3 35 R 3 31
33
GP INTER RUPT
G I NT / GP D 5 ( P U )
LPC/WAKE UP
( P D )L 80 H LA T / G P E 0
19 11 2
1 08 1 09
UAR T
R X D / GP B 0( P U ) T X D/ G P B 1 ( P U ) I T8 5 1 8E
( P D ) R I N G # / P W R F A I L # / L P C R S T# / G P B 7
CLO CK
C K 3 2K E C K 3 2K
2 12 8
CK 3 2 K E CK 3 2 K R3 2 7 X4 1 2 X5 1 2 *1 0 M_ 0 6
C 2 50
0 . 1 u _1 6 V _ Y 5 V _ 04
E C _V S S
R 33 3 NC 2 L C D _B R I GH T N E S S K B C _A G N D *0 . 1u _ 1 0V _ X 5 R _ 0 4 * NC_ 0 4 0 _ 04
*1 0 m li _ 0 4
MC-146 & C M200S Co-layout
.
CC D_ E N *0 _ 0 4 *0 _ 0 4 0 _0 4 *0 _ 04 0 _0 4 S W I# [1 5 ] C H G_ E N
S MC _ B A T S MD _ B A T
C 23 8 0 . 1 u_ 1 6 V _Y 5 V _0 4
B A T _ DE T AP_ KEY# 3 G_ D E T # CC D_ DE T #
W25 0H U
K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 K B -S O0 K B -S O1 K B -S O2 K B -S O3 K B -S O4 K B -S O5 K B -S O6 K B -S O7 K B -S O8 K B -S O9 K B -S O 10 K B -S O 11 K B -S O 12 K B -S O 13 K B -S O 14 K B -S O 15
J _ KB1 *8 5 20 1 -2 40 5 1 4 5 6 8 11 12 14 15 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24
RB
11/02
P CL K _ K B C B A T_ V O LT R3 1 2 *1 0_ 0 4 P C LK _ K B C _R C2 4 6 *1 0 p _5 0 V _ N P O _0 6
C2 1 7 C2 5 8
1 u _6 . 3 V _ Y 5 V _ 04 0 . 1 u_ 1 6V _Y 5V _0 4
A C_ IN#
V DD 3
Co-lay SPI ROM

U 31 8 VD D SI 2 SO 5 K B C_ S P I_ S I_ R K B C _ S P I _ S O_ R K B C_ S P I_ CE # _ R K B C_ S P I_ S CL K _ R
K B C_ F L A S H
3 W P# CE # S CK
1 6
K B C _ H O LD # 3 G_ P W R _E N [ 2 3]
7 H OL D # VSS
M X 25 L 3 20 6 E P C B F o ot p ri nt = A C A -S P I -0 0 4-T 0 3
V C H G-S E L [ 3 8 ] [ 23 ] V DD 3 S U S B # [ 15 , 2 6 , 31 ] S U S C # [ 1 5, 3 3 ] S U S _P W R _ A C K [ 1 5 ] B T _ E N [ 2 2 , 28 ] B K L _ E N [1 1 ] H S P I _C E # [ 1 3] H S P I _S C L K [ 1 3] H S P I _M S O [ 1 3 ] H S P I _M S I [ 1 3 ] D D _ ON [ 26 , 3 1 , 32 ] C 2 88 0 . 1u _ 1 6V _ Y 5V _ 0 4 8 VD D R3 6 0 1 K _ 0 4 K B C_ F L A S H 3 W P# R 3 4 6 4 . 7 K _ 04 K B C _ H O LD # OC P P E # [ 1 8] SI SO CE # S CK
11/0 1
8 Mb it
U 30 5 2 1 6
KBC_SPI_*_R = 0.1"~0.5"
K B C_ S P I_ S I_ R K B C _ S P I _ S O_ R K B C_ S P I_ CE # _ R K B C_ S P I_ S CL K _ R R 3 66 R 3 55 R 3 42 R 3 59 47 _ 0 4 15 _ 1 %_ 0 4 15 _ 1 %_ 0 4 47 _ 0 4 K B C_ S P I _ S I K B C_ S P I _ S O K B C_ S P I _ C E # K B C_ S P I _ S C LK
7 H OL D # VSS
4 * S S T 2 5V F 0 8 0 B S O8
10/29
R S MR S T # [ 1 5 ] K B C _R S T # [ 1 8 ]
K B C_ S P I_ S I K B C_ S P I_ S O K B C_ S P I_ CE # K B C_ S P I_ S CL K
C C C C
30 3 29 0 28 4 29 7
*3 3p _ 5 0V *3 3p _ 5 0V *3 3p _ 5 0V *3 3p _ 5 0V
_N _N _N _N
P O_ 0 4 P O_ 0 4 P O_ 0 4 P O_ 0 4
C P U _ F A N S E N [ 3 0] H _ P R O C H OT _ E C [ 3 ] R3 3 0 0_ 0 4 R3 3 6 *0 _ 0 4 A L L _S Y S _ P W R G D [ 1 1 , 1 5, 3 6 ]
P M _P C H _ P W R OK [ 1 5 ] V C OR E _ O N [ 3 6 ]
C E L L _C ON TR OL [ 3 8 ] P M E # [ 17 ] L A N _ P C I E _W A K E # [ 24 ]
[ 38 ] *0 _ 04 R3 2 6 N B _E N A V D D [ 1 1, 1 6 ] J _8 0 D E B U G1 1 2 3 4 5 *8 8 26 6 -0 50 0 1 3 IN1 8 0C LK 8 0D E T # R3 5 3 1 00 K _ 0 4
V DD 3
*M C -1 4 6_ 3 2 . 76 8 K H z 4 3
* C M -20 0 S _ 32 . 7 6 8K H z 4 3 C 26 2 C2 6 5 *1 5 p _5 0 V _ N P O _0 4 *1 5 p _5 0 V _ N P O_ 0 4
11/29
[ 13 , 2 2 , 24 , 3 1 , 32 , 3 8 ] V D D 3 [ 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 1 7 , 1 8, 19 , 2 0, 23 , 2 4 , 25 , 2 8 , 29 , 3 0 , 31 , 3 6 ] 3. 3 V S
Schematic Diagrams
LED, MDC, BT
Bluetooth(Port8)
MJ_M DC1 12 2 1 1 R 51 3 1 3. 3V 1 3 5 7 9 11 J _M D C 1 GN D RES E R V E D A za l a _ S DO i RES E R V E D GN D 3 . 3V M a n / a u x i A za l a _ S Y N C i GN D A za l a _ S DI i GN D A za l a _ R S T # i A za l a _ B C L K i *8 8 0 18 -1 2 0G 2 4 6 8 10 12 R 51 2 MD C_ 3 . 3 V * 0 _0 4 3. 3 V *2 8 m li _ 06 R 32 3 H D A _ B I T C L K _ MD C C 2 37 * 0 . 1u _ 1 6V _ Y 5 V _ 0 4 C 2 55 B T _E N # *2 2p _ 5 0V _ N P O_ 0 4 D BT_ EN G GN D S Q 24 *M T N 7 0 02 Z H S 3 C2 5 9 3 . 3V *1 8 0p _ 5 0V _ N P O _ 04 3 V_ BT [ 1 3] *1 0 K _ 04 3. 3 V * 0 _0 4 J _ BT1
20 MIL
1 .5 V 3V _B T
P or t 11
[ 1 7 ] U S B _ P N 11 [1 7 ] US B _ P P 1 1 [ 2 2, 2 7 ] B T _D E T # B T _ E N#
[ 1 3 ] H D A _ S DO _M D C [ 1 3 ] H D A _ S Y N C_ MD C [ 1 3 ] H D A _ S DI N 1 [ 1 3 ] H D A _ R S T # _M D C R3 2 2 *3 3 _ 04 H D A _ S D I N 1_ R
10mil L 4 1
1 2 3 4 5 6 *8 7 2 12 -0 6 G0
50 mil
R 4 73
50 mi l
1 0/ 29
*2 8 m li _ 0 6 C 4 64 *1 0u _ 6 . 3V _ X 5 R _ 0 6
L E D _A C I N [ 2 7 ]
L E D _B A T_ C H G [ 2 7 ] L E D _ B A T _ F U L L [ 27 ]
LED
3 .3 V S 3 . 3V S 3. 3 V S 3 . 3V S 3. 3V S
3 .3 V S
L E D_ P W R
[ 27 ]
R6 R 3 2 2 0_ 0 4 R4 22 0 _0 4 R 5 2 2 0 _0 4 2 20 _ 04
R7 22 0 _ 04
Sheet 28 of 43 LED, MDC, BT
BT LED
R2 22 0 _0 4 R Y - S P 1 7 0 Y G 3 4- 5M A
1 2
3 4
WLAN LED
D 1 K P B -3 0 2 5Y S GC
HDD/ODD LED
D3
R Y - S P 17 0 Y G 3 4 - 5 M
NUM LOCK LED
D4
CAPS LOCK LED
D5 R Y - S P 17 0 Y G 3 4 - 5M
SCROLL LOCK LED
D 14
POWER ON LED
K P B -30 2 5 Y S GC
BAT LED
D 15
Y SG
SG
SG
4
K P B -30 2 5 Y S G C
R 1 W L A N _ L E D # [ 2 2 , 27 ] C *1 0 mi l _0 4 B Q3 *D TC 11 4 E UA R 36 2 W LA N _ E N [ 2 2 , 2 7] 2 2 0_ 0 4 R3 6 1 2 20 _ 0 4 R 36 3 2 2 0_ 0 4 R3 6 4 2 20 _ 0 4
D2 C R Y -S P 17 0 Y G 3 4 - 5 M
LE D _ N U M # [ 27 ] S A TA _ L E D# [ 1 3 ]
L E D _C A P # [ 2 7]
L E D _ S C R OL L # [ 2 7 ]
6-52-52001-027
6-52-52001-027
6-5 2-5 20 01-02 7
B T_ E N
B T_ E N
[ 2 2, 2 7 ] [ 3 , 6, 8 , 9 , 1 0, 2 0 , 2 6, 3 1 , 3 3] [ 2 , 3 , 8 , 11 , 1 3, 14 , 1 5, 17 , 1 8, 19 , 2 0, 22 , 2 3, 2 6 , 3 0, 3 1 , 3 3, 3 4 , 3 5] [ 3, 9 , 1 0 , 11 , 1 2 , 13 , 1 4, 15 , 1 6, 17 , 1 8, 19 , 2 0, 23 , 2 4, 2 5 , 2 7, 2 9 , 3 0, 3 1 , 3 6] 1. 5 V 3. 3 V 3. 3 V S
6 -52 -5 2001-027
E
Q1 DT C1 1 4 E UA
M2 M-M A RK 1
M7 M -MA R K 1
M6 M-MA R K 1
M1 M-M A R K 1
M8 M -MA R K 1 H1 2 H 10 H 6 _ 3 D 4 _4 H 6_ 3 D 4 _ 4
2 3 4 5
H1 5 1
9 8 7 6
2 3 4 5
H2 4 1
9 8 7 6
2 3 4 5
H1 1 1
9 8 7 6
MT H 3 1 5 D1 11 H3 H4 C 1 11 D 11 1 N C 1 1 1D 1 11 N M5 M-MA R K 1 M4 M-M A R K 1 M3 M -MA R K 1 H5 2 3 4 5 1 9 8 7 6 2 3 4 5
MT H 3 1 5 D 1 1 1
MT H 31 5 D 1 1 1
H6 1 9 8 7 6 2 3 4 5
H1 3 9 J _ TP 1 1 6 MT H 31 5 D 1 1 1 H2 5 1 9 8 7 6 2 3 4 5 1 9 8 7 6 1 2 3 4 5 6 LE D LE D LE D LE D _ PW R _ A CIN _ B A T _F U LL _ B A T _C HG
MT H 3 1 5 D1 11 H1 7 H 6 _ 0 D3 _7 S1 S MD 80 X 8 0 1 S 2 S MD 8 0 X 80 1 H 20 H 18 H 14 H 4_ 7 B 6 _0 D 3_ 7 H 4 _7 B 6 _ 0D 3_ 7 6_ 3 D 4 _ 4 H H9 2 3 4 5 1 9 8 7 6 2 3 4 5
MT H 3 1 5 D 1 1 1 H7
*8 5 20 1 -06 0 5 1 G ND
MT H 3 1 5 D1 11
MT H 3 1 5 D 1 1 1
MT H 31 5 D 1 1 1
H2 3 C6 7 D6 7
H8 C 6 7 D6 7
H 1 H2 C 1 11 D 11 1 N C 1 1 1D 1 11 N
H2 1 H 19 H 4 _ 0 B 7_ 0 D 3 _ 7 H 4_ 0 B 7 _0 D 3 _ 7
H2 2 2 3 4 5 1 9 8 7 6 2 3 4 5
H1 6 1 9 8 7 6
MT H 3 1 5 D1 11
MT H 31 5 D 1 1 1
LED, MDC, BT B - 29
Schematic Diagrams
Audio Codec ALC269

AUDIO CODEC A LC269 VB V T1802P
1 . 5V S R5 2 7 R5 2 9 * 0_ 0 4 DV D D_ IO 0 _ 04 P V DD1 _ 2 R5 1 0 *2 8 mi l _0 6 5 VS
7 5
C o m p o n e n t .
La yo ut N ot e:
Ve ry cl os e t o Au di o C od ec
3 .3 V S _ A UD
C 51 3 10 u _ 10 V _ Y 5 V _ 0 8 3 . 3V S
C 29 9 0 . 1 u _1 6 V _ Y 5 V _ 04
C4 9 8 10 u _ 10 V _ Y 5 V _ 0 8
C2 7 1 0 . 1 u_ 1 6 V _Y 5 V _0 4
3 .3 V S _ A UD R 5 67 0 _0 4 C 28 0 1 0 u_ 1 0 V _Y 5 V _0 8 C 2 83 0 . 1 u _1 6 V _ Y 5 V _ 04 C 4 97 5 VS 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 0u _ 1 0V _ Y 5V _ 0 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 1u _ 6 . 3V _ Y 5V _ 0 4 C4 9 6 C 51 0 C 5 09 C 4 99 *1 0 u_ 1 0V _Y 5V _0 8 C2 7 0 0 . 1u _ 1 6V _Y 5V _0 4
5 VS_ AU D L 40 H C B 1 0 0 5K F -12 1 T 20 1 2 5 VS
C2 8 1 0 . 1u _ 1 6V _ Y 5V _ 0 4
C4 9 4 L39 H C B 1 6 08 K F -1 2 1 T2 5
E A P D _M OD E C D2 1 [ 13 ] H D A _ R S T # [ 27 ] K B C _ MU TE # HD A _ RS T # C D1 8 C D1 9
A * R B 7 5 1 S -40 C 2 39 46 25 38 A R B 7 51 S -4 0 C 2 A R B 7 51 S -4 0 C 2 R 51 8 A UD G 13 S en s e A L I N E 2 -L L I N E 2 -R M I C 2 -L MI C 2 -R S en s e -B S P DIF C 2 /E A P D S P DIF O GP I O 0 GP I O 1 J DRE F M ON O-OU T M I C 1 -L MI C 1 -R 19 20 21 22 23 24 27 B I T -C L K R 35 4 33 _ 0 4 A Z _ S D IN0 _ R A Z _ S Y N C _R H D A _ R S T# 8 S D A T A -I N 10 SYN C 11 RE S E T # MI C 1 - V R E F O - L 12 PCBEEP P VSS1 PVSS2 D VSS2 AVSS1 AVSS 2 H P -O U T -L H P -OU T -R CB N CB P OP V E E LD O_ C A P M I C 1 -V R E F O-R MI C 2- V R E F O V RE F 28 30 29 32 33 35 36 34 LD O_ C A P MI C 1 -V R E F O-R MI C 2 -V R E F O H E A D P H O N E -L H E A D P H O N E -R C B N - A L2 6 9 C B P -A L C 2 6 9 OP V E E -A L C 26 9 C2 7 9 A LC 26 9 Q-V B 5-G R 2 . 2 u_ 6 . 3 V _X 5 R _ 0 6 MI C 1-V R E F O -L A UD G 4. 7 K _ 0 4 10 0 p _5 0 V _ N P O _0 4 A U DG MI C 2 -V R E F O R 13 0 I N T _ MI C R 12 8 4. 7 K _ 0 4 J _ I N T MI C 1 1K _ 0 4 C 1 18 6 8 0 p_ 5 0 V _X 7 R _ 0 4 1 2 8 8 2 66 -0 2 00 1 J_IN C1 TMI 2 1 F C M1 0 05 K F -1 2 1T 0 3 L23 S P K O U T L17 /16 2 S P K OU TL -_ L S P K O U T L+ C2 7 2 JD R E F MON O-O U T MI C 1 -L _ R C 30 6 MI C 1 -R _R C 30 7 LI N E 1 -L LI N E 1 -R V R E F -A L C 26 9 14 15 16 17 18 LI N E 2 -L LI N E 2 -R MI C 2 _ L MI C 2 _ R S E N S E -B S E NS E _ A AU DG M IC_ S E NS E H P _S E N S E C 50 3
0 . 1 u_ 1 6 V _Y 5 V _0 4
1 0 K _0 4 P D# 4
U2 9 PD# S P K OU T L+ S P K OU T L40 41 44 45 E A P D _ M OD E S P DIF O D M I C -D A T D M I C -C LK 47 48 2 3 S P K -L + S P K -L S P K -R S P K -R +
D VDD 1
D V D D -I O
PVD D1 PVDD 2
AVD D1 AVDD 2
R 36 9 R 36 8
2 0 K _1 % _ 04 3 9 . 2K _ 1 % _0 4
MI C _ S E N S E [ 3 0 ] HP _ S E N S E [3 0 ]
C 50 2
0 . 1 u_ 1 6 V _Y 5 V _0 4
A U DG
5 VS
R 51 4
*1 0 0K _ 0 4 D
G S
Sheet 29 of 43 Audio Codec ALC269
Q 32 [ 30 ] S P K O U T R * MT N 7 0 0 2Z H S 3 [ 3 0] S P K OU TR +
HD A _ RS T #
G S
Q 27 *B S S 1 3 8_ N L
A LC269 VR 52 3 P T1802
C5 1 2
20 K_1% _04 5.K _ 1 %_ 0 4 1K_1 %_04 20

*1 0 0 p_ 5 0 V _N P O_ 0 4 MI C 1 _ L MI C 1 _ R A UD G
EMI Require
4 . 7 u_ 6 . 3 V _ X5 R _ 0 6 4 . 7 u_ 6 . 3 V _ X5 R _ 0 6
DIGITAL
Closed to SB.
Q2 5 D [1 3 ] HD A _ S Y N C 3 . 3V S MT N 7 0 0 2Z H S 3 S
5 [ 1 3 ] H D A _S D OU T [ 1 3 ] H D A _B I TC L K [ 13 ] H D A _ S D I N 0 C2 9 1 2 2 p_ 5 0 V _N P O_ 0 4 6 S D A T A -O U T
A NALOG
L I N E 1 -L L I N E 1 -R
C3 0 1 C3 0 4
0 . 1 u _1 6 V _ Y 5 V _ 04 2 . 2 u _6 . 3 V _ X5 R _0 6
ALC 269 2.2u ;

C2 9 8 H E A D P H ON E -L [ 30 ] H E A D P H ON E -R [ 3 0 ] 2 . 2 u_ 6 . 3 V _X 5 R _ 0 6
VT 1802P 10 u
2 . 2 u _6 . 3 V _ X5 R _0 6
B E E P _R
ALC2 69 2.2u VT18 02P NC
A U DG
42 43
49
26 37
R3 6 7
4 7K _ 0 4
B E E P _C
31
[ 27 ] K B C _B E E P [ 13 ] H D A _ S P K R
D 13 B A T 5 4 CW G H A C 3 BEEP 2 A 1
C 3 09 1u _ 6 . 3V _ Y 5V _ 0 4
L2 4 F C M 10 0 5 K F -12 1 T 03 1 2
GN D
J _ SPKL 1 S P K OU TL + _ L C 2 93 * 1 u_ 6 . 3 V _Y 5 V _0 4 C2 9 5 1 2
FOR VOL UMN ADJ UST
85 2 0 4-0 2 0 01 *1 8 0p _ 5 0V _ N P O_ 0 4 J _SPK L1 2 1
R3 6 5
C 3 08
C2 8 9
*1 8 0p _ 5 0V _ N P O_ 0 4
3 .3 VS R 5 68
He adph one A nti-P C op ircui t
R1 30 AL 269 VT 1802P 4 .7K_0 4 2 .2K_0 4

R3 4 3 R3 5 1 1K _ 0 4 1K _ 0 4 2. 2 K _ 0 4 2. 2 K _ 0 4
C118 AL269 VT180 2P 680p 330p

MI C 1 -L [ 3 0 ] MI C 1 -R [ 3 0]
H E A D P H ON E - L H E A D P H ON E - R
3.3 VS_ AUD 5V S

20 ms
E A P D _ MO D E
* 2 20 K _ 0 4 G
Q 39 *2 N 7 0 02 W Q 38 * A O3 4 1 5 G
Q4 0 *2 N 70 0 2 W G
MI C 1 _L MI C 1 _R
MI C 1 -V R E F O -R R 3 5 0 S R 5 69 * 4 . 7K _ 0 4 R5 7 0 *1 0 K _0 4 AUD G S R5 7 1 *1 0 K _ 04 MI C 1 -V R E F O -L R 3 4 5
AZ_RST# PD# Spe a ke r w ire le ngth l e ss tha n 8 00 0mi ls , I t don't ne e d LC Fi lte r. SPKO UTR+ ,R- ,L+ ,L- Tra ce wi dth Spe a ke r 4 ohm- -- --- > 40 mil s Spe a ke r 8 ohm- -- --- > 20 mil s
R3 & R351 43 AL 269 VT 1802P

I N T _M I C
R34 & R350 5 AL2 69 VT1 802P 2. 2K_04 4. 7K_04

M I C 2 _L M I C 2 _R
C 53 8 * 10 u _ 6. 3 V _ X 5R _ 06
1 K_04 7 5_04
C5 1 1 C5 1 4
AUD G
4 . 7 u_ 6 . 3 V _X 5 R _ 0 6 4 . 7 u_ 6 . 3 V _X 5 R _ 0 6
1 . 5 V S [ 1 9 , 3 1] 3 . 3 V S [ 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 17 , 1 8 , 19 , 2 0 , 23 , 2 4 , 25 , 2 7 , 28 , 3 0 , 3 1, 3 6 ] 5 V S [ 11 , 1 2 , 19 , 2 0 , 25 , 3 0 , 31 , 3 6 , 37 ]
B - 30 Audio Codec ALC269
Schematic Diagrams
USB, Fan, TP, Multi-Conn

USB 2.0
8 mi 0 l
U SBVC C C 48 8 + 1 0 0u _ 6 . 3V _ B _ B C 94 0 . 1 u _1 6 V _Y 5 V _0 4 5 VS 5V S _ F A N J_ F A N 1 J _ US B _ 1 R1 0 7 [ 1 7] U S B _ P N1 [ 1 7] U S B _ P P 1 L13 4 *0 _ 0 4 3 1 V+ A U S B _ PN1 _ R 2 A U S B _ P P 1_ R 3 4 DA T A _ L DA T A _ H GN D GN D 1 G ND 2 GN D 3 G ND 4 [ 2 7] C P U _ F A N S E N 3. 3 V S R 20 2 4 . 7K _0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 1 0 u_ 6 . 3 V _X 5 R _ 0 6 C2 0 5 C 45 6 1 2 3 8 5 20 5 -03 7 0 1 J FAN 3 1
FAN CONTROL
U3 8 F O N# 5 VS 5V S _F A N [2 7 ] CP U _ F AN 1 2 3 4 F ON VIN V OU T VSET A X 99 5 S A G G G G ND ND ND ND 8 7 6 5
Port 1
1 2 *W C M2 0 12 F 2 S -S H O R T R1 1 3 *0 _ 0 4
G ND1 GN D 2 G ND3 GN D 4
3 1 7 D E 0 4P S A 7A 2 C
CO-LAY USB 3.0 J_U SB2
W24 0HU W25 0HU
31 7DE0 4PSA 7A 2C 1- 284- 8002 81 -1
CLICK B'd CONN

5 V S _ TP 5 VS R 13 1 *2 8 mi l _ 06 C 1 13 R 12 9 J _ TP2 1 0 K _ 04 R 12 7 1 u _ 6. 3 V _ Y 5 V _ 0 4 1 0 K _ 04 TP _ D A TA [ 2 7 ] TP _ C L K [ 2 7 ] C 11 4 4 7 p_ 5 0 V _N P O_ 0 4 C 11 5 4 7 p _5 0 V _N P O_ 0 4 C 49 1 1 0 u_ 6 . 3V _X 5 R _ 0 6 1 2 3 4 8 5 2 01 -0 4 05 1
US B V CC
Sheet 30 of 43 USB, Fan, TP, Multi-Conn
G_ U S B V C C U4 0 [ 1 7 ] U S B _ OC # 01 R5 2 4 *0 _0 4 5V C5 0 1 0 . 1 u_ 1 6 V _Y 5V _0 4 F L G# 5 F LG # V O U T 1 2 V IN1 3 4 V IN2 E N# V O UT 2 V O UT 3 G ND 8 1 0 . 1 u_ 1 6 V _Y 5V _0 4 *0 . 1u _ 1 6V _ Y 5V _ 0 4 7 C 49 2 C 4 93 6
L62 H C B 1 6 08 K F -1 2 1T 2 5
10 MI 0 L
[ 3 1 , 3 3] D D _ ON #
R T 9 7 15 B GS
Audio B'd CONN
POWER SWITCH B'd CONN
If system has AP ON function, uses J_SW1 If system has no AP ON function, uses J_SW2
1.1A 60m ils

5V C2 2 3 0 . 0 1 u_ 1 6V _ X 7 R _ 0 4 C2 9 J _ A U D I O1 [ 2 9] M I C 1 -R [ 2 9] M I C 1 -L [ 2 9 ] H E A D P H O N E -R [ 2 9 ] H E A D P H O N E -L R 33 9 R 34 0 [ 29 ] M I C _ S E N S E [2 9 ] HP _ S E NS E [1 7 ] US B _ P N 9 [ 17 ] U S B _P P 9 [ 2 9 ] S P K OU TR + [ 2 9 ] S P K OU TR 2 2 0_ 0 4 2 2 0_ 0 4 H E A D P H ON E -R R H E A D P H ON E -LL M I C _ S E NS E SPK_ H P# H P _S E N S E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 72 1 3-1 4 0 0G A UD G 0 . 0 1u _ 1 6V _ X 7 R _ 04 J _ SW 2 1 2 3 4 5 6 7 8 9 10 * 50 5 0 0-0 1 0 41 -0 01 L 0. 0 1 u _1 6 V _ X7 R _ 0 4 3. 3 V S 3 .3 V C 27
CLOSE TO J_SW1
J _ SW 1 A P _K E Y # A P _ K E Y # [ 2 7] 1 2 3 4 5 6 7 8
3 . 3V S
3 .3 V
20 mi l
M_ B T N # W EB_ W W W # W E B _ E MA I L # LI D _ S W # AP_ KEY#
20 mi l
M_ B T N # W EB_ W W W # W E B _ E MA I L# L ID_ S W # A P _ ON VIN M_ B TN # [ 31 ] W E B _ W W W # [ 27 ] W E B _ E MA I L # [ 27 ] LI D _S W # [ 1 1 , 2 7]
G S
Q9 * MT N 7 0 02 Z H S 3
8 8 48 6 -0 80 1
C 5 4 6 C 5 47 A P _ ON [ 3 1 ] * 0. 1u _ 16 V _ Y 5 V _ 04 *0 . 1 u _1 6 V _ Y 5V _ 0 4
S P K O UT R+ S P K O UT R-
[ 2 , 3 , 8 , 11 , 1 3 , 14 , 1 5, 17 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 2 6 , 2 8, 3 1 , 3 3, 3 4 , 3 5] [ 1 1, 1 2 , 1 9, 2 0 , 2 5, 2 9 , 3 1, 3 6 , 3 7] [ 2 0, 2 3 , 2 6, 3 1 , 3 3, 3 4 , 3 5] [ 2 6] [ 1 1, 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 6, 3 7 , 3 8] [ 3, 9 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6, 17 , 1 8, 1 9 , 2 0, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 2 9, 3 1 , 3 6]
3 .3 V 5 VS 5V U S B V CC VIN 3 .3 VS
USB, Fan, TP, Multi-Conn B - 31
Schematic Diagrams
5VS, 3VS, 1.05VS, 1.5VS_CPU

SYS5 V VIN V A V IN 1 P R 22 4 PC2 0 . 1u _ 5 0V _Y 5V _0 6 P C 1 10 0 . 1 u _5 0 V _ Y 5 V _ 0 6 PU 7 1 VA 2 V IN [ 3 0 ] M_ B T N # [ 30 ] A P _ O N P R2 2 6 P R2 2 7 P R2 3 4 1 K_ 0 4 1 K_ 0 4 *1 0 K _ 0 4 3 M_ B T N # 4 I N S T A N T- ON P 2 8 08 B 0 V IN GN D P R1 2 3 P W R _S W # 5 D D _ O N _ L A TC H 6 V IN 1 7 R3 7 1 1 K _0 4 R 60 4 D D_ O N 1 K_ 0 4 P W R_ S W # [2 7 ] [ 26 , 2 7 , 32 ] D D_ O N 8 P Q6 7 A M TD N7 0 0 2Z H S 6 R D D _ ON 2 G S 1 P R 22 1 VD D3 1 0 0K _ 0 4 6 D [ 1 5 , 2 6 , 27 ] S U S B # P Q6 7 B MT D N7 0 02 Z H S 6 R 5 G S 4 P R 22 0 1 00 K _ 0 4 3 D P C 1 11 0 . 1 u _5 0 V _ Y 5 V _ 0 6 P R 22 2 1 0 K _0 4 S US B SYS5 V
ON D D_ON"L" T O "H FR " OM EC
1 0 K _ 04 D D _ ON #
D D _ ON # [ 3 0 , 3 3 ]
S U S B [ 3 , 6, 3 3 , 3 4]
10 /28
1 0K _ 0 4
ON
ON
11/02
10/ 29
5V 3. 3 V 3 .3 V S
ON
ON
C 5 04 0 . 0 1 u_ 1 6 V _ X7 R _0 4
C 5 05 0 . 0 1 u _1 6 V _ X7 R _0 4
C5 0 6 0. 0 1 u _1 6 V _ X7 R _0 4
C2 4 7 0. 0 1 u _1 6 V _ X 7R _ 04
C 22 4 0 . 0 1 u_ 1 6 V _X 7 R_ 0 4
C 2 25 0 . 0 1 u_ 1 6 V _ X7 R _0 4
1.5VS
S Y S 15 V 1 .5 V
NM OS
P Q6 4 A MT N N 2 0N 0 3Q 8 8 2 7 1
1 .5 VS
P R2 2 5 1 M_ 0 4
3A
5 V _ EN1
8 7
3A
Power Plane
P R 2 23 P R 23 1 1 0 0K _ 0 4 1 M_ 0 4
1 .5 VS_ EN
P C 2 19 3 5 VS_ EN 1 P Q6 6 B M TN N 2 0 N 0 3 Q8 5 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4
P R 23 2 P C2 1 2 *1 0 0 K _ 04 47 0 p _5 0 V _ X 7R _ 04 6
P Q6 4 B MT N N 20 N 03 Q 8 5 S US B G
1. 5 V S _ L O
Sheet 31 of 43 5VS, 3VS, 1.05VS, 1.5VS_CPU
5V
NMO S
S Y S 1 5V V DD 5 P Q6 5 A M T NN 20 N 03 Q8 2 1 5V
5VS
NMO S
S Y S 1 5 V V D D5 P Q 6 6A M T N N2 0 N 0 3 Q8 8 2 7 1 5 VS
P R2 1 8 1M _ 04
P C2 1 7 0 . 1u _ 1 6V _Y 5V _0 4
P C 2 16 1 0 u _6 . 3 V _ X 5R _ 06
P R 21 9 1 0 0_ 0 4
P Q 63 MT N 70 0 2 Z H S 3
P Q 6 5B M TN N 2 0 N 0 3 Q8 5 DD _O N # 1 P C 2 22 4 7 0p _ 5 0 V _X 7 R _ 0 4
P C2 2 1 4 70 p _ 50 V _ X 7 R _ 04 6 6 PJ 2 0 2 *4 0m i l
S U S B [ 3 , 6, 33 , 3 4 ] 1 PJ 1 9 2 * 4 0m i l
1.5VS_CPU
ON
11/03
ON
3.3V
NMO S
S Y S 15 V V DD 3
3.3VS
NM O S
3 . 3V S Y S 1 5V V DD 3 8 7 P R 10 9 3 P R2 3 3 *1 00 K _ 0 4 4 P Q 2 1B M TN N 2 0 N 0 3 Q8 5 D D _O N # P C 89 6 4 7 0p _ 5 0V _ X 7 R _ 0 4 5 6 S US B G S 4 P Q 20 B MT N N2 0 N 0 3 Q8 3 .3 V S_ E N1 1 M_ 0 4 P C9 6 0 . 1u _ 1 6V _ Y 5V _0 4 PC 9 4 1 0 u _6 . 3 V _ X 5R _ 06 3. 3 V S _ L O P R 10 2 1 00 _ 0 4 P R7 1 3 .3 VS SYS1 5 V 8 7 P Q2 1A M T N N 20 N 0 3 Q8 2 1
1 .5 V
1 .5 V _ CP U
3A
PR1 1 1 1 M_ 0 4 3 . 3 V _E N 1
3A
P Q 20 A M TN N 2 0 N 0 3 Q8 2 1
PJ 1 5 * OP E N _5 A 2 1
10A PJ15 MUST SHORT

P R7 2 * 2 20 _ 0 4 1 . 5 V S _ C P U _L O
Power Plane
3
8 7
P Q4 8 A *M TN N 2 0 N 0 3 Q8 2 1
NMO S
*1 M_ 0 4 P C1 8 0 1 .5 VS _ CP U E N 3 *0 . 1 u_ 1 0 V _ X7 R _0 4 4 P Q4 8 B * MT N N2 0N 0 3Q 8 5 *2 20 0 p _5 0 V _ X 7R _ 04 6 SU SB G P C 1 79 * 10 u _ 6. 3V _ X 5 R _ 0 6
PC9 5 2 20 0 p _5 0 V _ X7 R _0 4
P Q 16 MT N 70 0 2 Z H S 3
P C4 6 S
P Q1 1 * MT N7 0 0 2Z H S 3
S 3 . 3 V [ 2 , 3 , 8, 1 1 , 1 3 , 14 , 1 5 , 17 , 1 8 , 1 9, 2 0 , 2 2, 23 , 2 6 , 28 , 3 0 , 3 3, 3 4 , 3 5] 1 . 5 V S [ 1 9 , 29 ] 5 V S [ 1 1 , 1 2, 1 9 , 2 0 , 25 , 2 9 , 30 , 3 6 , 3 7] V I N [ 1 1, 30 , 3 2 , 33 , 3 4 , 3 5, 3 6 , 3 7, 3 8 ] S Y S 1 5V [ 32 , 3 4 ] V A [3 8 ] 1 . 5V _ C P U [ 3 , 6 ] 1 . 5V [ 3, 6 , 8 , 9 , 1 0, 2 0 , 2 6, 28 , 3 3 ] 5 V [ 2 0, 2 3 , 2 6, 30 , 3 3 , 34 , 3 5 ] V IN1 [3 2 ] 3 . 3V S [ 3, 9, 1 0 , 1 1, 1 2 , 1 3 , 14 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0, 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0, 3 6 ] V D D 3 [ 13 , 2 2 , 2 4, 2 7 , 3 2, 38 ] V D D 5 [ 26 , 3 2 ]
ON
ON
B - 32 5VS, 3VS, 1.05VS, 1.5VS_CPU
Schematic Diagrams
VDD3, VDD5
V RE F P R1 95 * 0 _0 4 P R7 7 0_04 P C1 9 5 1 u _ 10 V _ Y 5 V _ 0 6 P R 19 8 E N_ 3 V P C2 0 1 1 00 K _ 0 4 1 0 0 0p _ 5 0V _X 7 R_ 0 4 5 4 6 3 2 1 EN 2 V RE G 3 V IN 7 P C2 0 0 P C 64 P C1 9 9 4 .7 u_ 2 5 V _X 5 R_ 0 8 1 u _ 10 V _ Y 5V _ 0 6 8 7 6 5 P Q 56 P 1 2 03 B V 4 P L1 0 4 .7 UH_ 6 .8 *7 .3 *3 . 5 2 1 3 2 1 P C 20 3 0 .1 u_ 1 0 V _X 7 R_ 0 4 10 11 PH ASE2 8 7 6 5 *5 m m PC7 2 P C6 5 C C 0 . 1 u _1 6 V _ Y 5V _0 4 + 2 2 0u _ 6 . 3 V _6 . 3 *6 . 3 * 4 . 2 P R7 6 13 K _ 1 %_ 0 6 P C6 2 P D 6 10 0 p _5 0 V _ N P O _0 4 C S O D 1 40 S H A P D5 3 2 1 A * SK34SA GND P A D GN D P Q 60 P 1 2 03 B V 4 PD 8 13 25 15 V R E G5 A C 17 C 14 16 18 12 L GA T E 2 EN 0 P HA S E 1 C C 5 6 7 8 L GA TE 1 L DO 5 VCL K V IN 19 4 1 2 3 P 1 2 0 3B V C S O D 1 40 S H *S K 3 4 S A A A 1 0 0 0p _ 5 0V _ X 7 R_ 0 4 PD 7 A V R E G5 U GA T E 2 9 B O OT 2 8 VO 2 L DO 3 P U1 1 V IN 24 V O1 P R2 0 1 P OK 23 P C2 0 4 22 *1 0 K _ 04 S Y S 5V 0 .1u _ 1 0V _X 7 R_ 0 4 5 6 7 8 0 .1 u _5 0 V _ Y 5 V _ 0 6 P Q 13 P 1 2 03 B V 1 PL 9 4 . 7 UH _ 6.8 * 7. 3 *3 .5 2 1 2 3 4 .7u _ 2 5V _X 5 R_ 0 8 4 . 7 u _2 5 V _ X5 R _0 8 P C2 0 6 P C2 0 5 PC 7 4 TO NSEL VFB2 VFB1 EN1 1 00 K _ 0 4 P C1 9 8 1 00 0 p _5 0 V _ X7 R _0 4 E N_ 5 V P R1 9 7
VDD3
5A
V D D3 PJ 8 2 1 SY S3 V
4.7 u _ 25 V _ X 5R _ 08
VREF
uP6182
B OO T1 UGA TE 1 21 20 4
5A
S Y S 5V 1
VDD5
V D D5 P J 10 2 *5 m m
Ra
P R7 5 P C6 1 3 0K _ 1 % _0 6 P Q1 2 P D 9 P D2 1
S K IP S E L
Sheet 32 of 43 VDD3, VDD5
Rb
P R 2 28 * 0 _0 4 P R1 9 6 1 9. 1 K _ 1 % _0 6
* RB 0 5 4 0S 2 P R2 0 9
E N_ A L L *R B 0 54 0 S 2 P R 2 1 3 P R2 10 P R2 12 * 0 _0 4 P R2 11
11/05 M 01 99 25
2 .2_ 0 6 * 0 _0 4 0_04 P C2 09
PC 6 3 PC5 8 + 2 2 0 u_ 6 .3 V _6 . 3 *6 .3 *4 . 2 . 1u _ 1 6V _ Y 5V _0 4 0
P R1 9 4 20 K _ 1 %_ 0 4
* 6 80 K _ 1 % _0 4
VR EF V R E G5
P R2 1 4 P R2 1 5
* 0 _0 4 0_04
P D2 2 C
R B 0 54 0 S 2 A S Y S 5V
0 .0 1 u_ 5 0 V _ X7 R_ 0 4 V IN 1 V R E G5 P Q7 3 E N _3 V 5 V [3 8 ] US B _A C _ IN G MT N7 0 02 Z H S 3 S 10 K _ 0 4 P R9 0 P R 86 * 0 _0 4 E N_ 3 V E N_ 5 V 0 .0 1 u_ 5 0 V _ X7 R_ 0 4 PQ 1 4 S MT N7 0 02 Z H S 3 PR8 4 V IN C P D2 4 A R B 0 5 40 S 2 P R 82 0_04 D P C2 0 7 4 .7 u _2 5 V _ X 5R _ 08 P C2 0 8 1 u_ 1 0 V _ Y 5 V _ 06 P C2 10 V R E G5
P D2 3 A
R B 0 54 0 S 2 C S Y S 10 V P C6 9
P D1 9 R B 0 54 0 S 2 2 20 0 p _5 0 V _ X7 R _0 4 C A
P D2 0 A
R B 0 54 0 S 2 C
S Y S 15 V P C6 8 2 20 0 p _5 0 V _ X7 R _0 4
DD _O N_ E N _V D D D P Q1 8 G [2 6 ,2 7, 3 1 ] DD _ ON S M T N 70 0 2 Z H S 3 PC7 1
PJ 1 1 *4 0 m il 2
D 0. 1u _ 1 0V _ X 5 R _ 0 4 10 0 K _ 0 4
V IN [ 1 1,3 0 ,3 1,3 3 ,3 4, 35 , 3 6 , 37 ,3 8 ] V IN 1 [ 31 ] S Y S 15 V [3 1 ,3 4] V D D 5 [2 6, 3 1 ] V D D3 [1 3, 2 2 , 2 4 , 27 ,3 1 ,38 ]
VDD3, VDD5 B - 33
Schematic Diagrams
Power 1.5V/0.75V/1.8VS
V IN P D4 PU 4 u P 6 1 63 5V A C 5 6 7 8 R B 0 5 4 0S 2 4 1 2 3 P Q5 2 MD U 2 6 57 P C 51 0 . 1 u _5 0 V _ Y 5 V _ 0 6 P C 1 92 4 . 7 u _ 2 5V _ X 5 R _0 8 P C1 9 1 4 . 7u _ 2 5 V _ X 5R _ 0 8 P C1 8 8 + 0 . 1 u _5 0 V _ Y 5 V _ 0 6 * 1 5u _ 2 5 V _ 6. 3 * 4. 4 _ C P C 1 86
VTT_MEM
2 V T T _ ME M *OP E N _ 2 A PJ 1 8 1 P C1 9 4 P C5 5
P C5 6 1 0 u _ 10 V _ Y 5V _0 8
V DD Q P C 60 23 V L DO IN 24 VTT 1 DR VH 3 . 3 _ 06 20 V T T GN D LL VBS T 21 P R 1 92 22 0 . 1 u _1 0 V _ X 7 R _ 0 4
1.5V
V D DQ
PL 7 1 . 0 U H _ 11 . 5 *1 0 . 2 *3 . 0 1 2
30A
1
1 .5 V 2
PJ 6
PC 5 4 P R8 0 0_ 0 6 2
* OP E N _ 1 2A 19 V T T S NS 3 D RV L 5 6 7 8 18 17 16 MO D E CS P V CC 5 V CC 5 15 14 PC 7 6 P Q5 1 P R8 1 P R 83 0_06 6 . 1 9K _ 1 % _ 0 6 5V 4 1 2 3 M D U 26 5 44 1 2 3 C S O D 14 0 S H A *M D U 26 5 4 P R7 3 P D 17 P C 52 + * 1 00 0 p _X 7R _ 06 P C 1 84 56 0 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9 P C4 8 0 . 1 u_ 1 6 V _ Y 5 V _ 04 PC 4 9 P C 1 69 0. 1 u _ 1 6V _ Y 5 V _ 0 4 + * 5 60 u _ 2 . 5V _6 . 3 *6 C PQ 5 0 5 6 7 8
1 0 u_ 1 0 V _ Y 5 V _ 0 8 10 u _ 1 0V _Y 5 V _ 08 * 1 0u _ 1 0V _Y 5 V _ 08
V DD Q 5V
P R 2 05 P R 2 03 P R 2 02
0 _0 6 *0 _ 0 6 *0 _ 0 6 P C 70 0 . 1 u _ 10 V _ X 7 R _ 0 4 5 4
GN D
P GN D C S _ GN D
V T T RE F 5V P R1 9 3 * 2 2_ 0 4 PC7 5 *1 0 0 0 p_ 5 0 V _ X 7 R _ 0 4 D P R2 0 6 0_06 P R2 0 8 6 C O MP 8 V D DQ S NS 9 V D DQ S E T VD DQ SET
P R8 9 P C8 0 P GO OD _ 61 6 3
2 .2 _ 0 4
*5 . 1 _0 6
P R9 1 0_06
13 P G OO D
3 .3 V 1 u _ 1 0V _ Y 5 V _ 0 6 1u _ 1 0 V _ Y 5V _0 6 11
V T T_ M E M
S 5 10 S 3 GN D NC NC
Sheet 33 of 43 Power 1.5V/0.75V/ 1.8VS
P R9 2 1 0 0 K_ 0 4 D D R 1 . 5 V _ P W R GD [1 5 ]
*1 0 _0 6
P Q5 7 SU SB G *M T N 7 0 0 2Z H S 3 S
12
P R1 0 1 5V * 10 K _ 1 % _ 04 PR 9 9
25
P R1 1 7 5V P R1 0 3 1 0 0K _ 0 4 D V T TE N [ 1 5 , 27 ] S U S C # G
10 0 K _ 0 4 D 1
G S
P Q2 3 MT N 7 0 0 2 Z H S 3 G
P Q2 2 S 2 P C8 2 PQ 1 9 S US B G S M T N 7 0 0 2Z H S 3 0. 1 u _ 1 6V _ Y 5 V _0 4 MT N 7 0 0 2 Z H S 3
P J 12 *4 0 m i l [ 3 0 , 3 1 ] D D _ ON #
1. 5V _CTRL1 1 1 0 0
3 .3 V
1. 5_ CTRL0 1 0 1 0
3 .3 V
V olta ge 1 .55 V 1 .60 V 1 .65 V 1 .70 V

5V P C 91
1 0 u _6 . 3 V _ X 5 R _ 0 6
5V
P R1 0 5
1 0 0K _0 4
E N1 .8 V S
8 1
V O UT EN 2 GN D V FB
P R7 8 1 . 27 K _ 1 % _ 04
0 . 1 u_ 1 6 V _ Y 5 V _ 04
10 u _ 6. 3V _ X 5 R _0 6
0 . 1u _ 1 6 V _Y 5V _0 4
[ 3 , 6 , 3 1, 34 ] S U S B S
0 . 1 u _1 6 V _ Y 5 V _ 0 4
1 0 u_ 6 . 3 V _ X 5 R _ 0 6
PC6 7
GS7 113 6-0 2-07113 -320 AX6 610 6-0 2-06610 -320
B - 34 Power 1.5V/0.75V/1.8VS
P C 57
P R7 9 1K _ 1 % _ 0 4
PC 5 9
P C7 9
1 0K _ 1 % _ 0 6
* 10 0 0 p _5 0 V _ X 7 R _ 0 4
5V
P R1 1 8
4 7 K _ 04
PR 9 8
1 0 K _ 1 % _0 6
P C8 4 PQ 2 4 * MT N 70 0 2 Z H S 3 * 0 . 1u _ 1 6 V _ Y 5 V _ 0 4
P R1 1 0
10 K _ 0 4
1.8VS
3A
V1 .8 PJ 7 1 2 * OP E N _ 3A 1 .8 V S
2A
[ 3 , 1 5 ] 1 . 8 V S _ P W R GD 1 . 8 V S _ P W R GD
PU 5 5 9 7 6 V IN V IN P OK V C NT L 4 V O UT 3
1 u_ 1 0 V _ Y 5 V _ 0 6
P C9 0 P Q 15 PC 8 5 M TN 7 00 2 Z H S 3 PC 8 3
P C6 6
SU SB
AX6 615ESA 11/0 9

8 2p _ 5 0V _N P O _0 4
[ 6 , 1 8, 1 9 ] [ 1 1 , 3 0, 3 1 , 3 2 , 3 4, 3 5 , 3 6 , 3 7, 3 8 ] [ 2 0 , 2 3 , 2 6, 3 0 , 3 1 , 3 4, 3 5 ] [ 2 , 3 , 8 , 11 , 1 3 , 1 4, 15 , 1 7 , 1 8, 19 , 2 0 , 2 2, 2 3 , 2 6 , 2 8, 3 0 , 3 1 , 3 4, 3 5 ] [ 3 , 6 , 8 , 9 , 1 0, 2 0 , 2 6 , 2 8, 3 1 ] [ 9, 1 0 ]
1 .8 VS VIN 5V 3 .3 V 1 .5 V V T T _ ME M
Schematic Diagrams
Power 1.05VS
5V VN I 5V PR 08 1 D 100K_04 [3,6, 31,33] S USB G S M 70 02Z TN HS3 P C88 *0. 1u_16V _Y5V_04 PC77 14 13 15 16 0. 1u_16V_Y5V _04 DH 1 2 PGD 10 9 VOU T RTN FB N.C N.C B ST VCC GND DL 3 4 17 4 1 2 3 P Q55 4 1 2 3 * E4626-G M M E4626-G A *S K34S A A PQ54 C P D18 C PL8 1. 0UH 11.5*10.2*3.0 _ 1 2 *1000p_X7R_06 1.05VS _EN P R94 P Q17 PU6 SC412A / uP6127 4 1 2 3 8.2K_1% _04 C A 4.7u_25V _X5R_08 PD10 RB0540S2 0. 1u_50V 5V_06 _Y 0.1u_50V _Y5V _06 4.7u_25V_X 5R_08
5 6 7 8
11/03
PC45
PC50
P C190
P C187
PQ53 M E4894-G
1.05VS
560u_2. 5V 6* 6* 9 _6. 6. 5. 560u_2.5V_6.6*6.6*5.9
ILIM
12 11
EN
LX
[ 15] 1.05V S_P WRGD
1.0 5V S_P WRGD
11/05
5 6 7 8
P C53 PD3 CSOD 140S H
PC1890.1u_16V_Y 5V_04
3. 3V
N.C
P R107
10K _04
N. C
11/03
V 05 1.
16A
P J17 *OPE N-12mm 1 2
1.05VS
5 6 7 8
R182 *28mil 0 6 _
PR74 *5.1_06
P C73 1u_10V_Y5V _06
P J9 1 P R95 0_04 5V P R104 * 0.9K 4 9 _0 P C87 0.01u_1 6V 7R_04 _X PC86 PR96 PR88 40 .2K _1%_04 PC81 4 7p_50V _NPO_04 *40mil PR87 0_04 VCCIO_S ENS [5] E PR85 0_04 2
P C182
P AD
PC 183
Sheet 34 of 43 Power 1.05VS
20p_ 50V _NPO_04 10 0K _1%_04
1.05VS_VTT
5V 1. 05V S PJ16 *OP _ 5A EN 2 1 1.05VS _VT T P R55 100K _04 PR56 10/1 100K_04 0.8 5V _ON [ 35] D PQ68 M N7002ZHS T 3 PC31 0. 1u_16V _Y5V_04 5V
NM OS
S 1 5V YS P Q74 P 03B 12 V 8 7 3 6 2 5 1 4
1 0A
G C PR229 [2,3 ,5,18,1 9,20,36] 1.05 V _ V T S T R123 *100_04 100K_04 B E 1 10 /1 C399 0.1u_16V_Y 5V_04 C405 * 10u_10V _Y5V _08 P Q10 2N3904 2 PJ3 *1mm
R420 1M _04
C414 2200p_50V_X 7R_04 D 5 S 4 3 P Q75B G
M DN 002Z T 7 HS6R
Q19 M N7002ZH T S3
G S
3.3V
R573
10K 04 _ 6 D PQ75A 2 S 1 G
MD T N70 02Z HS6R
1. 05V S_V T T _EN [ 15]
ON
[13,14, 15,19,2 0] [6,3 5] [ 3,9,10, 11,12,13 ,14,15, 16,17,18, 19,20,2 3,24,25, 27,28,29, 30,31,3 6] [2,3,8 ,11,13, 14,15,17, 18,19,2 0,22,23, 26,28,30, 31,33,3 5] [20, 23,26,30, 31,33,3 5] [1 1,30,31, 32,33,35, 36,37,3 8] [31,3 2] 1. 05V S 0. 85V S 3. 3V S 3. 3V 5V VIN SYS 15V
Power 1.05VS B - 35
Schematic Diagrams
Power 0.85VS
3. 3V PC 129 0.022u_16V_X 7R_04 P R159 10K _04
0.9V
0.8V
0.72 5V 0.67 5V
VCCSA_VID0 VCCSA_VID1
0 0
PR 33
0 1
1 0
1 1
PR 147 9.3K_1% _04 PR 146 10K_1% _04 PR 145
0.85VS WRGD [15] _P PR137 0. 1u_50V 5V_06 _Y
VIN VIN 0. 1u_50V 5V_06 _Y 4. 7u_25V 5R_08 _X 4. 7u_25V 5R_08 _X
0_04 5V
0. 1u_50V 5V_06 _Y
0. 1u_50V _Y5V _06
9.3K_1% _04 1 1/0 4 PR 34 12K_1% _04
PC34
PC155
PC153
PC154
PR148 100_04 C
PD1 RB0540S 2
0.1u_50V _Y5V _06 P C173
PR 35 10K_1% _04
P OK
10K_1% _04 PR 144 10K_1% _04
1 2
Sheet 35 of 43 Power 0.85VS
E AP S S P OK UG B OOT
PR 36 15K_1% _04
P U9 uP 6122 21 20 19 18 17 16
5 4 3 2 1
PC140 0. 1u_16V _Y5V _04
8 7
P Q36A P D1503YV S PL4 1. 0U H_6.8*7.3*3.5 1 2
PC197
PC47
FOR EMI
6A
V 0.85
CO MP V ID0 V ID1 E N/PS M CS N
PR 151 1K_1% _04 PR 150 22_04 PC 124
6 7 8 9 10
SE T3 SE T2 SE T1 SE T0 FB
GND P HAS E LG VCC R T CS P
P J5 *OP EN-5mm 1 2
0.85V S
5 6
PR62 0_04
PR64 0_04 PR157 100_04
PC168 220u_6. 3V _6.3*6.3*4.2
P C40 0.1u_16V _Y5V _04
PR 173
PC 27 CS P
11 12 13 14 15
3 33K_1% _04 PQ36B PD1503Y VS 4 PR63 12K_1% _04 1 1/0 5 PC41
1u_10V_Y _06 5V
CS N PC 131 0.01u_16V_X 7R_04 PC 25 47p_50V_N PO_04 PR 155 *0_04 PR 158 100K_1% _04
0.01u_50V_X 7R_04
PC42 0. 1u_25V 7R_06 _X CS P CS N PR65 1. 3K _04 _1% *0.1u_16V _Y5V _04
0.85V _ON [34]
[ 6] VC CSA I D0 _V [ 6] VC CSA I D1 _V
PR149 VC CSA ENS [6] _S E 0_ 04
5V [20,23,26, 30,31,33,34] 0. 85V [6] S V N [11,30,31, 32,33,34,36,37, 38] I 3.3V [2,3, 8,11,13,14,15, 17,18,19,20,22, 23,26,28,30,31, 33,34]
B - 36 Power 0.85VS
Schematic Diagrams
Power V-Core1
P R2 2 PC 1 1
1.05VS_VTT
5 4 . 9 _ 1% _ 0 4
T RBST
VCORE_1
PR 1 5 1 3 0 _1 % _ 0 4 [ 5 ] H _ C P U_ S V I D D A T [ 5 ] H _ C P U_ S V I D C L K [ 5 ] H _ C P U_ S V I D A L R T # T ENSE S P R1 0
1 0 _ 04 P R2 0
6 80 p _ 5 0V _ X 7 R _ 0 4 P R 1 9 1 . 2 1 K _ 1 %_ 0 4
B~ 4 35 0
RT 4 1 2
2 4. 9K _ 1 % _ 04 PC 7 A_G ND P R1 3 1 DIFFO UT 1 0 0 _1 % _ 0 4 P R1 3 0 5 6 0 0 p_ 5 0 V _ X 7R _ 04 P C1 1 3 1 0 0p _ 5 0V _N P O _0 4 1 K_ 0 4 FB P R2 1 PC 1 2 22 p _ 50 V _ N P O_ 0 4 P R2 7 P C 13 4 . 0 2K _1 % _ 0 4 33 0 0 P _ 50 V _ X 7 R _ 0 4 1 2 . 1K _1 % _ 0 4 P C 15 P C 14 1 20 0 P 7 5 K _ 1 %_ 0 4
PR 1 2 * 7 5_ 0 4
H_ CP U_ S V ID DA T H_ CP U_ S V ID CL K H_ CP U_ S V ID A L RT #
1 00 K _ N T C _ 0 6_ B
PUT COLSE TO VCORE Phase 1 Inductor

P R 1 41 P R 1 33 1 6 5 K _ 1 %_ 0 6 13 7 K _ 1 % _0 6 C S P 1 [ 3 7]
10/29
P R 18 9 [ 5 ] V C OR E _ V S S _ S E N S E P C5 R T3 PR1 8 7 PC 8 P R 1 42 C SC OM P 1 0 00 p _ 5 0V _X 7 R _ 0 4 T RBS T CO M P IL IM [ 5 ] V C OR E _ V C C _ S E N S E P R 12 4 P R1 8 8 1 0 0_ 0 4 V C C _ S E N S E _6 1 3 1 0 _0 4 PR 9 * 1 5m i l _ 06 VR 1_ SRE F C IM ON PR 3 2 PC 2 0 1 0 0 0p _ 5 0V _X 7 R _0 4 1 0 _ 04 1 0 _ 04 CS N1 [3 7 ] 0 . 1u _ 1 0 V _ X 7 R _ 0 4 1 10 0 _ 04 P R 12 8 0 _0 4 V S S _ S E N S E _ 6 1 31 P R 28 2 70 p _ 5 0V _X 7 R _ 0 4 CSS UM
PR 3 1
13 7 K _ 1 % _0 6 C S P 3 [ 3 7]
Qua d 4 5W C PU VID 1= 0. 9V Ic cMa x = 94 A R_LL= 1 .9m ohm OC P~ 12 0A
B~ 3 96 4
1 0 0K _N T C _0 6 _ B 8 . 25 K _ 1 % _ 04 2
V COR E
C S N3 [3 7 ] CS N3 [3 7 ] P C2 2 0 . 0 4 7u _ 1 0 V _X 7 R _0 4
P R 16 1 0 K _ 04 [ 3 ] H _ P RO CH OT # P R 2 30 0_04
PR 1 1 1 0 K _0 4
EP AD D I F F OU T VSN TR BST FB C OM P IL IM D R O OP C SCO M P CSSU M IO UT CS R E F N C2 NC 1
A_GN D
PUT COLSE TO VCORE HOT SPOT
3.3 V S
A_ ND G 53 52 51 50 49 48 47 46 45 44 43 42 41 40 A _ ND G PU 1
PR 4 2 A_GN D P R1 5 3 39 38 37 36 35 34 33 32 31 30 29 28 27 C S N 2 _5 V S CSN 3 CSP P3 CSN 1 CSP P1 DR ON V R1 _ P W M 3 P W M 2_ 6 1 3 1 I MA X _ 6 1 31 VR1_PWM A V B O OT A P R 41 * 0 _0 4 P R4 0 10 K _ 0 4 0_ 0 4
5. 49 K _ 1 % _ 04
C SP3 [3 7 ]
C S N1 [3 7 ]
[1 5 ] D E L AY _ P W RG D V R_ ON
PR 8 6 131_VCC P R 1 25 2 . 2 _0 6
0 _ 04
5VS
VIN P R
PC 3
17
A_GN D 1 K _ 1 % _ 04
VSN A VSPA FBA D IF F OU T A TR BSTA CO M PA IL IM A D R O OP A C S C OM P A IO UT A CSS UM A C SPA CS NA
1 2 3 H_C PU_SVID DA T 4 5 H_C PU_SVID CLK 6 H_C PU_SVID ALRT# 7 VR_R DY 8 VR_R DY A V R _ O N_ E N A B L E _ 61 3 1 9 10 RO S C 1 1 P R1 4 1 0K _0 4 V RM P _ VIN 1 2 TS E NS E A 1 3 TSEN SE PC 6
VSP T S E NS E V R H OT # SDI O SCL K AL E RT # VR_ R DY VR_ R DY A ENA B L E VCC RO S C VRM P T S E NS E A
N C P 6 13 1 S
CS N2 C SP2 CS N3 C SP3 CS N1 C SP1 D R ON P W M1 / A D D R P W M 3 / V B O OT P W M 2/ I S H E D IM A X PW M A /IM AX A V B OO T A
5VS
P C2 3
0 . 0 4 7u _ 1 0 V _X 7 R _0 4
P R4 3
5. 49 K _ 1 % _ 04 C SP1 [3 7 ] D R ON [3 7 ] V R 1 _ P W M 1 [ 3 7]
Sheet 36 of 43 Power V-Core1
P R 39 V R 1_ P W MA [ 3 7 ]
0_04
V R 1 _ P W M 3 [ 3 7]
5VS
P R1 5 2
P R1 5 6 1 0K _0 4
5VS
P R 1 54 2 0 . 5 K _ 1% _ 1 / 1 6W _0 4
PR 3 8 1 0K _0 4 4 1 . 2 K _ 1% _ 0 4
TSEN SEA
P R1 8 1 u_ 6 . 3 V _ X 5R _ 0 4 *1 4 K _ 1 % _0 4 0 . 0 1u _ 5 0 V _ X7 R _0 4
R T1
P C 1 14 1 0 . 1 u _1 0 V _ X 7 R _ 0 4 P R 1 69
V SNA_ 6 1 3 1 V S P A _6 1 3 1
P J1 4 *6 m li IM ON A IL IM A
P R3 7
OPTION: DISALBE V_GT

A _ ND G
14 15 16 17 18 19 20 21 22 23 24 25 26
A_GN D A_GN D
A_GN D PJ 1 3 *6 m i l P R1 4 3 1 13 K _ 1 % _ 04
B ~3 9 64
1 0 0 K _ N T C _ 06 _ B 2 I M NA O I MO N
P C2 1 A_GN D 1 0 00 p _ 50 V _ X 7 R _ 0 4
A_GN D
A_GN D
11 3 K _ 1 % _0 4
IC C_M AX _2 1h = R*10 uA*25 6A/ 2V

C SNA C SPPA
2010 0805
A_GN D C S NA [ 3 7]
8 . 2 5 K _1 % _ 0 4
P C 19 0 . 0 2 2 u_ 1 6 V _ X 7R _ 04 C S P A [ 37 ]
CSS UM A P R 1 40 2 4 K _ 1 %_ 0 4 P C1 1 7 P R1 3 4 2 4 . 3 K _ 1% _ 0 4 P C1 1 8 0 . 1 u _1 0 V _ X 5 R _ 0 4 0. 1 u _ 1 0V _X 5 R _ 0 4 P R1 3 2 1 5K _ 1 % _ 0 4 CO M PA PC 1 7 CSC OM PA PC 1 6
P R1 3 5 47 0 p _ 50 V _ X 7 R _ 0 4 1 1 5 K _ 1 %_ 0 6
P R1 3 9 7 . 5 K _ 1 %_ 0 4 C S PA [3 7 ]
A_GN D
27 0 P _ 5 0V _X 7 R _0 4
PUT COLSE TO V_GT HOT SPOT
A_ ND G A _ ND G A _ ND G P R 1 91 1 0 0_ 0 4
A_GN D
DIF FOU TA P R2 4 P C1 0 P R 25 6 8 P _ 5 0V _N P O_ 0 4 1 0 _0 4 P R2 3 1 1 K_ 0 4 FBA PC1 1 5 1 0 0p _ 5 0 V _ N P O _ 04 P C 11 6 3 3 00 p _ 5 0V _X 7 R _ 0 4 10 0 K _ N T C _ 06 _ B PR 2 6 7 5 K _ 1 % _0 4 RT 2 2 1 6 5K _1 % _ 0 6
P R 12 7 0 _0 4 [ 6 ] V S S _ GT _ S E N S E P R 12 6 0 _0 4 [ 6 ] V C C _ G T _S E N S E P R 1 90 1 0 0_ 0 4 P C9 10 0 0 p _5 0 V _ X 7 R _ 0 4 P R 1 29
B~ 4 35 0
3 . 0 1 K _ 1 %_ 0 4
V_GT
3 . 3V S PR 6 1 P R3 PJ 2 * 1 00 K _ 0 4 G 3 D P Q6 9 B [ 27 ] V C O R E _ ON G 4 S 5 *M T D N 7 00 2 Z H S 6R 2 1 PJ 1 *6 m i l 1 S *6 m i l * 1 0K _0 4 2 6 D P Q6 9 A 2 * 10 K _ 0 4 * MT D N 7 00 2 Z H S 6 R [ 1 1 , 1 5, 27 ] A LL _ S Y S _P W R G D P R7 *1 0 m il _ 0 4 V R _O N PR 5 V R _ ON
PUT COLSE TO V_GT Inductor
Q ua d VCC AXG V ID1 = 1. 15 V I cc Ma x =2 6A R _LL= 3. 9m ohm O CP~ 3 1A
PC 1 *0 . 1 u _ 16 V _ Y 5V _0 4
[ 1 1 , 12 , 1 9 , 2 0 , 25 , 2 9 , 3 0 , 31 , 3 7 ] 5 V S [ 3 , 9 , 1 0, 1 1 , 1 2 , 1 3, 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 1 9, 2 0 , 2 3 , 2 4, 2 5 , 2 7 , 28 , 2 9 , 3 0 , 31 ] 3 . 3 V S [ 3 7 ] V _ GT [ 5 , 37 ] V CO RE [ 1 3 , 1 4 , 15 , 1 9 , 2 0 , 34 ] 1 . 0 5 V S [ 1 1 , 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 3 7 , 38 ] V I N [ 2, 3 , 5 , 1 8 , 1 9, 2 0 , 3 4 ] 1 . 0 5V S _V TT
Power V-Core1 B - 37
Schematic Diagrams
Power V-Core2
VIN
* 4. 7 u _ 25 V _ X 5 R _ 0 8 1 5 u_ 2 5 V _ 6. 3 *4 . 4 *4 . 7 u_ 2 5 V _ X 5R _ 08 0 . 1 u _5 0 V _ Y 5 V _0 6
VCORE_2
P R1 36 P C 11 9 PQ 2 9 M D U 26 5 7 D 2 . 2 _ 06 P U8 1 [ 3 6 ] V R 1_ P W M 1 [ 3 6 ] D R ON P R 1 38 2 3 4 9. 9 _ 1 %_ 0 4 4 2 . 2 u _6 . 3 V _ X 5 R _ 0 6 BS T PW M EN V CC P AD S S 9 S N C P 5 91 1 HG 8 SW 7 V R E G_ S W 1 _ H G V R E G_ S W 1 _ OU T PQ 3 8 M D U 26 5 4 D V R E G_ S W 1 _ L G G G G P D 15 PQ 4 6 M D U 26 5 4 D P Q2 8 *M D U 26 5 4 D C 0 . 2 2 u _1 0 V _ X7 R _0 6 G S P Q3 9 *M D U 26 5 7 G S D
P C2 2 3 + *3 3 0 u F _2 5 V
P C1 3 3 +
P C 15 2
P C1 4 9
PC1 6 1
11/03
PL 6 0 . 3 6u H _1 2 . 9 *1 4 *3 . 8 1 2 P C 36 * 10 0 0 p_ X 7 R_ 0 6 PR 6 9
25A
VC ORE V CO RE *1 5 m il _ 06 C SN1 [3 6 ]
GN D 6 LG 5
5V S
S K 34 S A P R 57 A * 5. 1 _ 0 6 PR 6 7 *1 5 m il _ 06 C S P 1 [ 36 ]
P C 1 25
PC1 3 0 + 1 5 u_ 2 5 V _ 6. 3 * 4. 4 P R2 9 P C 18
P C1 2 0 * 4. 7 u _ 25 V _ X 5 R _ 0 8
P C1 2 1 * 4. 7 u _ 25 V _ X 5 R _ 0 8
P C 1 22 0 . 1 u _5 0 V _ Y 5 V _0 6 [5 ,3 6 ] VCO RE
VI N
P Q4 0 MD U 2 6 57 D P Q3 0 *M D U 26 5 7 D G S S
50A
+P C 17 6 +P C 17 2 +P C 17 8 +P C 1 74 +P C 1 75 +P C 1 70 +P C 1 77 +P C 1 71 * 33 0 U _ 2 . 5 V _ D 2 * 33 0 U _ 2 . 5 V _ D 2 5 6 0u _ 2 . 5V _6 . 6 *6 . 6 *5 . 9 5 6 0u _ 2 . 5V _6 . 6 *6 . 6 *5 . 9 5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9 5 6 0u _ 2 . 5 V _6 . 6 *6 . 6 *5 . 9 5 6 0u _ 2 . 5 V _6 . 6 *6 . 6 *5 . 9 * 3 30 U _ 2 . 5 V _ D 2
2 . 2 _ 06
0 . 2 2 u _1 0 V _ X7 R _0 6 N C P 5 91 1 HG 8 SW 7 V R E G_ S W 3 _ H G VR EG_SW3_OU T D G
Sheet 37 of 43 Power V-Core2
P U2 1 [ 3 6 ] V R 1_ P W M 3 [ 3 6 ] D R ON PR 3 0 2 3 4 9. 9 _ 1 %_ 0 4 4 2 . 2u _ 6 . 3 V _X 5 R _0 6 BS T PW M EN V CC
PL 5 0 . 3 6u H _1 2 . 9 *1 4 *3 . 8 1 2 P C 43 C * 10 0 0 p_ X 7 R_ 0 6 PR 7 0 P R 66
VC ORE
25A
GN D 6 LG 5 P AD 9 VR EG_SW3_LG
5V S
G S
G S
G P D1 1 S SK3 4 SA
P Q4 5 MD U 2 6 54
PQ 4 1 M D U 26 5 4
P Q3 1 *M D U 26 5 4
V C OR E
*1 5 m il _ 06
CS N 3 [3 6 ]
* 5. 1 _ 0 6
PR 6 8
*1 5 m il _ 06
CS P 3 [3 6 ]
PC 2 4
P C 12 3 + 15 u _ 25 V _ 6 . 3 *4 . 4 PR 5 2 P C3 0
P C 12 7 *4 . 7 u_ 2 5 V _X 5R _ 08
P C 12 8 *4 . 7 u_ 2 5 V _ X 5R _ 08
P C1 2 6 0. 1u _ 5 0V _ Y 5 V _ 0 6
VGFX_CORE
V _GT
P R6 0 *1 5 m il _ 0 6
VIN
P Q3 3 *M D U 2 6 5 7 PQ 3 2 M D U 26 5 7 G S D
G P U3 1 BS T [ 3 6 ] V R 1_ P W M A [ 3 6 ] D R ON PR 5 4 2 PW M 3 4 9. 9 _ 1 %_ 0 4 4 2 . 2 u _6 . 3 V _ X 5 R _ 0 6 EN VCC P AD S S A CS OD1 4 0 S H 9 P R 61 *5 . 1 _ 06 SW HG N C P 5 91 1 8 7 VR EG_SWA_H G VR EG_SWA P Q4 4 *M D U 2 6 5 4 D VR EG_SWA_LG PQ 4 3 M D U 26 5 4 D G S
2 . 2 _ 06
0 . 2 2 u_ 1 0 V _ X7 R _0 6
11/04
C PD 2
PL 3 0 . 3 6u H _1 0 *1 0 *3 . 5 1 2 P C 37
VGFX_C ORE
VGFX_CO RE
25A
+P C 1 47 +P C 16 4 3 30 u F _ 2 . 5V _9 m _ 6. 3 * 6 CS NA [3 6 ] * 3 30 u _ 2. 5 V _ 9 m _6 . 3 *6
GN D 6 LG 5
5VS
11/0 9
*1 0 0 0p _ X 7R _ 06 PR5 9 * 15 m i l_ 0 6
P C3 8
PR5 8
* 15 m i l_ 0 6
C S P A [ 3 6]
V C OR E [ 5 , 36 ] V _ GT [ 3 6 ] V G F X_ C OR E [ 6 ]
[ 1 1, 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 36 , 3 8 ] V I N [ 1 1, 1 2 , 1 9, 2 0 , 2 5 , 29 , 3 0 , 31 , 3 6 ] 5 V S
B - 38 Power V-Core2
Schematic Diagrams
Charger, DC In
CHARGER
VIN JA C K 1 50 9 3 2-0 0 3 01 -0 0 1 1 2 G ND 1 G ND 2 PL 1
# Cha rge Current 3.0A

VA P Q3 7 ME P 4 4 3 5Q 8 5 6 7 8 P R 1 75 0 . 0 2 _1 % _ 32 4
# Cha rge Volt age 12.6V

1 2 3
# Tot al P ower 60W
11/0 4
H C B 45 3 2 K -80 0 _ 18
VA 8 7 6 5
PQ 2 5 M E P 4 43 5 Q8 3 2 1 0 _ 04 4 P R 12 1 20 0 K _ 1% _ 0 4 *0 . 3 3 u_ 5 0 V _ 08 P R4 0 . 0 2 _1 % _ 32 0_04 2 1
P Q3 5 A A P 6 9 01 G S M 7
11/05
P L2 4. 7 U H _ 6. 8 * 7. 3 *3 . 5
V_ BAT
P C1 08 0 . 1 u _5 0 V _ Y 5 V _0 6
P C1 0 7 0 . 1u _ 5 0V _ Y 5 V _ 06
P C 10 9 0 . 1 u_ 5 0 V _Y 5V _ 0 6 P R 1 20 1 0 K _ 1 %_ 0 4
P R1 8 6 1 30 K _ 1 %_ 0 4
5 6
4 . 7 u_ 2 5 V _X 5R _0 8
4 . 7 u_ 2 5 V _X 5 R _0 8
4 . 7 u_ 2 5V _X 5 R _0 8
4 . 7u _ 2 5V _ X 5 R _ 0 8
4 . 7 u _2 5 V _ X 5R _ 08 PC3 3
4. 7u _ 25 V _ X 5 R _ 0 8
0 . 1 u_ 5 0V _Y 5 V _ 0 6
R 6 09 *5 . 1_ 1 % _0 6 P Q 35 B C 5 88 A P 6 9 0 1G S M P C 1 58 *1 00 0 p _5 0 V _ X7 R _0 4
4 . 7 u_ 2 5 V _X 5 R _0 8
0 . 1 u_ 5 0 V _Y 5 V _ 0 6
4 . 7 u _2 5 V _ X 5R _ 08
11/03
3 P R1 8 0 0 _0 4
P C 11 2
PR 1
PR 2
PC 3 5
P C 18 1
P C 13 8
P C 13 9
P C 15 9
P C1 5 7
P C 15 1
10 0 K _ 1 %_ 0 4
V_ BAT
11/05
* 0 . 1u _ 5 0V _ Y 5 V _ 0 6 *0 . 1 u _5 0 V _ Y 5 V _0 6 P C 16 0 P D1 2 C A 0_ 0 4 R B 05 4 0 S 2 0 . 1 u_ 5 0V _Y 5V _0 6
P C 1 34
1 0K _ 1 % _0 4
PC 4
P R1 8 5
0 . 1 u _5 0 V _ Y 5 V _0 6
PR1 6 4
0 . 1 u_ 5 0 V _Y 5 V _0 6
0 . 1 u _5 0 V _ Y 5 V _ 06
0 . 1 u _5 0 V _ Y 5 V _ 06 PR1 2 2
*0 _0 4
P C 13 7
P C 1 41
PC1 4 6
P C 1 43 1 u _ 25 V _ 0 8
V IN
P C 1 65
P C 16 6
P C3 9 0 . 1 u _5 0 V _ Y 5 V _ 06
PC2 8 0 . 1u _ 5 0V _ Y 5V _ 0 6
P C 44 0 . 1 u_ 5 0 V _Y 5 V _0 6
P C1 5 6 0 . 1u _ 5 0V _Y 5V _0 6
VA 32 31 30 29 28 27 26 25
C E L LS
PR1 7 2
P 25th IN FOR2S CO E TO GN NN CT D FOR3S CO E N NN CT .C. FOR4S CO E TO VR F PIN NN CT E

P R4 7 * 0_ 0 4 S M C_ B A T C AC A D 6 B A V 99 R E C T I F I E R C AC A D 7 B A V 99 R E C T I F I E R C AC A D 9 B A V 99 R E C T I F I E R C AC A D 8 B A V 99 R E C T I F I E R
V DD 3
Sheet 38 of 43 Charger, DC In
P U1 0 1 2 3 4 5 6 7 8
VA 24 23 22 21 20 19 18 17 33 P C1 3 2 0 . 1u _ 5 0V _Y 5V _0 6 CT L 1 S M D_ B A T
V DD 3
-I N E 1 OUT C 1 OU T C 2 + IN C2 -I N C 2 A DJ 2 CO M P 2 C OM P 3
0 . 1 u _5 0 V _ Y 5 V _0 6
P R1 8 2 [ 32 ] U S B _ A C _ I N 10 K _ 0 4 A C _ I N # [ 2 6 , 2 7] C C VA PD1 3 UD Z 1 6 B PC1 6 3 *0 . 1 u _5 0 V _ Y 5 V _ 06 E A B P Q4 2 D T C1 1 4E U A P R 18 1 PR1 8 4 1 0 K _1 % _ 04 S GN D 6
0 . 1 u_ 5 0V _Y 5 V _ 0 6
9 10 11 12 13 14 15 16
MB 3 9 A 13 2 PC1 4 2 1 0 0 p_ 5 0V _N P O_ 0 4
3 9. 2 K _ 1 %_ 0 4
VC C -I N C 1 + INC 1 A C IN A C OK -I N E 3 AD J 1 C OM P 1
C T L2 CB OU T -1 LX VB O U T -2 P GN D C E L LS T RERM AL P AD
VI N C TL 1 GN D VR EF RT C S A DJ 3 BAT T S GN D
B A T_ D E T V O L T_ S E L P R 17 6 S G ND 6 4 9 . 9K _1 % _ 04
B A T_ V O LT P R 17 0 1 K _ 1% _ 0 4
T OTAL POW ER ADJ
1 0K _1 % _ 04
P R1 7 1 1 K _ 1% _ 0 4
CHA RGE CUR N RE T ADJ
P C 1 36
0 . 0 1u _ 50 V _ X 7 R _ 04 P R1 8 3 2 0 K _1 % _ 04 S GN D 6 S GN D 6
PR1 6 2
P C 13 5
P C 16 2
P C1 4 5 * 22 p _5 0 V _ N P O _0 4 PC1 4 4 1 0 0 0p _ 50 V _ X 7 R_ 04 P R 1 7 4 2 2 K _1 % _ 04 PC1 4 8 1 0 0 0p _ 50 V _ X 7 R_ 04 P R 1 7 7 10 K _ 1 %_ 0 4
P R 16 7 2 2 K _1 % _ 04 V _B A T
S G ND6
S GN D 6
S GN D 6
V _B A T
P Q8 A O3 4 0 9 D
PR 5 1 3 0 0K _1 % _ 04 B A T _ V OL T _ R
S G ND 6 P C1 5 0
PR4 9 2 0 0K _ 0 4
PR5 3 60 . 4 K _ 1% _ 0 4 PR 4 8 0_04
P C3 2 0 . 1u _ 5 0V _Y 5V _0 6 [ 2 7 ] T OT A L _C U R
0.5V/1AT O TA L _ C U R 0.5V/1A
C UR _ SE NS E
11/05
P R2 3 5 4 7 0K _ 0 4 P R 16 8 1 0 2K _ 1 % _0 4
0. 1 u _ 50 V _ Y 5 V _ 0 6
PI N17t h CON EC N T TO BAT CON . N
W250HU
5 [ 2 7 ] S MC _B A T [ 2 7 ] S MD _B A T [ 2 7] B A T_ D E T [ 2 7 ] B A T _V OL T F CM F CM F CM F CM 10 0 5K 10 0 5K 10 0 5K 10 0 5K F -12 1 T 03 F -12 1 T 03 F -12 1 T 03 F -12 1 T 03 1 1 1 1 2 2 2 2 PL 1 1 PL 1 2 PL 1 3 PL 1 4 SM SM BA BA C_ BA T _ R D_ BA T _ R T_ D E T_ R T_ V O LT _ R 4 3 2 1 J BATTA1 *B T D -05 T C 1 B
C E L LS D PQ 6 VDD 3 M T N 7 00 2 Z H S 3 S V D D3 PQ 4 D T A 1 14 E U A G V DD 3
E V O LT _ S E L 6 B D G 1 S 2 P R4 4 P Q7 1 A MT D N 7 00 2 Z H S10 R K _ 04 60 PR1 7 8 P R 16 3 1 7. 4 K _ 1 % _0 4
P R1 6 1
2M _1 % _ 0 4
11/0 4
G V C H G -S E L [ 2 7]
P R5 0 10 0 K _ 04 P Q 7 0B M T D N 7 0 0 2Z H S 6 R 3 D [ 2 7 ] C H G_ E N G 4 S 1 5 G 1 P J4 *O P E N -1 m m 2 6
P R1 6 0 1 0K _ 0 4 C T L1 D 2 S [ 2 7] C E L L_ C ON TR OL P R4 5 1M _0 4 G 4 P Q 7 0A M TD N7 0 0 2Z H S 6 R
7 6 . 8K _1 % _ 04
W240HU
5 4 3 2 1 J BATTA2 B T D-0 5 TI 1 G
P Q2 6 MT N7 0 0 2Z H S 3
D 3 D 5 S P Q 7 1B M T D N7 0 0 2Z H S 6 R P C2 6 0 . 0 1u _ 5 0V _X 7 R _0 4 P R4 6 1M _ 04 G S P Q3 4 M T N7 0 02 Z H S 3 P R 1 79 *2 8 mi l _ 06 S G ND 6
6 -21-D 34B0105
S GN D 6
V D D3 [ 1 3, 2 2 , 2 4, 2 7 , 3 1, 3 2 ] VA [3 1 ] V I N [ 11 , 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 3 6 , 3 7]
S GN D 6
Charger, DC In B - 39
Schematic Diagrams
Click Board
CLICK BOARD
CLE D_AC N I CLE D_PW R CLED_B AT_C HG CLED_B AT_FULL
CC1 0.1u_16V_Y5V _04 C5VS CGND C5VS
CC 2 *0. 1u_16V _Y5V_04 CVDD 3 CGND
CC3 *0.1u_16V _Y5V_04 1 1
CR1
CR 2 *220 _04 *220_04 3 CD27 SG
CR3
CR4 3
P OWER ON L ED
*220_04 *220_04 1
BAT LED
CD 26
Sheet 39 of 43 Click Board
CJ_TP1 1 CTP_DA TA 2 CTP_CLK 3 4 85201-04051 C GND
CJ_TP2 1 CTP_CLK 2 CTP_DA TA 3 CTPB UTTON_L 4 CTPB UTTON_R 5 6 85201-06051 C GND
CJ_TP3 1 CLED_P WR 2 CLED_A CIN 3 CLED_B AT_FULL 4 CLED_B AT_C HG 5 6 *85201-06051 CG ND
*K -3025YSGC PB 2 11/ 04
SG 4
CGND
2 2
*KP B-3025YS GC 11/04
CGND CGND
C GND CGN D
6-20-94A50-104 6-20-94AA0-104 6-20-94A70-104
6-52-55002-042 6-52-55002-04E
6-52-55002-042 6-52-55002-04E
6-21-91A00-106 6-21-91A20-106
6-21-91A00-106 6-21-91A20-106
CSW1~4 2 1 4 3
LIF T KEY
CS W1 TJG-533-S-T/R 1 3 5 6 2 4 CTPB UTTON_L 1 3
RIG HT KE Y
CS W2 TJG-533-S-T/R 2 4 5 6 CTPB UTTON_R 1 3
LIFT KEY
C SW3 *TJG-533-S R -T/ 2 4 5 6
RIGH T KEY
CSW 4 *TJG-533-S R -T/ 2 4 5 6
CTP BUTTON _L
1 3
CTP BUTTON _R
CGN D
CG ND
C GND
C GND
6-53-3050B-042
6-53-3050B-042
6-53-3050B-042
6-53-3050B-042
2 3 4 5
CH3 1 MTH237D91
9 8 7 6
2 3 4 5
CH1 1 MTH237D91
9 8 7 6
2 3 4 5
CH4 1 MTH237D91
9 8 7 6
2 3 4 5
CH2 1 MTH237D91
9 8 7 6
CH5 C95D95
CH 6 HO -165X 94_5NP
CGND
CGND
CGND
CGND
CGND
CGND
CGND
CGN D
B - 40 Click Board
Schematic Diagrams
Audio Board/USB
USB PORT
A _ U S B V CC A L5 H C B 1 6 08 K F -1 2 1T 2 5 +A C 1 1 00 u _ 6. 3 V _ B _ A 7 A C5 8 0. 1 u _ 16 V _ Y 5 V _ 04 1 0. 1 u _ 16 V _ Y 5 V _ 04 A U S B _ P N2 AU SB_ PP2 A GN D A G N D A G ND A C6 A R 10 A L 61 4 1 *1 0m i l _0 4 3 2 A GN D A U S B _ P N2 _ R A U S B _ P P 2 _R 1 2 3 DA T A _ H GN D GN D1 G ND 2 GN D3 G ND 4 U S 04 0 3 6B C A 0 81 G ND1 GN D2 G ND3 GND 4 4 A J _ US B 1 V+ DA T A _ L A _U S B V C C 2
60 mil
A C7 0. 1 u _ 16 V _ Y 5 V _ 04
A _U S B V C C AU 1 A_ 5 V 5 F L G# V O UT 1 V I N 1 V O UT 2 V I N 2 V O UT 3 E N# G ND 6
50 mils
5 0mi ls
A C9 1 0u _ 1 0V _ Y 5V _ 0 8
2 3 4
R T9 7 1 5B G S A GN D A G ND
*A W C M2 0 12 F 2 S -1 61 T 0 3 A R 11 *1 0m i l _0 4
6-02-09715-920
PIN SWAP
6 -21B49C 0-104 6 -21B49B 0-104
A GN D
TO M/B
AUDIO JACK
A MI C 1 -R A MI C 1 -L A MI C _S E N S E AL 4 F C M1 0 05 K F -1 2 1T 0 3 AL 6 F C M1 0 05 K F -1 2 1T 0 3 5 4 3 2 6 1 AC 1 0 A J _ A U D I O1 1 0 0p _ 5 0V _ N P O_ 0 4 A M I C 1 -R A M I C 1 -L AH AH AM AS AH AU AU E A D P H ON E -R E A D P H ON E -L IC_ S E N S E P K _H P # P _ S E NS E S B _ P N2 SB_ PP2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 72 1 3 -14 0 0 G A _A U D G A G N D 1 00 p _ 50 V _ N P O _0 4 A C4 A J_ M I C 1 R
Sheet 40 of 43 Audio Board/USB

620-B2 800106
A_ 5 V
2 S J -T3 5 1 -S 2 3
MIC IN
BLACK
A H P _ S E NSE A S P K _H P # A H E A D P H O N E -R A H E A D P H O N E -L A R3 A R5 68 _ 0 4 68 _ 0 4 A L2 A L3 F C M1 0 05 K F -1 2 1 T0 3 F C M1 0 05 K F -1 2 1 T0 3 A R9 *1 K _ 1% _ 0 4 AR8 *1 K _ 1 %_ 0 4 A C3 10 0 p _5 0 V _ N P O_ 0 4 AC 2 10 0 p_ 5 0 V _N P O_ 0 4 A _A U D G 5 4 3 A J_ H P 1 R
A S P K OU TR + A S P K OU TR -
2 6 L 1 2 S J -T3 5 1 -S 2 3
HEA DPHONE
620-53 A00114
A _A U D G
BLACK 6-20-B2800-106
A C1 4 A C1 5 A C1 3 A C1 6
0 . 1 u_ 1 6V _Y 5V _ 0 4 AS P K O UT R+ 0 . 1 u_ 1 6V _Y 5V _ 0 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 A S P K OU TR -
AL 7 F C M 1 00 5 K F -1 21 T 0 3 1 2
AL 8 F C M 1 00 5 K F -1 21 T 0 3 1 2
A C1 1 1 00 0 p _5 0 V _ X7 R _0 4
A S P K OU T R+ _R A S P K OU T R-_ R A C8 18 0 p_ 5 0 V _N P O_ 0 4 A C1 7 18 0 p _5 0 V _ N P O_ 0 4
A J_ S P K R 1 J_S PK1 2 1 1 2
8 5 20 4 -0 20 0 1 P C B F o o t p rin t = 8 52 0 4 -02 R
A GN D
A _A U D G
A _A UD G
6-2 0-431 50-1 02 6-2 0-431 10-1 02
AH 1 C 5 9D 59
A H3 C5 9 D5 9 2 3 4 5
AH 2 1
9 8 7 6
2 3 4 5
AH4 1
9 8 7 6
M TH 2 76 D 1 1 1 A GN D A GN D A G ND
MT H 2 7 6 D 1 11 A G ND
Audio Board/USB B - 41
Schematic Diagrams
Power Switch & LID Board

POWER SW & LED & HOT KEY
S _3 . 3 V S S _ 3 .3V
SR 2 S _ 3. 3 V S SJ _ SW 1 1 2 3 4 5 6 7 8 9 10 S _ 3 .3V 2 2 0 _0 4
C S _ 3. 3V SR 1 1 00 K _ 1 %_ 0 4 2 V CC S C2 0 .1u _ 1 0V _ X 7 R_ 04 OU T G ND SC 1 MH 2 48 -A L F A -E S O * 10 0 p_ 5 0 V _N P O_ 0 4 AC SU 1 1 S L I D _S W # A 3 S M GND S M GN D S M GND
S _ 3. 3V S
S _ 3 . 3V
POWER SWITCH LED
LID SWITCH IC
S D2 *B A V 9 9 RE C TIF I E R
2 0mi l
SJ _ SW 2 S M _B T N # S W E B _W W W # S W E B _E M A I L # S L ID_ S W # SAP_ O N S _ V IN S M GN D S M GN D 1 2 3 4 5 6 7 8 8 8 48 6 -0 80 1
20 mi l
S M _B T N# SW EB_ W W W # S W E B _ E M A IL# S L I D_ S W # S A P _ ON S M GN D
20 mil
A
2 0m il
S C6 A 0.1 u _ 16 V _ Y 5 V _ 0 4
S D3 * HT -1 50 NB -DT C
SD 1 S M GN D HT -1 50 N B -DT C
S MG ND
Sheet 41 of 43 Power Switch & LID Board
* 50 5 0 0-0 1 0 41 -0 0 1L
1 0 pin & 8 pi n co- la y
6-2 K10-1 0-94 08
6 5600 3 -52- 1-02 6 5600 8 -52- 1-02 6 5600 0 -52- 0-02 6 5600 2 -52- 1-02
S MGN D
S M GND
6 -52-5 -023 6001 6 -52-5 -028 6001 6 -52-5 -020 6000 6 -52-5 -022 6001
6-0 2-002 C2 48-L 6-0 2-002 C1 68-L
SU S 1, U2 3 1 2
FOR E5128 Q
F E4 OR 120Q/ E5120 Q
HOT KEY
6-5 50B-2 3-31 45 6-5 50B-2 3-30 41 6-5 50B-2 3-30 40 POWER BUTTON
SPW R _ SW 1 T J G-5 33 -S -T / R 1 3 2 4 S M_ B T N# 1 3
6-5 50B3-31 245 6-5 50B3-30 241 6-5 50B3-30 240 WEB_WWW#
SW W W _ SW 1 T JG -5 33 -S -T / R 2 4 SW EB_ W W W #
6-53 0B-2 -315 45 6-53 0B-2 -305 41 6-53 0B-2 -305 40 WEB_EMAIL#
11/04
S M A I L _S W 1 T J G-5 3 3-S -T/ R 1 3 2 4 SW EB_ EM AIL #
S_ VIN
S R3 *1 0 0 K _1 % _ 04 1 3
6 3150 -53- B-245 6 3050 -53- B-241 6 3050 -53- B-240 AP_KEY#
SAP_ SW 1 T J G-5 33 -S -T /R 2 4 SC 5 0 . 1 u_ 1 6 V _Y 5 V _0 4 SAP_ O N
5 6
5 6
5 6
P ~8 SW1 0 .1 u_ 1 6V _Y 5V _ 0 4 3 4 S MGN D 1 2 S M GN D S M GND S MGN D S M GN D 0 .1 u _1 6 V _ Y 5 V _0 4
S R4 0_ 0 4
5 6
SC 4
SC 3
S R5 *4 7 K _ 04
S M GN D S MG ND S MGN D
S M GN D
F E4 OR 120Q/ E5120 Q
POWER BUTTON
SPW R _ SW 2 * TJ G-5 3 3 -S -T/ R 1 3 5 6 2 4 S M_ B T N# S M H1 S MH 2 S M H5 H7 _ 0 D2 _3 H 7_ 0 D2 _ 3 2 3 4 5 1 9 8 7 6 2 3 4 5 S M H3 1 9 8 7 6 2 3 4 5
S M H4 1 9 8 7 6
P ~8 SW1 3 4 S MGN D 1 2 S M GND S M GN D S MGN D
MT H 23 7 D8 7 S MG ND
M TH 23 7 D8 7 S MG ND
M TH 2 37 D1 1 8 S MG ND
6-5 50B-2 3-31 45 6-5 50B-2 3-30 40 6-5 50B-2 3-30 41
FOR E5128 Q
B - 42 Power Switch & LID Board
Schematic Diagrams
External ODD Board

ODD BOARD FOR E5120Q
QJ _O D D2 S1 S2 S3 S4 S5 S6 S7 QG N D
Q J _O D D1 Q J _SATA_ TXP1 Q J _SATA_ TXN 1 Q J _SATA_ RXN 1 Q J _SATA_ RXP1 S1 S2 S3 S4 S5 S6 S7 Q GN D Q J _O DD _ DETEC T# Q _5 VS Q J _SATA_ OD D _D A# Q _5 VS
P1 P2 P3 P4 P5 P6
P1 P2 P3 P4 P5 P6 2 4 20 01 - 1 PIN G ND 1 ~3 =Q G ND
1- 16 2 -1 00 5 62 PI N QG N D G ND 1 ~2 =W G N D
Sheet 42 of 43 External ODD Board
Q GN D
6 -21-13 A00-013
6-2 1-1401 0-013 6-2 1-1402 0-013 6-2 1-1403 0-013
Q _5 VS
QC 2 0 . 1u _1 6 V_Y 5 V_0 4
QC 1 0 . 1u _1 6 V_Y 5 V_0 4
Q GN D
QH 1 C2 3 7D 91
Q H4 C 23 7D 9 1
QH 3 C6 7D 6 7
QH 2 C6 7D 6 7
Q G ND
Q G ND
External ODD Board B - 43
Schematic Diagrams
Power Sequence
W240HU/W250HUQ-D02
DD_ ON
768.6us
POWER ON SEQUENCE
3. 3V
1.58ms
5V
101.82ms
R SMRS T#
55.18ms 157. 83ms (RSMRST# to PWR _BTN#)
PW R_BT N# SUS C#
202.08ms 118ms 417.1us
1. 5V
123.76us
DD R1.5V _PWR GD
37.14us (SUSC# to SUSB#)
SUS B#
2.91ms
V TT_M EM
Sheet 43 of 43 Power Sequence
385.7us
1.5 VS
592.6us
3.3 VS
757.3us
5V S
1.216ms
1.05 VS
1.216ms
1 .05VS _PWR GD
4.133ms
1.8 VS
1.317ms
1.8VS _PWR GD
1.317ms
1. 05VS_ VTT_ EN
1.05 ms
1.05 VS_V TT
1.988ms
0.85 VS
2.816ms
0 .85VS _PWR GD
2.816ms
AL L_SYS _PWR GD
331.52ms
P M_PCH _PWR OK
333.44ms
PM _DRAM _PWR GD
333.44ms
V DDPWR GOOD _R
336.15ms
H_CP UPWR GD
722.9us
VCO RE
1.22ms
DELAY _PWR GD
1.22ms
SYS _PWR OK
1.896ms
PL T_RS T#
1.896ms
B UF_CP U_RS T#
B - 44 Power Sequence
BIOS Update
Appendix C:Updating the FLASH ROM BIOS

To update the FLASH ROM BIOS you must:
Download the BIOS update from the web site. Unzip the files onto a bootable CD/DVD/USB Flash Drive. Reboot your computer from an external CD/DVD/USB Flash Drive. Use the flash tools to update the flash BIOS using the commands indicated below. Restart the computer booting from the HDD and press F2 at startup enter the BIOS. Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer. After rebooting the computer you may restart the computer again and make any required changes to the default BIOS settings.
BIOS Version Make sure you download the latest correct version of the BIOS appropriate for the computer model you are working on. You should only download BIOS versions that are V1.01.XX or higher as appropriate for your computer model. Note that BIOS versions are not backward compatible and therefore you may not downgrade your BIOS to an older version after upgrading to a later version (e.g if you upgrade a BIOS to ver 1.01.05, you MAY NOT then go back and flash the BIOS to ver 1.01.04).
C:BIOS Update
Download the BIOS

1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. 2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files (the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model (see sidebar for important information on BIOS versions).
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive

1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the downloaded files. 2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).
Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the computer and press F2 (in most cases) to enter the BIOS. 2. Use the arrow keys to highlight the Boot menu. 3. Use the + and - keys to move boot devices up and down the priority order. 4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
C - 1
BIOS Update
Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you see the message Starting MS-DOS. You will then be prompted to give Y or N responses to the programs being loaded by DOS. Choose N for any memory management programs. 2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB flash drive). 3. Type the following command at the DOS prompt: C:\> Flash.bat 4. The utility will then proceed to flash the BIOS. 5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer restarts.
C:BIOS Update
Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from the HDD. 2. Press F2 as the computer restarts to enter the BIOS. 3. Use the arrow keys to highlight the Exit menu. 4. Select Load Setup Defaults (or press F9) and select Yes to confirm the selection. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.
C-2

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W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQ-C

Notebook Computer W250HU/W250HUQ/W251HUQ-C/W252HUM/W252HUM-C/ W255HU/W255HU-C/W255HUM/W255HUM-C/W258HUQ-C Service Manual

About this Manual

IMPORTANT SAFETY INSTRUCTIONS

This Computers Optical Device is a Laser Class 1 Product

Instructions for Care and Operation

Schematic Diagrams................................. B-1

Part Lists ..................................................A-1

Updating the FLASH ROM BIOS......... C-1

Intel HM65 Chipset

WLAN/ Bluetooth Half Mini-Card Modules:

15.6" (39.62cm) HD/HD+ TFT LCD

Mini Card Slots

Dimensions & Weight

External Locator - Top View with LCD Panel Open

1 - 4 External Locator - Top View with LCD Panel Open

External Locator - Front & Right Side Views

External Locator - Front & Right Side Views 1 - 5

External Locator - Left Side & Rear View

LEFT SIDE VIEW

1 - 6 External Locator - Left Side & Rear View

External Locator - Bottom View

External Locator - Bottom View 1 - 7

Mainboard Overview - Top (Key Parts)

1 - 8 Mainboard Overview - Top (Key Parts)

Mainboard Overview - Bottom (Key Parts)

Mainboard Overview - Bottom (Key Parts) 1 - 9

Mainboard Overview - Top (Connectors)

1 - 10 Mainboard Overview - Top (Connectors)

Mainboard Overview - Bottom (Connectors)

Mainboard Overview - Bottom (Connectors) 1 - 11

Pressure sockets for multi-wire connectors

Pressure sockets for ribbon connectors

Board-to-board or multi-pin sockets

To remove the Battery:

To remove the HDD:

To remove the Optical Device:

To remove the System Memory:

To remove and install a Processor:

To remove the Wireless LAN Module:

To remove the Keyboard:

Removing the Battery

Removing the Battery 2 - 5

Removing the Hard Disk Drive

Hard Disk Upgrade Process

2 - 6 Removing the Hard Disk Drive

Removing the Hard Disk Drive 2 - 7

Removing the Optical (CD/DVD) Device

2 - 8 Removing the Optical (CD/DVD) Device

Removing the System Memory (RAM)

Memory Upgrade Process

Removing the System Memory (RAM) 2 - 9

Removing and Installing a Processor

Removing and Installing a Processor 2 - 11

2 - 12 Removing and Installing a Processor

Processor Installation Procedure

Note: Tighten the screws in the order as indicated on the label.

A. CPU D. Heat Sink

Removing and Installing a Processor 2 - 13

Removing the Wireless LAN Module

4.Wireless LAN Module

2 - 14 Removing the Wireless LAN Module