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(Common to M.E. Communication Systems, M.E. Computer and Communication and M.E. VLSI Design) (Regulation 2009)
PART A (10 2 = 20 Marks) 1. Give out two reasons to state that design of embedded computing machine is difficult. What does the instruction LDR r0, [r1, # 4] in ARM processor do? Implement the statement given in SHARC processor Y = a + (b * c ) . What is boot-block flash?
2. 3. 4. 5. 6.
Differentiate between a CAN and I2C Bus. What requirements are to be considered for computation-intensive system design? What is scheduling policy? State its importance. What is meant by round robin approach? What skills might be useful in a cross functional team that is responsible for designing set-top-boxes? Give example for the requirements document to be (a) ambiguous (b) incomplete.
7. 8. 9.
10.
4
Maximum : 100 Marks
PART B (5 16 = 80 Marks) 11. (a) With the help of moving map explain how the various levels of design process is implemented. (16) Or (b) 12. (a)
x = 0; } else {
y = 0; d = e + f + g; } (ii)
4
Or
(b)
(i) (ii)
0
Or
1
2
Explain the structure and organisation of CAN Bus and I2C Bus. (10) With proper examples show how communication analysis is carried out in Network Based Systems. (6)
(ii)
(b)
(i)
Discuss in detail how an elevator controller is designed using distributed system. (10) Discuss the share link parts and Ethernet. (6)
(ii)
0
(16)
(6) (10) (6)
97607
14.
(a)
(i) (ii)
Explain the clock driven and priority driven approach. Compare line scheduling with offline scheduling. Or
(12) (4)
(b)
(i) (ii)
Explain the challenges present in designing a real time systems. (6) Describe the various models used in the design flow. Discuss the design of PDA. Or
15.
(a)
(i) (ii)
(b)
(i) (ii)
4
3
0
97607
0
(10) (9) (7) (12) (4)