Sunteți pe pagina 1din 2

IKU Electronic Engineering

EE 440 Logic Circuits I

EXPERIMENT7. BCD TO EXCESS-3 CODE CONVERTER AND ENCODER


OBJECTIVE:

Update 4: February 2010

Realization BCD to Excess-3 code converter and its verification. Realization of 8-3 encoder and its verification. Dont care functions.

PRELIMINARY WORK:
1.

2.
3.

4. 5.

Find the minimal AND/OR functions for BCD TO EXCESS 3 code converter of which Truth table given below. Find NAND only realization for the functions you have found in step 1. Compare your realizations (AND/OR, NAND) and below realization in terms of: Number of gates, number of IC, Fan in, Fan out, Delay. Draw a table for this comparison. Did you choose the same (k) values set for all functions realization? Why? Note that there are some common gates being used by output functions of the below given BCD/Excess 3 design. Determine which common gates are shared by which functions?

PROCEDURE A:

The truth table and a design of a BCD to Excess-3 code converter are given below. Realize this circuit on your board by using 7486 EXOR and 7400 NAND ICs which are already been installed on board. Connect four x1, x2, x3 and x4 inputs to the switches. Dont forget power and ground connections. Connect four functions outputs to LEDs. Verify input/output relation (Truth table) of this converter.

x1 0 0 0 0 0 0 0 0 1 1

x2 0 0 0 0 1 1 1 1 0 0

x3 0 0 1 1 0 0 1 1 0 0

x4 0 1 0 1 0 1 0 1 0 1

f1 0 0 0 0 0 1 1 1 1 1

f2 0 1 1 1 1 0 0 0 0 1

f3 1 0 0 1 1 0 0 1 1 0

f4 1 0 1 0 1 0 1 0 1 0

10-15

k Logic diagram of BCD to Excess-3 Code converter

BCD to Excess-3 Code converter Truth table

PROCEDURE B:

IKU Electronic Engineering

EE 440 Logic Circuits I

The truth table and a design of an 8 to 3 encoder are given below. Realize this circuit on your board by using two 7432 OR ICs which are already been installed. Connect eight g1, g2, g3, g4, g5, g6, g7, g8, inputs to the switches. Dont forget power and ground connections. Connect three functions outputs to LEDs. Verify input/output relation (Truth table) of this converter. g2 0 0 1 0 0 0 0 0 g3 0 0 0 1 0 0 0 0 g4 0 0 0 0 1 0 0 0 g5 0 0 0 0 0 1 0 0 g6 0 0 0 0 0 0 1 0 g7 0 0 0 0 0 0 0 1 0 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1

g0 1 0 0 0 0 0 0 0

g1 0 1 0 0 0 0 0 0

3-8 Encoder truth Table

Logic diagram for 8-3 Encoder

QUESTIONS
1.

2. 3. 4.

5. 6.

In the above realization, it has been used two two-input OR gates for a four-input OR gate. Which property of the Boolean algebra gives such opportunity? Could you use the same property for NAND operation? Why? Although 4-input OR gate is not available in the market, 4-input NAND gate, two of them in one IC, is available. Design 8-3 Encoder by using 4-input NAND gates. Compare these two designs. Is there any common gate shared by more than one functions in this encoder realization? If so what benefit you observed? Is it worth considering OR-AND or AND-OR form realizations? Explain why? What would be the output values for those input values which are not shown in the above given truth table? Explain why? Are the encoder output functions dont care functions? If so How many dont care input values are there? What are they?

Components list: (Data sheets are on course WEB site) (1) 7486 EXOR IC (1) 7400 NAND IC (2) 7432 OR IC Last Update: 8 May 2008

S-ar putea să vă placă și