Optix OSN

OptiX OSN 550 Multi-Service CPE Optical Transmission System V100R005C01
Hardware Description
Issue Date 01 2011-06-30
HUAWEI TECHNOLOGIES CO., LTD.
Copyright Huawei Technologies Co., Ltd. 2011. All rights reserved.

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Huawei Technologies Co., Ltd.

Address: Huawei Industrial Base Bantian, Longgang Shenzhen 518129 People's Republic of China Website: Email: http://www.huawei.com support@huawei.com
Issue 01 (2011-06-30)
Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.
OptiX OSN 550 Multi-Service CPE Optical Transmission System Hardware Description
About This Document
About This Document

Product Version
The following table lists the product versions applicable to this documentation. Product Name OptiX OSN 550 iManager U2000 Product Version V100R005C01 V100R005
Intended Audience
This document describes the OptiX OSN 550 in terms of hardware architecture, boards, cables. This document is intended for the following engineers:

Network planning engineers Hardware installers
Symbol Conventions
The symbols that may be found in this document are defined as follows. Symbol Description Indicates a hazard with a high level of risk, which if not avoided, will result in death or serious injury. Indicates a hazard with a medium or low level of risk, which if not avoided, could result in minor or moderate injury. Indicates a potentially hazardous situation, which if not avoided, could result in equipment damage, data loss, performance degradation, or unexpected results.
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About This Document
Symbol
Description Indicates a tip that may help you solve a problem or save time. Provides additional information to emphasize or supplement important points of the main text.
GUI Conventions
Convention Boldface > Meaning Buttons, menus, parameters, tabs, window, and dialog titles are in boldface. For example, click OK. Multi-level menus are in boldface and separated by the ">" signs. For example, choose File > Create > Folder.
Change History
Updates between document issues are cumulative. Therefore, the latest document issue contains all updates made in previous issues.
Updates in Issue 01 (2011-06-30)

Initial formal release.
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Contents
Contents
1 Chassis.........................................................................................1 2 Boards and Their Appearances.......................................................5
2.1 Board List.................................................................................................................................................................5 2.1 Board List.................................................................................................................................................................5 2.2 Board Appearance...................................................................................................................................................10 2.2 Board Appearance...................................................................................................................................................10
3 System Control, Switching, and Timing Boards..............................13

3.1 PCX........................................................................................................................................................................13 3.1 PCX........................................................................................................................................................................13 3.1.1 Version Description..........................................................................................................................................14 3.1.1 Version Description..........................................................................................................................................14 3.1.2 Functions and Features.....................................................................................................................................14 3.1.2 Functions and Features.....................................................................................................................................14 3.1.3 Working Principle and Signal Flow..................................................................................................................19 3.1.3 Working Principle and Signal Flow..................................................................................................................19 3.1.4 Front Panel........................................................................................................................................................22 3.1.4 Front Panel........................................................................................................................................................22 3.1.5 DIP Switches and CF Card...............................................................................................................................25 3.1.5 DIP Switches and CF Card...............................................................................................................................25 3.1.6 Valid Slots.........................................................................................................................................................27 3.1.6 Valid Slots.........................................................................................................................................................27 3.1.7 Feature Code.....................................................................................................................................................28 3.1.7 Feature Code.....................................................................................................................................................28 3.1.8 Technical Specifications...................................................................................................................................29 3.1.8 Technical Specifications...................................................................................................................................29
4 Packet Processing Boards............................................................34

4.1 EF8F.......................................................................................................................................................................34 4.1 EF8F.......................................................................................................................................................................34 4.1.1 Version Description..........................................................................................................................................34 4.1.1 Version Description..........................................................................................................................................34 4.1.2 Functions and Features.....................................................................................................................................35 Issue 01 (2011-06-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. iv
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4.1.2 Functions and Features.....................................................................................................................................35 4.1.3 Working Principle and Signal Flow..................................................................................................................38 4.1.3 Working Principle and Signal Flow..................................................................................................................38 4.1.4 Front Panel........................................................................................................................................................41 4.1.4 Front Panel........................................................................................................................................................41 4.1.5 DIP Switches and Jumpers...............................................................................................................................41 4.1.5 DIP Switches and Jumpers...............................................................................................................................41 4.1.6 Valid Slots.........................................................................................................................................................41 4.1.6 Valid Slots.........................................................................................................................................................41 4.1.7 Feature Code.....................................................................................................................................................42 4.1.7 Feature Code.....................................................................................................................................................42 4.1.8 Technical Specifications...................................................................................................................................42 4.1.8 Technical Specifications...................................................................................................................................42 4.2 EM6T/EM6F..........................................................................................................................................................43 4.2 EM6T/EM6F..........................................................................................................................................................43 4.2.1 Version Description..........................................................................................................................................43 4.2.1 Version Description..........................................................................................................................................43 4.2.2 Functions and Features.....................................................................................................................................43 4.2.2 Functions and Features.....................................................................................................................................43 4.2.3 Working Principle and Signal Flow..................................................................................................................48 4.2.3 Working Principle and Signal Flow..................................................................................................................48 4.2.4 Front Panel........................................................................................................................................................51 4.2.4 Front Panel........................................................................................................................................................51 4.2.5 DIP Switches and Jumpers...............................................................................................................................54 4.2.5 DIP Switches and Jumpers...............................................................................................................................54 4.2.6 Valid Slots.........................................................................................................................................................54 4.2.6 Valid Slots.........................................................................................................................................................54 4.2.7 Feature Code.....................................................................................................................................................54 4.2.7 Feature Code.....................................................................................................................................................54 4.2.8 Technical Specifications...................................................................................................................................54 4.2.8 Technical Specifications...................................................................................................................................54 4.3 MD1........................................................................................................................................................................55 4.3 MD1........................................................................................................................................................................55 4.3.1 Version Description..........................................................................................................................................56 4.3.1 Version Description..........................................................................................................................................56 4.3.2 Functions and Features.....................................................................................................................................56 4.3.2 Functions and Features.....................................................................................................................................56 4.3.3 Working Principle and Signal Flow..................................................................................................................58 4.3.3 Working Principle and Signal Flow..................................................................................................................58 4.3.4 Front Panel........................................................................................................................................................60 4.3.4 Front Panel........................................................................................................................................................60 4.3.5 DIP Switches and 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4.3.5 DIP Switches and Jumpers...............................................................................................................................63 4.3.6 Valid Slots.........................................................................................................................................................63 4.3.6 Valid Slots.........................................................................................................................................................63 4.3.7 Feature Code.....................................................................................................................................................63 4.3.7 Feature Code.....................................................................................................................................................63 4.3.8 Technical Specifications...................................................................................................................................63 4.3.8 Technical Specifications...................................................................................................................................63
5 SDH Boards.................................................................................65
5.1 SL1D.......................................................................................................................................................................65 5.1 SL1D.......................................................................................................................................................................65 5.1.1 Version Description..........................................................................................................................................66 5.1.1 Version Description..........................................................................................................................................66 5.1.2 Functions and Features.....................................................................................................................................66 5.1.2 Functions and Features.....................................................................................................................................66 5.1.3 Working Principle and Signal Flow..................................................................................................................67 5.1.3 Working Principle and Signal Flow..................................................................................................................67 5.1.4 Front Panel........................................................................................................................................................69 5.1.4 Front Panel........................................................................................................................................................69 5.1.5 DIP Switches and Jumpers...............................................................................................................................70 5.1.5 DIP Switches and Jumpers...............................................................................................................................70 5.1.6 Valid Slots.........................................................................................................................................................70 5.1.6 Valid Slots.........................................................................................................................................................70 5.1.7 Feature Code.....................................................................................................................................................70 5.1.7 Feature Code.....................................................................................................................................................70 5.1.8 Technical Specifications...................................................................................................................................70 5.1.8 Technical Specifications...................................................................................................................................70 5.2 SL1Q.......................................................................................................................................................................71 5.2 SL1Q.......................................................................................................................................................................71 5.2.1 Version Description..........................................................................................................................................72 5.2.1 Version Description..........................................................................................................................................72 5.2.2 Functions and Features.....................................................................................................................................72 5.2.2 Functions and Features.....................................................................................................................................72 5.2.3 Working Principle and Signal Flow..................................................................................................................73 5.2.3 Working Principle and Signal Flow..................................................................................................................73 5.2.4 Front Panel........................................................................................................................................................76 5.2.4 Front Panel........................................................................................................................................................76 5.2.5 DIP Switches and Jumpers...............................................................................................................................77 5.2.5 DIP Switches and Jumpers...............................................................................................................................77 5.2.6 Valid Slots.........................................................................................................................................................77 5.2.6 Valid Slots.........................................................................................................................................................77 5.2.7 Feature Code.....................................................................................................................................................77 Issue 01 (2011-06-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. vi
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5.2.7 Feature Code.....................................................................................................................................................77 5.2.8 Technical Specifications...................................................................................................................................77 5.2.8 Technical Specifications...................................................................................................................................77 5.3 SL4D.......................................................................................................................................................................79 5.3 SL4D.......................................................................................................................................................................79 5.3.1 Version Description..........................................................................................................................................79 5.3.1 Version Description..........................................................................................................................................79 5.3.2 Functions and Features.....................................................................................................................................80 5.3.2 Functions and Features.....................................................................................................................................80 5.3.3 Working Principle and Signal Flow..................................................................................................................81 5.3.3 Working Principle and Signal Flow..................................................................................................................81 5.3.4 Front Panel........................................................................................................................................................83 5.3.4 Front Panel........................................................................................................................................................83 5.3.5 DIP Switches and Jumpers...............................................................................................................................84 5.3.5 DIP Switches and Jumpers...............................................................................................................................84 5.3.6 Valid Slots.........................................................................................................................................................84 5.3.6 Valid Slots.........................................................................................................................................................84 5.3.7 Feature Code.....................................................................................................................................................84 5.3.7 Feature Code.....................................................................................................................................................84 5.3.8 Technical Specifications...................................................................................................................................84 5.3.8 Technical Specifications...................................................................................................................................84
6 PDH Boards................................................................................86
6.1 SP3D.......................................................................................................................................................................86 6.1 SP3D.......................................................................................................................................................................86 6.1.1 Version Description..........................................................................................................................................86 6.1.1 Version Description..........................................................................................................................................86 6.1.2 Functions and Features.....................................................................................................................................87 6.1.2 Functions and Features.....................................................................................................................................87 6.1.3 Working Principle and Signal Flow..................................................................................................................87 6.1.3 Working Principle and Signal Flow..................................................................................................................87 6.1.4 Front Panel........................................................................................................................................................90 6.1.4 Front Panel........................................................................................................................................................90 6.1.5 DIP Switches and Jumpers...............................................................................................................................92 6.1.5 DIP Switches and Jumpers...............................................................................................................................92 6.1.6 Valid Slots.........................................................................................................................................................92 6.1.6 Valid Slots.........................................................................................................................................................92 6.1.7 Feature Code.....................................................................................................................................................92 6.1.7 Feature Code.....................................................................................................................................................92 6.1.8 Technical Specifications...................................................................................................................................93 6.1.8 Technical Specifications...................................................................................................................................93 6.2 PL3T.......................................................................................................................................................................94 Issue 01 (2011-06-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. vii
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6.2 PL3T.......................................................................................................................................................................94 6.2.1 Version Description..........................................................................................................................................94 6.2.1 Version Description..........................................................................................................................................94 6.2.2 Functions and Features.....................................................................................................................................95 6.2.2 Functions and Features.....................................................................................................................................95 6.2.3 Working Principle and Signal Flow..................................................................................................................95 6.2.3 Working Principle and Signal Flow..................................................................................................................95 6.2.4 Front Panel........................................................................................................................................................97 6.2.4 Front Panel........................................................................................................................................................97 6.2.5 DIP Switches and Jumpers...............................................................................................................................98 6.2.5 DIP Switches and Jumpers...............................................................................................................................98 6.2.6 Valid Slots.........................................................................................................................................................98 6.2.6 Valid Slots.........................................................................................................................................................98 6.2.7 Feature Code.....................................................................................................................................................98 6.2.7 Feature Code.....................................................................................................................................................98 6.2.8 Technical Specifications...................................................................................................................................98 6.2.8 Technical Specifications...................................................................................................................................98
7 Auxiliary Boards........................................................................100
7.1 AUX......................................................................................................................................................................100 7.1 AUX......................................................................................................................................................................100 7.1.1 Version Description........................................................................................................................................101 7.1.1 Version Description........................................................................................................................................101 7.1.2 Functions and Features...................................................................................................................................101 7.1.2 Functions and Features...................................................................................................................................101 7.1.3 Working Principle and Signal Flow................................................................................................................101 7.1.3 Working Principle and Signal Flow................................................................................................................101 7.1.4 Front Panel......................................................................................................................................................103 7.1.4 Front Panel......................................................................................................................................................103 7.1.5 DIP Switches and Jumpers.............................................................................................................................106 7.1.5 DIP Switches and Jumpers.............................................................................................................................106 7.1.6 Valid Slots.......................................................................................................................................................106 7.1.6 Valid Slots.......................................................................................................................................................106 7.1.7 Feature Code...................................................................................................................................................106 7.1.7 Feature Code...................................................................................................................................................106 7.1.8 Technical Specifications.................................................................................................................................106 7.1.8 Technical Specifications.................................................................................................................................106 7.2 FAN.......................................................................................................................................................................107 7.2 FAN.......................................................................................................................................................................107 7.2.1 Version Description........................................................................................................................................108 7.2.1 Version Description........................................................................................................................................108 7.2.2 Functions and Features...................................................................................................................................108 Issue 01 (2011-06-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. viii
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7.2.2 Functions and Features...................................................................................................................................108 7.2.3 Working Principle and Signal Flow................................................................................................................109 7.2.3 Working Principle and Signal Flow................................................................................................................109 7.2.4 Front Panel......................................................................................................................................................110 7.2.4 Front Panel......................................................................................................................................................110 7.2.5 Valid Slots.......................................................................................................................................................111 7.2.5 Valid Slots.......................................................................................................................................................111 7.2.6 Technical Specifications.................................................................................................................................111 7.2.6 Technical Specifications.................................................................................................................................111
8 Power Boards............................................................................113
8.1 PIU........................................................................................................................................................................113 8.1 PIU........................................................................................................................................................................113 8.1.1 Version Description.........................................................................................................................................113 8.1.1 Version Description.........................................................................................................................................113 8.1.2 Functions and Features...................................................................................................................................113 8.1.2 Functions and Features...................................................................................................................................113 8.1.3 Working Principle and Signal Flow................................................................................................................114 8.1.3 Working Principle and Signal Flow................................................................................................................114 8.1.4 Front Panel......................................................................................................................................................116 8.1.4 Front Panel......................................................................................................................................................116 8.1.5 Valid Slots.......................................................................................................................................................117 8.1.5 Valid Slots.......................................................................................................................................................117 8.1.6 Technical Specifications.................................................................................................................................117 8.1.6 Technical Specifications.................................................................................................................................117 8.2 APIU.....................................................................................................................................................................117 8.2 APIU.....................................................................................................................................................................117 8.2.1 Version Description.........................................................................................................................................118 8.2.1 Version Description.........................................................................................................................................118 8.2.2 Functions and Features...................................................................................................................................118 8.2.2 Functions and Features...................................................................................................................................118 8.2.3 Working Principle and Signal Flow................................................................................................................119 8.2.3 Working Principle and Signal Flow................................................................................................................119 8.2.4 Front Panel......................................................................................................................................................119 8.2.4 Front Panel......................................................................................................................................................119 8.2.5 Valid Slots.......................................................................................................................................................120 8.2.5 Valid Slots.......................................................................................................................................................120 8.2.6 Technical Specifications.................................................................................................................................120 8.2.6 Technical Specifications.................................................................................................................................120
9 Filler Panel................................................................................122
9.1 Functions..............................................................................................................................................................122 9.1 Functions..............................................................................................................................................................122 Issue 01 (2011-06-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. ix
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9.2 Appearance and Valid Slots..................................................................................................................................122 9.2 Appearance and Valid Slots..................................................................................................................................122
10 Pluggable Optical Modules.......................................................124

10.1 Overview............................................................................................................................................................124 10.1 Overview............................................................................................................................................................124 10.2 SFP/eSFP Optical Modules................................................................................................................................125 10.2 SFP/eSFP Optical Modules................................................................................................................................125 10.3 XFP Optical Modules.........................................................................................................................................128 10.3 XFP Optical Modules.........................................................................................................................................128
11 Cables.....................................................................................129
11.1 Fiber Jumper.......................................................................................................................................................129 11.1 Fiber Jumper.......................................................................................................................................................129 11.2 DC Power Cable.................................................................................................................................................130 11.2 DC Power Cable.................................................................................................................................................130 11.3 AC Power Cable..................................................................................................................................................131 11.3 AC Power Cable..................................................................................................................................................131 11.4 PGND Cable.......................................................................................................................................................132 11.4 PGND Cable.......................................................................................................................................................132 11.5 E1/T1 Cable........................................................................................................................................................132 11.5 E1/T1 Cable........................................................................................................................................................132 11.6 E3/T3 Cable........................................................................................................................................................137 11.6 E3/T3 Cable........................................................................................................................................................137 11.7 Network Cable....................................................................................................................................................138 11.7 Network Cable....................................................................................................................................................138
12 Parameter Settings..................................................................142 Figure 1.1Glossary and Acronyms.................................................143

Table 1.1Numerics......................................................................................................................................................144 Table 1.1Numerics......................................................................................................................................................144 Table 1.2A...................................................................................................................................................................144 Table 1.2A...................................................................................................................................................................144 Table 1.3B...................................................................................................................................................................147 Table 1.3B...................................................................................................................................................................147 Table 1.4C...................................................................................................................................................................148 Table 1.4C...................................................................................................................................................................148 Table 1.5D...................................................................................................................................................................151 Table 1.5D...................................................................................................................................................................151 Table 1.6E...................................................................................................................................................................153 Table 1.6E...................................................................................................................................................................153 Table 1.7F...................................................................................................................................................................155 Table 1.7F...................................................................................................................................................................155 Issue 01 (2011-06-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. x
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Table 1.8G...................................................................................................................................................................157 Table 1.8G...................................................................................................................................................................157 Table 1.9H...................................................................................................................................................................158 Table 1.9H...................................................................................................................................................................158 Table 1.10I..................................................................................................................................................................159 Table 1.10I..................................................................................................................................................................159 Table 1.11J..................................................................................................................................................................160 Table 1.11J..................................................................................................................................................................160 Table 1.12L.................................................................................................................................................................160 Table 1.12L.................................................................................................................................................................160 Table 1.13M................................................................................................................................................................162 Table 1.13M................................................................................................................................................................162 Table 1.14N.................................................................................................................................................................164 Table 1.14N.................................................................................................................................................................164 Table 1.15O.................................................................................................................................................................165 Table 1.15O.................................................................................................................................................................165 Table 1.16P.................................................................................................................................................................166 Table 1.16P.................................................................................................................................................................166 Table 1.17Q.................................................................................................................................................................169 Table 1.17Q.................................................................................................................................................................169 Table 1.18R.................................................................................................................................................................169 Table 1.18R.................................................................................................................................................................169 Table 1.19S.................................................................................................................................................................170 Table 1.19S.................................................................................................................................................................170 Table 1.20T.................................................................................................................................................................174 Table 1.20T.................................................................................................................................................................174 Table 1.21U.................................................................................................................................................................176 Table 1.21U.................................................................................................................................................................176 Table 1.22V.................................................................................................................................................................176 Table 1.22V.................................................................................................................................................................176 Table 1.23W................................................................................................................................................................177 Table 1.23W................................................................................................................................................................177
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Figures
Figures
Slot layout in an OptiX OSN 550 NE...................................................5 Bar code........................................................................................12 Functional block diagram of the PCX...............................................20 Functional block diagram of the cross-connect unit..........................21 Logical slots for a PCX board..........................................................28 Front panel of the EF8F..................................................................41 Functional block diagram of the EM6T/EM6F....................................49 Front panel of the EM6T.................................................................51 Front panel of the EM6F.................................................................51 Functional block diagram of the MD1..............................................58 Front panel of the MD1...................................................................60 Functional block diagram of the SL1D.............................................67 Front panel of the SL1D..................................................................69 Functional block diagram of the SL1Q.............................................74 Front panel of the SL1Q..................................................................76 Functional block diagram of the SL4D.............................................81 Front panel of the SL4D..................................................................83 Functional block diagram of the SP3D.............................................88 Front panel of the SP3D.................................................................90 Functional block diagram of the PL3T..............................................96 Front panel of the PL3T..................................................................98 Functional block diagram of the AUX.............................................102 Functional block diagram of the FAN.............................................109 Front panel of the FAN..................................................................111
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Figures
Functional block diagram of the PIU..............................................115 Front panel of the PIU..................................................................116 Functional block diagram of the APIU............................................119 Front panel of the APIU................................................................120 Filler panel for the PCX and extended boards................................122 Filler panel for the PIU.................................................................123 Filler panel for the APIU...............................................................123 SFP/eSFP optical module..............................................................124 XFP optical module......................................................................125 Label for a pluggable optical module.............................................125 LC/PC connector...........................................................................130 FC/PC connector...........................................................................130 DC power cable............................................................................131 AC power cable............................................................................131 PGND cable..................................................................................132 75-ohm/120-ohm E1/T1 cable........................................................133 Structure of an E3/T3 cable...........................................................137 Straight-through cable.................................................................140 Crossover cable...........................................................................140
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Tables
Tables
Description of labels........................................................................3 Technical specifications of an OptiX OSN 550 chassis.........................4 Boards that the OptiX OSN 550 supports...........................................5 Appearances and dimensions of the boards that the OptiX OSN 550 supports........................................................................................10 Differences between the five types of PCX finished boards...............14 Functions and features that the PCX supports.................................15 Front panel of each PCX finished board...........................................23 Description of the clock ports, auxiliary ports, and management ports .....................................................................................................23 Status explanation for indicators on an Ethernet port......................24 Description of the service ports on the PCX.....................................24 Buttons.........................................................................................25 Mapping between manufactured boards and their logical boards......28 Feature code of the PCX.................................................................28 Technical Specifications of the PCX.................................................29 Specifications of 10GE optical ports of the OptiX OSN 550................30 Specifications of OptiX OSN 550's GE optical ports...........................30 Specifications of OptiX OSN 550's STM-1 optical ports......................31 Specifications of OptiX OSN 550's STM-4 optical ports......................31 Specifications of OptiX OSN 550's STM-16 optical ports....................32 Functions and features that the EF8F supports................................35 Signal processing in the receive direction of the EF8F......................39 Signal processing in the transmit direction of the EF8F....................40
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Tables
Technical Specifications of the EF8F................................................42 Specifications of FE optical ports of the OptiX OSN 550....................42 Functions and features that the EM6T/EM6F supports......................44 Signal processing in the receive direction of the EM6T/EM6F............49 Signal processing in the transmit direction of the EM6T/EM6F..........50 Status explanation for indicators on an Ethernet port......................52 Pin assignments for an RJ-45 port in MDI mode................................52 Pin assignments for an RJ-45 port in MDI-X mode.............................53 Technical specifications of the EM6T/EM6F......................................54 Specifications of OptiX OSN 550's Ethernet electrical ports..............55 Specifications of OptiX OSN 550's GE optical ports...........................55 Functions and features that the MD1 supports................................56 Signal processing in the receive direction of the MD1......................59 Signal processing in the transmit direction of the MD1.....................59 Pin assignments for an Anea 96 port...............................................61 Feature code of the MD1................................................................63 Specifications of OptiX OSN 550's CES/ATM/IMA service electrical ports .....................................................................................................64 Functions and features that the SL1D supports................................66 Signal processing in the receive direction of the SL1D.....................67 Signal processing in the transmit direction of the SL1D....................68 Feature code of the SL1D...............................................................70 Technical specifications of the SL1D................................................70 Specifications of OptiX OSN 550's STM-1 optical ports......................71 Functions and features that the SL1Q supports...............................72 Signal processing in the receive direction of the SL1Q.....................74 Signal processing in the transmit direction of the SL1Q....................75 Feature code of the SL1Q...............................................................77 Technical specifications of the SL1Q................................................78 Specifications of OptiX OSN 550's STM-1 optical ports......................78 Functions and features that the SL4D supports................................80
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Tables
Signal processing in the receive direction of the SL4D.....................82 Signal processing in the transmit direction of the SL4D....................82 Feature code of the SL4D...............................................................84 Technical specifications of the SL4D................................................84 Specifications of OptiX OSN 550's STM-4 optical ports......................85 Functions and features that the SP3D supports...............................87 Signal processing in the receive direction of the SP3D.....................88 Signal processing in the transmit direction of the SP3D...................89 Pin assignments for an Anea 96 port...............................................91 Feature code of the SP3D...............................................................93 Technical specifications of the SP3D................................................93 Specifications of OptiX OSN 550's E1/T1 electrical ports...................93 Functions and features that the PL3T supports................................95 Signal processing in the receive direction of the PL3T......................96 Signal processing in the transmit direction of the PL3T....................97 Electrical ports of the PL3T.............................................................98 Technical specifications of the PL3T................................................99 Specifications of OptiX OSN 550's E3/T3 electrical ports...................99 Functions and features that the AUX supports...............................101 Description of the ports on the AUX..............................................103 Status explanation for indicators on an Ethernet port....................105 Technical specifications of the AUX...............................................106 Specifications of synchronous data ports supported by the OptiX OSN 550.............................................................................................107 Specifications of asynchronous data ports supported by the OptiX OSN 550.............................................................................................107 Specifications of orderwire ports supported by the OptiX OSN 550. 107 Outdoor cabinet monitoring ports supported by the OptiX OSN 550 107 Functions and features that the FAN supports................................108 Adjustment of the fan rotating speed............................................110 Technical specifications of the FAN................................................112
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Tables
Functions and features that the PIU supports................................114 Description of the ports on the PIU...............................................116 Technical specifications of the PIU.................................................117 Functions and features that the APIU supports..............................118 Description of the ports on the APIU.............................................120 Slots valid for a filler panel...........................................................123 SFP/eSFP Optical Modules That the OptiX OSN 550 Supports..........126 XFP Optical Modules That the OptiX OSN 550 Supports..................128 Types of fiber jumpers..................................................................129 Power cable specifications............................................................131 Pin assignments for a 75-ohm 21xE1/T1 cable................................133 Pin assignments for a 120-ohm 21xE1/T1 cable..............................134 Technical specifications for E1/T1 cables used on the OptiX OSN 550 ...................................................................................................136 Pin assignments for an RJ-45 port in MDI mode..............................138 Pin assignments for an RJ-45 port in MDI-X mode...........................139 Pin assignments for a straight-through cable.................................140 Pin assignments for a crossover cable...........................................141 References for parameter settings on boards that the OptiX OSN 550 supports......................................................................................142
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1 Chassis
1
Chassis Structure
Chassis
The OptiX OSN 550 is a 2U chassis. It can be deployed in a variety of scenarios and on several different types of cabinets and surfaces.
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Chassis Structure and Board Installation Area
H D W
Board installation area
SLOT SLOT 10 91 SLOT (PIU) (PIU) SLOT 11 93 SLOT (FAN) SLOT (FAN) 9 92 (PIU) (PIU)
SLOT 7 (CST/CSH) SLOT 7 (PCX) SLOT 5 (EXT) SLOT 5 (EXT) SLOT 3 (EXT) SLOT 3 (EXT) SLOT 1 (EXT ) SLOT 1 (EXT)
SLOT SLOT 88(CST/CSH) (PCX) SLOT 6 (EXT) SLOT 6 (EXT) SLOT 4 (EXT) SLOT 4 (EXT) SLOT 2 (EXT) SLOT 2 (EXT )
2 3
1 Power supply boards 2 Fan board
3 4
Extended boards System control, switching, and timing boards
Installation Mode
The equipment can be deployed in a variety of scenarios and on several different types of cabinets and surfaces.

Cabinet-mounting (ETSI cabinet and 19-inch cabinet) Wall-mounting Desk-mounting Cabinet-mounting (outdoor cabinets)
Description of Labels
Table 1-1 lists the description of the labels on the chassis and the boards in the chassis. The actual labels may be different depending on the configurations of the chassis and boards.
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Figure 1.1 Description of labels Label Label Name ESD protection label Description Indicates that the equipment is sensitive to static electricity. Indicates the grounding position of the chassis. Indicates that the fan leaves cannot be touched when the fan is rotating. Indicates that you must read the operation instructions before connecting a power cable. Indicates that the equipment is qualified.
Grounding label
Fan warning label
Power port warning label
/ QUALIFICATION CARD
Qualification card
HUAWEI
HUAW EI TECHNOLOGIES CO.,LTD.
MADE IN CHINA
RoHS label
50
Product nameplate label
Indicates that the equipment contains certain hazardous substances specified in RoHS. The equipment needs to be recycled after the environmentfriendly use period of 50 years expires. Indicates the product name and certification.
DC power
AC power
Technical Specifications
Table 1-2 lists the technical specifications of an OptiX OSN 550 chassis.
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1 Chassis
Figure 1.2 Technical specifications of an OptiX OSN 550 chassis Item Dimensions (H x W x D) Weight (empty chassis with a backplane) Power consumption Performance 88 mm x 442 mm x 220 mm (H x W x D) 2.80 kg

Maximum power consumption: 240 W Typical power consumption: 142 W
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2 Boards and Their Appearances
2
Slot Layout
Boards and Their Appearances
2.1 Board List

This section describes the boards that the equipment supports. The equipment provides various functions with different boards inserted.
Figure 2-1 shows the slot layout in an OptiX OSN 550 NE. Figure 1.1 Slot layout in an OptiX OSN 550 NE
Slot SLOT 91 10 Slot (PIU) SLOT (PIU) 93 11 SLOT (FAN) Slot 9 92 (PIU) SLOT 7 (CST/CSH) Slot 7 (PCX) SLOT 5 5 (EXT) Slot (EXT) SLOT 3 3 (EXT) Slot (EXT) SLOT 1 (EXT) Slot 1 (EXT) SLOT 8 (PCX) Slot (CST/CSH) Slot 6 (EXT) SLOT 6(EXT) SLOT4 (EXT) Slot 4 (EXT) SLOT22(EXT) Slot (EXT)
Board List
Table 2-1 lists the boards that the OptiX OSN 550 supports. Figure 1.3 Boards that the OptiX OSN 550 supports Board Classi ficati on System control, switchin g, and timing Boar d Acro nym TNM1 PCXL X Boar d Nam e Crossconnec t, timing and line Function Service Type Port Type Valid Slot
Supports the 60 Gbit/s packet switching function.
Native Ethernet services Point-to-point transparently transmitted E-Line
One Ethernet NM port/NM serial port (sharing one RJ45 port) One STM-1/STM-
Slots 7 and 8
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Board Classi ficati on board
Boar d Acro nym
Boar d Nam e board
Function
Service Type
Port Type
Valid Slot
Supports the 20 Gbit/s higher order cross-connect capacity, 5 Gbit/s lower order crossconnect capacity. Performs system communicati on and control.
service
VLAN-based E-Line service QinQ-based E-Line service
4/STM-16 SFP optical port. The optical port type can be S-1.1, L-1.1, S4.1, L-4.1, S-16.1, L16.1, or L-16.2. One 10GE (XFP) optical port 10GBASE-LR (LAN)/10GBASELW (WAN)/10GBASEER (LAN)/10GBASEEW (WAN)/10GBASEZR (LAN)/10GBASEZW (WAN) One Ethernet NM port/NM serial port (sharing one RJ45 port) One 10GE (XFP) optical port 10GBASE-LR (LAN)/10GBASELW (WAN)/10GBASEER (LAN)/10GBASEEW (WAN)/10GBASEZR (LAN)/10GBASEZW (WAN) Slots 7 and 8
E-LAN service based on IEEE 802.1d bridges E-LAN service based on IEEE 802.1q bridges E-LAN service based on IEEE 802.1ad bridges

ETH PWE3 services STM-1/STM-4/STM16 services
TNM1 PCXX
Crossconnec t, timing, system control , and line board
Supports the 60 Gbit/s packet switching function. Supports the 20 Gbit/s higher order cross-connect capacity, 5 Gbit/s lower order crossconnect capacity. Performs system communicati on and control. Supports the 40 Gbit/s packet switching function. Supports the 20 Gbit/s higher order cross-connect
Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service
ETH PWE3 services Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service
TNM1 PCXL G
One Ethernet NM port/NM serial port (sharing one RJ45 port) One STM-1/STM4/STM-16 SFP optical port. The optical port type can be S-1.1, L-1.1, S-
Slots 7 and 8
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Board Classi ficati on
Boar d Acro nym
Boar d Nam e
Function
Service Type
Port Type
Valid Slot
capacity, 5 Gbit/s lower order crossconnect capacity. Performs system communication and control.
QinQ-based E-Line service
4.1, L-4.1, S-16.1, L16.1, or L-16.2. One GE (SFP) optical port 1000BASELX/VX/ZX
E-LAN service based on IEEE 802.1d bridges E-LAN service based on IEEE 802.1q bridges E-LAN service based on IEEE 802.1ad bridges ETH PWE3 services
STM-1/STM-4/STM16 services Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service
TNM1 PCXG A
Supports the 40 Gbit/s packet switching function. Supports the 20 Gbit/s higher order cross-connect capacity, 5 Gbit/s lower order crossconnect capacity. Performs system communicati on and control. Supports the 20 Gbit/s packet switching function. Supports the 20 Gbit/s higher order cross-connect capacity, 5 Gbit/s lower order crossconnect capacity. Performs
One Ethernet NM port/NM serial port (sharing one RJ45 port) One GE (SFP) optical port 1000BASELX/VX/ZX
Slots 7 and 8
ETH PWE3 services Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service
TNM1 PCXG B
One Ethernet NM port/NM serial port (sharing one RJ45 port) One GE (SFP) optical port 1000BASELX/VX/ZX
Slots 7 and 8
E-LAN service based on IEEE 802.1d bridges E-LAN service based on IEEE 802.1q bridges
7
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Boar d Acro nym
Boar d Nam e
Function
Service Type
Port Type
Valid Slot
system communicati on and control. Packet processi ng board TNM1 MD1 32xSm art E1 service process ing board 6xRJ4 5 FE/GE process ing board Transmits/Rece ives E1 signals.
E-LAN service based on IEEE 802.1ad bridges
ETH PWE3 services 75/120-ohm E1 port Slots 1 to 6
CES E1 ATM/IMA E1
TNM1 EM6T
Transmits/Rece ives FE/GE service signals and works with the packet switching unit to process the received FE/GE service signals.
Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service
Four FE electrical ports: 10/100BASETX Two GE electrical ports (compatible with FE electrical ports): 10/100/1000BASETX Four FE electrical ports: 10/100BASETX Provides two ports through the SFP module. The types of SFP module include 1000BASELX/VX/ZX.
Slots 1 to 6
TNM1 EM6F
4xRJ4 5 and 2xSFP FE/GE process ing board

Slots 1 to 6
ETH PWE3 services Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service
TNM1 EF8F
8xFE Ethern et process ing board
Transmits/Rece ives FE service signals and works with the packet switching unit to process the received FE service signals.
8xFE optical port: 100BASE-FX
Slots 1 to 6
Boar d Acro nym
Boar d Nam e
Function
Service Type
Port Type
Valid Slot
ETH PWE3 services 2xSTM-1 optical ports Slots 1 to 6
SDH board
TNH2 SL1D
2xST M-1 interfa ce board 2xST M-4 interfa ce board 4xST M-1 interfa ce board 42xE1/ T1 tributar y board 3xE3/T 3 tributar y board Auxilia ry interfa ce board
Transmits/Re ceives 2xSTM-1 optical signals. Transmits/Re ceives 2xSTM-4 optical signals.
STM-1 service
TNH2 SL4D
STM-4 service
2xSTM-4 optical ports
Slots 1 and 6
TNH2 SL1Q
Transmits/Rece ives 4xSTM-1 optical signals.
STM-1 service
4xSTM-1 optical ports
Slots 1 to 6
PDH board
TNH2 SP3D
Transmits/Rece ives E1/T1 signals. Transmits/Rece ives E3/T3 signals. Provides the system with one orderwire phone port, one synchronous data port, one asynchronous data port, and one 6-input/2output external alarm port. Provides one -48 V/-60 V DC power supply. Connects to 110-220 V AC power supplies.
E1/T1 service
42x75-/120-ohm E1 ports or 42x100-ohm T1 ports 3x75-ohm E3/T3 ports
Slots 1 to 6
TNH2 PL3T
E3/T3 service
Slots 1 to 6
Auxiliar y board
TNM1 AUX
Orderwire phone Asynchronous data service
One orderwire phone port One asynchronous data port One asynchronous data port 4-input/2-output external alarm port
Slots 1 to 6
Power supply board
TND1 PIU
Power supply board Power supply board
N/A
Provides -48 V/-60 V DC power supply ports.
Slots 91 and 92 Slots 2 and 4 Slots 4 and 6 (recom

9
TNF1 APIU
N/A
Provides 100/240 V AC power supply ports.
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Boar d Acro nym
Boar d Nam e
Function
Service Type
Port Type
Valid Slot
mende d) Fan board TNM1 FAN Fan board Cools the NE. N/A N/A Slot 93
2.2 Board Appearance

This section describes the appearances, dimensions, and bar codes of boards.
Appearances and Dimensions

Table 2-2 lists the appearances and dimensions of the boards that the OptiX OSN 550 supports. Figure 1.4 Appearances and dimensions of the boards that the OptiX OSN 550 supports Board Type System control, switching, and timing board Board Name PCX Appearance For example, PCXLX: Dimensions (H x W x D) 22.36 mm x 193.80 mm x 269.73 mm
Packet processing board
MD1/EM 6T/EM6F/ EF8F
For example, EM6F:
19.82 mm x 193.80 mm x 225.80 mm
SDH board
SL1D/SL 4D/SL1Q
For example, SL1D:
19.82 mm x 193.80 mm x 225.80 mm
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Board Type PDH board
Board Name SP3D/PL 3T
Appearance For example, SP3D:
Dimensions (H x W x D) 19.82 mm x 193.80 mm x 225.80 mm
Auxiliary board
AUX
19.82 mm x 193.80 mm x 225.80 mm
Power supply board
PIU
21.0 mm x 41.4 mm x 229.9 mm
APIU
21.0 mm x 41.4 mm x 229.9 mm
Fan board
FAN
28.5 mm x 86.2 mm x 217.6 mm
Bar Code
The front panel of a board has two ejector levers and two captive screws. The ejector levers help you remove or insert a board. The captive screws fasten a board to the chassis. A board bar code (as shown in Figure 2-2) is attached to one of the ejector levers.
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Figure 1.1 Bar code

Bar code
020XES10AA800077-TNM1MD1 A
4 5
1 2 3 4 5
Last six digits of the BOM code Internal code Board version Board name Board feature code
Only the bar codes of some boards contain feature codes, which further classify boards.
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3 System Control, Switching, and Timing Boards
3
3.1 PCX
System Control, Switching, and Timing Boards
The PCX is a system control, switching, and timing board. It is available in five types of finished boards. 3.1.1 Version Description The functional version of the PCX is TNM1. PCX boards are available in five types of finished boards: PCXLX, PCXX, PCXLG, PCXGA, and PCXGB. 3.1.2 Functions and Features This section describes the functions and features that the PCX supports. 3.1.3 Working Principle and Signal Flow The PCX consists of the system control and communication unit, packet switching unit, GE/10GE signal access unit, cross-connect unit, line unit, clock unit, and power supply unit. 3.1.4 Front Panel There are indicators, ports, buttons, and labels on the front panel. 3.1.5 DIP Switches and CF Card This board has a set of DIP switches and a pluggable CF card. 3.1.6 Valid Slots The PCX can be inserted in slot 7 (preferred) or slot 8 in the chassis. 3.1.7 Feature Code The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. PCX boards have feature codes. 3.1.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.
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3.1.1 Version Description

The functional version of the PCX is TNM1. PCX boards are available in five types of finished boards: PCXLX, PCXX, PCXLG, PCXGA, and PCXGB. Table 3-1 lists the differences between the five types of PCX finished boards. Figure 1.5 Differences between the five types of PCX finished boards Fini she d Bo ard PCX LX Packet Switching Capability TDM CrossConnect Capabilit y Supports the 20 Gbit/s higher order crossconnect capacity, 5 Gbit/s lower order crossconnect capacity. TDM Service Port Packet Service Port
60 Gbit/s
One STM-1/STM4/STM-16 SFP optical port. The optical port type can be S-1.1, L-1.1, S4.1, L-4.1, S-16.1, L-16.1, or L-16.2. None
One 10GE (XFP) optical port 10GBASELR (LAN)/10GBASELW (WAN)/10GBASEER (LAN)/10GBASEEW (WAN)/10GBASEZR (LAN)/10GBASEZW (WAN) One 10GE (XFP) optical port 10GBASELR (LAN)/10GBASELW (WAN)/10GBASEER (LAN)/10GBASEEW (WAN)/10GBASEZR (LAN)/10GBASEZW (WAN) One GE (SFP) optical port 1000BASELX/VX/ZX
PCX X
60 Gbit/s
PCX LG
40 Gbit/s
One STM-1/STM4/STM-16 SFP optical port. The optical port type can be S-1.1, L-1.1, S4.1, L-4.1, S-16.1, L-16.1, or L-16.2. None
PCX GA PCX GB
20 Gbit/s
One GE (SFP) optical port 1000BASELX/VX/ZX One GE (SFP) optical port 1000BASELX/VX/ZX
40 Gbit/s
None
3.1.2 Functions and Features

This section describes the functions and features that the PCX supports. Table 3-2 lists the functions and features that the PCX supports.
Figure 1.6 Functions and features that the PCX supports Function and Feature Basic function s Packet switching capability Board
The PCXLX/PCXX supports 60 Gbit/s packet switching function. The PCXLG/PCXGB supports 40 Gbit/s packet switching function. The PCXGA supports 40 Gbit/s packet switching function. Supports the 20 Gbit/s higher order cross-connect capacity, 5 Gbit/s lower order cross-connect capacity. Manages and controls the running status of an NE. Works as a communication service unit between the NMS and boards to help the NMS to control and manage the NE. PCXLX/PCXLG: One STM-1/STM-4/STM-16 SFP optical port. The optical port type can be S-1.1, L-1.1, S-4.1, L-4.1, S-16.1, L-16.1, or L-16.2. PCXX/PCXGB/PCXGA: none PCXLX/PCXX: One 10GE (XFP) optical port 10GBASE-LR (LAN)/10GBASE-LW (WAN)/10GBASE-ER (LAN)/10GBASE-EW (WAN)/10GBASE-ZR (LAN)/10GBASE-ZW (WAN) PCXLG/PCXGB/PCXGA: One GE (SFP) optical port 1000BASE-LX/VX/ZX The GE optical port supports 1000 Mbit/s full-duplex and auto-negotiation. The 10GE optical port supports 10 Gbit/s full-duplex modes and the setting of LAN mode or WAN mode. The TAG attribute can be set to tag aware, access, or hybrid. Sets and queries the TAG attribute of an Ethernet port. Supports the port-based traffic control function that complies with IEEE 802.3x.
TDM cross-connect capacity System control and communication
Port types
TDM service port
Packet service port
Port attribute s
Working mode
TAG attributes
Traffic control function Clock Clock synchronization at the physical layer
Provides the system clock and frame headers for service signals and overhead signals for the other boards when tracing an appropriate clock source. The traced clock source can be any of the following:

External clock SDH line clock PDH tributary clock Synchronous Ethernet clock
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Function and Feature Clock protection
Board Supports the following clock protection schemes:

Protection based on clock source priorities Protection by running the SSM protocol Protection by running the extended SSM protocol Mode 1: 32 DCCs that are composed of D1-D3 bytes Mode 2: 12 DCCs that are composed of D1-D3 bytes or six DCCs that are composed of D4-D12 bytes Supports the inband DCN function. The DCN bandwidth is configurable.
DCN
Outband DCN
Inband DCN MPLS functions
The packet switching unit of the PCX works with its service interface unit or a service board to implement MPLS functions.

Setup mode: static LSPs Protection: 1:1 MPLS tunnel APS OAM: Supports MPLS OAM that complies with ITU-T Y.1711 and DM/PDV functions that comply with ITU-T Y.1731.

Supports LSP ping and LSP
traceroute functions. PWE3 functions The packet switching unit of the PCX works with its service interface unit or a service board to implement PWE3 functions.
Service categories
TDM PWE3 (CES) ATM PWE3 services ETH PWE3 services
services

Setup mode: static PWs Protection: 1:1 PW APS OAM: Support the ping and traceroute commands of PWs, the virtual circuit connectivity verification (VCCV) command.
Supports PW OAM that complies with ITU-T Y.1711 and LM/DM/PDV functions that comply with ITU-T Y.1731.
Supports MS-PWs.
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Function and Feature Ethernet service function s (for PCXLX/ PCXX/P CXLG/P CXGB boards)
Board
Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based ELine service QinQ-based ELine service E-LAN service based on IEEE 802.1d bridges E-LAN service based on IEEE 802.1q bridges E-LAN service based on IEEE 802.1ad bridges ETH PWE3 services
Format of Ethernet data frames: IEEE 802.3 and Ethernet II Jumbo frames MTU length: 1518 bytes to 9600 bytes (1620 bytes, by default) MPLS function support VLAN function support. The VLAN IDs range from 1 to 4094. QinQ support Size of a MAC address table: 16 KB (including static entries)
SDH service functions (for PCXLX/PCXLG boards) Protection scheme TDM protectio n schemes (for PCXLX/ PCXLG boards) Sub-network connection protection (SNCP) ring multiplex section protection (MSP) Linear MSP
Processes STM-1/4/16 services. 1+1 hot standby Supports SNCP at the STM-1, STM-4, and STM-16 levels. The switching duration does not exceed 50 ms. Supports ring MSP at the STM-1, STM-4, and STM16 levels. The switching duration does not exceed 50 ms. Supports linear MSP at the STM-1, STM-4, and STM16 levels. The switching duration does not exceed 50 ms. Supports the MSTP protocol that generates only the CIST. The MSTP protocol provides functions equivalent to that of the RSTP protocol. Intra-board LAG and inter-board LAG A maximum of 16 LAGs. Each LAG has a maximum of 8 members. Switching duration not more than 500 ms Point-point and point-multipoint LPT Switching duration not more than 5s
Packet protectio n schemes
MSTP
LAG
LPT
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Function and Feature Maintenance features
Board
Supports the following IEEE 802.1ag OAM functions:
Management of OAM Continuity check (CC) Loopback (LB) Link trace (LT) OAM auto-discovery Link performance Fault detection Loopback at the remote end
maintenance points

Supports the following IEEE 802.3ah OAM functions:

monitoring

Self-loop detection and self-looped port blocking Number of MD/MA/MEP: 64 Warm reset and cold reset In-service FPGA loading Board manufacturing information query Board temperature detection Board voltage detection Detection of indicators on the other boards Pluggable CF card
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Function and Feature QoS functions
Board The packet switching unit of the PCX works with its service interface unit or a service board to implement QoS functions.
DiffServ
Supports simple traffic classification by specifying PHB service classes for service flows based on their QoS information (C-VLAN priorities, S-VLAN priorities, DSCP values, or MPLS EXP values) carried by the packets.
Complex traffic classification
Supports traffic classification based on C-VLAN IDs, SVLAN IDs, C-VLAN priorities, S-VLAN priorities, CVLAN IDs + C-VLAN priorities, S-VLAN IDs + SVLAN priorities, or DSCP values carried by packets.
CAR Shaping
Provides the CAR function for the traffic flows at ports.
Supports traffic shaping for a specific port, prioritized queue, or traffic flow.
Queue scheduling policies

SP WRR SP+WRR
3.1.3 Working Principle and Signal Flow

The PCX consists of the system control and communication unit, packet switching unit, GE/10GE signal access unit, cross-connect unit, line unit, clock unit, and power supply unit.
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Functional Block Diagram

Figure 1.1 Functional block diagram of the PCX
Backplane
STM-1/4/16 signal
Line unit
Crossconnect unit
TDM service
Service board
GE/10GE signal
GE/10GE signal access unit
GE/10GE signal
Packet switching unit
Data service
Service board
Control bus
Ethernet NM port NM serial port
System control and communication unit
Clock signal received from other boards Clock unit Clock signal provided to other boards
Clock signal received from the service unit on the board Power supplied to the other units on the board Power supply unit
Clock signal provided to the other units on the board -48 V1 (DC power input) -48 V2 (DC power input) -53.5 V (AC power input) +3.3 V power supplied to other boards +12 V power supplied to fans
System Control and Communication Unit

The system control and communication unit consists of the CPU unit and logic control unit. The system control and communication unit performs the following functions:
The CPU unit performs the following control functions using the control bus:

Manages other boards and the other units on the PCX, and collects alarms and performance events. Implements software loading by reading information from the CF card.
The CPU unit processes network management messages in DCCs using the logic control unit. The CPU unit communicates with the NMS by its Ethernet NM port. The logic control unit decodes the address read/write signals from the CPU unit and enables FPGA loading. The logic control unit cross-connects the overheads between the auxiliary interface unit, the CPU unit, and other boards. This helps to achieve the following purposes:

Adding or dropping DCC information processed by the CPU unit Adding or dropping orderwire and synchronous/asynchronous data services Exchanging the orderwire bytes, DCC bytes, and K bytes between different lines
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The system control and communication unit on a PCX board communicates with the system control and communication unit on the standby PCX board by carrying FE signals over the communication bus in the backplane. In this manner, the active and standby PCX boards form a 1+1 hot backup relationship.
Packet Switching Unit

The packet switching unit grooms services and processes protocols for Ethernet services.
After receiving Ethernet services from an Ethernet board, the packet switching unit grooms the Ethernet services based on the configurations that are delivered by the system control and communication unit. After receiving protocol packets from an Ethernet board, the packet switching unit transmits the protocol packets to the system control and communication unit for processing. After processing, the system control and communication unit sends the protocol packets back to the packet switching unit. The packet switching unit transmits the protocol packets to the Ethernet board.
Cross-Connect Unit
The cross-connect unit grooms services over the entire system using the higher order crossconnect module and the lower order cross-connect module. Figure 3-2 shows the functional block diagram of the cross-connect unit. Figure 1.1 Functional block diagram of the cross-connect unit
Source TDM service unit SinkTDM service unit
Higher order cross-connect module HOXC
Lower order cross-connect module LOXC
The source TDM service unit transmits VC-4 signals to the higher order cross-connect module over VC-4 buses. If the VC-4 signals carry only VC-4 services, the higher order cross-connect module processes the VC-4 signals and then transmits the signals to the sink TDM service unit. If the VC-4 signals include VC-12 or VC-3 services, the higher order cross-connect module grooms the VC-12 or VC-3 services to the lower order cross-connect module. The lower order cross-connect module processes the VC-12 or VC-3 services and then transmits the services back to the higher order cross-connect module. The higher order cross-connect module processes the services and then transmits the services to the sink TDM service unit.
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Clock Unit
The clock unit selects an appropriate clock source from service clock sources at service ports based on clock priorities. Locking the clock source by means of the phase-locked loop, the clock unit provides the system clock to other units on the PCX and other boards. The clock units on the active and standby PCX boards transmit clock signals to each other.
GE/10GE Signal Access Unit

The GE/10GE signal access unit allows access of one GE/10GE optical signals and works with the Layer 2 switching unit to provide Layer 2 switching functions.
In the receive direction: After performing O/E conversion, restructuring, decoding, and serial/parallel conversion for GE/10GE optical signals, the GE/10GE signal access unit extracts framed GE/10GE signals by delimiting frames and adding preambles. The GE/10GE signal access unit also performs CRC checks and Ethernet performance measurement. In the transmit direction: After delimiting frames, adding preambles, calculating CRC codes, and measuring Ethernet performance, the GE/10GE signal access unit performs parallel/serial conversion and encoding and then transmits GE/10GE signals to the GE/10GE optical port after performing E/O conversion.
Line Unit
The line unit performs the following functions: STM-1/STM-4/STM-16 signal receiving, serial/parallel conversion, clock signal extraction, data restoration, overhead processing, alarm monitoring/reporting, signal inloops/outloops, MSP, and ALS functions.
Power Supply Unit

The power supply unit performs the following functions:
Combines two -48 V DC power supplies or receives one -53.5 V AC power supply, and converts the supplied power into the power supply required by the chips of the other units on the local board. Combines two -48 V DC power supplies or receives one -53.5 V AC power supply, and converts the supplied power into the +3.3 V power supply required by other boards. Combines two -48 V DC power supplies or receives one -53.5 V AC power supply, and converts the supplied power into the +12 V power supply required by the fan.
3.1.4 Front Panel

There are indicators, ports, buttons, and labels on the front panel.
Front Panel Diagram

Table 3-3 shows the front panel of each PCX finished board.
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Figure 1.7 Front panel of each PCX finished board Finis hed Boar d PCXL X PCXX Front Panel Diagram
PCX
STAT PROG SYNC SRV ACT LOS
CLASS1 LASER PRODUCT
L/A
RST
TX/RX
TX / RX
NMS 1/COM
EXT
PCX
STAT PROG SYNC SRV ACT
L/A
RST
TX / RX
NMS 1/COM
EXT
PCX
STAT PROG SYNC SRV ACT LOS
L/A
PCXL G PCXG A PCXG B
RST
TX/RX
TX /RX
NMS 1/COM
EXT
PCX
L/A
RST
TX/RX
NMS 1/COM
EXT
PCX
L/A
RST
TX /RX
NMS 1/COM
EXT
Indicators
The front panel of the PCX has the following indicators: STAT, PROG, SYNC, SRV, ACT, LOS, and L/A. For status explanation for the indicators, see Indicator Status Explanation.
Clock Ports, Auxiliary Ports, and Management Ports

Figure 1.8 Description of the clock ports, auxiliary ports, and management ports Port NMS/ COM Descri ption Ethernet NM port/NM serial port Connector Type Pin Assignment
Required Cable 11.7 Network Cable
Pin 1: transmitting data (+) Pin 2: transmitting data (-) Pin 3: receiving data (+) Pin 4: grounding end of the NM serial port Pin 5: receive end of the NM serial port Pin 6: receiving data (-) Pin 7: not defined Pin 8: transmit end of the NM serial port
RJ45
87 65 4 32 1
For status explanation for the indicators of an RJ45 port, see Table 3-5.
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Port EXT
Descri ption Reserved
Connector Type -
Pin Assignment -
Required Cable -
Figure 1.9 Status explanation for indicators on an Ethernet port Indicator LINK (green) State On Off ACT (yellow) On or blinking Off Meaning The Ethernet link is working properly. The Ethernet link is interrupted. The port is receiving or transmitting data. The port is not receiving or transmitting data.
Service Ports
Figure 1.10 Description of the service ports on the PCX Boa rd PCX LX/P CXX PCX LG/P CXG A/PC XGB PCX LX/P CXL G Port Desc ripti on 10GE optical port GE optical port Optical port: LC SFP optical module
TX RX
Connector Type
Pin Assignment
Required Cable 11.1 Fiber Jumper
TX/R X TX/R X
TX represents the transmit port. RX represents the receive port.
TX/R X
STM1/4/16 optical port
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Buttons
Figure 1.11 Buttons Button RST Name Warm reset button Description After this button is pressed, a warm reset is performed on the board.
Labels
There is a laser safety class label on the front panel. The laser safety class label CLASS 1 indicates that the maximum launched optical power of the optical port is lower than 10 dBm (10 mW).
3.1.5 DIP Switches and CF Card

This board has a set of DIP switches and a pluggable CF card.
CF Card
NE databases, system parameters (including NE-IP, NE-ID, and subnet mask), software packages, and NE logs are stored on the CF card. To synchronize the NE databases, system parameters, and NE logs on the PCX board to the CF card, enable the regular backup function.
The software packages on the CF card are synchronized with those on the PCX board during package diffusion. Therefore, automatic backup mechanisms or manual operations are not needed to synchronize software packages on the PCX board and the CF card.
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Positions of the DIP Switches and CF Card
1
2
ON DIP
1 2 3 4
1. DIP switches
2. CF card
3. Daughter board
Meanings of DIP Switch Settings

Setting of DIP Switchesa 1 0 2 0 3 0 4 0 Indicates that the board works with the watchdog enabled. The value is reserved. Indicates that a memory self-check is running. Indicates that the board is being debugged. Indicates that the board works with the watchdog disabled and a full memory check is running. Indicates the BIOS holdover state. Indicates the BIOS exhibition state. Meaning
0 0 0 0
0 0 0 1
0 1 1 0
1 0 1 0
0 0
1 1
0 1
1 0
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Setting of DIP Switchesa 1 0 2 1 3 1 4 1
Meaning
The value is reserved. (By default, this value indicates that the board works with the watchdog enabled.) Indicates that the equipment is being tested and the NE software is started directly without a selfcheck. Restores the data of the CF card. Erases data in the system parameter area. Erases databases. Erases NE software, including patches. Erases databases and NE software (including patches). Erases all data in the file system. Formats the flash file system, and erases data in the system parameter area and extended BIOS, with basic BIOS reserved.
1 1 1 1 1
0 0 0 1 1
0 1 1 0 0
1 0 1 0 1
1 1
1 1
1 1
0 1
NOTE a: When a DIP switch is set to the side with the numbers "1, 2, 3, 4", it represents binary digit 1. When a DIP switch is set to the side with the letters "ON DIP", it represents binary digit 0.
3.1.6 Valid Slots

The PCX can be inserted in slot 7 (preferred) or slot 8 in the chassis. Figure 3-3 shows the mapping between physical slots and their logical slots. Physical slot 7 has the following logical slots on the NMS: slot 7, slot 9, slot 81, slot 83, and slot 85; physical slot 8 has the following logical slots on the NMS: slot 8, slot 10, slot 82, slot 84, and slot 86.
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Figure 1.1 Logical slots for a PCX board

Slot Slot 7 91 10 Slot (PIU SLO (PIU) 93 T ) 11 SLO (FAN Slot (FAN) T ) 9 92 (PIU) Slot 9 Slot 81 SLOT 7 Slot 83 Slot 85 Slot 8 Slot 10 Slot 82 Slot 84 SLOT 8 (CST/CSH) (SCC) (STG) (SCC) (CST/CSH) SLOT 6 SLOT 5 Slot 6 (EXT) Slot 5 (EXT) (EXT) (EXT) SLOT 3 SLOT 4 Slot 3 (EXT) Slot 4 (EXT) (EXT) (EXT) SLOT 1 SLOT 2 ) Slot 1 (EXT) Slot 2 (EXT) ) (EXT (EXT Slot 86 (STG)
The board that can be created in a logical slot varies according to the manufactured board that is installed in a physical slot. Table 3-8 provides the mapping between manufactured boards and their logical boards. Figure 1.12 Mapping between manufactured boards and their logical boards Manufac tured Board PCXLX PCXX PCXLG PCXGB PCXGA Logical Slot 7/8 SL16S/SL4S /SL1S SL16S/SL4S /SL1S Logical Slot 9/10 PEX1 PEX1 PEG1 PEG1 PEG1 Logical Slot 81/82 SCC SCC SCC SCC SCC Logical Slot 83/84 PUXC PUXC PEXC PEXC PGXC Logical Slot 85/86 STG STG STG STG STG
3.1.7 Feature Code

The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. PCX boards have feature codes. Figure 1.13 Feature code of the PCX Feature Code TNM1PCXLX01 TNM1PCXLX02 TNM1PCXLX03 TNM1PCXLX04 TNM1PCXLX05 TNM1PCXLX06 TNM1PCXLX07 TNM1PCXLG01 TNM1PCXLG02
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Port Type 1x10GE (XFP)/1xSTM-1 (ESFP, S-1.1, LC) 1x10GE (XFP)/1xSTM-1 (ESFP, L-1.1, LC) 1x10GE (XFP)/STM-4 (ESFP, S-4.1, LC) 1x10GE (XFP)/STM-4 (ESFP, L-4.1, LC) 1x10GE (XFP)/STM-16 (ESFP, S-16.1, LC) 1x10GE (XFP)/STM-16 (ESFP, L-16.1, LC) 1x10GE (XFP)/STM-16 (ESFP, L-16.2, LC) 1xGE (SFP)/STM-1 (ESFP, S-1.1, LC) 1xGE (SFP)/STM-1 (ESFP, L-1.1, LC)
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Feature Code TNM1PCXLG03 TNM1PCXLG04 TNM1PCXLG05 TNM1PCXLG06 TNM1PCXLG07
Port Type 1xGE (SFP)/STM-4 (ESFP, S-4.1, LC) 1xGE (SFP)/STM-4 (ESFP, L-4.1, LC) 1xGE (SFP)/STM-16 (ESFP, S-16.1, LC) 1xGE (SFP)/STM-16 (ESFP, L-16.1, LC) 1xGE (SFP)/STM-16 (ESFP, L-16.2, LC)
3.1.8 Technical Specifications

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 3-10 lists the technical specifications of the PCX. Figure 1.14 Technical Specifications of the PCX Item Auxiliar y ports and manage ment ports Service ports NMS/COM EXT Ethernet NM port/NM serial port Reserved Performance Not involved Not involved
TX/RX (PCXLX/PCX X) TX/RX (PCXLG/PCX GB) TX/RX (PCXLX/PCXL G)
10GE optical port
Table 3-11
GE optical port
Table 3-12
STM-1/4/16 optical port
See Table 3-13, Table 3-14, and Table 3-15.
Dimensions (H x W x D) Weight Power consumption
22.36 mm x 193.80 mm x 269.73 mm 0.80 kg 45 W
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Figure 1.15 Specifications of 10GE optical ports of the OptiX OSN 550 Item Optical port type Performance 10GBASE-LR (LAN) 10GBASELW (WAN) Single-mode LC 10 1260 to 1330 -6 to -1 -11 10GBASE-ER (LAN) 10GBASEEW (WAN) Single-mode LC 40 1530 to 1565 -1 to +2 -15 10GBASE-ZR (LAN) 10GBASE-ZW (WAN) Single-mode LC 80 1530 to 1565 0 to 4 -24
Optical fiber type Transmission distance (km) Operating wavelength (nm) Mean launched power (dBm) Receiver minimum sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB)
0.5 6
-1 8.2
-7 9
Figure 1.16 Specifications of OptiX OSN 550's GE optical ports Item Nominal bit rate (Mbit/s) Optical port type Optical fiber type Transmission distance (km) Operating wavelength (nm) Mean launched power (dBm) Receiver minimum sensitivity (dBm) Minimum overload (dBm) Value 1000 1000BASE-LX Single-mode LC 10 1270 to 1355 -9 to -3 -20 1000BASE-VX Single-mode LC 40 1270 to 1355 -5 to 0 -23 1000BASE-ZX Single-mode LC 80 1500 to 1580 -2 to +5 -23
-3
-3
-3
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Item Minimum extinction ratio (dB)
Value 9 9 9
Figure 1.17 Specifications of OptiX OSN 550's STM-1 optical ports Item Nominal bit rate Optical port type Transmission distance (km) Operating wavelength range (nm) Optical fiber type Launched optical power range (dBm) Receiver sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 155520 kbit/s S-1.1 2 to 15 1261 to 1360 Single-mode LC -15 to -8 -28 -8 8.2 L-1.1 20 to 40 1263 to 1360 Single-mode LC -5 to 0 -34 -10 10
NOTE Format of optical port type is defined as follows: transmission distance-signal rate.fiber type Explanation for optical port type "S-1.1" is as follows: "S" represents short distance; the first digit "1" represents STM-1 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-1.1" is as follows: "L" represents long distance; the first digit "1" represents STM-1 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm).
Figure 1.18 Specifications of OptiX OSN 550's STM-4 optical ports Item Nominal bit rate Optical port type Transmission distance (km) Operating wavelength range (nm)
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Value 622080 kbit/s S-4.1 2 to 15 1274 to 1356 L-4.1 20 to 40 1280 to 1335
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Item Optical fiber type Launched optical power range (dBm) Receiver sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB)
Value Single-mode LC -15 to -8 -28 -8 8.2 Single-mode LC -3 to +2 -28 -8 10
NOTE Format of optical port type is defined as follows: transmission distance-signal rate.fiber type Explanation for optical port type "S-4.1" is as follows: "S" represents short distance; the first digit "4" represents STM-4 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-4.1" is as follows: "L" represents long distance; the first digit "4" represents STM-4 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm).
Figure 1.19 Specifications of OptiX OSN 550's STM-16 optical ports Item Nominal bit rate Optical port type Transmission distance (km) Operating wavelength range (nm) Optical fiber type Launched optical power range (dBm) Receiver sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 2488320 kbit/s S-16.1 2 to 15 1274 to 1356 L-16.1 20 to 40 1280 to 1335 L-16.2 50 to 80 1500 to 1580
Single-mode LC -5 to 0 -18 0 8.2
Single-mode LC -2 to +3 -27 -9 8.2
Single-mode LC -2 to +3 -28 -9 8.2
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Item
Value
NOTE Format of optical port type is defined as follows: transmission distance-signal rate.fiber type Explanation for optical port type "S-16.1" is as follows: "S" represents short distance; the first two digits "16" represent STM-16 signals; the third digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-16.1" is as follows: "L" represents long distance; the first two digits "16" represent STM-16 signals; the third digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-16.2" is as follows: "L" represents long distance; the first two digits "16" represent STM-16 signals; the third digit "2" represents ITU-T G.652 fibers (1550 nm).
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4 Packet Processing Boards
4
4.1 EF8F
Packet Processing Boards
The EF8F is an FE processing board. 4.1.1 Version Description The functional version of the EF8F is TNM1. 4.1.2 Functions and Features The EF8F receives/transmits, processes, and converges 8xFE signals. 4.1.3 Working Principle and Signal Flow This section describes the working principle and signal flow of the EF8F. 4.1.4 Front Panel There are indicators and ports on the front panel. 4.1.5 DIP Switches and Jumpers None. 4.1.6 Valid Slots The EF8F can be inserted in slots 1-6. The slot allocation priority is as follows: slots 4 and 6 > slots 1 and 2 > slots 3 and 5. The logical slots of the EF8F on the NMS are the same as its physical slots. 4.1.7 Feature Code None. 4.1.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.

The functional version of the EF8F is TNM1.
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The EF8F receives/transmits, processes, and converges 8xFE signals. Table 4-1 lists the functions and features that the EF8F supports. The EF8F needs to work with the packet switching unit of the system control, switching, and timing board to implement Ethernet service functions. Figure 1.20 Functions and features that the EF8F supports Function and Feature Basic functions Board Receives/Transmits FE service signals and works with the packet switching unit to process the received FE service signals. 1.25 Gbit/s FE optical port: 100BASE-FX, supporting singlefiber bidirectional optical modules Working mode TAG attributes

Backplane bus bandwidth Port type Port attributes
The FE optical port supports 100M full-duplex. The TAG attribute can be set to tag aware, access, or hybrid. Sets and queries the TAG attribute of an Ethernet port.
Traffic control function MPLS functions
Supports the port-based traffic control function that complies with IEEE 802.3x. The EF8F works with the PCX board to implement MPLS functions.

Setup mode: static LSPs Protection: 1:1 MPLS tunnel APS OAM: Supports MPLS OAM that complies with ITU-T Y.1711.

Supports LSP ping and LSP traceroute functions. PWE3 functions The EF8F works with the PCX board to implement PWE3 functions.

Service categories: ETH PWE3 services Setup mode: static PWs Protection: 1:1 PW APS OAM:

Supports VCCV.
Supports PW OAM that complies with ITU-T Y.1711. Supports PW ping and PW traceroute functions.
Supports MS-PWs.
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Function and Feature Service categories
Board
Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service E-LAN service based on IEEE 802.1d bridges E-LAN service based on IEEE 802.1q bridges E-LAN service based on IEEE 802.1ad bridges ETH PWE3 services
Format of Ethernet data frames: IEEE 802.3 and Ethernet II Jumbo frames MTU length: 1518 bytes to 9600 bytes (1620 bytes, by default) MPLS function support VLAN function support. The VLAN IDs range from 1 to 4094. QinQ support
Protection features
MSTP
Supports the MSTP protocol that generates only the CIST. The MSTP protocol provides functions equivalent to that of the RSTP protocol.

LAG
Intra-board LAG and inter-board LAG Each LAG has a maximum of 8 members Switching duration not more than 500 ms Point-point and point-multipoint LPT Switching duration not more than 5s
LPT Clock Clock source Clock protection
Synchronous Ethernet clock Supports the following clock protection schemes:

Protection based on clock source priorities Protection by running the SSM protocol Protection by running the extended SSM protocol
DCN
Each FE port provides one inband DCN channel.
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Board
Supports the following IEEE 802.1ag OAM functions:
Management of OAM Continuity check (CC) Loopback (LB) Link trace (LT)
maintenance points


OAM auto-discovery Link performance Fault detection Loopback at the
monitoring

remote end Self-loop detection and self-looped port blocking
Number of MD/MA/MEP: 64
Inloops at the PHY/MAC layer of Ethernet ports Warm resets and cold resets (with warm resets having no impact on services) Board manufacturing information query Board voltage detection Board temperature detection SFP module information query Ethernet performance monitoring (RMON) Hot board swapping Hot swapping for pluggable optical modules
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Function and Feature QoS
Board
DiffServ
Supports simple traffic classification by specifying PHB service classes for service flows based on their QoS information (C-VLAN priorities, SVLAN priorities, DSCP values, or MPLS EXP values) carried by the packets.
Supports traffic classification based on C-VLAN IDs, S-VLAN IDs, C-VLAN priorities, S-VLAN priorities, C-VLAN IDs + C-VLAN priorities, SVLAN IDs + S-VLAN priorities, or DSCP values carried by packets.
CAR
Shaping

SP WRR SP+WRR

This section describes the working principle and signal flow of the EF8F.
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Backplane
FE signal access unit
Control signal FE signal
L2 switching unit
Ethernet signal
Dual-fed and selectivereceiving unit
Ethernet signal Packet switching unit
Control bus of the board
Control logic processing unit
Control bus
+3.3 V power supplied to the board
Power supply unit
-48 V1(DC power input) -48 V2(DC power input) -53.5 V(AC power input)
+3.3 V backup power supplied to the board
+3.3 V
Clock signal provided to the other units on the board
Clock unit
System clock signal
Signal Processing in the Receive Direction

Figure 1.21 Signal processing in the receive direction of the EF8F Ste p 1 Function Unit FE signal access unit Processing Flow

Receives and transmits FE signals. Performs restructuring, decoding, and serial/parallel conversion for FE signals. Performs frame delimitation, preamble stripping, CRC checks, and Ethernet performance measurement for frame signals. Adds tags identifying ingress ports to Ethernet data frames. Processes VLAN tags in Ethernet data frames. Processes labels in MPLS/PWE3 packets. Performs QoS processing such as traffic classification and CAR traffic monitoring for Ethernet data frames. Forwards Ethernet data frames to the logic processing unit.
L2 switching unit
Transmits Ethernet data frames to the active and standby packet switching units.
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Signal Processing in the Transmit Direction

Figure 1.22 Signal processing in the transmit direction of the EF8F Step 1 Function Unit Dual-fed and selective-receiving unit L2 switching unit Processing Flow
Selects Ethernet data frames from the packet switching unit. Transmits Ethernet data frames to the Ethernet processing unit. Processes labels in MPLS/PWE3 packets. Processes VLAN tags in Ethernet data frames. Performs QoS processing such as traffic shaping and queue scheduling for Ethernet data frames. Forwards Ethernet data frames to specific egress ports based on egress tags contained in the Ethernet data frames. Performs frame delimitation, preamble addition, CRC code computing, and Ethernet performance measurement. Performs parallel/serial conversion and coding for Ethernet data frames, and sends out the generated FE signals through Ethernet ports.
FE signal access unit
Control Signal Processing

The L2 switching unit controls the FE signal access unit by using management control signals. The control logic processing unit controls the L2 switching unit and the dual-fed and selective-receiving unit over the control bus on the board. The control logic processing unit communicates with the active and standby system control and communication units over the system control bus. Specifically, the logic control unit transmits the configuration data and query commands from the system control and communication unit to various units of the board; it also transmits the command responses, alarms, and performance events reported by units on the board to the system control and communication unit.
Power Supply Unit

The power supply unit performs the following functions: Receives two -48 V DC power supplies or one -53.5 V AC power supply from the backplane, converts the supplied power into +3.3 V power by using the DC-DC unit, and then supplies the +3.3 V power to the other units on the board. Receives one +3.3 V power supply from the backplane, which functions as a +3.3 V power backup for the other units on the board.
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Clock Unit
This unit receives the system clock from the control bus in the backplane and provides clock signals to the other units on the board.
4.1.4 Front Panel

There are indicators and ports on the front panel.
Front Panel Diagram

Figure 4-1 shows the front panel of the EF8F. Figure 1.1 Front panel of the EF8F
OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 OUT5 IN5 OUT6 IN6 OUT7 IN7 OUT8 IN8
EF8F
Indicators
The front panel of the EF8F has the following indicators: STAT, SRV, L/A1, L/A2, L/A3, L/A4, L/A5, L/A6, L/A7, and L/A8. For status explanation for the indicators, see Indicator Status Explanation.
Ports
Port IN1IN8 Descrip tion Input ports for the first to eighth FE optical signals Output ports for the first to eighth FE optical signals Connector Type LC SFP optical module
TX RX
STAT SRV L/A1 L/A2 L/A3 L/A4 L/A5 L/A6 L/A7 L/A8
Pin Assignment
Require d Cable 11.1 Fiber Jumper
OUT1OUT8
4.1.5 DIP Switches and Jumpers

None.
4.1.6 Valid Slots

The EF8F can be inserted in slots 1-6. The slot allocation priority is as follows: slots 4 and 6 > slots 1 and 2 > slots 3 and 5. The logical slots of the EF8F on the NMS are the same as its
physical slots.
4.1.7 Feature Code

None.

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 4-4 lists the technical specifications of the EF8F. Figure 1.23 Technical Specifications of the EF8F Item Service ports Dimensions (H x W x D) Weight Power consumption Performance For the specifications of the FE optical port, see Table 4-5. 19.82 mm x 193.80 mm x 225.80 mm 0.55 kg 23 W
Figure 1.24 Specifications of FE optical ports of the OptiX OSN 550 Item Optical port type Optical fiber type Transmission distance (km) Operating wavelength (nm) Mean launched power (dBm) Receiver minimum sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 100Base-FX Single-mode LC 15 1261 to 1360 -15 to -8 -28 100Base-FX Single-mode LC 40 1263 to 1360 -5 to 0 -34 100Base-FX Single-mode LC 80 1480 to 1580 -5 to 0 -34
-8 8.2
-10 10
-10 10
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4.2 EM6T/EM6F
The EM6T/EM6F is an FE/GE processing board. 4.2.1 Version Description The functional version of the EM6T/EM6F is TNM1. 4.2.2 Functions and Features The EM6T/EM6F receives/transmits, processes, and converges four FE signals and two GE signals. 4.2.3 Working Principle and Signal Flow This section describes the working principle and signal flow of the EM6T/EM6F. 4.2.4 Front Panel There are indicators, FE service ports, and GE service ports on the front panel. 4.2.5 DIP Switches and Jumpers None. 4.2.6 Valid Slots The EM6T/EM6F can be inserted in slots 1-6. The slot allocation priority is as follows: slots 4 and 6 > slots 1 and 2 > slots 3 and 5. The logical slots of the EM6T/EM6F on the NMS are the same as its physical slots. 4.2.7 Feature Code None. 4.2.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.

The functional version of the EM6T/EM6F is TNM1.

The EM6T/EM6F receives/transmits, processes, and converges four FE signals and two GE signals. Table 4-6 lists the functions and features that the EM6T/EM6F supports. The EM6T/EM6F needs to work with the packet switching unit of the system control, switching, and timing board to implement Ethernet service functions.
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Figure 1.25 Functions and features that the EM6T/EM6F supports Function and Feature Board EM6T Basic functions EM6F
Receives/Transmits FE/GE service signals and works with the packet switching unit to process the received FE/GE service signals. 2.5 Gbit/s Provides four 10/100BASE-T(X) ports. Provides two 10/100/1000 BASE-T(X) ports (fixed). Provides two GE ports by using SFP modules of the following types:

Backplane bus bandwidth Port specifications FE electrical port GE port
1000BASE-LX 1000BASE-VX 1000BASE-ZX
The GE optical port supports single-fiber bidirectional optical modules. Port attributes Working mode
The FE port supports 10M full-duplex, 10M half-duplex, 100M full-duplex, 100M half-duplex, and autonegotiation. The GE electrical port supports 10M full-duplex, 10M half-duplex, 100M full-duplex, 100M half-duplex, 1000M full-duplex, and auto-negotiation. The GE optical port supports 1000M full-duplex and auto-negotiation. The TAG attribute can be set to tag aware, access, or hybrid. Sets and queries the TAG attribute of an Ethernet port.
TAG attributes
Traffic control function
Supports the port-based traffic control function that complies with IEEE 802.3x.
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Function and Feature
Board EM6T EM6F
MPLS functions
The EM6T/EM6F works with the packet switching unit of the PCX board to implement MPLS functions.

Setup mode: static LSPs Protection: 1:1 MPLS tunnel APS OAM: Supports MPLS OAM that complies with ITU-T Y.1711.
Supports LSP ping and LSP traceroute functions.
PWE3 functions
The EM6T/EM6F works with the packet switching unit of the PCX board to implement PWE3 functions.
Service categories: ETH PWE3 services Setup mode: static PWs Protection: 1:1 PW APS OAM: Support the ping and traceroute commands of PWs, the virtual circuit connectivity verification (VCCV) command.
Supports PW OAM that complies with ITU-T Y.1711.
Supports MS-PWs. Format of Ethernet data frames: IEEE 802.3 and Ethernet II Jumbo frames MTU length: 1518 bytes to 9600 bytes (1620 bytes, by default) MPLS function support VLAN function support. The VLAN IDs range from 1 to 4094. QinQ support
Service categories
Native Ethernet services Point-to-point transparently transmitted E-Line service VLAN-based E-Line service QinQ-based E-Line service E-LAN service based on IEEE 802.1d bridges E-LAN service based on IEEE 802.1q bridges E-LAN service based on IEEE 802.1ad bridges ETH PWE3 services
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Board EM6T EM6F
Protection features
MSTP
Supports the MSTP protocol that generates only the CIST. The MSTP protocol provides functions equivalent to that of the RSTP protocol.

LAG
Intra-board LAG and inter-board LAG Each LAG has a maximum of 8 members. Switching duration not more than 500 ms Point-point and point-multipoint LPT Switching duration not more than 5s Synchronous Ethernet clock (not supported by SFP electrical modules)
LPT Clock Clock source
Synchronous Ethernet clock
Clock protection
Supports the following clock protection schemes:
Protection based on clock source priorities Protection by running the SSM protocol Protection by running the extended SSM protocol
DCN
Each FE/GE port provides one inband DCN channel.
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Board EM6T EM6F
Maintenance features
Supports the following IEEE 802.1ag OAM functions: Management of OAM maintenance points

Continuity Loopback Link trace
check (CC)
(LB)
(LT)
OAM auto-
discovery Link performance monitoring

Fault Loopback at
detection
the remote end Self-loop detection and self-looped port blocking
Number of MD/MA/MEP: 64
Inloops at the PHY/MAC layer of Ethernet ports Warm resets and cold resets (with warm resets having no impact on services) Board manufacturing information query Board voltage detection Board temperature detection SFP module information query Ethernet performance monitoring (RMON) Hot board swapping Hot swapping for pluggable optical modules
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Board EM6T EM6F
QoS
DiffServ
Supports simple traffic classification by specifying PHB service classes for service flows based on their QoS information (C-VLAN priorities, SVLAN priorities, DSCP values, or MPLS EXP values) carried by the packets.
Supports traffic classification based on C-VLAN IDs, S-VLAN IDs, C-VLAN priorities, S-VLAN priorities, C-VLAN IDs + C-VLAN priorities, S-VLAN IDs + S-VLAN priorities, or DSCP values carried by packets.
CAR
Shaping

SP WRR SP+WRR

This section describes the working principle and signal flow of the EM6T/EM6F.
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Figure 1.1 Functional block diagram of the EM6T/EM6F
Backplane GE signal GE signal access unit Control signal L2 switching unit FE signal access unit Control signal FE signal Control bus of the board Ethernet signal Ethernet signal Packet switching unit
Control logic processing unit
Control bus
+3.3 V power supplied to the board
Power supply unit
-48 V1(DC power input) -48 V2(DC power input) -53.5 V(AC power input)
+3.3 V backup power supplied to the board
+3.3 V
Clock signal provided to the other units on the board
Clock unit
System clock signal

Figure 1.26 Signal processing in the receive direction of the EM6T/EM6F Step 1 Functional Unit GE signal access unit/FE signal access unit Processing Flow

Receives and transmits GE/FE signals. Performs restructuring, decoding, and serial/parallel conversion for GE/FE signals. Performs frame delimitation, preamble stripping, CRC checks, and Ethernet performance measurement for frame signals.
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Step 2
Functional Unit L2 switching unit
Processing Flow
Adds tags identifying ingress ports to Ethernet data frames. Processes VLAN tags in Ethernet data frames. Processes labels in MPLS/PWE3 packets. Performs QoS processing such as traffic classification and CAR traffic monitoring for Ethernet data frames. Forwards Ethernet data frames to the logic processing unit.
Dual-fed and selective-receiving unit
Transmits Ethernet data frames to the active and standby packet switching units.

Figure 1.27 Signal processing in the transmit direction of the EM6T/EM6F Step 1 Function Unit Dual-fed and selective-receiving unit L2 switching unit Processing Flow
Selects Ethernet data frames from the packet switching unit. Transmits Ethernet data frames to the Ethernet processing unit. Processes labels in MPLS/PWE3 packets. Processes VLAN tags in Ethernet data frames. Performs QoS processing such as traffic shaping and queue scheduling for Ethernet data frames. Forwards Ethernet data frames to specific egress ports based on egress tags contained in the Ethernet data frames. Performs frame delimitation, preamble addition, CRC code computing, and Ethernet performance measurement. Performs parallel/serial conversion and coding for Ethernet data frames, and sends out the generated GE/FE signals through Ethernet ports.
GE signal access unit/FE signal access unit

The L2 switching unit controls the FE/GE signal access unit by using management control signals. The control logic processing unit controls the L2 switching unit and the dual-fed and selective-receiving unit over the control bus on the board.
The control logic processing unit communicates with the active and standby system control and communication units over the system control bus. Specifically, the logic control unit transmits the configuration data and query commands from the system control and communication unit to various units of the board; it also transmits the command responses, alarms, and performance events reported by units on the board to the system control and communication unit.
Power Supply Unit

Clock Unit
4.2.4 Front Panel

There are indicators, FE service ports, and GE service ports on the front panel.
Front Panel Diagram

Figure 1.1 Front panel of the EM6T
EM6T EM6T
STAT PROG SRV
GE1
GE2
FE1
FE2
FE3
FE4
Figure 1.2 Front panel of the EM6F

EM6F
STAT PROG SRV LINK1 LINK2
GE1
GE2
FE1
FE2
FE3
FE4
Indicators
The front panel of the EM6T has the following indicators: STAT, SRV, and PROG. The front panel of the EM6F has the following indicators: STAT, SRV, PROG, LINK1, and LINK2. For status explanation for the indicators, see Indicator Status Explanation.
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Ports
Por t FE1, FE2, FE3, FE4 GE1 /GE 2 Bo ar d EM 6T/ EM 6F EM 6T Descr iption FE service port GE service port (fixed electric al port) GE service port (using SFP module s) Connector Type Pin Assignment The FE ports and GE electrical ports support the MDI, MDI-X, and autoMDI/MDI-X modes. Table 4-10 and Table 4-11 provide the pin assignments for an RJ-45 port in different modes.
Required Cable
RJ-45
87 65 4 32 1
RJ-45
For status explanation for the indicators of an RJ-45 port, see Table 4-9.
11.7 Network Cable
EM 6F
LC SFP optical module

TX RX
11.1 Fiber Jumper
Figure 1.29 Pin assignments for an RJ-45 port in MDI mode Pin 10/100BASE-TX Signal 1 2 TX+ TXFunction Transmitting data (+) Transmitting data (-) 1000BASE-T Signal BIDA+ BIDAFunction Bidirectional data wire A (+) Bidirectional data wire A (-)
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Pin
10/100BASE-TX Signal Function Receiving data (+) Receiving data (-) -
1000BASE-T Signal BIDB+ BIDC+ BIDCBIDBBIDD+ BIDDFunction Bidirectional data wire B (+) Bidirectional data wire C (+) Bidirectional data wire C (-) Bidirectional data wire B (-) Bidirectional data wire D (+) Bidirectional data wire D (-)
3 4 5 6 7 8
RX+ Reserved Reserved RXReserved Reserved
Figure 1.30 Pin assignments for an RJ-45 port in MDI-X mode Pin 10/100BASE-TX Signal 1 2 3 4 5 6 7 8 RX+ RXTX+ Reserved Reserved TXReserved Reserved Function Receiving data (+) Receiving data (-) Transmitting data (+) Transmitting data (-) 1000BASE-T Signal BIDB+ BIDBBIDA+ BIDD+ BIDDBIDABIDC+ BIDCFunction Bidirectional data wire B (+) Bidirectional data wire B (-) Bidirectional data wire A (+) Bidirectional data wire D (+) Bidirectional data wire D (-) Bidirectional data wire A (-) Bidirectional data wire C (+) Bidirectional data wire C (-)
Labels
There is a laser safety class label on the front panel of the EM6F.
The laser safety class label CLASS 1 indicates that the maximum launched optical power of the optical port is lower than 10 dBm (10 mW).

None.
4.2.6 Valid Slots

The EM6T/EM6F can be inserted in slots 1-6. The slot allocation priority is as follows: slots 4 and 6 > slots 1 and 2 > slots 3 and 5. The logical slots of the EM6T/EM6F on the NMS are the same as its physical slots.
4.2.7 Feature Code

None.

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 4-12 lists the technical specifications of the EM6T/EM6F. Figure 1.31 Technical specifications of the EM6T/EM6F Item Service ports FE1, FE2, FE3, FE4 GE1, GE2 FE electrical port Performance See Table 4-13.
GE electrical port GE optical port By using different SFP modules, the equipment provides GE optical ports with different application codes and transmission distances. For port specifications, see Table 4-14.
Dimensions (H x W x D) Weight Power consumption
19.82 mm x 193.80 mm x 225.80 mm

EM6T: 0.37 kg EM6F: 0.40 kg EM6T: 10.4 W EM6F: 11.3 W
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Figure 1.32 Specifications of OptiX OSN 550's Ethernet electrical ports Service Port GE/FE electrical port GE/FE electrical port GE electrical port Port Rate 10BASE-T 100BASE-TX 1000BASE-T Code Pattern Manchester coding signals MLT-3 coding signal 4D-PAM5 coding signal Port Type RJ-45
Figure 1.33 Specifications of OptiX OSN 550's GE optical ports Item Nominal bit rate (Mbit/s) Optical port type Optical fiber type Transmission distance (km) Operating wavelength (nm) Mean launched power (dBm) Receiver minimum sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 1000 1000BASE-LX Single-mode LC 10 1270 to 1355 -9 to -3 -20 1000BASE-VX Single-mode LC 40 1270 to 1355 -5 to 0 -23 1000BASE-ZX Single-mode LC 80 1500 to 1580 -2 to +5 -23
-3 9
-3 9
-3 9
4.3 MD1
The MD1 is a 32xSmart E1 service processing board. 4.3.1 Version Description The functional version of the MD1 is TNM1. 4.3.2 Functions and Features
The MD1 receives and transmits 32xE1 signals. 4.3.3 Working Principle and Signal Flow This section describes the working principle and signal flow of the MD1. 4.3.4 Front Panel There are indicators and ports on the front panel. 4.3.5 DIP Switches and Jumpers None. 4.3.6 Valid Slots The MD1 can be inserted in slots 1-6. The slot allocation priority is as follows: slots 4 and 6 > slots 1 and 2 > slots 3 and 5. The logical slots of the MD1 on the NMS are the same as its physical slots. 4.3.7 Feature Code The feature code of the MD1 indicates the E1 port impedance. 4.3.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.

The functional version of the MD1 is TNM1.

The MD1 receives and transmits 32xE1 signals. Table 4-15 lists the functions and features that the MD1 supports. Figure 1.34 Functions and features that the MD1 supports Function and Feature Basic functions E1 service categories Board Receives and transmits E1 signals. The E1 service categories are configured flexibly as required. Supports the following E1 service categories:

CES E1 ATM/IMA E1
Port specifications
Provides thirty-two 75-ohm/120-ohm E1 ports.
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Function and Feature PWE3 functions
Board The MD1 works with the packet switching unit of the PCX board to implement PWE3 functions.
Service categories

TDM PWE3 (CES) services ATM PWE3 services
Setup mode: static PWs Protection: 1:1 PW APS OAM: Support the ping and traceroute commands of PWs, the virtual circuit connectivity verification (VCCV) command.

Supports PW OAM that complies with
ITU-T Y.1711.
Supports MS-PWs. Number of ATM connections: 256 ATM traffic management ATM encapsulation format

ATM/IMA
N-to-one VPC N-to-one VCC One-to-one VPC One-to-one VCC
Maximum number of concatenated ATM cells: 31 ATM OAM: F4 (VP layer) and F5 (VC layer) Maximum number of IMA groups: 32 Maximum number of members in an IMA group: 16 Service type: point-to-point service Encapsulation types:

CES
CESoPSN SAToP
Compression of idle timeslots: supported (only for CESoPSN encapsulation) Jitter compensation buffering time: 375 us to 16000 us Packet loading time: 125 us to 5000 us CES ACR: supported Retiming: supported
Inloops and outloops at E1 tributary ports Warm resets and cold resets (with warm resets having no impact on services) PRBS tests at E1 ports
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Board Board manufacturing information query Hot board swapping

This section describes the working principle and signal flow of the MD1.

Figure 1.1 Functional block diagram of the MD1
Backplane
Service processing unit
Logic processing unit
Signal interface unit
E1
Service bus
GE bus
Packet switching unit
E1
Control bus
Logic control unit +3.3 V power supplied to the board +3.3 V backup power supplied to the board Clock signal provided to the other units of the board Clock unit Power supply unit -48 V1(DC power input) -48 V2(DC power input) -53.5 V(AC power input) +3.3 V System clock signal
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Figure 1.35 Signal processing in the receive direction of the MD1 Step 1 Function Unit Signal interface unit Processing Flow

Receives external E1 signals. Matches the resistance. Equalizes signals. Converts the level. Restores clock signals. Buffers the received data. Performs HDB3/B8ZS/AMI decoding. Frames E1 signals. Performs CES emulation or processes ATM/IMA services. Encapsulates PWE3 services and converts the PWE3 services into Ethernet services. Shifts transmission of service signals from the internal service bus to the GE bus in the backplane. Sends service signals to the packet switching unit.

Figure 1.36 Signal processing in the transmit direction of the MD1 Step 1 Function Unit Logic processing unit Processing Flow
Receives service signals from the packet switching unit. Shifts transmission of service signals from the GE bus in the backplane to the internal service bus. Decapsulates service signals. Re-forms CES packets or processes ATM/IMA services. Converts signals into E1 signals and sends the E1 signals to the signal interface unit. Performs HDB3/B8ZS/AMI coding. Performs clock re-timing. Shapes pulses. Drives the line. Sends E1 signals to a port.
Signal interface unit
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The board is directly controlled by the CPU unit on the system control and communication unit.
The CPU unit issues configuration and query commands to the other units of the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus.
The logic control unit decodes the address read/write signals from the CPU unit of the system control and communication unit.
Power Supply Unit

Clock Unit
4.3.4 Front Panel

Front Panel Diagram

Figure 1.1 Front panel of the MD1
MD1
STAT SRV 16 1 17 32
Indicators
The front panel of the MD1 has the following indicators: STAT and SRV. For status explanation for the indicators, see Indicator Status Explanation.
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Ports
Port 1 to 16 Descri ption The first to sixteenth E1 ports The seventeen th to thirtysecond E1 ports Connector Type Anea 96
POS.1
Pin Assignment See Table 4-18.
Required Cable 11.5 E1/T1 Cable
17 to 32
POS.96
Figure 1.37 Pin assignments for an Anea 96 port Pin 1 2 3 4 5 6 7 8 9 10 11 12 Signal The first received E1 differential signal (+) The first received E1 differential signal (-) The second received E1 differential signal (+) The second received E1 differential signal (-) The third received E1 differential signal (+) The third received E1 differential signal (-) The fourth received E1 differential signal (+) The fourth received E1 differential signal (-) The fifth received E1 differential signal (+) The fifth received E1 differential signal (-) The sixth received E1 differential signal (+) The sixth received E1 differential signal (-) Pin 25 26 27 28 29 30 31 32 33 34 35 36 Signal The first transmitted E1 differential signal (+) The first transmitted E1 differential signal (-) The second transmitted E1 differential signal (+) The second transmitted E1 differential signal (-) The third transmitted E1 differential signal (+) The third transmitted E1 differential signal (-) The fourth transmitted E1 differential signal (+) The fourth transmitted E1 differential signal (-) The fifth transmitted E1 differential signal (+) The fifth transmitted E1 differential signal (-) The sixth transmitted E1 differential signal (+) The sixth transmitted E1 differential signal (-)
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Pin 13 14 15 16 17 18 19 20 21 22 23 24 49 50 51 52 53 54 55
Signal The seventh received E1 differential signal (+) The seventh received E1 differential signal (-) The eighth received E1 differential signal (+) The eighth received E1 differential signal (-) The ninth received E1 differential signal (+) The ninth received E1 differential signal (-) The tenth received E1 differential signal (+) The tenth received E1 differential signal (-) The eleventh received E1 differential signal (+) The eleventh received E1 differential signal (-) The twelfth received E1 differential signal (+) The twelfth received E1 differential signal (-) The thirteenth received E1 differential signal (+) The thirteenth received E1 differential signal (-) The fourteenth received E1 differential signal (+) The fourteenth received E1 differential signal (-) The fifteenth received E1 differential signal (+) The fifteenth received E1 differential signal (-) The sixteenth received E1 differential signal (+)
Pin 37 38 39 40 41 42 43 44 45 46 47 48 73 74 75 76 77 78 79
Signal The seventh transmitted E1 differential signal (+) The seventh transmitted E1 differential signal (-) The eighth transmitted E1 differential signal (+) The eighth transmitted E1 differential signal (-) The ninth transmitted E1 differential signal (+) The ninth transmitted E1 differential signal (-) The tenth transmitted E1 differential signal (+) The tenth transmitted E1 differential signal (-) The eleventh transmitted E1 differential signal (+) The eleventh transmitted E1 differential signal (-) The twelfth transmitted E1 differential signal (+) The twelfth transmitted E1 differential signal (-) The thirteenth transmitted E1 differential signal (+) The thirteenth transmitted E1 differential signal (-) The fourteenth transmitted E1 differential signal (+) The fourteenth transmitted E1 differential signal (-) The fifteenth transmitted E1 differential signal (+) The fifteenth transmitted E1 differential signal (-) The sixteenth transmitted E1 differential signal (+)
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Pin 56
Signal The sixteenth received E1 differential signal (-)
Pin 80
Signal The sixteenth transmitted E1 differential signal (-)

None.
4.3.6 Valid Slots

The MD1 can be inserted in slots 1-6. The slot allocation priority is as follows: slots 4 and 6 > slots 1 and 2 > slots 3 and 5. The logical slots of the MD1 on the NMS are the same as its physical slots.
4.3.7 Feature Code

The feature code of the MD1 indicates the E1 port impedance. Figure 1.38 Feature code of the MD1 Feature Code A B Port Impedance (Ohm) 75 120

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 4-20 lists the technical specifications of the MD1. Item E1 ports (1-16 and 17-32) Dimensions (H x W x D) Weight Power consumption Performance See Table 4-20. 19.82 mm x 193.80 mm x 225.80 mm 0.50 kg 12.2 W
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Figure 1.39 Specifications of OptiX OSN 550's CES/ATM/IMA service electrical ports Item Standard compliance Nominal bit rate (kbit/s) Code pattern Impedance (ohm) Pair in each direction Port type Performance ITU-T G.703/G.823 2048 HDB3 75 One coaxial pair Anea 96 120 One symmetrical pair
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5.1 SL1D
The SL1D is a 2xSTM-1 optical interface board. 5.1.1 Version Description The functional version of the SL1D is TNH2. 5.1.2 Functions and Features
SDH Boards
The SL1D receives and transmits 2xSTM-1 optical signals, performs O/E conversion for STM-1 optical signals, extracts and inserts overhead bytes, and reports alarms generated on the line. 5.1.3 Working Principle and Signal Flow The SL1D consists of an O/E conversion unit, an overhead processing unit, a logic control unit, and a clock unit. 5.1.4 Front Panel There are indicators and ports on the front panel. 5.1.5 DIP Switches and Jumpers None. 5.1.6 Valid Slots The SL1D can be inserted in slots 1-6 in the chassis. The logical slots of the SL1D on the NMS are the same as its physical slots. 5.1.7 Feature Code The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. SL1D boards have feature codes. 5.1.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.
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The functional version of the SL1D is TNH2.

The SL1D receives and transmits 2xSTM-1 optical signals, performs O/E conversion for STM-1 optical signals, extracts and inserts overhead bytes, and reports alarms generated on the line. Table 5-1 lists the functions and features that the SL1D supports. Figure 1.40 Functions and features that the SL1D supports Function and Feature Basic functions Optical port specifications Optical module specifications Board

Receives and transmits 2xSTM-1 optical signals. Provides S-1.1, L-1.1, and L-1.2 optical ports. The characteristics of all optical ports comply with ITU-T G.957. Optical module information can be detected and queried. Single-fiber bidirectional optical modules can be used. Pluggable optical modules support hot swapping. Appropriate SFP optical modules can be used, their information can be queried, and their running status can be monitored. This facilitates your maintenance. Optical ports allow setting the on/off state of a laser and support the automatic laser shutdown (ALS) function. Supports outband DCN. Processes VC-12, VC-3, and VC-4 services. Processes the section overheads of STM-1 signals. Transparently transmits or terminates path overheads. Sets and queries J0, J1, and C2 bytes. Provides various alarms and performance events, facilitating equipment management and maintenance. Supports two-fiber unidirectional ring multiplex section protection (MSP). Supports linear multiplex section protection (MSP). Supports sub-network connection protection (SNCP).
DCN Service processing Overhead processing
Alarms and performance events Protection schemes
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Board

Inloops and outloops on ports and paths Warm resets and cold resets (with warm resets having no impact on services) Board manufacturing information query In-service FPGA loading Hot board swapping

The SL1D consists of an O/E conversion unit, an overhead processing unit, a logic control unit, and a clock unit.

Figure 1.1 Functional block diagram of the SL1D
Backplane O/E conversion unit STM-1 Service bus Overhead bus
Cross-connect unit System control and communication unit System control and communication unit +3.3 V
Overhead processing unit
STM-1
Control bus Power supplied to the other units on the board Clock signal provided to the other units on the board Clock unit
Logic control unit
System clock signal

Figure 1.41 Signal processing in the receive direction of the SL1D Step 1 Function Unit O/E conversion unit Processing Flow

Regenerates STM-1 optical signals. Detects R_LOS alarms. Converts STM-1 optical signals into STM-1 electrical signals.
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Step 2
Function Unit Overhead processing unit
Processing Flow

Restores clock signals. Aligns frames and detects R_LOS and R_LOF alarms. Descrambles signals. Checks B1 and B2 bytes and generates specific alarms and performance events. Checks the M1 byte and bits 6-8 of the K2 byte, and generates specific alarms and performance events. Detects the changes in the SSM in the S1 byte and reports the SSM status to the system control and communication unit. Extracts orderwire bytes, auxiliary channel bytes including F1 and SERIAL bytes, DCC bytes, and K bytes to form a 2 Mbit/s overhead signal and transmits the 2 Mbit/s overhead signal to the system control and communication unit. Adjusts AU pointers and generates specific performance events. Checks higher order path overheads and generates specific alarms and performance events. Transmits pointer indication signals and VC-4 signals to the cross-connect unit.

Figure 1.42 Signal processing in the transmit direction of the SL1D Step 1 Function Unit Overhead processing unit Processing Flow
Receives VC-4 signals and pointer indication signals from the cross-connect unit. Sets higher order path overheads. Sets AU pointers. Sets multiplex section overhead bytes. Sets regenerator section overhead bytes. Scrambles signals. Converts electrical signals into optical signals.
O/E conversion unit

The board is directly controlled by the CPU unit on the system control and communication unit. The CPU unit issues configuration and query commands to the other units of the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus.
5 SDH Boards
The logic control unit decodes the address read/write signals from the CPU unit of the system control and communication unit and enables FPGA loading.
Clock Unit
5.1.4 Front Panel

Front Panel Diagram

Figure 5-2 shows the front panel of the SL1D. Figure 1.1 Front panel of the SL1D
STAT SRV LOS1 LOS2
TX1/RX1
TX2/RX2
Indicators
The front panel of the SL1D has the following indicators: STAT, SRV, LOS1, and LOS2. For status explanation for the indicators, see Indicator Status Explanation.
Ports
Port TX1/R X1 Descript ion Transmit/R eceive port of the first STM-1 optical port Transmit/R eceive port of the second STM-1 optical port Connector Type LC SFP optical module
TX RX
Pin Assignment
Require d Cable 11.1 Fiber Jumper
TX2/R X2
Labels
SL1D
SL1D
5 SDH Boards

None.
5.1.6 Valid Slots

The SL1D can be inserted in slots 1-6 in the chassis. The logical slots of the SL1D on the NMS are the same as its physical slots.
5.1.7 Feature Code

The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. SL1D boards have feature codes. Figure 1.43 Feature code of the SL1D Feature Code 01 02 03 04 Type of Optical Port S-1.1, eSFP optical module L-1.1, eSFP optical module L-1.2, eSFP optical module S-1.1, single-fiber bidirectional optical module (The operating wavelength of optical port 1 is 1550 nm and that of optical port 2 is 1310 nm.) L-1.1, single-fiber bidirectional optical module (The operating wavelength of optical port 1 is 1550 nm and that of optical port 2 is 1310 nm.)
05

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 5-5 lists the technical specifications of the SL1D. Figure 1.44 Technical specifications of the SL1D Item Service ports TX1/RX 1 TX2/RX 2 Dimensions (H x W x D) Weight Power consumption
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Performance Transmit/Receive port of the first STM-1 optical port Transmit/Receive port of the second STM-1 optical port 19.82 mm x 193.80 mm x 225.80 mm 0.30 kg 4.12 W
70
For the performance of STM-1 optical ports, see Table 5-6.
5 SDH Boards
Figure 1.45 Specifications of OptiX OSN 550's STM-1 optical ports Item Nominal bit rate Optical port type Transmission distance (km) Operating wavelength range (nm) Optical fiber type Launched optical power range (dBm) Receiver sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 155520 kbit/s S-1.1 2 to 15 1261 to 1360 Single-mode LC -15 to -8 -28 -8 8.2 L-1.1 20 to 40 1263 to 1360 Single-mode LC -5 to 0 -34 -10 10 L-1.2 60 to 80 1480 to 1580 Single-mode LC -5 to 0 -34 0 10
NOTE Format of optical port type is defined as follows: transmission distance-signal rate.fiber type Explanation for optical port type "S-1.1" is as follows: "S" represents short distance; the first digit "1" represents STM-1 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-1.1" is as follows: "L" represents long distance; the first digit "1" represents STM-1 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-1.2" is as follows: "L" represents long distance; the first digit "1" represents STM-1 signals; the second digit "2" represents ITU-T G.652 fibers (1550 nm)..
5.2 SL1Q
The SL1Q is a 4xSTM-1 optical interface board. 5.2.1 Version Description The functional version of the SL1Q is TNH2. 5.2.2 Functions and Features The SL1Q receives and transmits 4xSTM-1 optical signals, performs O/E conversion for STM-1 optical signals, extracts and inserts overhead bytes, and reports alarms generated on the line. 5.2.3 Working Principle and Signal Flow The SL1Q consists of an O/E conversion unit, an overhead processing unit, a logic control
5 SDH Boards
unit, and a clock unit. 5.2.4 Front Panel There are indicators, ports, and a laser safety class label on the front panel. 5.2.5 DIP Switches and Jumpers The SL1Q does not have any jumpers or DIP switches that are used for board settings. 5.2.6 Valid Slots The SL1Q can be inserted in slots 1-6 in the chassis. 5.2.7 Feature Code The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. SL1Q boards have feature codes. 5.2.8 Technical Specifications This section describes the board specifications, including the parameters specified for optical ports, dimensions, weight, and power consumption.

The functional version of the SL1Q is TNH2.

The SL1Q receives and transmits 4xSTM-1 optical signals, performs O/E conversion for STM-1 optical signals, extracts and inserts overhead bytes, and reports alarms generated on the line. Table 5-7 lists the functions and features that the SL1Q supports. Figure 1.46 Functions and features that the SL1Q supports Function and Feature Basic functions Optical port specifications Optical module specifications Board Receives and transmits 4xSTM-1 optical signals.

Provides S-1.1, L-1.1, and L-1.2 optical ports. The characteristics of all optical ports comply with ITU-T G.957. Optical module information can be detected and queried. Appropriate SFP optical modules can be used and the running status can be monitored. This facilitates your maintenance. Optical ports allow setting the on/off state of a laser and support the automatic laser shutdown (ALS) function.
DCN Service processing
Supports outband DCN. Processes VC-12, VC-3, and VC-4 services.
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Function and Feature Overhead processing
Board

Processes the section overheads of STM-1 signals. Processes higher order path overheads. Sets K-byte reporting, transmission, and pass-through. Provides transparent DCCs and orderwire byte channels. Sets and queries J0, J1, and C2 bytes.
Pointer processing Alarms and performance events Protection schemes
Processes AU pointers. Provides various alarms and performance events, facilitating equipment management and maintenance.

Supports two-fiber unidirectional ring MSP. Supports linear MSP. Supports SNCP. Inloops and outloops at optical ports Inloops and outloops on VC-4 paths for quick fault locating Setting of overhead bytes to be sent/received Enabling/Disabling SSMs on line optical ports Pass-through tests of line K bytes Setting of bit error threshold-crossing values and degrade thresholds

The SL1Q consists of an O/E conversion unit, an overhead processing unit, a logic control unit, and a clock unit.
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Figure 1.1 Functional block diagram of the SL1Q

STM-1
Logic control unit
System clock signal

Figure 1.47 Signal processing in the receive direction of the SL1Q Step 1 Function Unit O/E conversion unit Processing Flow

Regenerates STM-1 optical signals. Detects R_LOS alarms. Converts STM-1 optical signals into STM-1 electrical signals.
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Step 2
Function Unit Overhead processing unit
Processing Flow

Restores clock signals. Aligns frames and detects R_LOS and R_LOF alarms. Descrambles signals. Checks B1 and B2 bytes and generates specific alarms and performance events. Checks the M1 byte and bits 6-8 of the K2 byte, and generates specific alarms and performance events. Detects changes in the SSM in the S1 byte and reports the SSM status to the system control and communication unit. Extracts orderwire bytes, auxiliary channel bytes including F1 and SERIAL bytes, DCC bytes, and K bytes to form a 2 Mbit/s overhead signal and transmits the 2 Mbit/s overhead signal to the system control and communication unit. Adjusts AU pointers and generates specific performance events. Checks higher order path overheads and generates specific alarms and performance events. Transmits pointer indication signals and VC-4 signals to the cross-connect unit.

Figure 1.48 Signal processing in the transmit direction of the SL1Q Step 1 Function Unit Overhead processing unit Processing Flow
O/E conversion unit

The board is directly controlled by the CPU unit on the system control and communication unit. The CPU unit issues configuration and query commands to the other units on the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus.
5 SDH Boards
The logic control unit decodes the address read/write signals from the system control and communication unit.
Clock Unit
5.2.4 Front Panel

There are indicators, ports, and a laser safety class label on the front panel.
Front Panel Diagram

Figure 1.1 Front panel of the SL1Q
SL1Q
TX3/RX3 STAT SRV LOS1 LOS2 LOS3 LOS4 TX1/RX1 TX2/RX2 TX4/RX4
Indicators
The front panel of the SL1Q has the following indicators: STAT, SRV, LOS1, LOS2, LOS3, and LOS4. For status explanation for the indicators, see Indicator Status Explanation.
Ports
Por t TX1/ RX1 Descriptio n Transmit/Rec eive port of the first STM1 optical port Transmit/Rec eive port of the second STM-1 optical port Transmit/Rec eive port of the third STM-1 optical port Connector Type Pin Assignmen t
Required Cable
LC SFP optical module

TX RX
11.1 Fiber Jumper
TX2/ RX2
TX3/ RX3
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Por t TX4/ RX4
Descriptio n Transmit/Rec eive port of the fourth STM-1 optical port
Connector Type
Pin Assignmen t
Required Cable
Labels

The SL1Q does not have any jumpers or DIP switches that are used for board settings.
5.2.6 Valid Slots

The SL1Q can be inserted in slots 1-6 in the chassis.
5.2.7 Feature Code

The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. SL1Q boards have feature codes. Figure 1.49 Feature code of the SL1Q Feature Code 01 02 03 04 Type of Optical Port S-1.1, eSFP optical module L-1.1, eSFP optical module L-1.2, eSFP optical module S-1.1, single-fiber bidirectional optical module (The operating wavelength of optical port 1 is 1550 nm and that of optical port 2 is 1310 nm.) L-1.1, single-fiber bidirectional optical module (The operating wavelength of optical port 1 is 1550 nm and that of optical port 2 is 1310 nm.)
05

This section describes the board specifications, including the parameters specified for optical
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ports, dimensions, weight, and power consumption. Table 5-11 lists the technical specifications of the SL1Q. Figure 1.50 Technical specifications of the SL1Q Item Service ports TX1/RX 1 TX2/RX 2 TX3/RX 3 TX3/RX 3 Dimensions (H x W x D) Weight Power consumption Transmit/Receive port of the first STM-1 optical port Transmit/Receive port of the second STM-1 optical port Transmit/Receive port of the third STM-1 optical port Transmit/Receive port of the fourth STM-1 optical port 19.82 mm x 193.80 mm x 225.80 mm 0.30 kg 4.3 W Performance For the performance of STM-1 optical ports, see Table 5-12.
Figure 1.51 Specifications of OptiX OSN 550's STM-1 optical ports Item Nominal bit rate Optical port type Transmission distance (km) Operating wavelength range (nm) Optical fiber type Launched optical power range (dBm) Receiver sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 155520 kbit/s S-1.1 2 to 15 1261 to 1360 Single-mode LC -15 to -8 -28 -8 8.2 L-1.1 20 to 40 1263 to 1360 Single-mode LC -5 to 0 -34 -10 10 L-1.2 60 to 80 1480 to 1580 Single-mode LC -5 to 0 -34 0 10
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Item
Value
NOTE Format of optical port type is defined as follows: transmission distance-signal rate.fiber type Explanation for optical port type "S-1.1" is as follows: "S" represents short distance; the first digit "1" represents STM-1 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-1.1" is as follows: "L" represents long distance; the first digit "1" represents STM-1 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-1.2" is as follows: "L" represents long distance; the first digit "1" represents STM-1 signals; the second digit "2" represents ITU-T G.652 fibers (1550 nm)..
5.3 SL4D
The SL4D is a 2xSTM-4 optical interface board. 5.3.1 Version Description The functional version of the SL4D is TNH2. 5.3.2 Functions and Features The SL4D receives and transmits 2xSTM-4 optical signals, performs O/E conversion for STM-4 optical signals, extracts and inserts overhead bytes, and reports alarms generated on the line. 5.3.3 Working Principle and Signal Flow The SL4D consists of an O/E conversion unit, an overhead processing unit, a logic control unit, and a clock unit. 5.3.4 Front Panel There are indicators, ports, a bar code, and a laser safety class label on the front panel. 5.3.5 DIP Switches and Jumpers None. 5.3.6 Valid Slots The SL4D can be inserted in slots 1-2 in the chassis. The logical slots of the SL4D on the NMS are the same as its physical slots. 5.3.7 Feature Code The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. SL4D boards have feature codes. 5.3.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.

The functional version of the SL4D is TNH2.
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The SL4D receives and transmits 2xSTM-4 optical signals, performs O/E conversion for STM-4 optical signals, extracts and inserts overhead bytes, and reports alarms generated on the line. Table 5-13 lists the functions and features that the SL4D supports. Figure 1.52 Functions and features that the SL4D supports Function and Feature Basic functions Optical port specifications Board

Receives and transmits 2xSTM-4 optical signals. Provides S-4.1, L-4.1, and L-4.2 optical ports. The characteristics of all optical ports comply with ITU-T G.957. Allows setting the on/off state of a laser and supports the automatic laser shutdown (ALS) function. Supports outband DCN. Processes VC-12, VC-3, and VC-4 services. Processes the section overheads of STM-4 signals. Processes higher order path overheads. Sets K-byte reporting, transmission, and passthrough. Provides transparent DCCs and orderwire byte channels. Sets and queries J0, J1, and C2 bytes. Processes AU pointers. Provides various alarms and performance events, facilitating equipment management and maintenance. Supports two-fiber unidirectional/bidirectional ring MSP. Supports linear MSP. Supports SNCP.
Optical module specifications
DCN Service processing Overhead processing
Pointer processing Alarms and performance events
Protection schemes
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Board

Inloops and outloops at optical ports Inloops and outloops on VC-4 paths for quick fault locating. Setting of overhead bytes to be sent/received. Enabling/Disabling SSMs on line optical ports Pass-through tests of line K bytes Setting of bit error threshold-crossing values and degrade thresholds ALS

The SL4D consists of an O/E conversion unit, an overhead processing unit, a logic control unit, and a clock unit.

Figure 1.1 Functional block diagram of the SL4D
STM-4
Logic control unit
System clock signal
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Figure 1.53 Signal processing in the receive direction of the SL4D Step 1 Function Unit O/E conversion unit Processing Flow

Regenerates STM-4 optical signals. Detects R_LOS alarms. Converts STM-4 optical signals into electrical signals. Restores clock signals. Aligns frames and detects R_LOS and R_LOF alarms. Descrambles signals. Checks B1 and B2 bytes and generates specific alarms and performance events. Checks the M1 byte and bits 6-8 of the K2 byte, and generates specific alarms and performance events. Detects the changes in the SSM in the S1 byte and reports the SSM status to the system control and communication unit. Extracts orderwire bytes, auxiliary channel bytes including F1 and SERIAL bytes, DCC bytes, and K bytes to form a 2 Mbit/s overhead signal and transmits the 2 Mbit/s overhead signal to the system control and communication unit. Adjusts AU pointers and generates specific performance events. Checks higher order path overheads and generates specific alarms and performance events. Transmits pointer indication signals and VC-4 signals to the cross-connect unit.

Figure 1.54 Signal processing in the transmit direction of the SL4D Step 1 Function Unit Overhead processing unit Processing Flow
O/E conversion unit
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The board is directly controlled by the CPU unit on the system control and communication unit. The CPU unit issues configuration and query commands to the other units of the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus. The logic control unit decodes the address read/write signals from the CPU unit of the system control and communication unit and enables FPGA loading.
Clock Unit
5.3.4 Front Panel

There are indicators, ports, a bar code, and a laser safety class label on the front panel.
Front Panel Diagram

Figure 5-6 shows the front panel of the SL4D. Figure 1.1 Front panel of the SL4D
SL4D
STAT SRV LOS1 LOS2
TX1/RX1
TX2/RX2
Indicators
The front panel of the SL4D has the following indicators: STAT, SRV, LOS1, and LOS2. For status explanation for the indicators, see Indicator Status Explanation.
Ports
Port TX1/R X1 Descriptio n Transmit/Recei ve port of the first STM-4 optical port Transmit/Recei ve port of the second STM-4 optical port Connector Type LC SFP optical module
TX RX
Pin Assignment
Required Cable 11.1 Fiber Jumper
TX2/R X2
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Labels

None.
5.3.6 Valid Slots

The SL4D can be inserted in slots 1-2 in the chassis. The logical slots of the SL4D on the NMS are the same as its physical slots.
5.3.7 Feature Code

The feature code of a board refers to the number next to the board name in the bar code and indicates the type of optical port. SL4D boards have feature codes. Figure 1.55 Feature code of the SL4D Feature Code 01 02 03 04 Type of Optical Port S-4.1, eSFP optical module L-4.1, eSFP optical module L-4.2, eSFP optical module S-4.1, single-fiber bidirectional optical module (The operating wavelength of optical port 1 is 1490 nm and that of optical port 2 is 1310 nm.)

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 5-17 lists the technical specifications of the SL4D. Figure 1.56 Technical specifications of the SL4D Item Service ports TX1/RX 1 TX2/RX 2 Dimensions (H x W x D) Weight
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Performance Transmit/Receive port of the first STM-4 optical port Transmit/Receive port of the second STM-4 optical port 19.82 mm x 193.80 mm x 225.80 mm 0.30 kg
For the performance of STM-4 optical ports, see Table 5-18.
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Item Power consumption 4.7 W
Performance
Figure 1.57 Specifications of OptiX OSN 550's STM-4 optical ports Item Nominal bit rate Optical port type Transmission distance (km) Operating wavelength range (nm) Optical fiber type Launched optical power range (dBm) Receiver sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Value 622080 kbit/s S-4.1 2 to 15 1274 to 1356 L-4.1 20 to 40 1280 to 1335 L-4.2 50 to 80 1480 to 1580
Single-mode LC -15 to -8 -28 -8 8.2
Single-mode LC -3 to +2 -28 -8 10
Single-mode LC -3 to +2 -28 -8 10
NOTE Format of optical port type is defined as follows: transmission distance-signal rate.fiber type Explanation for optical port type "S-4.1" is as follows: "S" represents short distance; the first digit "4" represents STM-4 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-4.1" is as follows: "L" represents long distance; the first digit "4" represents STM-4 signals; the second digit "1" represents ITU-T G.652 fibers (1310 nm). Explanation for optical port type "L-4.2" is as follows: "L" represents long distance; the first digit "4" represents STM-4 signals; the second digit "2" represents ITU-T G.652 fibers (1550 nm).
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6.1 SP3D
The SP3D is a 42xE1/T1 electrical interface board. 6.1.1 Version Description The functional version of the SP3D is TNH2. 6.1.2 Functions and Features
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The SP3D processes E1/T1 signals and overheads, and supports alarms, performance events, and maintenance features. 6.1.3 Working Principle and Signal Flow The SP3D consists of an interface unit, a CODEC unit, a mapping/demapping unit, a logic control unit, and a power supply unit. 6.1.4 Front Panel There are indicators and ports on the front panel. 6.1.5 DIP Switches and Jumpers None. 6.1.6 Valid Slots The SP3D can be inserted in slots 1-6 in the chassis. The logical slots of the SP3D on the NMS are the same as its physical slots. 6.1.7 Feature Code The feature code of the SP3D indicates the E1/T1 port impedance. 6.1.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.

The functional version of the SP3D is TNH2.
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The SP3D processes E1/T1 signals and overheads, and supports alarms, performance events, and maintenance features. Table 6-1 lists the functions and features that the SP3D supports. Figure 1.58 Functions and features that the SP3D supports Function and Feature Service processing Overhead processing Alarms and performance events Maintenance features Board Receives/Transmits and processes 42xE1/T1 signals. Processes path overheads at the VC-12 level such as J2 and V5. Provides various alarms and performance events, facilitating equipment management and maintenance.

Inloops and outloops at electrical ports Warm resets and cold resets (with warm resets having no impact on services) Board manufacturing information query PRBS tests

The SP3D consists of an interface unit, a CODEC unit, a mapping/demapping unit, a logic control unit, and a power supply unit.
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Figure 1.1 Functional block diagram of the SP3D
Backplane E1/T1 signal E1/T1 Interface unit E1/T1 CODEC unit Mapping/ Demapping unit Service bus Cross-connect unit
Control bus +3.3 V power supplied to the board +3.3 V backup power supplied to the board Clock signal provided to the other units on the board
Logic control unit
System control and communication unit -48 V1(DC power input) -48 V2(DC power input) -53.5 V(AC power input) +3.3 V
Power supply unit
Clock unit
System clock signal

Figure 1.59 Signal processing in the receive direction of the SP3D Step 1 2 Function Unit Interface unit CODEC unit Processing Flow Couples external E1/T1 signals by using a transformer and then transmits the signals to the board.

Equalizes the received signals. Restores clock signals. Detects T_ALOS alarms. Performs HDB3 decoding.
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Step 3
Function Unit Mapping/Demappin g unit
Processing Flow

Asynchronously maps signals into C-12s. Adds path overhead bytes to C-12s to form VC-12s. Processes pointers to form TU-12s. Performs byte interleaving for three TU-12s to form one TUG-2. Performs byte interleaving for seven TUG-2s to form one TUG-3. Performs byte interleaving for three TUG-3s to form one C-4. Adds higher order path overhead bytes to one C-4 to form one VC-4. Processes clock signals. Transmits VC-4 signals and pointer indication signals to the active and standby cross-connect units.

Figure 1.60 Signal processing in the transmit direction of the SP3D Step 1 Function Unit Logic processing unit Mapping/Demappin g unit Processing Flow

Processes clock signals. Receives VC-4 signals and pointer indication signals from the cross-connect unit. Demultiplexes three TUG-3s from one VC-4. Demultiplexes seven TUG-2s from one TUG-3. Demultiplexes three VC-12s from one TUG-2. Processes path overheads and pointers and detects specific alarms and performance events. Extracts E1/T1 signals.
3 4
CODEC unit Interface unit
Performs HDB3 coding. Couples E1/T1 signals by using a transformer and then transmits the signals to an external cable.

The board is directly controlled by the CPU unit on the system control and communication unit. The CPU unit issues configuration and query commands to the other units of the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus. The logic control unit decodes the address read/write signals from the CPU unit of the system
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control and communication unit.
Power Supply Unit

Clock Unit
6.1.4 Front Panel

Front Panel Diagram

Figure 6-2 shows the front panel of the SP3D. Figure 1.1 Front panel of the SP3D
21 STAT SRV 1 22 42
Indicators
The front panel of the SP3D has the following indicators: STAT and SRV. For status explanation for the indicators, see Indicator Status Explanation.
Ports
Por t 1-21 Description Connector Type Pin Assignme nt See Table 6-4.
POS.1
Require d Cable 11.5 E1/T1 Cable
Receives and transmits the first to twenty-first E1/T1 signals. Receives and transmits the twenty-second to forty-second E1/T1 signals.
Anea 96
2242
POS.96
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SP3D
SP3D
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Figure 1.61 Pin assignments for an Anea 96 port Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Signal The first received E1 differential signal (+) The first received E1 differential signal (-) The second received E1 differential signal (+) The second received E1 differential signal (-) The third received E1 differential signal (+) The third received E1 differential signal (-) The fourth received E1 differential signal (+) The fourth received E1 differential signal (-) The fifth received E1 differential signal (+) The fifth received E1 differential signal (-) The sixth received E1 differential signal (+) The sixth received E1 differential signal (-) The seventh received E1 differential signal (+) The seventh received E1 differential signal (-) The eighth received E1 differential signal (+) The eighth received E1 differential signal (-) The ninth received E1 differential signal (+) The ninth received E1 differential signal (-) The tenth received E1 differential signal (+) Pin 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Signal The first transmitted E1 differential signal (+) The first transmitted E1 differential signal (-) The second transmitted E1 differential signal (+) The second transmitted E1 differential signal (-) The third transmitted E1 differential signal (+) The third transmitted E1 differential signal (-) The fourth transmitted E1 differential signal (+) The fourth transmitted E1 differential signal (-) The fifth transmitted E1 differential signal (+) The fifth transmitted E1 differential signal (-) The sixth transmitted E1 differential signal (+) The sixth transmitted E1 differential signal (-) The seventh transmitted E1 differential signal (+) The seventh transmitted E1 differential signal (-) The eighth transmitted E1 differential signal (+) The eighth transmitted E1 differential signal (-) The ninth transmitted E1 differential signal (+) The ninth transmitted E1 differential signal (-) The tenth transmitted E1 differential signal (+)
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Pin 20 21 22 23 24 49 50 51 52 53 54 55 56
Signal The tenth received E1 differential signal (-) The eleventh received E1 differential signal (+) The eleventh received E1 differential signal (-) The twelfth received E1 differential signal (+) The twelfth received E1 differential signal (-) The thirteenth received E1 differential signal (+) The thirteenth received E1 differential signal (-) The fourteenth received E1 differential signal (+) The fourteenth received E1 differential signal (-) The fifteenth received E1 differential signal (+) The fifteenth received E1 differential signal (-) The sixteenth received E1 differential signal (+) The sixteenth received E1 differential signal (-)
Pin 44 45 46 47 48 73 74 75 76 77 78 79 80
Signal The tenth transmitted E1 differential signal (-) The eleventh transmitted E1 differential signal (+) The eleventh transmitted E1 differential signal (-) The twelfth transmitted E1 differential signal (+) The twelfth transmitted E1 differential signal (-) The thirteenth transmitted E1 differential signal (+) The thirteenth transmitted E1 differential signal (-) The fourteenth transmitted E1 differential signal (+) The fourteenth transmitted E1 differential signal (-) The fifteenth transmitted E1 differential signal (+) The fifteenth transmitted E1 differential signal (-) The sixteenth transmitted E1 differential signal (+) The sixteenth transmitted E1 differential signal (-)

None.
6.1.6 Valid Slots

The SP3D can be inserted in slots 1-6 in the chassis. The logical slots of the SP3D on the NMS are the same as its physical slots.
6.1.7 Feature Code

The feature code of the SP3D indicates the E1/T1 port impedance.
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Figure 1.62 Feature code of the SP3D Feature Code A B Port Impedance (Ohm) 120 75

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 6-6 lists the technical specifications of the SP3D. Figure 1.63 Technical specifications of the SP3D Item Service ports 1-21 22-42 Dimensions (H x W x D) Weight Power consumption Receives and transmits the first to twentyfirst E1/T1 signals. Receives and transmits the twenty-second to forty-second E1/T1 signals. 19.82 mm x 193.80 mm x 225.80 mm 0.85 kg 11.5 W Performance See Table 6-7.
Figure 1.64 Specifications of OptiX OSN 550's E1/T1 electrical ports Electrical Port Type Code pattern Waveform at the output port Signal bit rate at the output port Allowed attenuation at the input port Permitted frequency deviation at the input port Input jitter tolerance Anti-interference capability at the input port Complies with ITU-T G.823. Complies with ITU-T G.824. Complies with ITU-T G.823. Complies with ITU-T G.703. 1544 kbit/s B8ZS code, AMI code Complies with ITU-T G.703. 2048 kbit/s HDB3 code
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Electrical Port Type Reflection attenuation at the input and output ports Output jitter Mapping jitter Combined jitter Jitter transfer function Port type
1544 kbit/s -
2048 kbit/s Complies with ITU-T G.703.
Complies with ITU-T G.823 and G.824. Complies with ITU-T G.783.
Anea 96
Complies with ITU-T G.742.
6.2 PL3T
The PL3T is a 3xE3/T3 electrical interface board. 6.2.1 Version Description The functional version of the PL3T is TNH2. 6.2.2 Functions and Features The PL3T processes E3/T3 signals and overheads, and supports alarms, performance events, and maintenance features. 6.2.3 Working Principle and Signal Flow The PL3T consists of an interface unit, a CODEC unit, a mapping/demapping unit, and a logic control unit. 6.2.4 Front Panel There are indicators and ports on the front panel. 6.2.5 DIP Switches and Jumpers The PL3T does not have any jumpers or DIP switches that are used for board settings. 6.2.6 Valid Slots The PL3T can be inserted in slots 1-6 in the chassis. 6.2.7 Feature Code PL3T boards do not have feature codes. 6.2.8 Technical Specifications This section describes the board specifications, including the parameters specified for electrical ports, dimensions, weight, and power consumption.

The functional version of the PL3T is TNH2.
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The PL3T processes E3/T3 signals and overheads, and supports alarms, performance events, and maintenance features. Table 6-8 lists the functions and features that the PL3T supports. Figure 1.65 Functions and features that the PL3T supports Function and Feature Service processing Overhead processing Alarms and performance events Maintenance features Board Receives/Transmits and processes 3xE3/T3 signals. Sets and queries all path overheads at the VC-3 level. Provides various alarms and performance events, facilitating equipment management and maintenance.

Inloops and outloops at electrical ports Warm resets and cold resets (with warm resets having no impact on services) Board manufacturing information query Board temperature detection PRBS tests Hot board swapping

The PL3T consists of an interface unit, a CODEC unit, a mapping/demapping unit, and a logic control unit. This section describes how the PL3T processes one E3/T3 signal, and it serves as an example to describe the working principle and signal flow of the PL3T. Figure 6-3 shows the functional block diagram of the PL3T.
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Figure 1.1 Functional block diagram of the PL3T

Backplane E3/T3 signal Interface unit E3/T3 CODEC unit Mapping/ Demapping unit Service bus Cross-connect unit
E3/T3
Control bus
Logic control unit
+3.3 V backup power supplied to the board Clock signal provided to the other units on the board Clock unit
+3.3 V System clock signal

Figure 1.66 Signal processing in the receive direction of the PL3T Step 1 2 Function Unit Interface unit CODEC unit Processing Flow Couples external E3/T3 signals by using a transformer and then transmits the signals to the board.

Equalizes the received signals. Restores clock signals. Detects T_ALOS alarms. Performs HDB3 decoding. Asynchronously maps the signal into C-3. Processes path overheads and forms the signal to be VC-3. Processes pointers and forms the signal to be TU-3. One TU-3 is multiplexed into one TUG-3. Three TU-3s are performed with byte interleaving and are multiplexed into one C-4. C-4 is added with higher order path overheads and the VC-4 is formed. Processes clock signals. Transmits VC-4 signals and pointer indication signals to the active and standby cross-connect units.
96
Mapping/Demappin g unit
Logic control unit
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Figure 1.67 Signal processing in the transmit direction of the PL3T Step 1 Function Unit Logic control unit Processing Flow

Processes clock signals. Receives VC-4 signals and pointer indication signals from the cross-connect unit. Demultiplexes three TUG-3s from one VC-4. Demultiplexes one TU-3 from one TUG-3. Demultiplexes one VC-3 from one TU-3. Processes path overheads and pointers and detects specific alarms and performance events. Extracts E3/T3 signals.
Mapping/Demappin g unit
3 4
CODEC unit Interface unit
Performs HDB3 coding. Couples E3/T3 signals by using a transformer and then transmits the signals to an external cable.

The board is directly controlled by the CPU unit on the system control and communication unit. The CPU unit issues configuration and query commands to the other units on the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus. The logic control unit decodes the address read/write signals from the system control and communication unit.
Clock Unit
6.2.4 Front Panel

Front Panel Diagram

Figure 6-4 shows the front panel of the PL3T.
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Figure 1.1 Front panel of the PL3T

STAT SRV
TX1
RX1
TX2
RX3
TX3
RX3
Indicators
The front panel of the PL3T has the STAT and SRV indicators. For status explanation for the indicators, see Indicator Status Explanation.
Ports
The front panel of the PL3T has three electrical ports. Table 6-11 describes the type and usage of the electrical ports of the PL3T. Figure 1.68 Electrical ports of the PL3T Por t TX1TX3 Description Transmits the first to third E3/T3 signals. Connector Type SMB Pin Assignment
Required Cable 11.6 E3/T3 Cable
Inner core: transmitting data (+) Outer core: transmitting data (-) Inner core: transmitting data (+) Outer core: transmitting data (-)
RX1RX3
Receives the first to third E3/T3 signals.

The PL3T does not have any jumpers or DIP switches that are used for board settings.
6.2.6 Valid Slots

The PL3T can be inserted in slots 1-6 in the chassis.
6.2.7 Feature Code

PL3T boards do not have feature codes.

This section describes the board specifications, including the parameters specified for electrical ports, dimensions, weight, and power consumption.
PL3T
PL3T
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Table 6-12 lists the technical specifications of the PL3T. Figure 1.69 Technical specifications of the PL3T Item Service ports TX1TX3 RX1RX3 Dimensions (H x W x D) Weight Power consumption Transmits the first to third E3/T3 signals. Receives the first to third E3/T3 signals. 19.82 mm x 193.80 mm x 225.80 mm 0.30 kg 5.0 W Performance See Table 6-13.
Figure 1.70 Specifications of OptiX OSN 550's E3/T3 electrical ports Parameter Bit rate Number of ports Code pattern Connector Impedance (ohm) Signal bit rate at the output port Permitted frequency deviation at the input port Allowed attenuation at the input port Input jitter tolerance Complies with ITU-T G.823. Complies with ITU-T G.824. Nominal Value 34368 kbit/s 3xE3/T3 HDB3 SMB 75 Complies with ITU-T G.703. B3ZS SMB 75 44736 kbit/s
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7.1 AUX
7.1.1 Version Description The functional version of the AUX is TNM1. 7.1.2 Functions and Features
Auxiliary Boards
The AUX is an auxiliary interface board that provides one orderwire phone port, one 64 kbit/s synchronous transparent data port, one 19.2 kbit/s asynchronous transparent data port, and alarm input/output ports.
The AUX provides one orderwire phone port, one external clock port, one 64 kbit/s synchronous data port, one 19.2 kbit/s asynchronous transparent data port, and one outdoor cabinet monitoring port. 7.1.3 Working Principle and Signal Flow This section describes the working principle and signal flow of the AUX. 7.1.4 Front Panel There are indicators and ports on the front panel. 7.1.5 DIP Switches and Jumpers None. 7.1.6 Valid Slots The AUX can be inserted in slots 1-6 in the chassis. The logical slots of the AUX on the NMS are the same as its physical slots. 7.1.7 Feature Code None. 7.1.8 Technical Specifications This section describes the board specifications, including the port performance, dimensions, weight, and power consumption.
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The functional version of the AUX is TNM1.

The AUX provides one orderwire phone port, one external clock port, one 64 kbit/s synchronous data port, one 19.2 kbit/s asynchronous transparent data port, and one outdoor cabinet monitoring port. Table 7-1 lists the functions and features that the AUX supports. Figure 1.71 Functions and features that the AUX supports Function and Feature Synchronous/Asynchronous transparent data port External clock port Alarm input/output ports Outdoor cabinet monitoring port Board Provides one 64 kbit/s synchronous transparent data port or 19.2 kbit/s asynchronous transparent data port. Provides one 120-ohm, two-channel clock input/output port for connecting to BITS. Provides alarm ports with six inputs and two outputs. Provides one outdoor cabinet monitoring port (sharing one port physically with an alarm input/output port) for monitoring the temperature and humidity of an outdoor cabinet. Provides one orderwire phone port so that operation/maintenance engineers at different workstations can have voice communication with each other.
Orderwire phone port

This section describes the working principle and signal flow of the AUX.
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Figure 1.1 Functional block diagram of the AUX
Backplane
Synchronous/Asynchronous transparent data port Orderwire phone port 6-input/2-output alarm ports Two-channel external clock port Outdoor cabinet monitoring port Orderwire unit
Power supply unit Power dip detection signal System bus
+3.3V
Logic control unit
Clock unit
Clock Board status signal detection unit
Power Supply Unit
Receives the +3.3 V power supply from the backplane and supplies it to the other units on the AUX. Receives and shuts down control signals.
Orderwire Unit
Provides one 64 kbit/s synchronous transparent data port or one 19.2 kbit/s asynchronous transparent data port. Provides one orderwire phone port. Provides 6-input/2-output alarm ports. Provides one outdoor cabinet monitoring port. Provides one two-channel external clock port.
Logic Control Unit
Provides an interface with the CPU unit and works with the CPU unit to control the board. Processes orderwire bytes and overhead bytes. Processes clock signals. Provides board status information. Checks the status of the active and standby system control, switching, and timing boards. Checks the status of the active and standby clocks. Switches system clock reference sources automatically or by running specific commands. Detects and reports the status of the key clock for each board in the system. Detects the presence of the key clock for each board in the system and reports specific alarms if any key clock is found lost.
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Board Status Detection Unit

Detects board performance data such as board temperature and voltage. Controls power shut-down. Stores and reads board manufacturing information.
Clock Unit
Provides clock signals to the logic control unit.
7.1.4 Front Panel

Front Panel Diagram

AU X
STAT SRV
F1/ S1
PHO NE
ALM O
ALM I
ALM 2/ EXT I
SYNC
TO 0 D
TO 1 D
Indicators
The front panel of the AUX has the following indicators: STAT and SRV. For status explanation for the indicators, see Indicator Status Explanation.
Ports
Figure 1.72 Description of the ports on the AUX Po rt F1/ S1 Descri ption 64 kbit/s synchrono us transparen t data port or 19.2 kbit/s asynchron ous transparen t data port Connector Type RJ-45 Pin Assignment
Required Cable 11.7 Network Cable
Pin 1: Transmitting asynchronous data signals Pin 2: Grounding end Pin 3: Receiving asynchronous data signals Pin 4: Transmitting synchronous data signals (TIP) Pin 5: Transmitting synchronous data signals (RING) Pin 6: Grounding end Pin 7: Receiving synchronous data signals (TIP) Pin 8: Receiving synchronous data signals (RING)
87 65 432 1
For status explanation for the indicators of an RJ-45 port, see Table 7-3.
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Po rt PH ON E
Descri ption Orderwire phone port
Connector Type
Pin Assignment

Required Cable
Pin 1: Not defined Pin 2: Not defined Pin 3: Not defined Pin 4: Orderwire signal 1 Pin 5: Orderwire signal 2 Pin 6: Not defined Pin 7: Not defined Pin 8: Not defined Pin 1: The first external alarm output signal (+) Pin 2: The first external alarm output signal (-) Pin 3: The second external alarm output signal (+) Pin 4: The first external alarm output signal (+) Pin 5: The first external alarm output signal (-) Pin 6: The second external alarm output signal (-) Pin 7: The second external alarm output signal (+) Pin 8: The second external alarm output signal (-) Pin 1: The first external alarm input signal Pin 2: Grounding end for the first alarm input signal Pin 3: The second external alarm input signal Pin 4: The third external alarm input signal Pin 5: Grounding end for the second alarm input signal Pin 6: Grounding end for the third alarm input signal Pin 7: The fourth external alarm input signal Pin 8: Grounding end for the fourth alarm input signal
AL MO
Alarm output port
AL MI1
Alarm input port 1 (four inputs)
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Po rt AL MI2 /EX T
Descri ption Alarm input port 2 (two inputs)/O utdoor cabinet monitorin g port
Connector Type
Pin Assignment
Required Cable
Pin 1: The first external alarm input signal Pin 2: Grounding end for the first alarm input signal Pin 3: Receiving outdoor cabinet monitoring signal (-) Pin 4: The third external alarm input signal Pin 5: Grounding end for the second alarm input signal Pin 6:Receiving outdoor cabinet monitoring signal (+) Pin 7: Transmitting outdoor cabinet monitoring signal (-) Pin 8: Transmitting outdoor cabinet monitoring signal (+) -
SY NC TO D0 TO D1
Reserved Reserved Reserved
Currently, the port indicated by silkscreen "EXT" does not function.
Labels
The front panel has an ESD label.
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None.
7.1.6 Valid Slots

The AUX can be inserted in slots 1-6 in the chassis. The logical slots of the AUX on the NMS are the same as its physical slots.
7.1.7 Feature Code

None.

This section describes the board specifications, including the port performance, dimensions, weight, and power consumption. Table 7-4 lists the technical specifications of the AUX. Figure 1.74 Technical specifications of the AUX Item Ports F1/S1 64 kbit/s synchronous transparent data port or 19.2 kbit/s asynchronous transparent data port Orderwire phone port Alarm output port Alarm input port 1 (four inputs) Alarm input port 2 (two inputs)/Outdoor cabinet monitoring port Reserved Reserved Reserved Performance See Table 7-5 and Table 7-6.
PHONE ALMO ALMI1 ALMI2/E XT SYNC TOD0 TOD1 Dimensions (H x W x D) Weight Power consumption
See Table 7-7. Not involved Not involved For the outdoor cabinet monitoring port, seeTable 7-8. Not involved Not involved Not involved 19.82 mm x 193.80 mm x 225.80 mm 0.30 kg 2.5 W
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Figure 1.75 Specifications of synchronous data ports supported by the OptiX OSN 550 Item Transmission channel Bit rate (kbit/s) Port type Characteristics of ports Performance Byte F1 in the SDH overhead 64 Codirectional Complies with ITU-T G.703
Figure 1.76 Specifications of asynchronous data ports supported by the OptiX OSN 550 Item Transmission channel Bit rate (kbit/s) Characteristics of ports Performance User-defined byte in the SDH overhead 19.2 Complies with RS-232
Figure 1.77 Specifications of orderwire ports supported by the OptiX OSN 550 Item Transmission channel Orderwire type Pair in each direction Impedance (ohm) Performance Bytes E1 and E2 in the SDH overhead Addressing call One symmetrical pair 600
Figure 1.78 Outdoor cabinet monitoring ports supported by the OptiX OSN 550 Item Characteristics of ports Performance Complies with RS-485
7.2 FAN
The FAN is a fan board that dissipates heat for the chassis by means of air cooling. 7.2.1 Version Description The functional version of the FAN is TNM1. 7.2.2 Functions and Features
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The FAN adjusts the fan rotating speed, and detects and reports the fan status. 7.2.3 Working Principle and Signal Flow The FAN consists of a fan unit, a power unit, and a communication monitoring unit. 7.2.4 Front Panel There are indicators and ports on the front panel. 7.2.5 Valid Slots The FAN can be inserted in slot 93 in the chassis. The logical slot of the FAN on the NMS is the same as its physical slot. 7.2.6 Technical Specifications This section describes the board specifications, including dimensions, weight, and power consumption.

The functional version of the FAN is TNM1.

The FAN adjusts the fan rotating speed, and detects and reports the fan status. Table 7-9 lists the functions and features that the FAN supports. Figure 1.79 Functions and features that the FAN supports Function and Feature Power input Board Accesses two +12 V power supplies from the active and standby system control, switching, and timing boards. The two +12 V power supplies provide 1+1 backup for each other. 6 Supported Provides soft-start for the power supply of the fans and protects fans against overcurrent.
Number of fans Intelligent fan speed adjustment Protection
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Function and Feature OM features
Board
Reports the information about the fan rotating speed, alarms, version number, and board in-position status. Reports specific alarms when a fan fails or is aged. Detects the power supply status of a fan, and reports specific alarms when the power supplied to a fan fails. Reports specific alarms when the FAN board is offline and stops detecting fan status if the FAN board is offline. Supports intelligent fan speed adjustments, fan speed adjustments in specific areas, and fan shut-down at low temperature. Therefore, when the ambient temperature is lower than a threshold (determined by the actual ambient temperature and fan gear interval), fans automatically work at the lowest gear. Supports hot board swapping.

The FAN consists of a fan unit, a power unit, and a communication monitoring unit.

Figure 1.1 Functional block diagram of the FAN
Backplane
Fan unit
12 V
12 V Power unit 12 V
Communication detection signal Communication detection signal
Communication monitoring unit
Power Unit

Receives +12 V power from the backplane. Provides the fan power with soft-start and overcurrent protection functions.
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Fan Unit
Six air-cooling fans dissipate the heat generated by the system.
Communication Monitoring Unit
Detects the manufacturing information, PCB version information, and ambient temperature of the FAN, and reports the information to the system control and communication unit. Detects the fan rotating speed and adjusts the speed according to the pulse-width modulation signal from the system control and communication unit. The system adjusts the fan rotating speed based on the working temperature, as listed in Table 7-10.
Figure 1.80 Adjustment of the fan rotating speed Working Temperature 25C 25C to 60C 60C Rotating Speed 3200 rounds/minute Linear increase in accordance with the temperature 16000 rounds/minute
7.2.4 Front Panel

Front Panel Diagram

Figure 7-3 shows the front panel of the FAN.
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Figure 1.1 Front panel of the FAN
OptiX OSN 550

FAN
CRIT
MAJ
MIN
Indicators
The front panel of the FAN has the following indicators: FAN, CRIT, MAJ, and MIN. For status explanation for the indicators, see Indicator Status Explanation.
The CRIT, MAJ, or MIN indicator on the front panel of the FAN indicates the current alarm severity of the subrack.
ESD Wrist Strap Jack

An ESD wrist strap needs to be connected to the ESD wrist strap jack to achieve the proper grounding of the human body.
Labels
The front panel of the FAN has the following labels:

ESD protection label: indicates that the equipment is static-sensitive. Fan warning label: warns you not to touch fan leaves before the fan stops.
7.2.5 Valid Slots

The FAN can be inserted in slot 93 in the chassis. The logical slot of the FAN on the NMS is the same as its physical slot.

This section describes the board specifications, including dimensions, weight, and power
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consumption. Table 7-11 lists the technical specifications of the FAN. Figure 1.81 Technical specifications of the FAN Item Dimensions (H x W x D) Weight Power consumption Performance 28.5 mm x 86.2 mm x 217.6 mm 0.30 kg

Room temperature: 12.0 W High temperature: 29.6 W
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8.1 PIU
8.1.1 Version Description The functional version of the PIU is TND1. 8.1.2 Functions and Features
Power Boards
The PIU is a power interface board. The OptiX OSN 550 supports two PIUs, each of which accesses one -48 V/-60 V DC power supply.
The PIU supports power access, power protection, surge protection status monitoring, and information reporting. 8.1.3 Working Principle and Signal Flow This section describes the working principle and signal flow of the PIU. 8.1.4 Front Panel There are indicators, power access ports, and a label on the front panel. 8.1.5 Valid Slots The PIU can be inserted in slots 91 and 92. The logical slots of the PIU on the NMS are the same as its physical slots. 8.1.6 Technical Specifications This section describes the board specifications, including dimensions, weight, power consumption, and input voltage.

The functional version of the PIU is TND1.

The PIU supports power access, power protection, surge protection status monitoring, and information reporting. Table 8-1 lists the functions and features that the PIU supports.
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Figure 1.82 Functions and features that the PIU supports Function and Feature Basic functions Power access Maximum power supply capability Maximum current Power output Protection Protection mode Power protection Surge protection Detection functions Board Two PIUs are provided and each accesses one -48 V DC or -60 V DC power input. The maximum power supply capability of each input is 550 W. 15 A The PIU provides other boards with -48 V power. 1+1 HSB

Protection against overcurrent Protection against short circuits
Supported Input power detection Surge protection status detection Temperature detection Detection of input overvoltage, input undervoltage, and output overvoltage
Hot board swapping

This section describes the working principle and signal flow of the PIU.
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Figure 1.1 Functional block diagram of the PIU
Backplane
-48 V/-60 V
Protection and detection unit
EMI filtering unit
-48 V
Board operating in distributed power supply mode
Detection signal Communication control unit
Detection signal
System control and communication unit +3.3 V
Protection and Detection Unit

The protection and detection unit primarily protects and detects the PIU. It performs the following functions:

Provides protection against lightning strike and surge. Detects whether the surge-protection circuit fails and reports a surge-protection failure alarm if there is any. Monitors PIU temperature in real time and reports it to the system control and communication unit through the communication control unit.
EMI Filtering Unit

The EMI filtering unit performs electro-magnetic interference (EMI) filtering.
DC/DC Unit
The DC/DC unit converts the input -48 V power into the voltages that each part of the system requires. The DC/DC unit performs the following functions:
Converts -48 V power into +3.3 V power and supplies +3.3 V power to the communication control unit of the PIU. Converts -48 V power into +3.3 V power and supplies +3.3 V power to other boards. Converts -48 V power into +5.0 V power and supplies +5.0 V power to the power detection unit of the PIU.
Communication Control Unit

The communication control unit controls the communication between the system control and communication unit and the PIU and reports the following information to the system control and communication unit:

PIU manufacturing information PCB version information

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Surge-protection failure information PIU temperature
8.1.4 Front Panel

There are indicators, power access ports, and a label on the front panel.
Front Panel Diagram

Figure 1.1 Front panel of the PIU
NEG(-) RTN(+)
Indicators
The front panel of the PIU has the following indicator: PWR. For status explanation for the indicator, see Indicator Status Explanation.
Ports
The PIU accesses one power supply. Table 8-2 lists the types of the ports on the PIU and their respective usage. Figure 1.83 Description of the ports on the PIU Port NEG1(-) RTN1(+) Description -48 V power input port BGND power input port Connector Type 2 mm HM power connector, 2x2 pins Required Cable 11.2 DC Power Cable
Labels
Power caution label: instructs you to read related instructions before performing any powerrelated tasks.
PWR
-48V
-60V
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Do not remove or install a PIU while the equipment is being powered on. That is, turn off all the power supplies to the PIU before removing or installing it.
8.1.5 Valid Slots

The PIU can be inserted in slots 91 and 92. The logical slots of the PIU on the NMS are the same as its physical slots.

This section describes the board specifications, including dimensions, weight, power consumption, and input voltage. Table 8-3 lists the technical specifications of the PIU. Figure 1.84 Technical specifications of the PIU Item Dimensions (H x W x D) Weight Power consumption Input voltage Performance 21.0 mm x 41.4 mm x 229.9 mm 0.12 kg 0.5 W -38.4 V to -72.0 V
8.2 APIU
The APIU is an AC power interface board and supplies 100 V to 240 V AC power to the equipment. 8.2.1 Version Description The functional version of the APIU is TNF1. 8.2.2 Functions and Features The APIU supports access of 100 V to 240 V AC power and converts it into -53.5 V DC power. 8.2.3 Working Principle and Signal Flow This section describes the working principle and signal flow of the APIU. 8.2.4 Front Panel There are indicators, power access ports, and switches on the front panel. 8.2.5 Valid Slots The APIU can be inserted in two slot pairs, namely, slots 2 and 4 and slots 4 and 6. Slots 4 and 6 are recommended.
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8.2.6 Technical Specifications This section describes the board specifications, including dimensions, weight, power consumption, and input voltage.

The functional version of the APIU is TNF1.

The APIU supports access of 100 V to 240 V AC power and converts it into -53.5 V DC power. Table 8-4 lists the functions and features that the APIU supports. Figure 1.85 Functions and features that the APIU supports Function and Feature Basic functions Power access Board One APIU enables access of two 100 V to 240 V AC power inputs. One APIU supports two power modules, namely, AC1 and AC2. The two power modules are separately inserted in two boxes. Both power modules and their boxes are independently pluggable. 200 W The APIU provides the other boards with -53.5 V power. 1+1 HSB

Supply power Power output Protection Protection scheme Power protection
Protection against output overvoltage Protection against output overcurrent Protection against short circuits in output power Protection against overtemperature
Surge protection Monitoring functions
Supported Input power monitoring Surge protection status monitoring Temperature monitoring Monitoring of input overvoltage, input undervoltage, and output overvoltage
Hot swapping
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This section describes the working principle and signal flow of the APIU.

Figure 1.1 Functional block diagram of the APIU
Backplane
100~220V
Protection and detection unit
EMI filtering unit
-53.5 V
Board operating in distributed power supply mode
Detection signal Communication control unit
Detection signal
System control and communication unit +3.3 V
Protection and Detection Unit

The protection and detection unit primarily protects and detects the APIU. It performs the following functions:

Provides protection against lightning strike and surge. Detects whether the surge-protection circuit fails and reports a surge-protection failure alarm if there is any. Monitors APIU temperature in real time and reports it to the system control and communication unit through the communication control unit.
EMI Filtering Unit

The EMI filtering unit performs electro-magnetic interference (EMI) filtering.
Communication Control Unit

The communication control unit controls the communication between the system control and communication unit and the APIU and reports the following information to the system control and communication unit:

APIU manufacturing information PCB version information Surge-protection failure information APIU temperature
8.2.4 Front Panel

There are indicators, power access ports, and switches on the front panel.
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Front Panel Diagram

Figure 1.1 Front panel of the APIU
APIU ON APIU ON AC2
INPUT OUTPUT INPUT OUTPUT 100-240V;50/60Hz;3.5A
AC1
OFF
OFF
100-240V;50/60Hz;3.5A
Indicators
The front panel of the APIU has the INPUT and OUTPUT indicators. For status explanation for the indicators, see Indicator Status Explanation.
Ports
The APIU enables access of two power supplies. Table 8-5 lists the types of the ports on the APIU and their respective usage. Figure 1.86 Description of the ports on the APIU Port ~100240V;50/60Hz ;3.5A Description Enables access of 100 V to 240 V AC power. Connector Type Three-phase socket Required Cable 11.3 AC Power Cable
Switches
The front panel of the APIU has two ON/OFF switches and they control the two AC power ports.
8.2.5 Valid Slots

The APIU can be inserted in two slot pairs, namely, slots 2 and 4 and slots 4 and 6. Slots 4 and 6 are recommended.

This section describes the board specifications, including dimensions, weight, power consumption, and input voltage.
Mechanical Specifications
The mechanical specifications of the APIU are as follows:

Dimensions (H x W x D): 40.1 mm x 193.8 mm x 208.7 mm Weight: 1.93 kg

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Power Consumption

At room temperature (25C): 20.0 W At high temperature (55C): 30.0 W
Input Voltage
Input voltage range: 100 V to 240 V AC power
Output Voltage
Output voltage: -53.5 V DC power
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9
9.1 Functions
A filler panel provides the following functions:

Filler Panel
A filler panel performs electromagnetic shielding for a chassis, prevents foreign objects from entering a chassis, and ensures proper circulating of cooling air in a chassis.
Performs electromagnetic shielding for a chassis. Prevents foreign objects from entering a chassis. Prevents the exposure of internal voltage. Ensures proper circulating of cooling air in a chassis.
9.2 Appearance and Valid Slots

This section provides the front panel of and slots valid for a filler panel. The OptiX OSN 550 supports three types of filler panels with different dimensions: filler panel for the PCX and extended boards, filler panel for the PIU, and filler panel for the APIU.
Appearance
Figure 1.1 Filler panel for the PCX and extended boards
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Figure 1.2 Filler panel for the PIU
Figure 1.3 Filler panel for the APIU
Valid Slots
lists the slots valid for a filler panel. Figure 1.87 Slots valid for a filler panel Type of Filler Panel Filler panel for the PCX and extended boards Filler panel for the PIU Filler panel for the APIU Valid Slot Slots 1-8 Slot 91-92 Slots 2 and 4, slots 4 and 6
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10
10.1 Overview
Appearance
Pluggable Optical Modules
SFP/eSFP optical modules are SFP optical transceivers and are used for SDH optical communication and Ethernet data communication. XFP optical modules are 10-gigabit SFP optical transceivers and are used for SDH optical communication and GE/10GE data communication.
Figure 10-1 shows the appearances of an SFP/eSFP optical module, and Figure 10-2 shows the appearance of an XFP optical module. Figure 1.1 SFP/eSFP optical module
Dimensions (H x W x D): 8.5 mm x 13.4 mm x 56.5 mm
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Figure 1.2 XFP optical module
Dimensions (H x W x D): 8.5 mm x 18.3 mm x 78 mm
Part Number
Part numbers identify different types of optical modules and are contained in labels. Labels are attached to pluggable optical modules, as shown in the following figure. Figure 10-3 shows a label for a pluggable optical module. Figure 1.1 Label for a pluggable optical module
You can obtain the specifications of an optical module by querying its part number in this document.
10.2 SFP/eSFP Optical Modules

This section lists the SFP/eSFP optical modules that the OptiX OSN 550 supports.
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SFP/eSFP Optical Modules That the OptiX OSN 550 Supports

Figure 1.88 SFP/eSFP Optical Modules That the OptiX OSN 550 Supports Part Number 34060473 Name 1.25 Gbit/s eSFP optical module Specification Optical transceiver, eSFP, 1310 nm, 1.25 Gbit/s, -9 dBm, -3 dBm, -20 dBm, LC, SM, 10 km Optical transceiver, eSFP, 1310 nm, 1.25 Gbit/s, -5 dBm, 0 dBm, -23 dBm, LC, SM, 40 km Optical transceiver, eSFP, 1550 nm, 1.25 Gbit/s, -2 dBm, 5 dBm, -23 dBm, LC, SM, 80 km Optical transceiver, SFP, Tx 1310 nm/Rx 1490 nm, 1.25 Gbit/s, -9 dBm, -3 dBm, -19.5 dBm, LC, SM, 10 km Optical transceiver, SFP,Tx1490 nm/Rx1310 nm, 1.25 Gbit/s, -3 dBm, -9 dBm, -19.5 dBm, LC, SM,10 km Optical transceiver, eSFP, 1310 nm, STM-1, -15 dBm, -8 dBm, -31 dBm, LC, SM, 15 km Optical transceiver, eSFP, 1310 nm, STM-1, -5 dBm, 0 dBm, -37 dBm, LC, SM, 40 km Optical transceiver, eSFP, 1550 nm, STM-1, -5 dBm, 0 dBm, -37 dBm, LC, SM, 80 km Applicable Board EM6F/PCXLG/PCX GA/PCXGB
34060298
1.25 Gbit/s eSFP optical module
EM6F/PCXLG/PCX GA/PCXGB
34060360
1.25 Gbit/s eSFP optical module
34060470
1.25 Gbit/s singlefiber bidirectional eSFP optical module
34060475
1.25 Gbit/s singlefiber bidirectional eSFP optical module
34060276
155 Mbit/s eSFP optical module
EF8F
34060281
EF8F
34060282
EF8F
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Part Number 34060307
Name
Specification Optical transceiver, eSFP(industry), 1310 nm, STM-1, -15 dBm, -8 dBm, -31 dBm, LC, SM, 15 km Optical transceiver, eSFP(industry), 1310 nm, STM-1, -5 dBm, 0 dBm, -37 dBm, LC, SM, 40 km Optical transceiver, eSFP(industry), 1550 nm, STM-1, -5 dBm, 0 dBm, -37 dBm, LC, SM, 80 km Optical transceiver, eSFP, Tx 1310 nm/Rx 1550 nm, STM-1, -15 dBm, -8 dBm, -32 dBm, LC/PC, SM, 15 km Optical transceiver, eSFP, Tx 1550 nm/Rx 1310 nm, STM-1, -15 dBm, -8 dBm, -32 dBm, LC/PC, SM, 15 km Optical transceiver, eSFP, Tx 1310 nm/Rx 1550 nm, STM-1, -5 dBm, 0 dBm, -32 dBm, LC/PC, SM, 40 km Optical transceiver, eSFP, Tx 1550 nm/Rx 1310 nm, STM-1, -5 dBm, 0 dBm, -32 dBm, LC/PC, SM, 40 km
Applicable Board EF8F
34060308
EF8F
34060309
EF8F
34060363
EF8F
34060364
EF8F
34060328
EF8F
34060329
EF8F
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Optical module specifications are explained as follows in sequence: name, encapsulation form, operating wavelength, rate, minimum output optical power, maximum output optical power, receiver sensitivity, optical interface type, optical fiber type, and transmission distance.
10.3 XFP Optical Modules

This section lists the XFP optical modules that the OptiX OSN 550 supports.
XFP Optical Modules That the OptiX OSN 550 Supports

Figure 1.89 XFP Optical Modules That the OptiX OSN 550 Supports Part Number 34060313 Name 9.95 Gbit/s to 10.71 Gbit/s XFP optical module Specification Optical transceiver, XFP, 1310 nm, 9.95 Gbit/s to 10.71 Gbit/s, -6 dBm, -1 dBm, -14.4 dBm, LC, SM, 10 km Optical transceiver, XFP, 1550 nm, 9.95 Gbit/s to 11.1 Gbit/s, -1 dBm, 2 dBm, -15 dBm, LC, SM, 40 km Optical transceiver, XFP, 1550 nm, 9.95 Gbit/s to 11.1 Gbit/s, 0 dBm, 4 dBm, -24 dBm, LC, SM, 80 km Applicable Board PCXLX/PCXX
34060322
9.95 Gbit/s to 11.1 Gbit/s XFP optical module
PCXLX/PCXX
34060361
9.95 Gbit/s to 11.1 Gbit/s XFP optical module
PCXLX/PCXX
Optical module specifications are explained as follows in sequence: name, encapsulation form, operating wavelength, rate, minimum output optical power, maximum output optical power, receiver sensitivity, optical interface type, optical fiber type, and transmission distance.
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11.1 Fiber Jumper
A fiber jumper has one connector at each end.
Cables
A fiber jumper transmits optical signals. One end of the fiber jumper has an LC/PC connector that is connected to an SDH optical port or GE optical port on the OptiX OSN 550. The connector at the other end of the fiber jumper varies depending on the type of the interconnected optical port.
Types of Fiber Jumpers

Figure 1.90 Types of fiber jumpers Connector 1 LC/PC Connector 2 FC/PC Cable 2 mm single-mode fiber 2 mm multi-mode fiber LC/PC LC/PC 2 mm single-mode fiber 2 mm multi-mode fiber
Fiber Connectors
The following figures show two common types of fiber connectors: LC/PC connector and FC/PC connector.
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Figure 1.1 LC/PC connector
LC/PC connector Protective cap
Figure 1.2 FC/PC connector

Protective cap
FC/PC connector
11.2 DC Power Cable

A DC power cable connects the PIU board in the chassis to a power supply device for access of power to the chassis.
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Cable Diagram
Figure 1.1 DC power cable
Figure 1.91 Power cable specifications Model 6 mm2 power cable and terminal Cable Power cable, 450 V/750 V, H07Z-K, 6 mm2, blue/black, low smoke zero Halogen cable Terminal Common terminal, single cord end terminal, 6 mm2, 30 A, tin plating, insertion depth of 12 mm, blue
For the OptiX OSN 550, power cables with a 6 mm2 cross-sectional area can extend for a maximum distance of 43 meters.
11.3 AC Power Cable

An AC power cable connects the APIU board in the chassis to a power supply device for access of AC power to the chassis.
Cable Diagram
Figure 1.1 AC power cable
Specifications of an AC power cable connector used on the OptiX OSN 550: C13, left angle,
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female
11.4 PGND Cable

A PGND cable connects the grounding point of an OptiX OSN 550 chassis to the grounding point of external equipment so that the chassis and external equipment share the same ground.
Cable Diagram
Figure 1.1 PGND cable
Main label 1 Cable tie H.S.tube
1. Bare crimping terminal, OT
2. Bare crimping terminal, OT
11.5 E1/T1 Cable

An E1/T1 cable uses 2 mm HM connectors and can transmit a maximum of 21 E1/T1 signals. There are two types of E1/T1 cables: 75-ohm coaxial cables and 120-ohm twisted pair cables.
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Cable Diagram
Figure 1.1 75-ohm/120-ohm E1/T1 cable
Main label 1 W
X1
A ViewA Pos.96 Cable connector, Anea, 96-pin,female
Pos.1
1. Cable connector, Anea 96, female
A 75-ohm E1 cable and a 120-ohm E1 cable have the same appearance. The core diameter of a 75-ohm E1/T1 cable is 1.6 mm. Therefore, use a crimping tool with an opening of 2.5 mm or 1.7 mm to attach the end of the 75-ohm E1/T1 cable on the DDF frame with a 75-1-1 coaxial connector.
Pin Assignments
Table 11-3 provides details about the pin assignments for a 75-ohm E1/T1 cable. Figure 1.92 Pin assignments for a 75-ohm 21xE1/T1 cable Pin Cor e Tip Ring Tip Ring Tip Ring Tip Ring 4 T1 3 R1 2 T0 Ser ial No. 1 Lab el R0 Pin Cor e Tip Ring Tip Ring Tip Ring Tip Ring 18 T8 17 R8 16 T7 Ser ial No. 15 Lab el R7 Pin Cor e Tip Ring Tip Ring Tip Ring Tip Ring
133
Ser ial No. 29
Lab el R14
1 2 25 26 3 4 27 28
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15 16 39 40 17 18 41 42
53 54 77 78 55 56 79 80
30
T14
31
R15
32
T15
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Pin
Cor e Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring
Ser ial No. 5
Lab el R2
Pin
Ser ial No. 19
Lab el R9
Pin
Ser ial No. 33
Lab el R16
5 6 29 30 7 8 31 32 9 10 33 34 11 12 35 36 13 14 37 38
19 20
57 58
T2
43 44
20
T9
81 82
34
T16
R3
21 22
21
R10
59 60
35
R17
T3
45 46
22
T10
83 84
36
T17
R4
23 24
23
R11
61 62
37
R18
10
T4
47 48
24
T11
85 86
38
T18
11
R5
49 50
25
R12
63 64
39
R19
12
T5
73 74
26
T12
87 88
40
T19
13
R6
51 52
27
R13
65 66
41
R20
14
T6
75 76
28
T13
89 90
42
T20
Table 11-4 provides details about the pin assignments for a 120-ohm E1/T1 cable. Figure 1.93 Pin assignments for a 120-ohm 21xE1/T1 cable Ri bb on Co lo r Pi n Co lo r of th e Co re Wh ite La be l Re la ti on sh ip Ri bb on Co lo r Pi n Co lo r of th e Co re Wh ite La be l Re la ti on sh ip Ri bb on Co lor Pi n Co lo r of th e Co re Wh ite La be l Re lat io ns hi p
Blu e
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R0
Pai r
Or ang
15
R7
Pai r
Gre en
53
R1 4
Pai r
134
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Ri bb on Co lo r
Pi n
Co lo r of th e Co re Blu e Wh ite Or ang e Wh ite Gr een Wh ite Br ow n Wh ite Gr ay Re d Blu e Re d Or ang e Re d Gr een Re d
La be l
Re la ti on sh ip
Ri bb on Co lo r
Pi n
La be l
Re la ti on sh ip
Ri bb on Co lor
Pi n
La be l
Re lat io ns hi p
2 25 26
e T0 Pai r
16 39 40
54 T7 Pai r 77 78
T1 4
Pai r
3 4 27 28
R1
Pai r
17 18
R8
Pai r
55 56
R1 5
Pai r
T1
Pai r
41 42
T8
Pai r
79 80
T1 5
Pai r
5 6 29 30 7 8
R2
Pai r
19 20
R9
Pai r
57 58
R1 6
Pai r
T2
Pai r
43 44
T9
Pai r
81 82
T1 6
Pai r
R3
Pai r
21 22
R1 0
Pai r
59 60
R1 7
Pai r
31 32 9
T3
Pai r
45 46
T1 0
Pai r
83 84
T1 7
Pai r
R4
Pai r
23
R1 1
Pai r
61
R1 8
Pai r
135
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Ri bb on Co lo r
Pi n
Co lo r of th e Co re Br ow n Re d Gr ay Bla ck Blu e Bla ck Or ang e Bla ck Gr een Bla ck Br ow n
La be l
Re la ti on sh ip
Ri bb on Co lo r
Pi n
La be l
Re la ti on sh ip
Ri bb on Co lor
Pi n
La be l
Re lat io ns hi p
10
24
62
33 34 11 12 35 36
T4
Pai r
47 48
T1 1
Pai r
85 86
T1 8
Pai r
R5
Pai r
49 50
R1 2
Pai r
63 64
R1 9
Pai r
T5
Pai r
73 74
T1 2
Pai r
87 88
T1 9
Pai r
13 14 37 38
R6
Pai r
51 52
R1 3
Pai r
65 66
R2 0
Pai r
T6
Pai r
75 76
T1 3
Pai r
89 90
T2 0
Pai r
Table 11-5 lists the technical specifications for E1/T1 cables used on the OptiX OSN 550. Figure 1.94 Technical specifications for E1/T1 cables used on the OptiX OSN 550 Item Connector type Number of cores
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Description Anea 96 42 cores/pair

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Item Fireproof class
Description IEC60332-3C
11.6 E3/T3 Cable

An E3/T3 cable receives and transmits E3/T3 signals. One end of the E3/T3 cable has an SMB connector that is connected to an E3/T3 electrical interface board. The other end of the E3/T3 cable is connected to a DDF and its connector needs to be prepared on site as required.
Structure
Figure 1.1 Structure of an E3/T3 cable
1. Coaxial connector - SMB
2. Main label
3. Coaxial cable
Pin Assignments
None.
Item Connector Cable I Description Coaxial connector, SMB connector, 75 ohms, straight, female Coaxial cable, 75 ohms, 3.9 mm, 2.1 mm, 0.34 mm, shielded Diameter of the shield layer (3.9 mm), diameter of the internal insulation layer (2.1 mm), diameter of the internal conductor (0.34 mm) Available lengths: 10 m, 15 m, 20 m, 30 m Cable II Coaxial cable, 75 ohms, 4.4 mm, 2.4 mm, 0.4 mm, shielded, gray Diameter of the shield layer (4.4 mm), diameter of the internal insulation layer (2.4 mm), diameter of the internal conductor (0.4 mm) Available lengths: 15 m, 20 m, 25 m, 30 m, 40 m Cable III Coaxial cable, 75 ohms, 6.7 mm, 3.8 mm, 0.61 mm, shielded, gray Diameter of the shield layer (6.7 mm), diameter of the internal insulation layer (3.8 mm), diameter of the internal conductor (0.61 mm)
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Item
Description Available lengths: 15 m, 20 m, 25 m, 30 m, 130 m
Cable IV
Coaxial cable, 75 ohms, 5.80 mm, 3.71 mm, 0.643 mm, black Diameter of the shield layer (5.80 mm), diameter of the internal insulation layer (3.71 mm), diameter of the internal conductor (0.643 mm) Available length: 30 m
Fireproof class
CM
11.7 Network Cable

A network cable connects two pieces of Ethernet equipment. Both ends of the network cable are terminated with an RJ-45 connector.
Interfaces Using RJ-45 Connectors

The following types of interfaces use RJ-45 connectors:
Medium dependent interfaces (MDIs): used by terminal equipment, for example, network card MDI-Xs: used by network equipment
The difference between MDIs and MDI-Xs is with regard to pin assignments. Table 11-6 provides details about the pin assignments for MDIs. Table 11-7 provides details about the pin assignments for MDI-Xs. Different cables are used between the interfaces using RJ-45 connectors.

A straight-through cable is used between an MDI and an MDI-X. A crossover cable is used between two MDIs. A crossover cable is used between two MDI-Xs.
The NMS/COM port and Ethernet electrical service ports of the equipment support the auto-MDI/MDIX mode. Therefore, straight-through cables and crossover cables can be used to connect the NMS/COM port and Ethernet electrical service ports to MDIs or MDI-Xs.
Figure 1.95 Pin assignments for an RJ-45 port in MDI mode Pin 10/100BASE-TX Signal 1 2 TX+ TXFunction Transmitting data (+) Transmitting data (-) 1000BASE-T Signal BIDA+ BIDAFunction Bidirectional data wire A (+) Bidirectional data wire A (-)
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Pin
10/100BASE-TX Signal Function Receiving data (+) Receiving data (-) -
1000BASE-T Signal BIDB+ BIDC+ BIDCBIDBBIDD+ BIDDFunction Bidirectional data wire B (+) Bidirectional data wire C (+) Bidirectional data wire C (-) Bidirectional data wire B (-) Bidirectional data wire D (+) Bidirectional data wire D (-)
3 4 5 6 7 8
RX+ Reserved Reserved RXReserved Reserved
Figure 1.96 Pin assignments for an RJ-45 port in MDI-X mode Pin 10/100BASE-TX Signal 1 2 3 4 5 6 7 8 RX+ RXTX+ Reserved Reserved TXReserved Reserved Function Receiving data (+) Receiving data (-) Transmitting data (+) Transmitting data (-) 1000BASE-T Signal BIDB+ BIDBBIDA+ BIDD+ BIDDBIDABIDC+ BIDCFunction Bidirectional data wire B (+) Bidirectional data wire B (-) Bidirectional data wire A (+) Bidirectional data wire D (+) Bidirectional data wire D (-) Bidirectional data wire A (-) Bidirectional data wire C (+) Bidirectional data wire C (-)
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Cable Diagram
Figure 1.1 Straight-through cable
1. Network port connector, RJ-45
2. Label 1
3. Main label
4. Label 2
Figure 1.2 Crossover cable
1. Network port connector, RJ-45
2. Label 1
3. Main label
4. Network cable
5. Label 2
Pin Assignments
Figure 1.97 Pin assignments for a straight-through cable Connector X1 X1.1 X1.2 X1.3 X1.6 X1.4 X1.5 X1.7 Connector X2 X2.1 X2.2 X2.3 X2.6 X2.4 X2.5 X2.7 Color White/Orange Orange White/Green Green Blue White/Blue White/Brown Twisted pair Twisted pair Twisted pair Relationship Twisted pair
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Connector X1 X1.8
Connector X2 X2.8
Color Brown
Relationship
Figure 1.98 Pin assignments for a crossover cable Connector X1 X1.6 X1.3 X1.1 X1.2 X1.4 X1.5 X1.7 X1.8 Connector X2 X2.2 X2.1 X2.3 X2.6 X2.4 X2.5 X2.7 X2.8 Color Orange White/Orange White/Green Green Blue White/Blue White/Brown Brown Twisted pair Twisted pair Twisted pair Relationship Twisted pair
Item Connector X1/X2 Description Network port connector, RJ-45 connector, 8-pin, 8-bit, shielded, connector, 24 to 26 AWG, CAT 6/configured with the SFTP network cable
Cable type
Straight-through cable: communication cable, 10015 ohms, CAT5E SFTP 24 AWG, 8 cores, PANTONE 445U Crossover cable: communication cable, 1005 ohms, CAT5E SFTP 24 AWG, 8 cores, PANTONE 646U
Number of cores Fireproof class Length
8 cores CM

Straight-through cable: 5 m, 10 m, 20 m, 30 m Crossover cable: 5 m, 30 m
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12 Parameter Settings
12
Board Type System control, switching, and timing board Packet processing boards SDH boards PDH boards Auxiliary board PCX
Parameter Settings
To use the functions of a board, first set parameters related to the board. This section provides hyperlinks of board parameter settings. Table 12-1 lists references for parameter settings on boards that the OptiX OSN 550 supports. Figure 1.99 References for parameter settings on boards that the OptiX OSN 550 supports Board Involved Parameter Setting Reference Parameters for Configuring system control, switching, and timing board Parameters for Configuring Ethernet Ports Parameters for Configuring CES Ports Parameters for Configuring SDH Boards Parameters for Configuring PDH Board Parameters for Configuring auxiliary board
EM6T, EM6F, EF8F MD1 SL1D, SL4D, SL1Q SP3D, PL3T AUX
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A Glossary and Acronyms
Figure 1.1
Glossary and Acronyms
Terms and abbreviations are listed in an alphabetical order. A.1 Numerics A.2 A A.3 B A.4 C A.5 D A.6 E A.7 F A.8 G A.9 H A.10 I A.11 J A.12 L A.13 M A.14 N A.15 O A.16 P A.17 Q A.18 R A.19 S A.20 T A.21 U A.22 V A.23 W
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Table 1.1
Numerics
An architecture that has one normal traffic signal, one working SNC/trail, one protection SNC/trail and a permanent bridge. At the source end, the normal traffic signal is permanently bridged to both the working and protection SNC/trail. At the sink end, the normal traffic signal is selected from the better of the two SNCs/trails. Due to the permanent bridging, the 1+1 architecture does not allow an extra unprotected traffic signal to be provided. IEEE 802.3 Physical Layer specification for a 100 Mb/s CSMA/CD local area network. IEEE 802.3 Physical Layer specification for a 100 Mb/s CSMA/CD local area network over two pairs of Category 5 unshielded twistedpair (UTP) or shielded twisted-pair (STP) wire. An Ethernet specification that uses the twisted pair cable with the transmission speed as 10 Mbit/s and the transmission distance as 100 meters. An architecture that has N normal service signals, N working SNCs/trails, and one protection SNC/trail. It may have one extra service signal. Pulse per second, which, strictly speaking, is not a time synchronization signal. This is because 1PPS provides only the "gauge" corresponding to the UTC second, but does not provide the information about the day, month, or year. Therefore, 1PPS is used as the reference for frequency synchronization. On certain occasions, 1PPS can also be used on other interfaces for high precision timing. Reshaping, Retiming, Regenerating.
1+1 protection
100BASE-T 100BASE-TX
10BASE-T
1:N protection
1PPS
3R Table 1.2 ABR AC ACAP
A
Available Bit Rate Alternating Current A channel configuration method, which uses two adjacent channels (a horizontal polarization wave and a vertical polarization wave) to transmit two signals. The process in which the standby cross-connect board automatically takes the place of the active one. If there are two cross-connect boards on the SDH equipment, which are in hot back-up relation of each other, the operation reliability is improved. When both the crossconnect boards are in position, the one inserted first is in the working status. Unplug the active board, the standby one will run in the working status automatically. When the active cross-connect board fails in self-test, the board is pulled out, the board power supply fails or the board hardware operation fails, the standby cross-connect board can automatically take the place of the active one.
Active/Standby switching of cross-connect board
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add/drop multiplexer
Network elements that provide access to all or some subset of the constituent signals contained within an STM-N signal. The constituent signals are added to (inserted), and/or dropped from (extracted) the STM-N signal as it passed through the ADM. See add/drop multiplexer The information structure which provides adaptation between the higher order path layer and the multiplex section layer. It consists of an information payload (the higher order VC) and a AU pointer which indicates the offset of the payload frame start relative to the multiplex section frame start. One or more administrative units occupying fixed, defined positions in an STM payload. An AUG consists of AU-4s. A user who has authority to access all the Management Domains of the product. He or she has access to the whole network and to all the management functionalities. The time to live before an object becomes invalid. Alarm Indication Signal A message reported when a fault is detected by a device or by the network management system during the process of polling devices. Each alarm corresponds to a recovery alarm. After a recovery alarm is received, the status of the corresponding alarm changes to cleared. A function wherein an alarm generated on the device side is immediately and automatically reported to the NMS. After an alarm is reported, an alarm panel prompts, and the user can view the details of the alarm. The cable for generation of visual or audio alarms. An alarm management method. Alarms are detected and reported to the NMS system, and whether the alarm information is displayed and saved is decided by the alarm filtering status. An alarm with the filtering status set to "Filter" is not displayed and saved on the NMS, but is monitored on the NE. A function that indicates the alarm status of an NE. On the cabinet of an NE, there are four indicators in different colors indicating the current alarm status of the NE. When the green indicator is on, the NE is powered on. When the red indicator is on, a critical alarm is generated. When the orange indicator is on, a major alarm is generated. When the yellow indicator is on, a minor alarm is generated. The ALM alarm indicator on the front panel of a board indicates the current status of the board. A code sent downstream in a digital network as an indication that an upstream failure has been detected and alarmed. It is associated with multiple transport layers.
ADM Administrative Unit
Administrative Unit Group Administrator
Aging time AIS Alarm
Alarm automatic report
alarm cable alarm filtering
alarm indication
Alarm indication signal
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Alarm inversion
For the port that has already been configured but has no service, this function can be used to avoid generating relevant alarm information, thus preventing alarm interference. The alarm report condition of the NE port is related to the alarm inverse mode (not inverse, automatic recovery and manual recovery) setting of the NE and the alarm inversion status (Enable and Disable) setting of the port. When the alarm inversion mode of NE is set to no inversion, alarms of the port will be reported as usual no matter whatever the inversion status of the port is. When the alarm inversion mode of the NE is set to automatic recovery, and the alarm inversion state of the port is set to Enabled, then the alarm of the port will be suppressed. The alarm inversion status of the port will automatically recover to "not inverse" after the alarm ends. For the port that has already been configured but not actually loaded with services, this function can be used to avoid generating relevant alarm information, thus preventing alarm interference. When the alarm inverse mode of the NE is set as "not automatic recovery", if the alarm inversion status of the port is set as Enable, the alarm of the port will be reported. An alarm management method. Alarms that are set to be masked are not displayed on the NMS or the NMS does not monitor unimportant alarms. The significance of a change in system performance or events. According to ITU-T recommendations, an alarm can have one of the following severities: Critical, Major, Minor, Warning. An alarm management method. Alarms that are set to be suppressed are not reported from NEs any more. See Automatic laser shutdown See Automatic Protection Switching Pertaining to, being, or characteristic of something that is not dependent on timing. A protocol for the transmission of a variety of digital signals using uniform 53 byte cells. A transfer mode in which the information is organized into cells; it is asynchronous in the sense that the recurrence of cells depends on the required or instantaneous bit rate. Statistical and deterministic values may also be used to qualify the transfer mode. See Asynchronous Transfer Mode See Automatic Transmit Power Control Reduction of signal magnitude or signal loss, usually expressed in decibels. See Administrative Unit See Administrative Unit Group An optional function of the IEEE 802.3u Fast Ethernet standard that enables devices to automatically exchange information over a link about speed and duplex abilities..
Alarm Masking
Alarm Severity
Alarm suppression ALS APS asynchronous Asynchronous Transfer Mode
ATM ATPC attenuation AU AUG auto-negotiation
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Automatic laser shutdown Automatic Protection Switching Automatic Transmit Power Control Table 1.3
A technique (procedure) to automatically shutdown the output power of laser transmitters and optical amplifiers to avoid exposure to hazardous levels. Capability of a transmission system to detect a failure on a working facility and to switch to a standby facility to recover the traffic. A method of adjusting the transmit power based on fading of the transmit signal detected at the receiver.
B
An electronic circuit board containing circuits and sockets into which additional electronic devices on other circuit boards or cards can be plugged. A periodic operation performed on the data stored in the database for the purposes of database recovery in case that the database is faulty. The backup also refers to data synchronization between active and standby boards. A range of transmission frequencies that a transmission line or channel can carry in a network. In fact, it is the difference between the highest and lowest frequencies the transmission line or channel. The greater the bandwidth, the faster the data transfer rate. Backward Defect Indicator See Bit Error Rate Used to measure the bit error rate (BER) of signals during transmission. The binding strap is 12.7 mm wide, with one hook side (made of transparent polypropylene material) and one mat side (made of black nylon material). A method of error monitoring. With even parity an X-bit code is generated by equipment at the transmit end over a specified portion of the signal in such a manner that the first bit of the code provides even parity over the first bit of all X-bit sequences in the covered portion of the signal, the second bit provides even parity over the second bit of all X-bit sequences within the specified portion, and so on. Even parity is generated by setting the BIP-X bits so that there is an even number of 1s in each monitored partition of the signal. A monitored partition comprises all bits which are in the same bit position within the X-bit sequences in the covered portion of the signal. The covered portion includes the BIP-X. An incompatibility between a bit in a transmitted digital signal and the corresponding bit in the received digital signal. Ratio of received bits that contain errors. BER is an important index used to measure the communications quality of a network. See Building Integrated Timing Supply
backplane
backup
bandwidth
BDI BER BER tester Binding strap
BIP
Bit error Bit Error Rate BITS

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bound path BPDU BPS bridge
A parallel path with several serial paths bundled together. It improves the data throughput capacity. See Bridge Protocol Data Unit Board Protection Switching A device that connects two or more networks and forwards packets among them. Bridges operate at the physical network level. Bridges differs from repeaters because bridges store and forward complete packets, while repeaters forward all electrical signals. Bridges differ from routers because bridges use physical addresses, while routers use IP addresses. The data messages that are exchanged across the switches within an extended LAN that uses a spanning tree protocol (STP) topology. BPDU packets contain information on ports, addresses, priorities and costs and ensure that the data ends up where it was intended to go. BPDU messages are exchanged across bridges to detect loops in a network topology. The loops are then removed by shutting down selected bridges interfaces and placing redundant switch ports in a backup, or blocked, state. The process of sending packets from a source to multiple destinations. All the ports of the nodes in the network can receive packets. A means of delivering information to all members in a network. The broadcast range is determined by the broadcast address. Base Station Controller Base Station Subsystem A function which integrates some simple WDM systems into products that belong to the OSN series. That is, the OSN products can add or drop several wavelengths directly. In the situation of multiple synchronous nodes or communication devices, one can use a device to set up a clock system on the hinge of telecom network to connect the synchronous network as a whole, and provide satisfactory synchronous base signals to the building integrated device. This device is called BITS. Backbone WDM System
Bridge Protocol Data Unit
broadcast Broadcast BSC BSS Build-in WDM
Building Integrated Timing Supply
BWS Table 1.4 cabling cable trough captive nut CAR CAS CBR
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C
The method by which a group of insulated conductors is mechanically assembled or twisted together. The trough which is used for cable routing in the cabinet. See Floating nut See committed access rate Channel Associated Signaling See Constant Bit Rate
CBS CCDP CCM CDR CDVT Cell Delay Variation Tolerance Centralized alarm system CES CFM Chain network channel
Committed Burst Size Co-Channel Dual Polarization Continuity Check Message Clock and Data Recovery See Cell Delay Variation Tolerance This parameter measures the tolerance level a network interface has to aggressive sending (back-to-back or very closely spaced cells) by a connected device, and does not apply to end-systems. The system that gathers all the information about alarms into a certain terminal console. See circuit emulation service Connectivity Fault Management One type of network that all network nodes are connected one after one to be in series. A telecommunication path of a specific capacity and/or at a specific speed between two or more locations in a network. Channels can be established through wire, radio (microwave), fiber or a combination of the three. The amount of information transmitted per second in a channel is the information transmission speed, expressed in bits per second. For example, b/s, kb/s, Mb/s, Gb/s, and Tb/s. Committed Information Rate A combination of two transmission channels permitting transmission in both directions between two points. A function with which the E1/T1 data can be transmitted through ATM networks. At the transmission end, the interface module packs timeslot data into ATM cells. These ATM cells are sent to the reception end through the ATM network. At the reception end, the interface module re-assigns the data in these ATM cells to E1/T1 timeslots. The CES technology guarantees that the data in E1/T1 timeslots can be recovered to the original sequence at the reception end. Common and Internal Spanning Tree CoS is a rule for queuing. It classifies the packets according to the service type field or the tag in packets, and specifies different priorities for them. All the nodes in DiffServ domain forwards the packets according to their priorities. A device that sends requests, receives responses, and obtains services from the server. Also called frequency synchronization. The signal frequency traces the reference frequency, but the start point does not need to be consistent.
CIR Circuit circuit emulation service
CIST Class of Service
client Clock Synchronization
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Clock tracing CLP CM committed access rate
The method to keep the time on each node being synchronized with a clock source in a network. Cell Loss Priority See Configuration Management A traffic control method that uses a set of rate limits to be applied to a router interface. CAR is a configurable method by which incoming and outgoing packets can be classified into Quality of Service (QoS) groups, and by which the input or output transmission rate can be defined. A process that combines multiple virtual containers. The combined capacities can be used a single capacity. The concatenation also keeps the integrity of bit sequence. A command file defining hardware configurations of an NE. With this file, an NE can collaborate with other NEs in an entire network. Configuration data is the key factor for normal running of an entire network. A network management function defined by the International Standards Organization (ISO). It involves installing, reinitializing & modifying hardware & software. To set the basic parameters of an operation object. An extra intra-network or inter-network traffic resulting in decreasing network service efficiency. A reference point where the output of a trail termination source or a connection is bound to the input of another connection, or where the output of a connection is bound to the input of a trail termination sink or another connection. The connection point is characterized by the information which passes across it. A bidirectional connection point is formed by the association of a contradirectional pair. A kind of service categories defined by the ATM forum. CBR transfers cells based on the constant bandwidth. It is applicable to service connections that depend on precise clocking to ensure undistorted transmission. A process in which multiple channels of low-rate signals are multiplexed into one or several channels of required signals. It refers to the speed and capability for a group of networking devices to run a specific routing protocol. It functions to keep the network topology consistent. A service that provides enhancements to an underlying service in order to meet the specific requirements of users. Used to protect optical fibers. See Class of Service Central Processing Unit See Cyclic Redundancy Check
Concatenation
Configuration Data
Configuration Management Configure congestion Connection point
Constant Bit Rate
Convergence
Convergence service corrugated tube CoS CPU CRC
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current alarm Current Performance Data
An alarm not handled or not acknowledged after being handled. Performance data stored currently in a register. An NE provides two types of registers, namely, 15-minute register and 24-hour register, to store performance parameters of a performance monitoring entity. The two types of registers stores performance data only in the specified monitoring period. A procedure used in checking for errors in data transmission. CRC error checking uses a complex calculation to generate a number based on the data transmitted. The sending device performs the calculation before transmission and includes it in the packet that it sends to the receiving device. The receiving device repeats the same calculation after transmission. If both devices obtain the same result, it is assumed that the transmission was error free. The procedure is known as a redundancy check because each transmission includes not only data but extra (redundant) error-checking values.
Cyclic Redundancy Check
Table 1.5
D
A communication network used in a TMN or between TMNs to support the data communication function. A high-quality data transport tunnel that combines the digital channel (such as fiber channel, digital microwave channel, or satellite channel) and the cross multiplex technology. Direct Current Data Communication Channel Data Carrier Detect Data Circuit-terminal Equipment See Data Communication Network See Digital Distribution Frame See Digital Data Network A limited interruption in the ability of an item to perform a required function. The time elapsed since the start of transmission of the first bit of the frame by a source node until the reception of the last bit of the loopbacked frame by the same source node, when the loopback is performed at the frame's destination node. A process applied to a composite signal formed by multiplexing, for recovering the original independent signals, or groups of these signals.
Data Communication Network Digital Data Network DC DCC DCD DCE DCN DDF DDN Defect Delay Measurement
Demultiplexing
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Device set
A collection of multiple managed devices. By dividing managed devices into different device sets, users can manage the devices by using the U2000 in an easier way. If an operation authority over one device set is assigned to a user (user group), the authority over all the devices in the device set is assigned to the user (user group), thus making it unnecessary to set the operation authority over all the devices in a device set separately. It is recommended to configure device set by geographical region, network level, device type, or another criterion. A marker in the header of each IP packet that prompts network routers to apply differentiated grades of service to various packet streams. It is specified by the DiffServ policy proposed by the IETF (Internet Engineering Task Force). This allows Internet and other IP-based network service providers to offer different levels of service to customers. A service architecture that provides the end-to-end QoS function. It consists of a series of functional units implemented at the network nodes, including a small group of per-hop forwarding behaviors, packet classification functions, and traffic conditioning functions such as metering, marking, shaping and policing. A type of equipment used between the transmission equipment and the exchange with transmission rate of 2 to 155 Mbit/s to provide the functions such as cables connection, cable patching, and test of loops that transmitting digital signals. A signal in which information is represented by a limited number of discrete states number of discrete states (for example, high and low voltages) rather than by fluctuating levels in a continuous stream, as in an analog signal. In the pulse code modulation (PCM) technology, the 8 kHz sampling frequency is used and a byte contains 8 bits in length. Therefore, a digital signal is also referred to as a byte-based code stream. Digital signals, with simple structures and broad bandwidth, are easy to shape or regenerate, and are not easily affected by external interference. A board-level port protection technology used to detect unidirectional fiber cuts and to negotiate with the opposite end. Once a link down failure occurs on a port or a hardware failure occurs on a board, the services can automatically be switched to the slave board, achieving 1+1 protection for the inter-board ports. See Distributed Link Aggregation Group See Delay Measurement See Dual Node Interconnection A logical subscriber group based on which the subscriber rights are controlled. See Differentiated Services Code Point Digital Subscriber Line Digital Subscriber Line Access Multiplexer
Differentiated Services Code Point
DiffServ
Digital Distribution Frame digital signal
Distributed Link Aggregation Group
DLAG DM DNI domain DSCP DSL DSLAM

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DSR DTE DTR Dual Node Interconnection DVB-ASI DVMRP DWDM Table 1.6
Data Set Ready Data Terminal Equipments Data Terminal Ready DNI provides an alternative physical interconnection point, between the rings, in case of an interconnection failure scenario. Digital Video Broadcast- Asynchronous Serial Interface Distance Vector Multicast Routing Protocol Dense Wavelength Division Multiplexing
E
See Ethernet aggregation A piece of angle plate with holes in it on a rack. It is used to fix network elements or components. See Embedded Control Channel Ethernet in the First Mile A type of Ethernet service that is based on a multipoint-to-multipoint EVC (Ethernet virtual connection). The sudden and momentary electric current that flows between two objects at different electrical potentials caused by direct contact or induced by an electrostatic field. A type of Ethernet service that is based on a point-to-point EVC (Ethernet virtual connection). A logical channel that uses a data communications channel (DCC) as its physical layer, to enable transmission of operation, administration, and maintenance (OAM) information between NEs. Element Management System A technology for layered protocols, in which a lower-level protocol accepts a message from a higher-level protocol and places it in the data portion of the lower-level frame. Protocol A's packets have complete header information, and are carried by protocol B as data. Packets that encapsulate protocol A have a B header, an A header, followed by the information that protocol A is carrying. Note that A could equal to B, as in IP inside IP. A path protocol which connects the host with various control units in a storage system. It is a serial bit stream transmission protocol. The transmission rate is 200 Mbit/s. A part, device, subsystem, functional unit, equipment, or system that can be considered individually. See Ethernet over Dual Domains See Ethernet Private Line
E-AGGR Ear bracket ECC EFM E-LAN ElectroStatic Discharge E-Line Embedded Control Channel EMS encapsulation
Enterprise System Connection Entity EoD EPL

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EPLAN Equipment Serial Number ESCON ESD ESD jack ESD wrist strap ESN Ethernet
See Ethernet virtual private LAN service A string of characters that identify a piece of equipment and ensures correct allocation of a license file to the specified equipment. It is also called "equipment fingerprint". See Enterprise System Connection See ElectroStatic Discharge Electrostatic discharge jack. A hole in the cabinet or shelf, which connect the shelf or cabinet to the insertion of ESD wrist strap. Used to prevent the ElectroStatic Discharge (ESD) when you touch or operate a device or component. See Equipment Serial Number A LAN technology that uses Carrier Sense Multiple Access/Collision Detection. The speed of an Ethernet interface can be 10 Mbit/s, 100 Mbit/s, 1000 Mbit/s or 10000 Mbit/s. An Ethernet network features high reliability and is easy to maintain. A type of Ethernet service that is based on a multipoint-to-point EVC (Ethernet virtual connection). The Ethernet alarm group periodically obtain the statistics value to compare with the configured threshold. If the value exceeds the threshold, an event is reported. A type of boards. EoD boards bridge the PSN and TDM networks, enabling Ethernet service transmission across PSN and TDM networks. A type of Ethernet service provided by SDH, PDH, ATM, or MPLS networks. This service is carried over a dedicated bridge and point-tomultipoint connections. A type of Ethernet service that is provided with dedicated bandwidth and point-to-point connections on an SDH, PDH, ATM, or MPLS server layer network. A type of Ethernet service provided by SDH, PDH, ATM, or MPLS networks. This service is carried over a shared bridge and point-tomultipoint connections. A type of Ethernet service provided by SDH, PDH, ATM, or MPLS networks. This service is carried over a shared bridge and point-topoint connections. European Telecommunications Standards Institute See Ethernet virtual private line See Ethernet virtual private LAN service An operation to check whether the protection switching protocol functions properly. The protection switching is not really performed.
Ethernet aggregation Ethernet Alarm Group Ethernet over Dual Domains Ethernet Private LAN service Ethernet Private Line Ethernet virtual private LAN service Ethernet virtual private line ETSI EVPL EVPLAN Exercise Switching
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Exerciser - Ring
This command exercises ring protection switching of the requested channel without completing the actual bridge and switch. The command is issued and the responses are checked, but no working traffic is affected. The number of the subnet that an NE belongs to, for identifying different network segments in a WAN. The physical ID of an NE is comprised of the NE ID and extended ID. The traffic that is carried over the protection channels when that capacity is not used for the protection of working traffic. Extra traffic is not protected.
Extended ID
extra traffic
Table 1.7 Failure
F
If the fault persists long enough to consider the ability of an item with a required function to be terminated. The item may be considered as having failed; a fault has now been detected. A feature in which for any link specified in a ring network, the source node is provided with certain bandwidth capacities if the data packets transmitted by the source node are constrained by the fairness algorithm. An algorithm designed to ensure the fair sharing of bandwidth among stations in the case of congestion or overloading. A failure to implement the function while the specified operations are performed. A fault does not involve the failure caused by preventive maintenance, insufficiency of external resources or intentional settings. See Fiber Channel See frequency diversity See fiber distributed data interface Forward Defect Indicator See Frame Delay Variation Fast Ethernet Code used to select/activate a service feature (for example, forwarding, using two or three digit codes preceded by * or 11 or #, and which may precede subsequent digit selection). See forwarding equivalence class See Forward Error Correction A kind of fiber used for connections between the subrack and the ODF, and for connections between subracks or inside a subrack.
Fairness
fairness algorithm fault
FC FD FDDI FDI FDV FE feature code
FEC FEC fiber patch cord
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Fiber Channel
A high-speed transport technology used to build storage area networks (SANs). Fiber channel can be on the networks carrying ATM and IP traffic. It is primarily used for transporting SCSI traffic from servers to disk arrays. Fiber channel supports single-mode and multi-mode fiber connections. Fiber channel signaling can run on both twisted pair copper wires and coaxial cables. Fiber channel provides both connection-oriented and connectionless services. A new generation connection protocol which connects the host to various control units. It carries single byte command protocol through the physical path of fiber channel, and provides higher rate and better performance than ESCON. A device installed at the end of a fiber, optical source or receive unit. It is used to couple the optical wave to the fiber when connected to another device of the same type. A connector can either connect two fiber ends or connect a fiber end and a optical source (or a detector). A standard developed by the American National Standards Institute (ANSI) for high-speed fiber-optic local area networks (LANs). FDDI provides specifications for transmission rates of 100 megabits (100 million bits) per second on networks based on the token ring network. General name of optical fiber and cable. It refers to the physical entities that connect the transmission equipment, carry transmission objects (user information and network management information) and perform the transmission function in the transmission network. The optical fiber transmits optical signal, while the cable transmits electrical signal. The fiber/cable between NEs represents the optical fiber connection or cable connection between NEs. The fiber/cable between SDH NEs represents the connection relationship between NEs. At this time, the fiber/cable is of optical fiber type. See Fiber Connect First In First Out Floating nuts (or as they are more correctly named, 'tee nuts') have a range of uses but are more commonly used in the hobby for engine fixing (securing engine mounts to the firewall), wing fixings, and undercarriage fixing. An aggregation of packets that have the same characteristics. On the network management system or NE software, flow is a group of classification rules. On boards, it is a group of packets that have the same quality of service (QoS) operation. See Frame loss ratio For normal traffic signals, switches normal traffic signal to the protection section, unless an equal or higher priority switch command is in effect or SF condition exists on the protection section, by issuing a forced switch request for that traffic signal. A bit error correction technology that adds the correction information to the payload at the transmit end. Based on the correction information, the bit errors generated during transmission are corrected at the receive end.
Fiber Connect
Fiber Connector
fiber distributed data interface
fiber/cable
FICON FIFO Floating nut
Flow
FLR Forced switch
Forward Error Correction
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forwarding equivalence class
A class-based forwarding technology that classifies the packets with the same forwarding mode. Packets with the same FEC are processed similarly on an MPLS network. The division of FECs is flexible, and can be a combination of the source address, destination address, source port, destination port, protocol type, and VPN. Field Programmable Gate Array A frame, starting with a header, is a string of bytes with a specified length. Frame length is represented by the sampling circle or the total number of bytes sampled during a circle. A header comprises one or a number of bytes with pre-specified values. In other words, a header is a code segment that reflects the distribution (diagram) of the elements pre-specified by the sending and receiving parties. A measurement of the variations in the frame delay between a pair of service frames, where the service frames belong to the same CoS instance on a point to point ETH connection. A ratio, is expressed as a percentage, of the number of service frames not delivered divided by the total number of service frames during time interval T, where the number of service frames not delivered is the difference between the number of service frames arriving at the ingress ETH flow point and the number of service frames delivered at the egress ETH flow point in a point-to-point ETH connection. An operating condition of a clock, the output signal of which is strongly influenced by the oscillating element and not controlled by servo phase-locking techniques. In this mode the clock has never had a network reference input, or the clock has lost external reference and has no access to stored data, that could be acquired from a previously connected external reference. Free-run begins when the clock output no longer reflects the influence of a connected external reference, or transition from it. Free-run terminates when the clock output has achieved lock to an external reference. A diversity scheme in which two or more microwave frequencies with a certain frequency interval are used to transmit/receive the same signal and selection is then performed between the two signals to ease the impact of fading. File Transfer Protocol A full-duplex, or sometimes double-duplex system, allows communication in both directions, and, unlike half-duplex, allows this to happen simultaneously. Land-line telephone networks are fullduplex, since they allow both callers to speak and be heard at the same time. A good analogy for a full-duplex system would be a twolane road with one lane for each direction.
FPGA frame
Frame Delay Variation Frame loss ratio
Free-run mode
frequency diversity
FTP full-duplex
Table 1.8 Gain
G
The difference between the optical power from the input optical interface of the optical amplifier and the optical power from the output optical interface of the jumper fiber, which expressed in dB.
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Gateway IP
When an NE accesses a remote network management system or NE, a router can be used to enable the TCP/IP communication. In this case, the IP address of the router is the gateway IP. Only the gateway NE requires the IP address. The IP address itself cannot identify the uniqueness of an NE. The same IP addresses may exist in different TCP/IP networks. An NE may have multiple IP addresses, for example, one IP address of the network and one IP address of the Ethernet port. A network element that is used for communication between the NE application layer and the NM application layer. Gigabit Ethernet A framing and encapsulation method which can be applied to any data type. It has been standardized by ITU-T SG15. See Generic Framing Procedure See Gateway Network Element Global Positioning System Global System for Mobile Communications Generic Traffic Shaping Graphic User Interface
Gateway Network Element GE Generic Framing Procedure GFP GNE GPS GSM GTS GUI Table 1.9
H
A transmitting mode in which a half-duplex system provides for communication in both directions, but only one direction at a time (not simultaneously). Typically, once a party begins receiving a signal, it must wait for the transmitter to stop transmitting, before replying. A connection mode in which a fiber jumper is used to connect the input optical interface to the output optical interface of a board to achieve signal loopback. High level Data Link Control See High Definition-Serial Digital Interface signal Header Error Control A type of QoS that controls the traffic of users and performs the scheduling according to the priority of user services. HQoS has an advanced traffic statistics function, and the administrator can monitor the usage of bandwidth of each service. Hence, the bandwidth can be allocated reasonably through traffic analysis. High definition video signal transported by serial digital interface.
half-duplex
Hardware loopback HDLC HD-SDI HEC Hierarchical Quality of Service
High DefinitionSerial Digital Interface signal History alarm
The confirmed alarm that has been saved in the memory and other external memories.
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Historical performance data HP HPT HQoS Table 1.10 IC IDU IEEE IETF IF IGMP IGMP Snooping
The performance data that is stored in the history register or that is automatically reported and stored on the NMS. Higher Order Path Higher Order Path Termination See Hierarchical Quality of Service
I
Integrated Circuit Indoor Unit Institute of Electrical and Electronics Engineers Internet Engineering Task Force Intermediate Frequency See Internet Group Management Protocol A multicast constraint mechanism running on a layer 2 device. This protocol manages and controls the multicast group by listening to and analyzing Internet Group Management Protocol (IGMP) packets between hosts and Layer 3 devices. In this manner, the spread of the multicast data on layer 2 network can be prevented efficiently. See Inverse Multiplexing over ATM A control unit in the IMA protocol. It is a logical frame defined as M consecutive cells, numbered 0 to M-l, transmitted on each of the N links in an IMA group. The maximum amplitude of sinusoidal jitter at a given jitter frequency, which, when modulating the signal at an equipment input port, results in no more than two errored seconds cumulative, where these errored seconds are integrated over successive 30-second measurement intervals. A mechanism used to reduce the optical power of all the amplifiers in an adjacent regeneration section in the upstream to a safety level if the system detects the loss of optical signals on the link. If the fiber is broken, the device performance degrades, or the connector is not plugged well, the loss of optical signals may occur. With IPA, maintenance engineers will not be hurt by the laser sent out from the slice of broken fiber. The area for the interface boards on the subrack. The cables and optical fibers which are used for interconnecting electrical interfaces and optical interfaces within the cabinet. One of the TCP/IP protocols for managing the membership of Internet Protocol multicast groups. It is used by IP hosts and adjacent multicast routers to establish and maintain multicast group memberships.
IMA IMA frame
Input jitter tolerance
Intelligent power adjusting
Interface board area Internal cable Internet Group Management Protocol
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Inverse Multiplexing over ATM IP IP address
A technique that involves inverse multiplexing and de-multiplexing of ATM cells in a cyclical fashion among links grouped to form a higher bandwidth logical link whose rate is approximately the sum of the link rates. Internet Protocol A 32-bit (4-byte) binary digit that uniquely identifies a host (computer) connected to the Internet for communication with other hosts in the Internet by transferring packets. An IP address is expressed in dotted decimal notation, consisting of decimal values of its 4 bytes, separated by periods (,), for example, 127.0.0.1. The first three bytes of an IP address identify the network to which the host is connected, and the last byte identifies the host itself. A technology that enables a DCC channel to carry TCP/IP protocol packets. The IP over DCC technology provides the TCP/IP protocol without using any extra overheads or service resources to ensure interconnection of management channels. See Intelligent power adjusting Intermedia System-Intermedia System Integrated Services Digital Network International Standard Organization Internet Service Provider Internal Spanning Tree International Telecommunication Union Telecommunication Standardization
IP over DCC
IPA IS-IS ISDN ISO ISP IST ITU-T
Table 1.11 Jitter
J
Short waveform variations caused by vibration, voltage fluctuations, and control system instability. Jitter tolerance is defined as the peak-to-peak amplitude of sinusoidal jitter applied on the input ATM-PON signal that causes a 1 dB optical power penalty at the optical equipment.
jitter tolerance
Table 1.12 Label
L
A short identifier that is of fixed length and local significance. It is used to uniquely identify the FEC to which a packet belongs. It does not contain topology information. It is carried in the header of a packet and does not contain topology information. See Link Aggregation Control Protocol See link aggregation group Local Area Network Link Access Procedure-SDH
LACP LAG LAN LAPS

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Laser
A component that generates directional optical waves of narrow wavelengths. The laser light has better coherence than ordinary light. The fiber system takes the semi-conductor laser as the light source. A concept used to allow the transport network functionality to be described hierarchically as successive levels; each layer being solely concerned with the generation and transfer of its characteristic information. A data forwarding method. In a LAN, a network bridge or 802.3 Ethernet switch transmits and distributes packet data based on the MAC address. Since the MAC address is at the second layer of the OSI model, this data forwarding method is called Layer 2 switch. See Loopback Loopback Message Loopback Reply Lucent Connector See Link Capacity Adjustment Scheme Liquid Crystal Display Local Craft Terminal A permission that the vendor provides for the user with a specific function, capacity, and duration of a product. A license can be a file or a serial number. Usually the license consists of encrypted codes. The operation authority granted varies with the level of the license. In the topology view, a link is used to identify the physical or logical connection between two topological nodes. A link is used to connect signaling points (SPs) and signaling transfer points (STPs) and transmit signaling messages. A method of bundling a group of physical interfaces together as a logical interface to increase bandwidth and reliability. For related protocols and standards, refer to IEEE 802.3ad. An aggregation that allows one or more links to be aggregated together to form a link aggregation group so that a MAC client can treat the link aggregation group as if it were a single link. LCAS in the virtual concatenation source and sink adaptation functions provides a control mechanism to hitless increase or decrease the capacity of a link to meet the bandwidth needs of the application. It also provides a means of removing member links that have experienced failure. The LCAS assumes that in cases of capacity initiation, increases or decreases, the construction or destruction of the end-to-end path is the responsibility of the network and element management systems. Logical Link Control See Loss Measurement
Layer
layer 2 switch
LB LBM LBR LC LCAS LCD LCT License
Link
Link Aggregation Control Protocol link aggregation group Link Capacity Adjustment Scheme
LLC LM
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Locked switching
When the switching condition is satisfied, this function disables the service from being switched from the working channel to the protection channel. When the service has been switched, the function enables the service to be restored from the protection channel to the working channel. Loss of Frame Loss of Multiframe A troubleshooting technique that returns a transmitted signal to its source so that the signal or message can be analyzed for errors. The loopback can be a inloop or outloop. Loss of Signal Loss measurement, a method used to collect counter values applicable for ingress and egress service frames where the counters maintain a count of transmitted and received data frames between a pair of MEPs. A lower performance limit which when exceeded by a performance event counter will trigger a threshold-crossing event. Lower Order Path Link State Pass Through Label Switched Path Label Switching Router Link Trace
LOF LOM Loopback
LOS Loss Measurement
Lower Threshold LP LPT LSP LSR LT Table 1.13 MA MAC Maintenance Association Maintenance Domain
M
See Maintenance Association Medium Access Control TThat portion of a Service Instance, preferably all of it or as much as possible, the connectivity of which is maintained by CFM. It is also a full mesh of Maintenance Entities. The network or the part of the network for which connectivity is managed by connectivity fault management (CFM). The devices in a maintenance domain are managed by a single Internet service provider (ISP). See Metropolitan Area Network Switches normal traffic signal to the protection section, unless a failure condition exists on other sections (including the protection section) or an equal or higher priority switch command is in effect, by issuing a manual switch request for that normal traffic signal. A procedure by which tributaries are adapted into virtual containers at the boundary of an SDH network.
MAN Manual switch
Mapping
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Marking-off template MBS MCF MCR MD Mean launched power MEP Metropolitan Area Network
A quadrate cardboard with four holes. It is used to mark the positions of the installation holes for the cabinet. Maximum Burst Size Message Communication Function Minimum Cell Rate See Maintenance Domain The average power of a pseudo-random data sequence coupled into the fiber by the transmitter. Maintenance End Point A network that interconnects users with computer resources in a geographic area or region larger than that covered by even a large LAN but smaller than the area covered by an WAN. The term is applied to the interconnection of networks in a city into a single larger network (which may then also offer efficient connection to a wide area network). It is also used to mean the interconnection of several local area networks by bridging them with backbone lines. The latter usage is also sometimes referred to as a campus network. Management Information Base Maintenance Intermediate Point MOdulator-DEModulator Maintenance Point Maintenance Point Identification See Multiprotocol Label Switching Multiplex Section Multiplex Section Adaptation See Multiplex Section Overhead See Multiplex Section Protection Multiplex Section Termination Multiple Spanning Tree Instance See Multi-service transmission platform See Multiple Spanning Tree Protocol Maximum Time Interval Error Maximum Transmission Unit A technology that uses short tags of fixed length to encapsulate packets in different link layers, and provides connection-oriented switching for the network layer on the basis of IP routing and control protocols. It improves the cost performance and expandability of networks, and is beneficial to routing.
MIB MIP MODEM MP MPID MPLS MS MSA MSOH MSP MST MSTI MSTP MSTP MTIE MTU Multiprotocol Label Switching
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Multi-service transmission platform Multicast
A platform based on the SDH platform, capable of accessing, processing and transmitting TDM services, ATM services, and Ethernet services, and providing unified management of these services. A process of transmitting data packets from one source to many destinations. The destination address of the multicast packet uses Class D address, that is, the IP address ranges from 224.0.0.0 to 239.255.255.255. Each multicast address represents a multicast group rather than a host. A protocol that can be used in a loop network. Using an algorithm, the MSTP blocks redundant paths so that the loop network can be trimmed as a tree network. In this case, the proliferation and endless cycling of packets is avoided in the loop network. The protocol that introduces the mapping between VLANs and multiple spanning trees. This solves the problem that data cannot be normally forwarded in a VLAN because in STP/RSTP, only one spanning tree corresponds to all the VLANs. The overhead that comprises rows 5 to 9 of the SOH of the STM-N signal. See SOH definition. A function, which is performed to provide capability for switching a signal between and including two multiplex section termination (MST) functions, from a "working" to a "protection" channel. A procedure by which multiple lower order path layer signals are adapted into a higher order path or the multiple higher order path layer signals are adapted into a multiplex section.
Multiple Spanning Tree Protocol
Multiplex Section Overhead Multiplex Section Protection Multiplexing
Table 1.14 NE
N
See network element The main operation interface, of the network management system, which is used to manage the telecommunication equipment. In the NE Explorer, the user can query, manage and maintain the NE, boards, and ports on a per-NE basis. An NE contains both the hardware and the software running on it. One NE is at least equipped with one system control and communication(SCC) board which manages and monitors the entire network element. The NE software runs on the SCC board. The interface at a network node which is used to interconnect with another network node. A part of an Ethernet or other network, on which all message traffic is common to all nodes, that is, it is broadcast from one node on the segment and received by all others. Normal Link Pulse Network Management System See network node interface
NE Explorer
network element
network node interface network segment
NLP NMS NNI
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NPC nrt-VBR NRZ NSAP NTP Table 1.15 OA OADM OAM OAM autodiscovery
Network Parameter Control Non Real-Time Variable Bit Rate Non Return to Zero code Network Service Access Point Network Time Protocol
O
See Optical Amplifier See Optical Add/Drop Multiplexer Operations, Administration and Maintenance In the case of OAM auto-discovery, two interconnected ports, enabled with the Ethernet in the First Mile OAM (EFM OAM) function, negotiate to determine whether the mutual EFM OAM configuration match with each other by sending and responding to the OAM protocol data unit (OAMPDU). If the mutual EFM OAM configuration match, the two ports enter the EFM OAM handshake phase. In the handshake phase, the two ports regularly send the OAMPDU to maintain the neighborhood relation. See Optical Channel Protection See Optical Distribution Frame Outdoor Unit Out-of-frame Second Overhead Access Function Optical Line Terminal The capability of many programs and operating systems to display advice or instructions for using their features when so requested by the user. Optical Network Unit Out of Frame A device that can be used to add the optical signals of various wavelengths to one channel and drop the optical signals of various wavelengths from one channel. Devices or subsystems in which optical signals can be amplified by means of the stimulated emission taking place in a suitable active medium. A passive device that increases the attenuation in a fiber link. It is used to ensure that the optical power of the signals received at the receive end is not extremely high. It is available in two types: fixed attenuator and variable attenuator.
OCP ODF ODU OFS OHA OLT Online Help
ONU OOF Optical Add/Drop Multiplexer Optical Amplifier
Optical attenuator
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Optical Channel Protection Optical Connector Optical Distribution Frame Optical Interface Optical Time Domain Reflectometer orderwire OSI OSN OSPF OTDR OTU Optical transponder unit Output optical power Overhead
In an optical transmission link that contains multiple wavelengths, when a certain wavelength goes faulty, the services at the wavelength can be protected if the optical channel protection is configured. A component normally attached to an optical cable or a piece of apparatus to provide frequent optical interconnection/disconnection of optical fibers or cables. A frame which is used to transfer and spool fibers.
A component that connects several transmit or receive units. A device that sends a very short pulse of light down a fiber optic communication system and measures the time history of the pulse reflection to measure the fiber length, the light loss and locate the fiber fault. A channel that provides voice communication between operation engineers or maintenance engineers of different stations. Open Systems Interconnection Optical Switch Node Open Shortest Path First See Optical Time Domain Reflectometer See Optical transponder unit A device or subsystem that converts the accessed client signals into the G.694.1/G.694.2-compliant WDM wavelength. The ranger of optical energy level of output signals. Extra bits in a digital stream used to carry information besides traffic signals. Orderwire, for example, would be considered overhead information.
Table 1.16
P
Two slots of which the overheads can be passed through by using the bus on the backplane. The action of transmitting the same information that is being received for any given direction of transmission. A performance resource object defined in the network management system. The left end of a path is a device node whose port needs to be specified and the right end of a path is a certain IP address which can be configured by the user. By defining a path in the network management system, a user can test the performance of a network path between a device port and an IP address. The tested performance may be the path delay, packet loss ratio or other aspects. Peak Burst Size
Paired slots pass-through Path
PBS
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PC PCM PCR PDH PDU PE Performance register
Personal Computer Pulse Code Modulation Peak Cell Rate See Plesiochronous Digital Hierarchy See Power distribution unit See provider edge The memory space for performance event counts, including 15-min current performance register, 24-hour current performance register, 15-min historical performance register, 24-hour historical performance register, UAT register and CSES register. The object of performance event monitoring is the board functional module, so every board functional module has a performance register. A performance register is used to count the performance events taking place within a period of operation time, so as to evaluate the quality of operation from the angle of statistics. A limit for generating an alarm for a selected entity. When the measurement result reaches or exceeds the preset alarm threshold, the performance management system generates a performance alarm. A connection between two ATM end hosts. The connection consists of PVPs between the ATM end hosts and their respective switches, and SVPs between the switches. Protection Ground A cable which connects the equipment and the protection grounding bar. Usually, one half of the cable is yellow, whereas the other half is green. Protocol Independent Multicast-Sparse Mode Peak Information Rate Qualifying two time-varying phenomena, time-scales, or signals in which corresponding significant instants occur at the same rate, any variations in rate being constrained within specified limits. Note: Corresponding significant instants are separated by time intervals having durations which may vary without limit. A multiplexing scheme of bit stuffing and byte interleaving. It multiplexes the minimum rate 64 kit/s into the 2 Mbit/s, 34 Mbit/s, 140 Mbit/s, and 565 Mbit/s rates. Phase-Locked Loop An indicator whose value defines the frame offset of a virtual container with respect to the frame reference of the transport entity on which this pointer is supported. Packet Over SDH A direct current power distribution box at the upper part of a cabinet, which supplies power for the subracks in the cabinet.
performance threshold Permanent Virtual Connection PGND PGND cable
PIM-SM PIR plesiochronous
Plesiochronous Digital Hierarchy PLL Pointer
POS Power box
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Power distribution unit PPP PRBS PRC Primitive
A unit that performs AC or DC power distribution. Point-to-Point Protocol See Pseudo Random Binary Sequence Primary Reference Clock In the hierarchy of signaling system No.7, when the upper layer applies for services from the lower layer or the lower layer transmits services to the upper layer, the data is exchanged between the user and the service provider. The data transmitted between adjacent layers is called primitive. A line, such as a subscriber cable and trunk cable, which are leased by the telecommunication carrier and are used to meet the special user requirements. A specific path that is part of a protection group and is labeled protection. A specific service that is part of a protection group and is labeled protection. In the NMS, the protection subnet becomes a concept of network level other than multiplex section rings or path protection rings. The protection sub-network involves NEs and fiber cable connections. The user interface, of the NMS, which is used to manage protection in the network. A device that is located in the backbone network of the MPLS VPN structure. A PE is responsible for managing VPN users, establishing LSPs between PEs, and exchanging routing information between sites of the same VPN. A PE performs the mapping and forwarding of packets between the private network and the public channel. A PE can be a UPE, an SPE, or an NPE. Packet Switched Power Spectral Density A sequence that is random in a sense that the value of an element is independent of the values of any of the other elements, similar to real random sequences. An emulated connection between two PEs for transmitting frames. The PW is established and maintained by PEs through signaling protocols. The status information of a PW is maintained by the two end PEs of a PW. An end-to-end Layer 2 transmission technology. It emulates the essential attributes of a telecommunication service such as ATM, FR or Ethernet in a packet switched network (PSN). PWE3 also emulates the essential attributes of low speed time division multiplexing (TDM) circuit and SONET/SDH. The simulation approximates to the real situation. See Permanent Virtual Connection
Private Line
Protection path Protection service Protection subnet
Protection View provider edge
PS PSD Pseudo Random Binary Sequence Pseudo Wire
Pseudo Sire Emulation edgeto-edge
PVC
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PW PWE3 Table 1.17 QinQ
See Pseudo Wire See Pseudo Sire Emulation edge-to-edge
Q
A layer 2 tunnel protocol based on IEEE 802.1Q encapsulation. It add a public VLAN tag to a frame with a private VLAN tag to allow the frame with double VLAN tags to be transmitted over the service providers backbone network based on the public VLAN tag. This provides a layer 2 VPN tunnel for customers and enables transparent transmission of packets over private VLANs. See Quality of Service A commonly-used performance indicator of a telecommunication system or channel. Depending on the specific system and service, it may relate to jitter, delay, packet loss ratio, bit error ratio, and signalto-noise ratio. It functions to measure the quality of the transmission system and the effectiveness of the services, as well as the capability of a service provider to meet the demands of users.
QoS Quality of Service
Table 1.18
R
An evolution of the Spanning Tree Protocol, providing for faster spanning tree convergence after a topology change. The RSTP protocol is backward compatible with the STP protocol. Remote Defect Indication The minimum acceptable value of average received power at point R to achieve a 1 x 10-12 BER (The FEC is open). A kind of stable and high-precision autonous clock providing frequencies for other clocks for reference. A piece of equipment or device that regenerates electrical signals. The process of receiving and reconstructing a digital signal so that the amplitudes, waveforms and timing of its signal elements are constrained within specified limits. The regenerator section overhead comprises rows 1 to 3 of the SOH of the STM-N signal. A remote optical amplifier subsystem designed for applications where power supply and monitoring systems are unavailable. The ROPA subsystem is a power compensation solution to the ultra-long distance long hop (LHP) transmission. A network topology being developed as a new standard for fiber optic rings. Radio Frequency Request For Announcement
Rapid Spanning Tree Protocol RDI Receiver Sensitivity Reference clock REG Regeneration
Regenerator section overhead Remote optical pumping amplifier Resilient Packet Ring RF RFA
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RFI ring network RNC ROPA route
Request for Information A type of network topology in which each node connects to exactly two other nodes, forming a circular pathway for signals. Radio Network Controller See Remote optical pumping amplifier The path that network traffic takes from its source to its destination. In a TCP/IP network, each IP packet is routed independently. Routes can change dynamically. A device on the network layer that selects routes in the network. The router selects the optimal route according to the destination address of the received packet through a network and forwards the packet to the next router. The last router is responsible for sending the packet to the destination host. Can be used to connect a LAN to a LAN, a WAN to a WAN, or a LAN to the Internet. Rendezvous Point See Resilient Packet Ring A asynchronous transfer mode that does not involve hand-shaking signal. It can communicate with RS232 and RS422 of other stations in point-to-point mode and the transmission is transparent. Its highest speed is 19.2kbit/s. The specification that defines the electrical characteristics of balanced voltage digital interface circuits. The interface can change to RS232 via the hardware jumper and others are the same as RS232. See Rapid Spanning Tree Protocol Radio Transmission Node Receiver
router
RP RPR RS232
RS422
RSTP RTN RX Table 1.19 S1 byte
S
A byte to transmit network synchronization status information. On an SDH network, each NE traces hop by hop to the same clock reference source through a specific clock synchronization path, realizing synchronization on the entire network. If a clock reference source traced by an NE is missing, this NE will trace another clock reference source of a lower level. To implement protection switching of clocks in the whole network, the NE must learn about clock quality information of the clock reference source it traces. Therefore, ITU-T defines S1 byte to transmit network synchronization status information. It uses the lower four bits of the multiplex section overhead S1 byte to indicate 16 types of synchronization quality grades. Auto protection switching of clocks in a synchronous network can be implemented using S1 byte and a proper switching protocol. Storage Area Network Square Connector
SAN SC
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SCR SD SD SD SDH SDP SD-SDI SEC Section
Sustainable Cell Rate See space diversity See Signal Degrade See Standard definition See Synchronous Digital Hierarchy Serious Disturbance Period See Standard definition-Serial Digital Interface signal SDH Equipment Clock The portion of a SONET transmission facility, including terminating points, between (i) a terminal network element and a regenerator or (ii) two regenerators. A terminating point is the point after signal regeneration at which performance monitoring is (or may be) done. A function of establishing a replacement connection by network without the network management connection function. When a connection failure occurs, the replacement connection is found by the network elements and rerouted depending on network resources available at that time. The ECC channel realized by means of serial port. A network device that provides services to network users by managing shared resources, often used in the context of a clientserver architecture for a LAN. A measure that ensures that the services can be received at the receive end. Severely Errored Second Synchronous Equipment Timing Source Parameters of a system or operation that can be selected by the user. See Signal Fail A signal indicating that associated data has failed in the sense that a near-end defect condition (non-degrade defect) is active. See Small Form-Factor Pluggable Single-line High speed Digital Subscriber Line The Side Mode Suppression Ratio (SMSR) is the ratio of the largest peak of the total source spectrum to the second largest peak. Common signal cables cover the E1 cable, network cable, and other non-subscriber signal cable. SD is a signal indicating the associated data has degraded in the sense that a degraded defect (e.g., dDEG) condition is active.
Self-healing
Serial port extended ECC server
Service protection SES SETS settings SF Signal Fail SFP SHDSL Side Mode Suppression Ratio signal cable Signal Degrade
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Signal Fail Simple Network Management Protocol
SF is a signal indicating the associated data has failed in the sense that a near-end defect condition (not being the degraded defect) is active. A network management protocol of TCP/IP. It enables remote users to view and modify the management information of a network element. This protocol ensures the transmission of management information between any two points. The polling mechanism is adopted to provide basic function sets. According to SNMP, agents, which can be hardware as well as software, can monitor the activities of various devices on the network and report these activities to the network console workstation. Control information about each device is maintained by a management information block. Angle-bars on which shelves and chassis may slide and be supported within a cabinet or shelf. A specification for a new generation of optical modular transceivers. See Side Mode Suppression Ratio SubNetwork Connection See Subnetwork connection multipath protection See SubNetwork Connection Protection Set the SNC node on the protection sub-network to support subnetwork connection protection that spans protection sub-networks. The SNCP node of the ring sub-network can support electric circuit dually feed and selectively receive a timeslot out of the ring, thus implementing sub-network connection protection. The SNCP node is generally set on the node on the line board with the path protection type of the dual fed and selectively received. See Subnetwork Connection Tunnel Protection See Simple Network Management Protocol Signal Noise Ratio A diversity scheme that enables two or more antennas separated by a specific distance to transmit/receive the same signal and selection is then performed between the two signals to ease the impact of fading. Currently, only receive SD is used. STP is a protocol that is used in the LAN to remove the loop. STP applies to the redundant network to block some undesirable redundant paths through certain algorithms and prune a loop network into a loop-free tree network. Synchronous Physical Interface See Synchronization Status Message Synchronization Supply Unit A video format with the resolution below 720p.
slide rail Small FormFactor Pluggable SMSR SNC SNCMP SNCP SNCP node
SNCTP SNMP SNR space diversity
Spanning Tree Protocol
SPI SSM SSU Standard definition
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Standard definition-Serial Digital Interface signal Statistical multiplexing
Standard definition video signal transported by serial digital interface.
A multiplexing technique whereby information from multiple logical channels can be transmitted across a single physical channel. It dynamically allocates bandwidth only to active input channels, to make better use of available bandwidth and allow more devices to be connected than with other multiplexing techniques. SDH standard for transmission over optical fiber at 622.08 Mbit/s. See Spanning Tree Protocol A number used to differentiate network sections in a sub-network conference. A sub-network ID consists of the first several digits (one or two) of a user phone number. An order wire phone number consists of the sub-network ID and the user number. A type of smaller networks that form a larger network according to a rule, for example, according to different districts. This facilitates the management of the large network. The technique used by the IP protocol to determine which network segment packets are destined for. The subnet mask is a binary pattern that is stored in the client machine, server or router matches with the IP address. The only difference is that SNCP is of 1+1 protection and SNCMP is of N+1 protection. That is, several backup channels protect one active channel in SNCMP. A function, which allows a working subnetwork connection to be replaced by a protection subnetwork connection if the working subnetwork connection fails, or if its performance falls below a required level. SNCTP provides a VC-4 level channel protection. When the working channel is faulty, the services of the entire VC-4 path can be switched over to the protection channel. A part used to support and fix a cabinet on the antistatic floor. It is made of welded steel plates and is used to block up the cabinets to facilitate floor layout and cabling. Before the whole set of equipment is grounded, insulation plates must be installed under the supports, and insulating coverings must be added to the expansion bolts to achieve good insulation performance. An attribute set to determine whether an NE monitors the alarm. Under suppression status, NE will not monitor the corresponding alarm conditions and the alarm will not occur even when the alarm conditions are met. Switching Virtual Connection
STM-4 STP Sub-network number
subnet
subnet mask
Subnetwork connection multipath protection SubNetwork Connection Protection Subnetwork Connection Tunnel Protection Support
Suppression state
SVC
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Switching priority
A priority of a board that is defined for protection switching. When several protected boards need to be switched, a switching priority should be set for each board. If the switching priorities of the boards are the same, services on the board that fails later cannot be switched. Services on the board with higher priority can preempt the switching resources of that with lower priority. It refers to the period of time between the start of detecting and the moment when the line is switched back to the original status after protection switching occurs in the MSP sub-network. A message that carries quality levels of timing signals on a synchronous timing link. Nodes on an SDH network and a synchronization network acquire upstream clock information through this message. Then the nodes can perform proper operations on their clocks, such as tracing, switching, or converting to holdoff, and forward the synchronization information to downstream nodes. A transmission scheme that follows ITU-T G.707, G.708, and G.709. It defines the transmission features of digital signals such as frame structure, multiplexing mode, transmission rate level, and interface code. SDH is an important part of ISDN and B-ISDN. It interleaves the bytes of low-speed signals to multiplex the signals to high-speed counterparts, and the line coding of scrambling is used only for signals. SDH is suitable for the fiber communication system with high speed and a large capacity since it uses synchronous multiplexing and flexible mapping structure. A clock providing timing services to connected network elements. This would include clocks conforming to Recommendations G.811, G.812 and G.813.
Switching restoration time Synchronization Status Message
Synchronous Digital Hierarchy
Synchronous source
Table 1.20
T
In the SDH transport hierarchy, the TCM is located between the AU/TU management layer and HP/LP layer. It uses the N1/N2 byte of POH overhead to monitor the quality of the transport channels on a transmission section (TCM section). See Tandem Connection Monitor See Transmission Control Protocol/Internet Protocol Time Division Multiplexing Trace Identifier Mismatch Continuously repeating interval of time or a time period in which two devices are able to interconnect. Also called the moment synchronization, time synchronization means that the synchronization of the absolute time, which requires that the starting time of the signals keeps consistent with the UTC time. Terminal Multiplexer Telecommunications Management Network
Tandem Connection Monitor TCM TCP/IP TDM TIM Timeslot Time Synchronization TM TMN
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ToS TPS Trail management function
See Type of Service See Tributary Protection Switch A network level management function of the network management system. This function enables you to configure end-to-end services, view graphic interface and visual routes of a trail, query detailed information of a trail, filter, search and locate a trail quickly, manage and maintain trails in a centralized manner, manage alarms and performance data by trail, and print a trail report. A transmitter and receiver housed together in a single unit and having some circuits in common, often for portable or mobile use. Common name for the suite of protocols developed to support the construction of worldwide internetworks.
Transceiver Transmission Control Protocol/Internet Protocol transparent transmission Tray Tributary loopback Tributary Protection Switch Tributary unit
A process during which the signaling protocol or data is not processed in the content but encapsulated in the format for the processing of the next phase. A component that can be installed in the cabinet for holding chassis or other devices. A fault can be located for each service path by performing loopback to each path of the tributary board. There are three kinds of loopback modes: no loopback, outloop, and inloop. A function that uses a standby tributary processing board to protect N tributary processing boards. An information structure which provides adaptation between the lower order path layer and the higher order path layer. It consists of an information payload (the lower order VC) and a TU pointer which indicates the offset of the payload frame start relative to the higher order VC frame start. One or more Tributary Units, occupying fixed, defined positions in a higher order VC-n payload is termed a Tributary Unit Group (TUG). TUGs are defined in such a way that mixed capacity payloads made up of different size Tributary Units can be constructed to increase flexibility of the transport network. Time To Live Tributary Unit See Tributary Unit Group A channel on the packet switching network that transmits service traffic between PEs. In VPN, a tunnel is an information transmission channel between two entities. The tunnel ensures secure and transparent transmission of VPN information. In most cases, a tunnel is an MPLS tunnel.
Tributary Unit Group
TTL TU TUG Tunnel
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Type of Service
A field in an IP packet (IP datagram) used for quality of service (QoS). The TOS field has 8 bits in length, which is divided into five subfields.
Table 1.21 UART UAS UBR
U
Universal Asynchronous Receiver/Transmitter Unavailable Second Unspecified Bit Rate The cables connected cabinets and other devices are routed underfloor. See User-to-Network Interface Pertaining to the transmission of the services that are not protected. The services cannot be switched to the protection channel if the working channel is faulty or the service is interrupted, because protection mechanism is not configured. A sub-network without any protection mechanism. The purpose of such configuration is to provide the basic data of trail protection for subsequent trail management. An operation to report some or all configuration data of an NE to the NMS. The configuration data then covers the configuration data stored at the NMS side. Uninterruptible Power Module TThe critical value that can induce unexpected events if exceeded. Uninterruptible Power Supply Cables or fibers connect the cabinet with other equipment from the top of the cabinet. Any entity external to the network which utilizes connections through the network for communication. A person or other entity authorized by a subscriber to use some or all of the services subscribed to by that subscriber. The interface between user equipment and private or public network equipment (for example, ATM switches). Universal Time Coordinated
underfloor cabling UNI Unprotected
Unprotected subnetwork Upload
UPM Upper threshold UPS Upward cabling User
User-to-Network Interface UTC Table 1.22 VB VBR VC VC

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V
Virtual Bridge Variable Bit Rate Virtual Concatenation See Virtual Container
VCG VCI Virtual Container
Virtual Concatenation Group Virtual Channel Identifier The information structure used to support path layer connections in the SDH. It consists of information payload and path overhead (POH) information fields organized in a block frame structure which repeats every 125 or 500 s. A logical grouping of two or more nodes which are not necessarily on the same physical network segment but which share the same IP network number. This is often associated with switched Ethernet. A system configuration, where the subscriber is able to build a private network via connections to different network switches that may include private network capabilities. See Virtual local area network Virtual Path Virtual Path Identifier See Virtual Private Network
Virtual local area network Virtual Private Network VLAN VP VPI VPN Table 1.23
W
The number of minutes to wait before services are switched back to the working line. Wide Area Network The long-term variations of the significant instants of a digital signal from their ideal position in time (where long-term implies that these variations are of frequency less than 10 Hz). A washer is a thin flat ring of metal or rubber which is placed over a bolt before the nut is screwed on. A technology that utilizes the characteristics of broad bandwidth and low attenuation of single mode optical fiber, uses multiple wavelengths as carriers, and allows multiple channels to transmit simultaneously in a single fiber. Data for describing the wavelength protection structure. Its function is similar to that of the protection subnet for SDH NEs. The wavelength path protection can work only with the correct configuration of the wavelength protection group. See Wavelength Division Multiplexing Weighted Fair Queuing A tool for fiber routing, which acts as the corrugated pipe. A path allocated to transport the normal traffic. Weighted Random Early Detection See Wait to Restore
Wait to Restore WAN Wander
washer Wavelength Division Multiplexing Wavelength protection group
WDM WFQ Winding pipe Working path WRED WTR

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HUAWEI TECHNOLOGIES CO., LTD.

Copyright Huawei Technologies Co., Ltd. 2011. All rights reserved.

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About This Document

Network planning engineers Hardware installers

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About This Document

Updates in Issue 01 (2011-06-30)

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3 System Control, Switching, and Timing Boards..............................13

4 Packet Processing Boards............................................................34

10 Pluggable Optical Modules.......................................................124

12 Parameter Settings..................................................................142 Figure 1.1Glossary and Acronyms.................................................143

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Chassis Structure and Board Installation Area

Board installation area

1 Power supply boards 2 Fan board

Extended boards System control, switching, and timing boards

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Fan warning label

Power port warning label

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Maximum power consumption: 240 W Typical power consumption: 142 W

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2 Boards and Their Appearances

Boards and Their Appearances

2.1 Board List

Supports the 60 Gbit/s packet switching function.

Native Ethernet services Point-to-point transparently transmitted E-Line

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2 Boards and Their Appearances

Board Classi ficati on board

Boar d Acro nym

Boar d Nam e board

VLAN-based E-Line service QinQ-based E-Line service

ETH PWE3 services STM-1/STM-4/STM16 services

Crossconnec t, timing, system control , and line board

Crossconnec t, timing, system control , and line board

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2 Boards and Their Appearances

Board Classi ficati on

Boar d Acro nym

QinQ-based E-Line service

Crossconnec t, timing, system control , and line board

Crossconnec t, timing, system control , and line board

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2 Boards and Their Appearances

Board Classi ficati on

Boar d Acro nym

E-LAN service based on IEEE 802.1ad bridges

ETH PWE3 services 75/120-ohm E1 port Slots 1 to 6

4xRJ4 5 and 2xSFP FE/GE process ing board

8xFE Ethern et process ing board

8xFE optical port: 100BASE-FX

2 Boards and Their Appearances

Board Classi ficati on

Boar d Acro nym