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MODEL : 42PT250B
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
42PT250B-SA
Printed in Korea
CONTENTS
CONTENTS ............................................................................................................................... 2 SAFETY PRECAUTIONS ...........................................................................................................3 SPECIFICATION.........................................................................................................................4 ADJUSTMENT INSTRUCTION ..................................................................................................6 BLOCK DIAGRAM ...................................................................................................................13 EXPLODED VIEW ...................................................................................................................14 CIRCUIT DIAGRAM ....................................................................................................................
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-2-
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts. Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
AC Volt-meter
1.5 Kohm/10W
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-3-
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application Range
(1) This spec sheet is applied all of PDP TV with PB11K chassis. Model Name 42PT250B-SA Market Brazil / chile / Peru / Venezuela / Costarica / Uruguay Brand LG
2. Specification
Each part is tested as below without special appointment. (1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 C 5 C (2) Relative Humidity : 65 % 10 % (3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz) * Standard Voltage of each product is marked by models (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. (5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test Method
(1) Performance : LGE TV test method followed. (2) Demanded other specification Safety : CE, IEC specification Model Name 42PT250B-SA Market Brazil / chile / Peru / Venezuela/ Costarica / Uruguay Appliance Safety : IEC / EN60065
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-4-
4. General Specification
No 1. Item Receiving System 2) DVB-T 2. Available Channel 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 07-69 (VHF high/UHF) 4) CATV : 02~135 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 14~69 (UHF) 4) CATV : 02~135 3. 4. Input Voltage Market 1)AC 100 ~ 240V 50/60Hz Brazil / chile / Peru / Venezuela / Costarica / Uruguay Colombia / Panama 5 Screen Size 42 inch Wide(1024 768) 50 inch Wide(1024 768) 50 inch Wide(1024 768) 60 inch Wide(1024 768) 6. 7. 8. Aspect Ratio Tuning System Module 16:9 FS PDP42T3 (3D)#### (1024 768) PDP42T3N (2D)#### (1024 768) PDP50T3 (3D)#### (1024 768) PDP50T3N (2D)#### (1024 768) PDP60R3 #### (1920 1080) PDP50R3 #### (1920 1080) 9. 10. Operating Environment Storage Environment 1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 % 1) Temp : -20 ~ 60 deg 2) Humidity : 0 ~ 90 % PW350B, PW350E PT250B, PT250E, PT260E PW350B, PW350E PT250B, PT250E, PT260E PV550B, PV550E PV550B, PV550E PW350E, PV550E, PT250E, PT260E PW350B, PW350E PT250E, PT260E PW350B, PW350E PT250B, PT250E, PT260E PV550B, PV550E PV550B, PV550E 50/42PW350B-SA 50/42PW350E-DC PW350B, PV550B, PT250B PW350E, PV550E, PT250E, PT260E Specification 1) SBTVD / NTSC / PAL-M / PAL-N Remark PW350B, PV550B, PT250B PW350E, PV550E, PT250E, PT260E PW350B, PV550B, PT250B
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-5-
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB11K Chassis applied PDP TV all models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. But it is flexible when its factory local problem occurs. (3) The adjustment must be performed in the circumstance of 25 cC 5 cC of temperature and 65 % 10 % of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100 V - 240 V, 50 / 60 Hz. (5) Before adjustment, execute Heat-Run for 5 minutes. After Receive 100% Full white pattern (06CH) then process Heat-run (or 8. Test pattern condition of Ez-Adjust status) V How to make set white pattern 1) Press Power ON button of Service Remocon 2) Press ADJ button of Service remocon. Select 10. Test pattern and, after select White using navigation button, and then you can see 100% Full White pattern. * In this status you can maintain Heat-Run useless any pattern generator * Notice: if you maintain one picture over 20 minutes (Especially sharp distinction black with white pattern 13Ch, or Cross hatch pattern 09Ch) then it can appear image stick near black level.
V
- Adjust 3 items at 3-1 PCB assembly adjustments (3) Adjustment sequence one after the order. (1) Adjustment protocol
Order 1. Inter the Adjustment mode 2. Change the Source 3. Start Adjustment 4. Return the Response 5. Read data Adjustment data 6. Confirm Adjustment Command aa 00 00 Set response a 00 OK00x
XB 00 40 XB 00 60 ad 00 10
b 00 OK40x (Adjust 480i Comp1 ) (Adjust 1080p Comp1) b 00 OK60x (Adjust 1080p RGB)
( main ) ad 00 20 ( main ) ad 00 30 ad 00 99
7. End of Adjustment
ad 00 90
OKx ( Success condition ) NGx ( Failed condition ) (main : component1 480i, RGB 1080p) 00000000000000000000000007c007b006dx (main : component1 480i, RGB 1080p) 000000070000000000000000007c00830077x NG 03 00x (Failed condition) NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition) d 00 OK90x
3. Adjustment items
3-1. PCB Assembly adjustment
(1) Adjust 480i Comp1 (2) Adjust 1080p Comp1/RGB - If it is necessary, it can adjustment at Manufacture Line - You can see set adjustment status at 9. ADJUST CHECK of the In-start menu
(2) Necessary items before Adjustment items O Pattern Generator : (MSPG-925FA) O Adjust 480i Comp1 (MSPG-925FA:model :209, pattern :65) Comp1 Mode O Adjust 1080p Comp1 (MSPG-925FA:model :225 , pattern :65) Comp1 Mode O Addjust RGB (MSPG-925FA:model :225 , pattern :65) RGB-PC Mode * If you want more information then see the below Adjustment method (Factory Adjustment) (3) Adjustment sequence O aa 00 00: Enter the ADC Adjustment mode. O xb 00 40: Change the mode to Component1 (No actions) O ad 00 10: Adjust 480i Comp O ad 00 10: Adjust 1080p comp O xb 00 60: Change to RGB-PC mode(No action) O ad 00 10: Adjust 1080p RGB O xb 00 90: Endo of Adjustmennt
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-6-
5. Factory Adjustment
PU11A / PB11A : USE INTERNAL ADC(S7R) : using internal pattern.
5-3. EDID(The Extended Display Identification Data) / DDC(Display Data Channel) download
(1) Summary 1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize Plug and Play function. 2) For EDID data write, we use DDC2B protocol.
2) Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB (Factory adjustment) O ADC 480i Component1 adjustment - Check connection of Component1 - MSPG-925FA Model: 209, Pattern 65 O Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to NORMAL O ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA Model: 225, Pattern 65 O Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to NORMAL O After get each the signal, wait more a second and enter the IN-START with press IN-START key of Service remocon. After then select 7. External ADC with navigator button and press Enter. O After Then Press key of Service remocon Right Arrow(VOL+) O You can see ADC Component1 Success O Component1 1080p, RGB 1080p Adjust is same method. O Component 1080p Adjustment in Component1 input mode O RGB 1080p adjustment in RGB input mode O If you success RGB 1080p Adjust. You can see ADC RGB-DTV Success
It only needs to PCM EDID D/L for North America Product. (PU11A)
LGE Internal Use Only
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-7-
EDID data (Model name = LG TV) HDMI-1 EDID table(2D HD) - South Centural America (PT250B/E, PT260E) 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F 0 02 03 27 F1 4E 02 03 11 12 93 04 15 16 05 14 10 10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 10 00 20 B8 2D 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58 * Edid data and Model option download(RS232) 30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D2
< For write EDID data, setting Jig and another instruments >
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-8-
RGB EDID table(2D HD) - South Centural America (PT250B/E, PT260E) 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 10 01 15 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 28 * See Working Guide if you want more information about EDID communication.
(3) White Balance Adjustment - If you cant adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at Ez-Adjust Menu 7. White Balance there items NONE, INNER, HDMI. It is normally setting at inner basically. If you cant adjust using inner pattern you can select HDMI item, and you can adjust. - In manual Adjust case, if you press ADJ button of service remocon, and enter Ez-Adjust Menu 7. White Balance, then automatically inner pattern operates. (In case of Inner originally Test-Pattern. On will be selected in The Test-Pattern. On/Off. Connect all cables and equipments like Pic.5) Set Baud Rate of RS-232C to 115200. It may set 115200 orignally. O Connect RS-232C cable to set O Connect HDMI cable to set
O O
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-9-
RS-232C COMMAND(Commonly apply) ID 00 00 00 00 00 00 DATA] 00 10 1f 20 2f ff Meaning White Balance adjustment start. Start of adjust gain (Inner white pattern) End of gain adjust Start of offset adjust (Inner white pattern) End of offset adjust End of White Balance adjust (Inner pattern disappeared)
wb 00 00: Start Auto-adjustment of white balance. wb 00 10: Start Gain Adjustment (Inner pattern) O jb 00 c0 : O O wb 00 1f: End of Adjustment * If it needs, offset adjustment (wb 00 20-start, wb 00 2fend) O wb 00 ff: End of white balance adjustment (inner pattern disappear)
O O
Adjustment Mapping information RS-232C COMMAND [CMD ID DATA] Cool Mid Warm jd je jf 00 00 00 MIN CENTER (DEFAULT) Cool 184 187 192 64 64 64 Mid 192 183 161 64 64 64 Warm 192 159 95 64 64 64 192 192 192 127 127 127 MAX
(4) White Balance Adjustment (Manual adjustment) 1) Test Equipment: CA-210 - Using PDP color temperature, Color Analyzer (CA210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS2100. See the Coordination bellowed one. 2) Manual adjustment sequence is like bellowed one. - Turn to Ez-Adjust mode with press ADJ button of service remocon. - Select 10.Test Pattern with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. - Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment. - Press ADJ button of service remocon and select 7.White-Balance in Ez-Adjust then press G button of navigation key. (When press G button then set will go to full white mode) - Adjust at three mode (Cool, Medium, Warm) - If cool mode Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment. - If Medium and Warm mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - All of the three mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - With volume button (+/-) you can adjust. - After all adjustment finished, with Enter (_ key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode
jg jh ji
Ja Jb Jc
Using CS-1000 Equipment. - COOL : T=11000K, _uv=0.000, x=0.276 y=0.283 - MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293 - WARM : T=6500K, _uv=0.000, x=0.313 y=0.329 Using CA-210 Equipment. (10 CH) - Contras value : 216 Gray Test Equipment CA-210 CA-210 CA-210 Color Coordination x 0.2760.002 0.2850.002 0.3130.002 y 0.2830.002 0.2930.002 0.3290.002
Color temperature When Color temperature (White balance) Adjustment (Automatically) - Press Power only key of service remocon and operate automatically adjustment. - Set BaudRate to 115200. O You must start wb 00 00 and finish it wb 00 ff. O If it needs, then adjustment Offset.
O
- Brighness spec. Item White average brightness Brightness uniformity -20 +20 % Min 49 Typ Max Unit 60 Remark Pattern - 100IRE(255Gray) - Picture: Vivid(Medium ) - 85IRE(216Gray) 100% Window White Pattern - Picture: Vivid(Medium) cd/m - 100%Window White
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 10 -
<XPOWER4 42T3 PSU> Caution : Dont push The INSTOP KEY after completing the function inspection Caution : Inspection only PAL M / NTSC < fig.1 : 42 inch Power PCB Assy Voltage adjustment >
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 11 -
20 23 70 75
Put the USB Stick to the USB socket Press Menu key, and move OPTION
V V
After download is finished, remove the USB stick. Press IN-START key of ADJ remote control, check the S/W version.
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 12 -
BLOCK DIAGRAM
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 13 -
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
601
910
A9 LV1 A10 A4 A2 A21
301
303
205
304
305
302
202
203
300
120
570
- 14 -
A12
900
S7R-Multi(Brazil) S7 IC Configuration
IC101-*1 LGE101DC-R [S7R DIVX/MS10]
S7R_BR AE1 AF16 AF1 AE3 NC_48 NC_78 NC_64 NC_50 NC_45 NC_34 NC_77 NC_65 NC_62 NC_33 NC_47 NC_46 NC_63 LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2] LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0] LVA4P/LLV8P LVA4N/LLV8N
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
READY +3.3V_AVDD
R38
R33
1K READY PWM1
AD15 AE16
R34
1K
AC26 LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4] AF3 AF14 AD1 AD13 AE14 AE13 NC_44 NC_61 NC_60 NC_66 NC_76 NC_32 LVB0P/RLV6P/RED[1] LVB0N/RLV6N/RED[0] LVB1P/RLV7P/GREEN[9] LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7] LVB2N/RLV8N/GREEN[6] LVB3P/LLV1P/GREEN[3] LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1] AE4 AD5 AF4 AD4 AE2 NC_49 NC_51 NC_36 NC_67 NC_35 RLV3P/RED[7] RLV3N/RED[6] RLV0P/LVSYNC RLV0N/LHSYNC RLV1N/LCK AF8 AD9 AE9 AF9 NC_56 NC_72 AE11 AF6 NC_58 NC_69 AD19 TCON3/OE/GOE/GCLK2 NC_53 NC_74 NC_37 NC_43 NC_52 NC_75 NC_68 NC_59 AE10 AF7 AD11 AD7 AD10 AE7 AF10 AD8 NC_57 NC_70 NC_42 NC_38 NC_41 NC_54 NC_73 NC_39 TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN TCON13/LEDON TCON17/CS6/GCLK4 AB22 AB23 AC23 AC22 TCON15/SCAN_BLK1 TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N TCON9/CS3/OPT_P TCON16/WPWM TCON12/DPM TCON1/STV/GSP/VST TCON5/TP/SOE TCON14/SACN_BLK AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18 NC_71 NC_40 RLV2P/RED[9] RLV1P/LDE RLV2N/RED[8] RLV4P/RED[5] RLV4N/RED[4] RLV5P/RED[3] RLV5N/RED[2] AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22 LVB4N/LLV0N/GREEN[0] AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
R35
1K
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
R36
1K
R37
1K
PCM_A[5] PCM_A[4] <T3 CHIP Config(AUD_LRCH)> Boot from SPI flash : 1b0 Boot from NOR flash : 1b1 <CHIP_CONF={AUBCK_OUT,AUMCK_OUT,PWM1,PWM0}> 1.CHIP_CONF= 4h3:{0,0,1,1}MIPS_no_EJ_NOR8 2.CHIP_CONF= 4h4:{0,1,0,0}MIPS_EJ1_NOR8 3.CHIP_CONF= 4h5:{0,1,0,1}MIPS_EJ2_NOR8 4.CHIP_CONF= 4hB:{1,0,1,1}B51_Secure_no_scramble 5.CHIP_CONF= 4hC:{1,1,0,0}B51_Secure_scramble 1.MIPS 2.MIPS 3.MIPS 4.8051 5.8051 PCM_A[3] PCM_A[2] PCM_A[1] PCM_A[0] as as as as as host(8051s reset remains until MIPS deactive it.),No EJ PAD,Byte mode NAND flash host,EJ use PAD1,Byte mode NAND flash host,EJ use PAD2,Byte mode NAND flash host,Internal SPI flash secure boot,no scramble host,Internal SPI flash secure boot with scramble
AB16 NC_26 NC_19 NC_30 Y16 NC_15 AE8 NC_55 Y11 Y19 NC_12 GND_105 NC_21 NC_20 Y10 NC_11 NC_17 AB15 NC_25 NC_24 AB14 AA11 NC_31 NC_29 AA16 AA15 AC16 AC14 AA14 AC15
+3.3V_AVDD
NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16
S7R_NORMAL S7R
U22 T21 T22 AB18 AC18 AC19 AC20 PCM_A[0-7] PCM_A[0] PCM_A[1] V4 LGD BIT SEL H or NC : 10 bit PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] +3.3V_AVDD PCM_A[6] PCM_A[7] AC21 U21 V21 Y22 AA22 R22 R21 T23 T24 AA23 Y20 AB17 V4 LGD OPC AA21 U23 Y23 W23
SCL SDA
L : 8 bit
IC103 MX25L8005M2I-15G
CS# 15G VCC C5 0.1uF 16V
IC102 CAT24WC08W-T
/FLASH_WP
R7 4.7K
A0 1 A1 2 A2 3
8 7 6 5
VCC WP
L or NC : DISABLE R13 4.7K H : ENABLE I2C_SCL CH_2 I2C_SDA C3 0.1uF OPC: Optimal power control FOR PICTURE AFLC: LED TV OPTION
SO
HOLD#
WP#
VSS 4
W22
GND
$0.199
SO/SIO1
HOLD#
WP#
SCLK
1M BIT EEPROM
+3.3V_AVDD AR103
GND
SI/SIO0
I2C : A0
/PF_CE0 /PF_CE1 R6 4.7K READY /PF_OE /PF_WE PF_ALE
NC 1 8 VCC
AA9 AC17 AB20 AA18 AR102 22 AB21 AB19 AD17 AA19 22 R20 4.7K R22 4.7K R52 R53 R55 R54 R50 R51 33 33 33 33 33 33 M23 N23 M22 N22 A5 B5 DDCA_DA/UART0_TX DDCA_CK/UART0_RX TS1_D0 TS1_D1 PWM0
E1 2 7 WP
TS0_CLK PCM_PF_CE0Z PCM_PF_CE1Z PCM_PF_OEZ PCM_PF_WEZ PCM_PF_ALE PCM_PF_AD[15] PCM_PF_RBZ TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 UART_TX2/GPIO65 UART_RX2/GPIO64 DDCR_DA/GPIO71 DDCR_CK/GPIO72 TS0_D6 TS0_D7 TS0_VLD TS0_SYNC
IC109 M24M01-HRMN6TP
E1
WP
E2
SCL
I2C_SCL
SDA
VSS
I2C_SDA CH_2
AC6 AB6 AC10 AB10 AC9 AB9 AC8 AB8 AC7 AB7
512KBIT = $0.35
CH_8
IC109-*1 M24512-HRMN6TP
E0 VCC
RGB_DDC_SDA RGB_DDC_SCL
R56 R57
22 22 PWM2 22
K23 K22 G23 G22 G21 PWM0/GPIO66 PWM1/GPIO67 PWM2/GPIO68 PWM3/GPIO69 PWM4/GPIO70
ST_NVRAM_512K
E2
SCL
VSS
SDA
C6 KEY1 KEY2 TOUCH_VER_CHK R46 R18 AMP_MUTE 22 22 READY B6 C8 C7 A6 SAR0/GPIO31 SAR1/GPIO32 SAR2/GPIO33 SAR3/GPIO34 SAR4/GPIO35 MPIF_D0 MPIF_D1 MPIF_D2 MPIF_D3 MPIF_BUSY MPIF_CLK MPIF_CS_N
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX63425902(5) S7/FLASH/NVRAM/GPIO
2010.10.21 1 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
Close to MSTAR
R228 R229 100 100 C259 C260
INTERNAL_DEMOD 0.1uF IF_P_MSTAR INTERNAL_DEMOD 0.1uF IF_N_MSTAR TUNER_SIF +3.3V_AVDD INTERNAL_DEMOD L202 C254 0.1uF INTERNAL_DEMOD INTERNAL_DEMOD R256 1K Close R255 10K IF_AGC_MAIN
32.768KHz
LVDS OUT
HDMI
S7 RESET CIRCUIT
2 4 SW200 TMUE312GAB
CK+_HDMI3 CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 DDC_SDA_3 DDC_SCL_3 HPD3 HDMI_CEC_S7
FRC PART
DSUB
COMPONENT 1/2
AUDIO IN
DSUB_HSYNC
AV_LIN_COM1
TV/MNT CVBS
MODEL OPTION3
AUDIO OUT
PIN NAME
AF5 AE12
N/A
AB16
R224
R218
3.3K
N/A
M7
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
3.3K
R220
EAX63425902(5)
2010.10.21 2 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
+1.26V_VDDC
L323 BLM18PG121SN1D
VDDC
VDDC
H15
+1.26V_VDDC
L321 BLM18SG121TN1D
+1.26V_MIU1VDDC
J16 L18
+1.26V_MIU0VDDC
+1.26V_MIU1VDDC H16 K19
+1.26V_VDDC
+1.26V_MIU0VDDC
+2.5V_AVDD
L304
BLM18PG121SN1D
L306 BLM18PG121SN1D
V20 W20 C301 16V 0.1uF C306 16V 0.1uF C310 16V 0.1uF C318 16V 0.1uF C324 10uF 6.3V C332 10uF 6.3V U19 U20 V19
L302 BLM18PG121SN1D
AVDD_NODIE_3.3
+3.3V_AVDD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
S7M_POWER_BLOCK
2010.10.21
13
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
17V
+5V_ST
L501
120-ohm 3A P501 P500 SMAW200-H18S1 READY
L511
+3.3V_ST
+5V
IC506 AZ1085S-3.3TR/E1
INPUT 3 1 ADJ/GND A2[RD] 2 OUTPUT READY READY
1 3 5 7 9
2 4 6 8 10 12 14 16 18
L507 3A
R504 10K
ERROR_DET
11
R506 RL_ON
13 15 17
100
R529 1K READY
AC_DET
+3.3V_ST
19
R508 10K
5V_ON
+5V_TU
EAP61606601 L505 22.0uH D501 MBRA340T3G L506 120-ohm 2A
R527 105K
IC507 TPS54231D
PH
READY C560 10uF 16V C561 10uF 16V C565 10uF 16V READY R1 C590 100pF 50V 1%
2A
VIN
GND
3.2A / P-CHANNEL
+5V_ST
Q501 RTR030P02 S D
READY C511 22uF 16V C517 0.01uF 25V C526 100uF 16V C532 0.01uF 25V
R523 16K
EN
COMP
40V
R2
SS
VSENSE
R524 3.6K
1/16W 5%
+3.3V_ST
RL_ON
C B E Q500 MMBT3904(NXP)
Vout=0.8*(1+R1/R2)
1/10W 5%
IC504 AZ1085S-3.3TR/E1
INPUT 3 1 ADJ/GND A2[RD] 2 OUTPUT READY READY C569 22uF 16V A1[GN] R533 1 LD500 SAM2333 R512 1K C570 0.1uF 16V L508 120-ohm 2A C571 0.1uF 16V
1 GND
+3.3V_AVDD
+5V_ST_EN READY R501 10K READY C510 0.1uF 16V READY R509 0 EP[GND] VIN_3 PWRGD
Vout=0.8*(1+R1/R2)
R530 0 C518 0.1uF 50V
Vout=0.827*(1+R1/R2)
READY R517 0 VIN_3 PWRGD R531 0 BOOT C542 0.1uF 50V 12 THERMAL 17 11 PH_3 PH_2 PH_1 SS/TR C543 1000pF R521 39K 1%
BOOT
EN
+1.5V_DDR_IN
L502 3.6uH
+1.26V_VDDC
16
15
14
VIN_1 VIN_2 C503 10uF 16V C506 0.1uF 16V GND_1 GND_2
13
1 2 3 4 THERMAL 17
12 11
R1
R514 10.7K 1% C529 100pF C531 50V 22uF 6.3V READY C533 10uF 10V C534 10uF 10V C536 0.1uF 16V C537 10uF 16V C538 0.1uF 16V VIN_1 VIN_2 GND_1 GND_2
10 IC501 TPS54319TRE 9
L503 3.6uH
1 2 3 4
3A
5 6 7 8 VSENSE COMP RT/CLK AGND
R1
C546 100pF C547 50V 22uF 6.3V READY C548 10uF 10V C550 10uF 10V C551 0.1uF 16V
IC502 10 TPS54319TRE 9
16
15
EN
14
3A
5 6 7 VSENSE COMP RT/CLK AGND R511 330K R515 12K 1/16W 1% 8
13
R2
Switching freq: 600K
+3.3V_AVDD
R522 75K 1/16W 1%
VIN
VOUT GND
R519 330K
R2
Switching freq: 600K
1.8A
C567 10uF 6.3V
READY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX63425901(5) POWER
2010.10.21 5 13
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
BRAZIL DEMODULATOR
V
+3.3V
+3.3V_DE
EXTERNAL_DEMOD READY C691 10uF 6.3V READY C692 0.1uF 16V C693 0.1uF 16V EXTERNAL_DEMOD C694 0.1uF 16V C695 0.1uF 16V EXTERNAL_DEMOD
+1.2V_DE
2 1
+1.2V_DE
+3.3V_DE C652 10uF 6.3V R633 22 FE_TS_VLD FE_TS_SYN FE_TS_SERIAL FE_TS_CLK 0.1uF EXTERNAL_DEMOD EXTERNAL_DEMOD R632 22 EXTERNAL_DEMOD R631 22 EXTERNAL_DEMOD R630 22
1uF
HDVDDL1
VDDH_5
VDDL_7
VSS_11
HDVDDH
1uF
0.01uF C686
VSS_10
VDDH_4
AGC_S
TEST0
HDVPP
C685
TEST2 77
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
100
76
TEST1
GPO2
DENB
PCKB
SDOB
SCKB
NC_4
NC_3
DENA
PCKA
SDOA
GPI2
SCKA
RON
VSS_1 AVDD_S 0.1uF C663 EXTERNAL_DEMOD AII_S AIQ_S AVSS_S VRT_S VRB_S TCPO_S C664 0.1uF VDDL_1 R640 EXTERNAL_DEMOD 2.2K MSCL_S R641 2.2K MSDA_S VSS_2 EXTERNAL_DEMOD VSSH PSEL ZSEL EXTERNAL_DEMOD 0.1uF C666 EXTERNAL_DEMOD R621 10K 1% EXTERNAL_DEMOD C667 0.1uF EXTERNAL_DEMOD C668 0.1uF EXTERNAL_DEMOD C669 0.1uF VDDL_2 ACKI TCPO_T IR_T VRT_T VRB_T AVDD_T AIN_T AIP_T TUNER_IF_P EXTERNAL_DEMOD R623 100 EXTERNAL_DEMOD 5% 1/16W 0 R604 C671 0.1uF 16V Close to R622,R623 AVSS_T
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
75 74 73 72 71 70 69
VSS_9 INTB INTA SADR VDDH_3 SCL SDA VSS_8 HDVDDL0 SADR_S NC_2 SADR_T VDDL_6 VSS_7 ERRB SYNCB ERRA SYNCA TDO CSEL1 CSEL0 TMS TRST VDDL_5 VSS_6 C681 0.1uF EXTERNAL_DEMOD +3.3V_DE EXTERNAL_DEMOD C682 0.1uF EXTERNAL_DEMOD EXTERNAL_DEMOD C683 0.1uF 22 R643 EXTERNAL_DEMOD EXTERNAL_DEMOD C684 0.1uF EXTERNAL_DEMOD 22 R642 AMP_DEMOD_SCL AMP_DEMOD_SDA
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
TUNER_IF_N
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 TDI
49 NRST
XO
VSS_3
VSS_4
XI
TEST4
SHVPP
VSS_5
MSCL_T
MSDA_T
VDDH_1
AGCI_T
AGCR_T
VDDL_3
VDDH_2
SHVDDH
INTERNAL_DEMOD
VDDL_4
TEST3
GPO1
GPO0
GPI1
GPI0
NC_1
TCK
50
IF_P_MSTAR
R639 2.7K
/DEMOD_RESET
C672
C674
0.1uF 0.1uF 16V 16V 16V EXTERNAL_DEMOD 16V EXTERNAL_DEMOD EXTERNAL_DEMOD EXTERNAL_DEMOD C678 0.1uF 16V R627 1M EXTERNAL_DEMOD ISDB_IF_AGC R626 10K EXTERNAL_DEMOD EXTERNAL_DEMOD C673 0.1uF X602 EXTERNAL_DEMOD 25MHz
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2010.10.21 6 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
ST Audio AMP
+3.3V
R705 10K READY R704 10K AMP_MUTE READY C B R708 0 READY Q700 2SC3052 E READY C703 0.1uF 50V
EAPD/OUT4B TWARN/OUT4A
0 R709
19 20 21 22 23 24 25 26 27 Close-by 28 29 30
18 17 16 15 14 13 12 11
OUT3A/FFX3A OUT3B/FFX3B CONFIG VDD GND_REG OUT1A GND1 VCC1 OUT1B OUT2A VCC2 GND2 OUT2B VCC_REG VSS TEST_MODE SA GND_SUB
C706 0.1uF 50V C712 0.1uF 50V R727 20 L703 10.0uH C716 100uF 25V C710 1uF C711 25V C715 330pF 50V L702 10.0uH C718 0.22uF 50V C721 0.22uF 50V C722 0.22uF 50V C728 100uF 25V C725 1000pF 50V C726 1000pF 50V C729 100uF 25V C708 1uF C709 25V C714 330pF 50V L701 10.0uH R726 20 L700 10.0uH C717 0.22uF 50V C719 0.22uF 50V C723 1000pF 50V C707 0.1uF 50V JP701
VDD_DIG_1 GND_DIG_1
PWRDN VDD_PLL
FILTER_PLL GND_PLL
0.1uF 50V
Close-by
10 9 8 7
4 JP702 3 JP703 2
22 R711 AUD_SCK 22 R712 AUD_LRCK 22 R713 AUD_LRCH 22 R714 READY READY READY READY C731 C730 C732 C733 22pF 22pF 22pF 22pF 50V 50V 50V 50V R700 /AMP_RESET 22 R715 2K 22 R716 AMP_DEMOD_SDA R701 2K AMP_DEMOD_SCL
0.1uF 50V
Close-by
31 32 THERMAL 33 37 34 35 36 Close-by 6 5 4 3 2 1
JP704
17V
22 R717
STA368BWG IC700
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SMAW250-H04R P700
R706 2K
2010.10.21 7 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
+3.3V_ST
R871 0 G Q800 BSS83 D B S D801 READY R800 68K +3.3V_ST R835 91K HDMI_CEC_S7 HDMI_JACK R872 0 READY S7
CEC_REMOTE
HDMI 1
5V_DET_HDMI_2 5V_HDMI_2 SHIELD 20 $0.47 ->$0.24 19 18 17 16 R827 15 14 13 12 EAG59023302 11 10 9 8 7 6 5 4 3 2 1 CK+ CK+_HDMI2 D0D0-_HDMI2 D0_GND D0+ D0+_HDMI2 D1D1-_HDMI2 D1_GND D1+ D1+_HDMI2 D2D2-_HDMI2 D2_GND D2+ D2+_HDMI2 EAG59023301 22 DDC_SCL_2 HDMI1 R828 0 16 15 CEC_REMOTE CK-_HDMI2 14 13 12 11 10 9 8 7 6 5 4 3 2 1 GND CK+ HDMI1 R823 1K R822 1.8K R824 3.3K C803 0.1uF 16V HDMI1 E C B R833 10K HPD2 SHIELD
HDMI 2
5V_DET_HDMI_3 5V_HDMI_3 HDMI2 R842 20 $0.47 19 ->$0.24 18 DDC_SDA_2 17 1K HDMI2 R841 1.8K HDMI2 R843 3.3K HDMI2 C808 0.1uF 16V HDMI2 22 DDC_SDA_3 22 DDC_SCL_3 HDMI2 R846 0 C
BODY_SHIELD R851 B 10K HDMI2 HPD3 HDMI2 Q806 2SC3875S(ALY) 20 19 HOT_PLUG_DETECT 18 17 16 15 VDD[+5V] DDC/CEC_GND SDA SCL
SIDE HDMI R857 1K SIDE HDMI R856 1.8K SIDE HDMI SIDE HDMI C810 R860 3.3K 0.1uF 16V
C Q807 2SC3875S(ALY) E
D808 SIDE HDMI READY 22 AVRL161A1R1NT R858 DDC_SDA_4 R859 22 DDC_SCL_4 SIDE HDMI R878 0 CEC_REMOTE CK-_HDMI4
R845
R844
HDMI1
SIDE HDMI
HDMI2
12 TMDS_CLK11 TMDS_CLK_SHIELD
CK+_HDMI3 D0D0-_HDMI3 D0_GND D0+ D0+_HDMI3 D1D1-_HDMI3 D1_GND D1+ D1+_HDMI3 D2D2-_HDMI3 D2_GND D2+ HDMI2 D2+_HDMI3
10 TMDS_CLK+ 9 TMDS_DATA08 TMDS_DATA0_SHIELD 7 TMDS_DATA0+ 6 TMDS_DATA15 TMDS_DATA1_SHIELD 4 TMDS_DATA1+ 3 TMDS_DATA22 TMDS_DATA2_SHIELD 1 TMDS_DATA2+
CK+_HDMI4 D0-_HDMI4
D0+_HDMI4 D1-_HDMI4
D1+_HDMI4 D2-_HDMI4
D2+_HDMI4
JK801 HDMI1
10mm
GND
GND
5V_HDMI_4 +5V
A2 SIDE HDMI C 8 SIDE HDMI SIDE HDMI C811 VCC 0.1uF SIDE HDMI R864 18K SIDE HDMI 7 WP R867 18K EDID_WP 6 SCL R862 22 SIDE HDMI R863 22
A2
A1
HDMI1 IC801 AT24C02BN-SH-T HDMI1 C805 0.1uF VCC R831 18K HDMI1 EDID_WP R830 22 HDMI1 GND 4 5 SDA
HDMI2 IC802 AT24C02BN-SH-T HDMI2 C809 0.1uF VCC HDMI2 R850 18K
A0
A1
WP
WP
R868 18K
A2
A1 ENKMC2838-T112 D805
DDC_SCL_4 SDA
A2
SCL
GND
R829
22 DDC_SDA_2
HDMI1
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI
EAX63425902(5) HDMI
2010.10.21
14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
D907
D904
D905
D906
D908
RGB
P900 SPG09-DB-010
C900 0.1uF 16V
12507WS-15L
1 C925 4700pF
DSUB_R
R906 75 R950 2.7K
6 1 7 2 8 3 9 4 10 5 15 14 13 12 11
R938 10K
R941 10K
10K
NC
DSUB_GL904
SUB_SCL
DSUB_DET
SUB_SDA
R909 10K
READY
16
SHILED
+3.3V_ST
DSUB_B
R907 75 R915 22 R916 22 READY R937 0 LED_WHITE C LED_WHITE Q902 2SC3052 E
+5V
L901
11
DSUB_HSYNC DSUB_VSYNC
LED_WHITE R940 4.7K
LED_WHITE
12
13
14
RGB_DDC_SCL
TOUCH_VER_CHK
R945 10K
15 16
GND
IC901 AT24C02BN-SH-T
PC_SER_DATA
2 7
+5V_ST
C922 0.1uF
P906 12507WR-03L
EDID_WP
3 6
RGB_DDC_SCL
RGB_DDC_SCL RGB_DDC_SDA
RGB_DDC_SDA 3 4
232C_NO6
232C_NO4
PC AUDIO
+3.3V_ST JK900 PEJ027-01 C907 0.1uF 50V C909 0.1uF 50V C910 0.1uF 50V 3 6A 7A C2C2+ C1C1+ E_SPRING T_TERMINAL1 B_TERMINAL1 PC_RIN R_SPRING T_SPRING B_TERMINAL2 PC_LIN T_TERMINAL2 D911 5.6V C921 820pF 50V R933 10K R927 470K R952 0 R936 12K R953 0 R954 0 10K R942 USA R951 0 D910 5.6V C920 820pF 50V R931 10K R926 470K R935 12K R961 0 R966 0 R962 0 R959 0 M1 MDS62110209 M2 MDS62110209 M3 MDS62110209
R930 100
READY
RS232C
R980 0
DOUT2
RIN2
V-
V+
4 5
UART_PM_TX
UART_PM_RX
$0.179
+3.3V_ST
+5V_ST
7B 6B
EMI_GND1
DIN1
ROUT1
ROUT2
RIN1
DOUT1
GND
DIN2
VCC
READY
R982
22 READY
10K R918
D902 30V
EMI_GND2
USA IR JACK
JK901
PEJ027-01
R956 0 R955 0
READY
22 R979
D903 READY C903 C904 READY 220pF 220pF 50V 50V 232C_NO6 30V USA 232C_NO4 22 R977 TX USA R919 100K
IR JACK
3 6A 7A 4 5 7B
E_SPRING T_TERMINAL1 IR B_TERMINAL1 R_SPRING T_SPRING B_TERMINAL2 T_TERMINAL2 IR JACK R922 C915 READY 0 NON_IR JACK
R957 0 R958 0
R960 0 R963 0
EMI_GND3
USA
P901
100K R920
6B
EAG60841801
TX 10 R921
GND EMI_GND4
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2010.10.21
14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
SIDE CVBS
+3.3V 5A ADMC5M03200L_AMODIODE 4A +3.3V R1077 10K R1059 10K AV_CVBS_DET D1000 5.6V C1000 100pF 50V READY R1060 1K D1012 5.6V R1080 1K COMP2_DET 4B 3C 4C R1086 10K COMP2_RIN R1079 470K D1010 5.6V +3.3V C1011 1000pF 50V PPJ235-01 D1021 R1095 12K JK1002 R1038 470K 5C [WH]O-SPRING [RD]CONTACT D1020 30V [RD]O-SPRING [RD]E-LUG READY C1013 0.1uF 16V R1040 10K C1015 820pF 3A [YL]CONTACT R1036 10K [YL]E-LUG
SIDE_CVBS_IN
[YL]O-SPRING READY
+3.3V
D1022 30V
R1044 75
R1019 1K
SIDE_CVBS_DET
SIDE_LIN
R1043 12K
D1019
R1037
12K
D1001 5.6V
R1062 1K
R1078 470K
R1094 12K
SPDIF
+5V
R1058 1K
IC1000 NL17SZ00DFT2G
+5V
READY
READY A
VCC
[RD1]E-LUG-S [BL1]O-SPRING
NAND GATE
4 Y
R1042
COMP2_LIN
470K
R1061 10K
R1085 10K
SIDE_RIN
Fiber Optic
GND
R1065 0 READY COMP2_Pb+ D1003 30V 75 R1004 READY C1001 10pF 50V COMP2_PbR1003 0 +5V R1096 0 READY C Q1000 2SC3052 E R1097 270 READY R1098 0 READY +5V R1099 0READY C B READY E READY Q1001 2SC3052 R1021 COMP2_Y+ 0READY R1020 270 AV_CVBS
R1051 100
VCC
FIX_POLE
R1006 0
READY
READY
[GN1]E-LUG
R1092 82
R1002 READY
D1002 30V
75 R1001 0 R1005
COMP2_Y-
R1081 10K D1009 5.6V R1075 470K C1008 1000pF 50V R1082 10K
[BL2]O-SPRING [BL2]E-LUG-S
READY D1008 5.6V R1072 470K
COMP1_DET
AV_LIN_COM1 R1088 12K
AV_CVBS_DET
RESULT
HIGH
HIGH
COMP1_DET
[GN2]CONTACT [GN2]O-SPRING
HIGH
LOW
AV_CVBS
READY
[GN2]E-LUG
D1007 30V
R1073 75
COMP1_Pb+
LOW
COMP1_Pb-
HIGH
R1070 0 READY COMP1_Y+ D1005 30V R1074 75 READY C1005 10pF 50V COMP1_YR1069 0
LOW
LOW
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2010.10.21 10 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
USB1 SIDE
SWITCH ADDED +3.3V
Capacitors on VBUSA should be placed as closd to connector as possible.
+3.3V
SIDE USB IC1101 AP2191SG-13
NC GND
R1129 10K
SIDE USB
OUT_2
+5V
IN_1
$0.11
+USB1_OCD R1124
JP1101 3AU04S-305-ZC-(LG) JK1102 C1122 10uF 16V SIDE USB JP1102 1 USB DOWN STREAM 5 C1116 100uF 16V SIDE USB
OUT_1
IN_2
22
FLG
EN
SIDE USB
SIDE USB
USB1_DM_to_MAIN USB1_DP_to_MAIN
JP1103
10mm
USB2 REAR(SVC)
SVC USB
+5V
USB2_DM_to_MAIN USB2_DP_to_MAIN D1101 CDS3C05HDMI1 5.6V READY D1103 CDS3C05HDMI1 5.6V READY
4 5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
2010.10.21 11 14
VCC_1.5V_DDR
VCC_1.5V_DDR
VCC_1.5V_DDR VCC_1.5V_DDR
VCC_1.5V_DDR
R1201
R1204
1K 1%
1K 1%
R1224
0.1uF
1000pF
1K 1%
1000pF
1000pF
0.1uF
0.1uF
A-MVREFCA C1205 0.1uF C1216 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C1217 C1213 C1206 C1207 C1208 C1210 C1211 C1212 C1214 C1215 C1218 C1219 C1220 C1221 C1222 C1223 C1224 0.1uF C1235 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C1234 0.1uF 0.1uF C1227 C1228 C1229 C1230 C1231 C1232 C1233 C1236 C1238 C1239 C1241 C1242 C1243 C1244 0.1uF C1237 C1245 C1246 10uF 10uF
1%
B-MVREFCA
B-MVREFDQ 1% R1225
R1202
1% C1250
CHN FAB N3
1K 1% C1249
C1201
C1202
C1203
C1204
C1247
1K
C1248
1K
VCC_1.5V_DDR
+1.5V_DDR_IN
L1201 B-TMA0 R1213 A-MA0 56 R1214 A-MA2 A-TMA2 56 AR1208 A-MA11 A-MA1 A-MA8 A-MVREFCA M8 VREFCA A0 A1 A-MVREFDQ R1203 240 1% B2 D9 G7 K2 K8 N1 N9 R1 VCC_1.5V_DDR R9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 BA0 BA1 A1 A8 C1 C9
IC1201-*1 H5TQ1G63BFR-H9C-C
CHN FAB N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
R1215 B-MA0 56 R1216 B-TMA2 B-MA2 56 AR1211 B-MA11 B-MA1 B-MA8 B-MA6 56 AR1214 B-TMBA0 B-TMA3 B-MBA0 B-MA3 B-MA5 B-MA7 56 AR1215 B-MA0 B-MA1 B-MA2 B-MA3 B-MA4 B-MA5 B-MA6 B-MA4 B-MA12 B-MBA1 B-MA10 56 AR1219 B-TMRESETB B-TMBA2 B-TMA13 B-TMA9 56 R1222 B-TMCK 22 R1223 B-TMCKB 22 AR1220 B-TMRASB B-MCKB B-MCKB B-MRASB B-MCASB B-MODT B-MWEB VCC_1.5V_DDR 56 B-TMCK B-TMCKB B-TMCKE B-TMDQSLB 22 B-TMDQSL 22 R1220 B-MDQSLB R1217 B-TMDQSU 22 R1218 B-TMDQSUB 22 AR1212 B-TMRESETB B-TMDQL1 B-TMDQL3 B-TMDML B-TMDQSL B-TMDQSLB B-TMDQSU B-TMDQSUB B-TMDML B-TMDMU B-TMDQL0 B-TMDQL1 B-TMDQL2 B-TMDQL3 B-TMDQL4 B-TMDQL5 B-TMDQL6 B-TMDQL7 B-TMDQU0 B-TMDQU1 B-TMDQU2 B-TMDQU3 B-TMDQU4 B-TMDQU5 B-TMDQU6 B-TMDQU7 B-TMDQU1 22 R1221 B-MDQU1 22 B-TMDQU6 B-TMDQU0 B-TMDQU4 B-TMDQU7 B-TMDQU3 B-TMDQU5 B-TMDMU 22 AR1218 B-MDQU6 B-MDQU0 B-MDQU4 22 AR1216 B-TMDQL0 B-TMDQL2 B-TMDQL6 B-TMDQL4 22 AR1217 B-MDQU7 B-MDQU3 B-MDQU5 B-MDMU B-MDQL0 B-MDQL2 B-MDQL6 B-MDQL4 B-TMDQU2 22 AR1213 B-TMCKE B-TMDQL7 B-TMDQL5 B-MCKE B-MDQL7 B-MDQL5 B-MDQL1 B-MDQL3 B-MDML B-MDQU2 B-MDQSUB B-MDQSU B-MDQSL B-MDQSLB B-MDQSU B-MDQSUB B-MDML B-MDMU B-MDQL0 B-MDQL1 B-MDQL2 B-MDQL3 B-MDQL4 B-MDQL5 B-MDQL6 B-MDQL7 B-MDQU0 B-MDQU1 B-MDQU2 B-MDQU3 B-MDQU4 B-MDQU5 B-MDQU6 B-MDQU7 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2
D7
A-TMA0
IC1202 H5TQ1G63BFR-H9C
N3 KOR FAB P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 B-MBA0 R1238 R1237 B-MCK B-MBA1 56 B-MBA2 M2 N8 M3 J7 56 K7 B-MCKE K9 L2 B-MODT B-MRASB B-MCASB R1232 10K B-MWEB B-MRESETB K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 DQSL DQSL A9 DQSU DQSU DML DMU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 B3 E1 G8 J2 J8 M1 M9 P1 P9
F3
IC1201 H5TQ1G63BFR-H9C
N3 KOR FAB P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 CK CK CKE L2 CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 NC_6 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL7 D7 C3 C8 C2 A7 A2 B8 A3 DML DMU E3 F7 F2 F8 H3 H8 G2 H7 DQSU DQSU E7 D3 C7 B7 F3 G3 A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB A-MDML A-MDMU A-MDQL0 A-MDQL1 A-MDQL2 A-MDQL3 A-MDQL4 A-MDQL5 A-MDQL6 A-MDQL7 A-MDQU0 A-MDQU1 A-MDQU2 A-MDQU3 A-MDQU4 A-MDQU5 A-MDQU6 A-MDQU7 RESET T2 K1 J3 K3 L3 A-MODT A-MRASB A-MCASB A-MWEB R1231 10K VCC_1.5V_DDR K7 K9 A-MCKE A-MBA0 R1236 R1235 56 A-MBA1 A-MBA2
B-TMA6
1K
M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 BA0 BA1 BA2 VDDQ_1 CK CK CKE VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 A1 A8 C1 C9 D2 E9 F1 H2 H9 J1 J9 L1 L9 T7 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA
B-MVREFCA
A-MA6 A-MA0 A-MA1 A-MA2 A-MA3 A-MA4 A-MA5 A-MA6 A-MA7 A-MA8 A-MA9 A-MA10 A-MA11 A-MA12 A-MA13 A-MRESETB A-MBA2 A-MA13 A-MA9 A-MCK C1209 56 0.01uF A-MCKB A-MCKB A-MRASB A-MCASB A-MODT A-MWEB 56 R1208 A-MDQSL A-MRESETB A-MDQSLB 22 R1211 A-MDQSU 22 R1212 A-MDQSUB 22 AR1209 A-MDQL1 A-MDQL3 A-MDML A-MDQU2 22 AR1210 A-MCKE A-MDQL7 A-MDQL5 22 AR1205 A-MDQL0 A-MDQL2 A-MDQL6 A-MDQL4 22 AR1206 A-MDQU7 A-MDQU3 A-MDQU5 A-MDMU 22 AR1207 A-MDQU6 A-MDQU0 A-MDQU4 22 R1210 A-MDQU1 22 R1233 10K 22 R1209 22 AR1202 A-MCK 22 R1207 56 R1206 A-MA4 A-MA12 A-MBA1 A-MA10 56 AR1201 A-MBA0 A-MA3 A-MA5 A-MA7 56 AR1204
H1 VREFDQ
A-TMBA0 A-TMA3 A-TMA5 A-TMA7 A-TMA0 A-TMA1 A-TMA4 A-TMA12 A-TMBA1 A-TMA10 A-TMA2 A-TMA3 A-TMA4 A-TMA5 A-TMA6 A-TMA7 A-TMRESETB A-TMBA2 A-TMA13 A-TMA9 A-TMA8 A-TMA9 A-TMA10 A-TMA11 A-TMA12 A-TMA13 A-TMCK B8 B9 A8 C21 B10 A22 A10 B22 C9 C23 B11 A9 C10 B23
B-TMA5 B-TMA7
B-TMA4 B-TMA0 B-TMA1 B-TMA2 B-TMA3 B-TMA4 B-TMA5 B-TMA6 B-TMA7 B-TMA8 B-TMA9 B-TMA10 B-TMA11 B-TMA12 B-TMA13 B-TMA12 B-TMBA1 B-TMA10
L8
VCC_1.5V_DDR
B-MCK
C1240 0.01uF
BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
A-TMCKB A-TMBA0 A-TMBA1 A-TMRASB A-TMCASB A-TMODT A-TMWEB A-TMCK A-TMCKB A-TMCKE A-TMDQSL A-TMDQSLB A-TMODT A-TMRASB A-TMCASB A-TMDQSU A-TMDQSUB A-TMWEB A-TMRESETB A-TMBA2
B21 A11 A23 A12 C11 B12 A_DDR3_MCLK/DDR2_MCLK A_DDR3_MCLKZ/DDR2_MCLKZ A_DDR3_CKE/DDR2_DQ5 B_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLKZ/DDR2_MCLKZ B_DDR3_CKE/DDR2_DQ5 A_DDR3_BA0/DDR2_BA2 A_DDR3_BA1/DDR2_CASZ A_DDR3_BA2/DDR2_A5 B_DDR3_BA0/DDR2_BA2 B_DDR3_BA1/DDR2_CASZ B_DDR3_BA2/DDR2_A5
D2 E9 F1 H2 H9 J1 J9 L1 L9 T7
1K
IC1202-*1 H5TQ1G63BFR-H9C-C
M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 M7 A15 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 DQSL DQSL C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA
P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
B-MDQSL
C20 A20 B20 A21 C22 A_DDR3_RESETB B_DDR3_RESETB A_DDR3_ODT/DDR2_ODT A_DDR3_RASZ/DDR2_WEZ A_DDR3_CASZ/DDR2_BA1 A_DDR3_WEZ/DDR2_BA0 B_DDR3_ODT/DDR2_ODT B_DDR3_RASZ/DDR2_WEZ B_DDR3_CASZ/DDR2_BA1 B_DDR3_WEZ/DDR2_BA0
NC_6
C16 B16 A16 C15 A14 B18 C18 B13 A19 C13 C19 A13 B19 C12 A15 A17 B14 C17 B15 A18 C14 B17 A_DDR3_DQU0/DDR2_DQ15 A_DDR3_DQU1/DDR2_DQ9 A_DDR3_DQU2/DDR2_DQ8 A_DDR3_DQU3/DDR2_DQ11 A_DDR3_DQU4/DDR2_DQM1 A_DDR3_DQU5/DDR2_DQ12 A_DDR3_DQU6/DDR2_DQM0 A_DDR3_DQU7/DDR2_DQ14 B_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU4/DDR2_DQM1 B_DDR3_DQU5/DDR2_DQ12 B_DDR3_DQU6/DDR2_DQM0 B_DDR3_DQU7/DDR2_DQ14 A_DDR3_DQL0/DDR2_DQ3 A_DDR3_DQL1/DDR2_DQ7 A_DDR3_DQL2/DDR2_DQ1 A_DDR3_DQL3/DDR2_DQ10 A_DDR3_DQL4/DDR2_DQ4 A_DDR3_DQL5/DDR2_DQ0 A_DDR3_DQL6/DDR2_CKE A_DDR3_DQL7/DDR2_DQ2 B_DDR3_DQL0/DDR2_DQ3 B_DDR3_DQL1/DDR2_DQ7 B_DDR3_DQL2/DDR2_DQ1 B_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL6/DDR2_CKE B_DDR3_DQL7/DDR2_DQ2 A_DDR3_DML//DDR2_DQ13 A_DDR3_DMU/DDR2_DQ6 B_DDR3_DML/DDR2_DQ13 B_DDR3_DMU/DDR2_DQ6 A_DDR3_DQSU/DDR2_DQSB1 A_DDR3_DQSUB/DDR2_DQS1 B_DDR3_DQSU/DDR2_DQSB1 B_DDR3_DQSUB/DDR2_DQS1 A_DDR3_DQSL/DDR2_DQS0 A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSL/DDR2_DQS0 B_DDR3_DQSLB/DDR2_DQSB0
J25 J24 H26 H25 F26 L24 L25 F24 L26 F25 M25 E26 M24 E25 G26 J26 G24 K25 H24 K26 G25 K24
T1 T9
G3
E8 F9 G1 G9
C3 C8 C2 A7 A2 B8 A3
A-TMDQU6 A-TMDQU7
A-MCKE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX63425902(5) DDR
2010.10.21 12 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
R1228
R1227
VCC_1.5V_DDR
R1343 10K TU_2INPUT_CTRL E Q1306 ISA1530AC1 TU_2INPUT_CTRL C C R1344 10K BTU_2INPUT_CTRL R1321 2.2K B TU_2INPUT_CTRL
USA/KOR_TUNER
TU1300 TDTR-T036F
+5V_TU TU1300-*1 UDA55AL
L1302
FE_BOOSTER_CTL
+5V_TU
1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 SHIELD NC_1 NC_2 +B[+5V] NC[RF_AGC] AS SCL SDA NC(IF_TP) SIF NC_3 VIDEO GND +1.2V +3.3V RESET IF_AGC_CNTL DIF_1 DIF_2
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 SHIELD
+3.3V
NC_1[RF_AGC] NC_2 SCLT SDAT NC_3 SIF NC_4 VIDEO GND +B2[1.2V] +B3[3.3V] RESET IF/AGC DIF_1[N] DIF_2[P]
TUNER_IF_N TUNER_IF_N TUNER_IF_P TUNER_IF_P Close to the tuner C1316 0.1uF 16V R1322 1K EXTERNAL_DEMOD C1312 62pF 50V C1313 62pF 50V L1305 C1318 20pF 50V C1319 20pF 50V 0 R1310 Close to the tuner R1300 3K R1301 3K 270nH
C1305 C1314 1200pF 1200pF 50V 50V TU_2INPUT_CTRL TU_2INPUT_CTRL
C1325 270nH L1304 TU_SCL CH_6 TU_SDA 100pF 50V R1325 4.7K B C Q1304 ISA1530AC1
+5V_TU
R1330 220
R1331 220
READY
R1324
0 E
R1334 0 TUNER_CVBS
+1.2V_DE
L1301 C1307 4.7uF 10V L1300 C1306 0.1uF C1304 4.7uF 10V C1303 0.1uF
+3.3V +3.3V
R1309 100 R1311 100K TUNER_RESET C1310 0.1uF 16V
Q1305 ISA1530AC1
ISDB_IF_AGC
EXTERNAL_DEMOD
IF_AGC_MAIN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LGIT CAN TUNER
EAX63425902(5)
2010.10.21 13 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
FLASH_WP L/R_DETECT
P_SCL
UART_TXD_3D
UART_RXD_3D
P_SDA
READY READY READY READY READY R1480 R1483 R1484 R1487 R1488 3.3K 3.3K 3.3K 3.3K 3.3K /JTAG_TRST +3.3V_3D JTAG_TCLK TMODE[0] TMODE[2] TMODE[3] JTAG_TDO TMODE[1] BOOT_SEL BOOT_SEL TMODE[3] TMODE[2] TMODE[1] TMODE[0] R1479 R1481 R1482 R1485 R1486 3.3K 3.3K 3.3K 3.3K 3.3K R1457 R1489 10K +3.3V_3D
IC1400 LG8300
+1.0V
SPI_CSZ
SPI_CK SPI_DI
SPI_DO
JTAG_TDI
JTAG_TMS
52 80 PC_SER_CLK PC_SER_DATA SCL_3.3V_MOD 49 48 DISP_EN SDA_3.3V_MOD 79 78 77 76 75 74 73 72 71 70 44 43 42 R1537 3D_ASIC 0 4.7K G R1538 SCL_3.3V_MOD 41 TA1N TA1P TB1N TB1P TC1N R1585 22 2D TC1P 40 TCLK1N 39 38 TD1N 37 36 35 34 TCLK1N TA2N 33 C1525 1000pF READY C1528 1000pF READY 32 31 30 29 28 27 26 25 TA2N TA2P TB2N TB2P TC2N TE2P TE2N TD2P TD2N TCLK2P TCLK2N TC2P TC2N TB2P TB2N TA2P TA2N TD2P TE2N TE2P TD2N TCLK2N TCLK2P READY 1000pF C1526 READY 1000pF C1527 18 17 16 15 14 13 12 11 10 9 +3.3V_3D 8 TCLK4N 7 R1428 READY R1430 READY 10K 10K TCLK4P TD4N 5 4 TD4P TE4N TE4P R1432 3D_L/R_SYNC 3D_L/R_SYNC_FHD 0 READY 3 2 1 MOD_ROM_TX MOD_ROM_RX 3D_L/R_SYNC_FHD 6 TA4N TA4P TB4N TB4P TC4N TC4P TD3N TD3P TE3N TE3P TCLK3N TCLK3P TC2P 24 23 22 21 20 19 TA3N TA3P TB3N TB3P TC3N TC3P TA2P TB2N TB2P TC2N TC2P TCLK2N TCLK2P TD2N TD2P TE2N TE2P TD1P TE1N TE1P TCLK1P TA1N TA1P TB1N TB1P TC1N TC1P 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
81 F6 F13 G6 G7 G8 G9 G10 G11 G12 G13 H6 H13 J6 J13 K6 K13 L6 L7 L8 L9 L10 L11 L12 L13 +1.0V_LTX M6 M13 H5 J5 K5 +3.3V_VDD L5 M5 LTX_VDD10_1 LTX_VDD10_2 LTX_VDD10_3 LTX_VDD10_4 LTX_VDD10_5 VDD10_1 VDD10_2 VDD10_3 VDD10_4 VDD10_5 VDD10_6 VDD10_7 VDD10_8 VDD10_9 VDD10_10 VDD10_11 VDD10_12 VDD10_13 VDD10_14 VDD10_15 VDD10_16 VDD10_17 VDD10_18 VDD10_19 VDD10_20 VDD10_21 VDD10_22 VDD10_23 VDD10_24 VDD10_25 VDD10_26
A2 GND_0 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 +3.3V_LRX F15 G15 L16 +3.3V_LTX N16 E4 G4 L4 N4 DDR_VREF_LG8300 J4 LTX_AVDD33_1 LTX_AVDD33_2 LTX_AVDD33_3 LTX_AVDD33_4 LTX_AVDD33_5 LRX_AVSS33_1 T4 R11 +1.8V V17 N7 N8 N9 N10 N11 N12 N13 N14 P6 P7 P8 P9 P10 P12 P13 P14 P15 DDR_VDDQ_1 DDR_VDDQ_2 DDR_VDDQ_3 DDR_VDDQ_4 DDR_VDDQ_5 DDR_VDDQ_6 DDR_VDDQ_7 DDR_VDDQ_8 DDR_VDDQ_9 DDR_VDDQ_10 DDR_VDDQ_11 DDR_VDDQ_12 DDR_VDDQ_13 DDR_VDDQ_14 DDR_VDDQ_15 DDR_VDDQ_16 DDR_VDDQ_17 DDRPLL_AVDD33 SYSPLL_AVDD33 SSPLL_AVDD33 ADPLL_AVDD33 DDRPLL_AVSS33 SYSPLL_AVSS33 ADPLL_AVSS33 SSPLL_AVSS33 C18 D18 E17 E18 C17 D17 E16 F16 +3.3V_PLL DDR_VREF0 DDR_VREF1 DDR_VREF2 LTX_AVSS33_1 LTX_AVSS33_2 LTX_AVSS33_3 LTX_AVSS33_4 LTX_AVSS33_5 LRX_AVSS33_2 F4 H4 K4 M4 P4 LRX_AVDD33_1 LRX_AVDD33_2 VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 VDD33_7 VDD33_8 VDD33_9 VDD33_10 VDD33_11 VDD33_12 VDD33_13 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 M16 P16 F5 F7 F8 F9 F10 F11 F12 F14 G5 G14 G16 H7 H8 H9 H10 H11 H12 H14 H15 H16 J7 J8 J9 J10 J11 J12 J14 J15 J16 K7 K8 K9 K10 K11 K12 K14 K15 K16 L14 L15 M7 M8 M9 M10 M11 M12 M14 M15 N5 N6 N15 P5 P11 R4 R14
JP1410
JP1411
JP1412
JP1413
R1420 0
JP1414
READY R1540 0
50
PC_SER_DATA
22 R1412
22 R1413 22 R1414
22 R1415
22 R1416 22 R1417
22 R1410
22 R1411
22 R1418
22 R1419
22 R1453 22 R1454
22 R1452
22 R1455 22 R1456
22
IC1402 W25X20BVSNIG
CS VCC
S 3D_ASIC
SPI_CSZ A16 B16 C16 D16 A15 B15 C15 D15 A14 B14 C14 D14 A13 B13 C13 D13 A12 B12 C12 D12 A11 B11 C11 D11 A10 B10 C10 D10 A9 B9 C9 D9 A8 B8 C8 D8 A7 B7 C7 D7 A6 B6 C6 D6 A5 B5 C5 D5 A4 B4 C4 D4 A3 SPI_DO BOOT_SEL
DO
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
TRST
UART_TXD
UART_RXD
SPI_SCLK
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[24]
GPIO[25]
GPIO[26]
GPIO[27]
GPIO[28]
GPIO[29]
GPIO[30]
GPIO[31]
TEST_SE
SCL_M
SDA_M
SCL
SDA
TDI
TMS
TDO
TCK
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
SPI_CS
SPI_DO
SPI_DI
WP
CLK
3D_ASIC
SPI_CK
DIO
+3.3V_3D
C
GND
FLASH_WP U18
E
Q1400 KRC103S
TE4P TE4N TD4P TD4N TCLK4P TCLK4N TC4P TC4N TB4P TB4N TA4P TA4N TE3P TE3N TD3P TD3N TCLK3P TCLK3N TC3P TC3N TB3P TB3N TA3P TA3N TE2P TE2N TD2P TD2N TCLK2P TCLK2N TC2P TC2N TB2P TB2N TA2P TA2N TE1P TE1N TD1P TD1N TCLK1P TCLK1N TC1P TC1N TB1P TB1N TA1P TA1N
B2 B1 B3 C3 C1 C2 D2 D1 D3 E3 E1 E2 F2 F1 F3 G3 G1 G2 H2 H1 H3 J3 J1 J2 K2 K1 K3 L3 L1 L2 M2 M1 M3 N3 N1 N2 P2 P1 P3 R3 R1 R2 T2 T1 T3 U3 U1 U2 TE1P TE1N TD1P TD1N TCLK1P TCLK1N TC1P TC1N TB1P TB1N DDR_ADDR[10] DDR_ADDR[11] DDR_ADDR[12] DDR_DQS_N[0] DDR_DQS_N[1] DDR_TDOUT[0] DDR_DQS[0] DDR_DQS[1] DDR_DQ[10] DDR_DQ[11] DDR_DQ[12] DDR_DQ[13] DDR_DQ[14] DDR_DQ[15] TA1N DDR_TDOUT[1] TA1P DDR_ADDR[0] DDR_ADDR[1] DDR_ADDR[2] DDR_ADDR[3] DDR_ADDR[4] DDR_ADDR[5] DDR_ADDR[6] DDR_ADDR[7] DDR_ADDR[8] DDR_ADDR[9] TE2P TE2N TD2P TD2N TCLK2P TCLK2N TC2P TC2N TB2P TB2N TA2P TA2N LR_SYNC EMITTER_PULSE CLK_XIN CLK_XOUT PO_RST_N TE3P TE3N TD3P TD3N TCLK3P TCLK3N TC3P TC3N TB3P TB3N TA3P TA3N RA2N RA2P TE4P TE4N TD4P TD4N TCLK4P TCLK4N TC4P TC4N TB4P TB4N TA4P TA4N RA1N RA1P RB1N RB1P RC1N RC1P RCLK1N RCLK1P RD1N RD1P RE1N RE1P
U17 T18 T17 R18 R17 P18 P17 N18 N17 M18 M17 L18 L17 K18 K17 J18 J17 H18 H17 G18 G17 F18 F17
LVDS_DATA_1_ALVDS_DATA_1_A+ LVDS_DATA_1_BLVDS_DATA_1_B+ LVDS_DATA_1_CLVDS_DATA_1_C+ LVDS_CLK_1LVDS_CLK_1+ LVDS_DATA_1_DLVDS_DATA_1_D+ LVDS_DATA_1_ELVDS_DATA_1_E+ C1530 1000pF READY C1529 1000pF READY
Q1401 2N7002(F)
R1472 R1473
EJTAG
+3.3V_3D TCLK1P
LVDS_DATA_2_ALVDS_DATA_2_A+ LVDS_DATA_2_BLVDS_DATA_2_B+ LVDS_DATA_2_CLVDS_DATA_2_C+ LVDS_CLK_2LVDS_CLK_2+ LVDS_DATA_2_DLVDS_DATA_2_D+ 3D_ASIC READY R1494 3.3K R1495 3.3K 3D_ASIC 3D_ASIC R1500 3.3K 3D_ASIC R1501 3.3K P1400 YFDW254-14S READY nTRST TDI TDO TMS TCK 0 3D_ASIC R1491 READY nRST DINT R1498 1K 1 3 5 7 9 11 13 2 4 6 8 10 12 14 GND GND GND GND GND NC VIO R1507 3.3K READY LVDS_DATA_1_E+ LVDS_DATA_1_ELVDS_DATA_1_D+ LVDS_DATA_1_DLVDS_CLK_1+ LVDS_CLK_1LVDS_DATA_1_C+ LVDS_DATA_1_CLVDS_DATA_1_B+ LVDS_DATA_1_BLVDS_DATA_1_A+ LVDS_DATA_1_ALVDS_DATA_2_E+
2D BYPASS
0 R1533 0 R1534 0 R1528 0 R1529 0 R1530 0 R1531 0 R1532 0 R1523 0 R1524 0 R1525 0 R1526 0 R1527 0 R1519 0 R1520 0 R1521 0 R1522 0 R1514 0 R1515 0 R1516 0 R1517 0 R1518 0 R1511 0 R1512 0 R1513 0 R1564 0 R1565 0 R1559 0 R1560 0 R1561 0 R1562 0 R1563 0 R1554 0 R1555 0 R1556 0 R1557 0 R1558 0 R1550 0 R1551 0 R1552 0 R1553 0 R1545 0 R1546 0 R1547 0 R1548 0 R1549 0 R1542 0 R1543 0 R1544 TE1P TE1N TD1P TD1N TCLK1P TCLK1N TC1P TC1N TB1P TB1N TA1P TA1N
IC1400 LG8300
RB2N RB2P RC2N RC2P RCLK2N RCLK2P RD2N RD2P RE2N RE2P
P_SCL
C1532 1000pF READY C1531 1000pF READY /JTAG_TRST JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TCLK
R1499 3.3K
LG8300_RESET
+3.3V_3D READY SW1400 JTP-1127WEM 1 3 2 4
LVDS_DATA_2_BLVDS_DATA_2_A+ LVDS_DATA_2_A-
R1421 0 READY
DDR_BA[0]
DDR_BA[1]
DDR_RAS_N
DDR_CAS_N
DDR_DM[0]
DDR_DM[1]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_TAOUT
DDR_CK_N
DDR_CS_N
DDR_WE_N
DDR_CKE
DDR_ODT
DDR_CK
+1.8V
MOD_ROM_TX MOD_ROM_RX C1415 10uF 6.3V C1416 0.1uF 16V C1423 0.1uF 16V C1424 0.1uF 16V C1427 0.1uF 16V C1430 0.1uF 16V C1431 0.1uF 16V C1434 0.1uF 16V C1436 0.1uF 16V C1437 0.1uF 16V C1439 0.1uF 16V C1442 0.1uF 16V C1444 0.1uF 16V C1445 0.1uF 16V C1450 0.1uF 16V C1452 0.1uF 16V C1453 0.1uF 16V C1456 0.1uF 16V
R10
V14
V12
U14
U12
R15
T12
U16
T16
R16
V16
T14
U15
T13
V11
U13
U11
T11
V13
R12
R13
U10
T10
C_DDR_A[10] R9 C_DDR_A[11] T7
C_DDR_A[12] V7
C_DDR_A[0]
C_DDR_A[1]
C_DDR_A[2]
C_DDR_A[3]
C_DDR_A[4]
C_DDR_A[5]
C_DDR_A[6]
C_DDR_A[7]
C_DDR_A[8]
C_DDR_A[9]
C_DDR_DQ[11]
C_DDR_DQ[10]
C_DDR_DQ[12]
C_DDR_DQ[13]
C_DDR_DQ[14]
C_DDR_BA[0]
C_DDR_BA[1]
C_DDR2_CLK
C_DDR2_ODT
/C_DDR_RAS
/C_DDR_CAS
/C_DDR_WE
C_DDR_DQM0
/C_DDR2_CLK
C_DDR_DQS0P
C_DDR_DQS1P
C_DDR_DQS0M
C_DDR_A[12-0]
C_DDR_DQS1M
C_DDR2_CKE
C_DDR_DQM1
/C_DDR_CS
C_DDR_DQ[15]
C_DDR_DQ[3]
C_DDR_DQ[4]
C_DDR_DQ[5]
C_DDR_DQ[6]
C_DDR_DQ[7]
C_DDR_DQ[2]
C_DDR_DQ[8]
C_DDR_DQ[9]
V10
U5
V8
V5
U8
R6
T8
T6
R8
R7
U7
U9
T9
V6
U6
V9
R5
U4
V4
T5
C_DDR_DQ[15-0]
TF05-51S P1401 HD
5V TO 1.0V
+5V AR1413 22 1/16W READY R1492 10K READY C1429 0.1uF 16V EP[GND] R1504 VIN_3 R1502 0 +1.0V R1425 +1.0V
L1400 BLM18PG121SN1D
C_DDR_DQ[5] R1409 22 C_DDR2_CLK R1406 22 /C_DDR2_CLK R1407 22 C_DDR_DQS0P R1408 22 C_DDR_DQS1P R1404 22 C_DDR_DQM0 R1405 22 C_DDR_DQM1 R1402 22 C_DDR_DQS0M R1403 22 C_DDR_DQS1M R1401 22 /C_DDR_CS /DDR_CS DDR_DQS1M DDR_DQS0M C_DDR_A[1] C_DDR_A[3] C_DDR_A[12] C_DDR_A[9] DDR_DQM1 DDR_DQM0 DDR_DQS1P C_DDR_A[2] C_DDR_A[0] /C_DDR_RAS C_DDR2_ODT AR1400 22 1/16W DDR_A[1] DDR_A[3] DDR_A[12] DDR_A[9] C_DDR_DQ[3] C_DDR_DQ[4] C_DDR_DQ[1] C_DDR_DQ[6] C_DDR_DQ[15-0] AR1410 22 1/16W DDR_DQS0P /DDR2_CLK DDR2_CLK /C_DDR_WE C_DDR2_CKE C_DDR_BA[1] C_DDR_BA[0] AR1401 22 1/16W DDR_A[2] DDR_A[0] /DDR_RAS DDR2_ODT C_DDR_A[8] C_DDR_A[6] C_DDR_A[4] /C_DDR_CAS AR1402 22 1/16W /DDR_WE DDR2_CKE DDR_BA[1] DDR_BA[0] C_DDR_A[10] C_DDR_A[5] C_DDR_A[7] C_DDR_A[11] AR1403 22 1/16W DDR_A[8] DDR_A[6] DDR_A[4] /DDR_CAS C_DDR_DQ[14] C_DDR_DQ[9] C_DDR_DQ[11] C_DDR_DQ[12] AR1411 22 1/16W AR1404 22 1/16W DDR_A[10] DDR_A[5] DDR_A[7] DDR_A[11] C_DDR_DQ[13] C_DDR_DQ[10] C_DDR_DQ[8] C_DDR_DQ[15] AR1412 22 1/16W C_DDR_DQ[2] C_DDR_DQ[0] C_DDR_DQ[7]
DDR_DQ[13] 16 15 14 DDR_DQ[10] DDR_DQ[8] DDR_DQ[15] C1419 10uF 16V DDR_DQ[14] 5 6 7 DDR_DQ[9] DDR_DQ[11] DDR_DQ[12] 8 C1420 0.1uF VIN_1 VIN_2 GND_1 GND_2 13 1 2 3 4 THERMAL 17 12 11 PH_3 PH_2 PH_1 SS/TR
EN
R1
R1510 5.1K 1% C1440 2200pF R1509 22K 1% C1466 10uF 6.3V C1471 0.1uF 16V C1479 0.1uF 16V C1485 0.1uF 16V C1486 0.1uF 16V C1491 0.1uF 16V C1502 10uF 6.3V 3D_ASIC READY C1449 C1448 22uF 100pF 10V 50V C1451 10uF 10V C1455 C1454 0.1uF 10uF 16V 10V +1.0V_LTX +3.3V_LRX +1.0V L1411 C1508 0.1uF 16V C1515 0.1uF 16V +1.0V_LTX
VSENSE
COMP
RT/CLK
AGND
R2
10K
+3.3V_3D L1410
+3.3V_VDD
+3.3V_LTX
L1408 C1470 10uF 6.3V C1477 0.1uF 16V C1478 0.1uF 16V C1484 0.1uF 16V C1490 0.1uF 16V C1496 0.1uF 16V C1497 10uF 6.3V C1501 0.1uF 16V C1507 0.1uF 16V C1513 0.1uF 16V C1514 0.1uF 16V C1518 0.1uF 16V L1409
Vout=0.8*(1+R1/R2)
+3.3V_PLL
+3.3V_LRX +3.3V_PLL L1407 DDR_VREF_LG8300 +3.3V_3D L1405 +3.3V_3D_A C1469 10uF 6.3V C1475 0.1uF 16V C1476 0.1uF 16V C1483 0.1uF 16V C1489 0.1uF 16V
5.0V TO 3.3V+3.3V
IC1406 AZ1085S-3.3TR/E1
2D L1404
+3.3V_3D
IC1401 W9725G6JB-25
DDR_DQ[15-0] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] DDR_DQ[5] DDR_DQ[6] DDR_DQ[7] DDR_DQ[8] DDR_DQ[9] DDR_DQ[10] DDR_DQ[11] DDR_DQ[12] DDR_DQ[13] DDR_DQ[14] DDR_DQ[15] +1.8V A1 E1 CLK CLK CKE J8 K8 K2 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1
3 1
DDR_A[12-0] DDR_A[0] DDR_A[1] DDR_A[2] DDR_A[3] DDR_A[4] DDR_A[5] DDR_A[6] DDR_A[7] DDR_A[8] DDR_A[9] DDR_A[10] DDR_A[11] DDR_A[12]
VREF 3D_ASIC
J2
G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9
L1412
+1.8V
IC1403 SI3865BDV
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
3.3V TO 1.8V
IC1407 KIA1117ST18
+1.8V_ON
+1.8V R1568 0 1/10W 5%
ON/OFF
$0.081
D2_1
S2
D2_2
RF EMITTER (STRAIGHT)
READY 560 R1437 C1534 22uF 16V 3225 READY C1535 4.7uF 10V P1404 12507WS-12L JP1401 1 READY READY READY R1581 R1590 R1591 2.7K 2.7K 2.7K 3D_ASIC R1575 100 3D_RF_RXD JP1404 4 3D_ASIC ZD1401 5.6B 3D_ASIC R1576 100 3D_RF_TXD 3D_ASIC R1579 100 R1589 3D_ASIC 3D_RF_RESET 1K
+3.3V
+3.3V
READY
3D_ASIC
BA0 BA1
L2 L3
+3.3V3D TO +3.3V_3D_A
JP1402 2 JP1403 3
/DDR2_CLK
IR EMITTER (STRAIGHT)
P1403 12507WS-04L
READY 1
L8 K7 L7 K3
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 3D_ASIC 3D_ASIC VDDQ_3 VDDQ_2 VDDQ_1 R1426 4.7K 1% 3D_ASIC 3D_ASIC 3D_ASIC DDR_VREF_LG8300 3D_ASIC 3D_ASIC R1429 4.7K 1% 3D_ASIC 3D_ASIC R1435 4.7K 1% 3D_ASIC C1405 C1406 0.1uF 1000pF DDR_VREF_DDR 3D_ASIC +1.8V 3D_ASIC +1.8V 3D_ASIC
JP1405 5
3D_ASIC
K9
ZD1402 5.6B
+5V
R1578 0 3D_ASIC
3D_RFMODULE_DC 2 3D_RFMODULE_DD
DDR_DQS0P DDR_DQS1P
LDQS UDQS
F7 B7
7 3D_ASIC
R1577 0 3D_ASIC
ZD1404 5.6B READY R1567 R1571 0 2.7K 3D_ASIC 3D_ASIC 3D_ASIC ZD1405 5.6B 3D_ASIC R1569 0
+3.3V
READY R1573 2.7K READY R1580 2.7K 3D_GPIO_0 5 3D_GPIO_1 3D_ASIC
DDR_DQM0 DDR_DQM1
LDM UDM
F3 B3
DDR_DQS0M DDR_DQS1M
LDQS UDQS
E8 A8
A3 E3 J3 N1 P9
ZD1406 5.6B
R1570 0 3D_GPIO_2 3D_ASIC R1572 0 3D_L/R_SYNC 3D_ASIC 3D_ASIC 1K R1586 1K R1587 3D_ASIC 3D_ASIC 1K R1588
L1 R3 R7
ZD1407 5.6B
A2 E2 R8
B2 B8 A7 D2 D8 E7 F2 F8 H2
VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1
13
Close to LG8300
Close to DDR2(IC1401)
VSSDL
J7
H8
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
3D_ASIC
ZD1408 5.6B
EAX63425902(5) 3DF
2010.10.21 14 14
Copyright 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
Contents
- Block Diagram - System Design - Trouble Shooting Guide
ATSCGroupGP2RTeam
Last updated 2010.06.03
X-tal
IF ISDB-T/ PAL/NTSC SIF IF(ATSC) CVBS
(24MHz)
Serial Flash
NAND Flash
DDR3
DEMOD
Serial_TS(SBTVD)
LVDS out
HD(WXGA,XGA) FHD 2D/3D SPDIF Out
CVBS(ATV)
Audio DSP
MCLK
I2S
S7L
IR
L/R L/R
UART
HDMI RX
USB2.0
Side USB
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
I2S
TAS5709 TAS5709
(USB)
HDMI_Rear(D port) SIDE HDMI_PORT UI_HW_PORT1 UI_HW_PORT1 HDMI_Side (C port) HDMI_Side (B port)
Breakthrough
Reset Design
GPIO Reset Active Low H/W Reset Active High S7 (Main Soc) GPIO Reset Active Low GPIO Reset Active Low
TAS5709 (AMP)
Tuner
Demodulator
Breakthrough
S7 Power Sequence
Appendix
Power Up Sequence
Power
Breakthrough
S7 Power Sequence
Appendix
Time t1 t2 t3 t4
Description XTAL stable to Reset falling Reset pulse width 1.26V to Reset falling 3.3VDDP to Reset falling
Min 5 5 5 5
Typ.
Max
Unit ms ms ms ms
Breakthrough
S7 Power Sequence
# t2 : Reset Pulse Width : 40ms OK
Breakthrough
S7 Power Sequence
a) AC On
1 :X-tal 2 : 3.3V 3 : 1.26V 4 : Reset
b) DC(Remocon) On
1 :X-tal 2 : 3.3V 3 : 1.26V 4 : Reset
# t1 : Reset Pulse Width : 400ms # t3 : Reset Pulse Width : 400ms # t4 : Reset Pulse Width : 400ms
OK OK OK
# t1 : Reset Pulse Width : 120ms # t3 : Reset Pulse Width : 120ms # t4 : Reset Pulse Width : 120ms
OK OK OK
Breakthrough
CH 6
+3.3V_TU
DDCR_CK/GPIO72 DDCR_DA/GPIO71
CH 2
+3.3V
NVRAM NVRAM TGPIO0 TGPIO1 (U1) (U2) <SCL1> <SDA1> 0xA0 0xA0
HDCP EEPROM HDCP EEPROM 0xA8 0xA8 DEMOD.(BRAZIL) DEMOD.(BRAZIL) MN884433 MN884433 0xD8 0xD8 +3.3V PDP MODULE PDP MODULE
CH 5
+3.3V
SATURN 7
TGPIO183 TGPIO177 (F18) <MODULE_SCL> (G14) <MODULE_SDA>
EEPROM EEPROM HDMI1 HDMI1 0XA0 0XA0 EEPROM EEPROM HDMI1 HDMI1 0XA0 0XA0 EEPROM EEPROM HDMI1 HDMI1 0XA0 0XA0 EEPROM EEPROM RGB RGB 0XA0 0XA0
CH 12 CH 12 CH 11 CH 8
0x1C 0x1C
I2S_IN_WS/GPIO174 I2S_IN_BCK/GPIO175
(F15) <NEC_SCL> (F14) <NEC_SDA> SUB I2C SUB I2C Touch Eye Touch Eye 0x70 0x70
CH 7
+3.3V
Breakthrough
GPIO Structure
GPIO 66 67 31 32 42 11 14 TCON2/GSP _R/GCLK1 TCON4/CPV //GSC_R/G CLK3 TCON6/FLK 40 50 51 5 7 15 16 17 176 TCON8/CS2 /FLK3 Signal Name PWM0 PWM1 DSUB_DET Model_OPT_3 Model_OPT_0 Model_OPT_1 Model_OPT_2 5V_DET_HDMI_2 5V_DET_HDMI_4 Direction Input Input Input Input Input Input/Output Input/Output Input Input Chip configuration Chip configuration D-Sub Auto link check Model option 3 Model option 0 Model option 1 /FE_BOOSTER_CTRL Model option 2/RF_SWITCH_CTL (HDMI3 Ready) HDMI 5V Detect HDMI Side 5V Detect Description
5V_DET_HDMI_3 COMP1_DET MOD_ROM_RX MOD_ROM_TX USB1_OCD USB1_CTRL TUNER_RESET DEMOD_RESET AV_CVBS_DET COMP2_DET SIDE_CVBS_DET
Input Input Input Output input Output Output Output Input Input Input
HDMI_1 5V Detect Compnent1 Auto link Module Rom download UART Module Rom download UART USB1_OCD USB1_5V Power Control TUNER_RESET Demodulator Reset AV_CVBS Auto link Compnent2 Auto link SIDE_CVBS Auto link
Breakthrough
P_17V
1 2
+3.3V_AU_AVDD +3.3V_DVDD
L901 L903
+3.3V Regulator IC
+5V_TU
L1303
TU1300 Tuner
L1301
+1.2V_DE +3.3V
L1300
+5V
5 7
6 8 15 16 17
P_+5V
L507 L503
IC502 MP2212DN IC501 MP8706EN IC504 AZ1085S IC801/802/804 HDMI eeprom P904 3D LVDS P905 Emitter board USB IC1101 AP21915 USB(SVC) +3.3V
+1.5V_DDR_IN $5.65
L1201
P_+5V
+1.05V_VDDC
IC1201~2 DDR3
AVDD2P5_2.5 AVDD25_PGA_2.5 ADC2P5_2.5
P_+5V
L514
+3.3V_AVDD +2.5V_AVDD
L303
5Vst
13 14
L304
P_+5V
+3.3V
IC505 MIC39100 IC104 NAND flash IC103 Serial flash IC102 HDCP eeprom IC109 NVRAM IC602 MN884433
L306
L501
P_+5V
+3.3V
+1.05V_VDDC
L323
VDDC
L321 L324
+1.05V_VDDC
+5V_ST
P_+5V
+3.3V
+1.05V_VDDC +1.5V_DDR_IN
P_+5V
+3.3V
L300
L301
+3.3V
L307
L308
L302
+3.3V_DE
L609
+3.3V_AVDD +3.3V_AVDD
L310 L309
IC101 S7L
R202
+1.2V_DE
VDD33_3.3 VDD33_3.3
L314
L316
IC900 MAX3232
Reset
Optic
Breakthrough
Power-Up Boot Fail Trouble Shooting No OSD Trouble Shooting Digital TV Video Trouble Shooting Analog TV Video Trouble Shooting Component Video Trouble Shooting RGB Video Trouble Shooting AV Video Trouble Shooting HDMI Video Trouble Shooting All Source Audio Trouble Shooting Digital TV Audio Trouble Shooting Analog TV Audio Trouble Shooting Component / RGB / AV Audio Trouble Shooting HDMI Audio Trouble Shooting USB Trouble Shooting
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Replace Cable
Breakthrough
Va
TVaR TVaF
Vs
TVsR TVsF Td_on Td_off
DISPEN
Symbol TOn TOff TOnR TVaR TVaF TVsR TVsF Td_on Td_off
Normal Display
Description
unit msec msec msec msec msec msec msec msec msec
Time interval between 90% of Vcc and 10% of Vs when Power On Time interval between 10% of Vs and 90% of Vcc when Power Off Time interval between 10% of Vcc and 90% of Vcc when Power On Rising Time of Va (10% to 90%) Falling Time of Va (90% to 10%) Rising Time of Vs (10% to 90%) Falling Time of Vs (90% to 10%) Time interval between 90% of Vs and DISPEN rising edge when Power On Time interval between DISPEN falling edge and 90% of Vs when Power Off
Breakthrough
SCL
Y Y
SDA
A7
A6
A0
SCL (continue) SDA (continue) ACK By Slave D7 D6 Command Data for Addr D0 Stop ACK By Slave By Master
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Check RF Cable Y Check Tuner(TU1300) Power (5.0V, 3.3V, 1.2V) Y N Check IF Signal pin #17, 18 Y Check Demodulator Power (3.3V, 1.2V) L609, IC600 Y Check Demodulator X-TAL (X602) Y Check TP Clock, Data, Sync R630, R631, R632 Y Maybe MstarS7(IC100) has problems N Maybe Demodulator has problems N Replace X-TAL N Replace L609 / IC600 Maybe Tuner has problems N Replace one of Bead & Recheck
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_S7
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_S7
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Exception - USB power could be disabled by inrushing current - In this case, remove the device and try to reboot the TV (AC power off/on)
Breakthrough