Block Diagram of a Primary Multiplexer

Siemens

Block Diagram of a Primary Multiplexer

Contents
1 2 3 Transmit Side Receive Side Exercise 3 7 11

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Siemens

Block Diagram of a Primary Multiplexer

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Block Diagram of a Primary Multiplexer

Siemens

Transmit Side

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Block Diagram of a Primary Multiplexer

The required functional entities of the DSMX 64 K/2F are accordingly subdivided into a transmit section and a receive section. The transmit section incorporates the transmit unit and transmit-side speech circuits in the telephone channel units or the transmit-side circuits of the data channel units; the receive section comprises the receive unit and the receive-side speech circuits in the telephone channel units or the receive-side circuits of the data channel units.

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Block Diagram of a Primary Multiplexer

Siemens

VF

VF

. . .
DS30

~ ~ ~ ~ ~ ~

A D A D PCM

A/D = Analog-Digital converter Dec = Decoder SMX = Signaling multiplexer 2 Mbit/s signal F1 out

Combining

Dec

Supervision

Gen. of frame alignment signal

bits D, N, Y

SMX Alarm output Clock generation

Fig. 1 Block diagram of transmit side, showing functional blocks

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Block Diagram of a Primary Multiplexer

Telephone Channel Unit The transmit-side speech circuit takes over the telephone signals present on the associated telephone lines (VF signals). The signals are band-limited from 300 Hz to 3400 Hz. Depending on the required relative level setting, the signal is amplified or attenuated before the A/D conversion. The relative level in transmit direction is referred to the input of the A/D converter. Thus a relative level setting of -14 dBr means that the level before the amplifier is 14 dB less than at the input of the A/D converter. With other terms the signal is amplified by 14 dB. The resulting PAM values (pulse amplitude modulation) are converted into 8-bit code words by the encoder. This non-linear quantizing is amplitude-dependent. The encoding characteristic (A-law), which is symmetrical with respect to the zero line, consists of 13 linear segments, giving an approximately logarithmic response.

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Block Diagram of a Primary Multiplexer

Siemens

Receive Side

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Block Diagram of a Primary Multiplexer

The 2 Mbit/s PCM-E signal is fed to all the channels and the signaling multiplexer. The addressing, which is derived from the clock generator, ensures that the individual 8-bit words are read into the associated channel units or the signaling multiplexer with the correct timing. The functional blocks synchronization and sections of the clock generator and distributor are concentrated in a highly integrated I2L device mounted in the transmit unit (PCM receive device).

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Block Diagram of a Primary Multiplexer

Siemens

VF

~ ~
. . .

A D PCM-E A D

A/D = Analog-Digital converter Dec = Decoder SMX = Signaling multiplexer 2 Mbit/s signal F1 in

VF

~ ~

Distribution and evaluation

Cod DS30 SMX

Supervision

Det. of frame align. sig. and eval. of parity bit

bits D, N, Y

Alarm output Clock generation

Fig. 2 Block diagram of the receive side

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Block Diagram of a Primary Multiplexer

Telephone Channel Unit The PAM signal is generated from the 8-bit words in the decoder. A low-pass filter with (sin x) / x equalization reconverts the sample-and-hold signal formed from the sequence of PAM values to the VF signal. Depending on the required relative level setting the signal is amplified or attenuated after the D/A converter. The relative level in receive direction is referred to the output of the D/A converter. Thus a relative level of 4 dBr means that the level after the amplifier is 4 dB higher than at the output of the D/A converter. With other terms the signal is amplified by 4 dB. Data Channel Unit The 8-bit words are read into a memory with the 2-MHz receive clock, undergo serialparallel conversion and are then read out again at 64 kHz. The 64 kbit/s signal is then encoded and fed out from D2out at 256 kbaud.

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Block Diagram of a Primary Multiplexer

Siemens

Exercise

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Block Diagram of a Primary Multiplexer

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Block Diagram of a Primary Multiplexer

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Exercise
Which blocks of the primary multiplexer may be distinguished for the application of voice channel transmission and data channel transmission?

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Block Diagram of a Primary Multiplexer

14

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