Sunteți pe pagina 1din 26

ICs for TV

AN5165K
A Single Chip IC for NTSC Color-TV
I Overview
The AN5165K is an IC in which all of the NTSC system color television signal processing circuits are integrated on a single chip. The rationalization of set production line can be realized by this IC incorporating I2C bus interface.
1 52

Unit: mm
0.50.1 1.00.25
(0.7) 3.850.3 (3.3)
+0.2

I Features
Built-in video IF circuit, sound IF circuit, video signal processing circuit, color signal processing circuit, deflection correction circuit and sync. signal processing circuit Built-in I2C bus interface

26 13.70.3

27

0.25 -0.05

I Applications
TVs

3 to 15

(15.24)

SDIP052-P-0600A Note) The package of this product will be changed to lead-free type (SDIP052-P-0600F). See the new package dimensions section later of this datasheet.

47.70.3

1.778

Publication date: December 2001

SDB00001BEB

2
V/C/J/5 V DET Out AFT Out BLDET IF AGC FBP In IF 9 V SIF In Int.V C In V Sync. Y In Ext.Audio Video Out V Clamp H Sync. APC VCJ GND 35 VCO1 36 VCO2 45
to Video HBLK

AN5165K

H Out

X-ray

CW Out 44 43 42 41 40 39 38 37 34 33 32 31 30 29 28 27
Hor. Sync. Sep. CV Clamp DAC 4-bit VAMP Lock DET Ver. Sync. Sep. DL PT Trap VCO CTRL VCO SW V SW VA SW VSW SIF
DC

I Block Diagram

VBLK

to Video RGB

V Out1
RAMP B.G.P SW
3-bit
to Chroma

HOSC

AFC1

6.3 V

2fH Ver. CountDown

SDB00001BEB
Sharpness DAC
6-bit

Killer Off SW

CW Out Y Clamp Bright DAC


DC 8-bit

Tint DAC C Filter


7-bit 8-bit Cut Off Drive RGB Limit 3-bit

7-bit

VCO SW
Cut Off B SW Cut Off R SW

52
L.P.F. APC NI IF AGC PLL DAC Y.N.R SW
On/Off SW7-bit

S.SW

SW

Ver. Out

SW Killer
BPF SW

51
SW DAC Y Contrast SW L.P.F. DAC
7-bit ABL SW

50
B.P.F.1 B.P.F.2 AFT DAC IF DET
9-bit

X-ray

49

HVCO

48

47

HBLK

46

H.EQP 32fH

AFC1

Hor. CountDown

Hosc1 H Pluse Hosc2 H Out1

AFC2

H Out2

CCP (Hosc4)

Trig1 Trig2 A Trig P.EQP

H Center

DAC 5-bit

ACC DET

ACC1

DEMP
5-bit

ACC2

Contrast

DAC VOL

Color Black Expamsion SW On/Off SW

DEM

VIF Amp.

DAC 7-bit RF AGC

ASW

APC DAC DAC Cut off DAC Drive

Gain Control

YS&YM

10

11

12

13

14

15

16

17

19

20

21

22

23

24

25

26

18 IF 5 V

1 R B G B In V/C/J 9 V Lock DET GND (RGB)

9V

R In

G In

SCL

APC

SDA

YS&YM

GND (IF)

Ext.Video

Audio Out

Decoupling

ACL/NECK

RF AGC Out

APC

BLK In (SCP)

Chroma VCO

AN5165K
I Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Description Chroma VCO (3.58 MHz) Chroma APC Filter YS & YM Input External R Input External G Input External B Input VCC1-1 9 V (VCJ) R Output G Output B Output Hor. Lock Detect GND (RGB/I2C/ DAC) Pin No. 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 Description SIF Input/White Expand-Level IF AGC Filter Video Output AFT Output Internal Video Input VIF Detect Output VIF APC Filter VIF VCO (1) VIF VCO (2) VCC1-2 9 V Black Detect Y/Ver. Sync. Input Ver. Sync. Clamp Hor. Sync. Input VCC2-2 5 V (Chroma/jungle/DAC) Chroma Input/Black Expansion Start GND (Video/Chroma/Jungle) FBP Input VCC3 6.2 V AFC1 Filter Hor. VCO (32 fH) X-ray Protection Input Hor. Pulse Output CW Output/Spot KILLER Off Input/ X-ray Protection Output 52 Ver. Pulse Output

ACL/NECK Protect SDA SCL BLK Pulse Input/HSYNC2 Output White Detect VCC2-1 5 V (VIF/SIF) VIF Input (1) VIF Input (2) GND (VIF/SIF) RF AGC Output SIF APC Filter Audio Output External Video Input DC Decoupling Filter External Audio Input

I Absolute Maximum Ratings


Parameter Supply voltage Symbol VCC Rating VCC1 (737) VCC2 (1842) VCC3 (46) Supply current ICC I7+37 I18+42 I46 10.5 6.0 6.5 117 68 6.3 mA Unit V

SDB00001BEB

AN5165K
I Absolute Maximum Ratings (continued)
Parameter Power dissipation
*2 *1

Symbol PD Topr Tstg

Rating 1 481 20 to +70 55 to +150

Unit mW C C

Operating ambient temperature Storage temperature


*1

Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25C. *2: The power dissipation shown is the value for Ta = 70C

I Recommended Operating Range


Parameter Supply voltage Symbol VCC1 VCC2 VCC3 Range 8.1 to 9.9 4.5 to 5.5 6.05 to 6.35 Unit V

I Electrical Characteristics at Ta = 25C


Parameter Power supply Supply current 1 Supply current 2 Supply current 3 Supply current 4 I7+I37 I18+I42 I46 I46 Current at V7 = 9 V, current at V37 = 9 V Current at V18 = 5 V, current at V42 = 5 V Current, when V46 = 6.2 V Current at V46 = 6.2 V. However all other power supplies are off state 68 38 2 5 85 48 5 7 100.5 57 6 9 mA mA mA mA Symbol Conditions Min Typ Max Unit

VIF circuit (Typical input fP = 45.75 MHz, VIN = 90 dB) Video detection output (typ.) Video detection output (max.) Video detection output (min.) Video detection output f characteristics Synchronous peak value voltage APC pull-in range (Hu) APC pull-in range (Lu) VPO VPOmax VPOmin fPC VSP fPPHU fPPLU DVRFDP Modulation factor m = 87.5% Data 0D = 88 Data 0D = F8 Data 0D = 08 Frequency of output 3 dB for 1 MHz Voltage in VPO measurement High band side pull-in range (Difference from fP = 45.75 MHz) Low band side pull-in range (Difference from fP = 45.75 MHz) RF AGC delay point adjustment range RF AGC maximum sink current Input to become delay point (V22 = approx. 6.5 V), when Data 0C = 00 to 7F Maximum current IC can sink when pin 22 is low 75 95 dBm 1.75 2.15 1.1 5.5 1.6 1.0 2.1 2.6 1.6 8 2.0 1.5 1.5 2.5 3.3 2.0 12 2.4 1.0 V[p-p] V[p-p] V[p-p] MHz V MHz MHz

IRFmax

1.5

3.0

mA

SDB00001BEB

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Parameter Symbol Conditions Min Typ Max Unit VIF Circuit (continued) (Typical input fP = 45.75 MHz, VIN = 90 dB) RF AGC minimum sink current AFT discrimination sensitivity AFT center voltage AFT maximum output voltage AFT minimum output voltage IRFmin AFT VAFT VAFTmax VAFTmin Leak current of IC, when pin 22 is high Df = 25 kHz V31 without VIN V31 at f = fP500 kHz V31 at f = fP+500 kHz 50 40 4.0 7.8 0.3 0 57 4.5 8.1 0.8 50 75 5.0 8.7 1.0 mA mV/kHz V V V

SIF circuit (Typical input fS = 4.5 MHz, fM = 400 Hz, VIN = 90 dB) Audio detection output Audio detection output (max.) Audio detection output (min.) SIF pull-in range AV SW circuit Video SW voltage gain Video SW frequency characteristics Audio SW voltage gain GVSW fVSW GASW f = 1 MHz, VIN = 1 V[p-p] Frequency of output 3 dB from 1 MHz Data 0 FD5 = 1 (external) f = 400 Hz, VIN = 1 V[p-p] 6.2 10 3 7.2 1 8.2 1 dB MHz dB VSO VSOmax VSOmin fSP Df = 25 kHz, 0A = 10 Data 0A = 1F Data 0A = 00 250 300 150 3.3 350 390 256 450 480 350 5.7 mV[rms] mV[rms] mV[rms] MHz

Video signal processing circuit (In the following test conditions, the measurements are made withinput: 2.0 V[p-p] (VWB = 1.43 V[0-p]stair-step) at GOUT.) Video output (typ.) Video output (max.) Video output (min.) Contrast variable range Video frequency characteristics VYO VYOmax VYOmin Data 03 = 40 (typ.) (Contrast) Data 03 = 7 F (max.) Data 03 = 00 (min.) 1.9 3.8 0.07 19 6.0 2.4 4.8 0.3 22 8.0 2.9 5.8 0.6 26 10.0 V[0-p] V[0-p] V[0-p] dB MHz

YCmax/min 03 = 7F 03 = 00 fYC Data 0FD7 = 0 (Trap Off) Data 04 = 00 (Sharpness) Frequency to become 3 dB from f = 0.5 MHz f = 3.8 MHz Data 0F D7 = 0

Sharpness variable range Pedestal level (typical) Pedestal variable width Brightness control sensitivity ACL sensitivity Blanking level

YSmax/min 04 = 3F 04 = 00 VPED VPED VBRT ACL VYBL

7 2.4 2.2 9.5 2.3 0.9

10.5 3.0 2.6 12.5 2.9 1.4

14 3.6 3.0

dB V V

Data 02 = 80 (typ.) (Brightness) Difference between Data 02 = 00 and FF Average amount of change per 1 step, when Data 02 = 60 and A0 Change of YOUT from V13 = 3.0 V to 3.5 V DC voltage of blanking pulse

15.5 mV/Step 3.6 1.9 V/V V

SDB00001BEB

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Parameter Symbol Conditions Min Typ Max Unit Video signal processing circuit (continued) (In the following test conditions, the measurements are made with input: 2.0 V[p-p] (VWB = 1.43 V[0-p] stair-step) at GOUT.) Video input clamp current ACL start point IYCLP VACL DC measurement: Sink current inside IC V13 voltage at which output amplitude becomes 90% when ACL pin (V13) is being decreased from 5 V. 5 3.5 10 4.0 15 4.5 A V

Color signal processing circuit (In the following test conditions, burst = 300 mV[p-p], reference is BOUT) Color difference output (typ.) Color difference output (max.) Color difference output (min.) Contrast variable range ACC characteristics 1 ACC characteristics 2 Tint center Tint variable range 1 Tint variable range 2 Demodulation output ratio (R) Demodulation output ratio (G) Demodulation output angle (R) Demodulation output angle (G) APC pull-in range (H) APC pull-in range (L) RGB processing circuit Pedestal difference voltage Brightness voltage tracking Video voltage gain relative ratio Video voltage gain tracking Drive adjustment range VIPL TBL GYC TCONT GDV Difference voltage of RGB out pedestal 0.3 Ratio of R, G, B out fluctuation level 0.9 for Data 02 (Bright) 02 = 40 to C0 Output ratio of R, B out to GOUT Gain ratio of R, G, B out for Data 03 (Contrast) 03 = 20 to 60 AC change amount of R, B out between drive adjustment max. and min. 0.8 0.9 5.9 1.0 1.0 1.0 7.1 0.3 1.1 1.2 1.1 8.3 V Time Time Time/ Time dB VCO VCOmax VCOmin Input: Color bar Data 00 = 40 (typ.), 03 = 40 (typ.) Data 00 = 7 F one side amplitude Data 03 = 40 Data 00 = 00, Data 03 = 40 Data 00 = 40 2.8 2.3 0 15 0.8 0.7 13 30 60 0.81 0.3 92 223 450 3.5 3.4 20 1.0 1.0 0 45 45 0.95 0.36 104 235 900 900 4.2 100 25 1.2 1.2 13 60 30 1.09 0.42 116 237 450 V[p-p] V[0-p] mV[p-p] dB Time Time STEP deg deg Time Time deg deg Hz Hz

CCmax/min 03 = FF 03 = 00 ACC1 ACC2 C 1 2 R/B G/B R G fCPH fCPL

Burst 300 mV[p-p]600 mV[p-p] Input: Color bar Burst 300 mV[p-p]60 mV[p-p] Input: Color bar Difference (Tint) between Data 01 = 40 and that of tint adjusted at center Data 01 = 7F Data 01 = 00 Input: Rainbow Input: Rainbow Input: Rainbow Input: Rainbow

SDB00001BEB

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Parameter Symbol Conditions Min Typ Max Unit RGB processing circuit (continued) Cutoff adjustment range YS threshold voltage YM threshold voltage YM operating voltage gain External RGB pedestal voltage External RGB pedestal difference voltage Internal/external pedestal difference voltage External RGB output voltage External RGB output difference voltage VCUTOFF DC change amount of R, G, B out between drive adjustment max. and min. VYS VYM GYM VEPL VEPL VPL/IE VERGB VERGB Minimum DC voltage at which YS turns on Minimum DC voltage at which YM turns on YM on/off gain difference YS is on YS is on, RG, GB Internalexternal Input 3 V[p-p], contrast 03 =7 F Input 3 V[p-p], contrast 03 = 7F 1.8 2.7 0.7 12 2.1 250 100 1.2 0.6 5 8 2.4 3.1 1.0 9 2.7 200 1.7 0 8 12 3.0 3.6 1.3 6 3.3 250 500 2.2 0.6 11 V V V dB V mV mV V[0-p] V dB MHz

External RGB contrast variable range ECmax/min 03 = 7F 03 = 00 External RGB frequency characteristics fRGBC Input 0.2 V[p-p], DC = 1 V

Synchronizing signal processing circuit Horizontal free-running oscillation frequency Horizontal pull-in range Vertical free-running oscillation frequency Vertical output pulse width Picture center variable range fHO fHP fVO-N VO THC Change amount of phase difference between HSYNC and HOUT Data from 0E: 00 to 1F Without sync. signal input Difference from fH = 15.75 kHz Without sync. signal input 15.4 500 58 5.5 5.9 15.75 650 60 6.5 7.3 16 62 7.5 9.1 kHz Hz Hz 1/fH s

I2C interface SCL, SDA signal input high level SCL, SDA signal input low level Allowable maximum input frequency Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

VIHI VILO fImax

3.1 0 100

5.0 0.9

V V kbit/s

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

VIF Circuit (Typical input fP = 45.75 MHz, VIN = 90 dB) Input sensitivity VPS Input level to become VPO = 3 dB
SDB00001BEB

52

60

dB 7

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

VIF circuit (continued) (Typical input fP = 45.75 MHz, VIN = 90 dB) Maximum allowable input SN ratio Differential gain Differential phase Black noise detection level Black noise clamp level RF AGC operation sensitivity VCO switch on drift Intermodulation RF AGC adjustment sensitivity AFT offset adjustment sensitivity Video detection output fluctuation with VCC Video detection output-temperature characteristics Input resistance (pin 19, 20) Input capacitance (pin 19, 20) Sound IF output level VCO control sensitivity 1 VCO control sensitivity 2 RF AGC delay point -temperature characteristics VCO free-running frequency -temperature characteristics AFT center frequency -temperature characteristics VCO free-run adjustment VCO free-running frequency 1 VPmax SNP DGP DPP VBN VBNC GRF fPD IM SRF SAFT VP/V VP/T RI19,20 CI19,20 VSIF PU PJ VDP/T fP/T fAFT/T Difference from sync. peak value Difference from sync. peak value Input level difference to become V22 = 1 V7 V Frequency drift from 5 seconds after SW On to 5 mins. after VFCVFP = 2 dB, VFSVFP = 12 dB Average amount of change of output voltage V22 for Data 1Step Input level to become VPO = +1 dB 104 50 0 0 55 35 0.5 46 1.0 110 53 3 3 45 45 1.5 70 52 1.7 0.2 10 5 1.2 4.0 100 2.2 2.2 3 300 300 5 5 35 55 3.0 2.5 0.25 15 10 106 3.1 3.1 5 dB dB % deg IRE IRE dB kHz dB V/Step V/Step % % k pF dBm kHz/mV kHz/mV dB kHz kHz

Average amount of change of output 0.15 voltage V31 for Data 1Step VCC = 10% Ta = 20C to +70C f = 45.75 MHz f = 45.75 MHz fS = 45.75 MHz4.50 MHz, P/S = 20 dB DV34 = 2.0 V3.8 V, f = 45.75 MHz DV34 = 2.0 V3.8 V, f = 58.75 MHz Ta = 20C to +70C Ta = 20C to +70C Ta = 20C to +70C Input frequency at which AFT output voltage becomes 4.5 V AFT center voltage adjustment Dispersion without VIN. V29 (IF AGC) = 0 V (Difference from 45.75 MHz is measured)
SDB00001BEB

94 1.3 1.3 0

VAFTADJ fP1

300

4.5 0

300

V kHz

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

VIF circuit (continued) (Typical input fP = 45.75 MHz, VIN = 90 dB) VCO free-running frequency 2 fP2 Dispersion without VIN. V29 (IF AGC) = 0 V (Difference from 58.75 MHz is measured) High band side pull-in range (Difference from fP = 58.75 MHz) Low band side pull-in range (Difference from fP = 58.75 MHz) DC measurement 300 0 300 kHz

APC pull-in range (Hj) APC pull-in range (Lj) Detection output resistance

fPPHJ fPPLJ RO33

1.0 70

1.5 1.5 120

1.0 170

MHz MHz

SIF circuit (Typical input fS = 4.5 MHz, fM = 400 Hz, VIN = 90 dB) Input limiting level AM rejection ratio Total harmonic distortion SN ratio Audio detection output linearity Audio output fluctuation with VCC Audio output-temperature characteristics Audio output-frequency characteristics 1 Audio output-frequency characteristics 2 AV SW circuit Video SW crosstalk Video SW external input terminal voltage Video SW internal input terminal voltage Video SW internal output DC voltage Video SW external output DC voltage Video SW input resistance Video SW output resistance CTVSW V25 V32 V30I V30E RI25, 32 RO30 f = 1 MHz, VIN = 1 V[p-p], InsideOutside, OutsideInside DC measurement DC measurement DC measurement Data 04D6 = 0 DC measurement Data 0FD5 = 1 DC measurement DC measurement 1.3 1.3 3.4 3.4 20 60 1.6 1.6 4.2 4.2 524 50 50 1.9 1.9 5.0 5.0 100 dB V V V V VLIM AMR THD SNA VSOP VS/V VS/T fSOP1 fSOP2 Ratio of f = 50 kHz to f = 25 kHz VCC = 10% Ta = 20C to +70C APC pin C = 100 pF APC pin C = 5600 pF Input level to become VSOP = 3 dB AM = 30% Df = 50 kHz 60 0 50 5 100 44 70 0.3 55 6 3 5 2.2 50 0.5 7 6 10 dB dB % dB dB % % kHz kHz

SDB00001BEB

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter AV SW circuit (continued) Audio SW crosstalk (InternalExternal) Audio SW crosstalk (ExternalInternal) Audio SW input terminal voltage Audio SW internal output DC voltage Audio SW external output DC voltage Audio SW internal/external DC difference voltage Audio SW input resistance Audio SW output resistance

Symbol

Conditions

Min

Typ

Max

Unit

CTAIE CTAEI V27 V24I V24E V24 RI27 RO24

fS = 4.5 MHz, fM = 400 Hz, No external input fS = 4.5 MHz, fM = 0 Hz, External f = 400 Hz, VIN = 600 mV[rms] DC measurement DC measurement DC measurement DC measurement DC measurement DC measurement

3.7 3.7 3.7 300 61 200

73 73 4.2 4.2 4.2 0 72 400

67 67 4.7 4.7 4.7 300 83 600

dB dB V V V mV k

Video signal processing circuit (In the following test conditions, the measurements are made with input 2.0 V[p-p] (VWB = 1.43 V[0-p]) GOUT) Y signal delay time 1 Y signal delay time 2 Black level extension 1 Black level extension 2 Black level extension 3 TDL1 TDL2 VBL1 VBL2 VBL3 Phase difference from Y-input (For both trap on/off) Phase difference from Y-input (Trap through) 620 690 200 0 900 600 760 100 1 300 800 ns ns mV mV mV

Input: Total black, difference between 100 pin 38 of 9 V and open (With RC filter) Input: Total black, pin 38 GND and black slice potential V43 = 2.5 V Voltage difference between pin 38 open and 9V. Black slice potential V43 = 2.5 V YOUT output level difference between sharpness max. and min. Pedestal level DC difference between sharpness max. and min. Contrast 03 = 40 Contrast 03 = 7F Start point when V43 = 4.5 V Trap on/off/through Trap center frequency at chroma input 3.58 MHz 3.58 MHz component attenuation amount at chroma input 3.58 MHz
SDB00001BEB

700 400

Contrast variation with sharpness Contrast variation with sharpness Input dynamic range Y signal SN ratio Black level extension start point

DVCS DVBS VImax SNY VBLS

300 250 2.8 51 50 1 70 26

0 0 56 57 0 0 30

300 250 64 1 70

mV mV V[p-p] dB IRE dB kHz dB

Trap on/off through-gain difference DGTRAP Trap frequency error Trap attenuation amount DfTRAP AttTRAP

10

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Video Signal Processing Circuit (continued) (In the following test conditions, the measurements are made with input 2.0 V[p-p] (VWB = 1.43 V[0-p]) GOUT) Trap automatic adjustment range Video output fluctuation with VCC Video output-temperature characteristics YNR operation I YNR operation II ABL sensitivity White gradation correction 1 fTRAP VY/V VY/T SNYNR VCO frequency of fTRAP 70 kHz VCC1 = 9 V (allowance: 10%) Ta = 20C to +70C S/N, when YNR: min.max. and sharpness max. 3 0 0 0.3 120 100 5 4 1.5 0.5 125 4 250 10 0.7 130 MHz mV/V % dB dB V/V %

SNYNR Sharpness max., YNR: max. (IFAGC) S/N at IF AGC 2 V4 V ABL 1 01D7 = 1, when V13 = 1.5 V3.5 V Pedestal level fluctuation White detection pin V17 = 4.5 V Difference of amplitude between GOUT gamma on/off White detection pin V17 = 2.0 V Difference of amplitude between GOUT gamma on/off

White gradation correction 2

70

75

80

Neck protector threshold voltage DC restoration ratio

VNP TDC APL 10% to 90% ACDC TDC = 100 AC

0.3 90

0.5 100

1.0 110

V %

Color signal processing circuit (Burst 300 mV[p-p], reference is BOUT) Demodulation output residual carrier VCO free running frequency fCO fluctuation with VCC Static phase error Demodulation output bandwidth Demodulation output fluctuation with VCC Demodulation output -temperature characteristics Brightness variation with color Brightness variation difference voltage with color VCAR fCN VC/V N fCC VC/V VC/T VBC VBC fSC level of pin 8, 9, 10 0 0 0 1 600 4 10 0 50 300 300 3 800 20 250 20 mV[p-p] Hz Hz deg/100 Hz kHz % % mV mV

Difference from f = 3.579545 MHz 300 VCC1 = 9 V (allowance: 10%) Tint shift at fC = 300 to +300 Hz change Band to become 3 dB VCC1 = 9 V (allowance: 10%) Ta = 20C to +70C Pedestal level DC difference between color max. and min. R, G, B Out variation voltage difference 300 400 250 0

SDB00001BEB

11

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Color signal processing circuit (continued) (Burst 300 mV[p-p], reference is BOUT) Color killer allowance 1 Color killer allowance 2 CW output level (3.58 MHz) B.P.F. (Symmetrical) frequency characteristics B.P.F. (Asymmetrical) slant RGB processing circuit (CY)/Y (CY), Y delay difference YS changeover speed External RGB input dynamic range Internal/external crosstalk Spot killer operation Brightness variation with contrast Brightness variation difference voltage with contrast Color /B&W DC difference voltage Pedestal level fluctuation with VCC Pedestal level-temperature characteristics Pedestal level difference voltage fluctuation with VCC External RGB output blanking voltage RGB limiter control range 1 RGB limiter control range 2 RC/Y TC/Y fYS VDEXT CTRGB VSPK VBAC DVBAC DVCBW DVPL/V DVPL/T DVPD/V VBLK VBEAM1 VBEAM2 Color bar input, BOUT Contrast typ. color Data 00 = 60 Color bar input, BOUT Phase of greenmagenta fYS, when external input is 3 V, output level 3 dB Contrast max. Data 03 = 7F Leakage when f = 1 MHz, 1 V[p-p], YS = 5 V V9 at which spot killer turns on by decreasing V9 from 9 V Pedestal level DC difference between contrast max. and min. R, G, B Out variation voltage difference Pedestal level voltage difference between with and without burst signal VCC1 = 9 V (allowance: 10%) Ta = 20C to +70C VCC1 = 9 V (allowance: 10%) RG, BG Burst input only Input 2 V[p-p], contrast max. RGB limiter 0E = 70 Input 2 V[p-p], contrast max. RGB limiter 0E = F0 0.9 100 7 6.5 7.3 250 0 60 0 0.8 6.4 5.6 1.2 0 11 7.0 60 7.7 0 0 200 0.6 0 1.3 6.7 6.0 1.5 100 50 8.0 250 20 60 400 1.8 7.0 6.4 V[0-p]/ V[p-p] ns MHz V[0-p] dB V mV mV mV mV/V mV/C mV/V V V V VKILL1 VKILL2 VCW fB.P.F. VB.P.F./f 0 dB = 300 mV[p-p], 00D7 = 0 0 dB = 300 mV[p-p], 00D7 = 1 AC component of (3.58 MHz) Band to become 3 dB from 3.58 MHz Slant of 3.58 MHz 500 kHz 53 50 0.6 400 46 43 1.1 600 9.0 39 36 1.4 800 dB dB V[p-p] kHz dB/MHz

12

SDB00001BEB

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Synchronizing signal processing circuit Horizontal output start voltage Lock detection output voltage 1 Lock detection output voltage 2 Lock detection charge and discharge current EBP (BLK) slice level EBP (AFC2) slice level Horizontal AFC Horizontal VCO Burst gate pulse position Burst gate pulse width V blanking pulse width EBP allowable range Overvoltage protective operation voltage Black-out operation voltage HSYNC2 output level HSYNC2 output width HSYNC2 output position Horizontal output pulse duty cycle Horizontal output voltage (high) Horizontal output voltage (low) Vertical output voltage (high) Vertical output voltage (low) Synchronizing signal clamp voltage (Ver.) Synchronizing signal clamp voltage (Hor.) External blanking input threshold level Vertical pull-in range VfHS VLD1 VLD2 ILD VFBP VFBPH H H PBGP WBGPN WVN TFBP VXRAY Pulse width, when fH = 15.75 kHz Time from HOUT rise to FBP center Dispersion from the minimum voltage at which H osc. comes to be out of synchronization Difference voltage from hold-down to black out HSYNC2 output DC level HSYNC2 output pulse width The period of time from HSYNC center to HSYNC2 rise Upward going pulse duty cycle High level DC voltage Low level DC voltage High level DC voltage Low level DC voltage V39 clamp voltage V41 clamp voltage fH = 15.75 kHz Minimum V46, when H osc. output is 1 V[p-p] or more and fO becomes >10 kHz V11, when horizontal AFC is locked V11, when horizontal AFC is unlocked. DC measurement Minimum voltage of pin 45, when blanking is applied to RGB output Minimum voltage of pin 45, when AFC2 operates DC measurement curve gradient near f = 15.75 kHz Delay from HSYNC rise 3.9 3.8 0 0.5 0.3 1.45 26 1.4 0.2 2.5 1.04 12 60 4.4 4.3 0.1 0.7 0.66 1.85 33 1.8 0.4 3.0 1.14 4.9 4.8 0.5 1.1 1.0 2.25 40 2.2 0.6 3.5 1.24 19 60 V V V mA V V A/s Hz/mV s s ms s mV

VBLOUT VSCP WSCP PSCP tHO V50H V50L V52H V52L V39 V41 V16I fVP-N

10 8.0 32 2.8 0 3.9 0 3.2 3.2 0.4 56

110 8.2 2 3 38 3.1 4.2 3.6 3.6 0.75

160 8.4 44 3.4 0.3 4.5 0.3 4.0 4.0 1.1 64

mV V s s % V V V V V V V Hz

SDB00001BEB

13

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter I2C interface Sink current when ACK Bus free before start Start condition set-up time Start condition hold time Low period SCL,SDA High period SCL Rise time SCL,SDA Fall time SCL,SDA Data set-up time(write) Data hold time(write) Acknowledge set-up time Acknowledge hold time Stop condition set-up time DAC 3, 4, 5, 6, 7-bit DAC DNLE 8-bit DAC DNLE Cut-Off DAC overlap

Symbol

Conditions

Min

Typ

Max

Unit

IACK tBUF tSU, STA tHD, STA tLOW tHIGH tR tF tSU, DAT tHD, DAT tSU, ACK tHD, ACK tSU, STO

Maximum value of sink current for pin 14 at ACK

1.8 4.0 4.0 4.0 4.0 4.0 0.25 0 0 4.0

2.5

5.0 1.0 0.35 3.5

mA s s s s s s s s s s s s

L3, 4, 5, 6, 7 1LSB = {Data (max.)Data (00)} /7, 15, 31, 63, 127 L8 DSTEP 1LSB = {Data (FF)Data (00)}/255 Overlap of 8-bit 2-stage changeover of R, B cut-off (Same for AFT)

0.1 0.1 27

1.0 1.0 32

1.9 1.9 37

LSB Step LSB Step Step

Standard conditions when testing 1. Input signal 1) VIF 2) SIF 3) Video 4) Chroma : fP = 45.75 MHz, VIN = 90 dB, at video modulation: Modulation signal is 10-staircase Modulation m = 87.5%, pin 19 input level 84 dB when VIN = 90 dB : fS = 4.5 MHz, VIN = 90 dB, modulation signal fM = 400 Hz, deviation: NTSC 25 kHz

: 10-staircase 2 V[p-p] (VBW = 1.43 V[0-p]) : Color bar signal: Burst level 300 mV[p-p] Rainbow signal : Burst level 300 mV[p-p] 5) Sync. signal: Video signal 1.5 V[p-p] to 2.5 V[p-p] for both horizontal and vertical sync. signal input

14

SDB00001BEB

AN5165K
I Electrical Characteristics at Ta = 25C (continued)
Standard conditions when testing (continued) 2. I2C BUS condition Sub Address 00 01 02 03 04 05 06 07 Color Tint Bright Contrast Sharpness Cut-off R Cut-off G Cut-off B Data (H) 40 40 80 40 00 80 40 80 08 09 0A 0B 0C 0D 0E Sub Address Drive R Drive B Audio Adj, YNR AFT RFAGC Video Adj H center, RGB limiter Data (H) 40 40 10 10 40 08 10

I Terminal Equivalent Circuits


Pin No. 1
100 3.58 MHz 1 1.5 k IN2 200 A 200 A IN1 500 A C8 15 pF Temperature characteristic product should be used for C8 (750 ppm/C)

Equivalent circuit

Description Chroma oscillation pin (3.58 MHz) Pin for chroma oscillation of 3.58 MHz. The pattern between pin and oscillator should be made as short as possible.

I/O AC f = fC approx. 0.3 V[p-p]

2
25 A 270 270 2 1.0 F 3 300 pF R 3.3 k 1 000 A 50 A 200 84 k 6.3 V

APC filter pin Filter pin for APC detection circuit (Operates for BGP period) Detection sensitivity becomes high when external RLarge (Tends to be easily pulled in and curve afffected by noise.) f
C

DC approx. 5.6 V

V2

3
25 A 5V 25 A 3V 270 1 k

9 V (VCC1-1) 25 A 3 V 16 k

25 A 1V

YS/YM input pin Fast blanking pulse input pin for OSD YM On (Half-tone) at 1.0 V[0-p] or higher YS ON(OSD input) at 3.0 V[0-p] or higher Recommended use range: 0 V to 6 V

AC (Pulse)
YS YM

50 k

25 A

25 A

SDB00001BEB

15

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 4 5 6 Equivalent circuit
9 V (VCC1-1)

Description External R input pin External G input pin External B input pin External input pin for OSD Output linearly changes according to input level Recommended use range: 0 V to 6 V

I/O AC (Pulse)
5.0 V 0

50 A to RGB Output Circuit pin4, 5, 6 5.0 V 0 from -COM 200 50 k

50 k

VCC1-1 (typ.9 V) Video circuit Chroma circuit RGB circuit Sync. circuit DAC circuit
9 V (VCC1-1)

DC 9V

8 9 10

100 A 50 Pin 8 9 10

100 A

R Out pin G Out pin B Out pin BLK level approx. 1.5 V Black (Pedestal) level approx. 3.0 V Recommended use range: 2.4 mA to +4.8 mA Horizontal sync. detection pin Phase of horizontal synchronizing signal and horizontal output pulse are detected and outputted Pin 11 becomes low at out of synchronization Color control becomes min. and chroma output disappears and VOUT goes into freerunning state in a asynchronous condition Pay attention to impedance when pin 11 voltage is used for microcomputer (ZO 680 k required)
pin 50 H Out pin 41 HSYNC In

AC

11
5V (VCC2-2) 10 k I1 to Chroma Circuit 12 k 2.8 V 12 k 3.7 V 800 A I2

800 A

DC when synchronized 4.5 V when asynchronous 0.1 V

50 A 270 11 ZO 0.082 F ZO680 k 8 A

HSYNC period, when pin 50 at high: I1 ON at low: I2 ON 12 GND RGB circuit DAC. I2C circuit VIF (VCO) circuit
SDB00001BEB

DC

16

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 13
5.9 V 60 k 60 k 6.9 k 2.7 V 7.1 k 2.7 V

Equivalent circuit
9V (VCC1-1)

Description

I/O

ACL/ABL pin DC RGB output is blacked out when DC voltage approx. 3.5 V of pin 13 is decreased from the outside. 140k However, it is not blacked out when service Neck switch has been turned on. (Service switch priority) 6.9 k When 01D7 = 1, ABL functions, and brightness 7.1 k ABL decreases by lowering DC voltage of pin 13 5 k 6.9 k When pin 13 is grounded, ACC gain becomes 13 min. and it is possible to measure chroma free-running frequency. Measuring point is pin 51. When neck protect time high Recommended use range: 0 V to V CC1
5V (VCC2-2)

14
5V 2.7 k 20 A

50 A

3.25 V 10 k 51 k

Data 14 1 k 14 100 from -com ACK 30 k

2 k to Logic Circuit 30 k

I2C BUS Data input pin Input low level: 0.9 V or less Input high level: 3.1 V or more ACK sink capability: 1.8 mA Recommended use range: 0 V to VCC2

AC (Pulse)
5.0 V 0

15
5V 2.7 k Clock 15 100 from -com ACK 30 k 20 A 1 k

5V (VCC2-2) 50 A 3.25 V 10 k 51 k 2 k to Logic Circuit 30 k

I2C clock input pin Input low level: 0.9 V or less Input high level: 3.1 V or more Recommended use range: 0 V to VCC2

AC (Pulse)
5.0 V 0

16
50 A 0.7 V 2.7 k 40 k 100 k 50 A 10 k 10 k

9V (VCC1-1) H Sync.2 3.9 k 16 270 5.6 k

External blanking input pin RGB out blanking is applied when a voltage of 0.8 V or more is applied HSCP pulse output pin Horizontally synchronized 2 s pulse is outputted. Recommended use range: 0.8 mA to 0.2 mA, 0 V to 5.0 V

AC (Pulse)
8.2 V 5V 0V

SDB00001BEB

17

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 17
9V 20 A 4.7 F 270 YOUT

Equivalent circuit
10 A 40 A 9V (VCC1-1)

Description White Peak Detect Filter input pin White gradation correction response characteristic is determined. When there is screen sag, make Clarger When screen response is slow, make Csmaller

I/O DC

17

375 50 k 50 A

6 k 40 A

18 19 20

5V (VCC2-1) 3.5 V 27 k 1.2 k 1.2 k 20 0.68 H 19 0.022 F

VCC2-1 (typ.5 V) VIF, SIF circuit VIF input pin 1 VIF input pin 2 VIF amp. input with balanced input Input max.120 dB Input resistance: 1.2 k (45.75 MHz) Input capacitance: 4.0 pF (45.75 MHz)

DC 5V AC f = fP DC level approx. 2.7 V

SAW

150 A 150 A

21 22

5V (VCC2-1) 100 A 10 k 22 to Tuner 33 k 40 k 1 k 1 k 270 IF AGC Bias RF AGC Control Bias

GND For VIF and SIF circuit


6 k

DC DC

3 k

RF AGC output pin Collector open output Recommended use range: 0 V to VCC1 (9 V) Maximum sink current min.: 1.5 mA

23

9V (VCC1-2)

12.2 k 7.5 k 1.5 V 57 k 4 pF 270 23 100 pF 875

SIF APC filter pin Filter pin for APC circuit of SIF. Deemphasis characteristic is changeable by the capacitor between pin and GND

DC approx. 2.5 V

18

SDB00001BEB

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 24 Equivalent circuit
9V (VCC1-2)

Description Audio output pin DC fluctuates by internal/external changeover Recommended use range: 0.8 mA to + 0.8 mA

I/O AC 0 kHz to 20 kHz DC approx. 3.9 V

270 150 A 800 A

24

25
50 A to Video SW 50 A

(VCC1-2) Int. Video 4.7 F

9V (VCC1-1)

1.6 V 25 500 7 A ZO<100

External video input pin Input pin for external video signal and DC cut input Typical: 1 V[p-p] (max. 1.5 V[p-p]) ZO is 100 or less

AC 1 V[p-p] (Composite)

DC approx. 1.6 V
9V (VCC1-2)

26
10 k

typ. 4.5 V 3 k

1.7 k

270

26

C 4.7 F

3 k

270

Decoupling pin S-curve in IC is wideband, but DC feedback is applied so that DC voltage of output signal becomes constant. DC level (typ. 4.5 V), fShigh: V26low If C (4.7 F) is too small, sound distortion tends to become larger at low frequency.

DC

20 k 100 A 13 A

27
50 A to Audio SW 5.4 V

9V (VCC1-2)

65 k 270 270 150 A

27 10 F

External audio input pin AC Input pin for external audio signal. DC cut 0 kHz to 20 kHz input. Adjust typical input level to internal sound level. Input max. 7 V[p-p]

28
0.01 F 1.5 k 3 k 28 Blooming DC 3 k 270 128 k 80 pF 100 A 25 A

9V (VCC1-2)

to SIF Limitter Amp.

SIF signal input pin AC Input max. 110 dB f = fS Blooming DC adjusting pin White gradation correction curve and bias DC to determine absolute clip point are provided. approx. 2.3 V (2.0 V to 4.5 V) Recommended use range: 0 V to VCC1 (9 V)

SDB00001BEB

19

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 29 Equivalent circuit
5V (VCC2-1)

Description IF AGC filter pin Pin for IF AGC filter. The current obtained from peak AGC circuit is smoothed by external capacitor. Since response becomes faster when C goes smaller, hum characteristic will be improved. However, sag tends to appear easily. Video output pin INT.Video or EXT.Video selected by AV SW is outputted. Recommended use range 3.2 mA to +0.4 mA

I/O DC approx. 2 V

270 270 to IF Amp. 30 A 0.47 F 29

30
9V (VCC1-2) 500 30 50 100 A

AC 2 V[p-p]

DC level approx. 4.2 V DC

400 A

31
1.1 k 1.1 k 9V

9V (VCC1-2)

33 k 31 270 33 k 1.1 k 40 k 1.1 k max. 350 F to Tuner 0.01 F

AFT output pin Offset of center voltage is adjusted by bus When AFT defeat SW is turned on (0B = 00), V31 becomes a value determined by external resistance-divider. of AFT is variable by impedance of externally attached resistor.

32
50 A to Video SW 50 A

(VCC1-2) Int. Video 4.7 F ZO

9V (VCC1-1)

1.6 V 32 500 7 A

Internal video input pin Input pin for signal detected by VIF circuit (Internal video signal). DC cut input Typical input: 1 V[p-p] (max. 1.5 V[p-p]) ZO 280

AC 1 V[p-p] (Composite)

DC level approx. 1.6 V


9V (VCC1-2)

33
150 A 50

33

800 A

VIF detection output pin Adjusted to center value by I2C bus (Using upper 4-bit of 0 A) DC voltage becomes approx. 1 V at external video mode (04D6 = 1) Recommended use range: 1.6 mA to + 0.8 mA

AC approx. 2.1 V[p-p]

20

SDB00001BEB

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 34
50 A 1 SW 0

Equivalent circuit
5V (VCC2-1)

Description APC filter pin Filter pin for VIF APC circuit. Lock detection circuit for VCO is built in the IC inside to changeover the time constant for APC filter.

I/O DC approx. 2.5 V

500

270 10 k 3.25 V to VOC 75 A 25 A

220 pF to1800 pF

34

75

35 36

0.47 F

5V (VCC2-1) 1.5 k 35 1.5 k 36

VIF oscillation pin Oscillation coil is changed according to VIF frequency. Allowable value of dispersion for coil resonance point is within 1%.

AC approx. 0.3 V[p-p] DC level approx. 3.9 V

2.5V

1 200 A

1 200 A 300 A 300 A

37 38

VCC1-2 (typ.9 V) IF circuit


9 V (VCC1-1)

DC 9V

2.5 2.5 k k

2.5 k Y

6.6 k

6.6 k

270 38 ZO 10 k 4.7 F

18 pF 100 A 50 A

Black level detection pin DC Black level detection pin for black extension approx. 5.1 V circuit The most black Y-level except for blanking circuit is held. Black detection sensitivity drops when ZO is made smaller, so that black detection becomes impossible unless a large black area.

39
50 A 16 k Video 5V 220 k 2.2 F 39 41 1 k 0.015 F 60 pF 10 A 8 A 16 k

9V (VCC1-1)

2.4 k 3.5 V

Vertical sync. separation input pin Video input pin Video signal input pin (Also composite video input) Typical input: 2.0 V[p-p] Sync. Top is clamped at 3.5 V Video signal should be inputted at low impedance. (under 100 )

AC 2.0 V[p-p]

470 pF

SDB00001BEB

21

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 40
4.3 V 30 k 10 k 10 k 4 A 200 270 29 C1 220 2.2 F to Ver. Count Down 50 k

Equivalent circuit
5V (VCC2-2) 3 k

Description Vertical synchronizing signal clamp pin Peak clamp pin for separating vertical sync. signal. Integral amount of vertical sync signal itself has been determined by internal time constant. However, trigger application timing is determined by the selection of external constant C1. Horizontal sync separation input pin Internal circuit of pin 39 and 41 are the same. When Rlarge, slice level becomes deeper (Weak to Sync compression). When R small, slice level becomes shallower (Weak to fluctuation such as Ver. Sag). Sync. Top is clamped at 3.5 V. VCC2-2 (typ.5 V) For chroma, jungle circuit
9 V (VCC1-1)

I/O AC f = fV

41

AC 2 V[p-p]

42 43
39 k 39 k 43 68 pF 270

DC 5V AC+DC Burst typ. 300 mV[p-p] DC typ. 4.5 V

200

Chroma attenuator circuit

128 k 60 pF

100 A Blstart Black extension DC

100 A

25 A

Chroma signal input pin Black extension start point adjusting pin Pin 43 is chroma signal input pin, and black extension start point is adjusted by externally applied DC voltage. DC level: high low Start point: Shallow Deep Black extension effect: Small Large Recommended use range: 0 V to VCC1 (9 V) GND For video, chroma, jungle circuit

44 45
100 A

5 V (VCC2-2) 50 A 100 A 50 A

DC 0V AC FBP

1.9 V 24 k 0.7 V 60 k 50 A to AFC

2.7 k

to HBLK 40 k

2.7 k 270 45 100 k

FBP input pin FBP input pin for horizontal blanking and AFC circuit Threshold level HBLK: 0.7 V AFC: 1.9 V A voltage input of 0 V or less is inhibited. Recommended use range: 0 V to VCC2 (5 V)

46

Horizontal stabilized power supply pin.

DC 6.2 V

22

SDB00001BEB

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 47
4.3 V

Equivalent circuit
6.2 V (VCC3) 27 k AFC1 Detecter R1 27 k 1.5 V 47 1 F C2 0.033 F C1 200 A

Description Horizontal AFC1 filter pin The capacitor connected to pin 47 is charged and discharged after comparing the phase of horizontal synchronizing signal and pulse inside the IC. R1, R2, C1 and C2 are lag lead filter for AFC1. Horizontal curve
fH

I/O DC typ. 4.3 V

Hor. Sync.

Hor. OSC

R2 1 000 A 1.8 k

V53
6.2 V (VCC3)

48

22 k 300 200 A 10 k 10 k 48 100 A 80 A

Horizontal oscillation pin Oscillation takes place at 32 fH 503 kHz by ceramic oscillator. Horizontal and vertical pulse are generated by count-down circuit inside the IC.

AC f = 32 fH (approx. 500 kHz)

220 pF: Temperature characteristic product should be used (750 ppm/C)

49
9V (VCC1-1)

49 1 k

1 k V CC3 46 48.3 k

Overvoltage protection input pin If increasing input pin voltage from 0 V at VREF (pin 46) = 6.2 V; (1) Horizontal oscillation come to be out of synchronization: approx. 6.15 V (2) Blacked out: (1)+70 mV Recommended use range: 0 V to VCC1 (9 V)

DC Normally 0V

20 k 100 A

50
4.3 V 19 k 50 50 10 k 40 k

6.2 V (VCC3)

Horizontal pulse output pin Duty cycle approx. 37% Recommended use range: 6.4 mA to +0.1 mA

AC Pulse
3.5 V 0

3.5 V 0V Hor. Out

SDB00001BEB

23

AN5165K
I Terminal Equivalent Circuits (continued)
Pin No. 51
9 V (VCC1-1) 320 k 15 pF 44 k 596 k 100 A Hold 30 k 50 A 270 30 k 51 10 k 80 k To spot killer circuit

Equivalent circuit

Description

I/O

CW output pin / input pin for spot killer off. AC (Output amplitude 860 mV[p-p]) Approx. The pin also shares in Hold-down detection. 830 mV[p-p] At normal: 6.1 V (DC) At hold-down: 1.2 V (DC) Apply 9 V(VCC1) DC to turn off spot killer. f = 3.58 MHz Recommended use range: 0.4 mA to + 0.1 mA 0 V to VCC1 Vertical pulse output pin Negative polarity, pulse width 6.25 H Recommended use range: 0.8 mA to + 0.1 mA AC Pulse
4.2 V 0

52
50 k 4.2 V 0 52 43 k

5V (VCC2-2)

I New Package Dimensions (Unit: mm)


SDIP052-P-0600F (Lead-free package)
47.700.30 52 27
13.700.20 0.70 min. 3.300.30 3.850.30

26

(1.625)

1.778

0.500.10 1.000.10

15.24

Seating plane 3 to 15

0.25 -0.05

+0.10

24

SDB00001BEB

Request for your special attention and precautions in using the technical information and semiconductors described in this material
(1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this material is limited to showing representative characteristics and applied circuit examples of the products. It does not constitute the warranting of industrial property, the granting of relative rights, or the granting of any license. (3) The products described in this material are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. Any applications other than the standard applications intended. (4) The products and product specifications described in this material are subject to change without notice for reasons of modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, redundant design is recommended, so that such equipment may not violate relevant laws or regulations because of the function of our products. (6) When using products for which dry packing is required, observe the conditions (including shelf life and after-unpacking standby time) agreed upon when specification sheets are individually exchanged. (7) No part of this material may be reprinted or reproduced by any means without written permission from our company.

Please read the following notes before using the datasheets


A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconductor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data, and so on, is subject to change without notice. Customers are advised to contact our semiconductor sales office and obtain the latest information before starting precise technical research and/or purchasing activities. B. Panasonic is endeavoring to continually improve the quality and reliability of these materials but there is always the possibility that further rectifications will be required in the future. Therefore, Panasonic will not assume any liability for any damages arising from any errors etc. that may appear in this material. C. These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing, selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited.
2001 MAR

This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.

S-ar putea să vă placă și