Fpga-scope: A digital oscilloscope

Name Pratham K R Shashank S Rao Shashikiran Shetty Nithin Kamath

ABSRTACT:

Usn 4MT10EC42 0 4MT10EC42 6 4MT10EC42 7 4MT08EC40 7

Section EC-2 EC-2 EC-2 EC-2

Date: Signature:

Our final project, we implement a digital oscilloscope using Verilog. Our oscilloscope will be able to sample an analog input, display it with vertical and horizontal, scaling, and analyze it. The scalability of the FPGA-Scope sets it apart from other oscilloscopes currently available; bandwidth, accuracy and number of inputs can improve without replacing the entire oscilloscope. The objective was to design and build a low cost, high performance, dual channel Digital Storage Oscilloscope (DSO). Costs were minimized compared to Conventional, commercial DSOs by utilizing a personal computer to provide both the display functions and the majority of the control functions. The remaining control functions were implemented using a Field Programmable Gate Array making the system very flexible and enabling it to be customized for specific tasks in abnormal situations. One of the major limitations of commercial DSOs is their small storage depths. To address this, the project DSO has a storage depth approximately 400 times greater than most commercially available DSOs. It contains 6Mbits of memory capable of capturing nearly 8ms when sampling at 100MHz. The DSO hardware has a low component count making extensive use of surface mount technology. This reduces cost, enhances reliability and increases the signal to noise ratio producing traces with noticeably less noise than the commercial reference DSO. The project DSO also features a built in Logic Analyzers, advanced triggering modes (such as pre-trigger) and variable sample rates together with user friendly, Windows based, software makes this system both versatile and easy to use.

INTRODUCTION:

At the heart of most digital oscilloscopes is a device (usually a chip of some sort) which converts analog voltage levels to digital signals. This chip is called an analog to digital converter (ADC). If this happens very quickly and the computer keeps track of voltage over time, a plot can be drawn, hence the principal of a digital oscilloscope. How quickly the chip is able to make these conversions is called the sampling frequency. It is given in units of ksps (kilo-samples per second) or Msps (mega-samples per second). And if you know the sampling frequency to be f, the highest frequency sine wave it can detect is f/2. This is known as the nyquist frequency. Any higher than that and all you'll get erroneous results and an effect known as aliasing. For our case, we chose ADC0804 because they are readily available at Supremetroncis. This chip is guaranteed to work at 8ksps. And hence, the nyquist frequency is 4 kHz. That means, the fastest sine wave we can see with chip is 4kHz before bad things start happening. Most oscilloscopes have some

analog circuit which will amplify and shift the trace before it is sampled by the ADC. By shifting the signal before amplifying it gives better accuracy in many cases (avoid saturation with amplifiers). As with all analog circuits, they will work only within a range of frequencies. After a specific frequency, the cut off frequency, the output voltage level is less than 70.7% of the original voltage level and is considered unsuitable for measurement. It would be preferable for this frequency to be much higher than the nyquist frequency of the ADC.

BLOCK DIAGRAM:

Oscilloscope
Probe with attenuation Vertical shift up to +/-5v Amplifier up to 100x ADC 8 bit

Controller FPGA
Trigger mechanism

Pc

PROBLEM FORMULATION:

Fixed number of input channels Limited bandwidth Upgrading is costly

LITERATURE SURVEY:

In the earlier version they have mapped 8 LSB bits of ADC values to display at 8 LEDs in their VHDL code. It was support to display the average voltage after every 255 ADC samples. But it was displaying different values. Another problem with this design is that it is displaying the 32 bits of floating points in ASCII character. There is a need to change to decimal point. The difference between the power supply output with no load, loaded and loaded at high frequency was very significant. Hence, the +5V power supply was calibrated with a nominal load to insure proper operation when loaded. We use pc and efficient software which could display all waveforms. Due to a near by power rail driving a high frequency digital circuit, the input to the ADC was very noisy. By putting in a small decoupling capacitor, this problem was fixed. Theoretically this would filter out high frequency signals as well, but we're going at 4 kHz, so we're not missing much unfortunately, floating points operation in VHDL was not able to display the correct values. Being a student, we did not have much money to spend on an FPGA development board. And we needed something with a serial interface. Looking around the web, we came across Jean's website (fpga4fun) which became an indispensable resource to this project. To interface the Pluto FPGA board through the serial port, we used the source code provided in the (Appendix of the Getting started with the Pluto boards manual). For the serial asynchronous communication through RS232 to computer we got information in the (http://www.fpga4fun.com/SerialInterface.html). We got further Details on the ADC0804 at (National Semiconductor's website).
APPLICATIONS:

PROS :

It is used in the laboratory to analyse the working of the electronic equipment It is used in the industries for signal detection

Ability to capture single events. Accuracy is more. Scalability is more compared other oscilloscope. Maximum input frequency is 3.75 kHz. FPGA could be used to save cost, or a higher performance one could be used to improve accuracy and bandwidth.

CONS:

Incorporate duty cycle in the ADC controller. The timing constrains specifically states that the Read/Convert Signal need to be a valid low for at least 450ns.

Simply creating a variable frequency 50% duty cycle signal can only allow us to sample under limited flexibilities.

REFERENCES:

1. FPGA Configuration Programming Kit (Enhanced) Data Sheet FPGA Configuration EEPROM Programming Specification Data Sheet FPGA Configuration EEPROM Memory Data Sheet Atmel Corporation, 1999 2. Cupitt, P.L. Digital Storage Oscilloscope University Of Durham, 1998 3. He Zhiqiang, Zeng Wenxian, Li Jianke, The Eighth International Conference on Electronic Measurement and Instruments ICEMI2007 An Embedded Virtual Digital Storage Oscilloscope with 1GSPS. 4. Wyne Wolf FPGA Based System Design Pearson publisher Printice Hall. 5. Nasir Mehmood, Jens Ogneewski,Vinodh Ravinath, Project Report Digital Oscilloscope Group 02, Year 2005/First Semester ISY/LiTH. 6. Project Report by Amr Mohamed, Fady, Kareem, Gamal, Mazen and Sherief, VHDL implementation of oscilloscope using FPGA, Alexandria University.