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Description
Words Cycles 1 1 2 1 1 1 2 1
Load FSRi with full 12-bit address, where i 0 to 2 Clear f 0xff f Move literal value to BSR3 : 0 , where k 0 to 15, to set the bank for direct addressing
2 1 1 1 1
2 1 1 1 1
Z -
Clear bit b of register f, where b 0 to 7 Set bit b of register f, where b 0 to 7 Toggle bit b of register f, where b 0 to 7
1 1 1
1 1 1
f, F/W(, BANKED) Copy f into F or WREG; rotate F or WREG left through carry bit (9-bit rotate left) f, F/W(, BANKED) Copy f into F or WREG; rotate F or WREG left without carry bit (8-bit rotate left) f, F/W(, BANKED) Copy f into F or WREG; rotate F or WREG right through carry bit (9-bit rotate right) f, F/W(, BANKED) Copy f into F or WREG; rotate F or WREG right without carry bit (8-bit rotate right)
1 1 1 1
1 1 1 1
C, N, Z N, Z C, N, Z N, Z
f, F/W(, BANKED) Increment f, putting result in F or WREG f, F/W(, BANKED) Decrement f, putting result in F or WREG f, F/W(, BANKED) Complement f, putting result in F or WREG f(, BANKED) Change sign of a twos-complement-coded number
1 1 1 1
1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
Z, N Z, N Z, N Z, N Z, N Z, N
f, F/W(, BANKED) AND WREG with f, putting result in F or WREG k Inclusive-OR literal value into WREG
f, F/W(, BANKED) Inclusive-OR WREG with f, putting result in F or WREG k Exclusive-OR literal value into WREG
addlw addwf addwfc daw sublw subwf subwfb subfwb mullw mulwf
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
C, DC, Z, OV, N C, DC, Z, OV, N C, DC, Z, OV, N C C, DC, Z, OV, N C, DC, Z, OV, N C, DC, Z, OV, N C, DC, Z, OV, N -
f, F/W(, BANKED) Add WREG and f, putting result in F or WREG f, F/W(, BANKED) Add WREG and f and carry bit, putting result in F or WREG Decimal adjust sum of two packed BCD digits to correct packed BCD result in WREG k Subtract WREG from literal value, putting result in WREG
f, F/W(, BANKED) Subtract WREG from f, putting result in f or WREG f, F/W(, BANKED) Subtract WREG and borrow bit from f, putting result in F or WREG f, F/W(, BANKED) Subtract f and borrow bit from WREG, putting result in F or WREG k f(, BANKED) Multiply WREG with literal value, putting result in PRODH : PRODL (WREG remains unchanged) Multiply WREG with f, putting result in PRODH : PRODL (WREG and f remain unchanged)
btfsc btfss
Test bit b of register f, where b 0 to 7 ; skip if clear Test bit b of register f, where b 0 to 7; skip if set
1 1
1/2 1/2
Operands label label label label label label label label label label
Description Branch to labeled instruction (within 64 one-word instructions) Go to labeled instruction (anywhere) If carry (C1), then branch to labeled instruction (within 64 one-word instructions) If no carry (C0), then branch to labeled instruction (within 64 one-word instructions) If zero (Z1), then branch to labeled intruction (within 64 one-word instructions) If not zero (Z0, then branch to labeled instruction (within 64 one-word instructions) If negative (N1), then branch to labeled instruction (within 64 one-word instructions) If not negative (N0), then branch to labeled instruction (within 64 one-word instructions) If overflow (OV1), then branch to labeled instruction (within 64 one-word instructions) If no overflow (OV0), then branch to labeled instruction (within 64 one-word instructions)
Words Cycles 1 2 1 1 1 1 1 1 1 1 2 2 1/2 1/2 1/2 1/2 1/2 1/2 1/2 1/2
Skip if f is equal to WREG Skip if f is greater than WREG (unsigned compare) Skip if f is less than WREG (unsigned compare)
1 1 1
f(, BANKED)
1 1 1 1 1
f, F/W(, BANKED) Decrement f, putting result in F or WREG; skip if zero f, F/W(, BANKED) Decrement f, putting result in F or WREG; skip if not zero f, F/W(, BANKED) Increment f, putting result in F or WREG; skip if zero f, F/W(, BANKED) Increment f, putting result in F or WREG; skip if not zero
Call labeled subroutine (within 512 one-word instructions) Call labeled subroutine (anywhere) Call labeled subroutine (anywhere); copy state to shadow registers: (WREG)WS, (STATUS)STATUSS, (BSR)BSRS Return from subroutine Return from subroutine; restore state from shadow registers: (WS)WREG, (STATUSS)STATUS, (BSRS)BSR Return from subroutine, putting literal value in WREG
1 2 2 1 1 1
2 2 2 2 2 2
C, DC, Z, OV, N -
FAST k
Return from interrupt; reenable interrupts Return from interrupt; restore state from shadow registers: (WS)WREG, (STATUSS)STATUS, (BSRS)BSR; reenable interrupts
1 1
2 2
C, DC, Z, OV, N
Push address of next instruction onto stack Discard address on top of stack Clear watchdog timer Go into standby mode Software reset to same state as is achieved with the MCLR input No operation
1 1 1 1 1 1
1 1 1 1 1 1
C, DC, Z, OV, N -
Read from program memory location pointed to by TBLPTR into TABLAT Read from program memory location pointed to by TBLPTR into TABLAT, then increment TBLPTR Read from program memory location pointed to by TBLPTR into TABLAT, then decrement TBLPTR Increment TBLPTR, then read from program memory location pointed to by TBLPTR into TABLAT
1 1 1 1
2 2 2 2