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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

CHAPTER 1
INTRODUCTION

1.1 Overview of the Project


As ZigBee is the upcoming technology for wireless data transmission in low cost, low power consumption, low data rate. We had tried to demonstrate its way of functionality and various aspects like kinds, advantages and disadvantages using a small application of controlling the any kind of electronic and electrical devices and machines. The ZigBee technology is broadly adopted for bulk and fast data transmission over a dedicated channel. In this project we are using ZigBee technology for wireless transferring of Message to display in rural areas. In this project a wireless mutual communication can be established between controlling office or Govt.Office and concern village for two way message delivering and update status messages can be known to each other. In data transmitting section consists of a touch panel interfaced with microcontroller kit using max232 and with ZigBee module. User person will enter some data on touch panel, this data will be given to the ZigBee module by Microcontroller, then ZigBee transmits the Message data in the form of rf data waves in certain range. In rural node display area or receiving section in the rf data range, the ZigBee module receives the wireless massage data in the form of rf waves and gives to the microcontroller kit interfaced to it, then Microcontroller gives the data to the LCD ,then LCD displays the data given to its nodal area vice versa, while Message sending from village to concern controlling office. In this way data can be sent wirelessly and display in the concern rural areas and in controlling offices by arranging ZigBee modules in that area.

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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

CHAPTER 2
BLOCK DIAGRAM AND ITS DESCRIPTION

BLOCK DIAGRAM
Transmitter:

Receiver:

Fig 2.1 Block Diagram of Project


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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

The major components are: 1. Power Supply 2. Micro controller 3. LCD display 4. Touch panel 5. ZigBee

2.1 Power Supply

Fig 2.2 Block Diagram of Power Supply

2.2 AT89S52 Micro Controller


It is a low-power, high performance CMOS 8-bit microcontroller with 8KB of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmels high-density nonvolatile memory technology and is compatible with the MCS-51TM instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic hip, the Atmel AT89C52 is a powerful microcontroller, which provides a highly flexible and cost effective solution so many embedded control applications.

2.3 Touch Panel


Touch Panel Processors is one which performs scientific and mathematical operation. Touch Panel Processor chips - specialized microProcessors with architectures designed specifically for the types of operations required in digital signal processing. Like a generalpurpose microProcessor, a processor is a programmable device, with its own native instruction code. processor chips are capable of carrying out millions of floating point operations per second, and like their better-known general-purpose cousins, faster and more powerful
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versions are continually being introduced. Processors can also be embedded within complex "system-on-chip" devices, often containing both analog and digital circuitry.

2.4 LCD Display


Here we are using a LCD of 16X2 resolution display. This LCD can display up to 32 characters and when we transmit more than 32 characters we are going to get only 32 characters and the remaining all the characters are omitted.

2.5 ZigBee
The ZigBee transceivers are used to transfer the data from the transmitter section to the receiver section. ZigBee is the latest wireless technology which provides three lowest solutions, low data rate, low power consumption and low cost. One of the ultimate goals of ZigBee is to provide an energy saving solution. Low power consumption and power management are important characteristics of ZigBee. To explore the concept of energy saving, an integrated ZigBee Automation System (ZAS) for lighting automation and power management is investigated. In this paper, the details of system design for ZAS are described including the system overview, deployment as well as the power management algorithms.

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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

CHAPTER 3
PROJ ECT SCHEM ATIC
3.1 Schematic of Project

Fig. 3.1 Schematic of Project In this project we are using ZigBee technology for wireless transferring of Message to display in rural areas. In this project a wireless mutual communication can be established between controlling office or Govt.Office and concern village for two way message delivering and update status messages can be known to each other. In data transmitting section consists of a touch panel interfaced with microcontroller kit using max232 and with ZigBee module. User person will enter some data on touch panel, this data will be given to the ZigBee module by Microcontroller, then ZigBee transmits the Message data in the form of rf data waves in certain range.
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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

In rural node display area or receiving section in the rf data range, the ZigBee module receives the wireless massage data in the form of rf waves and gives to the microcontroller kit interfaced to it, then Microcontroller gives the data to the LCD ,then LCD displays the data given to its nodal area vice versa, while Message sending from village to concern controlling office. In this way data can be sent wirelessly and display in the concern rural areas and in controlling offices by arranging ZigBee modules in that area.

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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

CHAPTER 4
COMPONENTS DESCRIPTION
List of Components
Following are the list of components that are necessary to build the complete circuit. There are Microcontroller AT89S52 IR LED IC 7805 Transformer 9-0-9, 500 Ma Disc capacitor 33pF Rectifier diode IN4007 ZigBee Touch Panel

4.1 Power Supply


4.1.1 Description The Power Supply is a Primary requirement for the project work. The required DC power supply for the base unit is derived from the mains line. For this purpose center tapped secondary of 9V-0-9V transformer is used. From this transformer we getting 5V power supply. In this +5V output is a regulated output and it is designed using 7805 positive voltage regulator. This is a 3 Pin voltage regulator, can deliver current up to 800 milliamps. Rectification is a process of rendering an alternating current or voltage into a unidirectional one. The component used for rectification is called Rectifier. A rectifier permits current to flow only during positive half cycles of the applied AC voltage. Thus, pulsating DC is obtained to obtain smooth DC power additional filter circuits required. A diode can be used as rectifier. There are various types of diodes. However, semiconductor diodes are very popularly used as rectifiers. A semiconductor diode is a solidstate device consisting of two elements is being an electron emitter or cathode, the other an electron collector or anode. Since electrons in a semiconductor diode can flow in one direction only-form emitter to collector-the diode provides the unilateral conduction necessary for rectification.

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4.1.2 Circuit diagram

Fig. 4.1 Circuit diagram of Power Supply The rectified Output is filtered for smoothening the DC, for this purpose capacitor is used in the filter circuit. The filter capacitors are usually connected in parallel with the rectifier output and the load. The AC can pass through a capacitor but DC cannot, the ripples are thus limited and the output becomes smoothed. When the voltage across the capacitor plates tends to rise, it stores up energy back into voltage and current. Thus, the fluctuation in the output voltage is reduced considerable.

4.2 Voltage Regulator


4.2.1 LM 78XX Series Voltage Regulator The LM 78XX series of the three terminal regulations is available with several fixed output voltages making them useful in a wide range of applications. One of these is local on card regulation. The voltages available allow these regulators to be used in logic systems, instrumentation and other solid state electronic equipment. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltages and currents. The LM78XX series is available in aluminum to 3 packages which will allow over 1.5A load current if adequate heat sinking is provided. Current limiting is included to limit the peak output current to a safe value. The LM 78XX is available in the metal 3 leads to 5 and the plastic to 92. For this type, with adequate heat sinking. The regulator can deliver 100mA output current. The advantage of this type of regulator is, it is easy to use and minimize the number of external components.
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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

The following are the features voltage regulators: a) Output current in excess of 1.5A for 78 and 78L series b) Internal thermal overload protection c) No external components required d) Output transistor sage area protection e) Internal short circuit current limit. f) Available in aluminum 3 package. 4.2.2 Positive Voltage Regulator The positive voltage regulator has different features like Output current up to 1.5A No external components Internal thermal overload protection High power dissipation capability Internal short-circuit current limiting Output transistor safe area compensation Direct replacements for Fairchild microA7800 series

Table 4.1 Nominal Output Voltages of Different Voltage Regulators Nominal Output Voltage 5V 6V 8V 8.5V 10V 12V 15V Regulator uA7805C uA7806C uA7808C uA7885C uA7810C uA7812C uA7815C

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4.2.3 Internal Block Diagram

Fig. 4.2 Internal block diagram of Voltage Regulator

Fig. 4.3 Pin representation of Voltage Regulator 4.2.4 Features Output Current up to 1A Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V Thermal Overload Protection Short Circuit Protection Output Transistor Safe Operating Area Protection

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4 .3 RS - 2 3 2
RS-232 (Recommended Standard 232) is a standard for serial binary single-ended data and control signals connecting between a DTE (Data Terminal Equipment) and a DCE (Data Circuit-terminating Equipment). It is commonly used in computer serial ports. The RS-232 standard defines the voltage levels that correspond to logical one and logical zero levels for the data transmission and the control signal lines. Valid signals are plus or minus 3 to 15 volts - the range near zero volts is not a valid RS-232 level. The standard specifies a maximum open-circuit voltage of 25 volts: signal levels of 5 V, 10 V, 12 V, and 15 V are all commonly seen depending on the power supplies available within a device. RS-232 drivers and receivers must be able to withstand indefinite short circuit to ground or to any voltage level up to 25 volts. The slew rate, or how fast the signal changes between levels, is also controlled. For data transmission lines (TxD, RxD and their secondary channel equivalents) logic one is defined as a negative voltage, the signal condition is called marking, and has the functional significance. Logic zero is positive and the signal condition is termed spacing. Control signals are logically inverted with respect to what one would see on the data transmission lines. When one of these signals is active, the voltage on the line will be between +3 to +15 volts. The inactive state for these signals would be the opposite voltage condition, between -3 and -15 volts. Examples of control lines would include request to send (RTS), clear to send (CTS), data terminal ready (DTR), and data set ready (DSR). Because the voltage levels are higher than logic levels typically used by integrated circuits, special intervening driver circuits are required to translate logic levels. These also protect the device's internal circuitry from short circuits or transients that may appear on the RS-232 interface, and provide sufficient current to comply with the slew rate requirements for data transmission. Minimal "3-wire" RS-232 connections consisting only of transmits data, receive data, and ground, is commonly used when the full facilities of RS-232 are not required. Even a twowire connection (data and ground) can be used if the data flow is one way (for example, a digital postal scale that periodically sends a weight reading, or a GPS receiver that periodically sends position, if no configuration via RS-232 is necessary). When only hardware flow control is required in addition to two-way data, the RTS and CTS lines are added in a 5-wire version.

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Fig. 4.4 Pin representation of RS-232 4.3.1 Pin Functions Data: Handshake: TxD on pin 3, RxD on pin 2 RTS on pin 7, CTS on pin 8, DSR on pin 6, CD on pin 1, DTR on pin 4 Common: Other: Common pin 5(ground) RI on pin 9

The method used by RS-232 for communication allows for a simple connection of three lines: Tx, Rx, and Ground. The three essential signals for 2 way RS-232 Communications are these: TXD Carries data from DTE to the DCE. RXD Carries data from DCE to the DTE. SG Signal ground. 4.3.2 Connection Diagram

TXD

RXD TXD

2 3 5

Embedded Controller

RXD GND

MAX 232

Fig. 4.5 Interfacing MCU to RS 232


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4.3.3 SFRs Used for Serial Communication SCON


SM2 SM1 SM0 REN TB8 RB8

TI

RI

TMOD

T1
TH1 TL1

4.4 MAX-232 IC
The MAX232 is an integrated circuit with 8pins that converts signals from an RS-232 serial port to signals suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS signals. The drivers provide RS-232 voltage level outputs (approx. 7.5 V) from a single + 5 V supply via on-chip charge pumps and external capacitors. This makes it useful for implementing RS-232 in devices that otherwise do not need any voltages outside the 0 V to + 5 V range, as power supply design does not need to be made more complicated just for driving the RS-232 in this case. The receivers reduce RS-232 inputs (which may be as high as 25 V), to standard 5 V TTL levels. These receivers have a typical threshold of 1.3 V, and a typical hysteresis of 0.5 V. The later MAX232A is backwards compatible with the original MAX232 but may operate at higher baud rates and can use smaller external capacitors 0.1 F in place of the 1.0 F capacitors used with the original device. The newer MAX3232 is also backwards compatible, but operates at a broader voltage range, from 3 to 5.5V.

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4.4.1 Schematic of MAX232

Fig. 4.6 Pin representation of MAX 232 4 . 4 . 2 Internal diagram of MAX 232

Fig. 4.7 Internal Diagram of Max 232

4.5 Liquid Crystal Display


In 1968, the first liquid crystal display (LCD) is developed. Since then, LCDs have been implemented on almost all types of digital devices, from watches to computer to projection TVs .LCDs operate as a light valve, blocking light or allowing it to pas s through. An image in an LCD is formed by applying an electric field to alter the chemical properties of each LCC (Liquid Crystal Cell) in the display in order to change a pixels light absorption properties. These LCCs modify the image produced by the backlight into the screen output requested by the controller. Through the end output may be in color, the LCCs are
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monochrome, and the color is added later through a filtering process. Modern laptop computer displays can produce 65,536 simultaneous colors at resolution of 800 X 600. To understand the operation of an LCD, it is easiest to trace the path of a light ray from the backlight to the user. The light source is usually located directly behind the LCD, and can use either LED or conventional fluorescent technology. From this source, the light ray will pass through a light polarizer to uniformly polarize the light so it can be acted upon by the liquid crystal (LC) matrix. The light beam will then pass through the LC matrix, which will determine whether this pixel should be on or off. If the pixel is on, the liquid crystal cell is electrically activated, and the molecules in the liquid will align in a single direction. This will allow the light to pass through unchanged. If the pixel is off, the electric field is removed from the liquid, and the molecules with in scatter. This dramatically reduces the light that will pass through the display at that pixel. In a color display, after the light passes through the liquid crystal matrix, it passes through a color filter (usually glass). This filter blocks all wavelengths of light except those within the range of that pixel. In a typical RGB display, the color filter is integrated into the upper glass colored microscopically to render each individual pixel red,green or blue. The areas in between the colored pixel filter areas are printed black to increase contrast. After a beam of light passes through the color filter, it passes through yet another polarizer to sharpen the image and eliminate glare. The image is then available for viewing. In an AMLCD, each LCC is stimulated individually by a dedicated transistor or diode. The two existing AMLCD technologies are Thin Film Transistor (TFT) and metal-insulatormetal (MIM). In an MIM display, dedicated diodes are fabricated at each pixel. MIM displays, currently being manufactured by Toshiba and Seiko-Epson, are not advantageous that TFT displays. 4.5.1 Interfacing LCD to Micro Controller This is the first interfacing example for the parallel port. We will star with something simple. This example does not use the Bi-directional feature found on newer ports, thus it should work with most of all Parallel Ports. It however does not show the use of the status port as an input. So what are we interfacing a 16 Character X 2 Line LCD Module to the Parallel Port. These LCD Modules are very common these days, and are quite simple to work with, as all the logic required running them is on board.

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4.5.2 Features Interface with either 4-bit or 8-bit microProcessor. Display data RAM Character generator ROM 160 different 5 X7 dot-matrix character patterns. Character generator RAM 8 different user programmed 5 X 7 dot-matrix patterns. Display data RAM and character generator RAM may be Accessed by the MicroProcessor. Numerous instructions Clear Display, Cursor Home, Display ON/OFF, Cursor ON/OFF, Blink Character, Cursor Shift, Display Shift. Built-in reset circuit is triggered at power ON.

Fig. 4.8 LCD Display 4.5.3 Pin Functions

Fig. 4.9 Pin Diagram of LCD Display

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Table 4.2 Pin Description of LCD Display

In the above table Vcc and Vss are supply pins and VEE (Pin no.3) is used for controlling LCD contrast. Pin No.4 is RS pin for selecting the register, there are two very important registers are there inside the LCD. The RS pin is used for their selection as follows. If RS=0, the instruction command code register is selected, allowing the user to send data to be displayed on the LCD. R/W is a read or writes Pin, which allows the user to write information to the LCD or read information from it. R/W=1 when reading R/W=0 when writing. The LCD to latch information presented to its data pins uses the enable (E) pin. The 8bit data pins, D0-D7, are used to send information to the LCD or read the contents of the LCDs internal registers. To display letters and numbers, we must send ASCII codes for the letters A-Z, and number 0 -9 to these pins while making RS=1. 4.5.4 Absolute Maximum Ratings Table 4.3 Absolute Maximum Ratings of LCD Display

4.5.5 Quality Control Some LCD panels have defective transistors, causing permanently lit or unlit pixels which are commonly referred to as stuck pixels or dead pixels respectively. Unlike integrated circuits (ICs), LCD panels with a few defective pixels are usually still usable. It is also

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economically prohibitive to discard a panel with just a few defective pixels because LCD panels are much larger than ICs. 4.5.6 Color Displays In color LCDs each individual pixel is divided into three cells, or subpixels, which are colored red, green, and blue, respectively, by additional filters (pigment filters, dye filters and metal oxide filters). Each sub pixel can be controlled independently to yield thousands or millions of possible colors for each pixel. CRT monitors employ a similar 'sub pixel' structures via phosphors, although the analog electron beam employed in CRTs do not hit exact 'sub pixels'. Color components may be arrayed in various pixel geometries, depending on the monitor's usage. If software knows which type of geometry is being used in a given LCD, this can be used to increase the apparent resolution of the monitor through sub pixel rendering. This technique is especially useful for text anti-aliasing.

To reduce smudging in a moving picture when pixels do not respond quickly enough to color changes, so-called pixel overdrive may be used.

4.6 Micro Controller AT89S52


4.6.1 Features Compatible with MCS-51 Products. 8K Bytes of In-System Reprogrammable Flash Memory. Endurance: 1,000 Write/Erase Cycles. Fully Static Operation: 0 Hz to 24 MHz 256 x 8-Bit Internal RAM. 32 Programmable I/O Lines. Three 16-bit Timer/Counters. Eight Interrupt Sources. Low Power Idle and Power Down Modes

4.6.2 Pin Diagram and its Description The microcontroller generic part number actually includes a whole family of microcontrollers that have numbers ranging from 8031to 8751 and are available in N-Channel

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Metal Oxide Silicon (NMOS) and Complementary Metal Oxide Silicon (CMOS) construction in a variety of package types.

A T 8 9 S 5 2

Fig. 4.10 Pin diagram of AT89S52 With 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the industry standard MCS-51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications. The AT89S52 provides the following standard features: 4 Kbytes of Flash, 256 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full Duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning.

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4.6.3 Architecture

Fig. 4.11 Architecture of 89S52 a) Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification b) Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and program verification.
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Table 4.4 Alternate functions of port 1 Port pin P1.0 P1.1 P1.5 P1.6 P1.7 c) Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX A, @RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. d) Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C52 as listed below: Table 4.5 Alternate functions of port 3 Prot pin P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 Alternate functions RXD(serial input port) TXD(serial output port) INT0(external interrupt 0) INT1(external interrupt 1) T0(timer 0 external input) T1(timer 1 external input) WR(external data memory write strobe) RD(external data memory read strobe) Alternate functions T2(external count input to timer/counter 2), clock-out T2EX(Timer/counter 2 capture/reload trigger and direction control) MOSI(used for in-system programming) MISO(used for in-system programming) SCK(used for in-system programming)

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e) RST RST means RESET 89C52 uses an active high reset pin. It must go high for two machine cycles. The simple RC circuit used here will supply voltage (Vcc) to reset pin until capacitance begins to charge. At a threshold of about 2.5V, reset input reaches a low level and system begin to run.

Fig. 4.12 Reset Connection f) ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. g) PSEN Program Store Enable is the read strobe to external program memory. When the AT89C52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. h) EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at OOOOH up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to Vcc for internal program executions. This pin also receives the 12-volt programming enable voltage (Vpp) during Flash programming, for parts that require 12-volt Vpp.
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i) XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit j) XTAL2 Output from the inverting oscillator amplifier. k) T2 External count input to Timer/Counter 2, Clock out. l) T2EX Counter 2 capture/reload trigger & direction control. m) The On-Chip Oscillators Pins XTAL1 and XTAL2 are provided for connecting a resonant network to form an oscillator. The crystal frequency is basic internal clock frequency. The maximum and minimum frequencies are specified from 1to 24MHZ.Program instructions may require one, two or four machine cycles to be executed depending on type of instructions. To calculate the time any particular instructions will take to be executed, the number of cycles C, T = C*12d / Crystal frequency Here, we chose frequency as 11.0592MHZ. This is because, baud= 2*clock frequency/(32d. 12d[256d-TH1]).The oscillator is chosen to help generate both standard and nonstandard baud rates. If standard baud rates are desired, an 11.0592MHZ crystal should be selected. From our desired standard rate, TH1 can be calculated. The internally implemented value of capacitance is 33 pf.

Fig. 4.13 On-Chip Oscillators 4.6.4 Program Memory Lock Bits On the chip there are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features .When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is

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necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly. 4.6.5 Program Counter and Data Pointer The 89S52 contains two 16-bit registers: the program counter (PC) and the data pointer (DPTR), Each is used to hold the address of a byte in memory. The PC is the only register that does not have an internal address. The DPTR is under the control of program instructions and can be specified by its 16-bit name, DPTR, or by each individual byte name, DPH and DPL. DPTR does not have a single internal address, DPH and DPL are each assigned an address. 4.6.6 A & B Registers The 89S52 contains 34 general-purpose, working, registers. Two of these, registers A and B, hold results of many instructions, particularly math and logical operations, of the 89S52 CPU. The other 32 are arranged as part of internal RAM in four banks, B0-B3, of eight registers. The A register is also used for all data transfers between the 89S52 and any external memory. The B register is used for with the A register for multiplication and division operations. 4.6.7 Flags and the Program Status Word (PSW) Flags may be conveniently addressed, they are grouped inside the program status word (PSW) and the power control (PCON) registers. The 89S52 has four math flags that respond automatically to the outcomes of math operations and three general-purpose user flags that can be set to 1 or cleared to 0 by the programmer as desired. The math flags include Carry (C), Auxiliary Carry (AC), Overflow (OV), and Parity (P). User flags are named F0,GF0 and GF1, they are general-purpose flags that may be used by the programmer to record some event in the program. 4.6.8 Memory Organization a) Internal Memory The 89S52 has internal RAM and ROM memory for the functions. Additional memory can be added externally using suitable circuits. This has a Hardware architecture, which uses the same address, in different memories, for code and data. b) Internal RAM The 256-byte internal RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. Instructions that use indirect addressing access the upper 128 bytes of RAM. Stack operations are examples of indirect addressing. Internal Data Memory addresses are always one byte wide, which implies an address space of only 256 bytes.
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However, the addressing modes for internal RAM can in fact accommodate 384 bytes, using a simple trick. Direct addresses higher than 7FH access one memory space, and indirect addresses higher than 7FH access a different memory space. Thus Figure shows the Upper 128 and SFR space occupying the same block of addresses, 80H through FFH, although they are physically separate entities. The Lower 128 bytes of RAM are present in all 89S52 devices as mapped in Figure. The lowest 32 bytes are grouped into 4 banks of 8 registers. Program instructions call out these registers as R0 through R7. Two bits in the Program Status Word (PSW) select which register bank is in use. This allows more efficient use of code space, since register instructions are shorter than instructions that use direct addressing. The next 16 bytes above the register banks form a block of bit addressable memory space. The 89S52 instruction set includes a wide selection of single-bit instructions, and the 128 bits in this area can be directly addressed by these instructions. The bit addresses in this area are 00H through 7FH. All of the bytes in the Lower 128 can be accessed by either direct or indirect addressing. The Upper 128 can only be accessed by indirect addressing. SFRs include the Port latches, timers, peripheral controls, etc. These registers can only be accessed by direct addressing. Sixteen addresses in SFR space are both byte- and bit-addressable. The bitaddressable SFRs are those whose address ends in OH or 80H.

Fig. 4.14 RAM Memory Organization


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c) The Stack and Stack Pointer The stack refers to an area of internal RAM that is used in conjunction with certain opcodes to store and retrieve data quickly. The 8-bit stack pointer register is used by the 89S52 to hold an internal RAM address that is called the top of the stack. The address held in the SP register is the location in internal RAM where the last byte of data was stored by a stack operation. When data is to be placed on the stack, the SP increments before storing data on the stack so that the stack grows up as data is stored. As data is retrieved from the stack, the byte is read from the stack, then the SP decrements to point to the next available byte of stored data.

d) Special Function Registers The 89S52 operations that do not use the internal 128-byte RAM addresses from 00h to 7Fh are done by a group of specific internal registers, each called a Special Function register, which may be addressed much like internal RAM, using addresses from 80h to FFh. PC is not part of the SFR and has no internal RAM address.

Fig. 4.15 TCON Register

Fig. 4.16 TMOD Register

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Table 4.6 Special Function Registers of AT89S52

Name A B DPH DPL IE IP P0 P1 P2 P3 PCON PSW SCON SBUF SP TMOD TCON TL0 TH0 TL1 TH1

Function Accumulator Arithmetic Addressing external memory Addressing external memory Interrupt enable control Interrupt priority Input/output port latch Input/output port latch Input/output port latch Input/output port latch Power control Program status word Serial port control Serial port data buffer Stack pointer Timer/counter mode control Timer/counter control Timer 0 low byte Timer 0 high byte Timer 1 low byte Timer 1 high byte

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4.7 ZIGBEE
4.7.1 Introduction ZIGBEE is a new wireless technology that looks have applications in a variety of fields. ZigBee technological standard based on IEEE 802.15.4 specification for low data rates in the Industrial, Scientific, and Medical (ISM) radio bands. 802 groups is the section that deals with network operations and technologies. Group 15 works more specifically with wireless networking. Task group 4 drafted the 802.15.4 standard for a low data rate wireless personal area network (WPAN). Technological Standard Created for Control and Sensors Networks. Based on the IEEE 802.15.4 standard Created by the ZIGBEE Alliance Named for erratic, zigzagging patterns of bees between flowers. Symbolises communication between nodes in a mesh network. This technology allows for devices to communicate with one another with very low power consumption, allowing the devices to run on simple batteries for several years. ZigBee is targeting various forms of automation, as the low data rate communication is ideal for sensors, monitors, and the like. Home automation is one of the key market areas for ZigBee. ZigBee is a low-power wireless technology, rewriting the wireless sensor equation. It is a secure network technology that rides on top of the recently ratified IEEE 802.15.4 radio standard. It is designed to interact with the remote controlled devices, which are put under a single standardized control interface that can interconnect into a network .Once associated with a network, a ZigBee node can wake up and communicate with other ZigBee devices and return to sleep.

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4.7.2 Characteristic Features Low cost Extends wireless to virtually any sensor Low power consumption Ideal for battery operation Small size, light weight Easy to integrate Ease of implementation Reliable data transfer Appropriate levels of security Direct sequence spread spectrum Fast acquisition time Range- 50m typical (5-500m based on environment) Multiple topologies- star, peer-to-peer, mesh Data rates of 250 kbps (@2.4 GHz), 40 kbps (@ 915 MHz), and 20 kbps (@868 MHz) 4.7.3 Architecture ZigBee stack architecture follows the standard Open Systems Interconnection (OSI) reference model, ZigBee's protocol stack is structured in layers. The first two layers, physical (PHY) and media access (MAC), are defined by the IEEE 802.15.4 standard. The layers above them are defined by the ZigBee Alliance. The model has five layers namely 1. Physical (PHY) layer 2. Media access control (MAC) layer 3. Network (NWK) and security layers 4. Application framework 5. Application profiles

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Block Diagram

Fig. 4.17 Block Diagram of ZigBee Physical Layer ZigBee-compliant products operate in unlicensed bands worldwide, including 2.4GHz (global), 902 to 928MHz (Americas), and 868MHz (Europe). Raw data throughput rates of 250Kbps can be achieved at 2.4GHz (16 channels), 40Kbps at 915MHz (10 channels), and 20Kbps at 868MHz (1 channel). The transmission distance is expected to range from 10 to 75m, depending on power output and environmental characteristics. Like Wi-Fi, ZigBee uses direct-sequence spread spectrum in the 2.4GHz band, with offset-quardrature phase-shift keying modulation. Channel width is 2MHz with 5MHzchannel spacing. The 868 and 900MHz bands also use direct-sequence spread spectrum but with binary-phase-shift keying modulation.

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Media Access Control (MAC) Layer The media access control (MAC) layer was designed to allow multiple topologies without complexity. The power management operation doesn't require multiple modes of operation. The MAC allows a reduced functionality device (RFD) that needn't have flash nor large amounts of ROM or RAM. The MAC was designed to handle large numbers of devices without requiring them to be "parked". The MAC provides network association and disassociation, has an optional superframe structure with beacons for time synchronization, and a guaranteed time-slot mechanism for high-priority communications Network (NWK) & Security Layer ZigBees self-forming and self-healing mesh-network architecture lets data and control messages pass from one node to another by multiple paths. This feature extends the network range and improves data reliability. It may also be used to build large, geographically dispersed networks with smaller networks linked to form a 'cluster-tree' network. Security Control

Security and data integrity are key benefits of the ZigBee technology. ZigBee leverages the security model of the IEEE 802.15.4 MAC sub-layer which specifies four security services: access controlthe device maintains a list of trusted devices within the network data encryption, which uses symmetric key 128-bit advanced encryption standard

frame integrity to protect data from being modified by parties without cryptographic keys

sequential freshness to reject data frames that have been replayedthe network controller compares the freshness value with the last known value from the device and rejects it if the freshness value has not been updated to a new value.

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Fig. 4.18 Comparison of Different Wireless Technologies

4.8 Touch Panel


A touch screen is an electronic visual display that can detect the presence and location of a touch within the display area. The term generally refers to touching the display of the device with a finger or hand. Touch screens can also sense other passive objects, such as a stylus. 4.8.1 Interfacing Touch Panel The following figure shows how to interface the touch panel into microcontroller. To read the position of the touch, we have to first read touch position sequentially i.e. first read X position and then read the Y position. To do this, connect X1 and Y2 pins of touch screen to ADC multiplexed GPIO pins of the controller. And connect X2 and Y1 pins of touch screen to simple GPIO pins of the microcontroller.

Fig. 4.19 Interfacing Touch Panel to Microcontroller


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4.8.2 Interfacing Touch Panel with LPC2148 To Interface touch screen with a microcontroller, we will need a two or more channels of Analog-to-Digital converter. This is needed because, the touch screen will provide data in terms of an analog voltage on two different pins, using which, we have to determine position of the touch. Also, ADC input pins of the microcontroller should be configurable as General Purpose I/O (GPIO). The ARM7 LPC2148 Evaluation board has four numbers of Touch panel connections, connected with I/O Port lines (P1.20 P1.21 && P0.29 P0.30) to make touch panel output.

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CHAPTER 5
SOFTWARES USED
5.1 ABOUT SOFTWARE:
Softwares used are:

Vision3 software Keil software for c programming

5.2 What's New in Vision3?


Vision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used in parallel with Vision2.

5.3 What is Vision3?


Vision3 is an IDE (Integrated Development Environment) that helps you write, compile, and debug embedded programs. It encapsulates the following components: A project manager. A make facility. Tool configuration. Editor. A powerful debugger.

To help you get started, several example programs (located in the \C51\Examples, \C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided. HELLO is a simple program that prints the string "Hello World" using the Serial Interface. MEASURE is a data acquisition system for analog and digital systems. TRAFFIC is a traffic light controller with the RTX Tiny operating system. SIEVE is the SIEVE Benchmark. DHRY is the Dhrystone Benchmark. WHETS is the Single-Precision Whetstone Benchmark.

Additional example programs not listed here are provided for each device architecture.

5.4 Building an Application in Vision3:


To build (compile, assemble, and link) an application in Vision3, you must:
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Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2). Select Project - Rebuild all target files or Build target. Vision3 compiles, assembles, and links the files in your project.

5.5 Creating Your Own Application in Vision3:


To create a new project in Vision3, you must: Select Project - New Project. Select a directory and enter the name of the project file. Select Project - Select Device and select an 8051, 251, or C16x/ST10 device from the Device Database. Create source files to add to the project. Select Project - Targets, Groups and Files. Add/Files, select Source Group1, and add the source files to the project. Select Project - Options and set the tool options. Note when you select the target device from the Device Database all special options are set automatically. You typically only need to configure the memory map of your target hardware. Default memory model settings are optimal for most applications. Select Project - Rebuild all target files or Build target.

5.6 Debugging an Application in Vision3:


To debug an application created using Vision3, you must: Select Debug - Start/Stop Debug Session. Use the Step toolbar buttons to single-step through your program. You may enter G, main in the Output Window to execute to the main C function. Open the Serial Window using the Serial #1 button on the toolbar. Debug your program using standard options like Step, Go, Break, and so on.

5.7 Starting Vision3 and Creating a Project:


Vision3 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the Vision3 menu 5.7.1 Project New Project. This opens a standard Windows dialog that asks you for the new project file name. We suggest that you use a separate folder for each project. You can simply use the icon Create New Folder in this dialog to get a new empty folder. Then select this folder and enter the file name for the new project, i.e. Project1.Vision2 creates a new project file with the
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name PROJECT1.UV2 which contains a default target and file group name. You can see these names in the Project. 5.7.2 Window Files. Now use from the menu Project Select Device for Target and select a CPU for your project. The Select Device dialog box shows the Vision2 device database. Just select the micro controller you use. We are using for our examples the Philips 80C51RD+ CPU. This selection sets necessary tool options for the 80C51RD+ device and simplifies in this way the tool Configuration. 5.7.3 Building Projects and Creating a HEX Files Typical, the tool settings under Options Target are all you need to start a new application. You may translate all source files and line the application with a click on the Build Target toolbar icon. When you build an application with syntax errors, Vision2 will display errors and warning messages in the Output Window Build page. A double click on a message line opens the source file on the correct location in a Vision2 editor window. Once you have successfully generated your application you can start debugging. After you have tested your application, it is required to create an Intel HEX file to download the software into an EPROM programmer or simulator. Vision2 creates HEX files with each build process when Create HEX files under Options for Target Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1. 5.7.4 CPU Simulation: Vision2 simulates up to 16 Mbytes of memory from which areas can be mapped for read, write, or code execution access. The Vision2 simulator traps and reports illegal memory accesses. In addition to memory mapping, the simulator also provides support for the integrated peripherals of the various 8051 derivatives. The on-chip peripherals of the CPU you have selected are configured from the Device. 5.7.5 Database selection: When you create your project target information about selecting a device. You may select and display the on-chip peripheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes. 5.7.6 Start Debugging: You start the debug mode of Vision2 with the Debug Start/Stop Debug Session command. Depending on the Options for Target Debug Configuration, Vision2 will load
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the application program and run the startup code Vision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, Vision2 opens an editor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debugging, most editor features are still available. For example, you can use the find command or correct program errors. Program source text of your application is shown in the same windows. The Vision2 debug mode differs from the edit mode in the following aspects: The Debug Menu and Debug Commands. The project structure or tool parameters cannot be modified. All build Commands are disabled. 5.7.7 Disassembly Window: The Disassembly window shows your target program as mixed source and assembly program or just assembly code. A trace history of previously executed instructions may be displayed with Debug View Trace Records. To enable the trace history, set Debug Enable/Disable Trace Recording.

5.8 Keil Software:


Installing the Keil software on a Windows PC Insert the CD-ROM in your computers CD drive. On most computers, the CD will auto run, and you will see the Keil installation menu. If the menu does not appear, manually double click on the Setup icon, in the root directory: you will then see the Keil menu. On the Keil menu, please select Install Evaluation Software. (You will not require a license number to install this software). Follow the installation instructions as they appear.

Loading the Projects: The example projects for this book are NOT loaded automatically when you install the Keil compiler.These files are stored on the CD in a directory /Pont. The files are arranged by chapter: for example, the project discussed in Chapter 3 is in the directory /Pont/Ch03_00Hello. Rather than using the projects on the CD (where changes cannot be saved), please copy the files from CD onto an appropriate directory on your hard disk.

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CHAPTER 6
SOTWARE IMPLEMENTATION
6.1 Source Code
#include<reg51.h> #include "lcd.h" #include<string.h>

void transmit(unsigned char *); unsigned char touch(void); void show( void); void cancel(void); void issue(void);

unsigned char i,j,s; unsigned char c; unsigned char str[25],test[30]; unsigned char status,pass[5]; unsigned int xval,yval; void main(void) {

TMOD =0x20; SCON =0x50; TH1=0xfd; TR1=1;

init_lcd(); display_lcd("Touch Based"); cmd_lcd(0xc0); display_lcd("Chatting System"); delay_ms(1000);


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init_lcd(); i=0;s=0; while(1) {

status=touch(); // dat[j++]=status;

if(s<1) cmd_lcd(0x01); if(s>15) cmd_lcd(0xc0);

if(status=='s') { test[s++]=' '; write_lcd(' '); } else if(status=='d') { cmd_lcd(0x10); test[s--]=' '; } else if(status=='e') { test[s++]='\0'; // delay_ms(30); transmit(test); cmd_lcd(0x01); delay_ms(1000); cmd_lcd(0x01); s=0; }
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else { test[s++]=status; write_lcd(status); // write_lcd(test[s]); }

} }

unsigned char touch(void) {

start:

i=0; j=0; while(i<1) { while(!RI); RI=0; str[j]=SBUF; if(SBUF==0x0d) i++; j++; } str[j]='\0'; xval=((str[3]-48)*100+(str[4]-48)*10+(str[5]-48)); yval=((str[8]-48)*100+(str[9]-48)*10+(str[10]-48)); delay_ms(100);

if((xval>20&&xval<1000)&&(yval>50&&yval<1000))
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//1st coloumn

if( (xval>18&&xval<100) && (yval>790&&yval<984)) return '1';

if( (xval>120&&xval<203) && (yval>790&&yval<984)) return '2';

if( (xval>220&&xval<300) && (yval>790&&yval<984)) return '3';

if( (xval>320&&xval<390) && (yval>790&&yval<984)) return '4';

if( (xval>410&&xval<490) && (yval>790&&yval<984)) return '5';

if( (xval>512&&xval<590) && (yval>790&&yval<984)) return '6';

if( (xval>610&&xval<690) && (yval>790&&yval<984)) return '7';

if( (xval>710&&xval<790) && (yval>790&&yval<984)) return '8';

if( (xval>800&&xval<890) && (yval>790&&yval<984)) return '9';

if( (xval>913&&xval<980) && (yval>790&&yval<984)) return '0';


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//2nd coloumn

if( (xval>40&&xval<100) && (yval>560&&yval<754)) return 'Q';

if( (xval>120&&xval<194) && (yval>560&&yval<764)) return 'W';

if( (xval>210&&xval<290) && (yval>560&&yval<760)) return 'E';

if( (xval>320&&xval<390) && (yval>560&&yval<760)) return 'R';

if( (xval>410&&xval<490) && (yval>550&&yval<760)) return 'T';

if( (xval>512&&xval<590) && (yval>550&&yval<760)) return 'Y';

if( (xval>610&&xval<690) && (yval>550&&yval<760)) return 'U';

if( (xval>710&&xval<790) && (yval>550&&yval<760)) return 'I';

if( (xval>800&&xval<890) && (yval>550&&yval<760)) return 'O';

if( (xval>910&&xval<980) && (yval>550&&yval<760)) return 'P';


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//3RD COLUMN

if( (xval>20&&xval<100) && (yval>320&&yval<520)) return 'A';

if( (xval>120&&xval<200) && (yval>320&&yval<520)) return 'S';

if( (xval>220&&xval<300) && (yval>320&&yval<520)) return 'D';

if( (xval>320&&xval<420) &&(yval>320&&yval<520)) return 'F';

if( (xval>410&&xval<490) && (yval>320&&yval<520)) return 'G';

if( (xval>512&&xval<590) && (yval>320&&yval<520)) return 'H';

if( (xval>610&&xval<690) && (yval>320&&yval<520)) return 'J';

if( (xval>710&&xval<790) &&(yval>320&&yval<520)) return 'K';

if( (xval>800&&xval<890) && (yval>320&&yval<520)) return 'L';

if( (xval>913&&xval<980) && (yval>320&&yval<520)) return 'd';


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//4th

if( (xval>18&&xval<100) && (yval>90&&yval<300)) return 'Z';

if( (xval>120&&xval<203) &&(yval>90&&yval<300)) return 'X';

if( (xval>220&&xval<300) &&(yval>90&&yval<300)) return 'C';

if( (xval>320&&xval<390) && (yval>90&&yval<300)) return 'V';

if( (xval>410&&xval<490) && (yval>90&&yval<300)) return 'B';

if( (xval>512&&xval<590) &&(yval>90&&yval<300)) return 'N';

if( (xval>610&&xval<690) &&(yval>90&&yval<300)) return 'M';

if( (xval>710&&xval<790) &&(yval>90&&yval<300)) return '.';

if( (xval>800&&xval<890) &&(yval>90&&yval<300)) return 's';

if( (xval>913&&xval<980) &&(yval>90&&yval<300)) return 'e';

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} else { if(str[1]=='@'||str[0]=='@'||str[2]=='@') { cmd_lcd(0x01); display_lcd("Received data"); cmd_lcd(0xc0); display_lcd(str); delay_ms(1000); cmd_lcd(0x01); } goto start; } } /********** TRANSMIT COMMAND TO MODEM **********/

void transmit(unsigned char *t_data) {

SBUF = '@'; while(!TI); TI=0;

while(*t_data!='\0') { SBUF = *t_data; while(!TI); TI=0; t_data++; }

SBUF = 0x0d;
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while(!TI); TI=0; }

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CHAPTER 7
RESULTS
Over view of Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology.

Fig. 7.1 Overview of Project

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7.1 Transmiter
As soon as the kit gets power it immediately enters into the transmiting mode, the following figure shows the view of circuit before transmiting the data from the transmitter.

Fig. 7.2 Overview of Transmitter

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7.2 Receiver
As soon as the kit gets power it immediately enters into the receiving mode, the following figure shows the view of circuit before receiving the data from the transmitter.

Fig. 7.3 Overview of Receiver

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Step 1 The following figure shows the steps in displaying the data to be transmitted on LCD display. The data from Microcontroller is sent to the LCD display through MAX-232 IC. The MAX-232 is an integrated circuit with 8pins that converts signals from an RS-232 serial port to signals suitable for use in compatible digital logic circuits. In the first step of display it shows the date following the time of receiving. After the time symbol is indicated to show that the
data transmitted is going to start. At the end of the data again on symbol is used to indicate that the transmitted data is ended.

Fig. 7.4 Transmitting the Data

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Step 2
The following figure shows the steps in displaying the data received on LCD display. The data from Microcontroller is sent to the LCD display through MAX-232 IC. The MAX232 is an integrated circuit with 8pins that converts signals from an RS-232 serial port to signals suitable for use in compatible digital logic circuits. In the first step of display it shows the date following the time of receiving. After the time symbol is indicated to show that the data
transmitted is going to start. At the end of the data again on symbol is used to indicate that the transmitted data is ended.

Fig. 7.5 Received Data

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CHAPTER 8
CONCLUSION & FUTURE SCOPE

Conclusion
A step-by-step approach in designing the microcontroller based system for wireless data transfer has been followed. The results obtained from the observation have shown that the system performance is quite reliable and accurate. The system is a prototype for the wireless communication here the further improvements will be made as less expensive and more reliable for the longer range of communication. This will reduce the usage of papers and in turn saves our environment keep it green. In near future all the notice boards with paper will disappear and only the wireless display will play a major role in the announcing a notice in the college or in an office or anywhere. Although the enhancements mentioned in the previous chapter may seem far in the future, the required technology and components are available, many such systems have been independently developed, or are at least tested at a prototype level.

Future Scope
The performance of the system can be further improved in terms of the operating speed, Memory capacity, and instruction cycle period of the microcontroller by using other Controllers such as AVRs and PICs. The number of channels can be increased to interface more number of sensors which is possible by using advanced versions of Microcontrollers. Showing the measured sensor data over. A speaking voice alarm could be used instead of the normal buzzer. This system can be connected to communication devices such as modems, cellular phones or satellite terminal to enable the remote collection of recorded data or alarming of certain parameters. The device can be made to perform better by providing the power supply with the help of battery source which can be rechargeable or non-rechargeable, to reduce the requirement of main AC power.

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Appendix A
EMBEDDED SYSTEM
A.1 Introduction:
As the embedded system is the combination of both software and hardware .These are devices used to control, monitor or assist the operation of equipment, machinery or plant. All embedded systems are including computers or microprocessors. Some of these computers are however very simple systems as compared with a personal computer. The simplest devices consist of a single microprocessor (often called a "chip), which may itself be packaged with other chips in a hybrid system or Application Specific Integrated Circuit (ASIC). Its input comes from a detector or sensor and its output goes to a switch or activator which (for example) may start or stop the operation of a machine or, by operating a valve, may control the flow of fuel to an engine. Embedded systems

Software

Hardware

ALP C VB

Processor Memory Peripherals

Fig A.1 Block diagram of Embedded System

A.2 Processors of Embedded System:


Processors are classified into four types like: Micro Processor (p) Micro controller (c) Digital Signal Processor (DSP) Application Specific Integrated Circuits (ASIC)

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A.2.1 Micro Processor (p):


A silicon chip that contains a CPU. In the world of personal computers, the terms microprocessor and CPU are used interchangeably. At the heart of all personal computers and most workstations sits a microprocessor. Microprocessors also control the logic of almost all digital devices, from clock radios to fuel-injection systems for automobiles. Three basic characteristics differentiate microprocessors: Instruction set: The set of instructions that the microprocessor can execute. Bandwidth : The number of bits processed in a single instruction. Clock speed : Given in megahertz (MHz), the clock speed determines how many instructions per second the processor can execute.

A.2.2 Micro Controller (c):


A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM. Microcontrollers are designed for embedded applications, in contrast to the microprocessors used in personal computers or other general purpose applications.

A.2.3 Digital Signal Processors (DSPs):


Digital Signal Processors is one which performs scientific and mathematical operation. Digital Signal Processor chips - specialized microprocessors with architectures designed specifically for the types of operations required in digital signal processing. Like a generalpurpose microprocessor, a DSP is a programmable device, with its own native instruction code. DSP chips are capable of carrying out millions of floating point operations per second, and like their better-known general-purpose cousins, faster and more powerful versions are continually being introduced. DSPs can also be embedded within complex "system-on-chip" devices, often containing both analog and digital circuitry.

A.2.4 Application Specific Integrated Circuit (ASIC):


ASIC is a combination of digital and analog circuits packed into an IC to achieve the desired control/computation function. ASIC typically contains CPU cores for computation and control Peripherals to control timing critical functions Memories to store data and program
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Dual Touch Panel based Wireless Data Transfer using ZIGBEE Technology

Analog circuits to provide clocks and interface to the real world which is analog in nature I/Os to connect to external components like LEDs, memories, monitors etc.

A.3 Applications of embedded systems:


Manufacturing and process control Construction industry Transport Buildings and premises Domestic service Communications Office systems and mobile equipment Banking, finance and commercial Medical diagnostics, monitoring and life support.

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Appendix B
B.1 DC Characteristics of AT89S52

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B.2 Flash programming and verification characteristics:

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Appendix C
Electrical Characteristics of MAX 232

Switched

Characteristics

of

MAX

232

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BIBLIOGRAPHY
1. The 8051Microcontroller Kenneth J. Ayala 2. The 8051 Microcontroller and Embedded Systems Muhammad Ali Mazidi. 3. Atmel AVR Microcontroller Primer: Programming And Interfacing Steven F.

Barrett, Daniel J. 4. Microcontrollers Architecture, Programming, Interfacing and System Design Raj Kamal,PearsonEducation,2005.

Web Sites
1. www.alldatasheets.com 2. www.microcontroller.com 3. www.8051microcontroller.com 4. www.wikipedia.com

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